diff -Nru intel-vaapi-driver-1.0.15/aclocal.m4 intel-vaapi-driver-1.7.1/aclocal.m4 --- intel-vaapi-driver-1.0.15/aclocal.m4 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/aclocal.m4 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,9911 @@ +# generated automatically by aclocal 1.14.1 -*- Autoconf -*- + +# Copyright (C) 1996-2013 Free Software Foundation, Inc. + +# This file is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +m4_ifndef([AC_CONFIG_MACRO_DIRS], [m4_defun([_AM_CONFIG_MACRO_DIRS], [])m4_defun([AC_CONFIG_MACRO_DIRS], [_AM_CONFIG_MACRO_DIRS($@)])]) +m4_ifndef([AC_AUTOCONF_VERSION], + [m4_copy([m4_PACKAGE_VERSION], [AC_AUTOCONF_VERSION])])dnl +m4_if(m4_defn([AC_AUTOCONF_VERSION]), [2.69],, +[m4_warning([this file was generated for autoconf 2.69. +You have another version of autoconf. It may work, but is not guaranteed to. +If you have problems, you may need to regenerate the build system entirely. +To do so, use the procedure documented by the package, typically 'autoreconf'.])]) + +# libtool.m4 - Configure libtool for the host system. -*-Autoconf-*- +# +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, +# 2006, 2007, 2008, 2009, 2010, 2011 Free Software +# Foundation, Inc. +# Written by Gordon Matzigkeit, 1996 +# +# This file is free software; the Free Software Foundation gives +# unlimited permission to copy and/or distribute it, with or without +# modifications, as long as this notice is preserved. + +m4_define([_LT_COPYING], [dnl +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, +# 2006, 2007, 2008, 2009, 2010, 2011 Free Software +# Foundation, Inc. +# Written by Gordon Matzigkeit, 1996 +# +# This file is part of GNU Libtool. +# +# GNU Libtool is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# As a special exception to the GNU General Public License, +# if you distribute this file as part of a program or library that +# is built using GNU Libtool, you may include this file under the +# same distribution terms that you use for the rest of that program. +# +# GNU Libtool is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Libtool; see the file COPYING. If not, a copy +# can be downloaded from http://www.gnu.org/licenses/gpl.html, or +# obtained by writing to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +]) + +# serial 57 LT_INIT + + +# LT_PREREQ(VERSION) +# ------------------ +# Complain and exit if this libtool version is less that VERSION. +m4_defun([LT_PREREQ], +[m4_if(m4_version_compare(m4_defn([LT_PACKAGE_VERSION]), [$1]), -1, + [m4_default([$3], + [m4_fatal([Libtool version $1 or higher is required], + 63)])], + [$2])]) + + +# _LT_CHECK_BUILDDIR +# ------------------ +# Complain if the absolute build directory name contains unusual characters +m4_defun([_LT_CHECK_BUILDDIR], +[case `pwd` in + *\ * | *\ *) + AC_MSG_WARN([Libtool does not cope well with whitespace in `pwd`]) ;; +esac +]) + + +# LT_INIT([OPTIONS]) +# ------------------ +AC_DEFUN([LT_INIT], +[AC_PREREQ([2.58])dnl We use AC_INCLUDES_DEFAULT +AC_REQUIRE([AC_CONFIG_AUX_DIR_DEFAULT])dnl +AC_BEFORE([$0], [LT_LANG])dnl +AC_BEFORE([$0], [LT_OUTPUT])dnl +AC_BEFORE([$0], [LTDL_INIT])dnl +m4_require([_LT_CHECK_BUILDDIR])dnl + +dnl Autoconf doesn't catch unexpanded LT_ macros by default: +m4_pattern_forbid([^_?LT_[A-Z_]+$])dnl +m4_pattern_allow([^(_LT_EOF|LT_DLGLOBAL|LT_DLLAZY_OR_NOW|LT_MULTI_MODULE)$])dnl +dnl aclocal doesn't pull ltoptions.m4, ltsugar.m4, or ltversion.m4 +dnl unless we require an AC_DEFUNed macro: +AC_REQUIRE([LTOPTIONS_VERSION])dnl +AC_REQUIRE([LTSUGAR_VERSION])dnl +AC_REQUIRE([LTVERSION_VERSION])dnl +AC_REQUIRE([LTOBSOLETE_VERSION])dnl +m4_require([_LT_PROG_LTMAIN])dnl + +_LT_SHELL_INIT([SHELL=${CONFIG_SHELL-/bin/sh}]) + +dnl Parse OPTIONS +_LT_SET_OPTIONS([$0], [$1]) + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ltmain" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' +AC_SUBST(LIBTOOL)dnl + +_LT_SETUP + +# Only expand once: +m4_define([LT_INIT]) +])# LT_INIT + +# Old names: +AU_ALIAS([AC_PROG_LIBTOOL], [LT_INIT]) +AU_ALIAS([AM_PROG_LIBTOOL], [LT_INIT]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_PROG_LIBTOOL], []) +dnl AC_DEFUN([AM_PROG_LIBTOOL], []) + + +# _LT_CC_BASENAME(CC) +# ------------------- +# Calculate cc_basename. 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Any other value will be used directly. +m4_define([_LT_DECL], +[lt_if_append_uniq([lt_decl_varnames], [$2], [, ], + [lt_dict_add_subkey([lt_decl_dict], [$2], [libtool_name], + [m4_ifval([$1], [$1], [$2])]) + lt_dict_add_subkey([lt_decl_dict], [$2], [value], [$3]) + m4_ifval([$4], + [lt_dict_add_subkey([lt_decl_dict], [$2], [description], [$4])]) + lt_dict_add_subkey([lt_decl_dict], [$2], + [tagged?], [m4_ifval([$5], [yes], [no])])]) +]) + + +# _LT_TAGDECL([CONFIGNAME], VARNAME, VALUE, [DESCRIPTION]) +# -------------------------------------------------------- +m4_define([_LT_TAGDECL], [_LT_DECL([$1], [$2], [$3], [$4], [yes])]) + + +# lt_decl_tag_varnames([SEPARATOR], [VARNAME1...]) +# ------------------------------------------------ +m4_define([lt_decl_tag_varnames], +[_lt_decl_filter([tagged?], [yes], $@)]) + + +# _lt_decl_filter(SUBKEY, VALUE, [SEPARATOR], [VARNAME1..]) +# --------------------------------------------------------- +m4_define([_lt_decl_filter], +[m4_case([$#], + [0], [m4_fatal([$0: too few arguments: $#])], + [1], [m4_fatal([$0: too few arguments: $#: $1])], + [2], [lt_dict_filter([lt_decl_dict], [$1], [$2], [], lt_decl_varnames)], + [3], [lt_dict_filter([lt_decl_dict], [$1], [$2], [$3], lt_decl_varnames)], + [lt_dict_filter([lt_decl_dict], $@)])[]dnl +]) + + +# lt_decl_quote_varnames([SEPARATOR], [VARNAME1...]) +# -------------------------------------------------- +m4_define([lt_decl_quote_varnames], +[_lt_decl_filter([value], [1], $@)]) + + +# lt_decl_dquote_varnames([SEPARATOR], [VARNAME1...]) +# --------------------------------------------------- +m4_define([lt_decl_dquote_varnames], +[_lt_decl_filter([value], [2], $@)]) + + +# lt_decl_varnames_tagged([SEPARATOR], [VARNAME1...]) +# --------------------------------------------------- +m4_define([lt_decl_varnames_tagged], +[m4_assert([$# <= 2])dnl +_$0(m4_quote(m4_default([$1], [[, ]])), + m4_ifval([$2], [[$2]], [m4_dquote(lt_decl_tag_varnames)]), + m4_split(m4_normalize(m4_quote(_LT_TAGS)), [ ]))]) +m4_define([_lt_decl_varnames_tagged], +[m4_ifval([$3], [lt_combine([$1], [$2], [_], $3)])]) + + +# lt_decl_all_varnames([SEPARATOR], [VARNAME1...]) +# ------------------------------------------------ +m4_define([lt_decl_all_varnames], +[_$0(m4_quote(m4_default([$1], [[, ]])), + m4_if([$2], [], + m4_quote(lt_decl_varnames), + m4_quote(m4_shift($@))))[]dnl +]) +m4_define([_lt_decl_all_varnames], +[lt_join($@, lt_decl_varnames_tagged([$1], + lt_decl_tag_varnames([[, ]], m4_shift($@))))dnl +]) + + +# _LT_CONFIG_STATUS_DECLARE([VARNAME]) +# ------------------------------------ +# Quote a variable value, and forward it to `config.status' so that its +# declaration there will have the same value as in `configure'. VARNAME +# must have a single quote delimited value for this to work. +m4_define([_LT_CONFIG_STATUS_DECLARE], +[$1='`$ECHO "$][$1" | $SED "$delay_single_quote_subst"`']) + + +# _LT_CONFIG_STATUS_DECLARATIONS +# ------------------------------ +# We delimit libtool config variables with single quotes, so when +# we write them to config.status, we have to be sure to quote all +# embedded single quotes properly. In configure, this macro expands +# each variable declared with _LT_DECL (and _LT_TAGDECL) into: +# +# ='`$ECHO "$" | $SED "$delay_single_quote_subst"`' +m4_defun([_LT_CONFIG_STATUS_DECLARATIONS], +[m4_foreach([_lt_var], m4_quote(lt_decl_all_varnames), + [m4_n([_LT_CONFIG_STATUS_DECLARE(_lt_var)])])]) + + +# _LT_LIBTOOL_TAGS +# ---------------- +# Output comment and list of tags supported by the script +m4_defun([_LT_LIBTOOL_TAGS], +[_LT_FORMAT_COMMENT([The names of the tagged configurations supported by this script])dnl +available_tags="_LT_TAGS"dnl +]) + + +# _LT_LIBTOOL_DECLARE(VARNAME, [TAG]) +# ----------------------------------- +# Extract the dictionary values for VARNAME (optionally with TAG) and +# expand to a commented shell variable setting: +# +# # Some comment about what VAR is for. +# visible_name=$lt_internal_name +m4_define([_LT_LIBTOOL_DECLARE], +[_LT_FORMAT_COMMENT(m4_quote(lt_dict_fetch([lt_decl_dict], [$1], + [description])))[]dnl +m4_pushdef([_libtool_name], + m4_quote(lt_dict_fetch([lt_decl_dict], [$1], [libtool_name])))[]dnl +m4_case(m4_quote(lt_dict_fetch([lt_decl_dict], [$1], [value])), + [0], [_libtool_name=[$]$1], + [1], [_libtool_name=$lt_[]$1], + [2], [_libtool_name=$lt_[]$1], + [_libtool_name=lt_dict_fetch([lt_decl_dict], [$1], [value])])[]dnl +m4_ifval([$2], [_$2])[]m4_popdef([_libtool_name])[]dnl +]) + + +# _LT_LIBTOOL_CONFIG_VARS +# ----------------------- +# Produce commented declarations of non-tagged libtool config variables +# suitable for insertion in the LIBTOOL CONFIG section of the `libtool' +# script. Tagged libtool config variables (even for the LIBTOOL CONFIG +# section) are produced by _LT_LIBTOOL_TAG_VARS. +m4_defun([_LT_LIBTOOL_CONFIG_VARS], +[m4_foreach([_lt_var], + m4_quote(_lt_decl_filter([tagged?], [no], [], lt_decl_varnames)), + [m4_n([_LT_LIBTOOL_DECLARE(_lt_var)])])]) + + +# _LT_LIBTOOL_TAG_VARS(TAG) +# ------------------------- +m4_define([_LT_LIBTOOL_TAG_VARS], +[m4_foreach([_lt_var], m4_quote(lt_decl_tag_varnames), + [m4_n([_LT_LIBTOOL_DECLARE(_lt_var, [$1])])])]) + + +# _LT_TAGVAR(VARNAME, [TAGNAME]) +# ------------------------------ +m4_define([_LT_TAGVAR], [m4_ifval([$2], [$1_$2], [$1])]) + + +# _LT_CONFIG_COMMANDS +# ------------------- +# Send accumulated output to $CONFIG_STATUS. Thanks to the lists of +# variables for single and double quote escaping we saved from calls +# to _LT_DECL, we can put quote escaped variables declarations +# into `config.status', and then the shell code to quote escape them in +# for loops in `config.status'. Finally, any additional code accumulated +# from calls to _LT_CONFIG_LIBTOOL_INIT is expanded. +m4_defun([_LT_CONFIG_COMMANDS], +[AC_PROVIDE_IFELSE([LT_OUTPUT], + dnl If the libtool generation code has been placed in $CONFIG_LT, + dnl instead of duplicating it all over again into config.status, + dnl then we will have config.status run $CONFIG_LT later, so it + dnl needs to know what name is stored there: + [AC_CONFIG_COMMANDS([libtool], + [$SHELL $CONFIG_LT || AS_EXIT(1)], [CONFIG_LT='$CONFIG_LT'])], + dnl If the libtool generation code is destined for config.status, + dnl expand the accumulated commands and init code now: + [AC_CONFIG_COMMANDS([libtool], + [_LT_OUTPUT_LIBTOOL_COMMANDS], [_LT_OUTPUT_LIBTOOL_COMMANDS_INIT])]) +])#_LT_CONFIG_COMMANDS + + +# Initialize. +m4_define([_LT_OUTPUT_LIBTOOL_COMMANDS_INIT], +[ + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +(unset CDPATH) >/dev/null 2>&1 && unset CDPATH + +sed_quote_subst='$sed_quote_subst' +double_quote_subst='$double_quote_subst' +delay_variable_subst='$delay_variable_subst' +_LT_CONFIG_STATUS_DECLARATIONS +LTCC='$LTCC' +LTCFLAGS='$LTCFLAGS' +compiler='$compiler_DEFAULT' + +# A function that is used when there is no print builtin or printf. +func_fallback_echo () +{ + eval 'cat <<_LTECHO_EOF +\$[]1 +_LTECHO_EOF' +} + +# Quote evaled strings. +for var in lt_decl_all_varnames([[ \ +]], lt_decl_quote_varnames); do + case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in + *[[\\\\\\\`\\"\\\$]]*) + eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\"" + ;; + *) + eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\"" + ;; + esac +done + +# Double-quote double-evaled strings. +for var in lt_decl_all_varnames([[ \ +]], lt_decl_dquote_varnames); do + case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in + *[[\\\\\\\`\\"\\\$]]*) + eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\"" + ;; + *) + eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\"" + ;; + esac +done + +_LT_OUTPUT_LIBTOOL_INIT +]) + +# _LT_GENERATED_FILE_INIT(FILE, [COMMENT]) +# ------------------------------------ +# Generate a child script FILE with all initialization necessary to +# reuse the environment learned by the parent script, and make the +# file executable. If COMMENT is supplied, it is inserted after the +# `#!' sequence but before initialization text begins. After this +# macro, additional text can be appended to FILE to form the body of +# the child script. The macro ends with non-zero status if the +# file could not be fully written (such as if the disk is full). +m4_ifdef([AS_INIT_GENERATED], +[m4_defun([_LT_GENERATED_FILE_INIT],[AS_INIT_GENERATED($@)])], +[m4_defun([_LT_GENERATED_FILE_INIT], +[m4_require([AS_PREPARE])]dnl +[m4_pushdef([AS_MESSAGE_LOG_FD])]dnl +[lt_write_fail=0 +cat >$1 <<_ASEOF || lt_write_fail=1 +#! $SHELL +# Generated by $as_me. +$2 +SHELL=\${CONFIG_SHELL-$SHELL} +export SHELL +_ASEOF +cat >>$1 <<\_ASEOF || lt_write_fail=1 +AS_SHELL_SANITIZE +_AS_PREPARE +exec AS_MESSAGE_FD>&1 +_ASEOF +test $lt_write_fail = 0 && chmod +x $1[]dnl +m4_popdef([AS_MESSAGE_LOG_FD])])])# _LT_GENERATED_FILE_INIT + +# LT_OUTPUT +# --------- +# This macro allows early generation of the libtool script (before +# AC_OUTPUT is called), incase it is used in configure for compilation +# tests. +AC_DEFUN([LT_OUTPUT], +[: ${CONFIG_LT=./config.lt} +AC_MSG_NOTICE([creating $CONFIG_LT]) +_LT_GENERATED_FILE_INIT(["$CONFIG_LT"], +[# Run this file to recreate a libtool stub with the current configuration.]) + +cat >>"$CONFIG_LT" <<\_LTEOF +lt_cl_silent=false +exec AS_MESSAGE_LOG_FD>>config.log +{ + echo + AS_BOX([Running $as_me.]) +} >&AS_MESSAGE_LOG_FD + +lt_cl_help="\ +\`$as_me' creates a local libtool stub from the current configuration, +for use in further configure time tests before the real libtool is +generated. + +Usage: $[0] [[OPTIONS]] + + -h, --help print this help, then exit + -V, --version print version number, then exit + -q, --quiet do not print progress messages + -d, --debug don't remove temporary files + +Report bugs to ." + +lt_cl_version="\ +m4_ifset([AC_PACKAGE_NAME], [AC_PACKAGE_NAME ])config.lt[]dnl +m4_ifset([AC_PACKAGE_VERSION], [ AC_PACKAGE_VERSION]) +configured by $[0], generated by m4_PACKAGE_STRING. + +Copyright (C) 2011 Free Software Foundation, Inc. +This config.lt script is free software; the Free Software Foundation +gives unlimited permision to copy, distribute and modify it." + +while test $[#] != 0 +do + case $[1] in + --version | --v* | -V ) + echo "$lt_cl_version"; exit 0 ;; + --help | --h* | -h ) + echo "$lt_cl_help"; exit 0 ;; + --debug | --d* | -d ) + debug=: ;; + --quiet | --q* | --silent | --s* | -q ) + lt_cl_silent=: ;; + + -*) AC_MSG_ERROR([unrecognized option: $[1] +Try \`$[0] --help' for more information.]) ;; + + *) AC_MSG_ERROR([unrecognized argument: $[1] +Try \`$[0] --help' for more information.]) ;; + esac + shift +done + +if $lt_cl_silent; then + exec AS_MESSAGE_FD>/dev/null +fi +_LTEOF + +cat >>"$CONFIG_LT" <<_LTEOF +_LT_OUTPUT_LIBTOOL_COMMANDS_INIT +_LTEOF + +cat >>"$CONFIG_LT" <<\_LTEOF +AC_MSG_NOTICE([creating $ofile]) +_LT_OUTPUT_LIBTOOL_COMMANDS +AS_EXIT(0) +_LTEOF +chmod +x "$CONFIG_LT" + +# configure is writing to config.log, but config.lt does its own redirection, +# appending to config.log, which fails on DOS, as config.log is still kept +# open by configure. Here we exec the FD to /dev/null, effectively closing +# config.log, so it can be properly (re)opened and appended to by config.lt. +lt_cl_success=: +test "$silent" = yes && + lt_config_lt_args="$lt_config_lt_args --quiet" +exec AS_MESSAGE_LOG_FD>/dev/null +$SHELL "$CONFIG_LT" $lt_config_lt_args || lt_cl_success=false +exec AS_MESSAGE_LOG_FD>>config.log +$lt_cl_success || AS_EXIT(1) +])# LT_OUTPUT + + +# _LT_CONFIG(TAG) +# --------------- +# If TAG is the built-in tag, create an initial libtool script with a +# default configuration from the untagged config vars. Otherwise add code +# to config.status for appending the configuration named by TAG from the +# matching tagged config vars. +m4_defun([_LT_CONFIG], +[m4_require([_LT_FILEUTILS_DEFAULTS])dnl +_LT_CONFIG_SAVE_COMMANDS([ + m4_define([_LT_TAG], m4_if([$1], [], [C], [$1]))dnl + m4_if(_LT_TAG, [C], [ + # See if we are running on zsh, and set the options which allow our + # commands through without removal of \ escapes. + if test -n "${ZSH_VERSION+set}" ; then + setopt NO_GLOB_SUBST + fi + + cfgfile="${ofile}T" + trap "$RM \"$cfgfile\"; exit 1" 1 2 15 + $RM "$cfgfile" + + cat <<_LT_EOF >> "$cfgfile" +#! $SHELL + +# `$ECHO "$ofile" | sed 's%^.*/%%'` - Provide generalized library-building support services. +# Generated automatically by $as_me ($PACKAGE$TIMESTAMP) $VERSION +# Libtool was configured on host `(hostname || uname -n) 2>/dev/null | sed 1q`: +# NOTE: Changes made to this file will be lost: look at ltmain.sh. +# +_LT_COPYING +_LT_LIBTOOL_TAGS + +# ### BEGIN LIBTOOL CONFIG +_LT_LIBTOOL_CONFIG_VARS +_LT_LIBTOOL_TAG_VARS +# ### END LIBTOOL CONFIG + +_LT_EOF + + case $host_os in + aix3*) + cat <<\_LT_EOF >> "$cfgfile" +# AIX sometimes has problems with the GCC collect2 program. For some +# reason, if we set the COLLECT_NAMES environment variable, the problems +# vanish in a puff of smoke. +if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES +fi +_LT_EOF + ;; + esac + + _LT_PROG_LTMAIN + + # We use sed instead of cat because bash on DJGPP gets confused if + # if finds mixed CR/LF and LF-only lines. Since sed operates in + # text mode, it properly converts lines to CR/LF. This bash problem + # is reportedly fixed, but why not run on old versions too? + sed '$q' "$ltmain" >> "$cfgfile" \ + || (rm -f "$cfgfile"; exit 1) + + _LT_PROG_REPLACE_SHELLFNS + + mv -f "$cfgfile" "$ofile" || + (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile") + chmod +x "$ofile" +], +[cat <<_LT_EOF >> "$ofile" + +dnl Unfortunately we have to use $1 here, since _LT_TAG is not expanded +dnl in a comment (ie after a #). +# ### BEGIN LIBTOOL TAG CONFIG: $1 +_LT_LIBTOOL_TAG_VARS(_LT_TAG) +# ### END LIBTOOL TAG CONFIG: $1 +_LT_EOF +])dnl /m4_if +], +[m4_if([$1], [], [ + PACKAGE='$PACKAGE' + VERSION='$VERSION' + TIMESTAMP='$TIMESTAMP' + RM='$RM' + ofile='$ofile'], []) +])dnl /_LT_CONFIG_SAVE_COMMANDS +])# _LT_CONFIG + + +# LT_SUPPORTED_TAG(TAG) +# --------------------- +# Trace this macro to discover what tags are supported by the libtool +# --tag option, using: +# autoconf --trace 'LT_SUPPORTED_TAG:$1' +AC_DEFUN([LT_SUPPORTED_TAG], []) + + +# C support is built-in for now +m4_define([_LT_LANG_C_enabled], []) +m4_define([_LT_TAGS], []) + + +# LT_LANG(LANG) +# ------------- +# Enable libtool support for the given language if not already enabled. +AC_DEFUN([LT_LANG], +[AC_BEFORE([$0], [LT_OUTPUT])dnl +m4_case([$1], + [C], [_LT_LANG(C)], + [C++], [_LT_LANG(CXX)], + [Go], [_LT_LANG(GO)], + [Java], [_LT_LANG(GCJ)], + [Fortran 77], [_LT_LANG(F77)], + [Fortran], [_LT_LANG(FC)], + [Windows Resource], [_LT_LANG(RC)], + [m4_ifdef([_LT_LANG_]$1[_CONFIG], + [_LT_LANG($1)], + [m4_fatal([$0: unsupported language: "$1"])])])dnl +])# LT_LANG + + +# _LT_LANG(LANGNAME) +# ------------------ +m4_defun([_LT_LANG], +[m4_ifdef([_LT_LANG_]$1[_enabled], [], + [LT_SUPPORTED_TAG([$1])dnl + m4_append([_LT_TAGS], [$1 ])dnl + m4_define([_LT_LANG_]$1[_enabled], [])dnl + _LT_LANG_$1_CONFIG($1)])dnl +])# _LT_LANG + + +m4_ifndef([AC_PROG_GO], [ +# NOTE: This macro has been submitted for inclusion into # +# GNU Autoconf as AC_PROG_GO. When it is available in # +# a released version of Autoconf we should remove this # +# macro and use it instead. # +m4_defun([AC_PROG_GO], +[AC_LANG_PUSH(Go)dnl +AC_ARG_VAR([GOC], [Go compiler command])dnl +AC_ARG_VAR([GOFLAGS], [Go compiler flags])dnl +_AC_ARG_VAR_LDFLAGS()dnl +AC_CHECK_TOOL(GOC, gccgo) +if test -z "$GOC"; then + if test -n "$ac_tool_prefix"; then + AC_CHECK_PROG(GOC, [${ac_tool_prefix}gccgo], [${ac_tool_prefix}gccgo]) + fi +fi +if test -z "$GOC"; then + AC_CHECK_PROG(GOC, gccgo, gccgo, false) +fi +])#m4_defun +])#m4_ifndef + + +# _LT_LANG_DEFAULT_CONFIG +# ----------------------- +m4_defun([_LT_LANG_DEFAULT_CONFIG], +[AC_PROVIDE_IFELSE([AC_PROG_CXX], + [LT_LANG(CXX)], + [m4_define([AC_PROG_CXX], defn([AC_PROG_CXX])[LT_LANG(CXX)])]) + +AC_PROVIDE_IFELSE([AC_PROG_F77], + [LT_LANG(F77)], + [m4_define([AC_PROG_F77], defn([AC_PROG_F77])[LT_LANG(F77)])]) + +AC_PROVIDE_IFELSE([AC_PROG_FC], + [LT_LANG(FC)], + [m4_define([AC_PROG_FC], defn([AC_PROG_FC])[LT_LANG(FC)])]) + +dnl The call to [A][M_PROG_GCJ] is quoted like that to stop aclocal +dnl pulling things in needlessly. +AC_PROVIDE_IFELSE([AC_PROG_GCJ], + [LT_LANG(GCJ)], + [AC_PROVIDE_IFELSE([A][M_PROG_GCJ], + [LT_LANG(GCJ)], + [AC_PROVIDE_IFELSE([LT_PROG_GCJ], + [LT_LANG(GCJ)], + [m4_ifdef([AC_PROG_GCJ], + [m4_define([AC_PROG_GCJ], defn([AC_PROG_GCJ])[LT_LANG(GCJ)])]) + m4_ifdef([A][M_PROG_GCJ], + [m4_define([A][M_PROG_GCJ], defn([A][M_PROG_GCJ])[LT_LANG(GCJ)])]) + m4_ifdef([LT_PROG_GCJ], + [m4_define([LT_PROG_GCJ], defn([LT_PROG_GCJ])[LT_LANG(GCJ)])])])])]) + +AC_PROVIDE_IFELSE([AC_PROG_GO], + [LT_LANG(GO)], + [m4_define([AC_PROG_GO], defn([AC_PROG_GO])[LT_LANG(GO)])]) + +AC_PROVIDE_IFELSE([LT_PROG_RC], + [LT_LANG(RC)], + [m4_define([LT_PROG_RC], defn([LT_PROG_RC])[LT_LANG(RC)])]) +])# _LT_LANG_DEFAULT_CONFIG + +# Obsolete macros: +AU_DEFUN([AC_LIBTOOL_CXX], [LT_LANG(C++)]) +AU_DEFUN([AC_LIBTOOL_F77], [LT_LANG(Fortran 77)]) +AU_DEFUN([AC_LIBTOOL_FC], [LT_LANG(Fortran)]) +AU_DEFUN([AC_LIBTOOL_GCJ], [LT_LANG(Java)]) +AU_DEFUN([AC_LIBTOOL_RC], [LT_LANG(Windows Resource)]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_CXX], []) +dnl AC_DEFUN([AC_LIBTOOL_F77], []) +dnl AC_DEFUN([AC_LIBTOOL_FC], []) +dnl AC_DEFUN([AC_LIBTOOL_GCJ], []) +dnl AC_DEFUN([AC_LIBTOOL_RC], []) + + +# _LT_TAG_COMPILER +# ---------------- +m4_defun([_LT_TAG_COMPILER], +[AC_REQUIRE([AC_PROG_CC])dnl + +_LT_DECL([LTCC], [CC], [1], [A C compiler])dnl +_LT_DECL([LTCFLAGS], [CFLAGS], [1], [LTCC compiler flags])dnl +_LT_TAGDECL([CC], [compiler], [1], [A language specific compiler])dnl +_LT_TAGDECL([with_gcc], [GCC], [0], [Is the compiler the GNU compiler?])dnl + +# If no C compiler was specified, use CC. +LTCC=${LTCC-"$CC"} + +# If no C compiler flags were specified, use CFLAGS. +LTCFLAGS=${LTCFLAGS-"$CFLAGS"} + +# Allow CC to be a program name with arguments. +compiler=$CC +])# _LT_TAG_COMPILER + + +# _LT_COMPILER_BOILERPLATE +# ------------------------ +# Check for compiler boilerplate output or warnings with +# the simple compiler test code. +m4_defun([_LT_COMPILER_BOILERPLATE], +[m4_require([_LT_DECL_SED])dnl +ac_outfile=conftest.$ac_objext +echo "$lt_simple_compile_test_code" >conftest.$ac_ext +eval "$ac_compile" 2>&1 >/dev/null | $SED '/^$/d; /^ *+/d' >conftest.err +_lt_compiler_boilerplate=`cat conftest.err` +$RM conftest* +])# _LT_COMPILER_BOILERPLATE + + +# _LT_LINKER_BOILERPLATE +# ---------------------- +# Check for linker boilerplate output or warnings with +# the simple link test code. +m4_defun([_LT_LINKER_BOILERPLATE], +[m4_require([_LT_DECL_SED])dnl +ac_outfile=conftest.$ac_objext +echo "$lt_simple_link_test_code" >conftest.$ac_ext +eval "$ac_link" 2>&1 >/dev/null | $SED '/^$/d; /^ *+/d' >conftest.err +_lt_linker_boilerplate=`cat conftest.err` +$RM -r conftest* +])# _LT_LINKER_BOILERPLATE + +# _LT_REQUIRED_DARWIN_CHECKS +# ------------------------- +m4_defun_once([_LT_REQUIRED_DARWIN_CHECKS],[ + case $host_os in + rhapsody* | darwin*) + AC_CHECK_TOOL([DSYMUTIL], [dsymutil], [:]) + AC_CHECK_TOOL([NMEDIT], [nmedit], [:]) + AC_CHECK_TOOL([LIPO], [lipo], [:]) + AC_CHECK_TOOL([OTOOL], [otool], [:]) + AC_CHECK_TOOL([OTOOL64], [otool64], [:]) + _LT_DECL([], [DSYMUTIL], [1], + [Tool to manipulate archived DWARF debug symbol files on Mac OS X]) + _LT_DECL([], [NMEDIT], [1], + [Tool to change global to local symbols on Mac OS X]) + _LT_DECL([], [LIPO], [1], + [Tool to manipulate fat objects and archives on Mac OS X]) + _LT_DECL([], [OTOOL], [1], + [ldd/readelf like tool for Mach-O binaries on Mac OS X]) + _LT_DECL([], [OTOOL64], [1], + [ldd/readelf like tool for 64 bit Mach-O binaries on Mac OS X 10.4]) + + AC_CACHE_CHECK([for -single_module linker flag],[lt_cv_apple_cc_single_mod], + [lt_cv_apple_cc_single_mod=no + if test -z "${LT_MULTI_MODULE}"; then + # By default we will add the -single_module flag. You can override + # by either setting the environment variable LT_MULTI_MODULE + # non-empty at configure time, or by adding -multi_module to the + # link flags. + rm -rf libconftest.dylib* + echo "int foo(void){return 1;}" > conftest.c + echo "$LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ +-dynamiclib -Wl,-single_module conftest.c" >&AS_MESSAGE_LOG_FD + $LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ + -dynamiclib -Wl,-single_module conftest.c 2>conftest.err + _lt_result=$? + # If there is a non-empty error log, and "single_module" + # appears in it, assume the flag caused a linker warning + if test -s conftest.err && $GREP single_module conftest.err; then + cat conftest.err >&AS_MESSAGE_LOG_FD + # Otherwise, if the output was created with a 0 exit code from + # the compiler, it worked. + elif test -f libconftest.dylib && test $_lt_result -eq 0; then + lt_cv_apple_cc_single_mod=yes + else + cat conftest.err >&AS_MESSAGE_LOG_FD + fi + rm -rf libconftest.dylib* + rm -f conftest.* + fi]) + + AC_CACHE_CHECK([for -exported_symbols_list linker flag], + [lt_cv_ld_exported_symbols_list], + [lt_cv_ld_exported_symbols_list=no + save_LDFLAGS=$LDFLAGS + echo "_main" > conftest.sym + LDFLAGS="$LDFLAGS -Wl,-exported_symbols_list,conftest.sym" + AC_LINK_IFELSE([AC_LANG_PROGRAM([],[])], + [lt_cv_ld_exported_symbols_list=yes], + [lt_cv_ld_exported_symbols_list=no]) + LDFLAGS="$save_LDFLAGS" + ]) + + AC_CACHE_CHECK([for -force_load linker flag],[lt_cv_ld_force_load], + [lt_cv_ld_force_load=no + cat > conftest.c << _LT_EOF +int forced_loaded() { return 2;} +_LT_EOF + echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&AS_MESSAGE_LOG_FD + $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&AS_MESSAGE_LOG_FD + echo "$AR cru libconftest.a conftest.o" >&AS_MESSAGE_LOG_FD + $AR cru libconftest.a conftest.o 2>&AS_MESSAGE_LOG_FD + echo "$RANLIB libconftest.a" >&AS_MESSAGE_LOG_FD + $RANLIB libconftest.a 2>&AS_MESSAGE_LOG_FD + cat > conftest.c << _LT_EOF +int main() { return 0;} +_LT_EOF + echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&AS_MESSAGE_LOG_FD + $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err + _lt_result=$? + if test -s conftest.err && $GREP force_load conftest.err; then + cat conftest.err >&AS_MESSAGE_LOG_FD + elif test -f conftest && test $_lt_result -eq 0 && $GREP forced_load conftest >/dev/null 2>&1 ; then + lt_cv_ld_force_load=yes + else + cat conftest.err >&AS_MESSAGE_LOG_FD + fi + rm -f conftest.err libconftest.a conftest conftest.c + rm -rf conftest.dSYM + ]) + case $host_os in + rhapsody* | darwin1.[[012]]) + _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;; + darwin1.*) + _lt_dar_allow_undefined='${wl}-flat_namespace ${wl}-undefined ${wl}suppress' ;; + darwin*) # darwin 5.x on + # if running on 10.5 or later, the deployment target defaults + # to the OS version, if on x86, and 10.4, the deployment + # target defaults to 10.4. Don't you love it? + case ${MACOSX_DEPLOYMENT_TARGET-10.0},$host in + 10.0,*86*-darwin8*|10.0,*-darwin[[91]]*) + _lt_dar_allow_undefined='${wl}-undefined ${wl}dynamic_lookup' ;; + 10.[[012]]*) + _lt_dar_allow_undefined='${wl}-flat_namespace ${wl}-undefined ${wl}suppress' ;; + 10.*) + _lt_dar_allow_undefined='${wl}-undefined ${wl}dynamic_lookup' ;; + esac + ;; + esac + if test "$lt_cv_apple_cc_single_mod" = "yes"; then + _lt_dar_single_mod='$single_module' + fi + if test "$lt_cv_ld_exported_symbols_list" = "yes"; then + _lt_dar_export_syms=' ${wl}-exported_symbols_list,$output_objdir/${libname}-symbols.expsym' + else + _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}' + fi + if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then + _lt_dsymutil='~$DSYMUTIL $lib || :' + else + _lt_dsymutil= + fi + ;; + esac +]) + + +# _LT_DARWIN_LINKER_FEATURES([TAG]) +# --------------------------------- +# Checks for linker and compiler features on darwin +m4_defun([_LT_DARWIN_LINKER_FEATURES], +[ + m4_require([_LT_REQUIRED_DARWIN_CHECKS]) + _LT_TAGVAR(archive_cmds_need_lc, $1)=no + _LT_TAGVAR(hardcode_direct, $1)=no + _LT_TAGVAR(hardcode_automatic, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=unsupported + if test "$lt_cv_ld_force_load" = "yes"; then + _LT_TAGVAR(whole_archive_flag_spec, $1)='`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`' + m4_case([$1], [F77], [_LT_TAGVAR(compiler_needs_object, $1)=yes], + [FC], [_LT_TAGVAR(compiler_needs_object, $1)=yes]) + else + _LT_TAGVAR(whole_archive_flag_spec, $1)='' + fi + _LT_TAGVAR(link_all_deplibs, $1)=yes + _LT_TAGVAR(allow_undefined_flag, $1)="$_lt_dar_allow_undefined" + case $cc_basename in + ifort*) _lt_dar_can_shared=yes ;; + *) _lt_dar_can_shared=$GCC ;; + esac + if test "$_lt_dar_can_shared" = "yes"; then + output_verbose_link_cmd=func_echo_all + _LT_TAGVAR(archive_cmds, $1)="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}" + _LT_TAGVAR(module_cmds, $1)="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}" + _LT_TAGVAR(archive_expsym_cmds, $1)="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}" + _LT_TAGVAR(module_expsym_cmds, $1)="sed -e 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dar_export_syms}${_lt_dsymutil}" + m4_if([$1], [CXX], +[ if test "$lt_cv_apple_cc_single_mod" != "yes"; then + _LT_TAGVAR(archive_cmds, $1)="\$CC -r -keep_private_externs -nostdlib -o \${lib}-master.o \$libobjs~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \${lib}-master.o \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring${_lt_dsymutil}" + _LT_TAGVAR(archive_expsym_cmds, $1)="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -r -keep_private_externs -nostdlib -o \${lib}-master.o \$libobjs~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \${lib}-master.o \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring${_lt_dar_export_syms}${_lt_dsymutil}" + fi +],[]) + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi +]) + +# _LT_SYS_MODULE_PATH_AIX([TAGNAME]) +# ---------------------------------- +# Links a minimal program and checks the executable +# for the system default hardcoded library path. In most cases, +# this is /usr/lib:/lib, but when the MPI compilers are used +# the location of the communication and MPI libs are included too. +# If we don't find anything, use the default library path according +# to the aix ld manual. +# Store the results from the different compilers for each TAGNAME. +# Allow to override them for all tags through lt_cv_aix_libpath. +m4_defun([_LT_SYS_MODULE_PATH_AIX], +[m4_require([_LT_DECL_SED])dnl +if test "${lt_cv_aix_libpath+set}" = set; then + aix_libpath=$lt_cv_aix_libpath +else + AC_CACHE_VAL([_LT_TAGVAR([lt_cv_aix_libpath_], [$1])], + [AC_LINK_IFELSE([AC_LANG_PROGRAM],[ + lt_aix_libpath_sed='[ + /Import File Strings/,/^$/ { + /^0/ { + s/^0 *\([^ ]*\) *$/\1/ + p + } + }]' + _LT_TAGVAR([lt_cv_aix_libpath_], [$1])=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` + # Check for a 64-bit object if we didn't find anything. + if test -z "$_LT_TAGVAR([lt_cv_aix_libpath_], [$1])"; then + _LT_TAGVAR([lt_cv_aix_libpath_], [$1])=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` + fi],[]) + if test -z "$_LT_TAGVAR([lt_cv_aix_libpath_], [$1])"; then + _LT_TAGVAR([lt_cv_aix_libpath_], [$1])="/usr/lib:/lib" + fi + ]) + aix_libpath=$_LT_TAGVAR([lt_cv_aix_libpath_], [$1]) +fi +])# _LT_SYS_MODULE_PATH_AIX + + +# _LT_SHELL_INIT(ARG) +# ------------------- +m4_define([_LT_SHELL_INIT], +[m4_divert_text([M4SH-INIT], [$1 +])])# _LT_SHELL_INIT + + + +# _LT_PROG_ECHO_BACKSLASH +# ----------------------- +# Find how we can fake an echo command that does not interpret backslash. +# In particular, with Autoconf 2.60 or later we add some code to the start +# of the generated configure script which will find a shell with a builtin +# printf (which we can use as an echo command). +m4_defun([_LT_PROG_ECHO_BACKSLASH], +[ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' +ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO +ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO + +AC_MSG_CHECKING([how to print strings]) +# Test print first, because it will be a builtin if present. +if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \ + test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then + ECHO='print -r --' +elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then + ECHO='printf %s\n' +else + # Use this function as a fallback that always works. + func_fallback_echo () + { + eval 'cat <<_LTECHO_EOF +$[]1 +_LTECHO_EOF' + } + ECHO='func_fallback_echo' +fi + +# func_echo_all arg... +# Invoke $ECHO with all args, space-separated. +func_echo_all () +{ + $ECHO "$*" +} + +case "$ECHO" in + printf*) AC_MSG_RESULT([printf]) ;; + print*) AC_MSG_RESULT([print -r]) ;; + *) AC_MSG_RESULT([cat]) ;; +esac + +m4_ifdef([_AS_DETECT_SUGGESTED], +[_AS_DETECT_SUGGESTED([ + test -n "${ZSH_VERSION+set}${BASH_VERSION+set}" || ( + ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' + ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO + ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO + PATH=/empty FPATH=/empty; export PATH FPATH + test "X`printf %s $ECHO`" = "X$ECHO" \ + || test "X`print -r -- $ECHO`" = "X$ECHO" )])]) + +_LT_DECL([], [SHELL], [1], [Shell to use when invoking shell scripts]) +_LT_DECL([], [ECHO], [1], [An echo program that protects backslashes]) +])# _LT_PROG_ECHO_BACKSLASH + + +# _LT_WITH_SYSROOT +# ---------------- +AC_DEFUN([_LT_WITH_SYSROOT], +[AC_MSG_CHECKING([for sysroot]) +AC_ARG_WITH([sysroot], +[ --with-sysroot[=DIR] Search for dependent libraries within DIR + (or the compiler's sysroot if not specified).], +[], [with_sysroot=no]) + +dnl lt_sysroot will always be passed unquoted. We quote it here +dnl in case the user passed a directory name. +lt_sysroot= +case ${with_sysroot} in #( + yes) + if test "$GCC" = yes; then + lt_sysroot=`$CC --print-sysroot 2>/dev/null` + fi + ;; #( + /*) + lt_sysroot=`echo "$with_sysroot" | sed -e "$sed_quote_subst"` + ;; #( + no|'') + ;; #( + *) + AC_MSG_RESULT([${with_sysroot}]) + AC_MSG_ERROR([The sysroot must be an absolute path.]) + ;; +esac + + AC_MSG_RESULT([${lt_sysroot:-no}]) +_LT_DECL([], [lt_sysroot], [0], [The root where to search for ]dnl +[dependent libraries, and in which our libraries should be installed.])]) + +# _LT_ENABLE_LOCK +# --------------- +m4_defun([_LT_ENABLE_LOCK], +[AC_ARG_ENABLE([libtool-lock], + [AS_HELP_STRING([--disable-libtool-lock], + [avoid locking (might break parallel builds)])]) +test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case $host in +ia64-*-hpux*) + # Find out which ABI we are using. + echo 'int i;' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case `/usr/bin/file conftest.$ac_objext` in + *ELF-32*) + HPUX_IA64_MODE="32" + ;; + *ELF-64*) + HPUX_IA64_MODE="64" + ;; + esac + fi + rm -rf conftest* + ;; +*-*-irix6*) + # Find out which ABI we are using. + echo '[#]line '$LINENO' "configure"' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + if test "$lt_cv_prog_gnu_ld" = yes; then + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -melf32bsmip" + ;; + *N32*) + LD="${LD-ld} -melf32bmipn32" + ;; + *64-bit*) + LD="${LD-ld} -melf64bmip" + ;; + esac + else + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + fi + rm -rf conftest* + ;; + +x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \ +s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + # Find out which ABI we are using. + echo 'int i;' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case `/usr/bin/file conftest.o` in + *32-bit*) + case $host in + x86_64-*kfreebsd*-gnu) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) + case `/usr/bin/file conftest.o` in + *x86-64*) + LD="${LD-ld} -m elf32_x86_64" + ;; + *) + LD="${LD-ld} -m elf_i386" + ;; + esac + ;; + powerpc64le-*) + LD="${LD-ld} -m elf32lppclinux" + ;; + powerpc64-*) + LD="${LD-ld} -m elf32ppclinux" + ;; + s390x-*linux*) + LD="${LD-ld} -m elf_s390" + ;; + sparc64-*linux*) + LD="${LD-ld} -m elf32_sparc" + ;; + esac + ;; + *64-bit*) + case $host in + x86_64-*kfreebsd*-gnu) + LD="${LD-ld} -m elf_x86_64_fbsd" + ;; + x86_64-*linux*) + LD="${LD-ld} -m elf_x86_64" + ;; + powerpcle-*) + LD="${LD-ld} -m elf64lppc" + ;; + powerpc-*) + LD="${LD-ld} -m elf64ppc" + ;; + s390*-*linux*|s390*-*tpf*) + LD="${LD-ld} -m elf64_s390" + ;; + sparc*-*linux*) + LD="${LD-ld} -m elf64_sparc" + ;; + esac + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + AC_CACHE_CHECK([whether the C compiler needs -belf], lt_cv_cc_needs_belf, + [AC_LANG_PUSH(C) + AC_LINK_IFELSE([AC_LANG_PROGRAM([[]],[[]])],[lt_cv_cc_needs_belf=yes],[lt_cv_cc_needs_belf=no]) + AC_LANG_POP]) + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; +*-*solaris*) + # Find out which ABI we are using. + echo 'int i;' > conftest.$ac_ext + if AC_TRY_EVAL(ac_compile); then + case `/usr/bin/file conftest.o` in + *64-bit*) + case $lt_cv_prog_gnu_ld in + yes*) + case $host in + i?86-*-solaris*) + LD="${LD-ld} -m elf_x86_64" + ;; + sparc*-*-solaris*) + LD="${LD-ld} -m elf64_sparc" + ;; + esac + # GNU ld 2.21 introduced _sol2 emulations. Use them if available. + if ${LD-ld} -V | grep _sol2 >/dev/null 2>&1; then + LD="${LD-ld}_sol2" + fi + ;; + *) + if ${LD-ld} -64 -r -o conftest2.o conftest.o >/dev/null 2>&1; then + LD="${LD-ld} -64" + fi + ;; + esac + ;; + esac + fi + rm -rf conftest* + ;; +esac + +need_locks="$enable_libtool_lock" +])# _LT_ENABLE_LOCK + + +# _LT_PROG_AR +# ----------- +m4_defun([_LT_PROG_AR], +[AC_CHECK_TOOLS(AR, [ar], false) +: ${AR=ar} +: ${AR_FLAGS=cru} +_LT_DECL([], [AR], [1], [The archiver]) +_LT_DECL([], [AR_FLAGS], [1], [Flags to create an archive]) + +AC_CACHE_CHECK([for archiver @FILE support], [lt_cv_ar_at_file], + [lt_cv_ar_at_file=no + AC_COMPILE_IFELSE([AC_LANG_PROGRAM], + [echo conftest.$ac_objext > conftest.lst + lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&AS_MESSAGE_LOG_FD' + AC_TRY_EVAL([lt_ar_try]) + if test "$ac_status" -eq 0; then + # Ensure the archiver fails upon bogus file names. + rm -f conftest.$ac_objext libconftest.a + AC_TRY_EVAL([lt_ar_try]) + if test "$ac_status" -ne 0; then + lt_cv_ar_at_file=@ + fi + fi + rm -f conftest.* libconftest.a + ]) + ]) + +if test "x$lt_cv_ar_at_file" = xno; then + archiver_list_spec= +else + archiver_list_spec=$lt_cv_ar_at_file +fi +_LT_DECL([], [archiver_list_spec], [1], + [How to feed a file listing to the archiver]) +])# _LT_PROG_AR + + +# _LT_CMD_OLD_ARCHIVE +# ------------------- +m4_defun([_LT_CMD_OLD_ARCHIVE], +[_LT_PROG_AR + +AC_CHECK_TOOL(STRIP, strip, :) +test -z "$STRIP" && STRIP=: +_LT_DECL([], [STRIP], [1], [A symbol stripping program]) + +AC_CHECK_TOOL(RANLIB, ranlib, :) +test -z "$RANLIB" && RANLIB=: +_LT_DECL([], [RANLIB], [1], + [Commands used to install an old-style archive]) + +# Determine commands to create old-style static archives. +old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs' +old_postinstall_cmds='chmod 644 $oldlib' +old_postuninstall_cmds= + +if test -n "$RANLIB"; then + case $host_os in + openbsd*) + old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB -t \$tool_oldlib" + ;; + *) + old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB \$tool_oldlib" + ;; + esac + old_archive_cmds="$old_archive_cmds~\$RANLIB \$tool_oldlib" +fi + +case $host_os in + darwin*) + lock_old_archive_extraction=yes ;; + *) + lock_old_archive_extraction=no ;; +esac +_LT_DECL([], [old_postinstall_cmds], [2]) +_LT_DECL([], [old_postuninstall_cmds], [2]) +_LT_TAGDECL([], [old_archive_cmds], [2], + [Commands used to build an old-style archive]) +_LT_DECL([], [lock_old_archive_extraction], [0], + [Whether to use a lock for old archive extraction]) +])# _LT_CMD_OLD_ARCHIVE + + +# _LT_COMPILER_OPTION(MESSAGE, VARIABLE-NAME, FLAGS, +# [OUTPUT-FILE], [ACTION-SUCCESS], [ACTION-FAILURE]) +# ---------------------------------------------------------------- +# Check whether the given compiler option works +AC_DEFUN([_LT_COMPILER_OPTION], +[m4_require([_LT_FILEUTILS_DEFAULTS])dnl +m4_require([_LT_DECL_SED])dnl +AC_CACHE_CHECK([$1], [$2], + [$2=no + m4_if([$4], , [ac_outfile=conftest.$ac_objext], [ac_outfile=$4]) + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + lt_compiler_flag="$3" + # Insert the option either (1) after the last *FLAGS variable, or + # (2) before a word containing "conftest.", or (3) at the end. + # Note that $ac_compile itself does not contain backslashes and begins + # with a dollar sign (not a hyphen), so the echo should work correctly. + # The option is referenced via a variable to avoid confusing sed. + lt_compile=`echo "$ac_compile" | $SED \ + -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ + -e 's: [[^ ]]*conftest\.: $lt_compiler_flag&:; t' \ + -e 's:$: $lt_compiler_flag:'` + (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&AS_MESSAGE_LOG_FD) + (eval "$lt_compile" 2>conftest.err) + ac_status=$? + cat conftest.err >&AS_MESSAGE_LOG_FD + echo "$as_me:$LINENO: \$? = $ac_status" >&AS_MESSAGE_LOG_FD + if (exit $ac_status) && test -s "$ac_outfile"; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings other than the usual output. + $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp + $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 + if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then + $2=yes + fi + fi + $RM conftest* +]) + +if test x"[$]$2" = xyes; then + m4_if([$5], , :, [$5]) +else + m4_if([$6], , :, [$6]) +fi +])# _LT_COMPILER_OPTION + +# Old name: +AU_ALIAS([AC_LIBTOOL_COMPILER_OPTION], [_LT_COMPILER_OPTION]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_COMPILER_OPTION], []) + + +# _LT_LINKER_OPTION(MESSAGE, VARIABLE-NAME, FLAGS, +# [ACTION-SUCCESS], [ACTION-FAILURE]) +# ---------------------------------------------------- +# Check whether the given linker option works +AC_DEFUN([_LT_LINKER_OPTION], +[m4_require([_LT_FILEUTILS_DEFAULTS])dnl +m4_require([_LT_DECL_SED])dnl +AC_CACHE_CHECK([$1], [$2], + [$2=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS $3" + echo "$lt_simple_link_test_code" > conftest.$ac_ext + if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then + # The linker can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + # Append any errors to the config.log. + cat conftest.err 1>&AS_MESSAGE_LOG_FD + $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp + $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 + if diff conftest.exp conftest.er2 >/dev/null; then + $2=yes + fi + else + $2=yes + fi + fi + $RM -r conftest* + LDFLAGS="$save_LDFLAGS" +]) + +if test x"[$]$2" = xyes; then + m4_if([$4], , :, [$4]) +else + m4_if([$5], , :, [$5]) +fi +])# _LT_LINKER_OPTION + +# Old name: +AU_ALIAS([AC_LIBTOOL_LINKER_OPTION], [_LT_LINKER_OPTION]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_LINKER_OPTION], []) + + +# LT_CMD_MAX_LEN +#--------------- +AC_DEFUN([LT_CMD_MAX_LEN], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +# find the maximum length of command line arguments +AC_MSG_CHECKING([the maximum length of command line arguments]) +AC_CACHE_VAL([lt_cv_sys_max_cmd_len], [dnl + i=0 + teststring="ABCD" + + case $build_os in + msdosdjgpp*) + # On DJGPP, this test can blow up pretty badly due to problems in libc + # (any single argument exceeding 2000 bytes causes a buffer overrun + # during glob expansion). Even if it were fixed, the result of this + # check would be larger than it should be. + lt_cv_sys_max_cmd_len=12288; # 12K is about right + ;; + + gnu*) + # Under GNU Hurd, this test is not required because there is + # no limit to the length of command line arguments. + # Libtool will interpret -1 as no limit whatsoever + lt_cv_sys_max_cmd_len=-1; + ;; + + cygwin* | mingw* | cegcc*) + # On Win9x/ME, this test blows up -- it succeeds, but takes + # about 5 minutes as the teststring grows exponentially. + # Worse, since 9x/ME are not pre-emptively multitasking, + # you end up with a "frozen" computer, even though with patience + # the test eventually succeeds (with a max line length of 256k). + # Instead, let's just punt: use the minimum linelength reported by + # all of the supported platforms: 8192 (on NT/2K/XP). + lt_cv_sys_max_cmd_len=8192; + ;; + + mint*) + # On MiNT this can take a long time and run out of memory. + lt_cv_sys_max_cmd_len=8192; + ;; + + amigaos*) + # On AmigaOS with pdksh, this test takes hours, literally. + # So we just punt and use a minimum line length of 8192. + lt_cv_sys_max_cmd_len=8192; + ;; + + netbsd* | freebsd* | openbsd* | darwin* | dragonfly*) + # This has been around since 386BSD, at least. Likely further. + if test -x /sbin/sysctl; then + lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax` + elif test -x /usr/sbin/sysctl; then + lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax` + else + lt_cv_sys_max_cmd_len=65536 # usable default for all BSDs + fi + # And add a safety zone + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` + ;; + + interix*) + # We know the value 262144 and hardcode it with a safety zone (like BSD) + lt_cv_sys_max_cmd_len=196608 + ;; + + os2*) + # The test takes a long time on OS/2. + lt_cv_sys_max_cmd_len=8192 + ;; + + osf*) + # Dr. Hans Ekkehard Plesser reports seeing a kernel panic running configure + # due to this test when exec_disable_arg_limit is 1 on Tru64. It is not + # nice to cause kernel panics so lets avoid the loop below. + # First set a reasonable default. + lt_cv_sys_max_cmd_len=16384 + # + if test -x /sbin/sysconfig; then + case `/sbin/sysconfig -q proc exec_disable_arg_limit` in + *1*) lt_cv_sys_max_cmd_len=-1 ;; + esac + fi + ;; + sco3.2v5*) + lt_cv_sys_max_cmd_len=102400 + ;; + sysv5* | sco5v6* | sysv4.2uw2*) + kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` + if test -n "$kargmax"; then + lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[[ ]]//'` + else + lt_cv_sys_max_cmd_len=32768 + fi + ;; + *) + lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` + if test -n "$lt_cv_sys_max_cmd_len" && \ + test undefined != "$lt_cv_sys_max_cmd_len"; then + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` + else + # Make teststring a little bigger before we do anything with it. + # a 1K string should be a reasonable start. + for i in 1 2 3 4 5 6 7 8 ; do + teststring=$teststring$teststring + done + SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} + # If test is not a shell built-in, we'll probably end up computing a + # maximum length that is only half of the actual maximum length, but + # we can't tell. + while { test "X"`env echo "$teststring$teststring" 2>/dev/null` \ + = "X$teststring$teststring"; } >/dev/null 2>&1 && + test $i != 17 # 1/2 MB should be enough + do + i=`expr $i + 1` + teststring=$teststring$teststring + done + # Only check the string length outside the loop. + lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` + teststring= + # Add a significant safety factor because C++ compilers can tack on + # massive amounts of additional arguments before passing them to the + # linker. It appears as though 1/2 is a usable value. + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` + fi + ;; + esac +]) +if test -n $lt_cv_sys_max_cmd_len ; then + AC_MSG_RESULT($lt_cv_sys_max_cmd_len) +else + AC_MSG_RESULT(none) +fi +max_cmd_len=$lt_cv_sys_max_cmd_len +_LT_DECL([], [max_cmd_len], [0], + [What is the maximum length of a command?]) +])# LT_CMD_MAX_LEN + +# Old name: +AU_ALIAS([AC_LIBTOOL_SYS_MAX_CMD_LEN], [LT_CMD_MAX_LEN]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_SYS_MAX_CMD_LEN], []) + + +# _LT_HEADER_DLFCN +# ---------------- +m4_defun([_LT_HEADER_DLFCN], +[AC_CHECK_HEADERS([dlfcn.h], [], [], [AC_INCLUDES_DEFAULT])dnl +])# _LT_HEADER_DLFCN + + +# _LT_TRY_DLOPEN_SELF (ACTION-IF-TRUE, ACTION-IF-TRUE-W-USCORE, +# ACTION-IF-FALSE, ACTION-IF-CROSS-COMPILING) +# ---------------------------------------------------------------- +m4_defun([_LT_TRY_DLOPEN_SELF], +[m4_require([_LT_HEADER_DLFCN])dnl +if test "$cross_compiling" = yes; then : + [$4] +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +[#line $LINENO "configure" +#include "confdefs.h" + +#if HAVE_DLFCN_H +#include +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +/* When -fvisbility=hidden is used, assume the code has been annotated + correspondingly for the symbols needed. */ +#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) +int fnord () __attribute__((visibility("default"))); +#endif + +int fnord () { return 42; } +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else + { + if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + else puts (dlerror ()); + } + /* dlclose (self); */ + } + else + puts (dlerror ()); + + return status; +}] +_LT_EOF + if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) >&AS_MESSAGE_LOG_FD 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) $1 ;; + x$lt_dlneed_uscore) $2 ;; + x$lt_dlunknown|x*) $3 ;; + esac + else : + # compilation failed + $3 + fi +fi +rm -fr conftest* +])# _LT_TRY_DLOPEN_SELF + + +# LT_SYS_DLOPEN_SELF +# ------------------ +AC_DEFUN([LT_SYS_DLOPEN_SELF], +[m4_require([_LT_HEADER_DLFCN])dnl +if test "x$enable_dlopen" != xyes; then + enable_dlopen=unknown + enable_dlopen_self=unknown + enable_dlopen_self_static=unknown +else + lt_cv_dlopen=no + lt_cv_dlopen_libs= + + case $host_os in + beos*) + lt_cv_dlopen="load_add_on" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ;; + + mingw* | pw32* | cegcc*) + lt_cv_dlopen="LoadLibrary" + lt_cv_dlopen_libs= + ;; + + cygwin*) + lt_cv_dlopen="dlopen" + lt_cv_dlopen_libs= + ;; + + darwin*) + # if libdl is installed we need to link against it + AC_CHECK_LIB([dl], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"],[ + lt_cv_dlopen="dyld" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ]) + ;; + + *) + AC_CHECK_FUNC([shl_load], + [lt_cv_dlopen="shl_load"], + [AC_CHECK_LIB([dld], [shl_load], + [lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-ldld"], + [AC_CHECK_FUNC([dlopen], + [lt_cv_dlopen="dlopen"], + [AC_CHECK_LIB([dl], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl"], + [AC_CHECK_LIB([svld], [dlopen], + [lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld"], + [AC_CHECK_LIB([dld], [dld_link], + [lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-ldld"]) + ]) + ]) + ]) + ]) + ]) + ;; + esac + + if test "x$lt_cv_dlopen" != xno; then + enable_dlopen=yes + else + enable_dlopen=no + fi + + case $lt_cv_dlopen in + dlopen) + save_CPPFLAGS="$CPPFLAGS" + test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" + + save_LDFLAGS="$LDFLAGS" + wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" + + save_LIBS="$LIBS" + LIBS="$lt_cv_dlopen_libs $LIBS" + + AC_CACHE_CHECK([whether a program can dlopen itself], + lt_cv_dlopen_self, [dnl + _LT_TRY_DLOPEN_SELF( + lt_cv_dlopen_self=yes, lt_cv_dlopen_self=yes, + lt_cv_dlopen_self=no, lt_cv_dlopen_self=cross) + ]) + + if test "x$lt_cv_dlopen_self" = xyes; then + wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $lt_prog_compiler_static\" + AC_CACHE_CHECK([whether a statically linked program can dlopen itself], + lt_cv_dlopen_self_static, [dnl + _LT_TRY_DLOPEN_SELF( + lt_cv_dlopen_self_static=yes, lt_cv_dlopen_self_static=yes, + lt_cv_dlopen_self_static=no, lt_cv_dlopen_self_static=cross) + ]) + fi + + CPPFLAGS="$save_CPPFLAGS" + LDFLAGS="$save_LDFLAGS" + LIBS="$save_LIBS" + ;; + esac + + case $lt_cv_dlopen_self in + yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; + *) enable_dlopen_self=unknown ;; + esac + + case $lt_cv_dlopen_self_static in + yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; + *) enable_dlopen_self_static=unknown ;; + esac +fi +_LT_DECL([dlopen_support], [enable_dlopen], [0], + [Whether dlopen is supported]) +_LT_DECL([dlopen_self], [enable_dlopen_self], [0], + [Whether dlopen of programs is supported]) +_LT_DECL([dlopen_self_static], [enable_dlopen_self_static], [0], + [Whether dlopen of statically linked programs is supported]) +])# LT_SYS_DLOPEN_SELF + +# Old name: +AU_ALIAS([AC_LIBTOOL_DLOPEN_SELF], [LT_SYS_DLOPEN_SELF]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_DLOPEN_SELF], []) + + +# _LT_COMPILER_C_O([TAGNAME]) +# --------------------------- +# Check to see if options -c and -o are simultaneously supported by compiler. +# This macro does not hard code the compiler like AC_PROG_CC_C_O. +m4_defun([_LT_COMPILER_C_O], +[m4_require([_LT_DECL_SED])dnl +m4_require([_LT_FILEUTILS_DEFAULTS])dnl +m4_require([_LT_TAG_COMPILER])dnl +AC_CACHE_CHECK([if $compiler supports -c -o file.$ac_objext], + [_LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)], + [_LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)=no + $RM -r conftest 2>/dev/null + mkdir conftest + cd conftest + mkdir out + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + + lt_compiler_flag="-o out/conftest2.$ac_objext" + # Insert the option either (1) after the last *FLAGS variable, or + # (2) before a word containing "conftest.", or (3) at the end. + # Note that $ac_compile itself does not contain backslashes and begins + # with a dollar sign (not a hyphen), so the echo should work correctly. + lt_compile=`echo "$ac_compile" | $SED \ + -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ + -e 's: [[^ ]]*conftest\.: $lt_compiler_flag&:; t' \ + -e 's:$: $lt_compiler_flag:'` + (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&AS_MESSAGE_LOG_FD) + (eval "$lt_compile" 2>out/conftest.err) + ac_status=$? + cat out/conftest.err >&AS_MESSAGE_LOG_FD + echo "$as_me:$LINENO: \$? = $ac_status" >&AS_MESSAGE_LOG_FD + if (exit $ac_status) && test -s out/conftest2.$ac_objext + then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp + $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2 + if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then + _LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)=yes + fi + fi + chmod u+w . 2>&AS_MESSAGE_LOG_FD + $RM conftest* + # SGI C++ compiler will create directory out/ii_files/ for + # template instantiation + test -d out/ii_files && $RM out/ii_files/* && rmdir out/ii_files + $RM out/* && rmdir out + cd .. + $RM -r conftest + $RM conftest* +]) +_LT_TAGDECL([compiler_c_o], [lt_cv_prog_compiler_c_o], [1], + [Does compiler simultaneously support -c and -o options?]) +])# _LT_COMPILER_C_O + + +# _LT_COMPILER_FILE_LOCKS([TAGNAME]) +# ---------------------------------- +# Check to see if we can do hard links to lock some files if needed +m4_defun([_LT_COMPILER_FILE_LOCKS], +[m4_require([_LT_ENABLE_LOCK])dnl +m4_require([_LT_FILEUTILS_DEFAULTS])dnl +_LT_COMPILER_C_O([$1]) + +hard_links="nottested" +if test "$_LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)" = no && test "$need_locks" != no; then + # do not overwrite the value of need_locks provided by the user + AC_MSG_CHECKING([if we can lock with hard links]) + hard_links=yes + $RM conftest* + ln conftest.a conftest.b 2>/dev/null && hard_links=no + touch conftest.a + ln conftest.a conftest.b 2>&5 || hard_links=no + ln conftest.a conftest.b 2>/dev/null && hard_links=no + AC_MSG_RESULT([$hard_links]) + if test "$hard_links" = no; then + AC_MSG_WARN([`$CC' does not support `-c -o', so `make -j' may be unsafe]) + need_locks=warn + fi +else + need_locks=no +fi +_LT_DECL([], [need_locks], [1], [Must we lock files when doing compilation?]) +])# _LT_COMPILER_FILE_LOCKS + + +# _LT_CHECK_OBJDIR +# ---------------- +m4_defun([_LT_CHECK_OBJDIR], +[AC_CACHE_CHECK([for objdir], [lt_cv_objdir], +[rm -f .libs 2>/dev/null +mkdir .libs 2>/dev/null +if test -d .libs; then + lt_cv_objdir=.libs +else + # MS-DOS does not allow filenames that begin with a dot. + lt_cv_objdir=_libs +fi +rmdir .libs 2>/dev/null]) +objdir=$lt_cv_objdir +_LT_DECL([], [objdir], [0], + [The name of the directory that contains temporary libtool files])dnl +m4_pattern_allow([LT_OBJDIR])dnl +AC_DEFINE_UNQUOTED(LT_OBJDIR, "$lt_cv_objdir/", + [Define to the sub-directory in which libtool stores uninstalled libraries.]) +])# _LT_CHECK_OBJDIR + + +# _LT_LINKER_HARDCODE_LIBPATH([TAGNAME]) +# -------------------------------------- +# Check hardcoding attributes. +m4_defun([_LT_LINKER_HARDCODE_LIBPATH], +[AC_MSG_CHECKING([how to hardcode library paths into programs]) +_LT_TAGVAR(hardcode_action, $1)= +if test -n "$_LT_TAGVAR(hardcode_libdir_flag_spec, $1)" || + test -n "$_LT_TAGVAR(runpath_var, $1)" || + test "X$_LT_TAGVAR(hardcode_automatic, $1)" = "Xyes" ; then + + # We can hardcode non-existent directories. + if test "$_LT_TAGVAR(hardcode_direct, $1)" != no && + # If the only mechanism to avoid hardcoding is shlibpath_var, we + # have to relink, otherwise we might link with an installed library + # when we should be linking with a yet-to-be-installed one + ## test "$_LT_TAGVAR(hardcode_shlibpath_var, $1)" != no && + test "$_LT_TAGVAR(hardcode_minus_L, $1)" != no; then + # Linking always hardcodes the temporary library directory. + _LT_TAGVAR(hardcode_action, $1)=relink + else + # We can link without hardcoding, and we can hardcode nonexisting dirs. + _LT_TAGVAR(hardcode_action, $1)=immediate + fi +else + # We cannot hardcode anything, or else we can only hardcode existing + # directories. + _LT_TAGVAR(hardcode_action, $1)=unsupported +fi +AC_MSG_RESULT([$_LT_TAGVAR(hardcode_action, $1)]) + +if test "$_LT_TAGVAR(hardcode_action, $1)" = relink || + test "$_LT_TAGVAR(inherit_rpath, $1)" = yes; then + # Fast installation is not supported + enable_fast_install=no +elif test "$shlibpath_overrides_runpath" = yes || + test "$enable_shared" = no; then + # Fast installation is not necessary + enable_fast_install=needless +fi +_LT_TAGDECL([], [hardcode_action], [0], + [How to hardcode a shared library path into an executable]) +])# _LT_LINKER_HARDCODE_LIBPATH + + +# _LT_CMD_STRIPLIB +# ---------------- +m4_defun([_LT_CMD_STRIPLIB], +[m4_require([_LT_DECL_EGREP]) +striplib= +old_striplib= +AC_MSG_CHECKING([whether stripping libraries is possible]) +if test -n "$STRIP" && $STRIP -V 2>&1 | $GREP "GNU strip" >/dev/null; then + test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" + test -z "$striplib" && striplib="$STRIP --strip-unneeded" + AC_MSG_RESULT([yes]) +else +# FIXME - insert some real tests, host_os isn't really good enough + case $host_os in + darwin*) + if test -n "$STRIP" ; then + striplib="$STRIP -x" + old_striplib="$STRIP -S" + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([no]) + fi + ;; + *) + AC_MSG_RESULT([no]) + ;; + esac +fi +_LT_DECL([], [old_striplib], [1], [Commands to strip libraries]) +_LT_DECL([], [striplib], [1]) +])# _LT_CMD_STRIPLIB + + +# _LT_SYS_DYNAMIC_LINKER([TAG]) +# ----------------------------- +# PORTME Fill in your ld.so characteristics +m4_defun([_LT_SYS_DYNAMIC_LINKER], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +m4_require([_LT_DECL_EGREP])dnl +m4_require([_LT_FILEUTILS_DEFAULTS])dnl +m4_require([_LT_DECL_OBJDUMP])dnl +m4_require([_LT_DECL_SED])dnl +m4_require([_LT_CHECK_SHELL_FEATURES])dnl +AC_MSG_CHECKING([dynamic linker characteristics]) +m4_if([$1], + [], [ +if test "$GCC" = yes; then + case $host_os in + darwin*) lt_awk_arg="/^libraries:/,/LR/" ;; + *) lt_awk_arg="/^libraries:/" ;; + esac + case $host_os in + mingw* | cegcc*) lt_sed_strip_eq="s,=\([[A-Za-z]]:\),\1,g" ;; + *) lt_sed_strip_eq="s,=/,/,g" ;; + esac + lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq` + case $lt_search_path_spec in + *\;*) + # if the path contains ";" then we assume it to be the separator + # otherwise default to the standard path separator (i.e. ":") - it is + # assumed that no part of a normal pathname contains ";" but that should + # okay in the real world where ";" in dirpaths is itself problematic. + lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'` + ;; + *) + lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"` + ;; + esac + # Ok, now we have the path, separated by spaces, we can step through it + # and add multilib dir if necessary. + lt_tmp_lt_search_path_spec= + lt_multi_os_dir=`$CC $CPPFLAGS $CFLAGS $LDFLAGS -print-multi-os-directory 2>/dev/null` + for lt_sys_path in $lt_search_path_spec; do + if test -d "$lt_sys_path/$lt_multi_os_dir"; then + lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path/$lt_multi_os_dir" + else + test -d "$lt_sys_path" && \ + lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path" + fi + done + lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk ' +BEGIN {RS=" "; FS="/|\n";} { + lt_foo=""; + lt_count=0; + for (lt_i = NF; lt_i > 0; lt_i--) { + if ($lt_i != "" && $lt_i != ".") { + if ($lt_i == "..") { + lt_count++; + } else { + if (lt_count == 0) { + lt_foo="/" $lt_i lt_foo; + } else { + lt_count--; + } + } + } + } + if (lt_foo != "") { lt_freq[[lt_foo]]++; } + if (lt_freq[[lt_foo]] == 1) { print lt_foo; } +}'` + # AWK program above erroneously prepends '/' to C:/dos/paths + # for these hosts. + case $host_os in + mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\ + $SED 's,/\([[A-Za-z]]:\),\1,g'` ;; + esac + sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP` +else + sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" +fi]) +library_names_spec= +libname_spec='lib$name' +soname_spec= +shrext_cmds=".so" +postinstall_cmds= +postuninstall_cmds= +finish_cmds= +finish_eval= +shlibpath_var= +shlibpath_overrides_runpath=unknown +version_type=none +dynamic_linker="$host_os ld.so" +sys_lib_dlsearch_path_spec="/lib /usr/lib" +need_lib_prefix=unknown +hardcode_into_libs=no + +# when you set need_version to no, make sure it does not cause -set_version +# flags to be left without arguments +need_version=unknown + +case $host_os in +aix3*) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix $libname.a' + shlibpath_var=LIBPATH + + # AIX 3 has no versioning support, so we append a major version to the name. + soname_spec='${libname}${release}${shared_ext}$major' + ;; + +aix[[4-9]]*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + hardcode_into_libs=yes + if test "$host_cpu" = ia64; then + # AIX 5 supports IA64 + library_names_spec='${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext}$versuffix $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + else + # With GCC up to 2.95.x, collect2 would create an import file + # for dependence libraries. The import file would start with + # the line `#! .'. This would cause the generated library to + # depend on `.', always an invalid library. This was fixed in + # development snapshots of GCC prior to 3.0. + case $host_os in + aix4 | aix4.[[01]] | aix4.[[01]].*) + if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' + echo ' yes ' + echo '#endif'; } | ${CC} -E - | $GREP yes > /dev/null; then + : + else + can_build_shared=no + fi + ;; + esac + # AIX (on Power*) has no versioning support, so currently we can not hardcode correct + # soname into executable. Probably we can add versioning support to + # collect2, so additional links can be useful in future. + if test "$aix_use_runtimelinking" = yes; then + # If using run time linking (on AIX 4.2 or later) use lib.so + # instead of lib.a to let people know that these are not + # typical AIX shared libraries. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + else + # We preserve .a as extension for shared libraries through AIX4.2 + # and later when we are not doing run time linking. + library_names_spec='${libname}${release}.a $libname.a' + soname_spec='${libname}${release}${shared_ext}$major' + fi + shlibpath_var=LIBPATH + fi + ;; + +amigaos*) + case $host_cpu in + powerpc) + # Since July 2007 AmigaOS4 officially supports .so libraries. + # When compiling the executable, add -use-dynld -Lsobjs: to the compileline. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + ;; + m68k) + library_names_spec='$libname.ixlibrary $libname.a' + # Create ${libname}_ixlibrary.a entries in /sys/libs. + finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([[^/]]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done' + ;; + esac + ;; + +beos*) + library_names_spec='${libname}${shared_ext}' + dynamic_linker="$host_os ld.so" + shlibpath_var=LIBRARY_PATH + ;; + +bsdi[[45]]*) + version_type=linux # correct to gnu/linux during the next big refactor + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" + sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" + # the default ld.so.conf also contains /usr/contrib/lib and + # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow + # libtool to hard-code these into programs + ;; + +cygwin* | mingw* | pw32* | cegcc*) + version_type=windows + shrext_cmds=".dll" + need_version=no + need_lib_prefix=no + + case $GCC,$cc_basename in + yes,*) + # gcc + library_names_spec='$libname.dll.a' + # DLL is installed to $(libdir)/../bin by postinstall_cmds + postinstall_cmds='base_file=`basename \${file}`~ + dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog $dir/$dlname \$dldir/$dlname~ + chmod a+x \$dldir/$dlname~ + if test -n '\''$stripme'\'' && test -n '\''$striplib'\''; then + eval '\''$striplib \$dldir/$dlname'\'' || exit \$?; + fi' + postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $RM \$dlpath' + shlibpath_overrides_runpath=yes + + case $host_os in + cygwin*) + # Cygwin DLLs use 'cyg' prefix rather than 'lib' + soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}' +m4_if([$1], [],[ + sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"]) + ;; + mingw* | cegcc*) + # MinGW DLLs use traditional 'lib' prefix + soname_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}' + ;; + pw32*) + # pw32 DLLs use 'pw' prefix rather than 'lib' + library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}' + ;; + esac + dynamic_linker='Win32 ld.exe' + ;; + + *,cl*) + # Native MSVC + libname_spec='$name' + soname_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}' + library_names_spec='${libname}.dll.lib' + + case $build_os in + mingw*) + sys_lib_search_path_spec= + lt_save_ifs=$IFS + IFS=';' + for lt_path in $LIB + do + IFS=$lt_save_ifs + # Let DOS variable expansion print the short 8.3 style file name. + lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"` + sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path" + done + IFS=$lt_save_ifs + # Convert to MSYS style. + sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([[a-zA-Z]]\\):| /\\1|g' -e 's|^ ||'` + ;; + cygwin*) + # Convert to unix form, then to dos form, then back to unix form + # but this time dos style (no spaces!) so that the unix form looks + # like /cygdrive/c/PROGRA~1:/cygdr... + sys_lib_search_path_spec=`cygpath --path --unix "$LIB"` + sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null` + sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"` + ;; + *) + sys_lib_search_path_spec="$LIB" + if $ECHO "$sys_lib_search_path_spec" | [$GREP ';[c-zC-Z]:/' >/dev/null]; then + # It is most probably a Windows format PATH. + sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'` + else + sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"` + fi + # FIXME: find the short name or the path components, as spaces are + # common. (e.g. "Program Files" -> "PROGRA~1") + ;; + esac + + # DLL is installed to $(libdir)/../bin by postinstall_cmds + postinstall_cmds='base_file=`basename \${file}`~ + dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog $dir/$dlname \$dldir/$dlname' + postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $RM \$dlpath' + shlibpath_overrides_runpath=yes + dynamic_linker='Win32 link.exe' + ;; + + *) + # Assume MSVC wrapper + library_names_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext} $libname.lib' + dynamic_linker='Win32 ld.exe' + ;; + esac + # FIXME: first we should search . and the directory the executable is in + shlibpath_var=PATH + ;; + +darwin* | rhapsody*) + dynamic_linker="$host_os dyld" + version_type=darwin + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${major}$shared_ext ${libname}$shared_ext' + soname_spec='${libname}${release}${major}$shared_ext' + shlibpath_overrides_runpath=yes + shlibpath_var=DYLD_LIBRARY_PATH + shrext_cmds='`test .$module = .yes && echo .so || echo .dylib`' +m4_if([$1], [],[ + sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/local/lib"]) + sys_lib_dlsearch_path_spec='/usr/local/lib /lib /usr/lib' + ;; + +dgux*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname$shared_ext' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +freebsd* | dragonfly*) + # DragonFly does not have aout. When/if they implement a new + # versioning mechanism, adjust this. + if test -x /usr/bin/objformat; then + objformat=`/usr/bin/objformat` + else + case $host_os in + freebsd[[23]].*) objformat=aout ;; + *) objformat=elf ;; + esac + fi + version_type=freebsd-$objformat + case $version_type in + freebsd-elf*) + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext} $libname${shared_ext}' + need_version=no + need_lib_prefix=no + ;; + freebsd-*) + library_names_spec='${libname}${release}${shared_ext}$versuffix $libname${shared_ext}$versuffix' + need_version=yes + ;; + esac + shlibpath_var=LD_LIBRARY_PATH + case $host_os in + freebsd2.*) + shlibpath_overrides_runpath=yes + ;; + freebsd3.[[01]]* | freebsdelf3.[[01]]*) + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + freebsd3.[[2-9]]* | freebsdelf3.[[2-9]]* | \ + freebsd4.[[0-5]] | freebsdelf4.[[0-5]] | freebsd4.1.1 | freebsdelf4.1.1) + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + *) # from 4.6 on, and DragonFly + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + esac + ;; + +haiku*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + dynamic_linker="$host_os runtime_loader" + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LIBRARY_PATH + shlibpath_overrides_runpath=yes + sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib' + hardcode_into_libs=yes + ;; + +hpux9* | hpux10* | hpux11*) + # Give a soname corresponding to the major version so that dld.sl refuses to + # link against other versions. + version_type=sunos + need_lib_prefix=no + need_version=no + case $host_cpu in + ia64*) + shrext_cmds='.so' + hardcode_into_libs=yes + dynamic_linker="$host_os dld.so" + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + if test "X$HPUX_IA64_MODE" = X32; then + sys_lib_search_path_spec="/usr/lib/hpux32 /usr/local/lib/hpux32 /usr/local/lib" + else + sys_lib_search_path_spec="/usr/lib/hpux64 /usr/local/lib/hpux64" + fi + sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec + ;; + hppa*64*) + shrext_cmds='.sl' + hardcode_into_libs=yes + dynamic_linker="$host_os dld.sl" + shlibpath_var=LD_LIBRARY_PATH # How should we handle SHLIB_PATH + shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + sys_lib_search_path_spec="/usr/lib/pa20_64 /usr/ccs/lib/pa20_64" + sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec + ;; + *) + shrext_cmds='.sl' + dynamic_linker="$host_os dld.sl" + shlibpath_var=SHLIB_PATH + shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + ;; + esac + # HP-UX runs *really* slowly unless shared libraries are mode 555, ... + postinstall_cmds='chmod 555 $lib' + # or fails outright, so override atomically: + install_override_mode=555 + ;; + +interix[[3-9]]*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + nonstopux*) version_type=nonstopux ;; + *) + if test "$lt_cv_prog_gnu_ld" = yes; then + version_type=linux # correct to gnu/linux during the next big refactor + else + version_type=irix + fi ;; + esac + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}${shared_ext}$major' + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext} $libname${shared_ext}' + case $host_os in + irix5* | nonstopux*) + libsuff= shlibsuff= + ;; + *) + case $LD in # libtool.m4 will add one of these switches to LD + *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") + libsuff= shlibsuff= libmagic=32-bit;; + *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") + libsuff=32 shlibsuff=N32 libmagic=N32;; + *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") + libsuff=64 shlibsuff=64 libmagic=64-bit;; + *) libsuff= shlibsuff= libmagic=never-match;; + esac + ;; + esac + shlibpath_var=LD_LIBRARY${shlibsuff}_PATH + shlibpath_overrides_runpath=no + sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" + sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" + hardcode_into_libs=yes + ;; + +# No shared lib support for Linux oldld, aout, or coff. +linux*oldld* | linux*aout* | linux*coff*) + dynamic_linker=no + ;; + +# This must be glibc/ELF. +linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + + # Some binutils ld are patched to set DT_RUNPATH + AC_CACHE_VAL([lt_cv_shlibpath_overrides_runpath], + [lt_cv_shlibpath_overrides_runpath=no + save_LDFLAGS=$LDFLAGS + save_libdir=$libdir + eval "libdir=/foo; wl=\"$_LT_TAGVAR(lt_prog_compiler_wl, $1)\"; \ + LDFLAGS=\"\$LDFLAGS $_LT_TAGVAR(hardcode_libdir_flag_spec, $1)\"" + AC_LINK_IFELSE([AC_LANG_PROGRAM([],[])], + [AS_IF([ ($OBJDUMP -p conftest$ac_exeext) 2>/dev/null | grep "RUNPATH.*$libdir" >/dev/null], + [lt_cv_shlibpath_overrides_runpath=yes])]) + LDFLAGS=$save_LDFLAGS + libdir=$save_libdir + ]) + shlibpath_overrides_runpath=$lt_cv_shlibpath_overrides_runpath + + # This implies no fast_install, which is unacceptable. + # Some rework will be needed to allow for fast_install + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \[$]2)); skip = 1; } { if (!skip) print \[$]0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` + sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on + # powerpc, because MkLinux only supported shared libraries with the + # GNU dynamic linker. Since this was broken with cross compilers, + # most powerpc-linux boxes support dynamic linking these days and + # people can always --disable-shared, the test was removed, and we + # assume the GNU/Linux dynamic linker is in use. + dynamic_linker='GNU/Linux ld.so' + ;; + +netbsdelf*-gnu) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + dynamic_linker='NetBSD ld.elf_so' + ;; + +netbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + dynamic_linker='NetBSD (a.out) ld.so' + else + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + dynamic_linker='NetBSD ld.elf_so' + fi + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + +newsos6) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + ;; + +*nto* | *qnx*) + version_type=qnx + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + dynamic_linker='ldqnx.so' + ;; + +openbsd*) + version_type=sunos + sys_lib_dlsearch_path_spec="/usr/lib" + need_lib_prefix=no + # Some older versions of OpenBSD (3.3 at least) *do* need versioned libs. + case $host_os in + openbsd3.3 | openbsd3.3.*) need_version=yes ;; + *) need_version=no ;; + esac + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + shlibpath_var=LD_LIBRARY_PATH + if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + case $host_os in + openbsd2.[[89]] | openbsd2.[[89]].*) + shlibpath_overrides_runpath=no + ;; + *) + shlibpath_overrides_runpath=yes + ;; + esac + else + shlibpath_overrides_runpath=yes + fi + ;; + +os2*) + libname_spec='$name' + shrext_cmds=".dll" + need_lib_prefix=no + library_names_spec='$libname${shared_ext} $libname.a' + dynamic_linker='OS/2 ld.exe' + shlibpath_var=LIBPATH + ;; + +osf3* | osf4* | osf5*) + version_type=osf + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}${shared_ext}$major' + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" + sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec" + ;; + +rdos*) + dynamic_linker=no + ;; + +solaris*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + # ldd complains unless libraries are executable + postinstall_cmds='chmod +x $lib' + ;; + +sunos4*) + version_type=sunos + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix' + finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + if test "$with_gnu_ld" = yes; then + need_lib_prefix=no + fi + need_version=yes + ;; + +sysv4 | sysv4.3*) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + case $host_vendor in + sni) + shlibpath_overrides_runpath=no + need_lib_prefix=no + runpath_var=LD_RUN_PATH + ;; + siemens) + need_lib_prefix=no + ;; + motorola) + need_lib_prefix=no + need_version=no + shlibpath_overrides_runpath=no + sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' + ;; + esac + ;; + +sysv4*MP*) + if test -d /usr/nec ;then + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='$libname${shared_ext}.$versuffix $libname${shared_ext}.$major $libname${shared_ext}' + soname_spec='$libname${shared_ext}.$major' + shlibpath_var=LD_LIBRARY_PATH + fi + ;; + +sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) + version_type=freebsd-elf + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext} $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + if test "$with_gnu_ld" = yes; then + sys_lib_search_path_spec='/usr/local/lib /usr/gnu/lib /usr/ccs/lib /usr/lib /lib' + else + sys_lib_search_path_spec='/usr/ccs/lib /usr/lib' + case $host_os in + sco3.2v5*) + sys_lib_search_path_spec="$sys_lib_search_path_spec /lib" + ;; + esac + fi + sys_lib_dlsearch_path_spec='/usr/lib' + ;; + +tpf*) + # TPF is a cross-target only. Preferred cross-host = GNU/Linux. + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + +uts4*) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +*) + dynamic_linker=no + ;; +esac +AC_MSG_RESULT([$dynamic_linker]) +test "$dynamic_linker" = no && can_build_shared=no + +variables_saved_for_relink="PATH $shlibpath_var $runpath_var" +if test "$GCC" = yes; then + variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" +fi + +if test "${lt_cv_sys_lib_search_path_spec+set}" = set; then + sys_lib_search_path_spec="$lt_cv_sys_lib_search_path_spec" +fi +if test "${lt_cv_sys_lib_dlsearch_path_spec+set}" = set; then + sys_lib_dlsearch_path_spec="$lt_cv_sys_lib_dlsearch_path_spec" +fi + +_LT_DECL([], [variables_saved_for_relink], [1], + [Variables whose values should be saved in libtool wrapper scripts and + restored at link time]) +_LT_DECL([], [need_lib_prefix], [0], + [Do we need the "lib" prefix for modules?]) +_LT_DECL([], [need_version], [0], [Do we need a version for libraries?]) +_LT_DECL([], [version_type], [0], [Library versioning type]) +_LT_DECL([], [runpath_var], [0], [Shared library runtime path variable]) +_LT_DECL([], [shlibpath_var], [0],[Shared library path variable]) +_LT_DECL([], [shlibpath_overrides_runpath], [0], + [Is shlibpath searched before the hard-coded library search path?]) +_LT_DECL([], [libname_spec], [1], [Format of library name prefix]) +_LT_DECL([], [library_names_spec], [1], + [[List of archive names. First name is the real one, the rest are links. + The last name is the one that the linker finds with -lNAME]]) +_LT_DECL([], [soname_spec], [1], + [[The coded name of the library, if different from the real name]]) +_LT_DECL([], [install_override_mode], [1], + [Permission mode override for installation of shared libraries]) +_LT_DECL([], [postinstall_cmds], [2], + [Command to use after installation of a shared archive]) +_LT_DECL([], [postuninstall_cmds], [2], + [Command to use after uninstallation of a shared archive]) +_LT_DECL([], [finish_cmds], [2], + [Commands used to finish a libtool library installation in a directory]) +_LT_DECL([], [finish_eval], [1], + [[As "finish_cmds", except a single script fragment to be evaled but + not shown]]) +_LT_DECL([], [hardcode_into_libs], [0], + [Whether we should hardcode library paths into libraries]) +_LT_DECL([], [sys_lib_search_path_spec], [2], + [Compile-time system search path for libraries]) +_LT_DECL([], [sys_lib_dlsearch_path_spec], [2], + [Run-time system search path for libraries]) +])# _LT_SYS_DYNAMIC_LINKER + + +# _LT_PATH_TOOL_PREFIX(TOOL) +# -------------------------- +# find a file program which can recognize shared library +AC_DEFUN([_LT_PATH_TOOL_PREFIX], +[m4_require([_LT_DECL_EGREP])dnl +AC_MSG_CHECKING([for $1]) +AC_CACHE_VAL(lt_cv_path_MAGIC_CMD, +[case $MAGIC_CMD in +[[\\/*] | ?:[\\/]*]) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; +*) + lt_save_MAGIC_CMD="$MAGIC_CMD" + lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR +dnl $ac_dummy forces splitting on constant user-supplied paths. +dnl POSIX.2 word splitting is done only on the output of word expansions, +dnl not every word. This closes a longstanding sh security hole. + ac_dummy="m4_if([$2], , $PATH, [$2])" + for ac_dir in $ac_dummy; do + IFS="$lt_save_ifs" + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/$1; then + lt_cv_path_MAGIC_CMD="$ac_dir/$1" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex=`expr "$deplibs_check_method" : "file_magic \(.*\)"` + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + $EGREP "$file_magic_regex" > /dev/null; then + : + else + cat <<_LT_EOF 1>&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +_LT_EOF + fi ;; + esac + fi + break + fi + done + IFS="$lt_save_ifs" + MAGIC_CMD="$lt_save_MAGIC_CMD" + ;; +esac]) +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + AC_MSG_RESULT($MAGIC_CMD) +else + AC_MSG_RESULT(no) +fi +_LT_DECL([], [MAGIC_CMD], [0], + [Used to examine libraries when file_magic_cmd begins with "file"])dnl +])# _LT_PATH_TOOL_PREFIX + +# Old name: +AU_ALIAS([AC_PATH_TOOL_PREFIX], [_LT_PATH_TOOL_PREFIX]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_PATH_TOOL_PREFIX], []) + + +# _LT_PATH_MAGIC +# -------------- +# find a file program which can recognize a shared library +m4_defun([_LT_PATH_MAGIC], +[_LT_PATH_TOOL_PREFIX(${ac_tool_prefix}file, /usr/bin$PATH_SEPARATOR$PATH) +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + _LT_PATH_TOOL_PREFIX(file, /usr/bin$PATH_SEPARATOR$PATH) + else + MAGIC_CMD=: + fi +fi +])# _LT_PATH_MAGIC + + +# LT_PATH_LD +# ---------- +# find the pathname to the GNU or non-GNU linker +AC_DEFUN([LT_PATH_LD], +[AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +m4_require([_LT_DECL_SED])dnl +m4_require([_LT_DECL_EGREP])dnl +m4_require([_LT_PROG_ECHO_BACKSLASH])dnl + +AC_ARG_WITH([gnu-ld], + [AS_HELP_STRING([--with-gnu-ld], + [assume the C compiler uses GNU ld @<:@default=no@:>@])], + [test "$withval" = no || with_gnu_ld=yes], + [with_gnu_ld=no])dnl + +ac_prog=ld +if test "$GCC" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + AC_MSG_CHECKING([for ld used by $CC]) + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case $ac_prog in + # Accept absolute paths. + [[\\/]]* | ?:[[\\/]]*) + re_direlt='/[[^/]][[^/]]*/\.\./' + # Canonicalize the pathname of ld + ac_prog=`$ECHO "$ac_prog"| $SED 's%\\\\%/%g'` + while $ECHO "$ac_prog" | $GREP "$re_direlt" > /dev/null 2>&1; do + ac_prog=`$ECHO $ac_prog| $SED "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + AC_MSG_CHECKING([for GNU ld]) +else + AC_MSG_CHECKING([for non-GNU ld]) +fi +AC_CACHE_VAL(lt_cv_path_LD, +[if test -z "$LD"; then + lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH; do + IFS="$lt_save_ifs" + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + lt_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some variants of GNU ld only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + case `"$lt_cv_path_LD" -v 2>&1 &1 /dev/null 2>&1; then + lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' + lt_cv_file_magic_cmd='func_win32_libid' + else + # Keep this pattern in sync with the one in func_win32_libid. + lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' + lt_cv_file_magic_cmd='$OBJDUMP -f' + fi + ;; + +cegcc*) + # use the weaker test based on 'objdump'. See mingw*. + lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +darwin* | rhapsody*) + lt_cv_deplibs_check_method=pass_all + ;; + +freebsd* | dragonfly*) + if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then + case $host_cpu in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD|DragonFly)/i[[3-9]]86 (compact )?demand paged shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +haiku*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20* | hpux11*) + lt_cv_file_magic_cmd=/usr/bin/file + case $host_cpu in + ia64*) + lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|ELF-[[0-9]][[0-9]]) shared object file - IA64' + lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so + ;; + hppa*64*) + [lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]'] + lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl + ;; + *) + lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]]\.[[0-9]]) shared library' + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + esac + ;; + +interix[[3-9]]*) + # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here + lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so|\.a)$' + ;; + +irix5* | irix6* | nonstopux*) + case $LD in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be glibc/ELF. +linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +netbsd* | netbsdelf*-gnu) + if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then + lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|_pic\.a)$' + else + lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so|_pic\.a)$' + fi + ;; + +newos6*) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (executable|dynamic lib)' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libnls.so + ;; + +*nto* | *qnx*) + lt_cv_deplibs_check_method=pass_all + ;; + +openbsd*) + if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|\.so|_pic\.a)$' + else + lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|_pic\.a)$' + fi + ;; + +osf3* | osf4* | osf5*) + lt_cv_deplibs_check_method=pass_all + ;; + +rdos*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv4 | sysv4.3*) + case $host_vendor in + motorola) + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib) M[[0-9]][[0-9]]* Version [[0-9]]' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + sequent) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' + ;; + sni) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method="file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB dynamic lib" + lt_cv_file_magic_test_file=/lib/libc.so + ;; + siemens) + lt_cv_deplibs_check_method=pass_all + ;; + pc) + lt_cv_deplibs_check_method=pass_all + ;; + esac + ;; + +tpf*) + lt_cv_deplibs_check_method=pass_all + ;; +esac +]) + +file_magic_glob= +want_nocaseglob=no +if test "$build" = "$host"; then + case $host_os in + mingw* | pw32*) + if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then + want_nocaseglob=yes + else + file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[[\1]]\/[[\1]]\/g;/g"` + fi + ;; + esac +fi + +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method +test -z "$deplibs_check_method" && deplibs_check_method=unknown + +_LT_DECL([], [deplibs_check_method], [1], + [Method to check whether dependent libraries are shared objects]) +_LT_DECL([], [file_magic_cmd], [1], + [Command to use when deplibs_check_method = "file_magic"]) +_LT_DECL([], [file_magic_glob], [1], + [How to find potential files when deplibs_check_method = "file_magic"]) +_LT_DECL([], [want_nocaseglob], [1], + [Find potential files using nocaseglob when deplibs_check_method = "file_magic"]) +])# _LT_CHECK_MAGIC_METHOD + + +# LT_PATH_NM +# ---------- +# find the pathname to a BSD- or MS-compatible name lister +AC_DEFUN([LT_PATH_NM], +[AC_REQUIRE([AC_PROG_CC])dnl +AC_CACHE_CHECK([for BSD- or MS-compatible name lister (nm)], lt_cv_path_NM, +[if test -n "$NM"; then + # Let the user override the test. + lt_cv_path_NM="$NM" +else + lt_nm_to_check="${ac_tool_prefix}nm" + if test -n "$ac_tool_prefix" && test "$build" = "$host"; then + lt_nm_to_check="$lt_nm_to_check nm" + fi + for lt_tmp_nm in $lt_nm_to_check; do + lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH /usr/ccs/bin/elf /usr/ccs/bin /usr/ucb /bin; do + IFS="$lt_save_ifs" + test -z "$ac_dir" && ac_dir=. + tmp_nm="$ac_dir/$lt_tmp_nm" + if test -f "$tmp_nm" || test -f "$tmp_nm$ac_exeext" ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + case `"$tmp_nm" -B /dev/null 2>&1 | sed '1q'` in + */dev/null* | *'Invalid file or object type'*) + lt_cv_path_NM="$tmp_nm -B" + break + ;; + *) + case `"$tmp_nm" -p /dev/null 2>&1 | sed '1q'` in + */dev/null*) + lt_cv_path_NM="$tmp_nm -p" + break + ;; + *) + lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + ;; + esac + ;; + esac + fi + done + IFS="$lt_save_ifs" + done + : ${lt_cv_path_NM=no} +fi]) +if test "$lt_cv_path_NM" != "no"; then + NM="$lt_cv_path_NM" +else + # Didn't find any BSD compatible name lister, look for dumpbin. + if test -n "$DUMPBIN"; then : + # Let the user override the test. + else + AC_CHECK_TOOLS(DUMPBIN, [dumpbin "link -dump"], :) + case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in + *COFF*) + DUMPBIN="$DUMPBIN -symbols" + ;; + *) + DUMPBIN=: + ;; + esac + fi + AC_SUBST([DUMPBIN]) + if test "$DUMPBIN" != ":"; then + NM="$DUMPBIN" + fi +fi +test -z "$NM" && NM=nm +AC_SUBST([NM]) +_LT_DECL([], [NM], [1], [A BSD- or MS-compatible name lister])dnl + +AC_CACHE_CHECK([the name lister ($NM) interface], [lt_cv_nm_interface], + [lt_cv_nm_interface="BSD nm" + echo "int some_variable = 0;" > conftest.$ac_ext + (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&AS_MESSAGE_LOG_FD) + (eval "$ac_compile" 2>conftest.err) + cat conftest.err >&AS_MESSAGE_LOG_FD + (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&AS_MESSAGE_LOG_FD) + (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out) + cat conftest.err >&AS_MESSAGE_LOG_FD + (eval echo "\"\$as_me:$LINENO: output\"" >&AS_MESSAGE_LOG_FD) + cat conftest.out >&AS_MESSAGE_LOG_FD + if $GREP 'External.*some_variable' conftest.out > /dev/null; then + lt_cv_nm_interface="MS dumpbin" + fi + rm -f conftest*]) +])# LT_PATH_NM + +# Old names: +AU_ALIAS([AM_PROG_NM], [LT_PATH_NM]) +AU_ALIAS([AC_PROG_NM], [LT_PATH_NM]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AM_PROG_NM], []) +dnl AC_DEFUN([AC_PROG_NM], []) + +# _LT_CHECK_SHAREDLIB_FROM_LINKLIB +# -------------------------------- +# how to determine the name of the shared library +# associated with a specific link library. +# -- PORTME fill in with the dynamic library characteristics +m4_defun([_LT_CHECK_SHAREDLIB_FROM_LINKLIB], +[m4_require([_LT_DECL_EGREP]) +m4_require([_LT_DECL_OBJDUMP]) +m4_require([_LT_DECL_DLLTOOL]) +AC_CACHE_CHECK([how to associate runtime and link libraries], +lt_cv_sharedlib_from_linklib_cmd, +[lt_cv_sharedlib_from_linklib_cmd='unknown' + +case $host_os in +cygwin* | mingw* | pw32* | cegcc*) + # two different shell functions defined in ltmain.sh + # decide which to use based on capabilities of $DLLTOOL + case `$DLLTOOL --help 2>&1` in + *--identify-strict*) + lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib + ;; + *) + lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback + ;; + esac + ;; +*) + # fallback: assume linklib IS sharedlib + lt_cv_sharedlib_from_linklib_cmd="$ECHO" + ;; +esac +]) +sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd +test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO + +_LT_DECL([], [sharedlib_from_linklib_cmd], [1], + [Command to associate shared and link libraries]) +])# _LT_CHECK_SHAREDLIB_FROM_LINKLIB + + +# _LT_PATH_MANIFEST_TOOL +# ---------------------- +# locate the manifest tool +m4_defun([_LT_PATH_MANIFEST_TOOL], +[AC_CHECK_TOOL(MANIFEST_TOOL, mt, :) +test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt +AC_CACHE_CHECK([if $MANIFEST_TOOL is a manifest tool], [lt_cv_path_mainfest_tool], + [lt_cv_path_mainfest_tool=no + echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&AS_MESSAGE_LOG_FD + $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out + cat conftest.err >&AS_MESSAGE_LOG_FD + if $GREP 'Manifest Tool' conftest.out > /dev/null; then + lt_cv_path_mainfest_tool=yes + fi + rm -f conftest*]) +if test "x$lt_cv_path_mainfest_tool" != xyes; then + MANIFEST_TOOL=: +fi +_LT_DECL([], [MANIFEST_TOOL], [1], [Manifest tool])dnl +])# _LT_PATH_MANIFEST_TOOL + + +# LT_LIB_M +# -------- +# check for math library +AC_DEFUN([LT_LIB_M], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +LIBM= +case $host in +*-*-beos* | *-*-cegcc* | *-*-cygwin* | *-*-haiku* | *-*-pw32* | *-*-darwin*) + # These system don't have libm, or don't need it + ;; +*-ncr-sysv4.3*) + AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw") + AC_CHECK_LIB(m, cos, LIBM="$LIBM -lm") + ;; +*) + AC_CHECK_LIB(m, cos, LIBM="-lm") + ;; +esac +AC_SUBST([LIBM]) +])# LT_LIB_M + +# Old name: +AU_ALIAS([AC_CHECK_LIBM], [LT_LIB_M]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_CHECK_LIBM], []) + + +# _LT_COMPILER_NO_RTTI([TAGNAME]) +# ------------------------------- +m4_defun([_LT_COMPILER_NO_RTTI], +[m4_require([_LT_TAG_COMPILER])dnl + +_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)= + +if test "$GCC" = yes; then + case $cc_basename in + nvcc*) + _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -Xcompiler -fno-builtin' ;; + *) + _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin' ;; + esac + + _LT_COMPILER_OPTION([if $compiler supports -fno-rtti -fno-exceptions], + lt_cv_prog_compiler_rtti_exceptions, + [-fno-rtti -fno-exceptions], [], + [_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)="$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1) -fno-rtti -fno-exceptions"]) +fi +_LT_TAGDECL([no_builtin_flag], [lt_prog_compiler_no_builtin_flag], [1], + [Compiler flag to turn off builtin functions]) +])# _LT_COMPILER_NO_RTTI + + +# _LT_CMD_GLOBAL_SYMBOLS +# ---------------------- +m4_defun([_LT_CMD_GLOBAL_SYMBOLS], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_PROG_CC])dnl +AC_REQUIRE([AC_PROG_AWK])dnl +AC_REQUIRE([LT_PATH_NM])dnl +AC_REQUIRE([LT_PATH_LD])dnl +m4_require([_LT_DECL_SED])dnl +m4_require([_LT_DECL_EGREP])dnl +m4_require([_LT_TAG_COMPILER])dnl + +# Check for command to grab the raw symbol name followed by C symbol from nm. +AC_MSG_CHECKING([command to parse $NM output from $compiler object]) +AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], +[ +# These are sane defaults that work on at least a few old systems. +# [They come from Ultrix. What could be older than Ultrix?!! ;)] + +# Character class describing NM global symbol codes. +symcode='[[BCDEGRST]]' + +# Regexp to match symbols that can be accessed directly from C. +sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' + +# Define system-specific variables. +case $host_os in +aix*) + symcode='[[BCDT]]' + ;; +cygwin* | mingw* | pw32* | cegcc*) + symcode='[[ABCDGISTW]]' + ;; +hpux*) + if test "$host_cpu" = ia64; then + symcode='[[ABCDEGRST]]' + fi + ;; +irix* | nonstopux*) + symcode='[[BCDEGRST]]' + ;; +osf*) + symcode='[[BCDEGQRST]]' + ;; +solaris*) + symcode='[[BDRT]]' + ;; +sco3.2v5*) + symcode='[[DT]]' + ;; +sysv4.2uw2*) + symcode='[[DT]]' + ;; +sysv5* | sco5v6* | unixware* | OpenUNIX*) + symcode='[[ABDT]]' + ;; +sysv4) + symcode='[[DFNSTU]]' + ;; +esac + +# If we're using GNU nm, then use its standard symbol codes. +case `$NM -V 2>&1` in +*GNU* | *'with BFD'*) + symcode='[[ABCDGIRSTW]]' ;; +esac + +# Transform an extracted symbol line into a proper C declaration. +# Some systems (esp. on ia64) link data and code symbols differently, +# so use this general approach. +lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" + +# Transform an extracted symbol line into symbol name and symbol address +lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\)[[ ]]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (void *) \&\2},/p'" +lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([[^ ]]*\)[[ ]]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \(lib[[^ ]]*\)$/ {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/ {\"lib\2\", (void *) \&\2},/p'" + +# Handle CRLF in mingw tool chain +opt_cr= +case $build_os in +mingw*) + opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp + ;; +esac + +# Try without a prefix underscore, then with it. +for ac_symprfx in "" "_"; do + + # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. + symxfrm="\\1 $ac_symprfx\\2 \\2" + + # Write the raw and C identifiers. + if test "$lt_cv_nm_interface" = "MS dumpbin"; then + # Fake it for dumpbin and say T for any non-static function + # and D for any global variable. + # Also find C++ and __fastcall symbols from MSVC++, + # which start with @ or ?. + lt_cv_sys_global_symbol_pipe="$AWK ['"\ +" {last_section=section; section=\$ 3};"\ +" /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ +" /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ +" \$ 0!~/External *\|/{next};"\ +" / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ +" {if(hide[section]) next};"\ +" {f=0}; \$ 0~/\(\).*\|/{f=1}; {printf f ? \"T \" : \"D \"};"\ +" {split(\$ 0, a, /\||\r/); split(a[2], s)};"\ +" s[1]~/^[@?]/{print s[1], s[1]; next};"\ +" s[1]~prfx {split(s[1],t,\"@\"); print t[1], substr(t[1],length(prfx))}"\ +" ' prfx=^$ac_symprfx]" + else + lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" + fi + lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" + + # Check to see that the pipe works correctly. + pipe_works=no + + rm -f conftest* + cat > conftest.$ac_ext <<_LT_EOF +#ifdef __cplusplus +extern "C" { +#endif +char nm_test_var; +void nm_test_func(void); +void nm_test_func(void){} +#ifdef __cplusplus +} +#endif +int main(){nm_test_var='a';nm_test_func();return(0);} +_LT_EOF + + if AC_TRY_EVAL(ac_compile); then + # Now try to grab the symbols. + nlist=conftest.nm + if AC_TRY_EVAL(NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) && test -s "$nlist"; then + # Try sorting and uniquifying the output. + if sort "$nlist" | uniq > "$nlist"T; then + mv -f "$nlist"T "$nlist" + else + rm -f "$nlist"T + fi + + # Make sure that we snagged all the symbols we need. + if $GREP ' nm_test_var$' "$nlist" >/dev/null; then + if $GREP ' nm_test_func$' "$nlist" >/dev/null; then + cat <<_LT_EOF > conftest.$ac_ext +/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ +#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE) +/* DATA imports from DLLs on WIN32 con't be const, because runtime + relocations are performed -- see ld's documentation on pseudo-relocs. */ +# define LT@&t@_DLSYM_CONST +#elif defined(__osf__) +/* This system does not cope well with relocations in const data. */ +# define LT@&t@_DLSYM_CONST +#else +# define LT@&t@_DLSYM_CONST const +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +_LT_EOF + # Now generate the symbol file. + eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' + + cat <<_LT_EOF >> conftest.$ac_ext + +/* The mapping between symbol names and symbols. */ +LT@&t@_DLSYM_CONST struct { + const char *name; + void *address; +} +lt__PROGRAM__LTX_preloaded_symbols[[]] = +{ + { "@PROGRAM@", (void *) 0 }, +_LT_EOF + $SED "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (void *) \&\2},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext + cat <<\_LT_EOF >> conftest.$ac_ext + {0, (void *) 0} +}; + +/* This works around a problem in FreeBSD linker */ +#ifdef FREEBSD_WORKAROUND +static const void *lt_preloaded_setup() { + return lt__PROGRAM__LTX_preloaded_symbols; +} +#endif + +#ifdef __cplusplus +} +#endif +_LT_EOF + # Now try linking the two files. + mv conftest.$ac_objext conftstm.$ac_objext + lt_globsym_save_LIBS=$LIBS + lt_globsym_save_CFLAGS=$CFLAGS + LIBS="conftstm.$ac_objext" + CFLAGS="$CFLAGS$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)" + if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext}; then + pipe_works=yes + fi + LIBS=$lt_globsym_save_LIBS + CFLAGS=$lt_globsym_save_CFLAGS + else + echo "cannot find nm_test_func in $nlist" >&AS_MESSAGE_LOG_FD + fi + else + echo "cannot find nm_test_var in $nlist" >&AS_MESSAGE_LOG_FD + fi + else + echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AS_MESSAGE_LOG_FD + fi + else + echo "$progname: failed program was:" >&AS_MESSAGE_LOG_FD + cat conftest.$ac_ext >&5 + fi + rm -rf conftest* conftst* + + # Do not use the global_symbol_pipe unless it works. + if test "$pipe_works" = yes; then + break + else + lt_cv_sys_global_symbol_pipe= + fi +done +]) +if test -z "$lt_cv_sys_global_symbol_pipe"; then + lt_cv_sys_global_symbol_to_cdecl= +fi +if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then + AC_MSG_RESULT(failed) +else + AC_MSG_RESULT(ok) +fi + +# Response file support. +if test "$lt_cv_nm_interface" = "MS dumpbin"; then + nm_file_list_spec='@' +elif $NM --help 2>/dev/null | grep '[[@]]FILE' >/dev/null; then + nm_file_list_spec='@' +fi + +_LT_DECL([global_symbol_pipe], [lt_cv_sys_global_symbol_pipe], [1], + [Take the output of nm and produce a listing of raw symbols and C names]) +_LT_DECL([global_symbol_to_cdecl], [lt_cv_sys_global_symbol_to_cdecl], [1], + [Transform the output of nm in a proper C declaration]) +_LT_DECL([global_symbol_to_c_name_address], + [lt_cv_sys_global_symbol_to_c_name_address], [1], + [Transform the output of nm in a C name address pair]) +_LT_DECL([global_symbol_to_c_name_address_lib_prefix], + [lt_cv_sys_global_symbol_to_c_name_address_lib_prefix], [1], + [Transform the output of nm in a C name address pair when lib prefix is needed]) +_LT_DECL([], [nm_file_list_spec], [1], + [Specify filename containing input files for $NM]) +]) # _LT_CMD_GLOBAL_SYMBOLS + + +# _LT_COMPILER_PIC([TAGNAME]) +# --------------------------- +m4_defun([_LT_COMPILER_PIC], +[m4_require([_LT_TAG_COMPILER])dnl +_LT_TAGVAR(lt_prog_compiler_wl, $1)= +_LT_TAGVAR(lt_prog_compiler_pic, $1)= +_LT_TAGVAR(lt_prog_compiler_static, $1)= + +m4_if([$1], [CXX], [ + # C++ specific cases for pic, static, wl, etc. + if test "$GXX" = yes; then + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' + + case $host_os in + aix*) + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + fi + ;; + + amigaos*) + case $host_cpu in + powerpc) + # see comment about AmigaOS4 .so support + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + ;; + m68k) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' + ;; + esac + ;; + + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + mingw* | cygwin* | os2* | pw32* | cegcc*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + # Although the cygwin gcc ignores -fPIC, still need this for old-style + # (--disable-auto-import) libraries + m4_if([$1], [GCJ], [], + [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) + ;; + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' + ;; + *djgpp*) + # DJGPP does not support shared libraries at all + _LT_TAGVAR(lt_prog_compiler_pic, $1)= + ;; + haiku*) + # PIC is the default for Haiku. + # The "-static" flag exists, but is broken. + _LT_TAGVAR(lt_prog_compiler_static, $1)= + ;; + interix[[3-9]]*) + # Interix 3.x gcc -fpic/-fPIC options generate broken code. + # Instead, we relocate shared libraries at runtime. + ;; + sysv4*MP*) + if test -d /usr/nec; then + _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic + fi + ;; + hpux*) + # PIC is the default for 64-bit PA HP-UX, but not for 32-bit + # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag + # sets the default TLS model and affects inlining. + case $host_cpu in + hppa*64*) + ;; + *) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + ;; + esac + ;; + *qnx* | *nto*) + # QNX uses GNU C++, but need to define -shared option too, otherwise + # it will coredump. + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' + ;; + *) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + ;; + esac + else + case $host_os in + aix[[4-9]]*) + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + else + _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' + fi + ;; + chorus*) + case $cc_basename in + cxch68*) + # Green Hills C++ Compiler + # _LT_TAGVAR(lt_prog_compiler_static, $1)="--no_auto_instantiation -u __main -u __premain -u _abort -r $COOL_DIR/lib/libOrb.a $MVME_DIR/lib/CC/libC.a $MVME_DIR/lib/classix/libcx.s.a" + ;; + esac + ;; + mingw* | cygwin* | os2* | pw32* | cegcc*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + m4_if([$1], [GCJ], [], + [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) + ;; + dgux*) + case $cc_basename in + ec++*) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + ;; + ghcx*) + # Green Hills C++ Compiler + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' + ;; + *) + ;; + esac + ;; + freebsd* | dragonfly*) + # FreeBSD uses GNU C++ + ;; + hpux9* | hpux10* | hpux11*) + case $cc_basename in + CC*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_static, $1)='${wl}-a ${wl}archive' + if test "$host_cpu" != ia64; then + _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' + fi + ;; + aCC*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_static, $1)='${wl}-a ${wl}archive' + case $host_cpu in + hppa*64*|ia64*) + # +Z the default + ;; + *) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' + ;; + esac + ;; + *) + ;; + esac + ;; + interix*) + # This is c89, which is MS Visual C++ (no shared libs) + # Anyone wants to do a port? + ;; + irix5* | irix6* | nonstopux*) + case $cc_basename in + CC*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' + # CC pic flag -KPIC is the default. + ;; + *) + ;; + esac + ;; + linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + case $cc_basename in + KCC*) + # KAI C++ Compiler + _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + ;; + ecpc* ) + # old Intel C++ for x86_64 which still supported -KPIC. + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' + ;; + icpc* ) + # Intel C++, used to be incompatible with GCC. + # ICC 10 doesn't accept -KPIC any more. + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' + ;; + pgCC* | pgcpp*) + # Portland Group C++ compiler + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + cxx*) + # Compaq C++ + # Make sure the PIC flag is empty. It appears that all Alpha + # Linux and Compaq Tru64 Unix objects are PIC. + _LT_TAGVAR(lt_prog_compiler_pic, $1)= + _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' + ;; + xlc* | xlC* | bgxl[[cC]]* | mpixl[[cC]]*) + # IBM XL 8.0, 9.0 on PPC and BlueGene + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' + ;; + *) + case `$CC -V 2>&1 | sed 5q` in + *Sun\ C*) + # Sun C++ 5.9 + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' + ;; + esac + ;; + esac + ;; + lynxos*) + ;; + m88k*) + ;; + mvs*) + case $cc_basename in + cxx*) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-W c,exportall' + ;; + *) + ;; + esac + ;; + netbsd* | netbsdelf*-gnu) + ;; + *qnx* | *nto*) + # QNX uses GNU C++, but need to define -shared option too, otherwise + # it will coredump. + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' + ;; + osf3* | osf4* | osf5*) + case $cc_basename in + KCC*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' + ;; + RCC*) + # Rational C++ 2.4.1 + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' + ;; + cxx*) + # Digital/Compaq C++ + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + # Make sure the PIC flag is empty. It appears that all Alpha + # Linux and Compaq Tru64 Unix objects are PIC. + _LT_TAGVAR(lt_prog_compiler_pic, $1)= + _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' + ;; + *) + ;; + esac + ;; + psos*) + ;; + solaris*) + case $cc_basename in + CC* | sunCC*) + # Sun C++ 4.2, 5.x and Centerline C++ + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' + ;; + gcx*) + # Green Hills C++ Compiler + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' + ;; + *) + ;; + esac + ;; + sunos4*) + case $cc_basename in + CC*) + # Sun C++ 4.x + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + lcc*) + # Lucid + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' + ;; + *) + ;; + esac + ;; + sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) + case $cc_basename in + CC*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + esac + ;; + tandem*) + case $cc_basename in + NCC*) + # NonStop-UX NCC 3.20 + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + ;; + *) + ;; + esac + ;; + vxworks*) + ;; + *) + _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no + ;; + esac + fi +], +[ + if test "$GCC" = yes; then + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' + + case $host_os in + aix*) + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + fi + ;; + + amigaos*) + case $host_cpu in + powerpc) + # see comment about AmigaOS4 .so support + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + ;; + m68k) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' + ;; + esac + ;; + + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + + mingw* | cygwin* | pw32* | os2* | cegcc*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + # Although the cygwin gcc ignores -fPIC, still need this for old-style + # (--disable-auto-import) libraries + m4_if([$1], [GCJ], [], + [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) + ;; + + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' + ;; + + haiku*) + # PIC is the default for Haiku. + # The "-static" flag exists, but is broken. + _LT_TAGVAR(lt_prog_compiler_static, $1)= + ;; + + hpux*) + # PIC is the default for 64-bit PA HP-UX, but not for 32-bit + # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag + # sets the default TLS model and affects inlining. + case $host_cpu in + hppa*64*) + # +Z the default + ;; + *) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + ;; + esac + ;; + + interix[[3-9]]*) + # Interix 3.x gcc -fpic/-fPIC options generate broken code. + # Instead, we relocate shared libraries at runtime. + ;; + + msdosdjgpp*) + # Just because we use GCC doesn't mean we suddenly get shared libraries + # on systems that don't support them. + _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no + enable_shared=no + ;; + + *nto* | *qnx*) + # QNX uses GNU C++, but need to define -shared option too, otherwise + # it will coredump. + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' + ;; + + sysv4*MP*) + if test -d /usr/nec; then + _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic + fi + ;; + + *) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + ;; + esac + + case $cc_basename in + nvcc*) # Cuda Compiler Driver 2.2 + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Xlinker ' + if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; then + _LT_TAGVAR(lt_prog_compiler_pic, $1)="-Xcompiler $_LT_TAGVAR(lt_prog_compiler_pic, $1)" + fi + ;; + esac + else + # PORTME Check for flag to pass linker flags through the system compiler. + case $host_os in + aix*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + else + _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' + fi + ;; + + mingw* | cygwin* | pw32* | os2* | cegcc*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + m4_if([$1], [GCJ], [], + [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) + ;; + + hpux9* | hpux10* | hpux11*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but + # not for PA HP-UX. + case $host_cpu in + hppa*64*|ia64*) + # +Z the default + ;; + *) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' + ;; + esac + # Is there a better lt_prog_compiler_static that works with the bundled CC? + _LT_TAGVAR(lt_prog_compiler_static, $1)='${wl}-a ${wl}archive' + ;; + + irix5* | irix6* | nonstopux*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + # PIC (with -KPIC) is the default. + _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' + ;; + + linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + case $cc_basename in + # old Intel for x86_64 which still supported -KPIC. + ecc*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' + ;; + # icc used to be incompatible with GCC. + # ICC 10 doesn't accept -KPIC any more. + icc* | ifort*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' + ;; + # Lahey Fortran 8.1. + lf95*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='--shared' + _LT_TAGVAR(lt_prog_compiler_static, $1)='--static' + ;; + nagfor*) + # NAG Fortran compiler + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*) + # Portland Group compilers (*not* the Pentium gcc compiler, + # which looks to be a dead project) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + ccc*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + # All Alpha code is PIC. + _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' + ;; + xl* | bgxl* | bgf* | mpixl*) + # IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' + ;; + *) + case `$CC -V 2>&1 | sed 5q` in + *Sun\ Ceres\ Fortran* | *Sun*Fortran*\ [[1-7]].* | *Sun*Fortran*\ 8.[[0-3]]*) + # Sun Fortran 8.3 passes all unrecognized flags to the linker + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + _LT_TAGVAR(lt_prog_compiler_wl, $1)='' + ;; + *Sun\ F* | *Sun*Fortran*) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' + ;; + *Sun\ C*) + # Sun C 5.9 + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + ;; + *Intel*\ [[CF]]*Compiler*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' + ;; + *Portland\ Group*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + esac + ;; + esac + ;; + + newsos6) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + + *nto* | *qnx*) + # QNX uses GNU C++, but need to define -shared option too, otherwise + # it will coredump. + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' + ;; + + osf3* | osf4* | osf5*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + # All OSF/1 code is PIC. + _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' + ;; + + rdos*) + _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' + ;; + + solaris*) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + case $cc_basename in + f77* | f90* | f95* | sunf77* | sunf90* | sunf95*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ';; + *) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,';; + esac + ;; + + sunos4*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + + sysv4 | sysv4.2uw2* | sysv4.3*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + + sysv4*MP*) + if test -d /usr/nec ;then + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-Kconform_pic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + fi + ;; + + sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + + unicos*) + _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' + _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no + ;; + + uts4*) + _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' + _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' + ;; + + *) + _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no + ;; + esac + fi +]) +case $host_os in + # For platforms which do not support PIC, -DPIC is meaningless: + *djgpp*) + _LT_TAGVAR(lt_prog_compiler_pic, $1)= + ;; + *) + _LT_TAGVAR(lt_prog_compiler_pic, $1)="$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])" + ;; +esac + +AC_CACHE_CHECK([for $compiler option to produce PIC], + [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)], + [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_prog_compiler_pic, $1)]) +_LT_TAGVAR(lt_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_cv_prog_compiler_pic, $1) + +# +# Check to make sure the PIC flag actually works. +# +if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; then + _LT_COMPILER_OPTION([if $compiler PIC flag $_LT_TAGVAR(lt_prog_compiler_pic, $1) works], + [_LT_TAGVAR(lt_cv_prog_compiler_pic_works, $1)], + [$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])], [], + [case $_LT_TAGVAR(lt_prog_compiler_pic, $1) in + "" | " "*) ;; + *) _LT_TAGVAR(lt_prog_compiler_pic, $1)=" $_LT_TAGVAR(lt_prog_compiler_pic, $1)" ;; + esac], + [_LT_TAGVAR(lt_prog_compiler_pic, $1)= + _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no]) +fi +_LT_TAGDECL([pic_flag], [lt_prog_compiler_pic], [1], + [Additional compiler flags for building library objects]) + +_LT_TAGDECL([wl], [lt_prog_compiler_wl], [1], + [How to pass a linker flag through the compiler]) +# +# Check to make sure the static flag actually works. +# +wl=$_LT_TAGVAR(lt_prog_compiler_wl, $1) eval lt_tmp_static_flag=\"$_LT_TAGVAR(lt_prog_compiler_static, $1)\" +_LT_LINKER_OPTION([if $compiler static flag $lt_tmp_static_flag works], + _LT_TAGVAR(lt_cv_prog_compiler_static_works, $1), + $lt_tmp_static_flag, + [], + [_LT_TAGVAR(lt_prog_compiler_static, $1)=]) +_LT_TAGDECL([link_static_flag], [lt_prog_compiler_static], [1], + [Compiler flag to prevent dynamic linking]) +])# _LT_COMPILER_PIC + + +# _LT_LINKER_SHLIBS([TAGNAME]) +# ---------------------------- +# See if the linker supports building shared libraries. +m4_defun([_LT_LINKER_SHLIBS], +[AC_REQUIRE([LT_PATH_LD])dnl +AC_REQUIRE([LT_PATH_NM])dnl +m4_require([_LT_PATH_MANIFEST_TOOL])dnl +m4_require([_LT_FILEUTILS_DEFAULTS])dnl +m4_require([_LT_DECL_EGREP])dnl +m4_require([_LT_DECL_SED])dnl +m4_require([_LT_CMD_GLOBAL_SYMBOLS])dnl +m4_require([_LT_TAG_COMPILER])dnl +AC_MSG_CHECKING([whether the $compiler linker ($LD) supports shared libraries]) +m4_if([$1], [CXX], [ + _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols' + _LT_TAGVAR(exclude_expsyms, $1)=['_GLOBAL_OFFSET_TABLE_|_GLOBAL__F[ID]_.*'] + case $host_os in + aix[[4-9]]*) + # If we're using GNU nm, then we don't want the "-C" option. + # -C means demangle to AIX nm, but means don't demangle with GNU nm + # Also, AIX nm treats weak defined symbols like other global defined + # symbols, whereas GNU nm marks them as "W". + if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then + _LT_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols' + else + _LT_TAGVAR(export_symbols_cmds, $1)='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols' + fi + ;; + pw32*) + _LT_TAGVAR(export_symbols_cmds, $1)="$ltdll_cmds" + ;; + cygwin* | mingw* | cegcc*) + case $cc_basename in + cl*) + _LT_TAGVAR(exclude_expsyms, $1)='_NULL_IMPORT_DESCRIPTOR|_IMPORT_DESCRIPTOR_.*' + ;; + *) + _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1 DATA/;s/^.*[[ ]]__nm__\([[^ ]]*\)[[ ]][[^ ]]*/\1 DATA/;/^I[[ ]]/d;/^[[AITW]][[ ]]/s/.* //'\'' | sort | uniq > $export_symbols' + _LT_TAGVAR(exclude_expsyms, $1)=['[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'] + ;; + esac + ;; + linux* | k*bsd*-gnu | gnu*) + _LT_TAGVAR(link_all_deplibs, $1)=no + ;; + *) + _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols' + ;; + esac +], [ + runpath_var= + _LT_TAGVAR(allow_undefined_flag, $1)= + _LT_TAGVAR(always_export_symbols, $1)=no + _LT_TAGVAR(archive_cmds, $1)= + _LT_TAGVAR(archive_expsym_cmds, $1)= + _LT_TAGVAR(compiler_needs_object, $1)=no + _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=no + _LT_TAGVAR(export_dynamic_flag_spec, $1)= + _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols' + _LT_TAGVAR(hardcode_automatic, $1)=no + _LT_TAGVAR(hardcode_direct, $1)=no + _LT_TAGVAR(hardcode_direct_absolute, $1)=no + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)= + _LT_TAGVAR(hardcode_libdir_separator, $1)= + _LT_TAGVAR(hardcode_minus_L, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=unsupported + _LT_TAGVAR(inherit_rpath, $1)=no + _LT_TAGVAR(link_all_deplibs, $1)=unknown + _LT_TAGVAR(module_cmds, $1)= + _LT_TAGVAR(module_expsym_cmds, $1)= + _LT_TAGVAR(old_archive_from_new_cmds, $1)= + _LT_TAGVAR(old_archive_from_expsyms_cmds, $1)= + _LT_TAGVAR(thread_safe_flag_spec, $1)= + _LT_TAGVAR(whole_archive_flag_spec, $1)= + # include_expsyms should be a list of space-separated symbols to be *always* + # included in the symbol list + _LT_TAGVAR(include_expsyms, $1)= + # exclude_expsyms can be an extended regexp of symbols to exclude + # it will be wrapped by ` (' and `)$', so one must not match beginning or + # end of line. Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc', + # as well as any symbol that contains `d'. + _LT_TAGVAR(exclude_expsyms, $1)=['_GLOBAL_OFFSET_TABLE_|_GLOBAL__F[ID]_.*'] + # Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out + # platforms (ab)use it in PIC code, but their linkers get confused if + # the symbol is explicitly referenced. Since portable code cannot + # rely on this symbol name, it's probably fine to never include it in + # preloaded symbol tables. + # Exclude shared library initialization/finalization symbols. +dnl Note also adjust exclude_expsyms for C++ above. + extract_expsyms_cmds= + + case $host_os in + cygwin* | mingw* | pw32* | cegcc*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$GCC" != yes; then + with_gnu_ld=no + fi + ;; + interix*) + # we just hope/assume this is gcc and not c89 (= MSVC++) + with_gnu_ld=yes + ;; + openbsd*) + with_gnu_ld=no + ;; + linux* | k*bsd*-gnu | gnu*) + _LT_TAGVAR(link_all_deplibs, $1)=no + ;; + esac + + _LT_TAGVAR(ld_shlibs, $1)=yes + + # On some targets, GNU ld is compatible enough with the native linker + # that we're better off using the native interface for both. + lt_use_gnu_ld_interface=no + if test "$with_gnu_ld" = yes; then + case $host_os in + aix*) + # The AIX port of GNU ld has always aspired to compatibility + # with the native linker. However, as the warning in the GNU ld + # block says, versions before 2.19.5* couldn't really create working + # shared libraries, regardless of the interface used. + case `$LD -v 2>&1` in + *\ \(GNU\ Binutils\)\ 2.19.5*) ;; + *\ \(GNU\ Binutils\)\ 2.[[2-9]]*) ;; + *\ \(GNU\ Binutils\)\ [[3-9]]*) ;; + *) + lt_use_gnu_ld_interface=yes + ;; + esac + ;; + *) + lt_use_gnu_ld_interface=yes + ;; + esac + fi + + if test "$lt_use_gnu_ld_interface" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # Set some defaults for GNU ld with shared library support. These + # are reset later if shared libraries are not supported. Putting them + # here allows them to be overridden if necessary. + runpath_var=LD_RUN_PATH + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | $GREP 'no-whole-archive' > /dev/null; then + _LT_TAGVAR(whole_archive_flag_spec, $1)="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + _LT_TAGVAR(whole_archive_flag_spec, $1)= + fi + supports_anon_versioning=no + case `$LD -v 2>&1` in + *GNU\ gold*) supports_anon_versioning=yes ;; + *\ [[01]].* | *\ 2.[[0-9]].* | *\ 2.10.*) ;; # catch versions < 2.11 + *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ... + *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ... + *\ 2.11.*) ;; # other 2.11 versions + *) supports_anon_versioning=yes ;; + esac + + # See if GNU ld supports shared libraries. + case $host_os in + aix[[3-9]]*) + # On AIX/PPC, the GNU linker is very broken + if test "$host_cpu" != ia64; then + _LT_TAGVAR(ld_shlibs, $1)=no + cat <<_LT_EOF 1>&2 + +*** Warning: the GNU linker, at least up to release 2.19, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to install binutils +*** 2.20 or above, or modify your PATH so that a non-GNU linker is found. +*** You will then need to restart the configuration process. + +_LT_EOF + fi + ;; + + amigaos*) + case $host_cpu in + powerpc) + # see comment about AmigaOS4 .so support + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='' + ;; + m68k) + _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/a2ixlibrary.data~$ECHO "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$ECHO "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$ECHO "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$ECHO "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_minus_L, $1)=yes + ;; + esac + ;; + + beos*) + if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + _LT_TAGVAR(archive_cmds, $1)='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + + cygwin* | mingw* | pw32* | cegcc*) + # _LT_TAGVAR(hardcode_libdir_flag_spec, $1) is actually meaningless, + # as there is no search path for DLLs. + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-all-symbols' + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + _LT_TAGVAR(always_export_symbols, $1)=no + _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes + _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1 DATA/;s/^.*[[ ]]__nm__\([[^ ]]*\)[[ ]][[^ ]]*/\1 DATA/;/^I[[ ]]/d;/^[[AITW]][[ ]]/s/.* //'\'' | sort | uniq > $export_symbols' + _LT_TAGVAR(exclude_expsyms, $1)=['[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'] + + if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is; otherwise, prepend... + _LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname.def; + else + echo EXPORTS > $output_objdir/$soname.def; + cat $export_symbols >> $output_objdir/$soname.def; + fi~ + $CC -shared $output_objdir/$soname.def $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + + haiku*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(link_all_deplibs, $1)=yes + ;; + + interix[[3-9]]*) + _LT_TAGVAR(hardcode_direct, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + # Hack: On Interix 3.x, we cannot compile PIC because of a broken gcc. + # Instead, shared libraries are loaded at an image base (0x10000000 by + # default) and relocated if they conflict, which is a slow very memory + # consuming and fragmenting process. To avoid this, we pick a random, + # 256 KiB-aligned image base between 0x50000000 and 0x6FFC0000 at link + # time. Moving up from 0x10000000 also allows more sbrk(2) space. + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' + ;; + + gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu) + tmp_diet=no + if test "$host_os" = linux-dietlibc; then + case $cc_basename in + diet\ *) tmp_diet=yes;; # linux-dietlibc with static linking (!diet-dyn) + esac + fi + if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \ + && test "$tmp_diet" = no + then + tmp_addflag=' $pic_flag' + tmp_sharedflag='-shared' + case $cc_basename,$host_cpu in + pgcc*) # Portland Group C compiler + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + tmp_addflag=' $pic_flag' + ;; + pgf77* | pgf90* | pgf95* | pgfortran*) + # Portland Group f77 and f90 compilers + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + tmp_addflag=' $pic_flag -Mnomain' ;; + ecc*,ia64* | icc*,ia64*) # Intel C compiler on ia64 + tmp_addflag=' -i_dynamic' ;; + efc*,ia64* | ifort*,ia64*) # Intel Fortran compiler on ia64 + tmp_addflag=' -i_dynamic -nofor_main' ;; + ifc* | ifort*) # Intel Fortran compiler + tmp_addflag=' -nofor_main' ;; + lf95*) # Lahey Fortran 8.1 + _LT_TAGVAR(whole_archive_flag_spec, $1)= + tmp_sharedflag='--shared' ;; + xl[[cC]]* | bgxl[[cC]]* | mpixl[[cC]]*) # IBM XL C 8.0 on PPC (deal with xlf below) + tmp_sharedflag='-qmkshrobj' + tmp_addflag= ;; + nvcc*) # Cuda Compiler Driver 2.2 + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + _LT_TAGVAR(compiler_needs_object, $1)=yes + ;; + esac + case `$CC -V 2>&1 | sed 5q` in + *Sun\ C*) # Sun C 5.9 + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + _LT_TAGVAR(compiler_needs_object, $1)=yes + tmp_sharedflag='-G' ;; + *Sun\ F*) # Sun Fortran 8.3 + tmp_sharedflag='-G' ;; + esac + _LT_TAGVAR(archive_cmds, $1)='$CC '"$tmp_sharedflag""$tmp_addflag"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + + if test "x$supports_anon_versioning" = xyes; then + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $output_objdir/$libname.ver~ + cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ + echo "local: *; };" >> $output_objdir/$libname.ver~ + $CC '"$tmp_sharedflag""$tmp_addflag"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-version-script ${wl}$output_objdir/$libname.ver -o $lib' + fi + + case $cc_basename in + xlf* | bgf* | bgxlf* | mpixlf*) + # IBM XL Fortran 10.1 on PPC cannot create shared libs itself + _LT_TAGVAR(whole_archive_flag_spec, $1)='--whole-archive$convenience --no-whole-archive' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(archive_cmds, $1)='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib' + if test "x$supports_anon_versioning" = xyes; then + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $output_objdir/$libname.ver~ + cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ + echo "local: *; };" >> $output_objdir/$libname.ver~ + $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib' + fi + ;; + esac + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + + netbsd* | netbsdelf*-gnu) + if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris*) + if $LD -v 2>&1 | $GREP 'BFD 2\.8' > /dev/null; then + _LT_TAGVAR(ld_shlibs, $1)=no + cat <<_LT_EOF 1>&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +_LT_EOF + elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + + sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX*) + case `$LD -v 2>&1` in + *\ [[01]].* | *\ 2.[[0-9]].* | *\ 2.1[[0-5]].*) + _LT_TAGVAR(ld_shlibs, $1)=no + cat <<_LT_EOF 1>&2 + +*** Warning: Releases of the GNU linker prior to 2.16.91.0.3 can not +*** reliably create shared libraries on SCO systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.16.91.0.3 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +_LT_EOF + ;; + *) + # For security reasons, it is highly recommended that you always + # use absolute paths for naming shared libraries, and exclude the + # DT_RUNPATH tag from executables and libraries. But doing so + # requires that you compile everything twice, which is a pain. + if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + esac + ;; + + sunos4*) + _LT_TAGVAR(archive_cmds, $1)='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + *) + if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + esac + + if test "$_LT_TAGVAR(ld_shlibs, $1)" = no; then + runpath_var= + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)= + _LT_TAGVAR(export_dynamic_flag_spec, $1)= + _LT_TAGVAR(whole_archive_flag_spec, $1)= + fi + else + # PORTME fill in a description of your system's linker (not GNU ld) + case $host_os in + aix3*) + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + _LT_TAGVAR(always_export_symbols, $1)=yes + _LT_TAGVAR(archive_expsym_cmds, $1)='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + _LT_TAGVAR(hardcode_minus_L, $1)=yes + if test "$GCC" = yes && test -z "$lt_prog_compiler_static"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + _LT_TAGVAR(hardcode_direct, $1)=unsupported + fi + ;; + + aix[[4-9]]*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + # If we're using GNU nm, then we don't want the "-C" option. + # -C means demangle to AIX nm, but means don't demangle with GNU nm + # Also, AIX nm treats weak defined symbols like other global + # defined symbols, whereas GNU nm marks them as "W". + if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then + _LT_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols' + else + _LT_TAGVAR(export_symbols_cmds, $1)='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols' + fi + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[[23]]|aix4.[[23]].*|aix[[5-9]]*) + for ld_flag in $LDFLAGS; do + if (test $ld_flag = "-brtl" || test $ld_flag = "-Wl,-brtl"); then + aix_use_runtimelinking=yes + break + fi + done + ;; + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + _LT_TAGVAR(archive_cmds, $1)='' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_direct_absolute, $1)=yes + _LT_TAGVAR(hardcode_libdir_separator, $1)=':' + _LT_TAGVAR(link_all_deplibs, $1)=yes + _LT_TAGVAR(file_list_spec, $1)='${wl}-f,' + + if test "$GCC" = yes; then + case $host_os in aix4.[[012]]|aix4.[[012]].*) + # We only want to do this on AIX 4.2 and lower, the check + # below for broken collect2 doesn't work under 4.3+ + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && + strings "$collect2name" | $GREP resolve_lib_name >/dev/null + then + # We have reworked collect2 + : + else + # We have old collect2 + _LT_TAGVAR(hardcode_direct, $1)=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + _LT_TAGVAR(hardcode_minus_L, $1)=yes + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)= + fi + ;; + esac + shared_flag='-shared' + if test "$aix_use_runtimelinking" = yes; then + shared_flag="$shared_flag "'${wl}-G' + fi + _LT_TAGVAR(link_all_deplibs, $1)=no + else + # not using gcc + if test "$host_cpu" = ia64; then + # VisualAge C++, Version 5.5 for AIX 5L for IA-64, Beta 3 Release + # chokes on -Wl,-G. The following line is correct: + shared_flag='-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-bexpall' + # It seems that -bexpall does not export symbols beginning with + # underscore (_), so it is better to generate a list of symbols to export. + _LT_TAGVAR(always_export_symbols, $1)=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + _LT_TAGVAR(allow_undefined_flag, $1)='-berok' + # Determine the default libpath from the value encoded in an + # empty executable. + _LT_SYS_MODULE_PATH_AIX([$1]) + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath" + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $libdir:/usr/lib:/lib' + _LT_TAGVAR(allow_undefined_flag, $1)="-z nodefs" + _LT_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$exp_sym_flag:\$export_symbols" + else + # Determine the default libpath from the value encoded in an + # empty executable. + _LT_SYS_MODULE_PATH_AIX([$1]) + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath" + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + _LT_TAGVAR(no_undefined_flag, $1)=' ${wl}-bernotok' + _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-berok' + if test "$with_gnu_ld" = yes; then + # We only use this code for GNU lds that support --whole-archive. + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive$convenience ${wl}--no-whole-archive' + else + # Exported symbols can be pulled into shared objects from archives + _LT_TAGVAR(whole_archive_flag_spec, $1)='$convenience' + fi + _LT_TAGVAR(archive_cmds_need_lc, $1)=yes + # This is similar to how AIX traditionally builds its shared libraries. + _LT_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname' + fi + fi + ;; + + amigaos*) + case $host_cpu in + powerpc) + # see comment about AmigaOS4 .so support + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='' + ;; + m68k) + _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/a2ixlibrary.data~$ECHO "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$ECHO "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$ECHO "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$ECHO "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_minus_L, $1)=yes + ;; + esac + ;; + + bsdi[[45]]*) + _LT_TAGVAR(export_dynamic_flag_spec, $1)=-rdynamic + ;; + + cygwin* | mingw* | pw32* | cegcc*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + case $cc_basename in + cl*) + # Native MSVC + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)=' ' + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + _LT_TAGVAR(always_export_symbols, $1)=yes + _LT_TAGVAR(file_list_spec, $1)='@' + # Tell ltmain to make .lib files, not .a files. + libext=lib + # Tell ltmain to make .dll files, not .so files. + shrext_cmds=".dll" + # FIXME: Setting linknames here is a bad hack. + _LT_TAGVAR(archive_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames=' + _LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then + sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp; + else + sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp; + fi~ + $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~ + linknames=' + # The linker will not automatically build a static lib if we build a DLL. + # _LT_TAGVAR(old_archive_from_new_cmds, $1)='true' + _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes + _LT_TAGVAR(exclude_expsyms, $1)='_NULL_IMPORT_DESCRIPTOR|_IMPORT_DESCRIPTOR_.*' + _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1,DATA/'\'' | $SED -e '\''/^[[AITW]][[ ]]/s/.*[[ ]]//'\'' | sort | uniq > $export_symbols' + # Don't use ranlib + _LT_TAGVAR(old_postinstall_cmds, $1)='chmod 644 $oldlib' + _LT_TAGVAR(postlink_cmds, $1)='lt_outputfile="@OUTPUT@"~ + lt_tool_outputfile="@TOOL_OUTPUT@"~ + case $lt_outputfile in + *.exe|*.EXE) ;; + *) + lt_outputfile="$lt_outputfile.exe" + lt_tool_outputfile="$lt_tool_outputfile.exe" + ;; + esac~ + if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then + $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1; + $RM "$lt_outputfile.manifest"; + fi' + ;; + *) + # Assume MSVC wrapper + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)=' ' + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # Tell ltmain to make .dll files, not .so files. + shrext_cmds=".dll" + # FIXME: Setting linknames here is a bad hack. + _LT_TAGVAR(archive_cmds, $1)='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + _LT_TAGVAR(old_archive_from_new_cmds, $1)='true' + # FIXME: Should let the user specify the lib program. + _LT_TAGVAR(old_archive_cmds, $1)='lib -OUT:$oldlib$oldobjs$old_deplibs' + _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes + ;; + esac + ;; + + darwin* | rhapsody*) + _LT_DARWIN_LINKER_FEATURES($1) + ;; + + dgux*) + _LT_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2.*) + _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_minus_L, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd* | dragonfly*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + hpux9*) + if test "$GCC" = yes; then + _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' + else + _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' + fi + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + _LT_TAGVAR(hardcode_direct, $1)=yes + + # hardcode_minus_L: Not really in the search PATH, + # but as the default location of the library. + _LT_TAGVAR(hardcode_minus_L, $1)=yes + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + ;; + + hpux10*) + if test "$GCC" = yes && test "$with_gnu_ld" = no; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags' + else + _LT_TAGVAR(archive_cmds, $1)='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' + fi + if test "$with_gnu_ld" = no; then + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_direct_absolute, $1)=yes + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + # hardcode_minus_L: Not really in the search PATH, + # but as the default location of the library. + _LT_TAGVAR(hardcode_minus_L, $1)=yes + fi + ;; + + hpux11*) + if test "$GCC" = yes && test "$with_gnu_ld" = no; then + case $host_cpu in + hppa*64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + ;; + ia64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags' + ;; + *) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags' + ;; + esac + else + case $host_cpu in + hppa*64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + ;; + ia64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags' + ;; + *) + m4_if($1, [], [ + # Older versions of the 11.00 compiler do not understand -b yet + # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does) + _LT_LINKER_OPTION([if $CC understands -b], + _LT_TAGVAR(lt_cv_prog_compiler__b, $1), [-b], + [_LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'], + [_LT_TAGVAR(archive_cmds, $1)='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'])], + [_LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags']) + ;; + esac + fi + if test "$with_gnu_ld" = no; then + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + + case $host_cpu in + hppa*64*|ia64*) + _LT_TAGVAR(hardcode_direct, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + *) + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_direct_absolute, $1)=yes + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + + # hardcode_minus_L: Not really in the search PATH, + # but as the default location of the library. + _LT_TAGVAR(hardcode_minus_L, $1)=yes + ;; + esac + fi + ;; + + irix5* | irix6* | nonstopux*) + if test "$GCC" = yes; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + # Try to use the -exported_symbol ld option, if it does not + # work, assume that -exports_file does not work either and + # implicitly export all symbols. + # This should be the same for all languages, so no per-tag cache variable. + AC_CACHE_CHECK([whether the $host_os linker accepts -exported_symbol], + [lt_cv_irix_exported_symbol], + [save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null" + AC_LINK_IFELSE( + [AC_LANG_SOURCE( + [AC_LANG_CASE([C], [[int foo (void) { return 0; }]], + [C++], [[int foo (void) { return 0; }]], + [Fortran 77], [[ + subroutine foo + end]], + [Fortran], [[ + subroutine foo + end]])])], + [lt_cv_irix_exported_symbol=yes], + [lt_cv_irix_exported_symbol=no]) + LDFLAGS="$save_LDFLAGS"]) + if test "$lt_cv_irix_exported_symbol" = yes; then + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib' + fi + else + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib' + fi + _LT_TAGVAR(archive_cmds_need_lc, $1)='no' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + _LT_TAGVAR(inherit_rpath, $1)=yes + _LT_TAGVAR(link_all_deplibs, $1)=yes + ;; + + netbsd* | netbsdelf*-gnu) + if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + _LT_TAGVAR(archive_cmds, $1)='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + newsos6) + _LT_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + *nto* | *qnx*) + ;; + + openbsd*) + if test -f /usr/libexec/ld.so; then + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + _LT_TAGVAR(hardcode_direct_absolute, $1)=yes + if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags ${wl}-retain-symbols-file,$export_symbols' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + else + case $host_os in + openbsd[[01]].* | openbsd2.[[0-7]] | openbsd2.[[0-7]].*) + _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + ;; + *) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + ;; + esac + fi + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + + os2*) + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_minus_L, $1)=yes + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + _LT_TAGVAR(archive_cmds, $1)='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + _LT_TAGVAR(old_archive_from_new_cmds, $1)='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$GCC" = yes; then + _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + _LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + fi + _LT_TAGVAR(archive_cmds_need_lc, $1)='no' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$GCC" = yes; then + _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + else + _LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~ + $CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp' + + # Both c and cxx compiler support -rpath directly + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' + fi + _LT_TAGVAR(archive_cmds_need_lc, $1)='no' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + ;; + + solaris*) + _LT_TAGVAR(no_undefined_flag, $1)=' -z defs' + if test "$GCC" = yes; then + wlarc='${wl}' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' + else + case `$CC -V 2>&1` in + *"Compilers 5.0"*) + wlarc='' + _LT_TAGVAR(archive_cmds, $1)='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' + ;; + *) + wlarc='${wl}' + _LT_TAGVAR(archive_cmds, $1)='$CC -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $CC -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' + ;; + esac + fi + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + case $host_os in + solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; + *) + # The compiler driver will combine and reorder linker options, + # but understands `-z linker_flag'. GCC discards it without `$wl', + # but is careful enough not to reorder. + # Supported since Solaris 2.6 (maybe 2.5.1?) + if test "$GCC" = yes; then + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}-z ${wl}allextract$convenience ${wl}-z ${wl}defaultextract' + else + _LT_TAGVAR(whole_archive_flag_spec, $1)='-z allextract$convenience -z defaultextract' + fi + ;; + esac + _LT_TAGVAR(link_all_deplibs, $1)=yes + ;; + + sunos4*) + if test "x$host_vendor" = xsequent; then + # Use $CC to link under sequent, because it throws in some extra .o + # files that make .init and .fini sections work. + _LT_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' + else + _LT_TAGVAR(archive_cmds, $1)='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + fi + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_minus_L, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + sysv4) + case $host_vendor in + sni) + _LT_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_direct, $1)=yes # is this really true??? + ;; + siemens) + ## LD is ld it makes a PLAMLIB + ## CC just makes a GrossModule. + _LT_TAGVAR(archive_cmds, $1)='$LD -G -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(reload_cmds, $1)='$CC -r -o $output$reload_objs' + _LT_TAGVAR(hardcode_direct, $1)=no + ;; + motorola) + _LT_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_direct, $1)=no #Motorola manual says yes, but my tests say they lie + ;; + esac + runpath_var='LD_RUN_PATH' + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + sysv4.3*) + _LT_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + _LT_TAGVAR(export_dynamic_flag_spec, $1)='-Bexport' + ;; + + sysv4*MP*) + if test -d /usr/nec; then + _LT_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + _LT_TAGVAR(ld_shlibs, $1)=yes + fi + ;; + + sysv4*uw2* | sysv5OpenUNIX* | sysv5UnixWare7.[[01]].[[10]]* | unixware7* | sco3.2v5.0.[[024]]*) + _LT_TAGVAR(no_undefined_flag, $1)='${wl}-z,text' + _LT_TAGVAR(archive_cmds_need_lc, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + runpath_var='LD_RUN_PATH' + + if test "$GCC" = yes; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + else + _LT_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + ;; + + sysv5* | sco3.2v5* | sco5v6*) + # Note: We can NOT use -z defs as we might desire, because we do not + # link with -lc, and that would cause any symbols used from libc to + # always be unresolved, which means just about no library would + # ever link correctly. If we're not using GNU ld we use -z text + # though, which does catch some bad symbols but isn't as heavy-handed + # as -z defs. + _LT_TAGVAR(no_undefined_flag, $1)='${wl}-z,text' + _LT_TAGVAR(allow_undefined_flag, $1)='${wl}-z,nodefs' + _LT_TAGVAR(archive_cmds_need_lc, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R,$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=':' + _LT_TAGVAR(link_all_deplibs, $1)=yes + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-Bexport' + runpath_var='LD_RUN_PATH' + + if test "$GCC" = yes; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + else + _LT_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + ;; + + uts4*) + _LT_TAGVAR(archive_cmds, $1)='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + + *) + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + esac + + if test x$host_vendor = xsni; then + case $host in + sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-Blargedynsym' + ;; + esac + fi + fi +]) +AC_MSG_RESULT([$_LT_TAGVAR(ld_shlibs, $1)]) +test "$_LT_TAGVAR(ld_shlibs, $1)" = no && can_build_shared=no + +_LT_TAGVAR(with_gnu_ld, $1)=$with_gnu_ld + +_LT_DECL([], [libext], [0], [Old archive suffix (normally "a")])dnl +_LT_DECL([], [shrext_cmds], [1], [Shared library suffix (normally ".so")])dnl +_LT_DECL([], [extract_expsyms_cmds], [2], + [The commands to extract the exported symbol list from a shared archive]) + +# +# Do we need to explicitly link libc? +# +case "x$_LT_TAGVAR(archive_cmds_need_lc, $1)" in +x|xyes) + # Assume -lc should be added + _LT_TAGVAR(archive_cmds_need_lc, $1)=yes + + if test "$enable_shared" = yes && test "$GCC" = yes; then + case $_LT_TAGVAR(archive_cmds, $1) in + *'~'*) + # FIXME: we may have to deal with multi-command sequences. + ;; + '$CC '*) + # Test whether the compiler implicitly links with -lc since on some + # systems, -lgcc has to come before -lc. If gcc already passes -lc + # to ld, don't add -lc before -lgcc. + AC_CACHE_CHECK([whether -lc should be explicitly linked in], + [lt_cv_]_LT_TAGVAR(archive_cmds_need_lc, $1), + [$RM conftest* + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + + if AC_TRY_EVAL(ac_compile) 2>conftest.err; then + soname=conftest + lib=conftest + libobjs=conftest.$ac_objext + deplibs= + wl=$_LT_TAGVAR(lt_prog_compiler_wl, $1) + pic_flag=$_LT_TAGVAR(lt_prog_compiler_pic, $1) + compiler_flags=-v + linker_flags=-v + verstring= + output_objdir=. + libname=conftest + lt_save_allow_undefined_flag=$_LT_TAGVAR(allow_undefined_flag, $1) + _LT_TAGVAR(allow_undefined_flag, $1)= + if AC_TRY_EVAL(_LT_TAGVAR(archive_cmds, $1) 2\>\&1 \| $GREP \" -lc \" \>/dev/null 2\>\&1) + then + lt_cv_[]_LT_TAGVAR(archive_cmds_need_lc, $1)=no + else + lt_cv_[]_LT_TAGVAR(archive_cmds_need_lc, $1)=yes + fi + _LT_TAGVAR(allow_undefined_flag, $1)=$lt_save_allow_undefined_flag + else + cat conftest.err 1>&5 + fi + $RM conftest* + ]) + _LT_TAGVAR(archive_cmds_need_lc, $1)=$lt_cv_[]_LT_TAGVAR(archive_cmds_need_lc, $1) + ;; + esac + fi + ;; +esac + +_LT_TAGDECL([build_libtool_need_lc], [archive_cmds_need_lc], [0], + [Whether or not to add -lc for building shared libraries]) +_LT_TAGDECL([allow_libtool_libs_with_static_runtimes], + [enable_shared_with_static_runtimes], [0], + [Whether or not to disallow shared libs when runtime libs are static]) +_LT_TAGDECL([], [export_dynamic_flag_spec], [1], + [Compiler flag to allow reflexive dlopens]) +_LT_TAGDECL([], [whole_archive_flag_spec], [1], + [Compiler flag to generate shared objects directly from archives]) +_LT_TAGDECL([], [compiler_needs_object], [1], + [Whether the compiler copes with passing no objects directly]) +_LT_TAGDECL([], [old_archive_from_new_cmds], [2], + [Create an old-style archive from a shared archive]) +_LT_TAGDECL([], [old_archive_from_expsyms_cmds], [2], + [Create a temporary old-style archive to link instead of a shared archive]) +_LT_TAGDECL([], [archive_cmds], [2], [Commands used to build a shared archive]) +_LT_TAGDECL([], [archive_expsym_cmds], [2]) +_LT_TAGDECL([], [module_cmds], [2], + [Commands used to build a loadable module if different from building + a shared archive.]) +_LT_TAGDECL([], [module_expsym_cmds], [2]) +_LT_TAGDECL([], [with_gnu_ld], [1], + [Whether we are building with GNU ld or not]) +_LT_TAGDECL([], [allow_undefined_flag], [1], + [Flag that allows shared libraries with undefined symbols to be built]) +_LT_TAGDECL([], [no_undefined_flag], [1], + [Flag that enforces no undefined symbols]) +_LT_TAGDECL([], [hardcode_libdir_flag_spec], [1], + [Flag to hardcode $libdir into a binary during linking. + This must work even if $libdir does not exist]) +_LT_TAGDECL([], [hardcode_libdir_separator], [1], + [Whether we need a single "-rpath" flag with a separated argument]) +_LT_TAGDECL([], [hardcode_direct], [0], + [Set to "yes" if using DIR/libNAME${shared_ext} during linking hardcodes + DIR into the resulting binary]) +_LT_TAGDECL([], [hardcode_direct_absolute], [0], + [Set to "yes" if using DIR/libNAME${shared_ext} during linking hardcodes + DIR into the resulting binary and the resulting library dependency is + "absolute", i.e impossible to change by setting ${shlibpath_var} if the + library is relocated]) +_LT_TAGDECL([], [hardcode_minus_L], [0], + [Set to "yes" if using the -LDIR flag during linking hardcodes DIR + into the resulting binary]) +_LT_TAGDECL([], [hardcode_shlibpath_var], [0], + [Set to "yes" if using SHLIBPATH_VAR=DIR during linking hardcodes DIR + into the resulting binary]) +_LT_TAGDECL([], [hardcode_automatic], [0], + [Set to "yes" if building a shared library automatically hardcodes DIR + into the library and all subsequent libraries and executables linked + against it]) +_LT_TAGDECL([], [inherit_rpath], [0], + [Set to yes if linker adds runtime paths of dependent libraries + to runtime path list]) +_LT_TAGDECL([], [link_all_deplibs], [0], + [Whether libtool must link a program against all its dependency libraries]) +_LT_TAGDECL([], [always_export_symbols], [0], + [Set to "yes" if exported symbols are required]) +_LT_TAGDECL([], [export_symbols_cmds], [2], + [The commands to list exported symbols]) +_LT_TAGDECL([], [exclude_expsyms], [1], + [Symbols that should not be listed in the preloaded symbols]) +_LT_TAGDECL([], [include_expsyms], [1], + [Symbols that must always be exported]) +_LT_TAGDECL([], [prelink_cmds], [2], + [Commands necessary for linking programs (against libraries) with templates]) +_LT_TAGDECL([], [postlink_cmds], [2], + [Commands necessary for finishing linking programs]) +_LT_TAGDECL([], [file_list_spec], [1], + [Specify filename containing input files]) +dnl FIXME: Not yet implemented +dnl _LT_TAGDECL([], [thread_safe_flag_spec], [1], +dnl [Compiler flag to generate thread safe objects]) +])# _LT_LINKER_SHLIBS + + +# _LT_LANG_C_CONFIG([TAG]) +# ------------------------ +# Ensure that the configuration variables for a C compiler are suitably +# defined. These variables are subsequently used by _LT_CONFIG to write +# the compiler configuration to `libtool'. +m4_defun([_LT_LANG_C_CONFIG], +[m4_require([_LT_DECL_EGREP])dnl +lt_save_CC="$CC" +AC_LANG_PUSH(C) + +# Source file extension for C test sources. +ac_ext=c + +# Object file extension for compiled C test sources. +objext=o +_LT_TAGVAR(objext, $1)=$objext + +# Code to be used in simple compile tests +lt_simple_compile_test_code="int some_variable = 0;" + +# Code to be used in simple link tests +lt_simple_link_test_code='int main(){return(0);}' + +_LT_TAG_COMPILER +# Save the default compiler, since it gets overwritten when the other +# tags are being tested, and _LT_TAGVAR(compiler, []) is a NOP. +compiler_DEFAULT=$CC + +# save warnings/boilerplate of simple test code +_LT_COMPILER_BOILERPLATE +_LT_LINKER_BOILERPLATE + +if test -n "$compiler"; then + _LT_COMPILER_NO_RTTI($1) + _LT_COMPILER_PIC($1) + _LT_COMPILER_C_O($1) + _LT_COMPILER_FILE_LOCKS($1) + _LT_LINKER_SHLIBS($1) + _LT_SYS_DYNAMIC_LINKER($1) + _LT_LINKER_HARDCODE_LIBPATH($1) + LT_SYS_DLOPEN_SELF + _LT_CMD_STRIPLIB + + # Report which library types will actually be built + AC_MSG_CHECKING([if libtool supports shared libraries]) + AC_MSG_RESULT([$can_build_shared]) + + AC_MSG_CHECKING([whether to build shared libraries]) + test "$can_build_shared" = "no" && enable_shared=no + + # On AIX, shared libraries and static libraries use the same namespace, and + # are all built from PIC. + case $host_os in + aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + + aix[[4-9]]*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; + esac + AC_MSG_RESULT([$enable_shared]) + + AC_MSG_CHECKING([whether to build static libraries]) + # Make sure either enable_shared or enable_static is yes. + test "$enable_shared" = yes || enable_static=yes + AC_MSG_RESULT([$enable_static]) + + _LT_CONFIG($1) +fi +AC_LANG_POP +CC="$lt_save_CC" +])# _LT_LANG_C_CONFIG + + +# _LT_LANG_CXX_CONFIG([TAG]) +# -------------------------- +# Ensure that the configuration variables for a C++ compiler are suitably +# defined. These variables are subsequently used by _LT_CONFIG to write +# the compiler configuration to `libtool'. +m4_defun([_LT_LANG_CXX_CONFIG], +[m4_require([_LT_FILEUTILS_DEFAULTS])dnl +m4_require([_LT_DECL_EGREP])dnl +m4_require([_LT_PATH_MANIFEST_TOOL])dnl +if test -n "$CXX" && ( test "X$CXX" != "Xno" && + ( (test "X$CXX" = "Xg++" && `g++ -v >/dev/null 2>&1` ) || + (test "X$CXX" != "Xg++"))) ; then + AC_PROG_CXXCPP +else + _lt_caught_CXX_error=yes +fi + +AC_LANG_PUSH(C++) +_LT_TAGVAR(archive_cmds_need_lc, $1)=no +_LT_TAGVAR(allow_undefined_flag, $1)= +_LT_TAGVAR(always_export_symbols, $1)=no +_LT_TAGVAR(archive_expsym_cmds, $1)= +_LT_TAGVAR(compiler_needs_object, $1)=no +_LT_TAGVAR(export_dynamic_flag_spec, $1)= +_LT_TAGVAR(hardcode_direct, $1)=no +_LT_TAGVAR(hardcode_direct_absolute, $1)=no +_LT_TAGVAR(hardcode_libdir_flag_spec, $1)= +_LT_TAGVAR(hardcode_libdir_separator, $1)= +_LT_TAGVAR(hardcode_minus_L, $1)=no +_LT_TAGVAR(hardcode_shlibpath_var, $1)=unsupported +_LT_TAGVAR(hardcode_automatic, $1)=no +_LT_TAGVAR(inherit_rpath, $1)=no +_LT_TAGVAR(module_cmds, $1)= +_LT_TAGVAR(module_expsym_cmds, $1)= +_LT_TAGVAR(link_all_deplibs, $1)=unknown +_LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds +_LT_TAGVAR(reload_flag, $1)=$reload_flag +_LT_TAGVAR(reload_cmds, $1)=$reload_cmds +_LT_TAGVAR(no_undefined_flag, $1)= +_LT_TAGVAR(whole_archive_flag_spec, $1)= +_LT_TAGVAR(enable_shared_with_static_runtimes, $1)=no + +# Source file extension for C++ test sources. +ac_ext=cpp + +# Object file extension for compiled C++ test sources. +objext=o +_LT_TAGVAR(objext, $1)=$objext + +# No sense in running all these tests if we already determined that +# the CXX compiler isn't working. Some variables (like enable_shared) +# are currently assumed to apply to all compilers on this platform, +# and will be corrupted by setting them based on a non-working compiler. +if test "$_lt_caught_CXX_error" != yes; then + # Code to be used in simple compile tests + lt_simple_compile_test_code="int some_variable = 0;" + + # Code to be used in simple link tests + lt_simple_link_test_code='int main(int, char *[[]]) { return(0); }' + + # ltmain only uses $CC for tagged configurations so make sure $CC is set. + _LT_TAG_COMPILER + + # save warnings/boilerplate of simple test code + _LT_COMPILER_BOILERPLATE + _LT_LINKER_BOILERPLATE + + # Allow CC to be a program name with arguments. + lt_save_CC=$CC + lt_save_CFLAGS=$CFLAGS + lt_save_LD=$LD + lt_save_GCC=$GCC + GCC=$GXX + lt_save_with_gnu_ld=$with_gnu_ld + lt_save_path_LD=$lt_cv_path_LD + if test -n "${lt_cv_prog_gnu_ldcxx+set}"; then + lt_cv_prog_gnu_ld=$lt_cv_prog_gnu_ldcxx + else + $as_unset lt_cv_prog_gnu_ld + fi + if test -n "${lt_cv_path_LDCXX+set}"; then + lt_cv_path_LD=$lt_cv_path_LDCXX + else + $as_unset lt_cv_path_LD + fi + test -z "${LDCXX+set}" || LD=$LDCXX + CC=${CXX-"c++"} + CFLAGS=$CXXFLAGS + compiler=$CC + _LT_TAGVAR(compiler, $1)=$CC + _LT_CC_BASENAME([$compiler]) + + if test -n "$compiler"; then + # We don't want -fno-exception when compiling C++ code, so set the + # no_builtin_flag separately + if test "$GXX" = yes; then + _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin' + else + _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)= + fi + + if test "$GXX" = yes; then + # Set up default GNU C++ configuration + + LT_PATH_LD + + # Check if GNU C++ uses GNU ld as the underlying linker, since the + # archiving commands below assume that GNU ld is being used. + if test "$with_gnu_ld" = yes; then + _LT_TAGVAR(archive_cmds, $1)='$CC $pic_flag -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC $pic_flag -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' + + # If archive_cmds runs LD, not CC, wlarc should be empty + # XXX I think wlarc can be eliminated in ltcf-cxx, but I need to + # investigate it a little bit more. (MM) + wlarc='${wl}' + + # ancient GNU ld didn't support --whole-archive et. al. + if eval "`$CC -print-prog-name=ld` --help 2>&1" | + $GREP 'no-whole-archive' > /dev/null; then + _LT_TAGVAR(whole_archive_flag_spec, $1)="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + _LT_TAGVAR(whole_archive_flag_spec, $1)= + fi + else + with_gnu_ld=no + wlarc= + + # A generic and very simple default shared library creation + # command for GNU C++ for the case where it uses the native + # linker, instead of GNU ld. If possible, this setting should + # overridden to take advantage of the native linker features on + # the platform it is being used on. + _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $lib' + fi + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"' + + else + GXX=no + with_gnu_ld=no + wlarc= + fi + + # PORTME: fill in a description of your system's C++ link characteristics + AC_MSG_CHECKING([whether the $compiler linker ($LD) supports shared libraries]) + _LT_TAGVAR(ld_shlibs, $1)=yes + case $host_os in + aix3*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + aix[[4-9]]*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[[23]]|aix4.[[23]].*|aix[[5-9]]*) + for ld_flag in $LDFLAGS; do + case $ld_flag in + *-brtl*) + aix_use_runtimelinking=yes + break + ;; + esac + done + ;; + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + _LT_TAGVAR(archive_cmds, $1)='' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_direct_absolute, $1)=yes + _LT_TAGVAR(hardcode_libdir_separator, $1)=':' + _LT_TAGVAR(link_all_deplibs, $1)=yes + _LT_TAGVAR(file_list_spec, $1)='${wl}-f,' + + if test "$GXX" = yes; then + case $host_os in aix4.[[012]]|aix4.[[012]].*) + # We only want to do this on AIX 4.2 and lower, the check + # below for broken collect2 doesn't work under 4.3+ + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && + strings "$collect2name" | $GREP resolve_lib_name >/dev/null + then + # We have reworked collect2 + : + else + # We have old collect2 + _LT_TAGVAR(hardcode_direct, $1)=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + _LT_TAGVAR(hardcode_minus_L, $1)=yes + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)= + fi + esac + shared_flag='-shared' + if test "$aix_use_runtimelinking" = yes; then + shared_flag="$shared_flag "'${wl}-G' + fi + else + # not using gcc + if test "$host_cpu" = ia64; then + # VisualAge C++, Version 5.5 for AIX 5L for IA-64, Beta 3 Release + # chokes on -Wl,-G. The following line is correct: + shared_flag='-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-bexpall' + # It seems that -bexpall does not export symbols beginning with + # underscore (_), so it is better to generate a list of symbols to + # export. + _LT_TAGVAR(always_export_symbols, $1)=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + _LT_TAGVAR(allow_undefined_flag, $1)='-berok' + # Determine the default libpath from the value encoded in an empty + # executable. + _LT_SYS_MODULE_PATH_AIX([$1]) + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath" + + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $libdir:/usr/lib:/lib' + _LT_TAGVAR(allow_undefined_flag, $1)="-z nodefs" + _LT_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$exp_sym_flag:\$export_symbols" + else + # Determine the default libpath from the value encoded in an + # empty executable. + _LT_SYS_MODULE_PATH_AIX([$1]) + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath" + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + _LT_TAGVAR(no_undefined_flag, $1)=' ${wl}-bernotok' + _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-berok' + if test "$with_gnu_ld" = yes; then + # We only use this code for GNU lds that support --whole-archive. + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive$convenience ${wl}--no-whole-archive' + else + # Exported symbols can be pulled into shared objects from archives + _LT_TAGVAR(whole_archive_flag_spec, $1)='$convenience' + fi + _LT_TAGVAR(archive_cmds_need_lc, $1)=yes + # This is similar to how AIX traditionally builds its shared + # libraries. + _LT_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname' + fi + fi + ;; + + beos*) + if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + _LT_TAGVAR(archive_cmds, $1)='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + + chorus*) + case $cc_basename in + *) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + esac + ;; + + cygwin* | mingw* | pw32* | cegcc*) + case $GXX,$cc_basename in + ,cl* | no,cl*) + # Native MSVC + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)=' ' + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + _LT_TAGVAR(always_export_symbols, $1)=yes + _LT_TAGVAR(file_list_spec, $1)='@' + # Tell ltmain to make .lib files, not .a files. + libext=lib + # Tell ltmain to make .dll files, not .so files. + shrext_cmds=".dll" + # FIXME: Setting linknames here is a bad hack. + _LT_TAGVAR(archive_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames=' + _LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then + $SED -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp; + else + $SED -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp; + fi~ + $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~ + linknames=' + # The linker will not automatically build a static lib if we build a DLL. + # _LT_TAGVAR(old_archive_from_new_cmds, $1)='true' + _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes + # Don't use ranlib + _LT_TAGVAR(old_postinstall_cmds, $1)='chmod 644 $oldlib' + _LT_TAGVAR(postlink_cmds, $1)='lt_outputfile="@OUTPUT@"~ + lt_tool_outputfile="@TOOL_OUTPUT@"~ + case $lt_outputfile in + *.exe|*.EXE) ;; + *) + lt_outputfile="$lt_outputfile.exe" + lt_tool_outputfile="$lt_tool_outputfile.exe" + ;; + esac~ + func_to_tool_file "$lt_outputfile"~ + if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then + $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1; + $RM "$lt_outputfile.manifest"; + fi' + ;; + *) + # g++ + # _LT_TAGVAR(hardcode_libdir_flag_spec, $1) is actually meaningless, + # as there is no search path for DLLs. + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-all-symbols' + _LT_TAGVAR(allow_undefined_flag, $1)=unsupported + _LT_TAGVAR(always_export_symbols, $1)=no + _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes + + if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is; otherwise, prepend... + _LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname.def; + else + echo EXPORTS > $output_objdir/$soname.def; + cat $export_symbols >> $output_objdir/$soname.def; + fi~ + $CC -shared -nostdlib $output_objdir/$soname.def $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + esac + ;; + darwin* | rhapsody*) + _LT_DARWIN_LINKER_FEATURES($1) + ;; + + dgux*) + case $cc_basename in + ec++*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + ghcx*) + # Green Hills C++ Compiler + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + *) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + esac + ;; + + freebsd2.*) + # C++ shared libraries reported to be fairly broken before + # switch to ELF + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + + freebsd-elf*) + _LT_TAGVAR(archive_cmds_need_lc, $1)=no + ;; + + freebsd* | dragonfly*) + # FreeBSD 3 and later use GNU C++ and GNU ld with standard ELF + # conventions + _LT_TAGVAR(ld_shlibs, $1)=yes + ;; + + haiku*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(link_all_deplibs, $1)=yes + ;; + + hpux9*) + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_minus_L, $1)=yes # Not in the search PATH, + # but as the default + # location of the library. + + case $cc_basename in + CC*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + aCC*) + _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$CC -b ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | $EGREP "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' + ;; + *) + if test "$GXX" = yes; then + _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$CC -shared -nostdlib $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' + else + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + esac + ;; + + hpux10*|hpux11*) + if test $with_gnu_ld = no; then + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + + case $host_cpu in + hppa*64*|ia64*) + ;; + *) + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + ;; + esac + fi + case $host_cpu in + hppa*64*|ia64*) + _LT_TAGVAR(hardcode_direct, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + ;; + *) + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_direct_absolute, $1)=yes + _LT_TAGVAR(hardcode_minus_L, $1)=yes # Not in the search PATH, + # but as the default + # location of the library. + ;; + esac + + case $cc_basename in + CC*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + aCC*) + case $host_cpu in + hppa*64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + ;; + ia64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + ;; + *) + _LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + ;; + esac + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | $GREP "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' + ;; + *) + if test "$GXX" = yes; then + if test $with_gnu_ld = no; then + case $host_cpu in + hppa*64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib -fPIC ${wl}+h ${wl}$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + ;; + ia64*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + ;; + *) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + ;; + esac + fi + else + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + esac + ;; + + interix[[3-9]]*) + _LT_TAGVAR(hardcode_direct, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + # Hack: On Interix 3.x, we cannot compile PIC because of a broken gcc. + # Instead, shared libraries are loaded at an image base (0x10000000 by + # default) and relocated if they conflict, which is a slow very memory + # consuming and fragmenting process. To avoid this, we pick a random, + # 256 KiB-aligned image base between 0x50000000 and 0x6FFC0000 at link + # time. Moving up from 0x10000000 also allows more sbrk(2) space. + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' + ;; + irix5* | irix6*) + case $cc_basename in + CC*) + # SGI C++ + _LT_TAGVAR(archive_cmds, $1)='$CC -shared -all -multigot $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + + # Archives containing C++ object files must be created using + # "CC -ar", where "CC" is the IRIX C++ compiler. This is + # necessary to make sure instantiated templates are included + # in the archive. + _LT_TAGVAR(old_archive_cmds, $1)='$CC -ar -WR,-u -o $oldlib $oldobjs' + ;; + *) + if test "$GXX" = yes; then + if test "$with_gnu_ld" = no; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` -o $lib' + fi + fi + _LT_TAGVAR(link_all_deplibs, $1)=yes + ;; + esac + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + _LT_TAGVAR(inherit_rpath, $1)=yes + ;; + + linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + case $cc_basename in + KCC*) + # Kuck and Associates, Inc. (KAI) C++ Compiler + + # KCC will only create a shared library if the output file + # ends with ".so" (or ".sl" for HP-UX), so rename the library + # to its proper name (with version) after linking. + _LT_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib ${wl}-retain-symbols-file,$export_symbols; mv \$templib $lib' + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | $GREP "ld"`; rm -f libconftest$shared_ext; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' + + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' + + # Archives containing C++ object files must be created using + # "CC -Bstatic", where "CC" is the KAI C++ compiler. + _LT_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs' + ;; + icpc* | ecpc* ) + # Intel C++ + with_gnu_ld=yes + # version 8.0 and above of icpc choke on multiply defined symbols + # if we add $predep_objects and $postdep_objects, however 7.1 and + # earlier do not add the objects themselves. + case `$CC -V 2>&1` in + *"Version 7."*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + ;; + *) # Version 8.0 or newer + tmp_idyn= + case $host_cpu in + ia64*) tmp_idyn=' -i_dynamic';; + esac + _LT_TAGVAR(archive_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + ;; + esac + _LT_TAGVAR(archive_cmds_need_lc, $1)=no + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive$convenience ${wl}--no-whole-archive' + ;; + pgCC* | pgcpp*) + # Portland Group C++ compiler + case `$CC -V` in + *pgCC\ [[1-5]].* | *pgcpp\ [[1-5]].*) + _LT_TAGVAR(prelink_cmds, $1)='tpldir=Template.dir~ + rm -rf $tpldir~ + $CC --prelink_objects --instantiation_dir $tpldir $objs $libobjs $compile_deplibs~ + compile_command="$compile_command `find $tpldir -name \*.o | sort | $NL2SP`"' + _LT_TAGVAR(old_archive_cmds, $1)='tpldir=Template.dir~ + rm -rf $tpldir~ + $CC --prelink_objects --instantiation_dir $tpldir $oldobjs$old_deplibs~ + $AR $AR_FLAGS $oldlib$oldobjs$old_deplibs `find $tpldir -name \*.o | sort | $NL2SP`~ + $RANLIB $oldlib' + _LT_TAGVAR(archive_cmds, $1)='tpldir=Template.dir~ + rm -rf $tpldir~ + $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ + $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='tpldir=Template.dir~ + rm -rf $tpldir~ + $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ + $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname ${wl}-retain-symbols-file ${wl}$export_symbols -o $lib' + ;; + *) # Version 6 and above use weak symbols + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname ${wl}-retain-symbols-file ${wl}$export_symbols -o $lib' + ;; + esac + + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}--rpath ${wl}$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + ;; + cxx*) + # Compaq C++ + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib ${wl}-retain-symbols-file $wl$export_symbols' + + runpath_var=LD_RUN_PATH + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld"`; templist=`func_echo_all "$templist" | $SED "s/\(^.*ld.*\)\( .*ld .*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "X$list" | $Xsed' + ;; + xl* | mpixl* | bgxl*) + # IBM XL 8.0 on PPC, with GNU ld + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' + _LT_TAGVAR(archive_cmds, $1)='$CC -qmkshrobj $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + if test "x$supports_anon_versioning" = xyes; then + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $output_objdir/$libname.ver~ + cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ + echo "local: *; };" >> $output_objdir/$libname.ver~ + $CC -qmkshrobj $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-version-script ${wl}$output_objdir/$libname.ver -o $lib' + fi + ;; + *) + case `$CC -V 2>&1 | sed 5q` in + *Sun\ C*) + # Sun C++ 5.9 + _LT_TAGVAR(no_undefined_flag, $1)=' -zdefs' + _LT_TAGVAR(archive_cmds, $1)='$CC -G${allow_undefined_flag} -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G${allow_undefined_flag} -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-retain-symbols-file ${wl}$export_symbols' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + _LT_TAGVAR(compiler_needs_object, $1)=yes + + # Not sure whether something based on + # $CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 + # would be better. + output_verbose_link_cmd='func_echo_all' + + # Archives containing C++ object files must be created using + # "CC -xar", where "CC" is the Sun C++ compiler. This is + # necessary to make sure instantiated templates are included + # in the archive. + _LT_TAGVAR(old_archive_cmds, $1)='$CC -xar -o $oldlib $oldobjs' + ;; + esac + ;; + esac + ;; + + lynxos*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + + m88k*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + + mvs*) + case $cc_basename in + cxx*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + *) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + esac + ;; + + netbsd*) + if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable -o $lib $predep_objects $libobjs $deplibs $postdep_objects $linker_flags' + wlarc= + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + fi + # Workaround some broken pre-1.5 toolchains + output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP conftest.$objext | $SED -e "s:-lgcc -lc -lgcc::"' + ;; + + *nto* | *qnx*) + _LT_TAGVAR(ld_shlibs, $1)=yes + ;; + + openbsd2*) + # C++ shared libraries are fairly broken + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + + openbsd*) + if test -f /usr/libexec/ld.so; then + _LT_TAGVAR(hardcode_direct, $1)=yes + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + _LT_TAGVAR(hardcode_direct_absolute, $1)=yes + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $lib' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + if test -z "`echo __ELF__ | $CC -E - | grep __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-retain-symbols-file,$export_symbols -o $lib' + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E' + _LT_TAGVAR(whole_archive_flag_spec, $1)="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + fi + output_verbose_link_cmd=func_echo_all + else + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + + osf3* | osf4* | osf5*) + case $cc_basename in + KCC*) + # Kuck and Associates, Inc. (KAI) C++ Compiler + + # KCC will only create a shared library if the output file + # ends with ".so" (or ".sl" for HP-UX), so rename the library + # to its proper name (with version) after linking. + _LT_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo "$lib" | $SED -e "s/\${tempext}\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' + + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + + # Archives containing C++ object files must be created using + # the KAI C++ compiler. + case $host in + osf3*) _LT_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs' ;; + *) _LT_TAGVAR(old_archive_cmds, $1)='$CC -o $oldlib $oldobjs' ;; + esac + ;; + RCC*) + # Rational C++ 2.4.1 + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + cxx*) + case $host in + osf3*) + _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $soname `test -n "$verstring" && func_echo_all "${wl}-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + ;; + *) + _LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*' + _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done~ + echo "-hidden">> $lib.exp~ + $CC -shared$allow_undefined_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname ${wl}-input ${wl}$lib.exp `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~ + $RM $lib.exp' + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' + ;; + esac + + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + # + # There doesn't appear to be a way to prevent this compiler from + # explicitly linking system object files so we need to strip them + # from the output so that they don't get included in the library + # dependencies. + output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld" | $GREP -v "ld:"`; templist=`func_echo_all "$templist" | $SED "s/\(^.*ld.*\)\( .*ld.*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' + ;; + *) + if test "$GXX" = yes && test "$with_gnu_ld" = no; then + _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*' + case $host in + osf3*) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + ;; + *) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + ;; + esac + + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=: + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"' + + else + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + fi + ;; + esac + ;; + + psos*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + + sunos4*) + case $cc_basename in + CC*) + # Sun C++ 4.x + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + lcc*) + # Lucid + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + *) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + esac + ;; + + solaris*) + case $cc_basename in + CC* | sunCC*) + # Sun C++ 4.2, 5.x and Centerline C++ + _LT_TAGVAR(archive_cmds_need_lc,$1)=yes + _LT_TAGVAR(no_undefined_flag, $1)=' -zdefs' + _LT_TAGVAR(archive_cmds, $1)='$CC -G${allow_undefined_flag} -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $CC -G${allow_undefined_flag} ${wl}-M ${wl}$lib.exp -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~$RM $lib.exp' + + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + case $host_os in + solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; + *) + # The compiler driver will combine and reorder linker options, + # but understands `-z linker_flag'. + # Supported since Solaris 2.6 (maybe 2.5.1?) + _LT_TAGVAR(whole_archive_flag_spec, $1)='-z allextract$convenience -z defaultextract' + ;; + esac + _LT_TAGVAR(link_all_deplibs, $1)=yes + + output_verbose_link_cmd='func_echo_all' + + # Archives containing C++ object files must be created using + # "CC -xar", where "CC" is the Sun C++ compiler. This is + # necessary to make sure instantiated templates are included + # in the archive. + _LT_TAGVAR(old_archive_cmds, $1)='$CC -xar -o $oldlib $oldobjs' + ;; + gcx*) + # Green Hills C++ Compiler + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-h $wl$soname -o $lib' + + # The C++ compiler must be used to create the archive. + _LT_TAGVAR(old_archive_cmds, $1)='$CC $LDFLAGS -archive -o $oldlib $oldobjs' + ;; + *) + # GNU C++ compiler with Solaris linker + if test "$GXX" = yes && test "$with_gnu_ld" = no; then + _LT_TAGVAR(no_undefined_flag, $1)=' ${wl}-z ${wl}defs' + if $CC --version | $GREP -v '^2\.7' > /dev/null; then + _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib $LDFLAGS $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-h $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $CC -shared $pic_flag -nostdlib ${wl}-M $wl$lib.exp -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~$RM $lib.exp' + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"' + else + # g++ 2.7 appears to require `-G' NOT `-shared' on this + # platform. + _LT_TAGVAR(archive_cmds, $1)='$CC -G -nostdlib $LDFLAGS $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-h $wl$soname -o $lib' + _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $CC -G -nostdlib ${wl}-M $wl$lib.exp -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~$RM $lib.exp' + + # Commands to make compiler produce verbose output that lists + # what "hidden" libraries, object files and flags are used when + # linking a shared library. + output_verbose_link_cmd='$CC -G $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"' + fi + + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $wl$libdir' + case $host_os in + solaris2.[[0-5]] | solaris2.[[0-5]].*) ;; + *) + _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}-z ${wl}allextract$convenience ${wl}-z ${wl}defaultextract' + ;; + esac + fi + ;; + esac + ;; + + sysv4*uw2* | sysv5OpenUNIX* | sysv5UnixWare7.[[01]].[[10]]* | unixware7* | sco3.2v5.0.[[024]]*) + _LT_TAGVAR(no_undefined_flag, $1)='${wl}-z,text' + _LT_TAGVAR(archive_cmds_need_lc, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + runpath_var='LD_RUN_PATH' + + case $cc_basename in + CC*) + _LT_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + ;; + *) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + ;; + esac + ;; + + sysv5* | sco3.2v5* | sco5v6*) + # Note: We can NOT use -z defs as we might desire, because we do not + # link with -lc, and that would cause any symbols used from libc to + # always be unresolved, which means just about no library would + # ever link correctly. If we're not using GNU ld we use -z text + # though, which does catch some bad symbols but isn't as heavy-handed + # as -z defs. + _LT_TAGVAR(no_undefined_flag, $1)='${wl}-z,text' + _LT_TAGVAR(allow_undefined_flag, $1)='${wl}-z,nodefs' + _LT_TAGVAR(archive_cmds_need_lc, $1)=no + _LT_TAGVAR(hardcode_shlibpath_var, $1)=no + _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R,$libdir' + _LT_TAGVAR(hardcode_libdir_separator, $1)=':' + _LT_TAGVAR(link_all_deplibs, $1)=yes + _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-Bexport' + runpath_var='LD_RUN_PATH' + + case $cc_basename in + CC*) + _LT_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(old_archive_cmds, $1)='$CC -Tprelink_objects $oldobjs~ + '"$_LT_TAGVAR(old_archive_cmds, $1)" + _LT_TAGVAR(reload_cmds, $1)='$CC -Tprelink_objects $reload_objs~ + '"$_LT_TAGVAR(reload_cmds, $1)" + ;; + *) + _LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + ;; + esac + ;; + + tandem*) + case $cc_basename in + NCC*) + # NonStop-UX NCC 3.20 + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + *) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + esac + ;; + + vxworks*) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + + *) + # FIXME: insert proper C++ library support + _LT_TAGVAR(ld_shlibs, $1)=no + ;; + esac + + AC_MSG_RESULT([$_LT_TAGVAR(ld_shlibs, $1)]) + test "$_LT_TAGVAR(ld_shlibs, $1)" = no && can_build_shared=no + + _LT_TAGVAR(GCC, $1)="$GXX" + _LT_TAGVAR(LD, $1)="$LD" + + ## CAVEAT EMPTOR: + ## There is no encapsulation within the following macros, do not change + ## the running order or otherwise move them around unless you know exactly + ## what you are doing... + _LT_SYS_HIDDEN_LIBDEPS($1) + _LT_COMPILER_PIC($1) + _LT_COMPILER_C_O($1) + _LT_COMPILER_FILE_LOCKS($1) + _LT_LINKER_SHLIBS($1) + _LT_SYS_DYNAMIC_LINKER($1) + _LT_LINKER_HARDCODE_LIBPATH($1) + + _LT_CONFIG($1) + fi # test -n "$compiler" + + CC=$lt_save_CC + CFLAGS=$lt_save_CFLAGS + LDCXX=$LD + LD=$lt_save_LD + GCC=$lt_save_GCC + with_gnu_ld=$lt_save_with_gnu_ld + lt_cv_path_LDCXX=$lt_cv_path_LD + lt_cv_path_LD=$lt_save_path_LD + lt_cv_prog_gnu_ldcxx=$lt_cv_prog_gnu_ld + lt_cv_prog_gnu_ld=$lt_save_with_gnu_ld +fi # test "$_lt_caught_CXX_error" != yes + +AC_LANG_POP +])# _LT_LANG_CXX_CONFIG + + +# _LT_FUNC_STRIPNAME_CNF +# ---------------------- +# func_stripname_cnf prefix suffix name +# strip PREFIX and SUFFIX off of NAME. +# PREFIX and SUFFIX must not contain globbing or regex special +# characters, hashes, percent signs, but SUFFIX may contain a leading +# dot (in which case that matches only a dot). +# +# This function is identical to the (non-XSI) version of func_stripname, +# except this one can be used by m4 code that may be executed by configure, +# rather than the libtool script. +m4_defun([_LT_FUNC_STRIPNAME_CNF],[dnl +AC_REQUIRE([_LT_DECL_SED]) +AC_REQUIRE([_LT_PROG_ECHO_BACKSLASH]) +func_stripname_cnf () +{ + case ${2} in + .*) func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%\\\\${2}\$%%"`;; + *) func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%${2}\$%%"`;; + esac +} # func_stripname_cnf +])# _LT_FUNC_STRIPNAME_CNF + +# _LT_SYS_HIDDEN_LIBDEPS([TAGNAME]) +# --------------------------------- +# Figure out "hidden" library dependencies from verbose +# compiler output when linking a shared library. +# Parse the compiler output and extract the necessary +# objects, libraries and library flags. +m4_defun([_LT_SYS_HIDDEN_LIBDEPS], +[m4_require([_LT_FILEUTILS_DEFAULTS])dnl +AC_REQUIRE([_LT_FUNC_STRIPNAME_CNF])dnl +# Dependencies to place before and after the object being linked: +_LT_TAGVAR(predep_objects, $1)= +_LT_TAGVAR(postdep_objects, $1)= +_LT_TAGVAR(predeps, $1)= +_LT_TAGVAR(postdeps, $1)= +_LT_TAGVAR(compiler_lib_search_path, $1)= + +dnl we can't use the lt_simple_compile_test_code here, +dnl because it contains code intended for an executable, +dnl not a library. It's possible we should let each +dnl tag define a new lt_????_link_test_code variable, +dnl but it's only used here... +m4_if([$1], [], [cat > conftest.$ac_ext <<_LT_EOF +int a; +void foo (void) { a = 0; } +_LT_EOF +], [$1], [CXX], [cat > conftest.$ac_ext <<_LT_EOF +class Foo +{ +public: + Foo (void) { a = 0; } +private: + int a; +}; +_LT_EOF +], [$1], [F77], [cat > conftest.$ac_ext <<_LT_EOF + subroutine foo + implicit none + integer*4 a + a=0 + return + end +_LT_EOF +], [$1], [FC], [cat > conftest.$ac_ext <<_LT_EOF + subroutine foo + implicit none + integer a + a=0 + return + end +_LT_EOF +], [$1], [GCJ], [cat > conftest.$ac_ext <<_LT_EOF +public class foo { + private int a; + public void bar (void) { + a = 0; + } +}; +_LT_EOF +], [$1], [GO], [cat > conftest.$ac_ext <<_LT_EOF +package foo +func foo() { +} +_LT_EOF +]) + +_lt_libdeps_save_CFLAGS=$CFLAGS +case "$CC $CFLAGS " in #( +*\ -flto*\ *) CFLAGS="$CFLAGS -fno-lto" ;; +*\ -fwhopr*\ *) CFLAGS="$CFLAGS -fno-whopr" ;; +*\ -fuse-linker-plugin*\ *) CFLAGS="$CFLAGS -fno-use-linker-plugin" ;; +esac + +dnl Parse the compiler output and extract the necessary +dnl objects, libraries and library flags. +if AC_TRY_EVAL(ac_compile); then + # Parse the compiler output and extract the necessary + # objects, libraries and library flags. + + # Sentinel used to keep track of whether or not we are before + # the conftest object file. + pre_test_object_deps_done=no + + for p in `eval "$output_verbose_link_cmd"`; do + case ${prev}${p} in + + -L* | -R* | -l*) + # Some compilers place space between "-{L,R}" and the path. + # Remove the space. + if test $p = "-L" || + test $p = "-R"; then + prev=$p + continue + fi + + # Expand the sysroot to ease extracting the directories later. + if test -z "$prev"; then + case $p in + -L*) func_stripname_cnf '-L' '' "$p"; prev=-L; p=$func_stripname_result ;; + -R*) func_stripname_cnf '-R' '' "$p"; prev=-R; p=$func_stripname_result ;; + -l*) func_stripname_cnf '-l' '' "$p"; prev=-l; p=$func_stripname_result ;; + esac + fi + case $p in + =*) func_stripname_cnf '=' '' "$p"; p=$lt_sysroot$func_stripname_result ;; + esac + if test "$pre_test_object_deps_done" = no; then + case ${prev} in + -L | -R) + # Internal compiler library paths should come after those + # provided the user. The postdeps already come after the + # user supplied libs so there is no need to process them. + if test -z "$_LT_TAGVAR(compiler_lib_search_path, $1)"; then + _LT_TAGVAR(compiler_lib_search_path, $1)="${prev}${p}" + else + _LT_TAGVAR(compiler_lib_search_path, $1)="${_LT_TAGVAR(compiler_lib_search_path, $1)} ${prev}${p}" + fi + ;; + # The "-l" case would never come before the object being + # linked, so don't bother handling this case. + esac + else + if test -z "$_LT_TAGVAR(postdeps, $1)"; then + _LT_TAGVAR(postdeps, $1)="${prev}${p}" + else + _LT_TAGVAR(postdeps, $1)="${_LT_TAGVAR(postdeps, $1)} ${prev}${p}" + fi + fi + prev= + ;; + + *.lto.$objext) ;; # Ignore GCC LTO objects + *.$objext) + # This assumes that the test object file only shows up + # once in the compiler output. + if test "$p" = "conftest.$objext"; then + pre_test_object_deps_done=yes + continue + fi + + if test "$pre_test_object_deps_done" = no; then + if test -z "$_LT_TAGVAR(predep_objects, $1)"; then + _LT_TAGVAR(predep_objects, $1)="$p" + else + _LT_TAGVAR(predep_objects, $1)="$_LT_TAGVAR(predep_objects, $1) $p" + fi + else + if test -z "$_LT_TAGVAR(postdep_objects, $1)"; then + _LT_TAGVAR(postdep_objects, $1)="$p" + else + _LT_TAGVAR(postdep_objects, $1)="$_LT_TAGVAR(postdep_objects, $1) $p" + fi + fi + ;; + + *) ;; # Ignore the rest. + + esac + done + + # Clean up. + rm -f a.out a.exe +else + echo "libtool.m4: error: problem compiling $1 test program" +fi + +$RM -f confest.$objext +CFLAGS=$_lt_libdeps_save_CFLAGS + +# PORTME: override above test on systems where it is broken +m4_if([$1], [CXX], +[case $host_os in +interix[[3-9]]*) + # Interix 3.5 installs completely hosed .la files for C++, so rather than + # hack all around it, let's just trust "g++" to DTRT. + _LT_TAGVAR(predep_objects,$1)= + _LT_TAGVAR(postdep_objects,$1)= + _LT_TAGVAR(postdeps,$1)= + ;; + +linux*) + case `$CC -V 2>&1 | sed 5q` in + *Sun\ C*) + # Sun C++ 5.9 + + # The more standards-conforming stlport4 library is + # incompatible with the Cstd library. Avoid specifying + # it if it's in CXXFLAGS. Ignore libCrun as + # -library=stlport4 depends on it. + case " $CXX $CXXFLAGS " in + *" -library=stlport4 "*) + solaris_use_stlport4=yes + ;; + esac + + if test "$solaris_use_stlport4" != yes; then + _LT_TAGVAR(postdeps,$1)='-library=Cstd -library=Crun' + fi + ;; + esac + ;; + +solaris*) + case $cc_basename in + CC* | sunCC*) + # The more standards-conforming stlport4 library is + # incompatible with the Cstd library. Avoid specifying + # it if it's in CXXFLAGS. Ignore libCrun as + # -library=stlport4 depends on it. + case " $CXX $CXXFLAGS " in + *" -library=stlport4 "*) + solaris_use_stlport4=yes + ;; + esac + + # Adding this requires a known-good setup of shared libraries for + # Sun compiler versions before 5.6, else PIC objects from an old + # archive will be linked into the output, leading to subtle bugs. + if test "$solaris_use_stlport4" != yes; then + _LT_TAGVAR(postdeps,$1)='-library=Cstd -library=Crun' + fi + ;; + esac + ;; +esac +]) + +case " $_LT_TAGVAR(postdeps, $1) " in +*" -lc "*) _LT_TAGVAR(archive_cmds_need_lc, $1)=no ;; +esac + _LT_TAGVAR(compiler_lib_search_dirs, $1)= +if test -n "${_LT_TAGVAR(compiler_lib_search_path, $1)}"; then + _LT_TAGVAR(compiler_lib_search_dirs, $1)=`echo " ${_LT_TAGVAR(compiler_lib_search_path, $1)}" | ${SED} -e 's! -L! !g' -e 's!^ !!'` +fi +_LT_TAGDECL([], [compiler_lib_search_dirs], [1], + [The directories searched by this compiler when creating a shared library]) +_LT_TAGDECL([], [predep_objects], [1], + [Dependencies to place before and after the objects being linked to + create a shared library]) +_LT_TAGDECL([], [postdep_objects], [1]) +_LT_TAGDECL([], [predeps], [1]) +_LT_TAGDECL([], [postdeps], [1]) +_LT_TAGDECL([], [compiler_lib_search_path], [1], + [The library search path used internally by the compiler when linking + a shared library]) +])# _LT_SYS_HIDDEN_LIBDEPS + + +# _LT_LANG_F77_CONFIG([TAG]) +# -------------------------- +# Ensure that the configuration variables for a Fortran 77 compiler are +# suitably defined. These variables are subsequently used by _LT_CONFIG +# to write the compiler configuration to `libtool'. +m4_defun([_LT_LANG_F77_CONFIG], +[AC_LANG_PUSH(Fortran 77) +if test -z "$F77" || test "X$F77" = "Xno"; then + _lt_disable_F77=yes +fi + +_LT_TAGVAR(archive_cmds_need_lc, $1)=no +_LT_TAGVAR(allow_undefined_flag, $1)= +_LT_TAGVAR(always_export_symbols, $1)=no +_LT_TAGVAR(archive_expsym_cmds, $1)= +_LT_TAGVAR(export_dynamic_flag_spec, $1)= +_LT_TAGVAR(hardcode_direct, $1)=no +_LT_TAGVAR(hardcode_direct_absolute, $1)=no +_LT_TAGVAR(hardcode_libdir_flag_spec, $1)= +_LT_TAGVAR(hardcode_libdir_separator, $1)= +_LT_TAGVAR(hardcode_minus_L, $1)=no +_LT_TAGVAR(hardcode_automatic, $1)=no +_LT_TAGVAR(inherit_rpath, $1)=no +_LT_TAGVAR(module_cmds, $1)= +_LT_TAGVAR(module_expsym_cmds, $1)= +_LT_TAGVAR(link_all_deplibs, $1)=unknown +_LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds +_LT_TAGVAR(reload_flag, $1)=$reload_flag +_LT_TAGVAR(reload_cmds, $1)=$reload_cmds +_LT_TAGVAR(no_undefined_flag, $1)= +_LT_TAGVAR(whole_archive_flag_spec, $1)= +_LT_TAGVAR(enable_shared_with_static_runtimes, $1)=no + +# Source file extension for f77 test sources. +ac_ext=f + +# Object file extension for compiled f77 test sources. +objext=o +_LT_TAGVAR(objext, $1)=$objext + +# No sense in running all these tests if we already determined that +# the F77 compiler isn't working. Some variables (like enable_shared) +# are currently assumed to apply to all compilers on this platform, +# and will be corrupted by setting them based on a non-working compiler. +if test "$_lt_disable_F77" != yes; then + # Code to be used in simple compile tests + lt_simple_compile_test_code="\ + subroutine t + return + end +" + + # Code to be used in simple link tests + lt_simple_link_test_code="\ + program t + end +" + + # ltmain only uses $CC for tagged configurations so make sure $CC is set. + _LT_TAG_COMPILER + + # save warnings/boilerplate of simple test code + _LT_COMPILER_BOILERPLATE + _LT_LINKER_BOILERPLATE + + # Allow CC to be a program name with arguments. + lt_save_CC="$CC" + lt_save_GCC=$GCC + lt_save_CFLAGS=$CFLAGS + CC=${F77-"f77"} + CFLAGS=$FFLAGS + compiler=$CC + _LT_TAGVAR(compiler, $1)=$CC + _LT_CC_BASENAME([$compiler]) + GCC=$G77 + if test -n "$compiler"; then + AC_MSG_CHECKING([if libtool supports shared libraries]) + AC_MSG_RESULT([$can_build_shared]) + + AC_MSG_CHECKING([whether to build shared libraries]) + test "$can_build_shared" = "no" && enable_shared=no + + # On AIX, shared libraries and static libraries use the same namespace, and + # are all built from PIC. + case $host_os in + aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + aix[[4-9]]*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; + esac + AC_MSG_RESULT([$enable_shared]) + + AC_MSG_CHECKING([whether to build static libraries]) + # Make sure either enable_shared or enable_static is yes. + test "$enable_shared" = yes || enable_static=yes + AC_MSG_RESULT([$enable_static]) + + _LT_TAGVAR(GCC, $1)="$G77" + _LT_TAGVAR(LD, $1)="$LD" + + ## CAVEAT EMPTOR: + ## There is no encapsulation within the following macros, do not change + ## the running order or otherwise move them around unless you know exactly + ## what you are doing... + _LT_COMPILER_PIC($1) + _LT_COMPILER_C_O($1) + _LT_COMPILER_FILE_LOCKS($1) + _LT_LINKER_SHLIBS($1) + _LT_SYS_DYNAMIC_LINKER($1) + _LT_LINKER_HARDCODE_LIBPATH($1) + + _LT_CONFIG($1) + fi # test -n "$compiler" + + GCC=$lt_save_GCC + CC="$lt_save_CC" + CFLAGS="$lt_save_CFLAGS" +fi # test "$_lt_disable_F77" != yes + +AC_LANG_POP +])# _LT_LANG_F77_CONFIG + + +# _LT_LANG_FC_CONFIG([TAG]) +# ------------------------- +# Ensure that the configuration variables for a Fortran compiler are +# suitably defined. These variables are subsequently used by _LT_CONFIG +# to write the compiler configuration to `libtool'. +m4_defun([_LT_LANG_FC_CONFIG], +[AC_LANG_PUSH(Fortran) + +if test -z "$FC" || test "X$FC" = "Xno"; then + _lt_disable_FC=yes +fi + +_LT_TAGVAR(archive_cmds_need_lc, $1)=no +_LT_TAGVAR(allow_undefined_flag, $1)= +_LT_TAGVAR(always_export_symbols, $1)=no +_LT_TAGVAR(archive_expsym_cmds, $1)= +_LT_TAGVAR(export_dynamic_flag_spec, $1)= +_LT_TAGVAR(hardcode_direct, $1)=no +_LT_TAGVAR(hardcode_direct_absolute, $1)=no +_LT_TAGVAR(hardcode_libdir_flag_spec, $1)= +_LT_TAGVAR(hardcode_libdir_separator, $1)= +_LT_TAGVAR(hardcode_minus_L, $1)=no +_LT_TAGVAR(hardcode_automatic, $1)=no +_LT_TAGVAR(inherit_rpath, $1)=no +_LT_TAGVAR(module_cmds, $1)= +_LT_TAGVAR(module_expsym_cmds, $1)= +_LT_TAGVAR(link_all_deplibs, $1)=unknown +_LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds +_LT_TAGVAR(reload_flag, $1)=$reload_flag +_LT_TAGVAR(reload_cmds, $1)=$reload_cmds +_LT_TAGVAR(no_undefined_flag, $1)= +_LT_TAGVAR(whole_archive_flag_spec, $1)= +_LT_TAGVAR(enable_shared_with_static_runtimes, $1)=no + +# Source file extension for fc test sources. +ac_ext=${ac_fc_srcext-f} + +# Object file extension for compiled fc test sources. +objext=o +_LT_TAGVAR(objext, $1)=$objext + +# No sense in running all these tests if we already determined that +# the FC compiler isn't working. Some variables (like enable_shared) +# are currently assumed to apply to all compilers on this platform, +# and will be corrupted by setting them based on a non-working compiler. +if test "$_lt_disable_FC" != yes; then + # Code to be used in simple compile tests + lt_simple_compile_test_code="\ + subroutine t + return + end +" + + # Code to be used in simple link tests + lt_simple_link_test_code="\ + program t + end +" + + # ltmain only uses $CC for tagged configurations so make sure $CC is set. + _LT_TAG_COMPILER + + # save warnings/boilerplate of simple test code + _LT_COMPILER_BOILERPLATE + _LT_LINKER_BOILERPLATE + + # Allow CC to be a program name with arguments. + lt_save_CC="$CC" + lt_save_GCC=$GCC + lt_save_CFLAGS=$CFLAGS + CC=${FC-"f95"} + CFLAGS=$FCFLAGS + compiler=$CC + GCC=$ac_cv_fc_compiler_gnu + + _LT_TAGVAR(compiler, $1)=$CC + _LT_CC_BASENAME([$compiler]) + + if test -n "$compiler"; then + AC_MSG_CHECKING([if libtool supports shared libraries]) + AC_MSG_RESULT([$can_build_shared]) + + AC_MSG_CHECKING([whether to build shared libraries]) + test "$can_build_shared" = "no" && enable_shared=no + + # On AIX, shared libraries and static libraries use the same namespace, and + # are all built from PIC. + case $host_os in + aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + aix[[4-9]]*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; + esac + AC_MSG_RESULT([$enable_shared]) + + AC_MSG_CHECKING([whether to build static libraries]) + # Make sure either enable_shared or enable_static is yes. + test "$enable_shared" = yes || enable_static=yes + AC_MSG_RESULT([$enable_static]) + + _LT_TAGVAR(GCC, $1)="$ac_cv_fc_compiler_gnu" + _LT_TAGVAR(LD, $1)="$LD" + + ## CAVEAT EMPTOR: + ## There is no encapsulation within the following macros, do not change + ## the running order or otherwise move them around unless you know exactly + ## what you are doing... + _LT_SYS_HIDDEN_LIBDEPS($1) + _LT_COMPILER_PIC($1) + _LT_COMPILER_C_O($1) + _LT_COMPILER_FILE_LOCKS($1) + _LT_LINKER_SHLIBS($1) + _LT_SYS_DYNAMIC_LINKER($1) + _LT_LINKER_HARDCODE_LIBPATH($1) + + _LT_CONFIG($1) + fi # test -n "$compiler" + + GCC=$lt_save_GCC + CC=$lt_save_CC + CFLAGS=$lt_save_CFLAGS +fi # test "$_lt_disable_FC" != yes + +AC_LANG_POP +])# _LT_LANG_FC_CONFIG + + +# _LT_LANG_GCJ_CONFIG([TAG]) +# -------------------------- +# Ensure that the configuration variables for the GNU Java Compiler compiler +# are suitably defined. These variables are subsequently used by _LT_CONFIG +# to write the compiler configuration to `libtool'. +m4_defun([_LT_LANG_GCJ_CONFIG], +[AC_REQUIRE([LT_PROG_GCJ])dnl +AC_LANG_SAVE + +# Source file extension for Java test sources. +ac_ext=java + +# Object file extension for compiled Java test sources. +objext=o +_LT_TAGVAR(objext, $1)=$objext + +# Code to be used in simple compile tests +lt_simple_compile_test_code="class foo {}" + +# Code to be used in simple link tests +lt_simple_link_test_code='public class conftest { public static void main(String[[]] argv) {}; }' + +# ltmain only uses $CC for tagged configurations so make sure $CC is set. +_LT_TAG_COMPILER + +# save warnings/boilerplate of simple test code +_LT_COMPILER_BOILERPLATE +_LT_LINKER_BOILERPLATE + +# Allow CC to be a program name with arguments. +lt_save_CC=$CC +lt_save_CFLAGS=$CFLAGS +lt_save_GCC=$GCC +GCC=yes +CC=${GCJ-"gcj"} +CFLAGS=$GCJFLAGS +compiler=$CC +_LT_TAGVAR(compiler, $1)=$CC +_LT_TAGVAR(LD, $1)="$LD" +_LT_CC_BASENAME([$compiler]) + +# GCJ did not exist at the time GCC didn't implicitly link libc in. +_LT_TAGVAR(archive_cmds_need_lc, $1)=no + +_LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds +_LT_TAGVAR(reload_flag, $1)=$reload_flag +_LT_TAGVAR(reload_cmds, $1)=$reload_cmds + +if test -n "$compiler"; then + _LT_COMPILER_NO_RTTI($1) + _LT_COMPILER_PIC($1) + _LT_COMPILER_C_O($1) + _LT_COMPILER_FILE_LOCKS($1) + _LT_LINKER_SHLIBS($1) + _LT_LINKER_HARDCODE_LIBPATH($1) + + _LT_CONFIG($1) +fi + +AC_LANG_RESTORE + +GCC=$lt_save_GCC +CC=$lt_save_CC +CFLAGS=$lt_save_CFLAGS +])# _LT_LANG_GCJ_CONFIG + + +# _LT_LANG_GO_CONFIG([TAG]) +# -------------------------- +# Ensure that the configuration variables for the GNU Go compiler +# are suitably defined. These variables are subsequently used by _LT_CONFIG +# to write the compiler configuration to `libtool'. +m4_defun([_LT_LANG_GO_CONFIG], +[AC_REQUIRE([LT_PROG_GO])dnl +AC_LANG_SAVE + +# Source file extension for Go test sources. +ac_ext=go + +# Object file extension for compiled Go test sources. +objext=o +_LT_TAGVAR(objext, $1)=$objext + +# Code to be used in simple compile tests +lt_simple_compile_test_code="package main; func main() { }" + +# Code to be used in simple link tests +lt_simple_link_test_code='package main; func main() { }' + +# ltmain only uses $CC for tagged configurations so make sure $CC is set. +_LT_TAG_COMPILER + +# save warnings/boilerplate of simple test code +_LT_COMPILER_BOILERPLATE +_LT_LINKER_BOILERPLATE + +# Allow CC to be a program name with arguments. +lt_save_CC=$CC +lt_save_CFLAGS=$CFLAGS +lt_save_GCC=$GCC +GCC=yes +CC=${GOC-"gccgo"} +CFLAGS=$GOFLAGS +compiler=$CC +_LT_TAGVAR(compiler, $1)=$CC +_LT_TAGVAR(LD, $1)="$LD" +_LT_CC_BASENAME([$compiler]) + +# Go did not exist at the time GCC didn't implicitly link libc in. +_LT_TAGVAR(archive_cmds_need_lc, $1)=no + +_LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds +_LT_TAGVAR(reload_flag, $1)=$reload_flag +_LT_TAGVAR(reload_cmds, $1)=$reload_cmds + +if test -n "$compiler"; then + _LT_COMPILER_NO_RTTI($1) + _LT_COMPILER_PIC($1) + _LT_COMPILER_C_O($1) + _LT_COMPILER_FILE_LOCKS($1) + _LT_LINKER_SHLIBS($1) + _LT_LINKER_HARDCODE_LIBPATH($1) + + _LT_CONFIG($1) +fi + +AC_LANG_RESTORE + +GCC=$lt_save_GCC +CC=$lt_save_CC +CFLAGS=$lt_save_CFLAGS +])# _LT_LANG_GO_CONFIG + + +# _LT_LANG_RC_CONFIG([TAG]) +# ------------------------- +# Ensure that the configuration variables for the Windows resource compiler +# are suitably defined. These variables are subsequently used by _LT_CONFIG +# to write the compiler configuration to `libtool'. +m4_defun([_LT_LANG_RC_CONFIG], +[AC_REQUIRE([LT_PROG_RC])dnl +AC_LANG_SAVE + +# Source file extension for RC test sources. +ac_ext=rc + +# Object file extension for compiled RC test sources. +objext=o +_LT_TAGVAR(objext, $1)=$objext + +# Code to be used in simple compile tests +lt_simple_compile_test_code='sample MENU { MENUITEM "&Soup", 100, CHECKED }' + +# Code to be used in simple link tests +lt_simple_link_test_code="$lt_simple_compile_test_code" + +# ltmain only uses $CC for tagged configurations so make sure $CC is set. +_LT_TAG_COMPILER + +# save warnings/boilerplate of simple test code +_LT_COMPILER_BOILERPLATE +_LT_LINKER_BOILERPLATE + +# Allow CC to be a program name with arguments. +lt_save_CC="$CC" +lt_save_CFLAGS=$CFLAGS +lt_save_GCC=$GCC +GCC= +CC=${RC-"windres"} +CFLAGS= +compiler=$CC +_LT_TAGVAR(compiler, $1)=$CC +_LT_CC_BASENAME([$compiler]) +_LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)=yes + +if test -n "$compiler"; then + : + _LT_CONFIG($1) +fi + +GCC=$lt_save_GCC +AC_LANG_RESTORE +CC=$lt_save_CC +CFLAGS=$lt_save_CFLAGS +])# _LT_LANG_RC_CONFIG + + +# LT_PROG_GCJ +# ----------- +AC_DEFUN([LT_PROG_GCJ], +[m4_ifdef([AC_PROG_GCJ], [AC_PROG_GCJ], + [m4_ifdef([A][M_PROG_GCJ], [A][M_PROG_GCJ], + [AC_CHECK_TOOL(GCJ, gcj,) + test "x${GCJFLAGS+set}" = xset || GCJFLAGS="-g -O2" + AC_SUBST(GCJFLAGS)])])[]dnl +]) + +# Old name: +AU_ALIAS([LT_AC_PROG_GCJ], [LT_PROG_GCJ]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([LT_AC_PROG_GCJ], []) + + +# LT_PROG_GO +# ---------- +AC_DEFUN([LT_PROG_GO], +[AC_CHECK_TOOL(GOC, gccgo,) +]) + + +# LT_PROG_RC +# ---------- +AC_DEFUN([LT_PROG_RC], +[AC_CHECK_TOOL(RC, windres,) +]) + +# Old name: +AU_ALIAS([LT_AC_PROG_RC], [LT_PROG_RC]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([LT_AC_PROG_RC], []) + + +# _LT_DECL_EGREP +# -------------- +# If we don't have a new enough Autoconf to choose the best grep +# available, choose the one first in the user's PATH. +m4_defun([_LT_DECL_EGREP], +[AC_REQUIRE([AC_PROG_EGREP])dnl +AC_REQUIRE([AC_PROG_FGREP])dnl +test -z "$GREP" && GREP=grep +_LT_DECL([], [GREP], [1], [A grep program that handles long lines]) +_LT_DECL([], [EGREP], [1], [An ERE matcher]) +_LT_DECL([], [FGREP], [1], [A literal string matcher]) +dnl Non-bleeding-edge autoconf doesn't subst GREP, so do it here too +AC_SUBST([GREP]) +]) + + +# _LT_DECL_OBJDUMP +# -------------- +# If we don't have a new enough Autoconf to choose the best objdump +# available, choose the one first in the user's PATH. +m4_defun([_LT_DECL_OBJDUMP], +[AC_CHECK_TOOL(OBJDUMP, objdump, false) +test -z "$OBJDUMP" && OBJDUMP=objdump +_LT_DECL([], [OBJDUMP], [1], [An object symbol dumper]) +AC_SUBST([OBJDUMP]) +]) + +# _LT_DECL_DLLTOOL +# ---------------- +# Ensure DLLTOOL variable is set. +m4_defun([_LT_DECL_DLLTOOL], +[AC_CHECK_TOOL(DLLTOOL, dlltool, false) +test -z "$DLLTOOL" && DLLTOOL=dlltool +_LT_DECL([], [DLLTOOL], [1], [DLL creation program]) +AC_SUBST([DLLTOOL]) +]) + +# _LT_DECL_SED +# ------------ +# Check for a fully-functional sed program, that truncates +# as few characters as possible. Prefer GNU sed if found. +m4_defun([_LT_DECL_SED], +[AC_PROG_SED +test -z "$SED" && SED=sed +Xsed="$SED -e 1s/^X//" +_LT_DECL([], [SED], [1], [A sed program that does not truncate output]) +_LT_DECL([], [Xsed], ["\$SED -e 1s/^X//"], + [Sed that helps us avoid accidentally triggering echo(1) options like -n]) +])# _LT_DECL_SED + +m4_ifndef([AC_PROG_SED], [ +# NOTE: This macro has been submitted for inclusion into # +# GNU Autoconf as AC_PROG_SED. When it is available in # +# a released version of Autoconf we should remove this # +# macro and use it instead. # + +m4_defun([AC_PROG_SED], +[AC_MSG_CHECKING([for a sed that does not truncate output]) +AC_CACHE_VAL(lt_cv_path_SED, +[# Loop through the user's path and test for sed and gsed. +# Then use that list of sed's as ones to test for truncation. +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for lt_ac_prog in sed gsed; do + for ac_exec_ext in '' $ac_executable_extensions; do + if $as_executable_p "$as_dir/$lt_ac_prog$ac_exec_ext"; then + lt_ac_sed_list="$lt_ac_sed_list $as_dir/$lt_ac_prog$ac_exec_ext" + fi + done + done +done +IFS=$as_save_IFS +lt_ac_max=0 +lt_ac_count=0 +# Add /usr/xpg4/bin/sed as it is typically found on Solaris +# along with /bin/sed that truncates output. +for lt_ac_sed in $lt_ac_sed_list /usr/xpg4/bin/sed; do + test ! -f $lt_ac_sed && continue + cat /dev/null > conftest.in + lt_ac_count=0 + echo $ECHO_N "0123456789$ECHO_C" >conftest.in + # Check for GNU sed and select it if it is found. + if "$lt_ac_sed" --version 2>&1 < /dev/null | grep 'GNU' > /dev/null; then + lt_cv_path_SED=$lt_ac_sed + break + fi + while true; do + cat conftest.in conftest.in >conftest.tmp + mv conftest.tmp conftest.in + cp conftest.in conftest.nl + echo >>conftest.nl + $lt_ac_sed -e 's/a$//' < conftest.nl >conftest.out || break + cmp -s conftest.out conftest.nl || break + # 10000 chars as input seems more than enough + test $lt_ac_count -gt 10 && break + lt_ac_count=`expr $lt_ac_count + 1` + if test $lt_ac_count -gt $lt_ac_max; then + lt_ac_max=$lt_ac_count + lt_cv_path_SED=$lt_ac_sed + fi + done +done +]) +SED=$lt_cv_path_SED +AC_SUBST([SED]) +AC_MSG_RESULT([$SED]) +])#AC_PROG_SED +])#m4_ifndef + +# Old name: +AU_ALIAS([LT_AC_PROG_SED], [AC_PROG_SED]) +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([LT_AC_PROG_SED], []) + + +# _LT_CHECK_SHELL_FEATURES +# ------------------------ +# Find out whether the shell is Bourne or XSI compatible, +# or has some other useful features. +m4_defun([_LT_CHECK_SHELL_FEATURES], +[AC_MSG_CHECKING([whether the shell understands some XSI constructs]) +# Try some XSI features +xsi_shell=no +( _lt_dummy="a/b/c" + test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \ + = c,a/b,b/c, \ + && eval 'test $(( 1 + 1 )) -eq 2 \ + && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \ + && xsi_shell=yes +AC_MSG_RESULT([$xsi_shell]) +_LT_CONFIG_LIBTOOL_INIT([xsi_shell='$xsi_shell']) + +AC_MSG_CHECKING([whether the shell understands "+="]) +lt_shell_append=no +( foo=bar; set foo baz; eval "$[1]+=\$[2]" && test "$foo" = barbaz ) \ + >/dev/null 2>&1 \ + && lt_shell_append=yes +AC_MSG_RESULT([$lt_shell_append]) +_LT_CONFIG_LIBTOOL_INIT([lt_shell_append='$lt_shell_append']) + +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + lt_unset=unset +else + lt_unset=false +fi +_LT_DECL([], [lt_unset], [0], [whether the shell understands "unset"])dnl + +# test EBCDIC or ASCII +case `echo X|tr X '\101'` in + A) # ASCII based system + # \n is not interpreted correctly by Solaris 8 /usr/ucb/tr + lt_SP2NL='tr \040 \012' + lt_NL2SP='tr \015\012 \040\040' + ;; + *) # EBCDIC based system + lt_SP2NL='tr \100 \n' + lt_NL2SP='tr \r\n \100\100' + ;; +esac +_LT_DECL([SP2NL], [lt_SP2NL], [1], [turn spaces into newlines])dnl +_LT_DECL([NL2SP], [lt_NL2SP], [1], [turn newlines into spaces])dnl +])# _LT_CHECK_SHELL_FEATURES + + +# _LT_PROG_FUNCTION_REPLACE (FUNCNAME, REPLACEMENT-BODY) +# ------------------------------------------------------ +# In `$cfgfile', look for function FUNCNAME delimited by `^FUNCNAME ()$' and +# '^} FUNCNAME ', and replace its body with REPLACEMENT-BODY. +m4_defun([_LT_PROG_FUNCTION_REPLACE], +[dnl { +sed -e '/^$1 ()$/,/^} # $1 /c\ +$1 ()\ +{\ +m4_bpatsubsts([$2], [$], [\\], [^\([ ]\)], [\\\1]) +} # Extended-shell $1 implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: +]) + + +# _LT_PROG_REPLACE_SHELLFNS +# ------------------------- +# Replace existing portable implementations of several shell functions with +# equivalent extended shell implementations where those features are available.. +m4_defun([_LT_PROG_REPLACE_SHELLFNS], +[if test x"$xsi_shell" = xyes; then + _LT_PROG_FUNCTION_REPLACE([func_dirname], [dnl + case ${1} in + */*) func_dirname_result="${1%/*}${2}" ;; + * ) func_dirname_result="${3}" ;; + esac]) + + _LT_PROG_FUNCTION_REPLACE([func_basename], [dnl + func_basename_result="${1##*/}"]) + + _LT_PROG_FUNCTION_REPLACE([func_dirname_and_basename], [dnl + case ${1} in + */*) func_dirname_result="${1%/*}${2}" ;; + * ) func_dirname_result="${3}" ;; + esac + func_basename_result="${1##*/}"]) + + _LT_PROG_FUNCTION_REPLACE([func_stripname], [dnl + # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are + # positional parameters, so assign one to ordinary parameter first. + func_stripname_result=${3} + func_stripname_result=${func_stripname_result#"${1}"} + func_stripname_result=${func_stripname_result%"${2}"}]) + + _LT_PROG_FUNCTION_REPLACE([func_split_long_opt], [dnl + func_split_long_opt_name=${1%%=*} + func_split_long_opt_arg=${1#*=}]) + + _LT_PROG_FUNCTION_REPLACE([func_split_short_opt], [dnl + func_split_short_opt_arg=${1#??} + func_split_short_opt_name=${1%"$func_split_short_opt_arg"}]) + + _LT_PROG_FUNCTION_REPLACE([func_lo2o], [dnl + case ${1} in + *.lo) func_lo2o_result=${1%.lo}.${objext} ;; + *) func_lo2o_result=${1} ;; + esac]) + + _LT_PROG_FUNCTION_REPLACE([func_xform], [ func_xform_result=${1%.*}.lo]) + + _LT_PROG_FUNCTION_REPLACE([func_arith], [ func_arith_result=$(( $[*] ))]) + + _LT_PROG_FUNCTION_REPLACE([func_len], [ func_len_result=${#1}]) +fi + +if test x"$lt_shell_append" = xyes; then + _LT_PROG_FUNCTION_REPLACE([func_append], [ eval "${1}+=\\${2}"]) + + _LT_PROG_FUNCTION_REPLACE([func_append_quoted], [dnl + func_quote_for_eval "${2}" +dnl m4 expansion turns \\\\ into \\, and then the shell eval turns that into \ + eval "${1}+=\\\\ \\$func_quote_for_eval_result"]) + + # Save a `func_append' function call where possible by direct use of '+=' + sed -e 's%func_append \([[a-zA-Z_]]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") + test 0 -eq $? || _lt_function_replace_fail=: +else + # Save a `func_append' function call even when '+=' is not available + sed -e 's%func_append \([[a-zA-Z_]]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") + test 0 -eq $? || _lt_function_replace_fail=: +fi + +if test x"$_lt_function_replace_fail" = x":"; then + AC_MSG_WARN([Unable to substitute extended shell functions in $ofile]) +fi +]) + +# _LT_PATH_CONVERSION_FUNCTIONS +# ----------------------------- +# Determine which file name conversion functions should be used by +# func_to_host_file (and, implicitly, by func_to_host_path). These are needed +# for certain cross-compile configurations and native mingw. +m4_defun([_LT_PATH_CONVERSION_FUNCTIONS], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +AC_REQUIRE([AC_CANONICAL_BUILD])dnl +AC_MSG_CHECKING([how to convert $build file names to $host format]) +AC_CACHE_VAL(lt_cv_to_host_file_cmd, +[case $host in + *-*-mingw* ) + case $build in + *-*-mingw* ) # actually msys + lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32 + ;; + *-*-cygwin* ) + lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32 + ;; + * ) # otherwise, assume *nix + lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32 + ;; + esac + ;; + *-*-cygwin* ) + case $build in + *-*-mingw* ) # actually msys + lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin + ;; + *-*-cygwin* ) + lt_cv_to_host_file_cmd=func_convert_file_noop + ;; + * ) # otherwise, assume *nix + lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin + ;; + esac + ;; + * ) # unhandled hosts (and "normal" native builds) + lt_cv_to_host_file_cmd=func_convert_file_noop + ;; +esac +]) +to_host_file_cmd=$lt_cv_to_host_file_cmd +AC_MSG_RESULT([$lt_cv_to_host_file_cmd]) +_LT_DECL([to_host_file_cmd], [lt_cv_to_host_file_cmd], + [0], [convert $build file names to $host format])dnl + +AC_MSG_CHECKING([how to convert $build file names to toolchain format]) +AC_CACHE_VAL(lt_cv_to_tool_file_cmd, +[#assume ordinary cross tools, or native build. +lt_cv_to_tool_file_cmd=func_convert_file_noop +case $host in + *-*-mingw* ) + case $build in + *-*-mingw* ) # actually msys + lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32 + ;; + esac + ;; +esac +]) +to_tool_file_cmd=$lt_cv_to_tool_file_cmd +AC_MSG_RESULT([$lt_cv_to_tool_file_cmd]) +_LT_DECL([to_tool_file_cmd], [lt_cv_to_tool_file_cmd], + [0], [convert $build files to toolchain format])dnl +])# _LT_PATH_CONVERSION_FUNCTIONS + +# Helper functions for option handling. -*- Autoconf -*- +# +# Copyright (C) 2004, 2005, 2007, 2008, 2009 Free Software Foundation, +# Inc. +# Written by Gary V. Vaughan, 2004 +# +# This file is free software; the Free Software Foundation gives +# unlimited permission to copy and/or distribute it, with or without +# modifications, as long as this notice is preserved. + +# serial 7 ltoptions.m4 + +# This is to help aclocal find these macros, as it can't see m4_define. +AC_DEFUN([LTOPTIONS_VERSION], [m4_if([1])]) + + +# _LT_MANGLE_OPTION(MACRO-NAME, OPTION-NAME) +# ------------------------------------------ +m4_define([_LT_MANGLE_OPTION], +[[_LT_OPTION_]m4_bpatsubst($1__$2, [[^a-zA-Z0-9_]], [_])]) + + +# _LT_SET_OPTION(MACRO-NAME, OPTION-NAME) +# --------------------------------------- +# Set option OPTION-NAME for macro MACRO-NAME, and if there is a +# matching handler defined, dispatch to it. Other OPTION-NAMEs are +# saved as a flag. +m4_define([_LT_SET_OPTION], +[m4_define(_LT_MANGLE_OPTION([$1], [$2]))dnl +m4_ifdef(_LT_MANGLE_DEFUN([$1], [$2]), + _LT_MANGLE_DEFUN([$1], [$2]), + [m4_warning([Unknown $1 option `$2'])])[]dnl +]) + + +# _LT_IF_OPTION(MACRO-NAME, OPTION-NAME, IF-SET, [IF-NOT-SET]) +# ------------------------------------------------------------ +# Execute IF-SET if OPTION is set, IF-NOT-SET otherwise. +m4_define([_LT_IF_OPTION], +[m4_ifdef(_LT_MANGLE_OPTION([$1], [$2]), [$3], [$4])]) + + +# _LT_UNLESS_OPTIONS(MACRO-NAME, OPTION-LIST, IF-NOT-SET) +# ------------------------------------------------------- +# Execute IF-NOT-SET unless all options in OPTION-LIST for MACRO-NAME +# are set. +m4_define([_LT_UNLESS_OPTIONS], +[m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), + [m4_ifdef(_LT_MANGLE_OPTION([$1], _LT_Option), + [m4_define([$0_found])])])[]dnl +m4_ifdef([$0_found], [m4_undefine([$0_found])], [$3 +])[]dnl +]) + + +# _LT_SET_OPTIONS(MACRO-NAME, OPTION-LIST) +# ---------------------------------------- +# OPTION-LIST is a space-separated list of Libtool options associated +# with MACRO-NAME. If any OPTION has a matching handler declared with +# LT_OPTION_DEFINE, dispatch to that macro; otherwise complain about +# the unknown option and exit. +m4_defun([_LT_SET_OPTIONS], +[# Set options +m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), + [_LT_SET_OPTION([$1], _LT_Option)]) + +m4_if([$1],[LT_INIT],[ + dnl + dnl Simply set some default values (i.e off) if boolean options were not + dnl specified: + _LT_UNLESS_OPTIONS([LT_INIT], [dlopen], [enable_dlopen=no + ]) + _LT_UNLESS_OPTIONS([LT_INIT], [win32-dll], [enable_win32_dll=no + ]) + dnl + dnl If no reference was made to various pairs of opposing options, then + dnl we run the default mode handler for the pair. For example, if neither + dnl `shared' nor `disable-shared' was passed, we enable building of shared + dnl archives by default: + _LT_UNLESS_OPTIONS([LT_INIT], [shared disable-shared], [_LT_ENABLE_SHARED]) + _LT_UNLESS_OPTIONS([LT_INIT], [static disable-static], [_LT_ENABLE_STATIC]) + _LT_UNLESS_OPTIONS([LT_INIT], [pic-only no-pic], [_LT_WITH_PIC]) + _LT_UNLESS_OPTIONS([LT_INIT], [fast-install disable-fast-install], + [_LT_ENABLE_FAST_INSTALL]) + ]) +])# _LT_SET_OPTIONS + + + +# _LT_MANGLE_DEFUN(MACRO-NAME, OPTION-NAME) +# ----------------------------------------- +m4_define([_LT_MANGLE_DEFUN], +[[_LT_OPTION_DEFUN_]m4_bpatsubst(m4_toupper([$1__$2]), [[^A-Z0-9_]], [_])]) + + +# LT_OPTION_DEFINE(MACRO-NAME, OPTION-NAME, CODE) +# ----------------------------------------------- +m4_define([LT_OPTION_DEFINE], +[m4_define(_LT_MANGLE_DEFUN([$1], [$2]), [$3])[]dnl +])# LT_OPTION_DEFINE + + +# dlopen +# ------ +LT_OPTION_DEFINE([LT_INIT], [dlopen], [enable_dlopen=yes +]) + +AU_DEFUN([AC_LIBTOOL_DLOPEN], +[_LT_SET_OPTION([LT_INIT], [dlopen]) +AC_DIAGNOSE([obsolete], +[$0: Remove this warning and the call to _LT_SET_OPTION when you +put the `dlopen' option into LT_INIT's first parameter.]) +]) + +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_DLOPEN], []) + + +# win32-dll +# --------- +# Declare package support for building win32 dll's. +LT_OPTION_DEFINE([LT_INIT], [win32-dll], +[enable_win32_dll=yes + +case $host in +*-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-cegcc*) + AC_CHECK_TOOL(AS, as, false) + AC_CHECK_TOOL(DLLTOOL, dlltool, false) + AC_CHECK_TOOL(OBJDUMP, objdump, false) + ;; +esac + +test -z "$AS" && AS=as +_LT_DECL([], [AS], [1], [Assembler program])dnl + +test -z "$DLLTOOL" && DLLTOOL=dlltool +_LT_DECL([], [DLLTOOL], [1], [DLL creation program])dnl + +test -z "$OBJDUMP" && OBJDUMP=objdump +_LT_DECL([], [OBJDUMP], [1], [Object dumper program])dnl +])# win32-dll + +AU_DEFUN([AC_LIBTOOL_WIN32_DLL], +[AC_REQUIRE([AC_CANONICAL_HOST])dnl +_LT_SET_OPTION([LT_INIT], [win32-dll]) +AC_DIAGNOSE([obsolete], +[$0: Remove this warning and the call to _LT_SET_OPTION when you +put the `win32-dll' option into LT_INIT's first parameter.]) +]) + +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_WIN32_DLL], []) + + +# _LT_ENABLE_SHARED([DEFAULT]) +# ---------------------------- +# implement the --enable-shared flag, and supports the `shared' and +# `disable-shared' LT_INIT options. +# DEFAULT is either `yes' or `no'. If omitted, it defaults to `yes'. +m4_define([_LT_ENABLE_SHARED], +[m4_define([_LT_ENABLE_SHARED_DEFAULT], [m4_if($1, no, no, yes)])dnl +AC_ARG_ENABLE([shared], + [AS_HELP_STRING([--enable-shared@<:@=PKGS@:>@], + [build shared libraries @<:@default=]_LT_ENABLE_SHARED_DEFAULT[@:>@])], + [p=${PACKAGE-default} + case $enableval in + yes) enable_shared=yes ;; + no) enable_shared=no ;; + *) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," + for pkg in $enableval; do + IFS="$lt_save_ifs" + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$lt_save_ifs" + ;; + esac], + [enable_shared=]_LT_ENABLE_SHARED_DEFAULT) + + _LT_DECL([build_libtool_libs], [enable_shared], [0], + [Whether or not to build shared libraries]) +])# _LT_ENABLE_SHARED + +LT_OPTION_DEFINE([LT_INIT], [shared], [_LT_ENABLE_SHARED([yes])]) +LT_OPTION_DEFINE([LT_INIT], [disable-shared], [_LT_ENABLE_SHARED([no])]) + +# Old names: +AC_DEFUN([AC_ENABLE_SHARED], +[_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[shared]) +]) + +AC_DEFUN([AC_DISABLE_SHARED], +[_LT_SET_OPTION([LT_INIT], [disable-shared]) +]) + +AU_DEFUN([AM_ENABLE_SHARED], [AC_ENABLE_SHARED($@)]) +AU_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)]) + +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AM_ENABLE_SHARED], []) +dnl AC_DEFUN([AM_DISABLE_SHARED], []) + + + +# _LT_ENABLE_STATIC([DEFAULT]) +# ---------------------------- +# implement the --enable-static flag, and support the `static' and +# `disable-static' LT_INIT options. +# DEFAULT is either `yes' or `no'. If omitted, it defaults to `yes'. +m4_define([_LT_ENABLE_STATIC], +[m4_define([_LT_ENABLE_STATIC_DEFAULT], [m4_if($1, no, no, yes)])dnl +AC_ARG_ENABLE([static], + [AS_HELP_STRING([--enable-static@<:@=PKGS@:>@], + [build static libraries @<:@default=]_LT_ENABLE_STATIC_DEFAULT[@:>@])], + [p=${PACKAGE-default} + case $enableval in + yes) enable_static=yes ;; + no) enable_static=no ;; + *) + enable_static=no + # Look at the argument we got. We use all the common list separators. + lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," + for pkg in $enableval; do + IFS="$lt_save_ifs" + if test "X$pkg" = "X$p"; then + enable_static=yes + fi + done + IFS="$lt_save_ifs" + ;; + esac], + [enable_static=]_LT_ENABLE_STATIC_DEFAULT) + + _LT_DECL([build_old_libs], [enable_static], [0], + [Whether or not to build static libraries]) +])# _LT_ENABLE_STATIC + +LT_OPTION_DEFINE([LT_INIT], [static], [_LT_ENABLE_STATIC([yes])]) +LT_OPTION_DEFINE([LT_INIT], [disable-static], [_LT_ENABLE_STATIC([no])]) + +# Old names: +AC_DEFUN([AC_ENABLE_STATIC], +[_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[static]) +]) + +AC_DEFUN([AC_DISABLE_STATIC], +[_LT_SET_OPTION([LT_INIT], [disable-static]) +]) + +AU_DEFUN([AM_ENABLE_STATIC], [AC_ENABLE_STATIC($@)]) +AU_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)]) + +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AM_ENABLE_STATIC], []) +dnl AC_DEFUN([AM_DISABLE_STATIC], []) + + + +# _LT_ENABLE_FAST_INSTALL([DEFAULT]) +# ---------------------------------- +# implement the --enable-fast-install flag, and support the `fast-install' +# and `disable-fast-install' LT_INIT options. +# DEFAULT is either `yes' or `no'. If omitted, it defaults to `yes'. +m4_define([_LT_ENABLE_FAST_INSTALL], +[m4_define([_LT_ENABLE_FAST_INSTALL_DEFAULT], [m4_if($1, no, no, yes)])dnl +AC_ARG_ENABLE([fast-install], + [AS_HELP_STRING([--enable-fast-install@<:@=PKGS@:>@], + [optimize for fast installation @<:@default=]_LT_ENABLE_FAST_INSTALL_DEFAULT[@:>@])], + [p=${PACKAGE-default} + case $enableval in + yes) enable_fast_install=yes ;; + no) enable_fast_install=no ;; + *) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," + for pkg in $enableval; do + IFS="$lt_save_ifs" + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$lt_save_ifs" + ;; + esac], + [enable_fast_install=]_LT_ENABLE_FAST_INSTALL_DEFAULT) + +_LT_DECL([fast_install], [enable_fast_install], [0], + [Whether or not to optimize for fast installation])dnl +])# _LT_ENABLE_FAST_INSTALL + +LT_OPTION_DEFINE([LT_INIT], [fast-install], [_LT_ENABLE_FAST_INSTALL([yes])]) +LT_OPTION_DEFINE([LT_INIT], [disable-fast-install], [_LT_ENABLE_FAST_INSTALL([no])]) + +# Old names: +AU_DEFUN([AC_ENABLE_FAST_INSTALL], +[_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[fast-install]) +AC_DIAGNOSE([obsolete], +[$0: Remove this warning and the call to _LT_SET_OPTION when you put +the `fast-install' option into LT_INIT's first parameter.]) +]) + +AU_DEFUN([AC_DISABLE_FAST_INSTALL], +[_LT_SET_OPTION([LT_INIT], [disable-fast-install]) +AC_DIAGNOSE([obsolete], +[$0: Remove this warning and the call to _LT_SET_OPTION when you put +the `disable-fast-install' option into LT_INIT's first parameter.]) +]) + +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_ENABLE_FAST_INSTALL], []) +dnl AC_DEFUN([AM_DISABLE_FAST_INSTALL], []) + + +# _LT_WITH_PIC([MODE]) +# -------------------- +# implement the --with-pic flag, and support the `pic-only' and `no-pic' +# LT_INIT options. +# MODE is either `yes' or `no'. If omitted, it defaults to `both'. +m4_define([_LT_WITH_PIC], +[AC_ARG_WITH([pic], + [AS_HELP_STRING([--with-pic@<:@=PKGS@:>@], + [try to use only PIC/non-PIC objects @<:@default=use both@:>@])], + [lt_p=${PACKAGE-default} + case $withval in + yes|no) pic_mode=$withval ;; + *) + pic_mode=default + # Look at the argument we got. We use all the common list separators. + lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," + for lt_pkg in $withval; do + IFS="$lt_save_ifs" + if test "X$lt_pkg" = "X$lt_p"; then + pic_mode=yes + fi + done + IFS="$lt_save_ifs" + ;; + esac], + [pic_mode=default]) + +test -z "$pic_mode" && pic_mode=m4_default([$1], [default]) + +_LT_DECL([], [pic_mode], [0], [What type of objects to build])dnl +])# _LT_WITH_PIC + +LT_OPTION_DEFINE([LT_INIT], [pic-only], [_LT_WITH_PIC([yes])]) +LT_OPTION_DEFINE([LT_INIT], [no-pic], [_LT_WITH_PIC([no])]) + +# Old name: +AU_DEFUN([AC_LIBTOOL_PICMODE], +[_LT_SET_OPTION([LT_INIT], [pic-only]) +AC_DIAGNOSE([obsolete], +[$0: Remove this warning and the call to _LT_SET_OPTION when you +put the `pic-only' option into LT_INIT's first parameter.]) +]) + +dnl aclocal-1.4 backwards compatibility: +dnl AC_DEFUN([AC_LIBTOOL_PICMODE], []) + + +m4_define([_LTDL_MODE], []) +LT_OPTION_DEFINE([LTDL_INIT], [nonrecursive], + [m4_define([_LTDL_MODE], [nonrecursive])]) +LT_OPTION_DEFINE([LTDL_INIT], [recursive], + [m4_define([_LTDL_MODE], [recursive])]) +LT_OPTION_DEFINE([LTDL_INIT], [subproject], + [m4_define([_LTDL_MODE], [subproject])]) + +m4_define([_LTDL_TYPE], []) +LT_OPTION_DEFINE([LTDL_INIT], [installable], + [m4_define([_LTDL_TYPE], [installable])]) +LT_OPTION_DEFINE([LTDL_INIT], [convenience], + [m4_define([_LTDL_TYPE], [convenience])]) + +# ltsugar.m4 -- libtool m4 base layer. -*-Autoconf-*- +# +# Copyright (C) 2004, 2005, 2007, 2008 Free Software Foundation, Inc. +# Written by Gary V. Vaughan, 2004 +# +# This file is free software; the Free Software Foundation gives +# unlimited permission to copy and/or distribute it, with or without +# modifications, as long as this notice is preserved. + +# serial 6 ltsugar.m4 + +# This is to help aclocal find these macros, as it can't see m4_define. +AC_DEFUN([LTSUGAR_VERSION], [m4_if([0.1])]) + + +# lt_join(SEP, ARG1, [ARG2...]) +# ----------------------------- +# Produce ARG1SEPARG2...SEPARGn, omitting [] arguments and their +# associated separator. +# Needed until we can rely on m4_join from Autoconf 2.62, since all earlier +# versions in m4sugar had bugs. +m4_define([lt_join], +[m4_if([$#], [1], [], + [$#], [2], [[$2]], + [m4_if([$2], [], [], [[$2]_])$0([$1], m4_shift(m4_shift($@)))])]) +m4_define([_lt_join], +[m4_if([$#$2], [2], [], + [m4_if([$2], [], [], [[$1$2]])$0([$1], m4_shift(m4_shift($@)))])]) + + +# lt_car(LIST) +# lt_cdr(LIST) +# ------------ +# Manipulate m4 lists. +# These macros are necessary as long as will still need to support +# Autoconf-2.59 which quotes differently. +m4_define([lt_car], [[$1]]) +m4_define([lt_cdr], +[m4_if([$#], 0, [m4_fatal([$0: cannot be called without arguments])], + [$#], 1, [], + [m4_dquote(m4_shift($@))])]) +m4_define([lt_unquote], $1) + + +# lt_append(MACRO-NAME, STRING, [SEPARATOR]) +# ------------------------------------------ +# Redefine MACRO-NAME to hold its former content plus `SEPARATOR'`STRING'. +# Note that neither SEPARATOR nor STRING are expanded; they are appended +# to MACRO-NAME as is (leaving the expansion for when MACRO-NAME is invoked). +# No SEPARATOR is output if MACRO-NAME was previously undefined (different +# than defined and empty). +# +# This macro is needed until we can rely on Autoconf 2.62, since earlier +# versions of m4sugar mistakenly expanded SEPARATOR but not STRING. +m4_define([lt_append], +[m4_define([$1], + m4_ifdef([$1], [m4_defn([$1])[$3]])[$2])]) + + + +# lt_combine(SEP, PREFIX-LIST, INFIX, SUFFIX1, [SUFFIX2...]) +# ---------------------------------------------------------- +# Produce a SEP delimited list of all paired combinations of elements of +# PREFIX-LIST with SUFFIX1 through SUFFIXn. Each element of the list +# has the form PREFIXmINFIXSUFFIXn. +# Needed until we can rely on m4_combine added in Autoconf 2.62. +m4_define([lt_combine], +[m4_if(m4_eval([$# > 3]), [1], + [m4_pushdef([_Lt_sep], [m4_define([_Lt_sep], m4_defn([lt_car]))])]]dnl +[[m4_foreach([_Lt_prefix], [$2], + [m4_foreach([_Lt_suffix], + ]m4_dquote(m4_dquote(m4_shift(m4_shift(m4_shift($@)))))[, + [_Lt_sep([$1])[]m4_defn([_Lt_prefix])[$3]m4_defn([_Lt_suffix])])])])]) + + +# lt_if_append_uniq(MACRO-NAME, VARNAME, [SEPARATOR], [UNIQ], [NOT-UNIQ]) +# ----------------------------------------------------------------------- +# Iff MACRO-NAME does not yet contain VARNAME, then append it (delimited +# by SEPARATOR if supplied) and expand UNIQ, else NOT-UNIQ. +m4_define([lt_if_append_uniq], +[m4_ifdef([$1], + [m4_if(m4_index([$3]m4_defn([$1])[$3], [$3$2$3]), [-1], + [lt_append([$1], [$2], [$3])$4], + [$5])], + [lt_append([$1], [$2], [$3])$4])]) + + +# lt_dict_add(DICT, KEY, VALUE) +# ----------------------------- +m4_define([lt_dict_add], +[m4_define([$1($2)], [$3])]) + + +# lt_dict_add_subkey(DICT, KEY, SUBKEY, VALUE) +# -------------------------------------------- +m4_define([lt_dict_add_subkey], +[m4_define([$1($2:$3)], [$4])]) + + +# lt_dict_fetch(DICT, KEY, [SUBKEY]) +# ---------------------------------- +m4_define([lt_dict_fetch], +[m4_ifval([$3], + m4_ifdef([$1($2:$3)], [m4_defn([$1($2:$3)])]), + m4_ifdef([$1($2)], [m4_defn([$1($2)])]))]) + + +# lt_if_dict_fetch(DICT, KEY, [SUBKEY], VALUE, IF-TRUE, [IF-FALSE]) +# ----------------------------------------------------------------- +m4_define([lt_if_dict_fetch], +[m4_if(lt_dict_fetch([$1], [$2], [$3]), [$4], + [$5], + [$6])]) + + +# lt_dict_filter(DICT, [SUBKEY], VALUE, [SEPARATOR], KEY, [...]) +# -------------------------------------------------------------- +m4_define([lt_dict_filter], +[m4_if([$5], [], [], + [lt_join(m4_quote(m4_default([$4], [[, ]])), + lt_unquote(m4_split(m4_normalize(m4_foreach(_Lt_key, lt_car([m4_shiftn(4, $@)]), + [lt_if_dict_fetch([$1], _Lt_key, [$2], [$3], [_Lt_key ])])))))])[]dnl +]) + +# ltversion.m4 -- version numbers -*- Autoconf -*- +# +# Copyright (C) 2004 Free Software Foundation, Inc. +# Written by Scott James Remnant, 2004 +# +# This file is free software; the Free Software Foundation gives +# unlimited permission to copy and/or distribute it, with or without +# modifications, as long as this notice is preserved. + +# @configure_input@ + +# serial 3337 ltversion.m4 +# This file is part of GNU Libtool + +m4_define([LT_PACKAGE_VERSION], [2.4.2]) +m4_define([LT_PACKAGE_REVISION], [1.3337]) + +AC_DEFUN([LTVERSION_VERSION], +[macro_version='2.4.2' +macro_revision='1.3337' +_LT_DECL(, macro_version, 0, [Which release of libtool.m4 was used?]) +_LT_DECL(, macro_revision, 0) +]) + +# lt~obsolete.m4 -- aclocal satisfying obsolete definitions. -*-Autoconf-*- +# +# Copyright (C) 2004, 2005, 2007, 2009 Free Software Foundation, Inc. +# Written by Scott James Remnant, 2004. +# +# This file is free software; the Free Software Foundation gives +# unlimited permission to copy and/or distribute it, with or without +# modifications, as long as this notice is preserved. + +# serial 5 lt~obsolete.m4 + +# These exist entirely to fool aclocal when bootstrapping libtool. +# +# In the past libtool.m4 has provided macros via AC_DEFUN (or AU_DEFUN) +# which have later been changed to m4_define as they aren't part of the +# exported API, or moved to Autoconf or Automake where they belong. +# +# The trouble is, aclocal is a bit thick. It'll see the old AC_DEFUN +# in /usr/share/aclocal/libtool.m4 and remember it, then when it sees us +# using a macro with the same name in our local m4/libtool.m4 it'll +# pull the old libtool.m4 in (it doesn't see our shiny new m4_define +# and doesn't know about Autoconf macros at all.) +# +# So we provide this file, which has a silly filename so it's always +# included after everything else. This provides aclocal with the +# AC_DEFUNs it wants, but when m4 processes it, it doesn't do anything +# because those macros already exist, or will be overwritten later. +# We use AC_DEFUN over AU_DEFUN for compatibility with aclocal-1.6. +# +# Anytime we withdraw an AC_DEFUN or AU_DEFUN, remember to add it here. +# Yes, that means every name once taken will need to remain here until +# we give up compatibility with versions before 1.7, at which point +# we need to keep only those names which we still refer to. + +# This is to help aclocal find these macros, as it can't see m4_define. +AC_DEFUN([LTOBSOLETE_VERSION], [m4_if([1])]) + +m4_ifndef([AC_LIBTOOL_LINKER_OPTION], [AC_DEFUN([AC_LIBTOOL_LINKER_OPTION])]) +m4_ifndef([AC_PROG_EGREP], [AC_DEFUN([AC_PROG_EGREP])]) +m4_ifndef([_LT_AC_PROG_ECHO_BACKSLASH], [AC_DEFUN([_LT_AC_PROG_ECHO_BACKSLASH])]) +m4_ifndef([_LT_AC_SHELL_INIT], [AC_DEFUN([_LT_AC_SHELL_INIT])]) +m4_ifndef([_LT_AC_SYS_LIBPATH_AIX], [AC_DEFUN([_LT_AC_SYS_LIBPATH_AIX])]) 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[AC_DEFUN([_LT_PROG_F77])]) +m4_ifndef([_LT_PROG_FC], [AC_DEFUN([_LT_PROG_FC])]) +m4_ifndef([_LT_PROG_CXX], [AC_DEFUN([_LT_PROG_CXX])]) + +# pkg.m4 - Macros to locate and utilise pkg-config. -*- Autoconf -*- +# serial 1 (pkg-config-0.24) +# +# Copyright © 2004 Scott James Remnant . +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# PKG_PROG_PKG_CONFIG([MIN-VERSION]) +# ---------------------------------- +AC_DEFUN([PKG_PROG_PKG_CONFIG], +[m4_pattern_forbid([^_?PKG_[A-Z_]+$]) +m4_pattern_allow([^PKG_CONFIG(_(PATH|LIBDIR|SYSROOT_DIR|ALLOW_SYSTEM_(CFLAGS|LIBS)))?$]) +m4_pattern_allow([^PKG_CONFIG_(DISABLE_UNINSTALLED|TOP_BUILD_DIR|DEBUG_SPEW)$]) +AC_ARG_VAR([PKG_CONFIG], [path to pkg-config utility]) +AC_ARG_VAR([PKG_CONFIG_PATH], [directories to add to pkg-config's search path]) +AC_ARG_VAR([PKG_CONFIG_LIBDIR], [path overriding pkg-config's built-in search path]) + +if test "x$ac_cv_env_PKG_CONFIG_set" != "xset"; then + AC_PATH_TOOL([PKG_CONFIG], [pkg-config]) +fi +if test -n "$PKG_CONFIG"; then + _pkg_min_version=m4_default([$1], [0.9.0]) + AC_MSG_CHECKING([pkg-config is at least version $_pkg_min_version]) + if $PKG_CONFIG --atleast-pkgconfig-version $_pkg_min_version; then + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([no]) + PKG_CONFIG="" + fi +fi[]dnl +])# PKG_PROG_PKG_CONFIG + +# PKG_CHECK_EXISTS(MODULES, [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND]) +# +# Check to see whether a particular set of modules exists. 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Errors in the 'id' calls + # below are definitely unexpected, so allow the users to see them + # (that is, avoid stderr redirection). + am_uid=`id -u || echo unknown` + am_gid=`id -g || echo unknown` + AC_MSG_CHECKING([whether UID '$am_uid' is supported by ustar format]) + if test $am_uid -le $am_max_uid; then + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([no]) + _am_tools=none + fi + AC_MSG_CHECKING([whether GID '$am_gid' is supported by ustar format]) + if test $am_gid -le $am_max_gid; then + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([no]) + _am_tools=none + fi], + + [pax], + [], + + [m4_fatal([Unknown tar format])]) + + AC_MSG_CHECKING([how to create a $1 tar archive]) + + # Go ahead even if we have the value already cached. We do so because we + # need to set the values for the 'am__tar' and 'am__untar' variables. + _am_tools=${am_cv_prog_tar_$1-$_am_tools} + + for _am_tool in $_am_tools; do + case $_am_tool in + gnutar) + for _am_tar in tar gnutar gtar; do + AM_RUN_LOG([$_am_tar --version]) && break + done + am__tar="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$$tardir"' + am__tar_="$_am_tar --format=m4_if([$1], [pax], [posix], [$1]) -chf - "'"$tardir"' + am__untar="$_am_tar -xf -" + ;; + plaintar) + # Must skip GNU tar: if it does not support --format= it doesn't create + # ustar tarball either. + (tar --version) >/dev/null 2>&1 && continue + am__tar='tar chf - "$$tardir"' + am__tar_='tar chf - "$tardir"' + am__untar='tar xf -' + ;; + pax) + am__tar='pax -L -x $1 -w "$$tardir"' + am__tar_='pax -L -x $1 -w "$tardir"' + am__untar='pax -r' + ;; + cpio) + am__tar='find "$$tardir" -print | cpio -o -H $1 -L' + am__tar_='find "$tardir" -print | cpio -o -H $1 -L' + am__untar='cpio -i -H $1 -d' + ;; + none) + am__tar=false + am__tar_=false + am__untar=false + ;; + esac + + # If the value was cached, stop now. We just wanted to have am__tar + # and am__untar set. + test -n "${am_cv_prog_tar_$1}" && break + + # tar/untar a dummy directory, and stop if the command works. + rm -rf conftest.dir + mkdir conftest.dir + echo GrepMe > conftest.dir/file + AM_RUN_LOG([tardir=conftest.dir && eval $am__tar_ >conftest.tar]) + rm -rf conftest.dir + if test -s conftest.tar; then + AM_RUN_LOG([$am__untar /dev/null 2>&1 && break + fi + done + rm -rf conftest.dir + + AC_CACHE_VAL([am_cv_prog_tar_$1], [am_cv_prog_tar_$1=$_am_tool]) + AC_MSG_RESULT([$am_cv_prog_tar_$1])]) + +AC_SUBST([am__tar]) +AC_SUBST([am__untar]) +]) # _AM_PROG_TAR + diff -Nru intel-vaapi-driver-1.0.15/Android.mk intel-vaapi-driver-1.7.1/Android.mk --- intel-vaapi-driver-1.0.15/Android.mk 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/Android.mk 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,4 @@ +# Recursive call sub-folder Android.mk +# + + include $(call all-subdir-makefiles) diff -Nru intel-vaapi-driver-1.0.15/autogen.sh intel-vaapi-driver-1.7.1/autogen.sh --- intel-vaapi-driver-1.0.15/autogen.sh 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/autogen.sh 1970-01-01 00:00:00.000000000 +0000 @@ -1,3 +0,0 @@ -#! /bin/sh -autoreconf -v --install -./configure "$@" diff -Nru intel-vaapi-driver-1.0.15/compile intel-vaapi-driver-1.7.1/compile --- intel-vaapi-driver-1.0.15/compile 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/compile 2016-02-22 04:30:56.000000000 +0000 @@ -0,0 +1,347 @@ +#! /bin/sh +# Wrapper for compilers which do not understand '-c -o'. + +scriptversion=2012-10-14.11; # UTC + +# Copyright (C) 1999-2013 Free Software Foundation, Inc. +# Written by Tom Tromey . +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# This file is maintained in Automake, please report +# bugs to or send patches to +# . + +nl=' +' + +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent tools from complaining about whitespace usage. +IFS=" "" $nl" + +file_conv= + +# func_file_conv build_file lazy +# Convert a $build file to $host form and store it in $file +# Currently only supports Windows hosts. If the determined conversion +# type is listed in (the comma separated) LAZY, no conversion will +# take place. +func_file_conv () +{ + file=$1 + case $file in + / | /[!/]*) # absolute file, and not a UNC file + if test -z "$file_conv"; then + # lazily determine how to convert abs files + case `uname -s` in + MINGW*) + file_conv=mingw + ;; + CYGWIN*) + file_conv=cygwin + ;; + *) + file_conv=wine + ;; + esac + fi + case $file_conv/,$2, in + *,$file_conv,*) + ;; + mingw/*) + file=`cmd //C echo "$file " | sed -e 's/"\(.*\) " *$/\1/'` + ;; + cygwin/*) + file=`cygpath -m "$file" || echo "$file"` + ;; + wine/*) + file=`winepath -w "$file" || echo "$file"` + ;; + esac + ;; + esac +} + +# func_cl_dashL linkdir +# Make cl look for libraries in LINKDIR +func_cl_dashL () +{ + func_file_conv "$1" + if test -z "$lib_path"; then + lib_path=$file + else + lib_path="$lib_path;$file" + fi + linker_opts="$linker_opts -LIBPATH:$file" +} + +# func_cl_dashl library +# Do a library search-path lookup for cl +func_cl_dashl () +{ + lib=$1 + found=no + save_IFS=$IFS + IFS=';' + for dir in $lib_path $LIB + do + IFS=$save_IFS + if $shared && test -f "$dir/$lib.dll.lib"; then + found=yes + lib=$dir/$lib.dll.lib + break + fi + if test -f "$dir/$lib.lib"; then + found=yes + lib=$dir/$lib.lib + break + fi + if test -f "$dir/lib$lib.a"; then + found=yes + lib=$dir/lib$lib.a + break + fi + done + IFS=$save_IFS + + if test "$found" != yes; then + lib=$lib.lib + fi +} + +# func_cl_wrapper cl arg... +# Adjust compile command to suit cl +func_cl_wrapper () +{ + # Assume a capable shell + lib_path= + shared=: + linker_opts= + for arg + do + if test -n "$eat"; then + eat= + else + case $1 in + -o) + # configure might choose to run compile as 'compile cc -o foo foo.c'. + eat=1 + case $2 in + *.o | *.[oO][bB][jJ]) + func_file_conv "$2" + set x "$@" -Fo"$file" + shift + ;; + *) + func_file_conv "$2" + set x "$@" -Fe"$file" + shift + ;; + esac + ;; + -I) + eat=1 + func_file_conv "$2" mingw + set x "$@" -I"$file" + shift + ;; + -I*) + func_file_conv "${1#-I}" mingw + set x "$@" -I"$file" + shift + ;; + -l) + eat=1 + func_cl_dashl "$2" + set x "$@" "$lib" + shift + ;; + -l*) + func_cl_dashl "${1#-l}" + set x "$@" "$lib" + shift + ;; + -L) + eat=1 + func_cl_dashL "$2" + ;; + -L*) + func_cl_dashL "${1#-L}" + ;; + -static) + shared=false + ;; + -Wl,*) + arg=${1#-Wl,} + save_ifs="$IFS"; IFS=',' + for flag in $arg; do + IFS="$save_ifs" + linker_opts="$linker_opts $flag" + done + IFS="$save_ifs" + ;; + -Xlinker) + eat=1 + linker_opts="$linker_opts $2" + ;; + -*) + set x "$@" "$1" + shift + ;; + *.cc | *.CC | *.cxx | *.CXX | *.[cC]++) + func_file_conv "$1" + set x "$@" -Tp"$file" + shift + ;; + *.c | *.cpp | *.CPP | *.lib | *.LIB | *.Lib | *.OBJ | *.obj | *.[oO]) + func_file_conv "$1" mingw + set x "$@" "$file" + shift + ;; + *) + set x "$@" "$1" + shift + ;; + esac + fi + shift + done + if test -n "$linker_opts"; then + linker_opts="-link$linker_opts" + fi + exec "$@" $linker_opts + exit 1 +} + +eat= + +case $1 in + '') + echo "$0: No command. Try '$0 --help' for more information." 1>&2 + exit 1; + ;; + -h | --h*) + cat <<\EOF +Usage: compile [--help] [--version] PROGRAM [ARGS] + +Wrapper for compilers which do not understand '-c -o'. +Remove '-o dest.o' from ARGS, run PROGRAM with the remaining +arguments, and rename the output as expected. + +If you are trying to build a whole package this is not the +right script to run: please start by reading the file 'INSTALL'. + +Report bugs to . +EOF + exit $? + ;; + -v | --v*) + echo "compile $scriptversion" + exit $? + ;; + cl | *[/\\]cl | cl.exe | *[/\\]cl.exe ) + func_cl_wrapper "$@" # Doesn't return... + ;; +esac + +ofile= +cfile= + +for arg +do + if test -n "$eat"; then + eat= + else + case $1 in + -o) + # configure might choose to run compile as 'compile cc -o foo foo.c'. + # So we strip '-o arg' only if arg is an object. + eat=1 + case $2 in + *.o | *.obj) + ofile=$2 + ;; + *) + set x "$@" -o "$2" + shift + ;; + esac + ;; + *.c) + cfile=$1 + set x "$@" "$1" + shift + ;; + *) + set x "$@" "$1" + shift + ;; + esac + fi + shift +done + +if test -z "$ofile" || test -z "$cfile"; then + # If no '-o' option was seen then we might have been invoked from a + # pattern rule where we don't need one. That is ok -- this is a + # normal compilation that the losing compiler can handle. If no + # '.c' file was seen then we are probably linking. That is also + # ok. + exec "$@" +fi + +# Name of file we expect compiler to create. +cofile=`echo "$cfile" | sed 's|^.*[\\/]||; s|^[a-zA-Z]:||; s/\.c$/.o/'` + +# Create the lock directory. +# Note: use '[/\\:.-]' here to ensure that we don't use the same name +# that we are using for the .o file. Also, base the name on the expected +# object file name, since that is what matters with a parallel build. +lockdir=`echo "$cofile" | sed -e 's|[/\\:.-]|_|g'`.d +while true; do + if mkdir "$lockdir" >/dev/null 2>&1; then + break + fi + sleep 1 +done +# FIXME: race condition here if user kills between mkdir and trap. +trap "rmdir '$lockdir'; exit 1" 1 2 15 + +# Run the compile. +"$@" +ret=$? + +if test -f "$cofile"; then + test "$cofile" = "$ofile" || mv "$cofile" "$ofile" +elif test -f "${cofile}bj"; then + test "${cofile}bj" = "$ofile" || mv "${cofile}bj" "$ofile" +fi + +rmdir "$lockdir" +exit $ret + +# Local Variables: +# mode: shell-script +# sh-indentation: 2 +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-time-zone: "UTC" +# time-stamp-end: "; # UTC" +# End: diff -Nru intel-vaapi-driver-1.0.15/config.guess intel-vaapi-driver-1.7.1/config.guess --- intel-vaapi-driver-1.0.15/config.guess 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/config.guess 2016-02-22 04:30:56.000000000 +0000 @@ -0,0 +1,1558 @@ +#! /bin/sh +# Attempt to guess a canonical system name. +# Copyright 1992-2013 Free Software Foundation, Inc. + +timestamp='2013-06-10' + +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, see . +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that +# program. This Exception is an additional permission under section 7 +# of the GNU General Public License, version 3 ("GPLv3"). +# +# Originally written by Per Bothner. +# +# You can get the latest version of this script from: +# http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD +# +# Please send patches with a ChangeLog entry to config-patches@gnu.org. + + +me=`echo "$0" | sed -e 's,.*/,,'` + +usage="\ +Usage: $0 [OPTION] + +Output the configuration name of the system \`$me' is run on. + +Operation modes: + -h, --help print this help, then exit + -t, --time-stamp print date of last modification, then exit + -v, --version print version number, then exit + +Report bugs and patches to ." + +version="\ +GNU config.guess ($timestamp) + +Originally written by Per Bothner. +Copyright 1992-2013 Free Software Foundation, Inc. + +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." + +help=" +Try \`$me --help' for more information." + +# Parse command line +while test $# -gt 0 ; do + case $1 in + --time-stamp | --time* | -t ) + echo "$timestamp" ; exit ;; + --version | -v ) + echo "$version" ; exit ;; + --help | --h* | -h ) + echo "$usage"; exit ;; + -- ) # Stop option processing + shift; break ;; + - ) # Use stdin as input. + break ;; + -* ) + echo "$me: invalid option $1$help" >&2 + exit 1 ;; + * ) + break ;; + esac +done + +if test $# != 0; then + echo "$me: too many arguments$help" >&2 + exit 1 +fi + +trap 'exit 1' 1 2 15 + +# CC_FOR_BUILD -- compiler used by this script. Note that the use of a +# compiler to aid in system detection is discouraged as it requires +# temporary files to be created and, as you can see below, it is a +# headache to deal with in a portable fashion. + +# Historically, `CC_FOR_BUILD' used to be named `HOST_CC'. We still +# use `HOST_CC' if defined, but it is deprecated. + +# Portable tmp directory creation inspired by the Autoconf team. + +set_cc_for_build=' +trap "exitcode=\$?; (rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null) && exit \$exitcode" 0 ; +trap "rm -f \$tmpfiles 2>/dev/null; rmdir \$tmp 2>/dev/null; exit 1" 1 2 13 15 ; +: ${TMPDIR=/tmp} ; + { tmp=`(umask 077 && mktemp -d "$TMPDIR/cgXXXXXX") 2>/dev/null` && test -n "$tmp" && test -d "$tmp" ; } || + { test -n "$RANDOM" && tmp=$TMPDIR/cg$$-$RANDOM && (umask 077 && mkdir $tmp) ; } || + { tmp=$TMPDIR/cg-$$ && (umask 077 && mkdir $tmp) && echo "Warning: creating insecure temp directory" >&2 ; } || + { echo "$me: cannot create a temporary directory in $TMPDIR" >&2 ; exit 1 ; } ; +dummy=$tmp/dummy ; +tmpfiles="$dummy.c $dummy.o $dummy.rel $dummy" ; +case $CC_FOR_BUILD,$HOST_CC,$CC in + ,,) echo "int x;" > $dummy.c ; + for c in cc gcc c89 c99 ; do + if ($c -c -o $dummy.o $dummy.c) >/dev/null 2>&1 ; then + CC_FOR_BUILD="$c"; break ; + fi ; + done ; + if test x"$CC_FOR_BUILD" = x ; then + CC_FOR_BUILD=no_compiler_found ; + fi + ;; + ,,*) CC_FOR_BUILD=$CC ;; + ,*,*) CC_FOR_BUILD=$HOST_CC ;; +esac ; set_cc_for_build= ;' + +# This is needed to find uname on a Pyramid OSx when run in the BSD universe. +# (ghazi@noc.rutgers.edu 1994-08-24) +if (test -f /.attbin/uname) >/dev/null 2>&1 ; then + PATH=$PATH:/.attbin ; export PATH +fi + +UNAME_MACHINE=`(uname -m) 2>/dev/null` || UNAME_MACHINE=unknown +UNAME_RELEASE=`(uname -r) 2>/dev/null` || UNAME_RELEASE=unknown +UNAME_SYSTEM=`(uname -s) 2>/dev/null` || UNAME_SYSTEM=unknown +UNAME_VERSION=`(uname -v) 2>/dev/null` || UNAME_VERSION=unknown + +case "${UNAME_SYSTEM}" in +Linux|GNU|GNU/*) + # If the system lacks a compiler, then just pick glibc. + # We could probably try harder. + LIBC=gnu + + eval $set_cc_for_build + cat <<-EOF > $dummy.c + #include + #if defined(__UCLIBC__) + LIBC=uclibc + #elif defined(__dietlibc__) + LIBC=dietlibc + #else + LIBC=gnu + #endif + EOF + eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^LIBC'` + ;; +esac + +# Note: order is significant - the case branches are not exclusive. + +case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in + *:NetBSD:*:*) + # NetBSD (nbsd) targets should (where applicable) match one or + # more of the tuples: *-*-netbsdelf*, *-*-netbsdaout*, + # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently + # switched to ELF, *-*-netbsd* would select the old + # object file format. This provides both forward + # compatibility and a consistent mechanism for selecting the + # object file format. + # + # Note: NetBSD doesn't particularly care about the vendor + # portion of the name. We always set it to "unknown". + sysctl="sysctl -n hw.machine_arch" + UNAME_MACHINE_ARCH=`(/sbin/$sysctl 2>/dev/null || \ + /usr/sbin/$sysctl 2>/dev/null || echo unknown)` + case "${UNAME_MACHINE_ARCH}" in + armeb) machine=armeb-unknown ;; + arm*) machine=arm-unknown ;; + sh3el) machine=shl-unknown ;; + sh3eb) machine=sh-unknown ;; + sh5el) machine=sh5le-unknown ;; + *) machine=${UNAME_MACHINE_ARCH}-unknown ;; + esac + # The Operating System including object format, if it has switched + # to ELF recently, or will in the future. + case "${UNAME_MACHINE_ARCH}" in + arm*|i386|m68k|ns32k|sh3*|sparc|vax) + eval $set_cc_for_build + if echo __ELF__ | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep -q __ELF__ + then + # Once all utilities can be ECOFF (netbsdecoff) or a.out (netbsdaout). + # Return netbsd for either. FIX? + os=netbsd + else + os=netbsdelf + fi + ;; + *) + os=netbsd + ;; + esac + # The OS release + # Debian GNU/NetBSD machines have a different userland, and + # thus, need a distinct triplet. However, they do not need + # kernel version information, so it can be replaced with a + # suitable tag, in the style of linux-gnu. + case "${UNAME_VERSION}" in + Debian*) + release='-gnu' + ;; + *) + release=`echo ${UNAME_RELEASE}|sed -e 's/[-_].*/\./'` + ;; + esac + # Since CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM: + # contains redundant information, the shorter form: + # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. + echo "${machine}-${os}${release}" + exit ;; + *:Bitrig:*:*) + UNAME_MACHINE_ARCH=`arch | sed 's/Bitrig.//'` + echo ${UNAME_MACHINE_ARCH}-unknown-bitrig${UNAME_RELEASE} + exit ;; + *:OpenBSD:*:*) + UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'` + echo ${UNAME_MACHINE_ARCH}-unknown-openbsd${UNAME_RELEASE} + exit ;; + *:ekkoBSD:*:*) + echo ${UNAME_MACHINE}-unknown-ekkobsd${UNAME_RELEASE} + exit ;; + *:SolidBSD:*:*) + echo ${UNAME_MACHINE}-unknown-solidbsd${UNAME_RELEASE} + exit ;; + macppc:MirBSD:*:*) + echo powerpc-unknown-mirbsd${UNAME_RELEASE} + exit ;; + *:MirBSD:*:*) + echo ${UNAME_MACHINE}-unknown-mirbsd${UNAME_RELEASE} + exit ;; + alpha:OSF1:*:*) + case $UNAME_RELEASE in + *4.0) + UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $3}'` + ;; + *5.*) + UNAME_RELEASE=`/usr/sbin/sizer -v | awk '{print $4}'` + ;; + esac + # According to Compaq, /usr/sbin/psrinfo has been available on + # OSF/1 and Tru64 systems produced since 1995. I hope that + # covers most systems running today. This code pipes the CPU + # types through head -n 1, so we only detect the type of CPU 0. + ALPHA_CPU_TYPE=`/usr/sbin/psrinfo -v | sed -n -e 's/^ The alpha \(.*\) processor.*$/\1/p' | head -n 1` + case "$ALPHA_CPU_TYPE" in + "EV4 (21064)") + UNAME_MACHINE="alpha" ;; + "EV4.5 (21064)") + UNAME_MACHINE="alpha" ;; + "LCA4 (21066/21068)") + UNAME_MACHINE="alpha" ;; + "EV5 (21164)") + UNAME_MACHINE="alphaev5" ;; + "EV5.6 (21164A)") + UNAME_MACHINE="alphaev56" ;; + "EV5.6 (21164PC)") + UNAME_MACHINE="alphapca56" ;; + "EV5.7 (21164PC)") + UNAME_MACHINE="alphapca57" ;; + "EV6 (21264)") + UNAME_MACHINE="alphaev6" ;; + "EV6.7 (21264A)") + UNAME_MACHINE="alphaev67" ;; + "EV6.8CB (21264C)") + UNAME_MACHINE="alphaev68" ;; + "EV6.8AL (21264B)") + UNAME_MACHINE="alphaev68" ;; + "EV6.8CX (21264D)") + UNAME_MACHINE="alphaev68" ;; + "EV6.9A (21264/EV69A)") + UNAME_MACHINE="alphaev69" ;; + "EV7 (21364)") + UNAME_MACHINE="alphaev7" ;; + "EV7.9 (21364A)") + UNAME_MACHINE="alphaev79" ;; + esac + # A Pn.n version is a patched version. + # A Vn.n version is a released version. + # A Tn.n version is a released field test version. + # A Xn.n version is an unreleased experimental baselevel. + # 1.2 uses "1.2" for uname -r. + echo ${UNAME_MACHINE}-dec-osf`echo ${UNAME_RELEASE} | sed -e 's/^[PVTX]//' | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + # Reset EXIT trap before exiting to avoid spurious non-zero exit code. + exitcode=$? + trap '' 0 + exit $exitcode ;; + Alpha\ *:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # Should we change UNAME_MACHINE based on the output of uname instead + # of the specific Alpha model? + echo alpha-pc-interix + exit ;; + 21064:Windows_NT:50:3) + echo alpha-dec-winnt3.5 + exit ;; + Amiga*:UNIX_System_V:4.0:*) + echo m68k-unknown-sysv4 + exit ;; + *:[Aa]miga[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-amigaos + exit ;; + *:[Mm]orph[Oo][Ss]:*:*) + echo ${UNAME_MACHINE}-unknown-morphos + exit ;; + *:OS/390:*:*) + echo i370-ibm-openedition + exit ;; + *:z/VM:*:*) + echo s390-ibm-zvmoe + exit ;; + *:OS400:*:*) + echo powerpc-ibm-os400 + exit ;; + arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*) + echo arm-acorn-riscix${UNAME_RELEASE} + exit ;; + arm*:riscos:*:*|arm*:RISCOS:*:*) + echo arm-unknown-riscos + exit ;; + SR2?01:HI-UX/MPP:*:* | SR8000:HI-UX/MPP:*:*) + echo hppa1.1-hitachi-hiuxmpp + exit ;; + Pyramid*:OSx*:*:* | MIS*:OSx*:*:* | MIS*:SMP_DC-OSx*:*:*) + # akee@wpdis03.wpafb.af.mil (Earle F. Ake) contributed MIS and NILE. + if test "`(/bin/universe) 2>/dev/null`" = att ; then + echo pyramid-pyramid-sysv3 + else + echo pyramid-pyramid-bsd + fi + exit ;; + NILE*:*:*:dcosx) + echo pyramid-pyramid-svr4 + exit ;; + DRS?6000:unix:4.0:6*) + echo sparc-icl-nx6 + exit ;; + DRS?6000:UNIX_SV:4.2*:7* | DRS?6000:isis:4.2*:7*) + case `/usr/bin/uname -p` in + sparc) echo sparc-icl-nx7; exit ;; + esac ;; + s390x:SunOS:*:*) + echo ${UNAME_MACHINE}-ibm-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4H:SunOS:5.*:*) + echo sparc-hal-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:5.*:* | tadpole*:SunOS:5.*:*) + echo sparc-sun-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + i86pc:AuroraUX:5.*:* | i86xen:AuroraUX:5.*:*) + echo i386-pc-auroraux${UNAME_RELEASE} + exit ;; + i86pc:SunOS:5.*:* | i86xen:SunOS:5.*:*) + eval $set_cc_for_build + SUN_ARCH="i386" + # If there is a compiler, see if it is configured for 64-bit objects. + # Note that the Sun cc does not turn __LP64__ into 1 like gcc does. + # This test works for both compilers. + if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then + if (echo '#ifdef __amd64'; echo IS_64BIT_ARCH; echo '#endif') | \ + (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \ + grep IS_64BIT_ARCH >/dev/null + then + SUN_ARCH="x86_64" + fi + fi + echo ${SUN_ARCH}-pc-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:6*:*) + # According to config.sub, this is the proper way to canonicalize + # SunOS6. Hard to guess exactly what SunOS6 will be like, but + # it's likely to be more like Solaris than SunOS4. + echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + sun4*:SunOS:*:*) + case "`/usr/bin/arch -k`" in + Series*|S4*) + UNAME_RELEASE=`uname -v` + ;; + esac + # Japanese Language versions have a version number like `4.1.3-JL'. + echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` + exit ;; + sun3*:SunOS:*:*) + echo m68k-sun-sunos${UNAME_RELEASE} + exit ;; + sun*:*:4.2BSD:*) + UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` + test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 + case "`/bin/arch`" in + sun3) + echo m68k-sun-sunos${UNAME_RELEASE} + ;; + sun4) + echo sparc-sun-sunos${UNAME_RELEASE} + ;; + esac + exit ;; + aushp:SunOS:*:*) + echo sparc-auspex-sunos${UNAME_RELEASE} + exit ;; + # The situation for MiNT is a little confusing. The machine name + # can be virtually everything (everything which is not + # "atarist" or "atariste" at least should have a processor + # > m68000). The system name ranges from "MiNT" over "FreeMiNT" + # to the lowercase version "mint" (or "freemint"). Finally + # the system name "TOS" denotes a system which is actually not + # MiNT. But MiNT is downward compatible to TOS, so this should + # be no problem. + atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) + echo m68k-atari-mint${UNAME_RELEASE} + exit ;; + milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) + echo m68k-milan-mint${UNAME_RELEASE} + exit ;; + hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) + echo m68k-hades-mint${UNAME_RELEASE} + exit ;; + *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) + echo m68k-unknown-mint${UNAME_RELEASE} + exit ;; + m68k:machten:*:*) + echo m68k-apple-machten${UNAME_RELEASE} + exit ;; + powerpc:machten:*:*) + echo powerpc-apple-machten${UNAME_RELEASE} + exit ;; + RISC*:Mach:*:*) + echo mips-dec-mach_bsd4.3 + exit ;; + RISC*:ULTRIX:*:*) + echo mips-dec-ultrix${UNAME_RELEASE} + exit ;; + VAX*:ULTRIX*:*:*) + echo vax-dec-ultrix${UNAME_RELEASE} + exit ;; + 2020:CLIX:*:* | 2430:CLIX:*:*) + echo clipper-intergraph-clix${UNAME_RELEASE} + exit ;; + mips:*:*:UMIPS | mips:*:*:RISCos) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c +#ifdef __cplusplus +#include /* for printf() prototype */ + int main (int argc, char *argv[]) { +#else + int main (argc, argv) int argc; char *argv[]; { +#endif + #if defined (host_mips) && defined (MIPSEB) + #if defined (SYSTYPE_SYSV) + printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_SVR4) + printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); + #endif + #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) + printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); + #endif + #endif + exit (-1); + } +EOF + $CC_FOR_BUILD -o $dummy $dummy.c && + dummyarg=`echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` && + SYSTEM_NAME=`$dummy $dummyarg` && + { echo "$SYSTEM_NAME"; exit; } + echo mips-mips-riscos${UNAME_RELEASE} + exit ;; + Motorola:PowerMAX_OS:*:*) + echo powerpc-motorola-powermax + exit ;; + Motorola:*:4.3:PL8-*) + echo powerpc-harris-powermax + exit ;; + Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) + echo powerpc-harris-powermax + exit ;; + Night_Hawk:Power_UNIX:*:*) + echo powerpc-harris-powerunix + exit ;; + m88k:CX/UX:7*:*) + echo m88k-harris-cxux7 + exit ;; + m88k:*:4*:R4*) + echo m88k-motorola-sysv4 + exit ;; + m88k:*:3*:R3*) + echo m88k-motorola-sysv3 + exit ;; + AViiON:dgux:*:*) + # DG/UX returns AViiON for all architectures + UNAME_PROCESSOR=`/usr/bin/uname -p` + if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] + then + if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ + [ ${TARGET_BINARY_INTERFACE}x = x ] + then + echo m88k-dg-dgux${UNAME_RELEASE} + else + echo m88k-dg-dguxbcs${UNAME_RELEASE} + fi + else + echo i586-dg-dgux${UNAME_RELEASE} + fi + exit ;; + M88*:DolphinOS:*:*) # DolphinOS (SVR3) + echo m88k-dolphin-sysv3 + exit ;; + M88*:*:R3*:*) + # Delta 88k system running SVR3 + echo m88k-motorola-sysv3 + exit ;; + XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) + echo m88k-tektronix-sysv3 + exit ;; + Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) + echo m68k-tektronix-bsd + exit ;; + *:IRIX*:*:*) + echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` + exit ;; + ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. + echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id + exit ;; # Note that: echo "'`uname -s`'" gives 'AIX ' + i*86:AIX:*:*) + echo i386-ibm-aix + exit ;; + ia64:AIX:*:*) + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} + exit ;; + *:AIX:2:3) + if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + + main() + { + if (!__power_pc()) + exit(1); + puts("powerpc-ibm-aix3.2.5"); + exit(0); + } +EOF + if $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` + then + echo "$SYSTEM_NAME" + else + echo rs6000-ibm-aix3.2.5 + fi + elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then + echo rs6000-ibm-aix3.2.4 + else + echo rs6000-ibm-aix3.2 + fi + exit ;; + *:AIX:*:[4567]) + IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` + if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then + IBM_ARCH=rs6000 + else + IBM_ARCH=powerpc + fi + if [ -x /usr/bin/oslevel ] ; then + IBM_REV=`/usr/bin/oslevel` + else + IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} + fi + echo ${IBM_ARCH}-ibm-aix${IBM_REV} + exit ;; + *:AIX:*:*) + echo rs6000-ibm-aix + exit ;; + ibmrt:4.4BSD:*|romp-ibm:BSD:*) + echo romp-ibm-bsd4.4 + exit ;; + ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and + echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to + exit ;; # report: romp-ibm BSD 4.3 + *:BOSX:*:*) + echo rs6000-bull-bosx + exit ;; + DPX/2?00:B.O.S.:*:*) + echo m68k-bull-sysv3 + exit ;; + 9000/[34]??:4.3bsd:1.*:*) + echo m68k-hp-bsd + exit ;; + hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) + echo m68k-hp-bsd4.4 + exit ;; + 9000/[34678]??:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + case "${UNAME_MACHINE}" in + 9000/31? ) HP_ARCH=m68000 ;; + 9000/[34]?? ) HP_ARCH=m68k ;; + 9000/[678][0-9][0-9]) + if [ -x /usr/bin/getconf ]; then + sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` + sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` + case "${sc_cpu_version}" in + 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 + 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 + 532) # CPU_PA_RISC2_0 + case "${sc_kernel_bits}" in + 32) HP_ARCH="hppa2.0n" ;; + 64) HP_ARCH="hppa2.0w" ;; + '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 + esac ;; + esac + fi + if [ "${HP_ARCH}" = "" ]; then + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + + #define _HPUX_SOURCE + #include + #include + + int main () + { + #if defined(_SC_KERNEL_BITS) + long bits = sysconf(_SC_KERNEL_BITS); + #endif + long cpu = sysconf (_SC_CPU_VERSION); + + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1"); break; + case CPU_PA_RISC2_0: + #if defined(_SC_KERNEL_BITS) + switch (bits) + { + case 64: puts ("hppa2.0w"); break; + case 32: puts ("hppa2.0n"); break; + default: puts ("hppa2.0"); break; + } break; + #else /* !defined(_SC_KERNEL_BITS) */ + puts ("hppa2.0"); break; + #endif + default: puts ("hppa1.0"); break; + } + exit (0); + } +EOF + (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` + test -z "$HP_ARCH" && HP_ARCH=hppa + fi ;; + esac + if [ ${HP_ARCH} = "hppa2.0w" ] + then + eval $set_cc_for_build + + # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating + # 32-bit code. hppa64-hp-hpux* has the same kernel and a compiler + # generating 64-bit code. GNU and HP use different nomenclature: + # + # $ CC_FOR_BUILD=cc ./config.guess + # => hppa2.0w-hp-hpux11.23 + # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess + # => hppa64-hp-hpux11.23 + + if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | + grep -q __LP64__ + then + HP_ARCH="hppa2.0w" + else + HP_ARCH="hppa64" + fi + fi + echo ${HP_ARCH}-hp-hpux${HPUX_REV} + exit ;; + ia64:HP-UX:*:*) + HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` + echo ia64-hp-hpux${HPUX_REV} + exit ;; + 3050*:HI-UX:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #include + int + main () + { + long cpu = sysconf (_SC_CPU_VERSION); + /* The order matters, because CPU_IS_HP_MC68K erroneously returns + true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct + results, however. */ + if (CPU_IS_PA_RISC (cpu)) + { + switch (cpu) + { + case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; + case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; + case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; + default: puts ("hppa-hitachi-hiuxwe2"); break; + } + } + else if (CPU_IS_HP_MC68K (cpu)) + puts ("m68k-hitachi-hiuxwe2"); + else puts ("unknown-hitachi-hiuxwe2"); + exit (0); + } +EOF + $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` && + { echo "$SYSTEM_NAME"; exit; } + echo unknown-hitachi-hiuxwe2 + exit ;; + 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) + echo hppa1.1-hp-bsd + exit ;; + 9000/8??:4.3bsd:*:*) + echo hppa1.0-hp-bsd + exit ;; + *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) + echo hppa1.0-hp-mpeix + exit ;; + hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) + echo hppa1.1-hp-osf + exit ;; + hp8??:OSF1:*:*) + echo hppa1.0-hp-osf + exit ;; + i*86:OSF1:*:*) + if [ -x /usr/sbin/sysversion ] ; then + echo ${UNAME_MACHINE}-unknown-osf1mk + else + echo ${UNAME_MACHINE}-unknown-osf1 + fi + exit ;; + parisc*:Lites*:*:*) + echo hppa1.1-hp-lites + exit ;; + C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) + echo c1-convex-bsd + exit ;; + C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit ;; + C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) + echo c34-convex-bsd + exit ;; + C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) + echo c38-convex-bsd + exit ;; + C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) + echo c4-convex-bsd + exit ;; + CRAY*Y-MP:*:*:*) + echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*[A-Z]90:*:*:*) + echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ + | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ + -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ + -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*TS:*:*:*) + echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*T3E:*:*:*) + echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + CRAY*SV1:*:*:*) + echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + *:UNICOS/mp:*:*) + echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' + exit ;; + F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) + FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` + echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit ;; + 5000:UNIX_System_V:4.*:*) + FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` + FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` + echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" + exit ;; + i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) + echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} + exit ;; + sparc*:BSD/OS:*:*) + echo sparc-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:BSD/OS:*:*) + echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:FreeBSD:*:*) + UNAME_PROCESSOR=`/usr/bin/uname -p` + case ${UNAME_PROCESSOR} in + amd64) + echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + *) + echo ${UNAME_PROCESSOR}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + esac + exit ;; + i*:CYGWIN*:*) + echo ${UNAME_MACHINE}-pc-cygwin + exit ;; + *:MINGW64*:*) + echo ${UNAME_MACHINE}-pc-mingw64 + exit ;; + *:MINGW*:*) + echo ${UNAME_MACHINE}-pc-mingw32 + exit ;; + i*:MSYS*:*) + echo ${UNAME_MACHINE}-pc-msys + exit ;; + i*:windows32*:*) + # uname -m includes "-pc" on this system. + echo ${UNAME_MACHINE}-mingw32 + exit ;; + i*:PW*:*) + echo ${UNAME_MACHINE}-pc-pw32 + exit ;; + *:Interix*:*) + case ${UNAME_MACHINE} in + x86) + echo i586-pc-interix${UNAME_RELEASE} + exit ;; + authenticamd | genuineintel | EM64T) + echo x86_64-unknown-interix${UNAME_RELEASE} + exit ;; + IA64) + echo ia64-unknown-interix${UNAME_RELEASE} + exit ;; + esac ;; + [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) + echo i${UNAME_MACHINE}-pc-mks + exit ;; + 8664:Windows_NT:*) + echo x86_64-pc-mks + exit ;; + i*:Windows_NT*:* | Pentium*:Windows_NT*:*) + # How do we know it's Interix rather than the generic POSIX subsystem? + # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we + # UNAME_MACHINE based on the output of uname instead of i386? + echo i586-pc-interix + exit ;; + i*:UWIN*:*) + echo ${UNAME_MACHINE}-pc-uwin + exit ;; + amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*) + echo x86_64-unknown-cygwin + exit ;; + p*:CYGWIN*:*) + echo powerpcle-unknown-cygwin + exit ;; + prep*:SunOS:5.*:*) + echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` + exit ;; + *:GNU:*:*) + # the GNU system + echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-${LIBC}`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` + exit ;; + *:GNU/*:*:*) + # other systems with GNU libc and userland + echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-${LIBC} + exit ;; + i*86:Minix:*:*) + echo ${UNAME_MACHINE}-pc-minix + exit ;; + aarch64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + aarch64_be:Linux:*:*) + UNAME_MACHINE=aarch64_be + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + alpha:Linux:*:*) + case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in + EV5) UNAME_MACHINE=alphaev5 ;; + EV56) UNAME_MACHINE=alphaev56 ;; + PCA56) UNAME_MACHINE=alphapca56 ;; + PCA57) UNAME_MACHINE=alphapca56 ;; + EV6) UNAME_MACHINE=alphaev6 ;; + EV67) UNAME_MACHINE=alphaev67 ;; + EV68*) UNAME_MACHINE=alphaev68 ;; + esac + objdump --private-headers /bin/sh | grep -q ld.so.1 + if test "$?" = 0 ; then LIBC="gnulibc1" ; fi + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + arc:Linux:*:* | arceb:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + arm*:Linux:*:*) + eval $set_cc_for_build + if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep -q __ARM_EABI__ + then + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + else + if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \ + | grep -q __ARM_PCS_VFP + then + echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabi + else + echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabihf + fi + fi + exit ;; + avr32*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + cris:Linux:*:*) + echo ${UNAME_MACHINE}-axis-linux-${LIBC} + exit ;; + crisv32:Linux:*:*) + echo ${UNAME_MACHINE}-axis-linux-${LIBC} + exit ;; + frv:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + hexagon:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + i*86:Linux:*:*) + echo ${UNAME_MACHINE}-pc-linux-${LIBC} + exit ;; + ia64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + m32r*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + m68*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + mips:Linux:*:* | mips64:Linux:*:*) + eval $set_cc_for_build + sed 's/^ //' << EOF >$dummy.c + #undef CPU + #undef ${UNAME_MACHINE} + #undef ${UNAME_MACHINE}el + #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) + CPU=${UNAME_MACHINE}el + #else + #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) + CPU=${UNAME_MACHINE} + #else + CPU= + #endif + #endif +EOF + eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'` + test x"${CPU}" != x && { echo "${CPU}-unknown-linux-${LIBC}"; exit; } + ;; + or1k:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + or32:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + padre:Linux:*:*) + echo sparc-unknown-linux-${LIBC} + exit ;; + parisc64:Linux:*:* | hppa64:Linux:*:*) + echo hppa64-unknown-linux-${LIBC} + exit ;; + parisc:Linux:*:* | hppa:Linux:*:*) + # Look for CPU level + case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in + PA7*) echo hppa1.1-unknown-linux-${LIBC} ;; + PA8*) echo hppa2.0-unknown-linux-${LIBC} ;; + *) echo hppa-unknown-linux-${LIBC} ;; + esac + exit ;; + ppc64:Linux:*:*) + echo powerpc64-unknown-linux-${LIBC} + exit ;; + ppc:Linux:*:*) + echo powerpc-unknown-linux-${LIBC} + exit ;; + ppc64le:Linux:*:*) + echo powerpc64le-unknown-linux-${LIBC} + exit ;; + ppcle:Linux:*:*) + echo powerpcle-unknown-linux-${LIBC} + exit ;; + s390:Linux:*:* | s390x:Linux:*:*) + echo ${UNAME_MACHINE}-ibm-linux-${LIBC} + exit ;; + sh64*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + sh*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + sparc:Linux:*:* | sparc64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + tile*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + vax:Linux:*:*) + echo ${UNAME_MACHINE}-dec-linux-${LIBC} + exit ;; + x86_64:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + xtensa*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-${LIBC} + exit ;; + i*86:DYNIX/ptx:4*:*) + # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. + # earlier versions are messed up and put the nodename in both + # sysname and nodename. + echo i386-sequent-sysv4 + exit ;; + i*86:UNIX_SV:4.2MP:2.*) + # Unixware is an offshoot of SVR4, but it has its own version + # number series starting with 2... + # I am not positive that other SVR4 systems won't match this, + # I just have to hope. -- rms. + # Use sysv4.2uw... so that sysv4* matches it. + echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} + exit ;; + i*86:OS/2:*:*) + # If we were able to find `uname', then EMX Unix compatibility + # is probably installed. + echo ${UNAME_MACHINE}-pc-os2-emx + exit ;; + i*86:XTS-300:*:STOP) + echo ${UNAME_MACHINE}-unknown-stop + exit ;; + i*86:atheos:*:*) + echo ${UNAME_MACHINE}-unknown-atheos + exit ;; + i*86:syllable:*:*) + echo ${UNAME_MACHINE}-pc-syllable + exit ;; + i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.[02]*:*) + echo i386-unknown-lynxos${UNAME_RELEASE} + exit ;; + i*86:*DOS:*:*) + echo ${UNAME_MACHINE}-pc-msdosdjgpp + exit ;; + i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) + UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` + if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then + echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} + else + echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} + fi + exit ;; + i*86:*:5:[678]*) + # UnixWare 7.x, OpenUNIX and OpenServer 6. + case `/bin/uname -X | grep "^Machine"` in + *486*) UNAME_MACHINE=i486 ;; + *Pentium) UNAME_MACHINE=i586 ;; + *Pent*|*Celeron) UNAME_MACHINE=i686 ;; + esac + echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} + exit ;; + i*86:*:3.2:*) + if test -f /usr/options/cb.name; then + UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then + UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` + (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 + (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ + && UNAME_MACHINE=i586 + (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ + && UNAME_MACHINE=i686 + (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ + && UNAME_MACHINE=i686 + echo ${UNAME_MACHINE}-pc-sco$UNAME_REL + else + echo ${UNAME_MACHINE}-pc-sysv32 + fi + exit ;; + pc:*:*:*) + # Left here for compatibility: + # uname -m prints for DJGPP always 'pc', but it prints nothing about + # the processor, so we play safe by assuming i586. + # Note: whatever this is, it MUST be the same as what config.sub + # prints for the "djgpp" host, or else GDB configury will decide that + # this is a cross-build. + echo i586-pc-msdosdjgpp + exit ;; + Intel:Mach:3*:*) + echo i386-pc-mach3 + exit ;; + paragon:*:*:*) + echo i860-intel-osf1 + exit ;; + i860:*:4.*:*) # i860-SVR4 + if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then + echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 + else # Add other i860-SVR4 vendors below as they are discovered. + echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 + fi + exit ;; + mini*:CTIX:SYS*5:*) + # "miniframe" + echo m68010-convergent-sysv + exit ;; + mc68k:UNIX:SYSTEM5:3.51m) + echo m68k-convergent-sysv + exit ;; + M680?0:D-NIX:5.3:*) + echo m68k-diab-dnix + exit ;; + M68*:*:R3V[5678]*:*) + test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;; + 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) + OS_REL='' + test -r /etc/.relid \ + && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4.3${OS_REL}; exit; } + /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ + && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; + 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4; exit; } ;; + NCR*:*:4.2:* | MPRAS*:*:4.2:*) + OS_REL='.3' + test -r /etc/.relid \ + && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` + /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ + && { echo i486-ncr-sysv4.3${OS_REL}; exit; } + /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ + && { echo i586-ncr-sysv4.3${OS_REL}; exit; } + /bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \ + && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; + m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) + echo m68k-unknown-lynxos${UNAME_RELEASE} + exit ;; + mc68030:UNIX_System_V:4.*:*) + echo m68k-atari-sysv4 + exit ;; + TSUNAMI:LynxOS:2.*:*) + echo sparc-unknown-lynxos${UNAME_RELEASE} + exit ;; + rs6000:LynxOS:2.*:*) + echo rs6000-unknown-lynxos${UNAME_RELEASE} + exit ;; + PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.[02]*:*) + echo powerpc-unknown-lynxos${UNAME_RELEASE} + exit ;; + SM[BE]S:UNIX_SV:*:*) + echo mips-dde-sysv${UNAME_RELEASE} + exit ;; + RM*:ReliantUNIX-*:*:*) + echo mips-sni-sysv4 + exit ;; + RM*:SINIX-*:*:*) + echo mips-sni-sysv4 + exit ;; + *:SINIX-*:*:*) + if uname -p 2>/dev/null >/dev/null ; then + UNAME_MACHINE=`(uname -p) 2>/dev/null` + echo ${UNAME_MACHINE}-sni-sysv4 + else + echo ns32k-sni-sysv + fi + exit ;; + PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort + # says + echo i586-unisys-sysv4 + exit ;; + *:UNIX_System_V:4*:FTX*) + # From Gerald Hewes . + # How about differentiating between stratus architectures? -djm + echo hppa1.1-stratus-sysv4 + exit ;; + *:*:*:FTX*) + # From seanf@swdc.stratus.com. + echo i860-stratus-sysv4 + exit ;; + i*86:VOS:*:*) + # From Paul.Green@stratus.com. + echo ${UNAME_MACHINE}-stratus-vos + exit ;; + *:VOS:*:*) + # From Paul.Green@stratus.com. + echo hppa1.1-stratus-vos + exit ;; + mc68*:A/UX:*:*) + echo m68k-apple-aux${UNAME_RELEASE} + exit ;; + news*:NEWS-OS:6*:*) + echo mips-sony-newsos6 + exit ;; + R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) + if [ -d /usr/nec ]; then + echo mips-nec-sysv${UNAME_RELEASE} + else + echo mips-unknown-sysv${UNAME_RELEASE} + fi + exit ;; + BeBox:BeOS:*:*) # BeOS running on hardware made by Be, PPC only. + echo powerpc-be-beos + exit ;; + BeMac:BeOS:*:*) # BeOS running on Mac or Mac clone, PPC only. + echo powerpc-apple-beos + exit ;; + BePC:BeOS:*:*) # BeOS running on Intel PC compatible. + echo i586-pc-beos + exit ;; + BePC:Haiku:*:*) # Haiku running on Intel PC compatible. + echo i586-pc-haiku + exit ;; + x86_64:Haiku:*:*) + echo x86_64-unknown-haiku + exit ;; + SX-4:SUPER-UX:*:*) + echo sx4-nec-superux${UNAME_RELEASE} + exit ;; + SX-5:SUPER-UX:*:*) + echo sx5-nec-superux${UNAME_RELEASE} + exit ;; + SX-6:SUPER-UX:*:*) + echo sx6-nec-superux${UNAME_RELEASE} + exit ;; + SX-7:SUPER-UX:*:*) + echo sx7-nec-superux${UNAME_RELEASE} + exit ;; + SX-8:SUPER-UX:*:*) + echo sx8-nec-superux${UNAME_RELEASE} + exit ;; + SX-8R:SUPER-UX:*:*) + echo sx8r-nec-superux${UNAME_RELEASE} + exit ;; + Power*:Rhapsody:*:*) + echo powerpc-apple-rhapsody${UNAME_RELEASE} + exit ;; + *:Rhapsody:*:*) + echo ${UNAME_MACHINE}-apple-rhapsody${UNAME_RELEASE} + exit ;; + *:Darwin:*:*) + UNAME_PROCESSOR=`uname -p` || UNAME_PROCESSOR=unknown + eval $set_cc_for_build + if test "$UNAME_PROCESSOR" = unknown ; then + UNAME_PROCESSOR=powerpc + fi + if [ "$CC_FOR_BUILD" != 'no_compiler_found' ]; then + if (echo '#ifdef __LP64__'; echo IS_64BIT_ARCH; echo '#endif') | \ + (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | \ + grep IS_64BIT_ARCH >/dev/null + then + case $UNAME_PROCESSOR in + i386) UNAME_PROCESSOR=x86_64 ;; + powerpc) UNAME_PROCESSOR=powerpc64 ;; + esac + fi + fi + echo ${UNAME_PROCESSOR}-apple-darwin${UNAME_RELEASE} + exit ;; + *:procnto*:*:* | *:QNX:[0123456789]*:*) + UNAME_PROCESSOR=`uname -p` + if test "$UNAME_PROCESSOR" = "x86"; then + UNAME_PROCESSOR=i386 + UNAME_MACHINE=pc + fi + echo ${UNAME_PROCESSOR}-${UNAME_MACHINE}-nto-qnx${UNAME_RELEASE} + exit ;; + *:QNX:*:4*) + echo i386-pc-qnx + exit ;; + NEO-?:NONSTOP_KERNEL:*:*) + echo neo-tandem-nsk${UNAME_RELEASE} + exit ;; + NSE-*:NONSTOP_KERNEL:*:*) + echo nse-tandem-nsk${UNAME_RELEASE} + exit ;; + NSR-?:NONSTOP_KERNEL:*:*) + echo nsr-tandem-nsk${UNAME_RELEASE} + exit ;; + *:NonStop-UX:*:*) + echo mips-compaq-nonstopux + exit ;; + BS2000:POSIX*:*:*) + echo bs2000-siemens-sysv + exit ;; + DS/*:UNIX_System_V:*:*) + echo ${UNAME_MACHINE}-${UNAME_SYSTEM}-${UNAME_RELEASE} + exit ;; + *:Plan9:*:*) + # "uname -m" is not consistent, so use $cputype instead. 386 + # is converted to i386 for consistency with other x86 + # operating systems. + if test "$cputype" = "386"; then + UNAME_MACHINE=i386 + else + UNAME_MACHINE="$cputype" + fi + echo ${UNAME_MACHINE}-unknown-plan9 + exit ;; + *:TOPS-10:*:*) + echo pdp10-unknown-tops10 + exit ;; + *:TENEX:*:*) + echo pdp10-unknown-tenex + exit ;; + KS10:TOPS-20:*:* | KL10:TOPS-20:*:* | TYPE4:TOPS-20:*:*) + echo pdp10-dec-tops20 + exit ;; + XKL-1:TOPS-20:*:* | TYPE5:TOPS-20:*:*) + echo pdp10-xkl-tops20 + exit ;; + *:TOPS-20:*:*) + echo pdp10-unknown-tops20 + exit ;; + *:ITS:*:*) + echo pdp10-unknown-its + exit ;; + SEI:*:*:SEIUX) + echo mips-sei-seiux${UNAME_RELEASE} + exit ;; + *:DragonFly:*:*) + echo ${UNAME_MACHINE}-unknown-dragonfly`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` + exit ;; + *:*VMS:*:*) + UNAME_MACHINE=`(uname -p) 2>/dev/null` + case "${UNAME_MACHINE}" in + A*) echo alpha-dec-vms ; exit ;; + I*) echo ia64-dec-vms ; exit ;; + V*) echo vax-dec-vms ; exit ;; + esac ;; + *:XENIX:*:SysV) + echo i386-pc-xenix + exit ;; + i*86:skyos:*:*) + echo ${UNAME_MACHINE}-pc-skyos`echo ${UNAME_RELEASE}` | sed -e 's/ .*$//' + exit ;; + i*86:rdos:*:*) + echo ${UNAME_MACHINE}-pc-rdos + exit ;; + i*86:AROS:*:*) + echo ${UNAME_MACHINE}-pc-aros + exit ;; + x86_64:VMkernel:*:*) + echo ${UNAME_MACHINE}-unknown-esx + exit ;; +esac + +eval $set_cc_for_build +cat >$dummy.c < +# include +#endif +main () +{ +#if defined (sony) +#if defined (MIPSEB) + /* BFD wants "bsd" instead of "newsos". Perhaps BFD should be changed, + I don't know.... */ + printf ("mips-sony-bsd\n"); exit (0); +#else +#include + printf ("m68k-sony-newsos%s\n", +#ifdef NEWSOS4 + "4" +#else + "" +#endif + ); exit (0); +#endif +#endif + +#if defined (__arm) && defined (__acorn) && defined (__unix) + printf ("arm-acorn-riscix\n"); exit (0); +#endif + +#if defined (hp300) && !defined (hpux) + printf ("m68k-hp-bsd\n"); exit (0); +#endif + +#if defined (NeXT) +#if !defined (__ARCHITECTURE__) +#define __ARCHITECTURE__ "m68k" +#endif + int version; + version=`(hostinfo | sed -n 's/.*NeXT Mach \([0-9]*\).*/\1/p') 2>/dev/null`; + if (version < 4) + printf ("%s-next-nextstep%d\n", __ARCHITECTURE__, version); + else + printf ("%s-next-openstep%d\n", __ARCHITECTURE__, version); + exit (0); +#endif + +#if defined (MULTIMAX) || defined (n16) +#if defined (UMAXV) + printf ("ns32k-encore-sysv\n"); exit (0); +#else +#if defined (CMU) + printf ("ns32k-encore-mach\n"); exit (0); +#else + printf ("ns32k-encore-bsd\n"); exit (0); +#endif +#endif +#endif + +#if defined (__386BSD__) + printf ("i386-pc-bsd\n"); exit (0); +#endif + +#if defined (sequent) +#if defined (i386) + printf ("i386-sequent-dynix\n"); exit (0); +#endif +#if defined (ns32000) + printf ("ns32k-sequent-dynix\n"); exit (0); +#endif +#endif + +#if defined (_SEQUENT_) + struct utsname un; + + uname(&un); + + if (strncmp(un.version, "V2", 2) == 0) { + printf ("i386-sequent-ptx2\n"); exit (0); + } + if (strncmp(un.version, "V1", 2) == 0) { /* XXX is V1 correct? */ + printf ("i386-sequent-ptx1\n"); exit (0); + } + printf ("i386-sequent-ptx\n"); exit (0); + +#endif + +#if defined (vax) +# if !defined (ultrix) +# include +# if defined (BSD) +# if BSD == 43 + printf ("vax-dec-bsd4.3\n"); exit (0); +# else +# if BSD == 199006 + printf ("vax-dec-bsd4.3reno\n"); exit (0); +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# endif +# else + printf ("vax-dec-bsd\n"); exit (0); +# endif +# else + printf ("vax-dec-ultrix\n"); exit (0); +# endif +#endif + +#if defined (alliant) && defined (i860) + printf ("i860-alliant-bsd\n"); exit (0); +#endif + + exit (1); +} +EOF + +$CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null && SYSTEM_NAME=`$dummy` && + { echo "$SYSTEM_NAME"; exit; } + +# Apollos put the system type in the environment. + +test -d /usr/apollo && { echo ${ISP}-apollo-${SYSTYPE}; exit; } + +# Convex versions that predate uname can use getsysinfo(1) + +if [ -x /usr/convex/getsysinfo ] +then + case `getsysinfo -f cpu_type` in + c1*) + echo c1-convex-bsd + exit ;; + c2*) + if getsysinfo -f scalar_acc + then echo c32-convex-bsd + else echo c2-convex-bsd + fi + exit ;; + c34*) + echo c34-convex-bsd + exit ;; + c38*) + echo c38-convex-bsd + exit ;; + c4*) + echo c4-convex-bsd + exit ;; + esac +fi + +cat >&2 < in order to provide the needed +information to handle your system. + +config.guess timestamp = $timestamp + +uname -m = `(uname -m) 2>/dev/null || echo unknown` +uname -r = `(uname -r) 2>/dev/null || echo unknown` +uname -s = `(uname -s) 2>/dev/null || echo unknown` +uname -v = `(uname -v) 2>/dev/null || echo unknown` + +/usr/bin/uname -p = `(/usr/bin/uname -p) 2>/dev/null` +/bin/uname -X = `(/bin/uname -X) 2>/dev/null` + +hostinfo = `(hostinfo) 2>/dev/null` +/bin/universe = `(/bin/universe) 2>/dev/null` +/usr/bin/arch -k = `(/usr/bin/arch -k) 2>/dev/null` +/bin/arch = `(/bin/arch) 2>/dev/null` +/usr/bin/oslevel = `(/usr/bin/oslevel) 2>/dev/null` +/usr/convex/getsysinfo = `(/usr/convex/getsysinfo) 2>/dev/null` + +UNAME_MACHINE = ${UNAME_MACHINE} +UNAME_RELEASE = ${UNAME_RELEASE} +UNAME_SYSTEM = ${UNAME_SYSTEM} +UNAME_VERSION = ${UNAME_VERSION} +EOF + +exit 1 + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "timestamp='" +# time-stamp-format: "%:y-%02m-%02d" +# time-stamp-end: "'" +# End: diff -Nru intel-vaapi-driver-1.0.15/config.sub intel-vaapi-driver-1.7.1/config.sub --- intel-vaapi-driver-1.0.15/config.sub 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/config.sub 2016-02-22 04:30:56.000000000 +0000 @@ -0,0 +1,1791 @@ +#! /bin/sh +# Configuration validation subroutine script. +# Copyright 1992-2013 Free Software Foundation, Inc. + +timestamp='2013-08-10' + +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, see . +# +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that +# program. This Exception is an additional permission under section 7 +# of the GNU General Public License, version 3 ("GPLv3"). + + +# Please send patches with a ChangeLog entry to config-patches@gnu.org. +# +# Configuration subroutine to validate and canonicalize a configuration type. +# Supply the specified configuration type as an argument. +# If it is invalid, we print an error message on stderr and exit with code 1. +# Otherwise, we print the canonical config type on stdout and succeed. + +# You can get the latest version of this script from: +# http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub;hb=HEAD + +# This file is supposed to be the same for all GNU packages +# and recognize all the CPU types, system types and aliases +# that are meaningful with *any* GNU software. +# Each package is responsible for reporting which valid configurations +# it does not support. The user should be able to distinguish +# a failure to support a valid configuration from a meaningless +# configuration. + +# The goal of this file is to map all the various variations of a given +# machine specification into a single specification in the form: +# CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM +# or in some cases, the newer four-part form: +# CPU_TYPE-MANUFACTURER-KERNEL-OPERATING_SYSTEM +# It is wrong to echo any other type of specification. + +me=`echo "$0" | sed -e 's,.*/,,'` + +usage="\ +Usage: $0 [OPTION] CPU-MFR-OPSYS + $0 [OPTION] ALIAS + +Canonicalize a configuration name. + +Operation modes: + -h, --help print this help, then exit + -t, --time-stamp print date of last modification, then exit + -v, --version print version number, then exit + +Report bugs and patches to ." + +version="\ +GNU config.sub ($timestamp) + +Copyright 1992-2013 Free Software Foundation, Inc. + +This is free software; see the source for copying conditions. There is NO +warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." + +help=" +Try \`$me --help' for more information." + +# Parse command line +while test $# -gt 0 ; do + case $1 in + --time-stamp | --time* | -t ) + echo "$timestamp" ; exit ;; + --version | -v ) + echo "$version" ; exit ;; + --help | --h* | -h ) + echo "$usage"; exit ;; + -- ) # Stop option processing + shift; break ;; + - ) # Use stdin as input. + break ;; + -* ) + echo "$me: invalid option $1$help" + exit 1 ;; + + *local*) + # First pass through any local machine types. + echo $1 + exit ;; + + * ) + break ;; + esac +done + +case $# in + 0) echo "$me: missing argument$help" >&2 + exit 1;; + 1) ;; + *) echo "$me: too many arguments$help" >&2 + exit 1;; +esac + +# Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). +# Here we must recognize all the valid KERNEL-OS combinations. +maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` +case $maybe_os in + nto-qnx* | linux-gnu* | linux-android* | linux-dietlibc | linux-newlib* | \ + linux-musl* | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | \ + knetbsd*-gnu* | netbsd*-gnu* | \ + kopensolaris*-gnu* | \ + storm-chaos* | os2-emx* | rtmk-nova*) + os=-$maybe_os + basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` + ;; + android-linux) + os=-linux-android + basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`-unknown + ;; + *) + basic_machine=`echo $1 | sed 's/-[^-]*$//'` + if [ $basic_machine != $1 ] + then os=`echo $1 | sed 's/.*-/-/'` + else os=; fi + ;; +esac + +### Let's recognize common machines as not being operating systems so +### that things like config.sub decstation-3100 work. We also +### recognize some manufacturers as not being operating systems, so we +### can provide default operating systems below. +case $os in + -sun*os*) + # Prevent following clause from handling this invalid input. + ;; + -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \ + -att* | -7300* | -3300* | -delta* | -motorola* | -sun[234]* | \ + -unicom* | -ibm* | -next | -hp | -isi* | -apollo | -altos* | \ + -convergent* | -ncr* | -news | -32* | -3600* | -3100* | -hitachi* |\ + -c[123]* | -convex* | -sun | -crds | -omron* | -dg | -ultra | -tti* | \ + -harris | -dolphin | -highlevel | -gould | -cbm | -ns | -masscomp | \ + -apple | -axis | -knuth | -cray | -microblaze*) + os= + basic_machine=$1 + ;; + -bluegene*) + os=-cnk + ;; + -sim | -cisco | -oki | -wec | -winbond) + os= + basic_machine=$1 + ;; + -scout) + ;; + -wrs) + os=-vxworks + basic_machine=$1 + ;; + -chorusos*) + os=-chorusos + basic_machine=$1 + ;; + -chorusrdb) + os=-chorusrdb + basic_machine=$1 + ;; + -hiux*) + os=-hiuxwe2 + ;; + -sco6) + os=-sco5v6 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco5) + os=-sco3.2v5 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco4) + os=-sco3.2v4 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco3.2.[4-9]*) + os=`echo $os | sed -e 's/sco3.2./sco3.2v/'` + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco3.2v[4-9]*) + # Don't forget version if it is 3.2v4 or newer. + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco5v6*) + # Don't forget version if it is 3.2v4 or newer. + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -sco*) + os=-sco3.2v2 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -udk*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -isc) + os=-isc2.2 + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -clix*) + basic_machine=clipper-intergraph + ;; + -isc*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; + -lynx*178) + os=-lynxos178 + ;; + -lynx*5) + os=-lynxos5 + ;; + -lynx*) + os=-lynxos + ;; + -ptx*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-sequent/'` + ;; + -windowsnt*) + os=`echo $os | sed -e 's/windowsnt/winnt/'` + ;; + -psos*) + os=-psos + ;; + -mint | -mint[0-9]*) + basic_machine=m68k-atari + os=-mint + ;; +esac + +# Decode aliases for certain CPU-COMPANY combinations. +case $basic_machine in + # Recognize the basic CPU types without company name. + # Some are omitted here because they have special meanings below. + 1750a | 580 \ + | a29k \ + | aarch64 | aarch64_be \ + | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ + | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ + | am33_2.0 \ + | arc | arceb \ + | arm | arm[bl]e | arme[lb] | armv[2-8] | armv[3-8][lb] | armv7[arm] \ + | avr | avr32 \ + | be32 | be64 \ + | bfin \ + | c4x | c8051 | clipper \ + | d10v | d30v | dlx | dsp16xx \ + | epiphany \ + | fido | fr30 | frv \ + | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ + | hexagon \ + | i370 | i860 | i960 | ia64 \ + | ip2k | iq2000 \ + | le32 | le64 \ + | lm32 \ + | m32c | m32r | m32rle | m68000 | m68k | m88k \ + | maxq | mb | microblaze | microblazeel | mcore | mep | metag \ + | mips | mipsbe | mipseb | mipsel | mipsle \ + | mips16 \ + | mips64 | mips64el \ + | mips64octeon | mips64octeonel \ + | mips64orion | mips64orionel \ + | mips64r5900 | mips64r5900el \ + | mips64vr | mips64vrel \ + | mips64vr4100 | mips64vr4100el \ + | mips64vr4300 | mips64vr4300el \ + | mips64vr5000 | mips64vr5000el \ + | mips64vr5900 | mips64vr5900el \ + | mipsisa32 | mipsisa32el \ + | mipsisa32r2 | mipsisa32r2el \ + | mipsisa64 | mipsisa64el \ + | mipsisa64r2 | mipsisa64r2el \ + | mipsisa64sb1 | mipsisa64sb1el \ + | mipsisa64sr71k | mipsisa64sr71kel \ + | mipsr5900 | mipsr5900el \ + | mipstx39 | mipstx39el \ + | mn10200 | mn10300 \ + | moxie \ + | mt \ + | msp430 \ + | nds32 | nds32le | nds32be \ + | nios | nios2 | nios2eb | nios2el \ + | ns16k | ns32k \ + | open8 \ + | or1k | or32 \ + | pdp10 | pdp11 | pj | pjl \ + | powerpc | powerpc64 | powerpc64le | powerpcle \ + | pyramid \ + | rl78 | rx \ + | score \ + | sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[34]eb | sheb | shbe | shle | sh[1234]le | sh3ele \ + | sh64 | sh64le \ + | sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet | sparclite \ + | sparcv8 | sparcv9 | sparcv9b | sparcv9v \ + | spu \ + | tahoe | tic4x | tic54x | tic55x | tic6x | tic80 | tron \ + | ubicom32 \ + | v850 | v850e | v850e1 | v850e2 | v850es | v850e2v3 \ + | we32k \ + | x86 | xc16x | xstormy16 | xtensa \ + | z8k | z80) + basic_machine=$basic_machine-unknown + ;; + c54x) + basic_machine=tic54x-unknown + ;; + c55x) + basic_machine=tic55x-unknown + ;; + c6x) + basic_machine=tic6x-unknown + ;; + m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | picochip) + basic_machine=$basic_machine-unknown + os=-none + ;; + m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) + ;; + ms1) + basic_machine=mt-unknown + ;; + + strongarm | thumb | xscale) + basic_machine=arm-unknown + ;; + xgate) + basic_machine=$basic_machine-unknown + os=-none + ;; + xscaleeb) + basic_machine=armeb-unknown + ;; + + xscaleel) + basic_machine=armel-unknown + ;; + + # We use `pc' rather than `unknown' + # because (1) that's what they normally are, and + # (2) the word "unknown" tends to confuse beginning users. + i*86 | x86_64) + basic_machine=$basic_machine-pc + ;; + # Object if more than one company name word. + *-*-*) + echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 + exit 1 + ;; + # Recognize the basic CPU types with company name. + 580-* \ + | a29k-* \ + | aarch64-* | aarch64_be-* \ + | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ + | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ + | alphapca5[67]-* | alpha64pca5[67]-* | arc-* | arceb-* \ + | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ + | avr-* | avr32-* \ + | be32-* | be64-* \ + | bfin-* | bs2000-* \ + | c[123]* | c30-* | [cjt]90-* | c4x-* \ + | c8051-* | clipper-* | craynv-* | cydra-* \ + | d10v-* | d30v-* | dlx-* \ + | elxsi-* \ + | f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \ + | h8300-* | h8500-* \ + | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ + | hexagon-* \ + | i*86-* | i860-* | i960-* | ia64-* \ + | ip2k-* | iq2000-* \ + | le32-* | le64-* \ + | lm32-* \ + | m32c-* | m32r-* | m32rle-* \ + | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ + | m88110-* | m88k-* | maxq-* | mcore-* | metag-* \ + | microblaze-* | microblazeel-* \ + | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \ + | mips16-* \ + | mips64-* | mips64el-* \ + | mips64octeon-* | mips64octeonel-* \ + | mips64orion-* | mips64orionel-* \ + | mips64r5900-* | mips64r5900el-* \ + | mips64vr-* | mips64vrel-* \ + | mips64vr4100-* | mips64vr4100el-* \ + | mips64vr4300-* | mips64vr4300el-* \ + | mips64vr5000-* | mips64vr5000el-* \ + | mips64vr5900-* | mips64vr5900el-* \ + | mipsisa32-* | mipsisa32el-* \ + | mipsisa32r2-* | mipsisa32r2el-* \ + | mipsisa64-* | mipsisa64el-* \ + | mipsisa64r2-* | mipsisa64r2el-* \ + | mipsisa64sb1-* | mipsisa64sb1el-* \ + | mipsisa64sr71k-* | mipsisa64sr71kel-* \ + | mipsr5900-* | mipsr5900el-* \ + | mipstx39-* | mipstx39el-* \ + | mmix-* \ + | mt-* \ + | msp430-* \ + | nds32-* | nds32le-* | nds32be-* \ + | nios-* | nios2-* | nios2eb-* | nios2el-* \ + | none-* | np1-* | ns16k-* | ns32k-* \ + | open8-* \ + | orion-* \ + | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ + | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* \ + | pyramid-* \ + | rl78-* | romp-* | rs6000-* | rx-* \ + | sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* | sheb-* | shbe-* \ + | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \ + | sparc-* | sparc64-* | sparc64b-* | sparc64v-* | sparc86x-* | sparclet-* \ + | sparclite-* \ + | sparcv8-* | sparcv9-* | sparcv9b-* | sparcv9v-* | sv1-* | sx?-* \ + | tahoe-* \ + | tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* \ + | tile*-* \ + | tron-* \ + | ubicom32-* \ + | v850-* | v850e-* | v850e1-* | v850es-* | v850e2-* | v850e2v3-* \ + | vax-* \ + | we32k-* \ + | x86-* | x86_64-* | xc16x-* | xps100-* \ + | xstormy16-* | xtensa*-* \ + | ymp-* \ + | z8k-* | z80-*) + ;; + # Recognize the basic CPU types without company name, with glob match. + xtensa*) + basic_machine=$basic_machine-unknown + ;; + # Recognize the various machine names and aliases which stand + # for a CPU type and a company and sometimes even an OS. + 386bsd) + basic_machine=i386-unknown + os=-bsd + ;; + 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) + basic_machine=m68000-att + ;; + 3b*) + basic_machine=we32k-att + ;; + a29khif) + basic_machine=a29k-amd + os=-udi + ;; + abacus) + basic_machine=abacus-unknown + ;; + adobe68k) + basic_machine=m68010-adobe + os=-scout + ;; + alliant | fx80) + basic_machine=fx80-alliant + ;; + altos | altos3068) + basic_machine=m68k-altos + ;; + am29k) + basic_machine=a29k-none + os=-bsd + ;; + amd64) + basic_machine=x86_64-pc + ;; + amd64-*) + basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + amdahl) + basic_machine=580-amdahl + os=-sysv + ;; + amiga | amiga-*) + basic_machine=m68k-unknown + ;; + amigaos | amigados) + basic_machine=m68k-unknown + os=-amigaos + ;; + amigaunix | amix) + basic_machine=m68k-unknown + os=-sysv4 + ;; + apollo68) + basic_machine=m68k-apollo + os=-sysv + ;; + apollo68bsd) + basic_machine=m68k-apollo + os=-bsd + ;; + aros) + basic_machine=i386-pc + os=-aros + ;; + aux) + basic_machine=m68k-apple + os=-aux + ;; + balance) + basic_machine=ns32k-sequent + os=-dynix + ;; + blackfin) + basic_machine=bfin-unknown + os=-linux + ;; + blackfin-*) + basic_machine=bfin-`echo $basic_machine | sed 's/^[^-]*-//'` + os=-linux + ;; + bluegene*) + basic_machine=powerpc-ibm + os=-cnk + ;; + c54x-*) + basic_machine=tic54x-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + c55x-*) + basic_machine=tic55x-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + c6x-*) + basic_machine=tic6x-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + c90) + basic_machine=c90-cray + os=-unicos + ;; + cegcc) + basic_machine=arm-unknown + os=-cegcc + ;; + convex-c1) + basic_machine=c1-convex + os=-bsd + ;; + convex-c2) + basic_machine=c2-convex + os=-bsd + ;; + convex-c32) + basic_machine=c32-convex + os=-bsd + ;; + convex-c34) + basic_machine=c34-convex + os=-bsd + ;; + convex-c38) + basic_machine=c38-convex + os=-bsd + ;; + cray | j90) + basic_machine=j90-cray + os=-unicos + ;; + craynv) + basic_machine=craynv-cray + os=-unicosmp + ;; + cr16 | cr16-*) + basic_machine=cr16-unknown + os=-elf + ;; + crds | unos) + basic_machine=m68k-crds + ;; + crisv32 | crisv32-* | etraxfs*) + basic_machine=crisv32-axis + ;; + cris | cris-* | etrax*) + basic_machine=cris-axis + ;; + crx) + basic_machine=crx-unknown + os=-elf + ;; + da30 | da30-*) + basic_machine=m68k-da30 + ;; + decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) + basic_machine=mips-dec + ;; + decsystem10* | dec10*) + basic_machine=pdp10-dec + os=-tops10 + ;; + decsystem20* | dec20*) + basic_machine=pdp10-dec + os=-tops20 + ;; + delta | 3300 | motorola-3300 | motorola-delta \ + | 3300-motorola | delta-motorola) + basic_machine=m68k-motorola + ;; + delta88) + basic_machine=m88k-motorola + os=-sysv3 + ;; + dicos) + basic_machine=i686-pc + os=-dicos + ;; + djgpp) + basic_machine=i586-pc + os=-msdosdjgpp + ;; + dpx20 | dpx20-*) + basic_machine=rs6000-bull + os=-bosx + ;; + dpx2* | dpx2*-bull) + basic_machine=m68k-bull + os=-sysv3 + ;; + ebmon29k) + basic_machine=a29k-amd + os=-ebmon + ;; + elxsi) + basic_machine=elxsi-elxsi + os=-bsd + ;; + encore | umax | mmax) + basic_machine=ns32k-encore + ;; + es1800 | OSE68k | ose68k | ose | OSE) + basic_machine=m68k-ericsson + os=-ose + ;; + fx2800) + basic_machine=i860-alliant + ;; + genix) + basic_machine=ns32k-ns + ;; + gmicro) + basic_machine=tron-gmicro + os=-sysv + ;; + go32) + basic_machine=i386-pc + os=-go32 + ;; + h3050r* | hiux*) + basic_machine=hppa1.1-hitachi + os=-hiuxwe2 + ;; + h8300hms) + basic_machine=h8300-hitachi + os=-hms + ;; + h8300xray) + basic_machine=h8300-hitachi + os=-xray + ;; + h8500hms) + basic_machine=h8500-hitachi + os=-hms + ;; + harris) + basic_machine=m88k-harris + os=-sysv3 + ;; + hp300-*) + basic_machine=m68k-hp + ;; + hp300bsd) + basic_machine=m68k-hp + os=-bsd + ;; + hp300hpux) + basic_machine=m68k-hp + os=-hpux + ;; + hp3k9[0-9][0-9] | hp9[0-9][0-9]) + basic_machine=hppa1.0-hp + ;; + hp9k2[0-9][0-9] | hp9k31[0-9]) + basic_machine=m68000-hp + ;; + hp9k3[2-9][0-9]) + basic_machine=m68k-hp + ;; + hp9k6[0-9][0-9] | hp6[0-9][0-9]) + basic_machine=hppa1.0-hp + ;; + hp9k7[0-79][0-9] | hp7[0-79][0-9]) + basic_machine=hppa1.1-hp + ;; + hp9k78[0-9] | hp78[0-9]) + # FIXME: really hppa2.0-hp + basic_machine=hppa1.1-hp + ;; + hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) + # FIXME: really hppa2.0-hp + basic_machine=hppa1.1-hp + ;; + hp9k8[0-9][13679] | hp8[0-9][13679]) + basic_machine=hppa1.1-hp + ;; + hp9k8[0-9][0-9] | hp8[0-9][0-9]) + basic_machine=hppa1.0-hp + ;; + hppa-next) + os=-nextstep3 + ;; + hppaosf) + basic_machine=hppa1.1-hp + os=-osf + ;; + hppro) + basic_machine=hppa1.1-hp + os=-proelf + ;; + i370-ibm* | ibm*) + basic_machine=i370-ibm + ;; + i*86v32) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv32 + ;; + i*86v4*) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv4 + ;; + i*86v) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv + ;; + i*86sol2) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-solaris2 + ;; + i386mach) + basic_machine=i386-mach + os=-mach + ;; + i386-vsta | vsta) + basic_machine=i386-unknown + os=-vsta + ;; + iris | iris4d) + basic_machine=mips-sgi + case $os in + -irix*) + ;; + *) + os=-irix4 + ;; + esac + ;; + isi68 | isi) + basic_machine=m68k-isi + os=-sysv + ;; + m68knommu) + basic_machine=m68k-unknown + os=-linux + ;; + m68knommu-*) + basic_machine=m68k-`echo $basic_machine | sed 's/^[^-]*-//'` + os=-linux + ;; + m88k-omron*) + basic_machine=m88k-omron + ;; + magnum | m3230) + basic_machine=mips-mips + os=-sysv + ;; + merlin) + basic_machine=ns32k-utek + os=-sysv + ;; + microblaze*) + basic_machine=microblaze-xilinx + ;; + mingw64) + basic_machine=x86_64-pc + os=-mingw64 + ;; + mingw32) + basic_machine=i686-pc + os=-mingw32 + ;; + mingw32ce) + basic_machine=arm-unknown + os=-mingw32ce + ;; + miniframe) + basic_machine=m68000-convergent + ;; + *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) + basic_machine=m68k-atari + os=-mint + ;; + mips3*-*) + basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` + ;; + mips3*) + basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown + ;; + monitor) + basic_machine=m68k-rom68k + os=-coff + ;; + morphos) + basic_machine=powerpc-unknown + os=-morphos + ;; + msdos) + basic_machine=i386-pc + os=-msdos + ;; + ms1-*) + basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'` + ;; + msys) + basic_machine=i686-pc + os=-msys + ;; + mvs) + basic_machine=i370-ibm + os=-mvs + ;; + nacl) + basic_machine=le32-unknown + os=-nacl + ;; + ncr3000) + basic_machine=i486-ncr + os=-sysv4 + ;; + netbsd386) + basic_machine=i386-unknown + os=-netbsd + ;; + netwinder) + basic_machine=armv4l-rebel + os=-linux + ;; + news | news700 | news800 | news900) + basic_machine=m68k-sony + os=-newsos + ;; + news1000) + basic_machine=m68030-sony + os=-newsos + ;; + news-3600 | risc-news) + basic_machine=mips-sony + os=-newsos + ;; + necv70) + basic_machine=v70-nec + os=-sysv + ;; + next | m*-next ) + basic_machine=m68k-next + case $os in + -nextstep* ) + ;; + -ns2*) + os=-nextstep2 + ;; + *) + os=-nextstep3 + ;; + esac + ;; + nh3000) + basic_machine=m68k-harris + os=-cxux + ;; + nh[45]000) + basic_machine=m88k-harris + os=-cxux + ;; + nindy960) + basic_machine=i960-intel + os=-nindy + ;; + mon960) + basic_machine=i960-intel + os=-mon960 + ;; + nonstopux) + basic_machine=mips-compaq + os=-nonstopux + ;; + np1) + basic_machine=np1-gould + ;; + neo-tandem) + basic_machine=neo-tandem + ;; + nse-tandem) + basic_machine=nse-tandem + ;; + nsr-tandem) + basic_machine=nsr-tandem + ;; + op50n-* | op60c-*) + basic_machine=hppa1.1-oki + os=-proelf + ;; + openrisc | openrisc-*) + basic_machine=or32-unknown + ;; + os400) + basic_machine=powerpc-ibm + os=-os400 + ;; + OSE68000 | ose68000) + basic_machine=m68000-ericsson + os=-ose + ;; + os68k) + basic_machine=m68k-none + os=-os68k + ;; + pa-hitachi) + basic_machine=hppa1.1-hitachi + os=-hiuxwe2 + ;; + paragon) + basic_machine=i860-intel + os=-osf + ;; + parisc) + basic_machine=hppa-unknown + os=-linux + ;; + parisc-*) + basic_machine=hppa-`echo $basic_machine | sed 's/^[^-]*-//'` + os=-linux + ;; + pbd) + basic_machine=sparc-tti + ;; + pbb) + basic_machine=m68k-tti + ;; + pc532 | pc532-*) + basic_machine=ns32k-pc532 + ;; + pc98) + basic_machine=i386-pc + ;; + pc98-*) + basic_machine=i386-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pentium | p5 | k5 | k6 | nexgen | viac3) + basic_machine=i586-pc + ;; + pentiumpro | p6 | 6x86 | athlon | athlon_*) + basic_machine=i686-pc + ;; + pentiumii | pentium2 | pentiumiii | pentium3) + basic_machine=i686-pc + ;; + pentium4) + basic_machine=i786-pc + ;; + pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*) + basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pentiumpro-* | p6-* | 6x86-* | athlon-*) + basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*) + basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pentium4-*) + basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + pn) + basic_machine=pn-gould + ;; + power) basic_machine=power-ibm + ;; + ppc | ppcbe) basic_machine=powerpc-unknown + ;; + ppc-* | ppcbe-*) + basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ppcle | powerpclittle | ppc-le | powerpc-little) + basic_machine=powerpcle-unknown + ;; + ppcle-* | powerpclittle-*) + basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ppc64) basic_machine=powerpc64-unknown + ;; + ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ppc64le | powerpc64little | ppc64-le | powerpc64-little) + basic_machine=powerpc64le-unknown + ;; + ppc64le-* | powerpc64little-*) + basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + ps2) + basic_machine=i386-ibm + ;; + pw32) + basic_machine=i586-unknown + os=-pw32 + ;; + rdos | rdos64) + basic_machine=x86_64-pc + os=-rdos + ;; + rdos32) + basic_machine=i386-pc + os=-rdos + ;; + rom68k) + basic_machine=m68k-rom68k + os=-coff + ;; + rm[46]00) + basic_machine=mips-siemens + ;; + rtpc | rtpc-*) + basic_machine=romp-ibm + ;; + s390 | s390-*) + basic_machine=s390-ibm + ;; + s390x | s390x-*) + basic_machine=s390x-ibm + ;; + sa29200) + basic_machine=a29k-amd + os=-udi + ;; + sb1) + basic_machine=mipsisa64sb1-unknown + ;; + sb1el) + basic_machine=mipsisa64sb1el-unknown + ;; + sde) + basic_machine=mipsisa32-sde + os=-elf + ;; + sei) + basic_machine=mips-sei + os=-seiux + ;; + sequent) + basic_machine=i386-sequent + ;; + sh) + basic_machine=sh-hitachi + os=-hms + ;; + sh5el) + basic_machine=sh5le-unknown + ;; + sh64) + basic_machine=sh64-unknown + ;; + sparclite-wrs | simso-wrs) + basic_machine=sparclite-wrs + os=-vxworks + ;; + sps7) + basic_machine=m68k-bull + os=-sysv2 + ;; + spur) + basic_machine=spur-unknown + ;; + st2000) + basic_machine=m68k-tandem + ;; + stratus) + basic_machine=i860-stratus + os=-sysv4 + ;; + strongarm-* | thumb-*) + basic_machine=arm-`echo $basic_machine | sed 's/^[^-]*-//'` + ;; + sun2) + basic_machine=m68000-sun + ;; + sun2os3) + basic_machine=m68000-sun + os=-sunos3 + ;; + sun2os4) + basic_machine=m68000-sun + os=-sunos4 + ;; + sun3os3) + basic_machine=m68k-sun + os=-sunos3 + ;; + sun3os4) + basic_machine=m68k-sun + os=-sunos4 + ;; + sun4os3) + basic_machine=sparc-sun + os=-sunos3 + ;; + sun4os4) + basic_machine=sparc-sun + os=-sunos4 + ;; + sun4sol2) + basic_machine=sparc-sun + os=-solaris2 + ;; + sun3 | sun3-*) + basic_machine=m68k-sun + ;; + sun4) + basic_machine=sparc-sun + ;; + sun386 | sun386i | roadrunner) + basic_machine=i386-sun + ;; + sv1) + basic_machine=sv1-cray + os=-unicos + ;; + symmetry) + basic_machine=i386-sequent + os=-dynix + ;; + t3e) + basic_machine=alphaev5-cray + os=-unicos + ;; + t90) + basic_machine=t90-cray + os=-unicos + ;; + tile*) + basic_machine=$basic_machine-unknown + os=-linux-gnu + ;; + tx39) + basic_machine=mipstx39-unknown + ;; + tx39el) + basic_machine=mipstx39el-unknown + ;; + toad1) + basic_machine=pdp10-xkl + os=-tops20 + ;; + tower | tower-32) + basic_machine=m68k-ncr + ;; + tpf) + basic_machine=s390x-ibm + os=-tpf + ;; + udi29k) + basic_machine=a29k-amd + os=-udi + ;; + ultra3) + basic_machine=a29k-nyu + os=-sym1 + ;; + v810 | necv810) + basic_machine=v810-nec + os=-none + ;; + vaxv) + basic_machine=vax-dec + os=-sysv + ;; + vms) + basic_machine=vax-dec + os=-vms + ;; + vpp*|vx|vx-*) + basic_machine=f301-fujitsu + ;; + vxworks960) + basic_machine=i960-wrs + os=-vxworks + ;; + vxworks68) + basic_machine=m68k-wrs + os=-vxworks + ;; + vxworks29k) + basic_machine=a29k-wrs + os=-vxworks + ;; + w65*) + basic_machine=w65-wdc + os=-none + ;; + w89k-*) + basic_machine=hppa1.1-winbond + os=-proelf + ;; + xbox) + basic_machine=i686-pc + os=-mingw32 + ;; + xps | xps100) + basic_machine=xps100-honeywell + ;; + xscale-* | xscalee[bl]-*) + basic_machine=`echo $basic_machine | sed 's/^xscale/arm/'` + ;; + ymp) + basic_machine=ymp-cray + os=-unicos + ;; + z8k-*-coff) + basic_machine=z8k-unknown + os=-sim + ;; + z80-*-coff) + basic_machine=z80-unknown + os=-sim + ;; + none) + basic_machine=none-none + os=-none + ;; + +# Here we handle the default manufacturer of certain CPU types. It is in +# some cases the only manufacturer, in others, it is the most popular. + w89k) + basic_machine=hppa1.1-winbond + ;; + op50n) + basic_machine=hppa1.1-oki + ;; + op60c) + basic_machine=hppa1.1-oki + ;; + romp) + basic_machine=romp-ibm + ;; + mmix) + basic_machine=mmix-knuth + ;; + rs6000) + basic_machine=rs6000-ibm + ;; + vax) + basic_machine=vax-dec + ;; + pdp10) + # there are many clones, so DEC is not a safe bet + basic_machine=pdp10-unknown + ;; + pdp11) + basic_machine=pdp11-dec + ;; + we32k) + basic_machine=we32k-att + ;; + sh[1234] | sh[24]a | sh[24]aeb | sh[34]eb | sh[1234]le | sh[23]ele) + basic_machine=sh-unknown + ;; + sparc | sparcv8 | sparcv9 | sparcv9b | sparcv9v) + basic_machine=sparc-sun + ;; + cydra) + basic_machine=cydra-cydrome + ;; + orion) + basic_machine=orion-highlevel + ;; + orion105) + basic_machine=clipper-highlevel + ;; + mac | mpw | mac-mpw) + basic_machine=m68k-apple + ;; + pmac | pmac-mpw) + basic_machine=powerpc-apple + ;; + *-unknown) + # Make sure to match an already-canonicalized machine name. + ;; + *) + echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 + exit 1 + ;; +esac + +# Here we canonicalize certain aliases for manufacturers. +case $basic_machine in + *-digital*) + basic_machine=`echo $basic_machine | sed 's/digital.*/dec/'` + ;; + *-commodore*) + basic_machine=`echo $basic_machine | sed 's/commodore.*/cbm/'` + ;; + *) + ;; +esac + +# Decode manufacturer-specific aliases for certain operating systems. + +if [ x"$os" != x"" ] +then +case $os in + # First match some system type aliases + # that might get confused with valid system types. + # -solaris* is a basic system type, with this one exception. + -auroraux) + os=-auroraux + ;; + -solaris1 | -solaris1.*) + os=`echo $os | sed -e 's|solaris1|sunos4|'` + ;; + -solaris) + os=-solaris2 + ;; + -svr4*) + os=-sysv4 + ;; + -unixware*) + os=-sysv4.2uw + ;; + -gnu/linux*) + os=`echo $os | sed -e 's|gnu/linux|linux-gnu|'` + ;; + # First accept the basic system types. + # The portable systems comes first. + # Each alternative MUST END IN A *, to match a version number. + # -sysv* is not here because it comes later, after sysvr4. + -gnu* | -bsd* | -mach* | -minix* | -genix* | -ultrix* | -irix* \ + | -*vms* | -sco* | -esix* | -isc* | -aix* | -cnk* | -sunos | -sunos[34]*\ + | -hpux* | -unos* | -osf* | -luna* | -dgux* | -auroraux* | -solaris* \ + | -sym* | -kopensolaris* | -plan9* \ + | -amigaos* | -amigados* | -msdos* | -newsos* | -unicos* | -aof* \ + | -aos* | -aros* \ + | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \ + | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \ + | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* \ + | -bitrig* | -openbsd* | -solidbsd* \ + | -ekkobsd* | -kfreebsd* | -freebsd* | -riscix* | -lynxos* \ + | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ + | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \ + | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ + | -chorusos* | -chorusrdb* | -cegcc* \ + | -cygwin* | -msys* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ + | -mingw32* | -mingw64* | -linux-gnu* | -linux-android* \ + | -linux-newlib* | -linux-musl* | -linux-uclibc* \ + | -uxpv* | -beos* | -mpeix* | -udk* \ + | -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \ + | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \ + | -storm-chaos* | -tops10* | -tenex* | -tops20* | -its* \ + | -os2* | -vos* | -palmos* | -uclinux* | -nucleus* \ + | -morphos* | -superux* | -rtmk* | -rtmk-nova* | -windiss* \ + | -powermax* | -dnix* | -nx6 | -nx7 | -sei* | -dragonfly* \ + | -skyos* | -haiku* | -rdos* | -toppers* | -drops* | -es*) + # Remember, each alternative MUST END IN *, to match a version number. + ;; + -qnx*) + case $basic_machine in + x86-* | i*86-*) + ;; + *) + os=-nto$os + ;; + esac + ;; + -nto-qnx*) + ;; + -nto*) + os=`echo $os | sed -e 's|nto|nto-qnx|'` + ;; + -sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \ + | -windows* | -osx | -abug | -netware* | -os9* | -beos* | -haiku* \ + | -macos* | -mpw* | -magic* | -mmixware* | -mon960* | -lnews*) + ;; + -mac*) + os=`echo $os | sed -e 's|mac|macos|'` + ;; + -linux-dietlibc) + os=-linux-dietlibc + ;; + -linux*) + os=`echo $os | sed -e 's|linux|linux-gnu|'` + ;; + -sunos5*) + os=`echo $os | sed -e 's|sunos5|solaris2|'` + ;; + -sunos6*) + os=`echo $os | sed -e 's|sunos6|solaris3|'` + ;; + -opened*) + os=-openedition + ;; + -os400*) + os=-os400 + ;; + -wince*) + os=-wince + ;; + -osfrose*) + os=-osfrose + ;; + -osf*) + os=-osf + ;; + -utek*) + os=-bsd + ;; + -dynix*) + os=-bsd + ;; + -acis*) + os=-aos + ;; + -atheos*) + os=-atheos + ;; + -syllable*) + os=-syllable + ;; + -386bsd) + os=-bsd + ;; + -ctix* | -uts*) + os=-sysv + ;; + -nova*) + os=-rtmk-nova + ;; + -ns2 ) + os=-nextstep2 + ;; + -nsk*) + os=-nsk + ;; + # Preserve the version number of sinix5. + -sinix5.*) + os=`echo $os | sed -e 's|sinix|sysv|'` + ;; + -sinix*) + os=-sysv4 + ;; + -tpf*) + os=-tpf + ;; + -triton*) + os=-sysv3 + ;; + -oss*) + os=-sysv3 + ;; + -svr4) + os=-sysv4 + ;; + -svr3) + os=-sysv3 + ;; + -sysvr4) + os=-sysv4 + ;; + # This must come after -sysvr4. + -sysv*) + ;; + -ose*) + os=-ose + ;; + -es1800*) + os=-ose + ;; + -xenix) + os=-xenix + ;; + -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*) + os=-mint + ;; + -aros*) + os=-aros + ;; + -zvmoe) + os=-zvmoe + ;; + -dicos*) + os=-dicos + ;; + -nacl*) + ;; + -none) + ;; + *) + # Get rid of the `-' at the beginning of $os. + os=`echo $os | sed 's/[^-]*-//'` + echo Invalid configuration \`$1\': system \`$os\' not recognized 1>&2 + exit 1 + ;; +esac +else + +# Here we handle the default operating systems that come with various machines. +# The value should be what the vendor currently ships out the door with their +# machine or put another way, the most popular os provided with the machine. + +# Note that if you're going to try to match "-MANUFACTURER" here (say, +# "-sun"), then you have to tell the case statement up towards the top +# that MANUFACTURER isn't an operating system. Otherwise, code above +# will signal an error saying that MANUFACTURER isn't an operating +# system, and we'll never get to this point. + +case $basic_machine in + score-*) + os=-elf + ;; + spu-*) + os=-elf + ;; + *-acorn) + os=-riscix1.2 + ;; + arm*-rebel) + os=-linux + ;; + arm*-semi) + os=-aout + ;; + c4x-* | tic4x-*) + os=-coff + ;; + c8051-*) + os=-elf + ;; + hexagon-*) + os=-elf + ;; + tic54x-*) + os=-coff + ;; + tic55x-*) + os=-coff + ;; + tic6x-*) + os=-coff + ;; + # This must come before the *-dec entry. + pdp10-*) + os=-tops20 + ;; + pdp11-*) + os=-none + ;; + *-dec | vax-*) + os=-ultrix4.2 + ;; + m68*-apollo) + os=-domain + ;; + i386-sun) + os=-sunos4.0.2 + ;; + m68000-sun) + os=-sunos3 + ;; + m68*-cisco) + os=-aout + ;; + mep-*) + os=-elf + ;; + mips*-cisco) + os=-elf + ;; + mips*-*) + os=-elf + ;; + or1k-*) + os=-elf + ;; + or32-*) + os=-coff + ;; + *-tti) # must be before sparc entry or we get the wrong os. + os=-sysv3 + ;; + sparc-* | *-sun) + os=-sunos4.1.1 + ;; + *-be) + os=-beos + ;; + *-haiku) + os=-haiku + ;; + *-ibm) + os=-aix + ;; + *-knuth) + os=-mmixware + ;; + *-wec) + os=-proelf + ;; + *-winbond) + os=-proelf + ;; + *-oki) + os=-proelf + ;; + *-hp) + os=-hpux + ;; + *-hitachi) + os=-hiux + ;; + i860-* | *-att | *-ncr | *-altos | *-motorola | *-convergent) + os=-sysv + ;; + *-cbm) + os=-amigaos + ;; + *-dg) + os=-dgux + ;; + *-dolphin) + os=-sysv3 + ;; + m68k-ccur) + os=-rtu + ;; + m88k-omron*) + os=-luna + ;; + *-next ) + os=-nextstep + ;; + *-sequent) + os=-ptx + ;; + *-crds) + os=-unos + ;; + *-ns) + os=-genix + ;; + i370-*) + os=-mvs + ;; + *-next) + os=-nextstep3 + ;; + *-gould) + os=-sysv + ;; + *-highlevel) + os=-bsd + ;; + *-encore) + os=-bsd + ;; + *-sgi) + os=-irix + ;; + *-siemens) + os=-sysv4 + ;; + *-masscomp) + os=-rtu + ;; + f30[01]-fujitsu | f700-fujitsu) + os=-uxpv + ;; + *-rom68k) + os=-coff + ;; + *-*bug) + os=-coff + ;; + *-apple) + os=-macos + ;; + *-atari*) + os=-mint + ;; + *) + os=-none + ;; +esac +fi + +# Here we handle the case where we know the os, and the CPU type, but not the +# manufacturer. We pick the logical manufacturer. +vendor=unknown +case $basic_machine in + *-unknown) + case $os in + -riscix*) + vendor=acorn + ;; + -sunos*) + vendor=sun + ;; + -cnk*|-aix*) + vendor=ibm + ;; + -beos*) + vendor=be + ;; + -hpux*) + vendor=hp + ;; + -mpeix*) + vendor=hp + ;; + -hiux*) + vendor=hitachi + ;; + -unos*) + vendor=crds + ;; + -dgux*) + vendor=dg + ;; + -luna*) + vendor=omron + ;; + -genix*) + vendor=ns + ;; + -mvs* | -opened*) + vendor=ibm + ;; + -os400*) + vendor=ibm + ;; + -ptx*) + vendor=sequent + ;; + -tpf*) + vendor=ibm + ;; + -vxsim* | -vxworks* | -windiss*) + vendor=wrs + ;; + -aux*) + vendor=apple + ;; + -hms*) + vendor=hitachi + ;; + -mpw* | -macos*) + vendor=apple + ;; + -*mint | -mint[0-9]* | -*MiNT | -MiNT[0-9]*) + vendor=atari + ;; + -vos*) + vendor=stratus + ;; + esac + basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"` + ;; +esac + +echo $basic_machine$os +exit + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "timestamp='" +# time-stamp-format: "%:y-%02m-%02d" +# time-stamp-end: "'" +# End: diff -Nru intel-vaapi-driver-1.0.15/configure intel-vaapi-driver-1.7.1/configure --- intel-vaapi-driver-1.0.15/configure 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/configure 2016-06-21 02:07:54.000000000 +0000 @@ -0,0 +1,16551 @@ +#! /bin/sh +# Guess values for system-dependent variables and create Makefiles. +# Generated by GNU Autoconf 2.69 for intel_driver 1.7.1. +# +# Report bugs to . +# +# +# Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc. +# +# +# This configure script is free software; the Free Software Foundation +# gives unlimited permission to copy, distribute and modify it. +## -------------------- ## +## M4sh Initialization. ## +## -------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : + emulate sh + NULLCMD=: + # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in #( + *posix*) : + set -o posix ;; #( + *) : + ;; +esac +fi + + +as_nl=' +' +export as_nl +# Printing a long string crashes Solaris 7 /usr/bin/printf. +as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo +# Prefer a ksh shell builtin over an external printf program on Solaris, +# but without wasting forks for bash or zsh. +if test -z "$BASH_VERSION$ZSH_VERSION" \ + && (test "X`print -r -- $as_echo`" = "X$as_echo") 2>/dev/null; then + as_echo='print -r --' + as_echo_n='print -rn --' +elif (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then + as_echo='printf %s\n' + as_echo_n='printf %s' +else + if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then + as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"' + as_echo_n='/usr/ucb/echo -n' + else + as_echo_body='eval expr "X$1" : "X\\(.*\\)"' + as_echo_n_body='eval + arg=$1; + case $arg in #( + *"$as_nl"*) + expr "X$arg" : "X\\(.*\\)$as_nl"; + arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;; + esac; + expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl" + ' + export as_echo_n_body + as_echo_n='sh -c $as_echo_n_body as_echo' + fi + export as_echo_body + as_echo='sh -c $as_echo_body as_echo' +fi + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + PATH_SEPARATOR=: + (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { + (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || + PATH_SEPARATOR=';' + } +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +as_myself= +case $0 in #(( + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break + done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + exit 1 +fi + +# Unset variables that we do not need and which cause bugs (e.g. in +# pre-3.0 UWIN ksh). But do not cause bugs in bash 2.01; the "|| exit 1" +# suppresses any "Segmentation fault" message there. '((' could +# trigger a bug in pdksh 5.2.14. +for as_var in BASH_ENV ENV MAIL MAILPATH +do eval test x\${$as_var+set} = xset \ + && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || : +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +LC_ALL=C +export LC_ALL +LANGUAGE=C +export LANGUAGE + +# CDPATH. +(unset CDPATH) >/dev/null 2>&1 && unset CDPATH + +# Use a proper internal environment variable to ensure we don't fall + # into an infinite loop, continuously re-executing ourselves. + if test x"${_as_can_reexec}" != xno && test "x$CONFIG_SHELL" != x; then + _as_can_reexec=no; export _as_can_reexec; + # We cannot yet assume a decent shell, so we have to provide a +# neutralization value for shells without unset; and this also +# works around shells that cannot unset nonexistent variables. +# Preserve -v and -x to the replacement shell. +BASH_ENV=/dev/null +ENV=/dev/null +(unset BASH_ENV) >/dev/null 2>&1 && unset BASH_ENV ENV +case $- in # (((( + *v*x* | *x*v* ) as_opts=-vx ;; + *v* ) as_opts=-v ;; + *x* ) as_opts=-x ;; + * ) as_opts= ;; +esac +exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"} +# Admittedly, this is quite paranoid, since all the known shells bail +# out after a failed `exec'. +$as_echo "$0: could not re-execute with $CONFIG_SHELL" >&2 +as_fn_exit 255 + fi + # We don't want this to propagate to other subprocesses. + { _as_can_reexec=; unset _as_can_reexec;} +if test "x$CONFIG_SHELL" = x; then + as_bourne_compatible="if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then : + emulate sh + NULLCMD=: + # Pre-4.2 versions of Zsh do word splitting on \${1+\"\$@\"}, which + # is contrary to our usage. Disable this feature. + alias -g '\${1+\"\$@\"}'='\"\$@\"' + setopt NO_GLOB_SUBST +else + case \`(set -o) 2>/dev/null\` in #( + *posix*) : + set -o posix ;; #( + *) : + ;; +esac +fi +" + as_required="as_fn_return () { (exit \$1); } +as_fn_success () { as_fn_return 0; } +as_fn_failure () { as_fn_return 1; } +as_fn_ret_success () { return 0; } +as_fn_ret_failure () { return 1; } + +exitcode=0 +as_fn_success || { exitcode=1; echo as_fn_success failed.; } +as_fn_failure && { exitcode=1; echo as_fn_failure succeeded.; } +as_fn_ret_success || { exitcode=1; echo as_fn_ret_success failed.; } +as_fn_ret_failure && { exitcode=1; echo as_fn_ret_failure succeeded.; } +if ( set x; as_fn_ret_success y && test x = \"\$1\" ); then : + +else + exitcode=1; echo positional parameters were not saved. +fi +test x\$exitcode = x0 || exit 1 +test -x / || exit 1" + as_suggested=" as_lineno_1=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_1a=\$LINENO + as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO + eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" && + test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1 + + test -n \"\${ZSH_VERSION+set}\${BASH_VERSION+set}\" || ( + ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' + ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO + ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO + PATH=/empty FPATH=/empty; export PATH FPATH + test \"X\`printf %s \$ECHO\`\" = \"X\$ECHO\" \\ + || test \"X\`print -r -- \$ECHO\`\" = \"X\$ECHO\" ) || exit 1 +test \$(( 1 + 1 )) = 2 || exit 1" + if (eval "$as_required") 2>/dev/null; then : + as_have_required=yes +else + as_have_required=no +fi + if test x$as_have_required = xyes && (eval "$as_suggested") 2>/dev/null; then : + +else + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +as_found=false +for as_dir in /bin$PATH_SEPARATOR/usr/bin$PATH_SEPARATOR$PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + as_found=: + case $as_dir in #( + /*) + for as_base in sh bash ksh sh5; do + # Try only shells that exist, to save several forks. + as_shell=$as_dir/$as_base + if { test -f "$as_shell" || test -f "$as_shell.exe"; } && + { $as_echo "$as_bourne_compatible""$as_required" | as_run=a "$as_shell"; } 2>/dev/null; then : + CONFIG_SHELL=$as_shell as_have_required=yes + if { $as_echo "$as_bourne_compatible""$as_suggested" | as_run=a "$as_shell"; } 2>/dev/null; then : + break 2 +fi +fi + done;; + esac + as_found=false +done +$as_found || { if { test -f "$SHELL" || test -f "$SHELL.exe"; } && + { $as_echo "$as_bourne_compatible""$as_required" | as_run=a "$SHELL"; } 2>/dev/null; then : + CONFIG_SHELL=$SHELL as_have_required=yes +fi; } +IFS=$as_save_IFS + + + if test "x$CONFIG_SHELL" != x; then : + export CONFIG_SHELL + # We cannot yet assume a decent shell, so we have to provide a +# neutralization value for shells without unset; and this also +# works around shells that cannot unset nonexistent variables. +# Preserve -v and -x to the replacement shell. +BASH_ENV=/dev/null +ENV=/dev/null +(unset BASH_ENV) >/dev/null 2>&1 && unset BASH_ENV ENV +case $- in # (((( + *v*x* | *x*v* ) as_opts=-vx ;; + *v* ) as_opts=-v ;; + *x* ) as_opts=-x ;; + * ) as_opts= ;; +esac +exec $CONFIG_SHELL $as_opts "$as_myself" ${1+"$@"} +# Admittedly, this is quite paranoid, since all the known shells bail +# out after a failed `exec'. +$as_echo "$0: could not re-execute with $CONFIG_SHELL" >&2 +exit 255 +fi + + if test x$as_have_required = xno; then : + $as_echo "$0: This script requires a shell more modern than all" + $as_echo "$0: the shells that I found on your system." + if test x${ZSH_VERSION+set} = xset ; then + $as_echo "$0: In particular, zsh $ZSH_VERSION has bugs and should" + $as_echo "$0: be upgraded to zsh 4.3.4 or later." + else + $as_echo "$0: Please tell bug-autoconf@gnu.org and +$0: haihao.xiang@intel.com about your system, including any +$0: error possibly output before this message. Then install +$0: a modern shell, or manually run the script under such a +$0: shell if you do have one." + fi + exit 1 +fi +fi +fi +SHELL=${CONFIG_SHELL-/bin/sh} +export SHELL +# Unset more variables known to interfere with behavior of common tools. +CLICOLOR_FORCE= GREP_OPTIONS= +unset CLICOLOR_FORCE GREP_OPTIONS + +## --------------------- ## +## M4sh Shell Functions. ## +## --------------------- ## +# as_fn_unset VAR +# --------------- +# Portably unset VAR. +as_fn_unset () +{ + { eval $1=; unset $1;} +} +as_unset=as_fn_unset + +# as_fn_set_status STATUS +# ----------------------- +# Set $? to STATUS, without forking. +as_fn_set_status () +{ + return $1 +} # as_fn_set_status + +# as_fn_exit STATUS +# ----------------- +# Exit the shell with STATUS, even in a "trap 0" or "set -e" context. +as_fn_exit () +{ + set +e + as_fn_set_status $1 + exit $1 +} # as_fn_exit + +# as_fn_mkdir_p +# ------------- +# Create "$as_dir" as a directory, including parents if necessary. +as_fn_mkdir_p () +{ + + case $as_dir in #( + -*) as_dir=./$as_dir;; + esac + test -d "$as_dir" || eval $as_mkdir_p || { + as_dirs= + while :; do + case $as_dir in #( + *\'*) as_qdir=`$as_echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'( + *) as_qdir=$as_dir;; + esac + as_dirs="'$as_qdir' $as_dirs" + as_dir=`$as_dirname -- "$as_dir" || +$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$as_dir" : 'X\(//\)[^/]' \| \ + X"$as_dir" : 'X\(//\)$' \| \ + X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || +$as_echo X"$as_dir" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + test -d "$as_dir" && break + done + test -z "$as_dirs" || eval "mkdir $as_dirs" + } || test -d "$as_dir" || as_fn_error $? "cannot create directory $as_dir" + + +} # as_fn_mkdir_p + +# as_fn_executable_p FILE +# ----------------------- +# Test if FILE is an executable regular file. +as_fn_executable_p () +{ + test -f "$1" && test -x "$1" +} # as_fn_executable_p +# as_fn_append VAR VALUE +# ---------------------- +# Append the text in VALUE to the end of the definition contained in VAR. Take +# advantage of any shell optimizations that allow amortized linear growth over +# repeated appends, instead of the typical quadratic growth present in naive +# implementations. +if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null; then : + eval 'as_fn_append () + { + eval $1+=\$2 + }' +else + as_fn_append () + { + eval $1=\$$1\$2 + } +fi # as_fn_append + +# as_fn_arith ARG... +# ------------------ +# Perform arithmetic evaluation on the ARGs, and store the result in the +# global $as_val. Take advantage of shells that can avoid forks. The arguments +# must be portable across $(()) and expr. +if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null; then : + eval 'as_fn_arith () + { + as_val=$(( $* )) + }' +else + as_fn_arith () + { + as_val=`expr "$@" || test $? -eq 1` + } +fi # as_fn_arith + + +# as_fn_error STATUS ERROR [LINENO LOG_FD] +# ---------------------------------------- +# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are +# provided, also output the error to LOG_FD, referencing LINENO. Then exit the +# script with STATUS, using 1 if that was 0. +as_fn_error () +{ + as_status=$1; test $as_status -eq 0 && as_status=1 + if test "$4"; then + as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack + $as_echo "$as_me:${as_lineno-$LINENO}: error: $2" >&$4 + fi + $as_echo "$as_me: error: $2" >&2 + as_fn_exit $as_status +} # as_fn_error + +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + +if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then + as_dirname=dirname +else + as_dirname=false +fi + +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +$as_echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + + + as_lineno_1=$LINENO as_lineno_1a=$LINENO + as_lineno_2=$LINENO as_lineno_2a=$LINENO + eval 'test "x$as_lineno_1'$as_run'" != "x$as_lineno_2'$as_run'" && + test "x`expr $as_lineno_1'$as_run' + 1`" = "x$as_lineno_2'$as_run'"' || { + # Blame Lee E. McMahon (1931-1989) for sed's syntax. :-) + sed -n ' + p + /[$]LINENO/= + ' <$as_myself | + sed ' + s/[$]LINENO.*/&-/ + t lineno + b + :lineno + N + :loop + s/[$]LINENO\([^'$as_cr_alnum'_].*\n\)\(.*\)/\2\1\2/ + t loop + s/-\n.*// + ' >$as_me.lineno && + chmod +x "$as_me.lineno" || + { $as_echo "$as_me: error: cannot create $as_me.lineno; rerun with a POSIX shell" >&2; as_fn_exit 1; } + + # If we had to re-execute with $CONFIG_SHELL, we're ensured to have + # already done that, so ensure we don't try to do so again and fall + # in an infinite loop. This has already happened in practice. + _as_can_reexec=no; export _as_can_reexec + # Don't try to exec as it changes $[0], causing all sort of problems + # (the dirname of $[0] is not the place where we might find the + # original and so on. Autoconf is especially sensitive to this). + . "./$as_me.lineno" + # Exit status is that of the last command. + exit +} + +ECHO_C= ECHO_N= ECHO_T= +case `echo -n x` in #((((( +-n*) + case `echo 'xy\c'` in + *c*) ECHO_T=' ';; # ECHO_T is single tab character. + xy) ECHO_C='\c';; + *) echo `echo ksh88 bug on AIX 6.1` > /dev/null + ECHO_T=' ';; + esac;; +*) + ECHO_N='-n';; +esac + +rm -f conf$$ conf$$.exe conf$$.file +if test -d conf$$.dir; then + rm -f conf$$.dir/conf$$.file +else + rm -f conf$$.dir + mkdir conf$$.dir 2>/dev/null +fi +if (echo >conf$$.file) 2>/dev/null; then + if ln -s conf$$.file conf$$ 2>/dev/null; then + as_ln_s='ln -s' + # ... but there are two gotchas: + # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail. + # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable. + # In both cases, we have to default to `cp -pR'. + ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe || + as_ln_s='cp -pR' + elif ln conf$$.file conf$$ 2>/dev/null; then + as_ln_s=ln + else + as_ln_s='cp -pR' + fi +else + as_ln_s='cp -pR' +fi +rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file +rmdir conf$$.dir 2>/dev/null + +if mkdir -p . 2>/dev/null; then + as_mkdir_p='mkdir -p "$as_dir"' +else + test -d ./-p && rmdir ./-p + as_mkdir_p=false +fi + +as_test_x='test -x' +as_executable_p=as_fn_executable_p + +# Sed expression to map a string onto a valid CPP name. +as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" + +# Sed expression to map a string onto a valid variable name. +as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'" + +SHELL=${CONFIG_SHELL-/bin/sh} + + +test -n "$DJDIR" || exec 7<&0 &1 + +# Name of the host. +# hostname on some systems (SVR3.2, old GNU/Linux) returns a bogus exit status, +# so uname gets run too. +ac_hostname=`(hostname || uname -n) 2>/dev/null | sed 1q` + +# +# Initializations. +# +ac_default_prefix=/usr/local +ac_clean_files= +ac_config_libobj_dir=. +LIBOBJS= +cross_compiling=no +subdirs= +MFLAGS= +MAKEFLAGS= + +# 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variables that are supposed to be based on exec_prefix +# by default will actually change. +# Use braces instead of parens because sh, perl, etc. also accept them. +# (The list follows the same order as the GNU Coding Standards.) +bindir='${exec_prefix}/bin' +sbindir='${exec_prefix}/sbin' +libexecdir='${exec_prefix}/libexec' +datarootdir='${prefix}/share' +datadir='${datarootdir}' +sysconfdir='${prefix}/etc' +sharedstatedir='${prefix}/com' +localstatedir='${prefix}/var' +includedir='${prefix}/include' +oldincludedir='/usr/include' +docdir='${datarootdir}/doc/${PACKAGE_TARNAME}' +infodir='${datarootdir}/info' +htmldir='${docdir}' +dvidir='${docdir}' +pdfdir='${docdir}' +psdir='${docdir}' +libdir='${exec_prefix}/lib' +localedir='${datarootdir}/locale' +mandir='${datarootdir}/man' + +ac_prev= +ac_dashdash= +for ac_option +do + # If the previous option needs an argument, assign it. + if test -n "$ac_prev"; then + eval $ac_prev=\$ac_option + ac_prev= + continue + fi + + case $ac_option in + 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See below for descriptions of some of the useful variables. + +Defaults for the options are specified in brackets. + +Configuration: + -h, --help display this help and exit + --help=short display options specific to this package + --help=recursive display the short help of all the included packages + -V, --version display version information and exit + -q, --quiet, --silent do not print \`checking ...' messages + --cache-file=FILE cache test results in FILE [disabled] + -C, --config-cache alias for \`--cache-file=config.cache' + -n, --no-create do not create output files + --srcdir=DIR find the sources in DIR [configure dir or \`..'] + +Installation directories: + --prefix=PREFIX install architecture-independent files in PREFIX + [$ac_default_prefix] + --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX + [PREFIX] + +By default, \`make install' will install all the files in +\`$ac_default_prefix/bin', \`$ac_default_prefix/lib' etc. You can specify +an installation prefix other than \`$ac_default_prefix' using \`--prefix', +for instance \`--prefix=\$HOME'. + +For better control, use the options below. + +Fine tuning of the installation directories: + --bindir=DIR user executables [EPREFIX/bin] + --sbindir=DIR system admin executables [EPREFIX/sbin] + --libexecdir=DIR program executables [EPREFIX/libexec] + --sysconfdir=DIR read-only single-machine data [PREFIX/etc] + --sharedstatedir=DIR modifiable architecture-independent data [PREFIX/com] + --localstatedir=DIR modifiable single-machine data [PREFIX/var] + --libdir=DIR object code libraries [EPREFIX/lib] + --includedir=DIR C header files [PREFIX/include] + --oldincludedir=DIR C header files for non-gcc [/usr/include] + --datarootdir=DIR read-only arch.-independent data root [PREFIX/share] + --datadir=DIR read-only architecture-independent data [DATAROOTDIR] + --infodir=DIR info documentation [DATAROOTDIR/info] + --localedir=DIR locale-dependent data [DATAROOTDIR/locale] + --mandir=DIR man documentation [DATAROOTDIR/man] + --docdir=DIR documentation root + [DATAROOTDIR/doc/libva-intel-driver] + --htmldir=DIR html documentation [DOCDIR] + --dvidir=DIR dvi documentation [DOCDIR] + --pdfdir=DIR pdf documentation [DOCDIR] + --psdir=DIR ps documentation [DOCDIR] +_ACEOF + + cat <<\_ACEOF + +Program names: + --program-prefix=PREFIX prepend PREFIX to installed program names + --program-suffix=SUFFIX append SUFFIX to installed program names + --program-transform-name=PROGRAM run sed PROGRAM on installed program names + +System types: + --build=BUILD configure for building on BUILD [guessed] + --host=HOST cross-compile to build programs to run on HOST [BUILD] +_ACEOF +fi + +if test -n "$ac_init_help"; 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" >&6; } +if ${ac_cv_prog_ac_ct_STRIP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_STRIP"; then + ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_STRIP="strip" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP +if test -n "$ac_ct_STRIP"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 +$as_echo "$ac_ct_STRIP" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_STRIP" = x; then + STRIP=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + STRIP=$ac_ct_STRIP + fi +else + STRIP="$ac_cv_prog_STRIP" +fi + +fi +INSTALL_STRIP_PROGRAM="\$(install_sh) -c -s" + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a thread-safe mkdir -p" >&5 +$as_echo_n "checking for a thread-safe mkdir -p... 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" >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_CC="gcc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 +$as_echo "$ac_ct_CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_CC="$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 +$as_echo "$ac_ct_CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? 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" >&6; } +if ${ac_cv_path_SED+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_script=s/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa/bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb/ + for ac_i in 1 2 3 4 5 6 7; do + ac_script="$ac_script$as_nl$ac_script" + done + echo "$ac_script" 2>/dev/null | sed 99q >conftest.sed + { ac_script=; unset ac_script;} + if test -z "$SED"; then + ac_path_SED_found=false + # Loop through the user's path and test for each of PROGNAME-LIST + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in sed gsed; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_SED="$as_dir/$ac_prog$ac_exec_ext" + as_fn_executable_p "$ac_path_SED" || continue +# Check for GNU ac_path_SED and select it if it is found. + # Check for GNU $ac_path_SED +case `"$ac_path_SED" --version 2>&1` in +*GNU*) + ac_cv_path_SED="$ac_path_SED" ac_path_SED_found=:;; +*) + ac_count=0 + $as_echo_n 0123456789 >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + $as_echo '' >> "conftest.nl" + "$ac_path_SED" -f conftest.sed < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + as_fn_arith $ac_count + 1 && ac_count=$as_val + if test $ac_count -gt ${ac_path_SED_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_SED="$ac_path_SED" + ac_path_SED_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + $ac_path_SED_found && break 3 + done + done + done +IFS=$as_save_IFS + if test -z "$ac_cv_path_SED"; then + as_fn_error $? "no acceptable sed could be found in \$PATH" "$LINENO" 5 + fi +else + ac_cv_path_SED=$SED +fi + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_SED" >&5 +$as_echo "$ac_cv_path_SED" >&6; } + SED="$ac_cv_path_SED" + rm -f conftest.sed + +test -z "$SED" && SED=sed +Xsed="$SED -e 1s/^X//" + + + + + + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for grep that handles long lines and -e" >&5 +$as_echo_n "checking for grep that handles long lines and -e... " >&6; } +if ${ac_cv_path_GREP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -z "$GREP"; then + ac_path_GREP_found=false + # Loop through the user's path and test for each of PROGNAME-LIST + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in grep ggrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_GREP="$as_dir/$ac_prog$ac_exec_ext" + as_fn_executable_p "$ac_path_GREP" || continue +# Check for GNU ac_path_GREP and select it if it is found. + # Check for GNU $ac_path_GREP +case `"$ac_path_GREP" --version 2>&1` in +*GNU*) + ac_cv_path_GREP="$ac_path_GREP" ac_path_GREP_found=:;; +*) + ac_count=0 + $as_echo_n 0123456789 >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + $as_echo 'GREP' >> "conftest.nl" + "$ac_path_GREP" -e 'GREP$' -e '-(cannot match)-' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + as_fn_arith $ac_count + 1 && ac_count=$as_val + if test $ac_count -gt ${ac_path_GREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_GREP="$ac_path_GREP" + ac_path_GREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + $ac_path_GREP_found && break 3 + done + done + done +IFS=$as_save_IFS + if test -z "$ac_cv_path_GREP"; then + as_fn_error $? "no acceptable grep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5 + fi +else + ac_cv_path_GREP=$GREP +fi + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_GREP" >&5 +$as_echo "$ac_cv_path_GREP" >&6; } + GREP="$ac_cv_path_GREP" + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for egrep" >&5 +$as_echo_n "checking for egrep... " >&6; } +if ${ac_cv_path_EGREP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if echo a | $GREP -E '(a|b)' >/dev/null 2>&1 + then ac_cv_path_EGREP="$GREP -E" + else + if test -z "$EGREP"; then + ac_path_EGREP_found=false + # Loop through the user's path and test for each of PROGNAME-LIST + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in egrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_EGREP="$as_dir/$ac_prog$ac_exec_ext" + as_fn_executable_p "$ac_path_EGREP" || continue +# Check for GNU ac_path_EGREP and select it if it is found. + # Check for GNU $ac_path_EGREP +case `"$ac_path_EGREP" --version 2>&1` in +*GNU*) + ac_cv_path_EGREP="$ac_path_EGREP" ac_path_EGREP_found=:;; +*) + ac_count=0 + $as_echo_n 0123456789 >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + $as_echo 'EGREP' >> "conftest.nl" + "$ac_path_EGREP" 'EGREP$' < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + as_fn_arith $ac_count + 1 && ac_count=$as_val + if test $ac_count -gt ${ac_path_EGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_EGREP="$ac_path_EGREP" + ac_path_EGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + $ac_path_EGREP_found && break 3 + done + done + done +IFS=$as_save_IFS + if test -z "$ac_cv_path_EGREP"; then + as_fn_error $? "no acceptable egrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5 + fi +else + ac_cv_path_EGREP=$EGREP +fi + + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_EGREP" >&5 +$as_echo "$ac_cv_path_EGREP" >&6; } + EGREP="$ac_cv_path_EGREP" + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for fgrep" >&5 +$as_echo_n "checking for fgrep... " >&6; } +if ${ac_cv_path_FGREP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if echo 'ab*c' | $GREP -F 'ab*c' >/dev/null 2>&1 + then ac_cv_path_FGREP="$GREP -F" + else + if test -z "$FGREP"; then + ac_path_FGREP_found=false + # Loop through the user's path and test for each of PROGNAME-LIST + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH$PATH_SEPARATOR/usr/xpg4/bin +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_prog in fgrep; do + for ac_exec_ext in '' $ac_executable_extensions; do + ac_path_FGREP="$as_dir/$ac_prog$ac_exec_ext" + as_fn_executable_p "$ac_path_FGREP" || continue +# Check for GNU ac_path_FGREP and select it if it is found. + # Check for GNU $ac_path_FGREP +case `"$ac_path_FGREP" --version 2>&1` in +*GNU*) + ac_cv_path_FGREP="$ac_path_FGREP" ac_path_FGREP_found=:;; +*) + ac_count=0 + $as_echo_n 0123456789 >"conftest.in" + while : + do + cat "conftest.in" "conftest.in" >"conftest.tmp" + mv "conftest.tmp" "conftest.in" + cp "conftest.in" "conftest.nl" + $as_echo 'FGREP' >> "conftest.nl" + "$ac_path_FGREP" FGREP < "conftest.nl" >"conftest.out" 2>/dev/null || break + diff "conftest.out" "conftest.nl" >/dev/null 2>&1 || break + as_fn_arith $ac_count + 1 && ac_count=$as_val + if test $ac_count -gt ${ac_path_FGREP_max-0}; then + # Best one so far, save it but keep looking for a better one + ac_cv_path_FGREP="$ac_path_FGREP" + ac_path_FGREP_max=$ac_count + fi + # 10*(2^10) chars as input seems more than enough + test $ac_count -gt 10 && break + done + rm -f conftest.in conftest.tmp conftest.nl conftest.out;; +esac + + $ac_path_FGREP_found && break 3 + done + done + done +IFS=$as_save_IFS + if test -z "$ac_cv_path_FGREP"; then + as_fn_error $? "no acceptable fgrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5 + fi +else + ac_cv_path_FGREP=$FGREP +fi + + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_path_FGREP" >&5 +$as_echo "$ac_cv_path_FGREP" >&6; } + FGREP="$ac_cv_path_FGREP" + + +test -z "$GREP" && GREP=grep + + + + + + + + + + + + + + + + + + + +# Check whether --with-gnu-ld was given. +if test "${with_gnu_ld+set}" = set; then : + withval=$with_gnu_ld; test "$withval" = no || with_gnu_ld=yes +else + with_gnu_ld=no +fi + +ac_prog=ld +if test "$GCC" = yes; then + # Check if gcc -print-prog-name=ld gives a path. + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for ld used by $CC" >&5 +$as_echo_n "checking for ld used by $CC... " >&6; } + case $host in + *-*-mingw*) + # gcc leaves a trailing carriage return which upsets mingw + ac_prog=`($CC -print-prog-name=ld) 2>&5 | tr -d '\015'` ;; + *) + ac_prog=`($CC -print-prog-name=ld) 2>&5` ;; + esac + case $ac_prog in + # Accept absolute paths. + [\\/]* | ?:[\\/]*) + re_direlt='/[^/][^/]*/\.\./' + # Canonicalize the pathname of ld + ac_prog=`$ECHO "$ac_prog"| $SED 's%\\\\%/%g'` + while $ECHO "$ac_prog" | $GREP "$re_direlt" > /dev/null 2>&1; do + ac_prog=`$ECHO $ac_prog| $SED "s%$re_direlt%/%"` + done + test -z "$LD" && LD="$ac_prog" + ;; + "") + # If it fails, then pretend we aren't using GCC. + ac_prog=ld + ;; + *) + # If it is relative, then search for the first ld in PATH. + with_gnu_ld=unknown + ;; + esac +elif test "$with_gnu_ld" = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for GNU ld" >&5 +$as_echo_n "checking for GNU ld... " >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for non-GNU ld" >&5 +$as_echo_n "checking for non-GNU ld... " >&6; } +fi +if ${lt_cv_path_LD+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -z "$LD"; then + lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH; do + IFS="$lt_save_ifs" + test -z "$ac_dir" && ac_dir=. + if test -f "$ac_dir/$ac_prog" || test -f "$ac_dir/$ac_prog$ac_exeext"; then + lt_cv_path_LD="$ac_dir/$ac_prog" + # Check to see if the program is GNU ld. I'd rather use --version, + # but apparently some variants of GNU ld only accept -v. + # Break only if it was the GNU/non-GNU ld that we prefer. + case `"$lt_cv_path_LD" -v 2>&1 &5 +$as_echo "$LD" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi +test -z "$LD" && as_fn_error $? "no acceptable ld found in \$PATH" "$LINENO" 5 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if the linker ($LD) is GNU ld" >&5 +$as_echo_n "checking if the linker ($LD) is GNU ld... " >&6; } +if ${lt_cv_prog_gnu_ld+:} false; then : + $as_echo_n "(cached) " >&6 +else + # I'd rather use --version here, but apparently some GNU lds only accept -v. +case `$LD -v 2>&1 &5 +$as_echo "$lt_cv_prog_gnu_ld" >&6; } +with_gnu_ld=$lt_cv_prog_gnu_ld + + + + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for BSD- or MS-compatible name lister (nm)" >&5 +$as_echo_n "checking for BSD- or MS-compatible name lister (nm)... " >&6; } +if ${lt_cv_path_NM+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$NM"; then + # Let the user override the test. + lt_cv_path_NM="$NM" +else + lt_nm_to_check="${ac_tool_prefix}nm" + if test -n "$ac_tool_prefix" && test "$build" = "$host"; then + lt_nm_to_check="$lt_nm_to_check nm" + fi + for lt_tmp_nm in $lt_nm_to_check; do + lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + for ac_dir in $PATH /usr/ccs/bin/elf /usr/ccs/bin /usr/ucb /bin; do + IFS="$lt_save_ifs" + test -z "$ac_dir" && ac_dir=. + tmp_nm="$ac_dir/$lt_tmp_nm" + if test -f "$tmp_nm" || test -f "$tmp_nm$ac_exeext" ; then + # Check to see if the nm accepts a BSD-compat flag. + # Adding the `sed 1q' prevents false positives on HP-UX, which says: + # nm: unknown option "B" ignored + # Tru64's nm complains that /dev/null is an invalid object file + case `"$tmp_nm" -B /dev/null 2>&1 | sed '1q'` in + */dev/null* | *'Invalid file or object type'*) + lt_cv_path_NM="$tmp_nm -B" + break + ;; + *) + case `"$tmp_nm" -p /dev/null 2>&1 | sed '1q'` in + */dev/null*) + lt_cv_path_NM="$tmp_nm -p" + break + ;; + *) + lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but + continue # so that we can try to find one that supports BSD flags + ;; + esac + ;; + esac + fi + done + IFS="$lt_save_ifs" + done + : ${lt_cv_path_NM=no} +fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_NM" >&5 +$as_echo "$lt_cv_path_NM" >&6; } +if test "$lt_cv_path_NM" != "no"; then + NM="$lt_cv_path_NM" +else + # Didn't find any BSD compatible name lister, look for dumpbin. + if test -n "$DUMPBIN"; then : + # Let the user override the test. + else + if test -n "$ac_tool_prefix"; then + for ac_prog in dumpbin "link -dump" + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_DUMPBIN+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$DUMPBIN"; then + ac_cv_prog_DUMPBIN="$DUMPBIN" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_DUMPBIN="$ac_tool_prefix$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +DUMPBIN=$ac_cv_prog_DUMPBIN +if test -n "$DUMPBIN"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DUMPBIN" >&5 +$as_echo "$DUMPBIN" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$DUMPBIN" && break + done +fi +if test -z "$DUMPBIN"; then + ac_ct_DUMPBIN=$DUMPBIN + for ac_prog in dumpbin "link -dump" +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_DUMPBIN+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_DUMPBIN"; then + ac_cv_prog_ac_ct_DUMPBIN="$ac_ct_DUMPBIN" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_DUMPBIN="$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_DUMPBIN=$ac_cv_prog_ac_ct_DUMPBIN +if test -n "$ac_ct_DUMPBIN"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DUMPBIN" >&5 +$as_echo "$ac_ct_DUMPBIN" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$ac_ct_DUMPBIN" && break +done + + if test "x$ac_ct_DUMPBIN" = x; then + DUMPBIN=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + DUMPBIN=$ac_ct_DUMPBIN + fi +fi + + case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in + *COFF*) + DUMPBIN="$DUMPBIN -symbols" + ;; + *) + DUMPBIN=: + ;; + esac + fi + + if test "$DUMPBIN" != ":"; then + NM="$DUMPBIN" + fi +fi +test -z "$NM" && NM=nm + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking the name lister ($NM) interface" >&5 +$as_echo_n "checking the name lister ($NM) interface... " >&6; } +if ${lt_cv_nm_interface+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_nm_interface="BSD nm" + echo "int some_variable = 0;" > conftest.$ac_ext + (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5) + (eval "$ac_compile" 2>conftest.err) + cat conftest.err >&5 + (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5) + (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out) + cat conftest.err >&5 + (eval echo "\"\$as_me:$LINENO: output\"" >&5) + cat conftest.out >&5 + if $GREP 'External.*some_variable' conftest.out > /dev/null; then + lt_cv_nm_interface="MS dumpbin" + fi + rm -f conftest* +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_nm_interface" >&5 +$as_echo "$lt_cv_nm_interface" >&6; } + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ln -s works" >&5 +$as_echo_n "checking whether ln -s works... " >&6; } +LN_S=$as_ln_s +if test "$LN_S" = "ln -s"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no, using $LN_S" >&5 +$as_echo "no, using $LN_S" >&6; } +fi + +# find the maximum length of command line arguments +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking the maximum length of command line arguments" >&5 +$as_echo_n "checking the maximum length of command line arguments... " >&6; } +if ${lt_cv_sys_max_cmd_len+:} false; then : + $as_echo_n "(cached) " >&6 +else + i=0 + teststring="ABCD" + + case $build_os in + msdosdjgpp*) + # On DJGPP, this test can blow up pretty badly due to problems in libc + # (any single argument exceeding 2000 bytes causes a buffer overrun + # during glob expansion). Even if it were fixed, the result of this + # check would be larger than it should be. + lt_cv_sys_max_cmd_len=12288; # 12K is about right + ;; + + gnu*) + # Under GNU Hurd, this test is not required because there is + # no limit to the length of command line arguments. + # Libtool will interpret -1 as no limit whatsoever + lt_cv_sys_max_cmd_len=-1; + ;; + + cygwin* | mingw* | cegcc*) + # On Win9x/ME, this test blows up -- it succeeds, but takes + # about 5 minutes as the teststring grows exponentially. + # Worse, since 9x/ME are not pre-emptively multitasking, + # you end up with a "frozen" computer, even though with patience + # the test eventually succeeds (with a max line length of 256k). + # Instead, let's just punt: use the minimum linelength reported by + # all of the supported platforms: 8192 (on NT/2K/XP). + lt_cv_sys_max_cmd_len=8192; + ;; + + mint*) + # On MiNT this can take a long time and run out of memory. + lt_cv_sys_max_cmd_len=8192; + ;; + + amigaos*) + # On AmigaOS with pdksh, this test takes hours, literally. + # So we just punt and use a minimum line length of 8192. + lt_cv_sys_max_cmd_len=8192; + ;; + + netbsd* | freebsd* | openbsd* | darwin* | dragonfly*) + # This has been around since 386BSD, at least. Likely further. + if test -x /sbin/sysctl; then + lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax` + elif test -x /usr/sbin/sysctl; then + lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax` + else + lt_cv_sys_max_cmd_len=65536 # usable default for all BSDs + fi + # And add a safety zone + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` + ;; + + interix*) + # We know the value 262144 and hardcode it with a safety zone (like BSD) + lt_cv_sys_max_cmd_len=196608 + ;; + + os2*) + # The test takes a long time on OS/2. + lt_cv_sys_max_cmd_len=8192 + ;; + + osf*) + # Dr. Hans Ekkehard Plesser reports seeing a kernel panic running configure + # due to this test when exec_disable_arg_limit is 1 on Tru64. It is not + # nice to cause kernel panics so lets avoid the loop below. + # First set a reasonable default. + lt_cv_sys_max_cmd_len=16384 + # + if test -x /sbin/sysconfig; then + case `/sbin/sysconfig -q proc exec_disable_arg_limit` in + *1*) lt_cv_sys_max_cmd_len=-1 ;; + esac + fi + ;; + sco3.2v5*) + lt_cv_sys_max_cmd_len=102400 + ;; + sysv5* | sco5v6* | sysv4.2uw2*) + kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` + if test -n "$kargmax"; then + lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[ ]//'` + else + lt_cv_sys_max_cmd_len=32768 + fi + ;; + *) + lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` + if test -n "$lt_cv_sys_max_cmd_len" && \ + test undefined != "$lt_cv_sys_max_cmd_len"; then + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` + else + # Make teststring a little bigger before we do anything with it. + # a 1K string should be a reasonable start. + for i in 1 2 3 4 5 6 7 8 ; do + teststring=$teststring$teststring + done + SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} + # If test is not a shell built-in, we'll probably end up computing a + # maximum length that is only half of the actual maximum length, but + # we can't tell. + while { test "X"`env echo "$teststring$teststring" 2>/dev/null` \ + = "X$teststring$teststring"; } >/dev/null 2>&1 && + test $i != 17 # 1/2 MB should be enough + do + i=`expr $i + 1` + teststring=$teststring$teststring + done + # Only check the string length outside the loop. + lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` + teststring= + # Add a significant safety factor because C++ compilers can tack on + # massive amounts of additional arguments before passing them to the + # linker. It appears as though 1/2 is a usable value. + lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` + fi + ;; + esac + +fi + +if test -n $lt_cv_sys_max_cmd_len ; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sys_max_cmd_len" >&5 +$as_echo "$lt_cv_sys_max_cmd_len" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: none" >&5 +$as_echo "none" >&6; } +fi +max_cmd_len=$lt_cv_sys_max_cmd_len + + + + + + +: ${CP="cp -f"} +: ${MV="mv -f"} +: ${RM="rm -f"} + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the shell understands some XSI constructs" >&5 +$as_echo_n "checking whether the shell understands some XSI constructs... " >&6; } +# Try some XSI features +xsi_shell=no +( _lt_dummy="a/b/c" + test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \ + = c,a/b,b/c, \ + && eval 'test $(( 1 + 1 )) -eq 2 \ + && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \ + && xsi_shell=yes +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $xsi_shell" >&5 +$as_echo "$xsi_shell" >&6; } + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the shell understands \"+=\"" >&5 +$as_echo_n "checking whether the shell understands \"+=\"... " >&6; } +lt_shell_append=no +( foo=bar; set foo baz; eval "$1+=\$2" && test "$foo" = barbaz ) \ + >/dev/null 2>&1 \ + && lt_shell_append=yes +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_shell_append" >&5 +$as_echo "$lt_shell_append" >&6; } + + +if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then + lt_unset=unset +else + lt_unset=false +fi + + + + + +# test EBCDIC or ASCII +case `echo X|tr X '\101'` in + A) # ASCII based system + # \n is not interpreted correctly by Solaris 8 /usr/ucb/tr + lt_SP2NL='tr \040 \012' + lt_NL2SP='tr \015\012 \040\040' + ;; + *) # EBCDIC based system + lt_SP2NL='tr \100 \n' + lt_NL2SP='tr \r\n \100\100' + ;; +esac + + + + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5 +$as_echo_n "checking how to convert $build file names to $host format... " >&6; } +if ${lt_cv_to_host_file_cmd+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $host in + *-*-mingw* ) + case $build in + *-*-mingw* ) # actually msys + lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32 + ;; + *-*-cygwin* ) + lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32 + ;; + * ) # otherwise, assume *nix + lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32 + ;; + esac + ;; + *-*-cygwin* ) + case $build in + *-*-mingw* ) # actually msys + lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin + ;; + *-*-cygwin* ) + lt_cv_to_host_file_cmd=func_convert_file_noop + ;; + * ) # otherwise, assume *nix + lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin + ;; + esac + ;; + * ) # unhandled hosts (and "normal" native builds) + lt_cv_to_host_file_cmd=func_convert_file_noop + ;; +esac + +fi + +to_host_file_cmd=$lt_cv_to_host_file_cmd +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5 +$as_echo "$lt_cv_to_host_file_cmd" >&6; } + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5 +$as_echo_n "checking how to convert $build file names to toolchain format... " >&6; } +if ${lt_cv_to_tool_file_cmd+:} false; then : + $as_echo_n "(cached) " >&6 +else + #assume ordinary cross tools, or native build. +lt_cv_to_tool_file_cmd=func_convert_file_noop +case $host in + *-*-mingw* ) + case $build in + *-*-mingw* ) # actually msys + lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32 + ;; + esac + ;; +esac + +fi + +to_tool_file_cmd=$lt_cv_to_tool_file_cmd +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5 +$as_echo "$lt_cv_to_tool_file_cmd" >&6; } + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5 +$as_echo_n "checking for $LD option to reload object files... " >&6; } +if ${lt_cv_ld_reload_flag+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_ld_reload_flag='-r' +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_reload_flag" >&5 +$as_echo "$lt_cv_ld_reload_flag" >&6; } +reload_flag=$lt_cv_ld_reload_flag +case $reload_flag in +"" | " "*) ;; +*) reload_flag=" $reload_flag" ;; +esac +reload_cmds='$LD$reload_flag -o $output$reload_objs' +case $host_os in + cygwin* | mingw* | pw32* | cegcc*) + if test "$GCC" != yes; then + reload_cmds=false + fi + ;; + darwin*) + if test "$GCC" = yes; then + reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs' + else + reload_cmds='$LD$reload_flag -o $output$reload_objs' + fi + ;; +esac + + + + + + + + + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}objdump", so it can be a program name with args. +set dummy ${ac_tool_prefix}objdump; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_OBJDUMP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$OBJDUMP"; then + ac_cv_prog_OBJDUMP="$OBJDUMP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_OBJDUMP="${ac_tool_prefix}objdump" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +OBJDUMP=$ac_cv_prog_OBJDUMP +if test -n "$OBJDUMP"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OBJDUMP" >&5 +$as_echo "$OBJDUMP" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_OBJDUMP"; then + ac_ct_OBJDUMP=$OBJDUMP + # Extract the first word of "objdump", so it can be a program name with args. +set dummy objdump; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_OBJDUMP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_OBJDUMP"; then + ac_cv_prog_ac_ct_OBJDUMP="$ac_ct_OBJDUMP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_OBJDUMP="objdump" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_OBJDUMP=$ac_cv_prog_ac_ct_OBJDUMP +if test -n "$ac_ct_OBJDUMP"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OBJDUMP" >&5 +$as_echo "$ac_ct_OBJDUMP" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_OBJDUMP" = x; then + OBJDUMP="false" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + OBJDUMP=$ac_ct_OBJDUMP + fi +else + OBJDUMP="$ac_cv_prog_OBJDUMP" +fi + +test -z "$OBJDUMP" && OBJDUMP=objdump + + + + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to recognize dependent libraries" >&5 +$as_echo_n "checking how to recognize dependent libraries... " >&6; } +if ${lt_cv_deplibs_check_method+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_file_magic_cmd='$MAGIC_CMD' +lt_cv_file_magic_test_file= +lt_cv_deplibs_check_method='unknown' +# Need to set the preceding variable on all platforms that support +# interlibrary dependencies. +# 'none' -- dependencies not supported. +# `unknown' -- same as none, but documents that we really don't know. +# 'pass_all' -- all dependencies passed with no checks. +# 'test_compile' -- check by making test program. +# 'file_magic [[regex]]' -- check by looking for files in library path +# which responds to the $file_magic_cmd with a given extended regex. +# If you have `file' or equivalent on your system and you're not sure +# whether `pass_all' will *always* work, you probably want this one. + +case $host_os in +aix[4-9]*) + lt_cv_deplibs_check_method=pass_all + ;; + +beos*) + lt_cv_deplibs_check_method=pass_all + ;; + +bsdi[45]*) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' + lt_cv_file_magic_cmd='/usr/bin/file -L' + lt_cv_file_magic_test_file=/shlib/libc.so + ;; + +cygwin*) + # func_win32_libid is a shell function defined in ltmain.sh + lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' + lt_cv_file_magic_cmd='func_win32_libid' + ;; + +mingw* | pw32*) + # Base MSYS/MinGW do not provide the 'file' command needed by + # func_win32_libid shell function, so use a weaker test based on 'objdump', + # unless we find 'file', for example because we are cross-compiling. + # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin. + if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then + lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' + lt_cv_file_magic_cmd='func_win32_libid' + else + # Keep this pattern in sync with the one in func_win32_libid. + lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' + lt_cv_file_magic_cmd='$OBJDUMP -f' + fi + ;; + +cegcc*) + # use the weaker test based on 'objdump'. See mingw*. + lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?' + lt_cv_file_magic_cmd='$OBJDUMP -f' + ;; + +darwin* | rhapsody*) + lt_cv_deplibs_check_method=pass_all + ;; + +freebsd* | dragonfly*) + if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then + case $host_cpu in + i*86 ) + # Not sure whether the presence of OpenBSD here was a mistake. + # Let's accept both of them until this is cleared up. + lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD|DragonFly)/i[3-9]86 (compact )?demand paged shared library' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` + ;; + esac + else + lt_cv_deplibs_check_method=pass_all + fi + ;; + +haiku*) + lt_cv_deplibs_check_method=pass_all + ;; + +hpux10.20* | hpux11*) + lt_cv_file_magic_cmd=/usr/bin/file + case $host_cpu in + ia64*) + lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - IA64' + lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so + ;; + hppa*64*) + lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]' + lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl + ;; + *) + lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library' + lt_cv_file_magic_test_file=/usr/lib/libc.sl + ;; + esac + ;; + +interix[3-9]*) + # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here + lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|\.a)$' + ;; + +irix5* | irix6* | nonstopux*) + case $LD in + *-32|*"-32 ") libmagic=32-bit;; + *-n32|*"-n32 ") libmagic=N32;; + *-64|*"-64 ") libmagic=64-bit;; + *) libmagic=never-match;; + esac + lt_cv_deplibs_check_method=pass_all + ;; + +# This must be glibc/ELF. +linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + lt_cv_deplibs_check_method=pass_all + ;; + +netbsd* | netbsdelf*-gnu) + if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then + lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' + else + lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|_pic\.a)$' + fi + ;; + +newos6*) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (executable|dynamic lib)' + lt_cv_file_magic_cmd=/usr/bin/file + lt_cv_file_magic_test_file=/usr/lib/libnls.so + ;; + +*nto* | *qnx*) + lt_cv_deplibs_check_method=pass_all + ;; + +openbsd*) + if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|\.so|_pic\.a)$' + else + lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' + fi + ;; + +osf3* | osf4* | osf5*) + lt_cv_deplibs_check_method=pass_all + ;; + +rdos*) + lt_cv_deplibs_check_method=pass_all + ;; + +solaris*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) + lt_cv_deplibs_check_method=pass_all + ;; + +sysv4 | sysv4.3*) + case $host_vendor in + motorola) + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' + lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` + ;; + ncr) + lt_cv_deplibs_check_method=pass_all + ;; + sequent) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' + ;; + sni) + lt_cv_file_magic_cmd='/bin/file' + lt_cv_deplibs_check_method="file_magic ELF [0-9][0-9]*-bit [LM]SB dynamic lib" + lt_cv_file_magic_test_file=/lib/libc.so + ;; + siemens) + lt_cv_deplibs_check_method=pass_all + ;; + pc) + lt_cv_deplibs_check_method=pass_all + ;; + esac + ;; + +tpf*) + lt_cv_deplibs_check_method=pass_all + ;; +esac + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5 +$as_echo "$lt_cv_deplibs_check_method" >&6; } + +file_magic_glob= +want_nocaseglob=no +if test "$build" = "$host"; then + case $host_os in + mingw* | pw32*) + if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then + want_nocaseglob=yes + else + file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"` + fi + ;; + esac +fi + +file_magic_cmd=$lt_cv_file_magic_cmd +deplibs_check_method=$lt_cv_deplibs_check_method +test -z "$deplibs_check_method" && deplibs_check_method=unknown + + + + + + + + + + + + + + + + + + + + + + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args. +set dummy ${ac_tool_prefix}dlltool; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_DLLTOOL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$DLLTOOL"; then + ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +DLLTOOL=$ac_cv_prog_DLLTOOL +if test -n "$DLLTOOL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5 +$as_echo "$DLLTOOL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_DLLTOOL"; then + ac_ct_DLLTOOL=$DLLTOOL + # Extract the first word of "dlltool", so it can be a program name with args. +set dummy dlltool; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_DLLTOOL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_DLLTOOL"; then + ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_DLLTOOL="dlltool" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL +if test -n "$ac_ct_DLLTOOL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5 +$as_echo "$ac_ct_DLLTOOL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_DLLTOOL" = x; then + DLLTOOL="false" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + DLLTOOL=$ac_ct_DLLTOOL + fi +else + DLLTOOL="$ac_cv_prog_DLLTOOL" +fi + +test -z "$DLLTOOL" && DLLTOOL=dlltool + + + + + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5 +$as_echo_n "checking how to associate runtime and link libraries... " >&6; } +if ${lt_cv_sharedlib_from_linklib_cmd+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_sharedlib_from_linklib_cmd='unknown' + +case $host_os in +cygwin* | mingw* | pw32* | cegcc*) + # two different shell functions defined in ltmain.sh + # decide which to use based on capabilities of $DLLTOOL + case `$DLLTOOL --help 2>&1` in + *--identify-strict*) + lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib + ;; + *) + lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback + ;; + esac + ;; +*) + # fallback: assume linklib IS sharedlib + lt_cv_sharedlib_from_linklib_cmd="$ECHO" + ;; +esac + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5 +$as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; } +sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd +test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO + + + + + + + + +if test -n "$ac_tool_prefix"; then + for ac_prog in ar + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_AR+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$AR"; then + ac_cv_prog_AR="$AR" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_AR="$ac_tool_prefix$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +AR=$ac_cv_prog_AR +if test -n "$AR"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5 +$as_echo "$AR" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$AR" && break + done +fi +if test -z "$AR"; then + ac_ct_AR=$AR + for ac_prog in ar +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_AR+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_AR"; then + ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_AR="$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_AR=$ac_cv_prog_ac_ct_AR +if test -n "$ac_ct_AR"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5 +$as_echo "$ac_ct_AR" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$ac_ct_AR" && break +done + + if test "x$ac_ct_AR" = x; then + AR="false" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + AR=$ac_ct_AR + fi +fi + +: ${AR=ar} +: ${AR_FLAGS=cru} + + + + + + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5 +$as_echo_n "checking for archiver @FILE support... " >&6; } +if ${lt_cv_ar_at_file+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_ar_at_file=no + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + echo conftest.$ac_objext > conftest.lst + lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 + (eval $lt_ar_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } + if test "$ac_status" -eq 0; then + # Ensure the archiver fails upon bogus file names. + rm -f conftest.$ac_objext libconftest.a + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 + (eval $lt_ar_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } + if test "$ac_status" -ne 0; then + lt_cv_ar_at_file=@ + fi + fi + rm -f conftest.* libconftest.a + +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5 +$as_echo "$lt_cv_ar_at_file" >&6; } + +if test "x$lt_cv_ar_at_file" = xno; then + archiver_list_spec= +else + archiver_list_spec=$lt_cv_ar_at_file +fi + + + + + + + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. +set dummy ${ac_tool_prefix}strip; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_STRIP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$STRIP"; then + ac_cv_prog_STRIP="$STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_STRIP="${ac_tool_prefix}strip" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +STRIP=$ac_cv_prog_STRIP +if test -n "$STRIP"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5 +$as_echo "$STRIP" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_STRIP"; then + ac_ct_STRIP=$STRIP + # Extract the first word of "strip", so it can be a program name with args. +set dummy strip; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_STRIP+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_STRIP"; then + ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_STRIP="strip" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP +if test -n "$ac_ct_STRIP"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 +$as_echo "$ac_ct_STRIP" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_STRIP" = x; then + STRIP=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + STRIP=$ac_ct_STRIP + fi +else + STRIP="$ac_cv_prog_STRIP" +fi + +test -z "$STRIP" && STRIP=: + + + + + + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. +set dummy ${ac_tool_prefix}ranlib; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_RANLIB+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$RANLIB"; then + ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +RANLIB=$ac_cv_prog_RANLIB +if test -n "$RANLIB"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5 +$as_echo "$RANLIB" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_RANLIB"; then + ac_ct_RANLIB=$RANLIB + # Extract the first word of "ranlib", so it can be a program name with args. +set dummy ranlib; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_RANLIB+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_RANLIB"; then + ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_RANLIB="ranlib" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB +if test -n "$ac_ct_RANLIB"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5 +$as_echo "$ac_ct_RANLIB" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_RANLIB" = x; then + RANLIB=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + RANLIB=$ac_ct_RANLIB + fi +else + RANLIB="$ac_cv_prog_RANLIB" +fi + +test -z "$RANLIB" && RANLIB=: + + + + + + +# Determine commands to create old-style static archives. +old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs' +old_postinstall_cmds='chmod 644 $oldlib' +old_postuninstall_cmds= + +if test -n "$RANLIB"; then + case $host_os in + openbsd*) + old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB -t \$tool_oldlib" + ;; + *) + old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB \$tool_oldlib" + ;; + esac + old_archive_cmds="$old_archive_cmds~\$RANLIB \$tool_oldlib" +fi + +case $host_os in + darwin*) + lock_old_archive_extraction=yes ;; + *) + lock_old_archive_extraction=no ;; +esac + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +# If no C compiler was specified, use CC. +LTCC=${LTCC-"$CC"} + +# If no C compiler flags were specified, use CFLAGS. +LTCFLAGS=${LTCFLAGS-"$CFLAGS"} + +# Allow CC to be a program name with arguments. +compiler=$CC + + +# Check for command to grab the raw symbol name followed by C symbol from nm. +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking command to parse $NM output from $compiler object" >&5 +$as_echo_n "checking command to parse $NM output from $compiler object... " >&6; } +if ${lt_cv_sys_global_symbol_pipe+:} false; then : + $as_echo_n "(cached) " >&6 +else + +# These are sane defaults that work on at least a few old systems. +# [They come from Ultrix. What could be older than Ultrix?!! ;)] + +# Character class describing NM global symbol codes. +symcode='[BCDEGRST]' + +# Regexp to match symbols that can be accessed directly from C. +sympat='\([_A-Za-z][_A-Za-z0-9]*\)' + +# Define system-specific variables. +case $host_os in +aix*) + symcode='[BCDT]' + ;; +cygwin* | mingw* | pw32* | cegcc*) + symcode='[ABCDGISTW]' + ;; +hpux*) + if test "$host_cpu" = ia64; then + symcode='[ABCDEGRST]' + fi + ;; +irix* | nonstopux*) + symcode='[BCDEGRST]' + ;; +osf*) + symcode='[BCDEGQRST]' + ;; +solaris*) + symcode='[BDRT]' + ;; +sco3.2v5*) + symcode='[DT]' + ;; +sysv4.2uw2*) + symcode='[DT]' + ;; +sysv5* | sco5v6* | unixware* | OpenUNIX*) + symcode='[ABDT]' + ;; +sysv4) + symcode='[DFNSTU]' + ;; +esac + +# If we're using GNU nm, then use its standard symbol codes. +case `$NM -V 2>&1` in +*GNU* | *'with BFD'*) + symcode='[ABCDGIRSTW]' ;; +esac + +# Transform an extracted symbol line into a proper C declaration. +# Some systems (esp. on ia64) link data and code symbols differently, +# so use this general approach. +lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" + +# Transform an extracted symbol line into symbol name and symbol address +lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/ {\"\2\", (void *) \&\2},/p'" +lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/ {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/ {\"lib\2\", (void *) \&\2},/p'" + +# Handle CRLF in mingw tool chain +opt_cr= +case $build_os in +mingw*) + opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp + ;; +esac + +# Try without a prefix underscore, then with it. +for ac_symprfx in "" "_"; do + + # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. + symxfrm="\\1 $ac_symprfx\\2 \\2" + + # Write the raw and C identifiers. + if test "$lt_cv_nm_interface" = "MS dumpbin"; then + # Fake it for dumpbin and say T for any non-static function + # and D for any global variable. + # Also find C++ and __fastcall symbols from MSVC++, + # which start with @ or ?. + lt_cv_sys_global_symbol_pipe="$AWK '"\ +" {last_section=section; section=\$ 3};"\ +" /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ +" /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ +" \$ 0!~/External *\|/{next};"\ +" / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ +" {if(hide[section]) next};"\ +" {f=0}; \$ 0~/\(\).*\|/{f=1}; {printf f ? \"T \" : \"D \"};"\ +" {split(\$ 0, a, /\||\r/); split(a[2], s)};"\ +" s[1]~/^[@?]/{print s[1], s[1]; next};"\ +" s[1]~prfx {split(s[1],t,\"@\"); print t[1], substr(t[1],length(prfx))}"\ +" ' prfx=^$ac_symprfx" + else + lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[ ]\($symcode$symcode*\)[ ][ ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" + fi + lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" + + # Check to see that the pipe works correctly. + pipe_works=no + + rm -f conftest* + cat > conftest.$ac_ext <<_LT_EOF +#ifdef __cplusplus +extern "C" { +#endif +char nm_test_var; +void nm_test_func(void); +void nm_test_func(void){} +#ifdef __cplusplus +} +#endif +int main(){nm_test_var='a';nm_test_func();return(0);} +_LT_EOF + + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + # Now try to grab the symbols. + nlist=conftest.nm + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5 + (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } && test -s "$nlist"; then + # Try sorting and uniquifying the output. + if sort "$nlist" | uniq > "$nlist"T; then + mv -f "$nlist"T "$nlist" + else + rm -f "$nlist"T + fi + + # Make sure that we snagged all the symbols we need. + if $GREP ' nm_test_var$' "$nlist" >/dev/null; then + if $GREP ' nm_test_func$' "$nlist" >/dev/null; then + cat <<_LT_EOF > conftest.$ac_ext +/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ +#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE) +/* DATA imports from DLLs on WIN32 con't be const, because runtime + relocations are performed -- see ld's documentation on pseudo-relocs. */ +# define LT_DLSYM_CONST +#elif defined(__osf__) +/* This system does not cope well with relocations in const data. */ +# define LT_DLSYM_CONST +#else +# define LT_DLSYM_CONST const +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +_LT_EOF + # Now generate the symbol file. + eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' + + cat <<_LT_EOF >> conftest.$ac_ext + +/* The mapping between symbol names and symbols. */ +LT_DLSYM_CONST struct { + const char *name; + void *address; +} +lt__PROGRAM__LTX_preloaded_symbols[] = +{ + { "@PROGRAM@", (void *) 0 }, +_LT_EOF + $SED "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (void *) \&\2},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext + cat <<\_LT_EOF >> conftest.$ac_ext + {0, (void *) 0} +}; + +/* This works around a problem in FreeBSD linker */ +#ifdef FREEBSD_WORKAROUND +static const void *lt_preloaded_setup() { + return lt__PROGRAM__LTX_preloaded_symbols; +} +#endif + +#ifdef __cplusplus +} +#endif +_LT_EOF + # Now try linking the two files. + mv conftest.$ac_objext conftstm.$ac_objext + lt_globsym_save_LIBS=$LIBS + lt_globsym_save_CFLAGS=$CFLAGS + LIBS="conftstm.$ac_objext" + CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag" + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 + (eval $ac_link) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } && test -s conftest${ac_exeext}; then + pipe_works=yes + fi + LIBS=$lt_globsym_save_LIBS + CFLAGS=$lt_globsym_save_CFLAGS + else + echo "cannot find nm_test_func in $nlist" >&5 + fi + else + echo "cannot find nm_test_var in $nlist" >&5 + fi + else + echo "cannot run $lt_cv_sys_global_symbol_pipe" >&5 + fi + else + echo "$progname: failed program was:" >&5 + cat conftest.$ac_ext >&5 + fi + rm -rf conftest* conftst* + + # Do not use the global_symbol_pipe unless it works. + if test "$pipe_works" = yes; then + break + else + lt_cv_sys_global_symbol_pipe= + fi +done + +fi + +if test -z "$lt_cv_sys_global_symbol_pipe"; then + lt_cv_sys_global_symbol_to_cdecl= +fi +if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: failed" >&5 +$as_echo "failed" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok" >&5 +$as_echo "ok" >&6; } +fi + +# Response file support. +if test "$lt_cv_nm_interface" = "MS dumpbin"; then + nm_file_list_spec='@' +elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then + nm_file_list_spec='@' +fi + + + + + + + + + + + + + + + + + + + + + + + + + + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5 +$as_echo_n "checking for sysroot... " >&6; } + +# Check whether --with-sysroot was given. +if test "${with_sysroot+set}" = set; then : + withval=$with_sysroot; +else + with_sysroot=no +fi + + +lt_sysroot= +case ${with_sysroot} in #( + yes) + if test "$GCC" = yes; then + lt_sysroot=`$CC --print-sysroot 2>/dev/null` + fi + ;; #( + /*) + lt_sysroot=`echo "$with_sysroot" | sed -e "$sed_quote_subst"` + ;; #( + no|'') + ;; #( + *) + { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_sysroot}" >&5 +$as_echo "${with_sysroot}" >&6; } + as_fn_error $? "The sysroot must be an absolute path." "$LINENO" 5 + ;; +esac + + { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5 +$as_echo "${lt_sysroot:-no}" >&6; } + + + + + +# Check whether --enable-libtool-lock was given. +if test "${enable_libtool_lock+set}" = set; then : + enableval=$enable_libtool_lock; +fi + +test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes + +# Some flags need to be propagated to the compiler or linker for good +# libtool support. +case $host in +ia64-*-hpux*) + # Find out which ABI we are using. + echo 'int i;' > conftest.$ac_ext + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + case `/usr/bin/file conftest.$ac_objext` in + *ELF-32*) + HPUX_IA64_MODE="32" + ;; + *ELF-64*) + HPUX_IA64_MODE="64" + ;; + esac + fi + rm -rf conftest* + ;; +*-*-irix6*) + # Find out which ABI we are using. + echo '#line '$LINENO' "configure"' > conftest.$ac_ext + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + if test "$lt_cv_prog_gnu_ld" = yes; then + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -melf32bsmip" + ;; + *N32*) + LD="${LD-ld} -melf32bmipn32" + ;; + *64-bit*) + LD="${LD-ld} -melf64bmip" + ;; + esac + else + case `/usr/bin/file conftest.$ac_objext` in + *32-bit*) + LD="${LD-ld} -32" + ;; + *N32*) + LD="${LD-ld} -n32" + ;; + *64-bit*) + LD="${LD-ld} -64" + ;; + esac + fi + fi + rm -rf conftest* + ;; + +x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \ +s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + # Find out which ABI we are using. + echo 'int i;' > conftest.$ac_ext + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + case `/usr/bin/file conftest.o` in + *32-bit*) + case $host in + x86_64-*kfreebsd*-gnu) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) + case `/usr/bin/file conftest.o` in + *x86-64*) + LD="${LD-ld} -m elf32_x86_64" + ;; + *) + LD="${LD-ld} -m elf_i386" + ;; + esac + ;; + powerpc64le-*) + LD="${LD-ld} -m elf32lppclinux" + ;; + powerpc64-*) + LD="${LD-ld} -m elf32ppclinux" + ;; + s390x-*linux*) + LD="${LD-ld} -m elf_s390" + ;; + sparc64-*linux*) + LD="${LD-ld} -m elf32_sparc" + ;; + esac + ;; + *64-bit*) + case $host in + x86_64-*kfreebsd*-gnu) + LD="${LD-ld} -m elf_x86_64_fbsd" + ;; + x86_64-*linux*) + LD="${LD-ld} -m elf_x86_64" + ;; + powerpcle-*) + LD="${LD-ld} -m elf64lppc" + ;; + powerpc-*) + LD="${LD-ld} -m elf64ppc" + ;; + s390*-*linux*|s390*-*tpf*) + LD="${LD-ld} -m elf64_s390" + ;; + sparc*-*linux*) + LD="${LD-ld} -m elf64_sparc" + ;; + esac + ;; + esac + fi + rm -rf conftest* + ;; + +*-*-sco3.2v5*) + # On SCO OpenServer 5, we need -belf to get full-featured binaries. + SAVE_CFLAGS="$CFLAGS" + CFLAGS="$CFLAGS -belf" + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the C compiler needs -belf" >&5 +$as_echo_n "checking whether the C compiler needs -belf... " >&6; } +if ${lt_cv_cc_needs_belf+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + lt_cv_cc_needs_belf=yes +else + lt_cv_cc_needs_belf=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_cc_needs_belf" >&5 +$as_echo "$lt_cv_cc_needs_belf" >&6; } + if test x"$lt_cv_cc_needs_belf" != x"yes"; then + # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf + CFLAGS="$SAVE_CFLAGS" + fi + ;; +*-*solaris*) + # Find out which ABI we are using. + echo 'int i;' > conftest.$ac_ext + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + case `/usr/bin/file conftest.o` in + *64-bit*) + case $lt_cv_prog_gnu_ld in + yes*) + case $host in + i?86-*-solaris*) + LD="${LD-ld} -m elf_x86_64" + ;; + sparc*-*-solaris*) + LD="${LD-ld} -m elf64_sparc" + ;; + esac + # GNU ld 2.21 introduced _sol2 emulations. Use them if available. + if ${LD-ld} -V | grep _sol2 >/dev/null 2>&1; then + LD="${LD-ld}_sol2" + fi + ;; + *) + if ${LD-ld} -64 -r -o conftest2.o conftest.o >/dev/null 2>&1; then + LD="${LD-ld} -64" + fi + ;; + esac + ;; + esac + fi + rm -rf conftest* + ;; +esac + +need_locks="$enable_libtool_lock" + +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args. +set dummy ${ac_tool_prefix}mt; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_MANIFEST_TOOL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$MANIFEST_TOOL"; then + ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL +if test -n "$MANIFEST_TOOL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5 +$as_echo "$MANIFEST_TOOL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_MANIFEST_TOOL"; then + ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL + # Extract the first word of "mt", so it can be a program name with args. +set dummy mt; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_MANIFEST_TOOL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_MANIFEST_TOOL"; then + ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_MANIFEST_TOOL="mt" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL +if test -n "$ac_ct_MANIFEST_TOOL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5 +$as_echo "$ac_ct_MANIFEST_TOOL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_MANIFEST_TOOL" = x; then + MANIFEST_TOOL=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL + fi +else + MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL" +fi + +test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5 +$as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; } +if ${lt_cv_path_mainfest_tool+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_path_mainfest_tool=no + echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5 + $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out + cat conftest.err >&5 + if $GREP 'Manifest Tool' conftest.out > /dev/null; then + lt_cv_path_mainfest_tool=yes + fi + rm -f conftest* +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5 +$as_echo "$lt_cv_path_mainfest_tool" >&6; } +if test "x$lt_cv_path_mainfest_tool" != xyes; then + MANIFEST_TOOL=: +fi + + + + + + + case $host_os in + rhapsody* | darwin*) + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}dsymutil", so it can be a program name with args. +set dummy ${ac_tool_prefix}dsymutil; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_DSYMUTIL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$DSYMUTIL"; then + ac_cv_prog_DSYMUTIL="$DSYMUTIL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_DSYMUTIL="${ac_tool_prefix}dsymutil" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +DSYMUTIL=$ac_cv_prog_DSYMUTIL +if test -n "$DSYMUTIL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DSYMUTIL" >&5 +$as_echo "$DSYMUTIL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_DSYMUTIL"; then + ac_ct_DSYMUTIL=$DSYMUTIL + # Extract the first word of "dsymutil", so it can be a program name with args. +set dummy dsymutil; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_DSYMUTIL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_DSYMUTIL"; then + ac_cv_prog_ac_ct_DSYMUTIL="$ac_ct_DSYMUTIL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_DSYMUTIL="dsymutil" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_DSYMUTIL=$ac_cv_prog_ac_ct_DSYMUTIL +if test -n "$ac_ct_DSYMUTIL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DSYMUTIL" >&5 +$as_echo "$ac_ct_DSYMUTIL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_DSYMUTIL" = x; then + DSYMUTIL=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + DSYMUTIL=$ac_ct_DSYMUTIL + fi +else + DSYMUTIL="$ac_cv_prog_DSYMUTIL" +fi + + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}nmedit", so it can be a program name with args. +set dummy ${ac_tool_prefix}nmedit; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_NMEDIT+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$NMEDIT"; then + ac_cv_prog_NMEDIT="$NMEDIT" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_NMEDIT="${ac_tool_prefix}nmedit" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +NMEDIT=$ac_cv_prog_NMEDIT +if test -n "$NMEDIT"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $NMEDIT" >&5 +$as_echo "$NMEDIT" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_NMEDIT"; then + ac_ct_NMEDIT=$NMEDIT + # Extract the first word of "nmedit", so it can be a program name with args. +set dummy nmedit; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_NMEDIT+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_NMEDIT"; then + ac_cv_prog_ac_ct_NMEDIT="$ac_ct_NMEDIT" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_NMEDIT="nmedit" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_NMEDIT=$ac_cv_prog_ac_ct_NMEDIT +if test -n "$ac_ct_NMEDIT"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_NMEDIT" >&5 +$as_echo "$ac_ct_NMEDIT" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_NMEDIT" = x; then + NMEDIT=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + NMEDIT=$ac_ct_NMEDIT + fi +else + NMEDIT="$ac_cv_prog_NMEDIT" +fi + + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}lipo", so it can be a program name with args. +set dummy ${ac_tool_prefix}lipo; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_LIPO+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$LIPO"; then + ac_cv_prog_LIPO="$LIPO" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_LIPO="${ac_tool_prefix}lipo" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +LIPO=$ac_cv_prog_LIPO +if test -n "$LIPO"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LIPO" >&5 +$as_echo "$LIPO" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_LIPO"; then + ac_ct_LIPO=$LIPO + # Extract the first word of "lipo", so it can be a program name with args. +set dummy lipo; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_LIPO+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_LIPO"; then + ac_cv_prog_ac_ct_LIPO="$ac_ct_LIPO" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_LIPO="lipo" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_LIPO=$ac_cv_prog_ac_ct_LIPO +if test -n "$ac_ct_LIPO"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_LIPO" >&5 +$as_echo "$ac_ct_LIPO" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_LIPO" = x; then + LIPO=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + LIPO=$ac_ct_LIPO + fi +else + LIPO="$ac_cv_prog_LIPO" +fi + + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}otool", so it can be a program name with args. +set dummy ${ac_tool_prefix}otool; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_OTOOL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$OTOOL"; then + ac_cv_prog_OTOOL="$OTOOL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_OTOOL="${ac_tool_prefix}otool" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +OTOOL=$ac_cv_prog_OTOOL +if test -n "$OTOOL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL" >&5 +$as_echo "$OTOOL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_OTOOL"; then + ac_ct_OTOOL=$OTOOL + # Extract the first word of "otool", so it can be a program name with args. +set dummy otool; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_OTOOL+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_OTOOL"; then + ac_cv_prog_ac_ct_OTOOL="$ac_ct_OTOOL" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_OTOOL="otool" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_OTOOL=$ac_cv_prog_ac_ct_OTOOL +if test -n "$ac_ct_OTOOL"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL" >&5 +$as_echo "$ac_ct_OTOOL" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_OTOOL" = x; then + OTOOL=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + OTOOL=$ac_ct_OTOOL + fi +else + OTOOL="$ac_cv_prog_OTOOL" +fi + + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}otool64", so it can be a program name with args. +set dummy ${ac_tool_prefix}otool64; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_OTOOL64+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$OTOOL64"; then + ac_cv_prog_OTOOL64="$OTOOL64" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_OTOOL64="${ac_tool_prefix}otool64" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +OTOOL64=$ac_cv_prog_OTOOL64 +if test -n "$OTOOL64"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL64" >&5 +$as_echo "$OTOOL64" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_OTOOL64"; then + ac_ct_OTOOL64=$OTOOL64 + # Extract the first word of "otool64", so it can be a program name with args. +set dummy otool64; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_OTOOL64+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_OTOOL64"; then + ac_cv_prog_ac_ct_OTOOL64="$ac_ct_OTOOL64" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_OTOOL64="otool64" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_OTOOL64=$ac_cv_prog_ac_ct_OTOOL64 +if test -n "$ac_ct_OTOOL64"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL64" >&5 +$as_echo "$ac_ct_OTOOL64" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_OTOOL64" = x; then + OTOOL64=":" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + OTOOL64=$ac_ct_OTOOL64 + fi +else + OTOOL64="$ac_cv_prog_OTOOL64" +fi + + + + + + + + + + + + + + + + + + + + + + + + + + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -single_module linker flag" >&5 +$as_echo_n "checking for -single_module linker flag... " >&6; } +if ${lt_cv_apple_cc_single_mod+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_apple_cc_single_mod=no + if test -z "${LT_MULTI_MODULE}"; then + # By default we will add the -single_module flag. You can override + # by either setting the environment variable LT_MULTI_MODULE + # non-empty at configure time, or by adding -multi_module to the + # link flags. + rm -rf libconftest.dylib* + echo "int foo(void){return 1;}" > conftest.c + echo "$LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ +-dynamiclib -Wl,-single_module conftest.c" >&5 + $LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ + -dynamiclib -Wl,-single_module conftest.c 2>conftest.err + _lt_result=$? + # If there is a non-empty error log, and "single_module" + # appears in it, assume the flag caused a linker warning + if test -s conftest.err && $GREP single_module conftest.err; then + cat conftest.err >&5 + # Otherwise, if the output was created with a 0 exit code from + # the compiler, it worked. + elif test -f libconftest.dylib && test $_lt_result -eq 0; then + lt_cv_apple_cc_single_mod=yes + else + cat conftest.err >&5 + fi + rm -rf libconftest.dylib* + rm -f conftest.* + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_apple_cc_single_mod" >&5 +$as_echo "$lt_cv_apple_cc_single_mod" >&6; } + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -exported_symbols_list linker flag" >&5 +$as_echo_n "checking for -exported_symbols_list linker flag... " >&6; } +if ${lt_cv_ld_exported_symbols_list+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_ld_exported_symbols_list=no + save_LDFLAGS=$LDFLAGS + echo "_main" > conftest.sym + LDFLAGS="$LDFLAGS -Wl,-exported_symbols_list,conftest.sym" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + lt_cv_ld_exported_symbols_list=yes +else + lt_cv_ld_exported_symbols_list=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + LDFLAGS="$save_LDFLAGS" + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5 +$as_echo "$lt_cv_ld_exported_symbols_list" >&6; } + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5 +$as_echo_n "checking for -force_load linker flag... " >&6; } +if ${lt_cv_ld_force_load+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_ld_force_load=no + cat > conftest.c << _LT_EOF +int forced_loaded() { return 2;} +_LT_EOF + echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5 + $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5 + echo "$AR cru libconftest.a conftest.o" >&5 + $AR cru libconftest.a conftest.o 2>&5 + echo "$RANLIB libconftest.a" >&5 + $RANLIB libconftest.a 2>&5 + cat > conftest.c << _LT_EOF +int main() { return 0;} +_LT_EOF + echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5 + $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err + _lt_result=$? + if test -s conftest.err && $GREP force_load conftest.err; then + cat conftest.err >&5 + elif test -f conftest && test $_lt_result -eq 0 && $GREP forced_load conftest >/dev/null 2>&1 ; then + lt_cv_ld_force_load=yes + else + cat conftest.err >&5 + fi + rm -f conftest.err libconftest.a conftest conftest.c + rm -rf conftest.dSYM + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5 +$as_echo "$lt_cv_ld_force_load" >&6; } + case $host_os in + rhapsody* | darwin1.[012]) + _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;; + darwin1.*) + _lt_dar_allow_undefined='${wl}-flat_namespace ${wl}-undefined ${wl}suppress' ;; + darwin*) # darwin 5.x on + # if running on 10.5 or later, the deployment target defaults + # to the OS version, if on x86, and 10.4, the deployment + # target defaults to 10.4. Don't you love it? + case ${MACOSX_DEPLOYMENT_TARGET-10.0},$host in + 10.0,*86*-darwin8*|10.0,*-darwin[91]*) + _lt_dar_allow_undefined='${wl}-undefined ${wl}dynamic_lookup' ;; + 10.[012]*) + _lt_dar_allow_undefined='${wl}-flat_namespace ${wl}-undefined ${wl}suppress' ;; + 10.*) + _lt_dar_allow_undefined='${wl}-undefined ${wl}dynamic_lookup' ;; + esac + ;; + esac + if test "$lt_cv_apple_cc_single_mod" = "yes"; then + _lt_dar_single_mod='$single_module' + fi + if test "$lt_cv_ld_exported_symbols_list" = "yes"; then + _lt_dar_export_syms=' ${wl}-exported_symbols_list,$output_objdir/${libname}-symbols.expsym' + else + _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}' + fi + if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then + _lt_dsymutil='~$DSYMUTIL $lib || :' + else + _lt_dsymutil= + fi + ;; + esac + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to run the C preprocessor" >&5 +$as_echo_n "checking how to run the C preprocessor... " >&6; } +# On Suns, sometimes $CPP names a directory. +if test -n "$CPP" && test -d "$CPP"; then + CPP= +fi +if test -z "$CPP"; then + if ${ac_cv_prog_CPP+:} false; then : + $as_echo_n "(cached) " >&6 +else + # Double quotes because CPP needs to be expanded + for CPP in "$CC -E" "$CC -E -traditional-cpp" "/lib/cpp" + do + ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if ac_fn_c_try_cpp "$LINENO"; then : + +else + # Broken: fails on valid input. +continue +fi +rm -f conftest.err conftest.i conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +_ACEOF +if ac_fn_c_try_cpp "$LINENO"; then : + # Broken: success on invalid input. +continue +else + # Passes both tests. +ac_preproc_ok=: +break +fi +rm -f conftest.err conftest.i conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.i conftest.err conftest.$ac_ext +if $ac_preproc_ok; then : + break +fi + + done + ac_cv_prog_CPP=$CPP + +fi + CPP=$ac_cv_prog_CPP +else + ac_cv_prog_CPP=$CPP +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $CPP" >&5 +$as_echo "$CPP" >&6; } +ac_preproc_ok=false +for ac_c_preproc_warn_flag in '' yes +do + # Use a header file that comes with gcc, so configuring glibc + # with a fresh cross-compiler works. + # Prefer to if __STDC__ is defined, since + # exists even on freestanding compilers. + # On the NeXT, cc -E runs the code through the compiler's parser, + # not just through cpp. "Syntax error" is here to catch this case. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#ifdef __STDC__ +# include +#else +# include +#endif + Syntax error +_ACEOF +if ac_fn_c_try_cpp "$LINENO"; then : + +else + # Broken: fails on valid input. +continue +fi +rm -f conftest.err conftest.i conftest.$ac_ext + + # OK, works on sane cases. Now check whether nonexistent headers + # can be detected and how. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +_ACEOF +if ac_fn_c_try_cpp "$LINENO"; then : + # Broken: success on invalid input. +continue +else + # Passes both tests. +ac_preproc_ok=: +break +fi +rm -f conftest.err conftest.i conftest.$ac_ext + +done +# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped. +rm -f conftest.i conftest.err conftest.$ac_ext +if $ac_preproc_ok; then : + +else + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "C preprocessor \"$CPP\" fails sanity check +See \`config.log' for more details" "$LINENO" 5; } +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5 +$as_echo_n "checking for ANSI C header files... " >&6; } +if ${ac_cv_header_stdc+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_header_stdc=yes +else + ac_cv_header_stdc=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then : + +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then : + +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then : + : +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +if ac_fn_c_try_run "$LINENO"; then : + +else + ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ + conftest.$ac_objext conftest.beam conftest.$ac_ext +fi + +fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_header_stdc" >&5 +$as_echo "$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +$as_echo "#define STDC_HEADERS 1" >>confdefs.h + +fi + +# On IRIX 5.3, sys/types and inttypes.h are conflicting. +for ac_header in sys/types.h sys/stat.h stdlib.h string.h memory.h strings.h \ + inttypes.h stdint.h unistd.h +do : + as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh` +ac_fn_c_check_header_compile "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default +" +if eval test \"x\$"$as_ac_Header"\" = x"yes"; then : + cat >>confdefs.h <<_ACEOF +#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1 +_ACEOF + +fi + +done + + +for ac_header in dlfcn.h +do : + ac_fn_c_check_header_compile "$LINENO" "dlfcn.h" "ac_cv_header_dlfcn_h" "$ac_includes_default +" +if test "x$ac_cv_header_dlfcn_h" = xyes; then : + cat >>confdefs.h <<_ACEOF +#define HAVE_DLFCN_H 1 +_ACEOF + +fi + +done + + + + + +# Set options + + + + enable_dlopen=no + + + enable_win32_dll=no + + + # Check whether --enable-shared was given. +if test "${enable_shared+set}" = set; then : + enableval=$enable_shared; p=${PACKAGE-default} + case $enableval in + yes) enable_shared=yes ;; + no) enable_shared=no ;; + *) + enable_shared=no + # Look at the argument we got. We use all the common list separators. + lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," + for pkg in $enableval; do + IFS="$lt_save_ifs" + if test "X$pkg" = "X$p"; then + enable_shared=yes + fi + done + IFS="$lt_save_ifs" + ;; + esac +else + enable_shared=yes +fi + + + + + + + + + + + +# Check whether --with-pic was given. +if test "${with_pic+set}" = set; then : + withval=$with_pic; lt_p=${PACKAGE-default} + case $withval in + yes|no) pic_mode=$withval ;; + *) + pic_mode=default + # Look at the argument we got. We use all the common list separators. + lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," + for lt_pkg in $withval; do + IFS="$lt_save_ifs" + if test "X$lt_pkg" = "X$lt_p"; then + pic_mode=yes + fi + done + IFS="$lt_save_ifs" + ;; + esac +else + pic_mode=default +fi + + +test -z "$pic_mode" && pic_mode=default + + + + + + + + # Check whether --enable-fast-install was given. +if test "${enable_fast_install+set}" = set; then : + enableval=$enable_fast_install; p=${PACKAGE-default} + case $enableval in + yes) enable_fast_install=yes ;; + no) enable_fast_install=no ;; + *) + enable_fast_install=no + # Look at the argument we got. We use all the common list separators. + lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," + for pkg in $enableval; do + IFS="$lt_save_ifs" + if test "X$pkg" = "X$p"; then + enable_fast_install=yes + fi + done + IFS="$lt_save_ifs" + ;; + esac +else + enable_fast_install=yes +fi + + + + + + + + + + + +# This can be used to rebuild libtool when needed +LIBTOOL_DEPS="$ltmain" + +# Always use our own libtool. +LIBTOOL='$(SHELL) $(top_builddir)/libtool' + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +test -z "$LN_S" && LN_S="ln -s" + + + + + + + + + + + + + + +if test -n "${ZSH_VERSION+set}" ; then + setopt NO_GLOB_SUBST +fi + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for objdir" >&5 +$as_echo_n "checking for objdir... " >&6; } +if ${lt_cv_objdir+:} false; then : + $as_echo_n "(cached) " >&6 +else + rm -f .libs 2>/dev/null +mkdir .libs 2>/dev/null +if test -d .libs; then + lt_cv_objdir=.libs +else + # MS-DOS does not allow filenames that begin with a dot. + lt_cv_objdir=_libs +fi +rmdir .libs 2>/dev/null +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_objdir" >&5 +$as_echo "$lt_cv_objdir" >&6; } +objdir=$lt_cv_objdir + + + + + +cat >>confdefs.h <<_ACEOF +#define LT_OBJDIR "$lt_cv_objdir/" +_ACEOF + + + + +case $host_os in +aix3*) + # AIX sometimes has problems with the GCC collect2 program. For some + # reason, if we set the COLLECT_NAMES environment variable, the problems + # vanish in a puff of smoke. + if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES + fi + ;; +esac + +# Global variables: +ofile=libtool +can_build_shared=yes + +# All known linkers require a `.a' archive for static linking (except MSVC, +# which needs '.lib'). +libext=a + +with_gnu_ld="$lt_cv_prog_gnu_ld" + +old_CC="$CC" +old_CFLAGS="$CFLAGS" + +# Set sane defaults for various variables +test -z "$CC" && CC=cc +test -z "$LTCC" && LTCC=$CC +test -z "$LTCFLAGS" && LTCFLAGS=$CFLAGS +test -z "$LD" && LD=ld +test -z "$ac_objext" && ac_objext=o + +for cc_temp in $compiler""; do + case $cc_temp in + compile | *[\\/]compile | ccache | *[\\/]ccache ) ;; + distcc | *[\\/]distcc | purify | *[\\/]purify ) ;; + \-*) ;; + *) break;; + esac +done +cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"` + + +# Only perform the check for file, if the check method requires it +test -z "$MAGIC_CMD" && MAGIC_CMD=file +case $deplibs_check_method in +file_magic*) + if test "$file_magic_cmd" = '$MAGIC_CMD'; then + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for ${ac_tool_prefix}file" >&5 +$as_echo_n "checking for ${ac_tool_prefix}file... " >&6; } +if ${lt_cv_path_MAGIC_CMD+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $MAGIC_CMD in +[\\/*] | ?:[\\/]*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; +*) + lt_save_MAGIC_CMD="$MAGIC_CMD" + lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + ac_dummy="/usr/bin$PATH_SEPARATOR$PATH" + for ac_dir in $ac_dummy; do + IFS="$lt_save_ifs" + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/${ac_tool_prefix}file; then + lt_cv_path_MAGIC_CMD="$ac_dir/${ac_tool_prefix}file" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex=`expr "$deplibs_check_method" : "file_magic \(.*\)"` + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + $EGREP "$file_magic_regex" > /dev/null; then + : + else + cat <<_LT_EOF 1>&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +_LT_EOF + fi ;; + esac + fi + break + fi + done + IFS="$lt_save_ifs" + MAGIC_CMD="$lt_save_MAGIC_CMD" + ;; +esac +fi + +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MAGIC_CMD" >&5 +$as_echo "$MAGIC_CMD" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + + + +if test -z "$lt_cv_path_MAGIC_CMD"; then + if test -n "$ac_tool_prefix"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for file" >&5 +$as_echo_n "checking for file... " >&6; } +if ${lt_cv_path_MAGIC_CMD+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $MAGIC_CMD in +[\\/*] | ?:[\\/]*) + lt_cv_path_MAGIC_CMD="$MAGIC_CMD" # Let the user override the test with a path. + ;; +*) + lt_save_MAGIC_CMD="$MAGIC_CMD" + lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR + ac_dummy="/usr/bin$PATH_SEPARATOR$PATH" + for ac_dir in $ac_dummy; do + IFS="$lt_save_ifs" + test -z "$ac_dir" && ac_dir=. + if test -f $ac_dir/file; then + lt_cv_path_MAGIC_CMD="$ac_dir/file" + if test -n "$file_magic_test_file"; then + case $deplibs_check_method in + "file_magic "*) + file_magic_regex=`expr "$deplibs_check_method" : "file_magic \(.*\)"` + MAGIC_CMD="$lt_cv_path_MAGIC_CMD" + if eval $file_magic_cmd \$file_magic_test_file 2> /dev/null | + $EGREP "$file_magic_regex" > /dev/null; then + : + else + cat <<_LT_EOF 1>&2 + +*** Warning: the command libtool uses to detect shared libraries, +*** $file_magic_cmd, produces output that libtool cannot recognize. +*** The result is that libtool may fail to recognize shared libraries +*** as such. This will affect the creation of libtool libraries that +*** depend on shared libraries, but programs linked with such libtool +*** libraries will work regardless of this problem. Nevertheless, you +*** may want to report the problem to your system manager and/or to +*** bug-libtool@gnu.org + +_LT_EOF + fi ;; + esac + fi + break + fi + done + IFS="$lt_save_ifs" + MAGIC_CMD="$lt_save_MAGIC_CMD" + ;; +esac +fi + +MAGIC_CMD="$lt_cv_path_MAGIC_CMD" +if test -n "$MAGIC_CMD"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MAGIC_CMD" >&5 +$as_echo "$MAGIC_CMD" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + else + MAGIC_CMD=: + fi +fi + + fi + ;; +esac + +# Use C for the default configuration in the libtool script + +lt_save_CC="$CC" +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +# Source file extension for C test sources. +ac_ext=c + +# Object file extension for compiled C test sources. +objext=o +objext=$objext + +# Code to be used in simple compile tests +lt_simple_compile_test_code="int some_variable = 0;" + +# Code to be used in simple link tests +lt_simple_link_test_code='int main(){return(0);}' + + + + + + + +# If no C compiler was specified, use CC. +LTCC=${LTCC-"$CC"} + +# If no C compiler flags were specified, use CFLAGS. +LTCFLAGS=${LTCFLAGS-"$CFLAGS"} + +# Allow CC to be a program name with arguments. +compiler=$CC + +# Save the default compiler, since it gets overwritten when the other +# tags are being tested, and _LT_TAGVAR(compiler, []) is a NOP. +compiler_DEFAULT=$CC + +# save warnings/boilerplate of simple test code +ac_outfile=conftest.$ac_objext +echo "$lt_simple_compile_test_code" >conftest.$ac_ext +eval "$ac_compile" 2>&1 >/dev/null | $SED '/^$/d; /^ *+/d' >conftest.err +_lt_compiler_boilerplate=`cat conftest.err` +$RM conftest* + +ac_outfile=conftest.$ac_objext +echo "$lt_simple_link_test_code" >conftest.$ac_ext +eval "$ac_link" 2>&1 >/dev/null | $SED '/^$/d; /^ *+/d' >conftest.err +_lt_linker_boilerplate=`cat conftest.err` +$RM -r conftest* + + +if test -n "$compiler"; then + +lt_prog_compiler_no_builtin_flag= + +if test "$GCC" = yes; then + case $cc_basename in + nvcc*) + lt_prog_compiler_no_builtin_flag=' -Xcompiler -fno-builtin' ;; + *) + lt_prog_compiler_no_builtin_flag=' -fno-builtin' ;; + esac + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -fno-rtti -fno-exceptions" >&5 +$as_echo_n "checking if $compiler supports -fno-rtti -fno-exceptions... " >&6; } +if ${lt_cv_prog_compiler_rtti_exceptions+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_prog_compiler_rtti_exceptions=no + ac_outfile=conftest.$ac_objext + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + lt_compiler_flag="-fno-rtti -fno-exceptions" + # Insert the option either (1) after the last *FLAGS variable, or + # (2) before a word containing "conftest.", or (3) at the end. + # Note that $ac_compile itself does not contain backslashes and begins + # with a dollar sign (not a hyphen), so the echo should work correctly. + # The option is referenced via a variable to avoid confusing sed. + lt_compile=`echo "$ac_compile" | $SED \ + -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ + -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ + -e 's:$: $lt_compiler_flag:'` + (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5) + (eval "$lt_compile" 2>conftest.err) + ac_status=$? + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + if (exit $ac_status) && test -s "$ac_outfile"; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings other than the usual output. + $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp + $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 + if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then + lt_cv_prog_compiler_rtti_exceptions=yes + fi + fi + $RM conftest* + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_rtti_exceptions" >&5 +$as_echo "$lt_cv_prog_compiler_rtti_exceptions" >&6; } + +if test x"$lt_cv_prog_compiler_rtti_exceptions" = xyes; then + lt_prog_compiler_no_builtin_flag="$lt_prog_compiler_no_builtin_flag -fno-rtti -fno-exceptions" +else + : +fi + +fi + + + + + + + lt_prog_compiler_wl= +lt_prog_compiler_pic= +lt_prog_compiler_static= + + + if test "$GCC" = yes; then + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_static='-static' + + case $host_os in + aix*) + # All AIX code is PIC. + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + lt_prog_compiler_static='-Bstatic' + fi + ;; + + amigaos*) + case $host_cpu in + powerpc) + # see comment about AmigaOS4 .so support + lt_prog_compiler_pic='-fPIC' + ;; + m68k) + # FIXME: we need at least 68020 code to build shared libraries, but + # adding the `-m68020' flag to GCC prevents building anything better, + # like `-m68040'. + lt_prog_compiler_pic='-m68020 -resident32 -malways-restore-a4' + ;; + esac + ;; + + beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) + # PIC is the default for these OSes. + ;; + + mingw* | cygwin* | pw32* | os2* | cegcc*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + # Although the cygwin gcc ignores -fPIC, still need this for old-style + # (--disable-auto-import) libraries + lt_prog_compiler_pic='-DDLL_EXPORT' + ;; + + darwin* | rhapsody*) + # PIC is the default on this platform + # Common symbols not allowed in MH_DYLIB files + lt_prog_compiler_pic='-fno-common' + ;; + + haiku*) + # PIC is the default for Haiku. + # The "-static" flag exists, but is broken. + lt_prog_compiler_static= + ;; + + hpux*) + # PIC is the default for 64-bit PA HP-UX, but not for 32-bit + # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag + # sets the default TLS model and affects inlining. + case $host_cpu in + hppa*64*) + # +Z the default + ;; + *) + lt_prog_compiler_pic='-fPIC' + ;; + esac + ;; + + interix[3-9]*) + # Interix 3.x gcc -fpic/-fPIC options generate broken code. + # Instead, we relocate shared libraries at runtime. + ;; + + msdosdjgpp*) + # Just because we use GCC doesn't mean we suddenly get shared libraries + # on systems that don't support them. + lt_prog_compiler_can_build_shared=no + enable_shared=no + ;; + + *nto* | *qnx*) + # QNX uses GNU C++, but need to define -shared option too, otherwise + # it will coredump. + lt_prog_compiler_pic='-fPIC -shared' + ;; + + sysv4*MP*) + if test -d /usr/nec; then + lt_prog_compiler_pic=-Kconform_pic + fi + ;; + + *) + lt_prog_compiler_pic='-fPIC' + ;; + esac + + case $cc_basename in + nvcc*) # Cuda Compiler Driver 2.2 + lt_prog_compiler_wl='-Xlinker ' + if test -n "$lt_prog_compiler_pic"; then + lt_prog_compiler_pic="-Xcompiler $lt_prog_compiler_pic" + fi + ;; + esac + else + # PORTME Check for flag to pass linker flags through the system compiler. + case $host_os in + aix*) + lt_prog_compiler_wl='-Wl,' + if test "$host_cpu" = ia64; then + # AIX 5 now supports IA64 processor + lt_prog_compiler_static='-Bstatic' + else + lt_prog_compiler_static='-bnso -bI:/lib/syscalls.exp' + fi + ;; + + mingw* | cygwin* | pw32* | os2* | cegcc*) + # This hack is so that the source file can tell whether it is being + # built for inclusion in a dll (and should export symbols for example). + lt_prog_compiler_pic='-DDLL_EXPORT' + ;; + + hpux9* | hpux10* | hpux11*) + lt_prog_compiler_wl='-Wl,' + # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but + # not for PA HP-UX. + case $host_cpu in + hppa*64*|ia64*) + # +Z the default + ;; + *) + lt_prog_compiler_pic='+Z' + ;; + esac + # Is there a better lt_prog_compiler_static that works with the bundled CC? + lt_prog_compiler_static='${wl}-a ${wl}archive' + ;; + + irix5* | irix6* | nonstopux*) + lt_prog_compiler_wl='-Wl,' + # PIC (with -KPIC) is the default. + lt_prog_compiler_static='-non_shared' + ;; + + linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + case $cc_basename in + # old Intel for x86_64 which still supported -KPIC. + ecc*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-static' + ;; + # icc used to be incompatible with GCC. + # ICC 10 doesn't accept -KPIC any more. + icc* | ifort*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-fPIC' + lt_prog_compiler_static='-static' + ;; + # Lahey Fortran 8.1. + lf95*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='--shared' + lt_prog_compiler_static='--static' + ;; + nagfor*) + # NAG Fortran compiler + lt_prog_compiler_wl='-Wl,-Wl,,' + lt_prog_compiler_pic='-PIC' + lt_prog_compiler_static='-Bstatic' + ;; + pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*) + # Portland Group compilers (*not* the Pentium gcc compiler, + # which looks to be a dead project) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-fpic' + lt_prog_compiler_static='-Bstatic' + ;; + ccc*) + lt_prog_compiler_wl='-Wl,' + # All Alpha code is PIC. + lt_prog_compiler_static='-non_shared' + ;; + xl* | bgxl* | bgf* | mpixl*) + # IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-qpic' + lt_prog_compiler_static='-qstaticlink' + ;; + *) + case `$CC -V 2>&1 | sed 5q` in + *Sun\ Ceres\ Fortran* | *Sun*Fortran*\ [1-7].* | *Sun*Fortran*\ 8.[0-3]*) + # Sun Fortran 8.3 passes all unrecognized flags to the linker + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-Bstatic' + lt_prog_compiler_wl='' + ;; + *Sun\ F* | *Sun*Fortran*) + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-Bstatic' + lt_prog_compiler_wl='-Qoption ld ' + ;; + *Sun\ C*) + # Sun C 5.9 + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-Bstatic' + lt_prog_compiler_wl='-Wl,' + ;; + *Intel*\ [CF]*Compiler*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-fPIC' + lt_prog_compiler_static='-static' + ;; + *Portland\ Group*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-fpic' + lt_prog_compiler_static='-Bstatic' + ;; + esac + ;; + esac + ;; + + newsos6) + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-Bstatic' + ;; + + *nto* | *qnx*) + # QNX uses GNU C++, but need to define -shared option too, otherwise + # it will coredump. + lt_prog_compiler_pic='-fPIC -shared' + ;; + + osf3* | osf4* | osf5*) + lt_prog_compiler_wl='-Wl,' + # All OSF/1 code is PIC. + lt_prog_compiler_static='-non_shared' + ;; + + rdos*) + lt_prog_compiler_static='-non_shared' + ;; + + solaris*) + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-Bstatic' + case $cc_basename in + f77* | f90* | f95* | sunf77* | sunf90* | sunf95*) + lt_prog_compiler_wl='-Qoption ld ';; + *) + lt_prog_compiler_wl='-Wl,';; + esac + ;; + + sunos4*) + lt_prog_compiler_wl='-Qoption ld ' + lt_prog_compiler_pic='-PIC' + lt_prog_compiler_static='-Bstatic' + ;; + + sysv4 | sysv4.2uw2* | sysv4.3*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-Bstatic' + ;; + + sysv4*MP*) + if test -d /usr/nec ;then + lt_prog_compiler_pic='-Kconform_pic' + lt_prog_compiler_static='-Bstatic' + fi + ;; + + sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_pic='-KPIC' + lt_prog_compiler_static='-Bstatic' + ;; + + unicos*) + lt_prog_compiler_wl='-Wl,' + lt_prog_compiler_can_build_shared=no + ;; + + uts4*) + lt_prog_compiler_pic='-pic' + lt_prog_compiler_static='-Bstatic' + ;; + + *) + lt_prog_compiler_can_build_shared=no + ;; + esac + fi + +case $host_os in + # For platforms which do not support PIC, -DPIC is meaningless: + *djgpp*) + lt_prog_compiler_pic= + ;; + *) + lt_prog_compiler_pic="$lt_prog_compiler_pic -DPIC" + ;; +esac + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5 +$as_echo_n "checking for $compiler option to produce PIC... " >&6; } +if ${lt_cv_prog_compiler_pic+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_prog_compiler_pic=$lt_prog_compiler_pic +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic" >&5 +$as_echo "$lt_cv_prog_compiler_pic" >&6; } +lt_prog_compiler_pic=$lt_cv_prog_compiler_pic + +# +# Check to make sure the PIC flag actually works. +# +if test -n "$lt_prog_compiler_pic"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler PIC flag $lt_prog_compiler_pic works" >&5 +$as_echo_n "checking if $compiler PIC flag $lt_prog_compiler_pic works... " >&6; } +if ${lt_cv_prog_compiler_pic_works+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_prog_compiler_pic_works=no + ac_outfile=conftest.$ac_objext + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + lt_compiler_flag="$lt_prog_compiler_pic -DPIC" + # Insert the option either (1) after the last *FLAGS variable, or + # (2) before a word containing "conftest.", or (3) at the end. + # Note that $ac_compile itself does not contain backslashes and begins + # with a dollar sign (not a hyphen), so the echo should work correctly. + # The option is referenced via a variable to avoid confusing sed. + lt_compile=`echo "$ac_compile" | $SED \ + -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ + -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ + -e 's:$: $lt_compiler_flag:'` + (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5) + (eval "$lt_compile" 2>conftest.err) + ac_status=$? + cat conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + if (exit $ac_status) && test -s "$ac_outfile"; then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings other than the usual output. + $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp + $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 + if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then + lt_cv_prog_compiler_pic_works=yes + fi + fi + $RM conftest* + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic_works" >&5 +$as_echo "$lt_cv_prog_compiler_pic_works" >&6; } + +if test x"$lt_cv_prog_compiler_pic_works" = xyes; then + case $lt_prog_compiler_pic in + "" | " "*) ;; + *) lt_prog_compiler_pic=" $lt_prog_compiler_pic" ;; + esac +else + lt_prog_compiler_pic= + lt_prog_compiler_can_build_shared=no +fi + +fi + + + + + + + + + + + +# +# Check to make sure the static flag actually works. +# +wl=$lt_prog_compiler_wl eval lt_tmp_static_flag=\"$lt_prog_compiler_static\" +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler static flag $lt_tmp_static_flag works" >&5 +$as_echo_n "checking if $compiler static flag $lt_tmp_static_flag works... " >&6; } +if ${lt_cv_prog_compiler_static_works+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_prog_compiler_static_works=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS $lt_tmp_static_flag" + echo "$lt_simple_link_test_code" > conftest.$ac_ext + if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then + # The linker can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + # Append any errors to the config.log. + cat conftest.err 1>&5 + $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp + $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 + if diff conftest.exp conftest.er2 >/dev/null; then + lt_cv_prog_compiler_static_works=yes + fi + else + lt_cv_prog_compiler_static_works=yes + fi + fi + $RM -r conftest* + LDFLAGS="$save_LDFLAGS" + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_static_works" >&5 +$as_echo "$lt_cv_prog_compiler_static_works" >&6; } + +if test x"$lt_cv_prog_compiler_static_works" = xyes; then + : +else + lt_prog_compiler_static= +fi + + + + + + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -c -o file.$ac_objext" >&5 +$as_echo_n "checking if $compiler supports -c -o file.$ac_objext... " >&6; } +if ${lt_cv_prog_compiler_c_o+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_prog_compiler_c_o=no + $RM -r conftest 2>/dev/null + mkdir conftest + cd conftest + mkdir out + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + + lt_compiler_flag="-o out/conftest2.$ac_objext" + # Insert the option either (1) after the last *FLAGS variable, or + # (2) before a word containing "conftest.", or (3) at the end. + # Note that $ac_compile itself does not contain backslashes and begins + # with a dollar sign (not a hyphen), so the echo should work correctly. + lt_compile=`echo "$ac_compile" | $SED \ + -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ + -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ + -e 's:$: $lt_compiler_flag:'` + (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5) + (eval "$lt_compile" 2>out/conftest.err) + ac_status=$? + cat out/conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + if (exit $ac_status) && test -s out/conftest2.$ac_objext + then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp + $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2 + if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then + lt_cv_prog_compiler_c_o=yes + fi + fi + chmod u+w . 2>&5 + $RM conftest* + # SGI C++ compiler will create directory out/ii_files/ for + # template instantiation + test -d out/ii_files && $RM out/ii_files/* && rmdir out/ii_files + $RM out/* && rmdir out + cd .. + $RM -r conftest + $RM conftest* + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_c_o" >&5 +$as_echo "$lt_cv_prog_compiler_c_o" >&6; } + + + + + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -c -o file.$ac_objext" >&5 +$as_echo_n "checking if $compiler supports -c -o file.$ac_objext... " >&6; } +if ${lt_cv_prog_compiler_c_o+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_prog_compiler_c_o=no + $RM -r conftest 2>/dev/null + mkdir conftest + cd conftest + mkdir out + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + + lt_compiler_flag="-o out/conftest2.$ac_objext" + # Insert the option either (1) after the last *FLAGS variable, or + # (2) before a word containing "conftest.", or (3) at the end. + # Note that $ac_compile itself does not contain backslashes and begins + # with a dollar sign (not a hyphen), so the echo should work correctly. + lt_compile=`echo "$ac_compile" | $SED \ + -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \ + -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \ + -e 's:$: $lt_compiler_flag:'` + (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5) + (eval "$lt_compile" 2>out/conftest.err) + ac_status=$? + cat out/conftest.err >&5 + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + if (exit $ac_status) && test -s out/conftest2.$ac_objext + then + # The compiler can only warn and ignore the option if not recognized + # So say no if there are warnings + $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp + $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2 + if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then + lt_cv_prog_compiler_c_o=yes + fi + fi + chmod u+w . 2>&5 + $RM conftest* + # SGI C++ compiler will create directory out/ii_files/ for + # template instantiation + test -d out/ii_files && $RM out/ii_files/* && rmdir out/ii_files + $RM out/* && rmdir out + cd .. + $RM -r conftest + $RM conftest* + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_c_o" >&5 +$as_echo "$lt_cv_prog_compiler_c_o" >&6; } + + + + +hard_links="nottested" +if test "$lt_cv_prog_compiler_c_o" = no && test "$need_locks" != no; then + # do not overwrite the value of need_locks provided by the user + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if we can lock with hard links" >&5 +$as_echo_n "checking if we can lock with hard links... " >&6; } + hard_links=yes + $RM conftest* + ln conftest.a conftest.b 2>/dev/null && hard_links=no + touch conftest.a + ln conftest.a conftest.b 2>&5 || hard_links=no + ln conftest.a conftest.b 2>/dev/null && hard_links=no + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $hard_links" >&5 +$as_echo "$hard_links" >&6; } + if test "$hard_links" = no; then + { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: \`$CC' does not support \`-c -o', so \`make -j' may be unsafe" >&5 +$as_echo "$as_me: WARNING: \`$CC' does not support \`-c -o', so \`make -j' may be unsafe" >&2;} + need_locks=warn + fi +else + need_locks=no +fi + + + + + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $compiler linker ($LD) supports shared libraries" >&5 +$as_echo_n "checking whether the $compiler linker ($LD) supports shared libraries... " >&6; } + + runpath_var= + allow_undefined_flag= + always_export_symbols=no + archive_cmds= + archive_expsym_cmds= + compiler_needs_object=no + enable_shared_with_static_runtimes=no + export_dynamic_flag_spec= + export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols' + hardcode_automatic=no + hardcode_direct=no + hardcode_direct_absolute=no + hardcode_libdir_flag_spec= + hardcode_libdir_separator= + hardcode_minus_L=no + hardcode_shlibpath_var=unsupported + inherit_rpath=no + link_all_deplibs=unknown + module_cmds= + module_expsym_cmds= + old_archive_from_new_cmds= + old_archive_from_expsyms_cmds= + thread_safe_flag_spec= + whole_archive_flag_spec= + # include_expsyms should be a list of space-separated symbols to be *always* + # included in the symbol list + include_expsyms= + # exclude_expsyms can be an extended regexp of symbols to exclude + # it will be wrapped by ` (' and `)$', so one must not match beginning or + # end of line. Example: `a|bc|.*d.*' will exclude the symbols `a' and `bc', + # as well as any symbol that contains `d'. + exclude_expsyms='_GLOBAL_OFFSET_TABLE_|_GLOBAL__F[ID]_.*' + # Although _GLOBAL_OFFSET_TABLE_ is a valid symbol C name, most a.out + # platforms (ab)use it in PIC code, but their linkers get confused if + # the symbol is explicitly referenced. Since portable code cannot + # rely on this symbol name, it's probably fine to never include it in + # preloaded symbol tables. + # Exclude shared library initialization/finalization symbols. + extract_expsyms_cmds= + + case $host_os in + cygwin* | mingw* | pw32* | cegcc*) + # FIXME: the MSVC++ port hasn't been tested in a loooong time + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + if test "$GCC" != yes; then + with_gnu_ld=no + fi + ;; + interix*) + # we just hope/assume this is gcc and not c89 (= MSVC++) + with_gnu_ld=yes + ;; + openbsd*) + with_gnu_ld=no + ;; + linux* | k*bsd*-gnu | gnu*) + link_all_deplibs=no + ;; + esac + + ld_shlibs=yes + + # On some targets, GNU ld is compatible enough with the native linker + # that we're better off using the native interface for both. + lt_use_gnu_ld_interface=no + if test "$with_gnu_ld" = yes; then + case $host_os in + aix*) + # The AIX port of GNU ld has always aspired to compatibility + # with the native linker. However, as the warning in the GNU ld + # block says, versions before 2.19.5* couldn't really create working + # shared libraries, regardless of the interface used. + case `$LD -v 2>&1` in + *\ \(GNU\ Binutils\)\ 2.19.5*) ;; + *\ \(GNU\ Binutils\)\ 2.[2-9]*) ;; + *\ \(GNU\ Binutils\)\ [3-9]*) ;; + *) + lt_use_gnu_ld_interface=yes + ;; + esac + ;; + *) + lt_use_gnu_ld_interface=yes + ;; + esac + fi + + if test "$lt_use_gnu_ld_interface" = yes; then + # If archive_cmds runs LD, not CC, wlarc should be empty + wlarc='${wl}' + + # Set some defaults for GNU ld with shared library support. These + # are reset later if shared libraries are not supported. Putting them + # here allows them to be overridden if necessary. + runpath_var=LD_RUN_PATH + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + export_dynamic_flag_spec='${wl}--export-dynamic' + # ancient GNU ld didn't support --whole-archive et. al. + if $LD --help 2>&1 | $GREP 'no-whole-archive' > /dev/null; then + whole_archive_flag_spec="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive' + else + whole_archive_flag_spec= + fi + supports_anon_versioning=no + case `$LD -v 2>&1` in + *GNU\ gold*) supports_anon_versioning=yes ;; + *\ [01].* | *\ 2.[0-9].* | *\ 2.10.*) ;; # catch versions < 2.11 + *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ... + *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ... + *\ 2.11.*) ;; # other 2.11 versions + *) supports_anon_versioning=yes ;; + esac + + # See if GNU ld supports shared libraries. + case $host_os in + aix[3-9]*) + # On AIX/PPC, the GNU linker is very broken + if test "$host_cpu" != ia64; then + ld_shlibs=no + cat <<_LT_EOF 1>&2 + +*** Warning: the GNU linker, at least up to release 2.19, is reported +*** to be unable to reliably create shared libraries on AIX. +*** Therefore, libtool is disabling shared libraries support. If you +*** really care for shared libraries, you may want to install binutils +*** 2.20 or above, or modify your PATH so that a non-GNU linker is found. +*** You will then need to restart the configuration process. + +_LT_EOF + fi + ;; + + amigaos*) + case $host_cpu in + powerpc) + # see comment about AmigaOS4 .so support + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='' + ;; + m68k) + archive_cmds='$RM $output_objdir/a2ixlibrary.data~$ECHO "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$ECHO "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$ECHO "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$ECHO "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + ;; + esac + ;; + + beos*) + if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + allow_undefined_flag=unsupported + # Joseph Beckenbach says some releases of gcc + # support --undefined. This deserves some investigation. FIXME + archive_cmds='$CC -nostart $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + else + ld_shlibs=no + fi + ;; + + cygwin* | mingw* | pw32* | cegcc*) + # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless, + # as there is no search path for DLLs. + hardcode_libdir_flag_spec='-L$libdir' + export_dynamic_flag_spec='${wl}--export-all-symbols' + allow_undefined_flag=unsupported + always_export_symbols=no + enable_shared_with_static_runtimes=yes + export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols' + exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname' + + if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' + # If the export-symbols file already is a .def file (1st line + # is EXPORTS), use it as is; otherwise, prepend... + archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then + cp $export_symbols $output_objdir/$soname.def; + else + echo EXPORTS > $output_objdir/$soname.def; + cat $export_symbols >> $output_objdir/$soname.def; + fi~ + $CC -shared $output_objdir/$soname.def $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib' + else + ld_shlibs=no + fi + ;; + + haiku*) + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + link_all_deplibs=yes + ;; + + interix[3-9]*) + hardcode_direct=no + hardcode_shlibpath_var=no + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + export_dynamic_flag_spec='${wl}-E' + # Hack: On Interix 3.x, we cannot compile PIC because of a broken gcc. + # Instead, shared libraries are loaded at an image base (0x10000000 by + # default) and relocated if they conflict, which is a slow very memory + # consuming and fragmenting process. To avoid this, we pick a random, + # 256 KiB-aligned image base between 0x50000000 and 0x6FFC0000 at link + # time. Moving up from 0x10000000 also allows more sbrk(2) space. + archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' + archive_expsym_cmds='sed "s,^,_," $export_symbols >$output_objdir/$soname.expsym~$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-h,$soname ${wl}--retain-symbols-file,$output_objdir/$soname.expsym ${wl}--image-base,`expr ${RANDOM-$$} % 4096 / 2 \* 262144 + 1342177280` -o $lib' + ;; + + gnu* | linux* | tpf* | k*bsd*-gnu | kopensolaris*-gnu) + tmp_diet=no + if test "$host_os" = linux-dietlibc; then + case $cc_basename in + diet\ *) tmp_diet=yes;; # linux-dietlibc with static linking (!diet-dyn) + esac + fi + if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \ + && test "$tmp_diet" = no + then + tmp_addflag=' $pic_flag' + tmp_sharedflag='-shared' + case $cc_basename,$host_cpu in + pgcc*) # Portland Group C compiler + whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + tmp_addflag=' $pic_flag' + ;; + pgf77* | pgf90* | pgf95* | pgfortran*) + # Portland Group f77 and f90 compilers + whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + tmp_addflag=' $pic_flag -Mnomain' ;; + ecc*,ia64* | icc*,ia64*) # Intel C compiler on ia64 + tmp_addflag=' -i_dynamic' ;; + efc*,ia64* | ifort*,ia64*) # Intel Fortran compiler on ia64 + tmp_addflag=' -i_dynamic -nofor_main' ;; + ifc* | ifort*) # Intel Fortran compiler + tmp_addflag=' -nofor_main' ;; + lf95*) # Lahey Fortran 8.1 + whole_archive_flag_spec= + tmp_sharedflag='--shared' ;; + xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below) + tmp_sharedflag='-qmkshrobj' + tmp_addflag= ;; + nvcc*) # Cuda Compiler Driver 2.2 + whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + compiler_needs_object=yes + ;; + esac + case `$CC -V 2>&1 | sed 5q` in + *Sun\ C*) # Sun C 5.9 + whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' + compiler_needs_object=yes + tmp_sharedflag='-G' ;; + *Sun\ F*) # Sun Fortran 8.3 + tmp_sharedflag='-G' ;; + esac + archive_cmds='$CC '"$tmp_sharedflag""$tmp_addflag"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + + if test "x$supports_anon_versioning" = xyes; then + archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~ + cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ + echo "local: *; };" >> $output_objdir/$libname.ver~ + $CC '"$tmp_sharedflag""$tmp_addflag"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-version-script ${wl}$output_objdir/$libname.ver -o $lib' + fi + + case $cc_basename in + xlf* | bgf* | bgxlf* | mpixlf*) + # IBM XL Fortran 10.1 on PPC cannot create shared libs itself + whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib' + if test "x$supports_anon_versioning" = xyes; then + archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~ + cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ + echo "local: *; };" >> $output_objdir/$libname.ver~ + $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib' + fi + ;; + esac + else + ld_shlibs=no + fi + ;; + + netbsd* | netbsdelf*-gnu) + if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib' + wlarc= + else + archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + fi + ;; + + solaris*) + if $LD -v 2>&1 | $GREP 'BFD 2\.8' > /dev/null; then + ld_shlibs=no + cat <<_LT_EOF 1>&2 + +*** Warning: The releases 2.8.* of the GNU linker cannot reliably +*** create shared libraries on Solaris systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.9.1 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +_LT_EOF + elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + + sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX*) + case `$LD -v 2>&1` in + *\ [01].* | *\ 2.[0-9].* | *\ 2.1[0-5].*) + ld_shlibs=no + cat <<_LT_EOF 1>&2 + +*** Warning: Releases of the GNU linker prior to 2.16.91.0.3 can not +*** reliably create shared libraries on SCO systems. Therefore, libtool +*** is disabling shared libraries support. We urge you to upgrade GNU +*** binutils to release 2.16.91.0.3 or newer. Another option is to modify +*** your PATH or compiler configuration so that the native linker is +*** used, and then restart. + +_LT_EOF + ;; + *) + # For security reasons, it is highly recommended that you always + # use absolute paths for naming shared libraries, and exclude the + # DT_RUNPATH tag from executables and libraries. But doing so + # requires that you compile everything twice, which is a pain. + if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + ;; + + sunos4*) + archive_cmds='$LD -assert pure-text -Bshareable -o $lib $libobjs $deplibs $linker_flags' + wlarc= + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + *) + if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then + archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' + else + ld_shlibs=no + fi + ;; + esac + + if test "$ld_shlibs" = no; then + runpath_var= + hardcode_libdir_flag_spec= + export_dynamic_flag_spec= + whole_archive_flag_spec= + fi + else + # PORTME fill in a description of your system's linker (not GNU ld) + case $host_os in + aix3*) + allow_undefined_flag=unsupported + always_export_symbols=yes + archive_expsym_cmds='$LD -o $output_objdir/$soname $libobjs $deplibs $linker_flags -bE:$export_symbols -T512 -H512 -bM:SRE~$AR $AR_FLAGS $lib $output_objdir/$soname' + # Note: this linker hardcodes the directories in LIBPATH if there + # are no directories specified by -L. + hardcode_minus_L=yes + if test "$GCC" = yes && test -z "$lt_prog_compiler_static"; then + # Neither direct hardcoding nor static linking is supported with a + # broken collect2. + hardcode_direct=unsupported + fi + ;; + + aix[4-9]*) + if test "$host_cpu" = ia64; then + # On IA64, the linker does run time linking by default, so we don't + # have to do anything special. + aix_use_runtimelinking=no + exp_sym_flag='-Bexport' + no_entry_flag="" + else + # If we're using GNU nm, then we don't want the "-C" option. + # -C means demangle to AIX nm, but means don't demangle with GNU nm + # Also, AIX nm treats weak defined symbols like other global + # defined symbols, whereas GNU nm marks them as "W". + if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then + export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols' + else + export_symbols_cmds='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols' + fi + aix_use_runtimelinking=no + + # Test if we are trying to use run time linking or normal + # AIX style linking. If -brtl is somewhere in LDFLAGS, we + # need to do runtime linking. + case $host_os in aix4.[23]|aix4.[23].*|aix[5-9]*) + for ld_flag in $LDFLAGS; do + if (test $ld_flag = "-brtl" || test $ld_flag = "-Wl,-brtl"); then + aix_use_runtimelinking=yes + break + fi + done + ;; + esac + + exp_sym_flag='-bexport' + no_entry_flag='-bnoentry' + fi + + # When large executables or shared objects are built, AIX ld can + # have problems creating the table of contents. If linking a library + # or program results in "error TOC overflow" add -mminimal-toc to + # CXXFLAGS/CFLAGS for g++/gcc. In the cases where that is not + # enough to fix the problem, add -Wl,-bbigtoc to LDFLAGS. + + archive_cmds='' + hardcode_direct=yes + hardcode_direct_absolute=yes + hardcode_libdir_separator=':' + link_all_deplibs=yes + file_list_spec='${wl}-f,' + + if test "$GCC" = yes; then + case $host_os in aix4.[012]|aix4.[012].*) + # We only want to do this on AIX 4.2 and lower, the check + # below for broken collect2 doesn't work under 4.3+ + collect2name=`${CC} -print-prog-name=collect2` + if test -f "$collect2name" && + strings "$collect2name" | $GREP resolve_lib_name >/dev/null + then + # We have reworked collect2 + : + else + # We have old collect2 + hardcode_direct=unsupported + # It fails to find uninstalled libraries when the uninstalled + # path is not listed in the libpath. Setting hardcode_minus_L + # to unsupported forces relinking + hardcode_minus_L=yes + hardcode_libdir_flag_spec='-L$libdir' + hardcode_libdir_separator= + fi + ;; + esac + shared_flag='-shared' + if test "$aix_use_runtimelinking" = yes; then + shared_flag="$shared_flag "'${wl}-G' + fi + link_all_deplibs=no + else + # not using gcc + if test "$host_cpu" = ia64; then + # VisualAge C++, Version 5.5 for AIX 5L for IA-64, Beta 3 Release + # chokes on -Wl,-G. The following line is correct: + shared_flag='-G' + else + if test "$aix_use_runtimelinking" = yes; then + shared_flag='${wl}-G' + else + shared_flag='${wl}-bM:SRE' + fi + fi + fi + + export_dynamic_flag_spec='${wl}-bexpall' + # It seems that -bexpall does not export symbols beginning with + # underscore (_), so it is better to generate a list of symbols to export. + always_export_symbols=yes + if test "$aix_use_runtimelinking" = yes; then + # Warning - without using the other runtime loading flags (-brtl), + # -berok will link without error, but may produce a broken library. + allow_undefined_flag='-berok' + # Determine the default libpath from the value encoded in an + # empty executable. + if test "${lt_cv_aix_libpath+set}" = set; then + aix_libpath=$lt_cv_aix_libpath +else + if ${lt_cv_aix_libpath_+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + + lt_aix_libpath_sed=' + /Import File Strings/,/^$/ { + /^0/ { + s/^0 *\([^ ]*\) *$/\1/ + p + } + }' + lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` + # Check for a 64-bit object if we didn't find anything. + if test -z "$lt_cv_aix_libpath_"; then + lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` + fi +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + if test -z "$lt_cv_aix_libpath_"; then + lt_cv_aix_libpath_="/usr/lib:/lib" + fi + +fi + + aix_libpath=$lt_cv_aix_libpath_ +fi + + hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath" + archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag" + else + if test "$host_cpu" = ia64; then + hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib' + allow_undefined_flag="-z nodefs" + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags ${wl}${allow_undefined_flag} '"\${wl}$exp_sym_flag:\$export_symbols" + else + # Determine the default libpath from the value encoded in an + # empty executable. + if test "${lt_cv_aix_libpath+set}" = set; then + aix_libpath=$lt_cv_aix_libpath +else + if ${lt_cv_aix_libpath_+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + + lt_aix_libpath_sed=' + /Import File Strings/,/^$/ { + /^0/ { + s/^0 *\([^ ]*\) *$/\1/ + p + } + }' + lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` + # Check for a 64-bit object if we didn't find anything. + if test -z "$lt_cv_aix_libpath_"; then + lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"` + fi +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + if test -z "$lt_cv_aix_libpath_"; then + lt_cv_aix_libpath_="/usr/lib:/lib" + fi + +fi + + aix_libpath=$lt_cv_aix_libpath_ +fi + + hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath" + # Warning - without using the other run time loading flags, + # -berok will link without error, but may produce a broken library. + no_undefined_flag=' ${wl}-bernotok' + allow_undefined_flag=' ${wl}-berok' + if test "$with_gnu_ld" = yes; then + # We only use this code for GNU lds that support --whole-archive. + whole_archive_flag_spec='${wl}--whole-archive$convenience ${wl}--no-whole-archive' + else + # Exported symbols can be pulled into shared objects from archives + whole_archive_flag_spec='$convenience' + fi + archive_cmds_need_lc=yes + # This is similar to how AIX traditionally builds its shared libraries. + archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname' + fi + fi + ;; + + amigaos*) + case $host_cpu in + powerpc) + # see comment about AmigaOS4 .so support + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' + archive_expsym_cmds='' + ;; + m68k) + archive_cmds='$RM $output_objdir/a2ixlibrary.data~$ECHO "#define NAME $libname" > $output_objdir/a2ixlibrary.data~$ECHO "#define LIBRARY_ID 1" >> $output_objdir/a2ixlibrary.data~$ECHO "#define VERSION $major" >> $output_objdir/a2ixlibrary.data~$ECHO "#define REVISION $revision" >> $output_objdir/a2ixlibrary.data~$AR $AR_FLAGS $lib $libobjs~$RANLIB $lib~(cd $output_objdir && a2ixlibrary -32)' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + ;; + esac + ;; + + bsdi[45]*) + export_dynamic_flag_spec=-rdynamic + ;; + + cygwin* | mingw* | pw32* | cegcc*) + # When not using gcc, we currently assume that we are using + # Microsoft Visual C++. + # hardcode_libdir_flag_spec is actually meaningless, as there is + # no search path for DLLs. + case $cc_basename in + cl*) + # Native MSVC + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + always_export_symbols=yes + file_list_spec='@' + # Tell ltmain to make .lib files, not .a files. + libext=lib + # Tell ltmain to make .dll files, not .so files. + shrext_cmds=".dll" + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames=' + archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then + sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp; + else + sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp; + fi~ + $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~ + linknames=' + # The linker will not automatically build a static lib if we build a DLL. + # _LT_TAGVAR(old_archive_from_new_cmds, )='true' + enable_shared_with_static_runtimes=yes + exclude_expsyms='_NULL_IMPORT_DESCRIPTOR|_IMPORT_DESCRIPTOR_.*' + export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols' + # Don't use ranlib + old_postinstall_cmds='chmod 644 $oldlib' + postlink_cmds='lt_outputfile="@OUTPUT@"~ + lt_tool_outputfile="@TOOL_OUTPUT@"~ + case $lt_outputfile in + *.exe|*.EXE) ;; + *) + lt_outputfile="$lt_outputfile.exe" + lt_tool_outputfile="$lt_tool_outputfile.exe" + ;; + esac~ + if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then + $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1; + $RM "$lt_outputfile.manifest"; + fi' + ;; + *) + # Assume MSVC wrapper + hardcode_libdir_flag_spec=' ' + allow_undefined_flag=unsupported + # Tell ltmain to make .lib files, not .a files. + libext=lib + # Tell ltmain to make .dll files, not .so files. + shrext_cmds=".dll" + # FIXME: Setting linknames here is a bad hack. + archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames=' + # The linker will automatically build a .lib file if we build a DLL. + old_archive_from_new_cmds='true' + # FIXME: Should let the user specify the lib program. + old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs' + enable_shared_with_static_runtimes=yes + ;; + esac + ;; + + darwin* | rhapsody*) + + + archive_cmds_need_lc=no + hardcode_direct=no + hardcode_automatic=yes + hardcode_shlibpath_var=unsupported + if test "$lt_cv_ld_force_load" = "yes"; then + whole_archive_flag_spec='`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`' + + else + whole_archive_flag_spec='' + fi + link_all_deplibs=yes + allow_undefined_flag="$_lt_dar_allow_undefined" + case $cc_basename in + ifort*) _lt_dar_can_shared=yes ;; + *) _lt_dar_can_shared=$GCC ;; + esac + if test "$_lt_dar_can_shared" = "yes"; then + output_verbose_link_cmd=func_echo_all + archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}" + module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}" + archive_expsym_cmds="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}" + module_expsym_cmds="sed -e 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dar_export_syms}${_lt_dsymutil}" + + else + ld_shlibs=no + fi + + ;; + + dgux*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + # FreeBSD 2.2.[012] allows us to include c++rt0.o to get C++ constructor + # support. Future versions do this automatically, but an explicit c++rt0.o + # does not break anything, and helps significantly (at the cost of a little + # extra space). + freebsd2.2*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags /usr/lib/c++rt0.o' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + # Unfortunately, older versions of FreeBSD 2 do not have this feature. + freebsd2.*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + # FreeBSD 3 and greater uses gcc -shared to do shared libraries. + freebsd* | dragonfly*) + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + hpux9*) + if test "$GCC" = yes; then + archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' + else + archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib' + fi + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + + # hardcode_minus_L: Not really in the search PATH, + # but as the default location of the library. + hardcode_minus_L=yes + export_dynamic_flag_spec='${wl}-E' + ;; + + hpux10*) + if test "$GCC" = yes && test "$with_gnu_ld" = no; then + archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' + fi + if test "$with_gnu_ld" = no; then + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_direct=yes + hardcode_direct_absolute=yes + export_dynamic_flag_spec='${wl}-E' + # hardcode_minus_L: Not really in the search PATH, + # but as the default location of the library. + hardcode_minus_L=yes + fi + ;; + + hpux11*) + if test "$GCC" = yes && test "$with_gnu_ld" = no; then + case $host_cpu in + hppa*64*) + archive_cmds='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + ;; + ia64*) + archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags' + ;; + *) + archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags' + ;; + esac + else + case $host_cpu in + hppa*64*) + archive_cmds='$CC -b ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + ;; + ia64*) + archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags' + ;; + *) + + # Older versions of the 11.00 compiler do not understand -b yet + # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does) + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5 +$as_echo_n "checking if $CC understands -b... " >&6; } +if ${lt_cv_prog_compiler__b+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_prog_compiler__b=no + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS -b" + echo "$lt_simple_link_test_code" > conftest.$ac_ext + if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then + # The linker can only warn and ignore the option if not recognized + # So say no if there are warnings + if test -s conftest.err; then + # Append any errors to the config.log. + cat conftest.err 1>&5 + $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp + $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2 + if diff conftest.exp conftest.er2 >/dev/null; then + lt_cv_prog_compiler__b=yes + fi + else + lt_cv_prog_compiler__b=yes + fi + fi + $RM -r conftest* + LDFLAGS="$save_LDFLAGS" + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5 +$as_echo "$lt_cv_prog_compiler__b" >&6; } + +if test x"$lt_cv_prog_compiler__b" = xyes; then + archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags' +else + archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags' +fi + + ;; + esac + fi + if test "$with_gnu_ld" = no; then + hardcode_libdir_flag_spec='${wl}+b ${wl}$libdir' + hardcode_libdir_separator=: + + case $host_cpu in + hppa*64*|ia64*) + hardcode_direct=no + hardcode_shlibpath_var=no + ;; + *) + hardcode_direct=yes + hardcode_direct_absolute=yes + export_dynamic_flag_spec='${wl}-E' + + # hardcode_minus_L: Not really in the search PATH, + # but as the default location of the library. + hardcode_minus_L=yes + ;; + esac + fi + ;; + + irix5* | irix6* | nonstopux*) + if test "$GCC" = yes; then + archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + # Try to use the -exported_symbol ld option, if it does not + # work, assume that -exports_file does not work either and + # implicitly export all symbols. + # This should be the same for all languages, so no per-tag cache variable. + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5 +$as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; } +if ${lt_cv_irix_exported_symbol+:} false; then : + $as_echo_n "(cached) " >&6 +else + save_LDFLAGS="$LDFLAGS" + LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +int foo (void) { return 0; } +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + lt_cv_irix_exported_symbol=yes +else + lt_cv_irix_exported_symbol=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + LDFLAGS="$save_LDFLAGS" +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5 +$as_echo "$lt_cv_irix_exported_symbol" >&6; } + if test "$lt_cv_irix_exported_symbol" = yes; then + archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib' + fi + else + archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib' + fi + archive_cmds_need_lc='no' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + inherit_rpath=yes + link_all_deplibs=yes + ;; + + netbsd* | netbsdelf*-gnu) + if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' # a.out + else + archive_cmds='$LD -shared -o $lib $libobjs $deplibs $linker_flags' # ELF + fi + hardcode_libdir_flag_spec='-R$libdir' + hardcode_direct=yes + hardcode_shlibpath_var=no + ;; + + newsos6) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + hardcode_shlibpath_var=no + ;; + + *nto* | *qnx*) + ;; + + openbsd*) + if test -f /usr/libexec/ld.so; then + hardcode_direct=yes + hardcode_shlibpath_var=no + hardcode_direct_absolute=yes + if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' + archive_expsym_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags ${wl}-retain-symbols-file,$export_symbols' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + export_dynamic_flag_spec='${wl}-E' + else + case $host_os in + openbsd[01].* | openbsd2.[0-7] | openbsd2.[0-7].*) + archive_cmds='$LD -Bshareable -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-R$libdir' + ;; + *) + archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' + hardcode_libdir_flag_spec='${wl}-rpath,$libdir' + ;; + esac + fi + else + ld_shlibs=no + fi + ;; + + os2*) + hardcode_libdir_flag_spec='-L$libdir' + hardcode_minus_L=yes + allow_undefined_flag=unsupported + archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' + old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' + ;; + + osf3*) + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + fi + archive_cmds_need_lc='no' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + hardcode_libdir_separator=: + ;; + + osf4* | osf5*) # as osf3* with the addition of -msym flag + if test "$GCC" = yes; then + allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' + archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' + hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' + else + allow_undefined_flag=' -expect_unresolved \*' + archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' + archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~ + $CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp' + + # Both c and cxx compiler support -rpath directly + hardcode_libdir_flag_spec='-rpath $libdir' + fi + archive_cmds_need_lc='no' + hardcode_libdir_separator=: + ;; + + solaris*) + no_undefined_flag=' -z defs' + if test "$GCC" = yes; then + wlarc='${wl}' + archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' + archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' + else + case `$CC -V 2>&1` in + *"Compilers 5.0"*) + wlarc='' + archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' + archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' + ;; + *) + wlarc='${wl}' + archive_cmds='$CC -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $compiler_flags' + archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ + $CC -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' + ;; + esac + fi + hardcode_libdir_flag_spec='-R$libdir' + hardcode_shlibpath_var=no + case $host_os in + solaris2.[0-5] | solaris2.[0-5].*) ;; + *) + # The compiler driver will combine and reorder linker options, + # but understands `-z linker_flag'. GCC discards it without `$wl', + # but is careful enough not to reorder. + # Supported since Solaris 2.6 (maybe 2.5.1?) + if test "$GCC" = yes; then + whole_archive_flag_spec='${wl}-z ${wl}allextract$convenience ${wl}-z ${wl}defaultextract' + else + whole_archive_flag_spec='-z allextract$convenience -z defaultextract' + fi + ;; + esac + link_all_deplibs=yes + ;; + + sunos4*) + if test "x$host_vendor" = xsequent; then + # Use $CC to link under sequent, because it throws in some extra .o + # files that make .init and .fini sections work. + archive_cmds='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' + fi + hardcode_libdir_flag_spec='-L$libdir' + hardcode_direct=yes + hardcode_minus_L=yes + hardcode_shlibpath_var=no + ;; + + sysv4) + case $host_vendor in + sni) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=yes # is this really true??? + ;; + siemens) + ## LD is ld it makes a PLAMLIB + ## CC just makes a GrossModule. + archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' + reload_cmds='$CC -r -o $output$reload_objs' + hardcode_direct=no + ;; + motorola) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_direct=no #Motorola manual says yes, but my tests say they lie + ;; + esac + runpath_var='LD_RUN_PATH' + hardcode_shlibpath_var=no + ;; + + sysv4.3*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + export_dynamic_flag_spec='-Bexport' + ;; + + sysv4*MP*) + if test -d /usr/nec; then + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_shlibpath_var=no + runpath_var=LD_RUN_PATH + hardcode_runpath_var=yes + ld_shlibs=yes + fi + ;; + + sysv4*uw2* | sysv5OpenUNIX* | sysv5UnixWare7.[01].[10]* | unixware7* | sco3.2v5.0.[024]*) + no_undefined_flag='${wl}-z,text' + archive_cmds_need_lc=no + hardcode_shlibpath_var=no + runpath_var='LD_RUN_PATH' + + if test "$GCC" = yes; then + archive_cmds='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + archive_expsym_cmds='$CC -shared ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + archive_expsym_cmds='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + ;; + + sysv5* | sco3.2v5* | sco5v6*) + # Note: We can NOT use -z defs as we might desire, because we do not + # link with -lc, and that would cause any symbols used from libc to + # always be unresolved, which means just about no library would + # ever link correctly. If we're not using GNU ld we use -z text + # though, which does catch some bad symbols but isn't as heavy-handed + # as -z defs. + no_undefined_flag='${wl}-z,text' + allow_undefined_flag='${wl}-z,nodefs' + archive_cmds_need_lc=no + hardcode_shlibpath_var=no + hardcode_libdir_flag_spec='${wl}-R,$libdir' + hardcode_libdir_separator=':' + link_all_deplibs=yes + export_dynamic_flag_spec='${wl}-Bexport' + runpath_var='LD_RUN_PATH' + + if test "$GCC" = yes; then + archive_cmds='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + archive_expsym_cmds='$CC -shared ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + else + archive_cmds='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + archive_expsym_cmds='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' + fi + ;; + + uts4*) + archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' + hardcode_libdir_flag_spec='-L$libdir' + hardcode_shlibpath_var=no + ;; + + *) + ld_shlibs=no + ;; + esac + + if test x$host_vendor = xsni; then + case $host in + sysv4 | sysv4.2uw2* | sysv4.3* | sysv5*) + export_dynamic_flag_spec='${wl}-Blargedynsym' + ;; + esac + fi + fi + +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ld_shlibs" >&5 +$as_echo "$ld_shlibs" >&6; } +test "$ld_shlibs" = no && can_build_shared=no + +with_gnu_ld=$with_gnu_ld + + + + + + + + + + + + + + + +# +# Do we need to explicitly link libc? +# +case "x$archive_cmds_need_lc" in +x|xyes) + # Assume -lc should be added + archive_cmds_need_lc=yes + + if test "$enable_shared" = yes && test "$GCC" = yes; then + case $archive_cmds in + *'~'*) + # FIXME: we may have to deal with multi-command sequences. + ;; + '$CC '*) + # Test whether the compiler implicitly links with -lc since on some + # systems, -lgcc has to come before -lc. If gcc already passes -lc + # to ld, don't add -lc before -lgcc. + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether -lc should be explicitly linked in" >&5 +$as_echo_n "checking whether -lc should be explicitly linked in... " >&6; } +if ${lt_cv_archive_cmds_need_lc+:} false; then : + $as_echo_n "(cached) " >&6 +else + $RM conftest* + echo "$lt_simple_compile_test_code" > conftest.$ac_ext + + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 + (eval $ac_compile) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } 2>conftest.err; then + soname=conftest + lib=conftest + libobjs=conftest.$ac_objext + deplibs= + wl=$lt_prog_compiler_wl + pic_flag=$lt_prog_compiler_pic + compiler_flags=-v + linker_flags=-v + verstring= + output_objdir=. + libname=conftest + lt_save_allow_undefined_flag=$allow_undefined_flag + allow_undefined_flag= + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$archive_cmds 2\>\&1 \| $GREP \" -lc \" \>/dev/null 2\>\&1\""; } >&5 + (eval $archive_cmds 2\>\&1 \| $GREP \" -lc \" \>/dev/null 2\>\&1) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } + then + lt_cv_archive_cmds_need_lc=no + else + lt_cv_archive_cmds_need_lc=yes + fi + allow_undefined_flag=$lt_save_allow_undefined_flag + else + cat conftest.err 1>&5 + fi + $RM conftest* + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_archive_cmds_need_lc" >&5 +$as_echo "$lt_cv_archive_cmds_need_lc" >&6; } + archive_cmds_need_lc=$lt_cv_archive_cmds_need_lc + ;; + esac + fi + ;; +esac + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking dynamic linker characteristics" >&5 +$as_echo_n "checking dynamic linker characteristics... " >&6; } + +if test "$GCC" = yes; then + case $host_os in + darwin*) lt_awk_arg="/^libraries:/,/LR/" ;; + *) lt_awk_arg="/^libraries:/" ;; + esac + case $host_os in + mingw* | cegcc*) lt_sed_strip_eq="s,=\([A-Za-z]:\),\1,g" ;; + *) lt_sed_strip_eq="s,=/,/,g" ;; + esac + lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq` + case $lt_search_path_spec in + *\;*) + # if the path contains ";" then we assume it to be the separator + # otherwise default to the standard path separator (i.e. ":") - it is + # assumed that no part of a normal pathname contains ";" but that should + # okay in the real world where ";" in dirpaths is itself problematic. + lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'` + ;; + *) + lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"` + ;; + esac + # Ok, now we have the path, separated by spaces, we can step through it + # and add multilib dir if necessary. + lt_tmp_lt_search_path_spec= + lt_multi_os_dir=`$CC $CPPFLAGS $CFLAGS $LDFLAGS -print-multi-os-directory 2>/dev/null` + for lt_sys_path in $lt_search_path_spec; do + if test -d "$lt_sys_path/$lt_multi_os_dir"; then + lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path/$lt_multi_os_dir" + else + test -d "$lt_sys_path" && \ + lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path" + fi + done + lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk ' +BEGIN {RS=" "; FS="/|\n";} { + lt_foo=""; + lt_count=0; + for (lt_i = NF; lt_i > 0; lt_i--) { + if ($lt_i != "" && $lt_i != ".") { + if ($lt_i == "..") { + lt_count++; + } else { + if (lt_count == 0) { + lt_foo="/" $lt_i lt_foo; + } else { + lt_count--; + } + } + } + } + if (lt_foo != "") { lt_freq[lt_foo]++; } + if (lt_freq[lt_foo] == 1) { print lt_foo; } +}'` + # AWK program above erroneously prepends '/' to C:/dos/paths + # for these hosts. + case $host_os in + mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\ + $SED 's,/\([A-Za-z]:\),\1,g'` ;; + esac + sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP` +else + sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib" +fi +library_names_spec= +libname_spec='lib$name' +soname_spec= +shrext_cmds=".so" +postinstall_cmds= +postuninstall_cmds= +finish_cmds= +finish_eval= +shlibpath_var= +shlibpath_overrides_runpath=unknown +version_type=none +dynamic_linker="$host_os ld.so" +sys_lib_dlsearch_path_spec="/lib /usr/lib" +need_lib_prefix=unknown +hardcode_into_libs=no + +# when you set need_version to no, make sure it does not cause -set_version +# flags to be left without arguments +need_version=unknown + +case $host_os in +aix3*) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix $libname.a' + shlibpath_var=LIBPATH + + # AIX 3 has no versioning support, so we append a major version to the name. + soname_spec='${libname}${release}${shared_ext}$major' + ;; + +aix[4-9]*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + hardcode_into_libs=yes + if test "$host_cpu" = ia64; then + # AIX 5 supports IA64 + library_names_spec='${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext}$versuffix $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + else + # With GCC up to 2.95.x, collect2 would create an import file + # for dependence libraries. The import file would start with + # the line `#! .'. This would cause the generated library to + # depend on `.', always an invalid library. This was fixed in + # development snapshots of GCC prior to 3.0. + case $host_os in + aix4 | aix4.[01] | aix4.[01].*) + if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' + echo ' yes ' + echo '#endif'; } | ${CC} -E - | $GREP yes > /dev/null; then + : + else + can_build_shared=no + fi + ;; + esac + # AIX (on Power*) has no versioning support, so currently we can not hardcode correct + # soname into executable. Probably we can add versioning support to + # collect2, so additional links can be useful in future. + if test "$aix_use_runtimelinking" = yes; then + # If using run time linking (on AIX 4.2 or later) use lib.so + # instead of lib.a to let people know that these are not + # typical AIX shared libraries. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + else + # We preserve .a as extension for shared libraries through AIX4.2 + # and later when we are not doing run time linking. + library_names_spec='${libname}${release}.a $libname.a' + soname_spec='${libname}${release}${shared_ext}$major' + fi + shlibpath_var=LIBPATH + fi + ;; + +amigaos*) + case $host_cpu in + powerpc) + # Since July 2007 AmigaOS4 officially supports .so libraries. + # When compiling the executable, add -use-dynld -Lsobjs: to the compileline. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + ;; + m68k) + library_names_spec='$libname.ixlibrary $libname.a' + # Create ${libname}_ixlibrary.a entries in /sys/libs. + finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done' + ;; + esac + ;; + +beos*) + library_names_spec='${libname}${shared_ext}' + dynamic_linker="$host_os ld.so" + shlibpath_var=LIBRARY_PATH + ;; + +bsdi[45]*) + version_type=linux # correct to gnu/linux during the next big refactor + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" + sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" + # the default ld.so.conf also contains /usr/contrib/lib and + # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow + # libtool to hard-code these into programs + ;; + +cygwin* | mingw* | pw32* | cegcc*) + version_type=windows + shrext_cmds=".dll" + need_version=no + need_lib_prefix=no + + case $GCC,$cc_basename in + yes,*) + # gcc + library_names_spec='$libname.dll.a' + # DLL is installed to $(libdir)/../bin by postinstall_cmds + postinstall_cmds='base_file=`basename \${file}`~ + dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog $dir/$dlname \$dldir/$dlname~ + chmod a+x \$dldir/$dlname~ + if test -n '\''$stripme'\'' && test -n '\''$striplib'\''; then + eval '\''$striplib \$dldir/$dlname'\'' || exit \$?; + fi' + postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $RM \$dlpath' + shlibpath_overrides_runpath=yes + + case $host_os in + cygwin*) + # Cygwin DLLs use 'cyg' prefix rather than 'lib' + soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}' + + sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api" + ;; + mingw* | cegcc*) + # MinGW DLLs use traditional 'lib' prefix + soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}' + ;; + pw32*) + # pw32 DLLs use 'pw' prefix rather than 'lib' + library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}' + ;; + esac + dynamic_linker='Win32 ld.exe' + ;; + + *,cl*) + # Native MSVC + libname_spec='$name' + soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}' + library_names_spec='${libname}.dll.lib' + + case $build_os in + mingw*) + sys_lib_search_path_spec= + lt_save_ifs=$IFS + IFS=';' + for lt_path in $LIB + do + IFS=$lt_save_ifs + # Let DOS variable expansion print the short 8.3 style file name. + lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"` + sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path" + done + IFS=$lt_save_ifs + # Convert to MSYS style. + sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([a-zA-Z]\\):| /\\1|g' -e 's|^ ||'` + ;; + cygwin*) + # Convert to unix form, then to dos form, then back to unix form + # but this time dos style (no spaces!) so that the unix form looks + # like /cygdrive/c/PROGRA~1:/cygdr... + sys_lib_search_path_spec=`cygpath --path --unix "$LIB"` + sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null` + sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"` + ;; + *) + sys_lib_search_path_spec="$LIB" + if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then + # It is most probably a Windows format PATH. + sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'` + else + sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"` + fi + # FIXME: find the short name or the path components, as spaces are + # common. (e.g. "Program Files" -> "PROGRA~1") + ;; + esac + + # DLL is installed to $(libdir)/../bin by postinstall_cmds + postinstall_cmds='base_file=`basename \${file}`~ + dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~ + dldir=$destdir/`dirname \$dlpath`~ + test -d \$dldir || mkdir -p \$dldir~ + $install_prog $dir/$dlname \$dldir/$dlname' + postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~ + dlpath=$dir/\$dldll~ + $RM \$dlpath' + shlibpath_overrides_runpath=yes + dynamic_linker='Win32 link.exe' + ;; + + *) + # Assume MSVC wrapper + library_names_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext} $libname.lib' + dynamic_linker='Win32 ld.exe' + ;; + esac + # FIXME: first we should search . and the directory the executable is in + shlibpath_var=PATH + ;; + +darwin* | rhapsody*) + dynamic_linker="$host_os dyld" + version_type=darwin + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${major}$shared_ext ${libname}$shared_ext' + soname_spec='${libname}${release}${major}$shared_ext' + shlibpath_overrides_runpath=yes + shlibpath_var=DYLD_LIBRARY_PATH + shrext_cmds='`test .$module = .yes && echo .so || echo .dylib`' + + sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/local/lib" + sys_lib_dlsearch_path_spec='/usr/local/lib /lib /usr/lib' + ;; + +dgux*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname$shared_ext' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +freebsd* | dragonfly*) + # DragonFly does not have aout. When/if they implement a new + # versioning mechanism, adjust this. + if test -x /usr/bin/objformat; then + objformat=`/usr/bin/objformat` + else + case $host_os in + freebsd[23].*) objformat=aout ;; + *) objformat=elf ;; + esac + fi + version_type=freebsd-$objformat + case $version_type in + freebsd-elf*) + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext} $libname${shared_ext}' + need_version=no + need_lib_prefix=no + ;; + freebsd-*) + library_names_spec='${libname}${release}${shared_ext}$versuffix $libname${shared_ext}$versuffix' + need_version=yes + ;; + esac + shlibpath_var=LD_LIBRARY_PATH + case $host_os in + freebsd2.*) + shlibpath_overrides_runpath=yes + ;; + freebsd3.[01]* | freebsdelf3.[01]*) + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + freebsd3.[2-9]* | freebsdelf3.[2-9]* | \ + freebsd4.[0-5] | freebsdelf4.[0-5] | freebsd4.1.1 | freebsdelf4.1.1) + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + *) # from 4.6 on, and DragonFly + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + esac + ;; + +haiku*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + dynamic_linker="$host_os runtime_loader" + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LIBRARY_PATH + shlibpath_overrides_runpath=yes + sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib' + hardcode_into_libs=yes + ;; + +hpux9* | hpux10* | hpux11*) + # Give a soname corresponding to the major version so that dld.sl refuses to + # link against other versions. + version_type=sunos + need_lib_prefix=no + need_version=no + case $host_cpu in + ia64*) + shrext_cmds='.so' + hardcode_into_libs=yes + dynamic_linker="$host_os dld.so" + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + if test "X$HPUX_IA64_MODE" = X32; then + sys_lib_search_path_spec="/usr/lib/hpux32 /usr/local/lib/hpux32 /usr/local/lib" + else + sys_lib_search_path_spec="/usr/lib/hpux64 /usr/local/lib/hpux64" + fi + sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec + ;; + hppa*64*) + shrext_cmds='.sl' + hardcode_into_libs=yes + dynamic_linker="$host_os dld.sl" + shlibpath_var=LD_LIBRARY_PATH # How should we handle SHLIB_PATH + shlibpath_overrides_runpath=yes # Unless +noenvvar is specified. + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + sys_lib_search_path_spec="/usr/lib/pa20_64 /usr/ccs/lib/pa20_64" + sys_lib_dlsearch_path_spec=$sys_lib_search_path_spec + ;; + *) + shrext_cmds='.sl' + dynamic_linker="$host_os dld.sl" + shlibpath_var=SHLIB_PATH + shlibpath_overrides_runpath=no # +s is required to enable SHLIB_PATH + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + ;; + esac + # HP-UX runs *really* slowly unless shared libraries are mode 555, ... + postinstall_cmds='chmod 555 $lib' + # or fails outright, so override atomically: + install_override_mode=555 + ;; + +interix[3-9]*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + +irix5* | irix6* | nonstopux*) + case $host_os in + nonstopux*) version_type=nonstopux ;; + *) + if test "$lt_cv_prog_gnu_ld" = yes; then + version_type=linux # correct to gnu/linux during the next big refactor + else + version_type=irix + fi ;; + esac + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}${shared_ext}$major' + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext} $libname${shared_ext}' + case $host_os in + irix5* | nonstopux*) + libsuff= shlibsuff= + ;; + *) + case $LD in # libtool.m4 will add one of these switches to LD + *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") + libsuff= shlibsuff= libmagic=32-bit;; + *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") + libsuff=32 shlibsuff=N32 libmagic=N32;; + *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") + libsuff=64 shlibsuff=64 libmagic=64-bit;; + *) libsuff= shlibsuff= libmagic=never-match;; + esac + ;; + esac + shlibpath_var=LD_LIBRARY${shlibsuff}_PATH + shlibpath_overrides_runpath=no + sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" + sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" + hardcode_into_libs=yes + ;; + +# No shared lib support for Linux oldld, aout, or coff. +linux*oldld* | linux*aout* | linux*coff*) + dynamic_linker=no + ;; + +# This must be glibc/ELF. +linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + + # Some binutils ld are patched to set DT_RUNPATH + if ${lt_cv_shlibpath_overrides_runpath+:} false; then : + $as_echo_n "(cached) " >&6 +else + lt_cv_shlibpath_overrides_runpath=no + save_LDFLAGS=$LDFLAGS + save_libdir=$libdir + eval "libdir=/foo; wl=\"$lt_prog_compiler_wl\"; \ + LDFLAGS=\"\$LDFLAGS $hardcode_libdir_flag_spec\"" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + if ($OBJDUMP -p conftest$ac_exeext) 2>/dev/null | grep "RUNPATH.*$libdir" >/dev/null; then : + lt_cv_shlibpath_overrides_runpath=yes +fi +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext + LDFLAGS=$save_LDFLAGS + libdir=$save_libdir + +fi + + shlibpath_overrides_runpath=$lt_cv_shlibpath_overrides_runpath + + # This implies no fast_install, which is unacceptable. + # Some rework will be needed to allow for fast_install + # before this can be enabled. + hardcode_into_libs=yes + + # Append ld.so.conf contents to the search path + if test -f /etc/ld.so.conf; then + lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '` + sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra" + fi + + # We used to test for /lib/ld.so.1 and disable shared libraries on + # powerpc, because MkLinux only supported shared libraries with the + # GNU dynamic linker. Since this was broken with cross compilers, + # most powerpc-linux boxes support dynamic linking these days and + # people can always --disable-shared, the test was removed, and we + # assume the GNU/Linux dynamic linker is in use. + dynamic_linker='GNU/Linux ld.so' + ;; + +netbsdelf*-gnu) + version_type=linux + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + dynamic_linker='NetBSD ld.elf_so' + ;; + +netbsd*) + version_type=sunos + need_lib_prefix=no + need_version=no + if echo __ELF__ | $CC -E - | $GREP __ELF__ >/dev/null; then + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + dynamic_linker='NetBSD (a.out) ld.so' + else + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + dynamic_linker='NetBSD ld.elf_so' + fi + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + ;; + +newsos6) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + ;; + +*nto* | *qnx*) + version_type=qnx + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + dynamic_linker='ldqnx.so' + ;; + +openbsd*) + version_type=sunos + sys_lib_dlsearch_path_spec="/usr/lib" + need_lib_prefix=no + # Some older versions of OpenBSD (3.3 at least) *do* need versioned libs. + case $host_os in + openbsd3.3 | openbsd3.3.*) need_version=yes ;; + *) need_version=no ;; + esac + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix' + finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' + shlibpath_var=LD_LIBRARY_PATH + if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then + case $host_os in + openbsd2.[89] | openbsd2.[89].*) + shlibpath_overrides_runpath=no + ;; + *) + shlibpath_overrides_runpath=yes + ;; + esac + else + shlibpath_overrides_runpath=yes + fi + ;; + +os2*) + libname_spec='$name' + shrext_cmds=".dll" + need_lib_prefix=no + library_names_spec='$libname${shared_ext} $libname.a' + dynamic_linker='OS/2 ld.exe' + shlibpath_var=LIBPATH + ;; + +osf3* | osf4* | osf5*) + version_type=osf + need_lib_prefix=no + need_version=no + soname_spec='${libname}${release}${shared_ext}$major' + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + sys_lib_search_path_spec="/usr/shlib /usr/ccs/lib /usr/lib/cmplrs/cc /usr/lib /usr/local/lib /var/shlib" + sys_lib_dlsearch_path_spec="$sys_lib_search_path_spec" + ;; + +rdos*) + dynamic_linker=no + ;; + +solaris*) + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + # ldd complains unless libraries are executable + postinstall_cmds='chmod +x $lib' + ;; + +sunos4*) + version_type=sunos + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix' + finish_cmds='PATH="\$PATH:/usr/etc" ldconfig $libdir' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + if test "$with_gnu_ld" = yes; then + need_lib_prefix=no + fi + need_version=yes + ;; + +sysv4 | sysv4.3*) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + case $host_vendor in + sni) + shlibpath_overrides_runpath=no + need_lib_prefix=no + runpath_var=LD_RUN_PATH + ;; + siemens) + need_lib_prefix=no + ;; + motorola) + need_lib_prefix=no + need_version=no + shlibpath_overrides_runpath=no + sys_lib_search_path_spec='/lib /usr/lib /usr/ccs/lib' + ;; + esac + ;; + +sysv4*MP*) + if test -d /usr/nec ;then + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='$libname${shared_ext}.$versuffix $libname${shared_ext}.$major $libname${shared_ext}' + soname_spec='$libname${shared_ext}.$major' + shlibpath_var=LD_LIBRARY_PATH + fi + ;; + +sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) + version_type=freebsd-elf + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext} $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=yes + hardcode_into_libs=yes + if test "$with_gnu_ld" = yes; then + sys_lib_search_path_spec='/usr/local/lib /usr/gnu/lib /usr/ccs/lib /usr/lib /lib' + else + sys_lib_search_path_spec='/usr/ccs/lib /usr/lib' + case $host_os in + sco3.2v5*) + sys_lib_search_path_spec="$sys_lib_search_path_spec /lib" + ;; + esac + fi + sys_lib_dlsearch_path_spec='/usr/lib' + ;; + +tpf*) + # TPF is a cross-target only. Preferred cross-host = GNU/Linux. + version_type=linux # correct to gnu/linux during the next big refactor + need_lib_prefix=no + need_version=no + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + shlibpath_var=LD_LIBRARY_PATH + shlibpath_overrides_runpath=no + hardcode_into_libs=yes + ;; + +uts4*) + version_type=linux # correct to gnu/linux during the next big refactor + library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' + soname_spec='${libname}${release}${shared_ext}$major' + shlibpath_var=LD_LIBRARY_PATH + ;; + +*) + dynamic_linker=no + ;; +esac +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $dynamic_linker" >&5 +$as_echo "$dynamic_linker" >&6; } +test "$dynamic_linker" = no && can_build_shared=no + +variables_saved_for_relink="PATH $shlibpath_var $runpath_var" +if test "$GCC" = yes; then + variables_saved_for_relink="$variables_saved_for_relink GCC_EXEC_PREFIX COMPILER_PATH LIBRARY_PATH" +fi + +if test "${lt_cv_sys_lib_search_path_spec+set}" = set; then + sys_lib_search_path_spec="$lt_cv_sys_lib_search_path_spec" +fi +if test "${lt_cv_sys_lib_dlsearch_path_spec+set}" = set; then + sys_lib_dlsearch_path_spec="$lt_cv_sys_lib_dlsearch_path_spec" +fi + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5 +$as_echo_n "checking how to hardcode library paths into programs... " >&6; } +hardcode_action= +if test -n "$hardcode_libdir_flag_spec" || + test -n "$runpath_var" || + test "X$hardcode_automatic" = "Xyes" ; then + + # We can hardcode non-existent directories. + if test "$hardcode_direct" != no && + # If the only mechanism to avoid hardcoding is shlibpath_var, we + # have to relink, otherwise we might link with an installed library + # when we should be linking with a yet-to-be-installed one + ## test "$_LT_TAGVAR(hardcode_shlibpath_var, )" != no && + test "$hardcode_minus_L" != no; then + # Linking always hardcodes the temporary library directory. + hardcode_action=relink + else + # We can link without hardcoding, and we can hardcode nonexisting dirs. + hardcode_action=immediate + fi +else + # We cannot hardcode anything, or else we can only hardcode existing + # directories. + hardcode_action=unsupported +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $hardcode_action" >&5 +$as_echo "$hardcode_action" >&6; } + +if test "$hardcode_action" = relink || + test "$inherit_rpath" = yes; then + # Fast installation is not supported + enable_fast_install=no +elif test "$shlibpath_overrides_runpath" = yes || + test "$enable_shared" = no; then + # Fast installation is not necessary + enable_fast_install=needless +fi + + + + + + + if test "x$enable_dlopen" != xyes; then + enable_dlopen=unknown + enable_dlopen_self=unknown + enable_dlopen_self_static=unknown +else + lt_cv_dlopen=no + lt_cv_dlopen_libs= + + case $host_os in + beos*) + lt_cv_dlopen="load_add_on" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + ;; + + mingw* | pw32* | cegcc*) + lt_cv_dlopen="LoadLibrary" + lt_cv_dlopen_libs= + ;; + + cygwin*) + lt_cv_dlopen="dlopen" + lt_cv_dlopen_libs= + ;; + + darwin*) + # if libdl is installed we need to link against it + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 +$as_echo_n "checking for dlopen in -ldl... " >&6; } +if ${ac_cv_lib_dl_dlopen+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldl $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); +int +main () +{ +return dlopen (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_dl_dlopen=yes +else + ac_cv_lib_dl_dlopen=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 +$as_echo "$ac_cv_lib_dl_dlopen" >&6; } +if test "x$ac_cv_lib_dl_dlopen" = xyes; then : + lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl" +else + + lt_cv_dlopen="dyld" + lt_cv_dlopen_libs= + lt_cv_dlopen_self=yes + +fi + + ;; + + *) + ac_fn_c_check_func "$LINENO" "shl_load" "ac_cv_func_shl_load" +if test "x$ac_cv_func_shl_load" = xyes; then : + lt_cv_dlopen="shl_load" +else + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for shl_load in -ldld" >&5 +$as_echo_n "checking for shl_load in -ldld... " >&6; } +if ${ac_cv_lib_dld_shl_load+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldld $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char shl_load (); +int +main () +{ +return shl_load (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_dld_shl_load=yes +else + ac_cv_lib_dld_shl_load=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dld_shl_load" >&5 +$as_echo "$ac_cv_lib_dld_shl_load" >&6; } +if test "x$ac_cv_lib_dld_shl_load" = xyes; then : + lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-ldld" +else + ac_fn_c_check_func "$LINENO" "dlopen" "ac_cv_func_dlopen" +if test "x$ac_cv_func_dlopen" = xyes; then : + lt_cv_dlopen="dlopen" +else + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 +$as_echo_n "checking for dlopen in -ldl... " >&6; } +if ${ac_cv_lib_dl_dlopen+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldl $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); +int +main () +{ +return dlopen (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_dl_dlopen=yes +else + ac_cv_lib_dl_dlopen=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 +$as_echo "$ac_cv_lib_dl_dlopen" >&6; } +if test "x$ac_cv_lib_dl_dlopen" = xyes; then : + lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl" +else + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -lsvld" >&5 +$as_echo_n "checking for dlopen in -lsvld... " >&6; } +if ${ac_cv_lib_svld_dlopen+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lsvld $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dlopen (); +int +main () +{ +return dlopen (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_svld_dlopen=yes +else + ac_cv_lib_svld_dlopen=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_svld_dlopen" >&5 +$as_echo "$ac_cv_lib_svld_dlopen" >&6; } +if test "x$ac_cv_lib_svld_dlopen" = xyes; then : + lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld" +else + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dld_link in -ldld" >&5 +$as_echo_n "checking for dld_link in -ldld... " >&6; } +if ${ac_cv_lib_dld_dld_link+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-ldld $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char dld_link (); +int +main () +{ +return dld_link (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_dld_dld_link=yes +else + ac_cv_lib_dld_dld_link=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dld_dld_link" >&5 +$as_echo "$ac_cv_lib_dld_dld_link" >&6; } +if test "x$ac_cv_lib_dld_dld_link" = xyes; then : + lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-ldld" +fi + + +fi + + +fi + + +fi + + +fi + + +fi + + ;; + esac + + if test "x$lt_cv_dlopen" != xno; then + enable_dlopen=yes + else + enable_dlopen=no + fi + + case $lt_cv_dlopen in + dlopen) + save_CPPFLAGS="$CPPFLAGS" + test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" + + save_LDFLAGS="$LDFLAGS" + wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" + + save_LIBS="$LIBS" + LIBS="$lt_cv_dlopen_libs $LIBS" + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether a program can dlopen itself" >&5 +$as_echo_n "checking whether a program can dlopen itself... " >&6; } +if ${lt_cv_dlopen_self+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test "$cross_compiling" = yes; then : + lt_cv_dlopen_self=cross +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +#line $LINENO "configure" +#include "confdefs.h" + +#if HAVE_DLFCN_H +#include +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +/* When -fvisbility=hidden is used, assume the code has been annotated + correspondingly for the symbols needed. */ +#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) +int fnord () __attribute__((visibility("default"))); +#endif + +int fnord () { return 42; } +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else + { + if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + else puts (dlerror ()); + } + /* dlclose (self); */ + } + else + puts (dlerror ()); + + return status; +} +_LT_EOF + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 + (eval $ac_link) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) >&5 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) lt_cv_dlopen_self=yes ;; + x$lt_dlneed_uscore) lt_cv_dlopen_self=yes ;; + x$lt_dlunknown|x*) lt_cv_dlopen_self=no ;; + esac + else : + # compilation failed + lt_cv_dlopen_self=no + fi +fi +rm -fr conftest* + + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_dlopen_self" >&5 +$as_echo "$lt_cv_dlopen_self" >&6; } + + if test "x$lt_cv_dlopen_self" = xyes; then + wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $lt_prog_compiler_static\" + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether a statically linked program can dlopen itself" >&5 +$as_echo_n "checking whether a statically linked program can dlopen itself... " >&6; } +if ${lt_cv_dlopen_self_static+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test "$cross_compiling" = yes; then : + lt_cv_dlopen_self_static=cross +else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +#line $LINENO "configure" +#include "confdefs.h" + +#if HAVE_DLFCN_H +#include +#endif + +#include + +#ifdef RTLD_GLOBAL +# define LT_DLGLOBAL RTLD_GLOBAL +#else +# ifdef DL_GLOBAL +# define LT_DLGLOBAL DL_GLOBAL +# else +# define LT_DLGLOBAL 0 +# endif +#endif + +/* We may have to define LT_DLLAZY_OR_NOW in the command line if we + find out it does not work in some platform. */ +#ifndef LT_DLLAZY_OR_NOW +# ifdef RTLD_LAZY +# define LT_DLLAZY_OR_NOW RTLD_LAZY +# else +# ifdef DL_LAZY +# define LT_DLLAZY_OR_NOW DL_LAZY +# else +# ifdef RTLD_NOW +# define LT_DLLAZY_OR_NOW RTLD_NOW +# else +# ifdef DL_NOW +# define LT_DLLAZY_OR_NOW DL_NOW +# else +# define LT_DLLAZY_OR_NOW 0 +# endif +# endif +# endif +# endif +#endif + +/* When -fvisbility=hidden is used, assume the code has been annotated + correspondingly for the symbols needed. */ +#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) +int fnord () __attribute__((visibility("default"))); +#endif + +int fnord () { return 42; } +int main () +{ + void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); + int status = $lt_dlunknown; + + if (self) + { + if (dlsym (self,"fnord")) status = $lt_dlno_uscore; + else + { + if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; + else puts (dlerror ()); + } + /* dlclose (self); */ + } + else + puts (dlerror ()); + + return status; +} +_LT_EOF + if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 + (eval $ac_link) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } && test -s conftest${ac_exeext} 2>/dev/null; then + (./conftest; exit; ) >&5 2>/dev/null + lt_status=$? + case x$lt_status in + x$lt_dlno_uscore) lt_cv_dlopen_self_static=yes ;; + x$lt_dlneed_uscore) lt_cv_dlopen_self_static=yes ;; + x$lt_dlunknown|x*) lt_cv_dlopen_self_static=no ;; + esac + else : + # compilation failed + lt_cv_dlopen_self_static=no + fi +fi +rm -fr conftest* + + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_dlopen_self_static" >&5 +$as_echo "$lt_cv_dlopen_self_static" >&6; } + fi + + CPPFLAGS="$save_CPPFLAGS" + LDFLAGS="$save_LDFLAGS" + LIBS="$save_LIBS" + ;; + esac + + case $lt_cv_dlopen_self in + yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; + *) enable_dlopen_self=unknown ;; + esac + + case $lt_cv_dlopen_self_static in + yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; + *) enable_dlopen_self_static=unknown ;; + esac +fi + + + + + + + + + + + + + + + + + +striplib= +old_striplib= +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether stripping libraries is possible" >&5 +$as_echo_n "checking whether stripping libraries is possible... " >&6; } +if test -n "$STRIP" && $STRIP -V 2>&1 | $GREP "GNU strip" >/dev/null; then + test -z "$old_striplib" && old_striplib="$STRIP --strip-debug" + test -z "$striplib" && striplib="$STRIP --strip-unneeded" + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } +else +# FIXME - insert some real tests, host_os isn't really good enough + case $host_os in + darwin*) + if test -n "$STRIP" ; then + striplib="$STRIP -x" + old_striplib="$STRIP -S" + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + fi + ;; + *) + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + ;; + esac +fi + + + + + + + + + + + + + # Report which library types will actually be built + { $as_echo "$as_me:${as_lineno-$LINENO}: checking if libtool supports shared libraries" >&5 +$as_echo_n "checking if libtool supports shared libraries... " >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $can_build_shared" >&5 +$as_echo "$can_build_shared" >&6; } + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether to build shared libraries" >&5 +$as_echo_n "checking whether to build shared libraries... " >&6; } + test "$can_build_shared" = "no" && enable_shared=no + + # On AIX, shared libraries and static libraries use the same namespace, and + # are all built from PIC. + case $host_os in + aix3*) + test "$enable_shared" = yes && enable_static=no + if test -n "$RANLIB"; then + archive_cmds="$archive_cmds~\$RANLIB \$lib" + postinstall_cmds='$RANLIB $lib' + fi + ;; + + aix[4-9]*) + if test "$host_cpu" != ia64 && test "$aix_use_runtimelinking" = no ; then + test "$enable_shared" = yes && enable_static=no + fi + ;; + esac + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_shared" >&5 +$as_echo "$enable_shared" >&6; } + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether to build static libraries" >&5 +$as_echo_n "checking whether to build static libraries... " >&6; } + # Make sure either enable_shared or enable_static is yes. + test "$enable_shared" = yes || enable_static=yes + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_static" >&5 +$as_echo "$enable_static" >&6; } + + + + +fi +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +CC="$lt_save_CC" + + + + + + + + + + + + + + + + ac_config_commands="$ac_config_commands libtool" + + + + +# Only expand once: + + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}gcc", so it can be a program name with args. +set dummy ${ac_tool_prefix}gcc; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_CC="${ac_tool_prefix}gcc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_prog_CC"; then + ac_ct_CC=$CC + # Extract the first word of "gcc", so it can be a program name with args. +set dummy gcc; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_CC="gcc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 +$as_echo "$ac_ct_CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +else + CC="$ac_cv_prog_CC" +fi + +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}cc", so it can be a program name with args. +set dummy ${ac_tool_prefix}cc; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_CC="${ac_tool_prefix}cc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + fi +fi +if test -z "$CC"; then + # Extract the first word of "cc", so it can be a program name with args. +set dummy cc; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else + ac_prog_rejected=no +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + if test "$as_dir/$ac_word$ac_exec_ext" = "/usr/ucb/cc"; then + ac_prog_rejected=yes + continue + fi + ac_cv_prog_CC="cc" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +if test $ac_prog_rejected = yes; then + # We found a bogon in the path, so make sure we never use it. + set dummy $ac_cv_prog_CC + shift + if test $# != 0; then + # We chose a different compiler from the bogus one. + # However, it has the same basename, so the bogon will be chosen + # first if we set CC to just the basename; use the full file name. + shift + ac_cv_prog_CC="$as_dir/$ac_word${1+' '}$@" + fi +fi +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$CC"; then + if test -n "$ac_tool_prefix"; then + for ac_prog in cl.exe + do + # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. +set dummy $ac_tool_prefix$ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$CC"; then + ac_cv_prog_CC="$CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_CC="$ac_tool_prefix$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +CC=$ac_cv_prog_CC +if test -n "$CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $CC" >&5 +$as_echo "$CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$CC" && break + done +fi +if test -z "$CC"; then + ac_ct_CC=$CC + for ac_prog in cl.exe +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_ac_ct_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$ac_ct_CC"; then + ac_cv_prog_ac_ct_CC="$ac_ct_CC" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_ac_ct_CC="$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +ac_ct_CC=$ac_cv_prog_ac_ct_CC +if test -n "$ac_ct_CC"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_CC" >&5 +$as_echo "$ac_ct_CC" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$ac_ct_CC" && break +done + + if test "x$ac_ct_CC" = x; then + CC="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + CC=$ac_ct_CC + fi +fi + +fi + + +test -z "$CC" && { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "no acceptable C compiler found in \$PATH +See \`config.log' for more details" "$LINENO" 5; } + +# Provide some information about the compiler. +$as_echo "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5 +set X $ac_compile +ac_compiler=$2 +for ac_option in --version -v -V -qversion; do + { { ac_try="$ac_compiler $ac_option >&5" +case "(($ac_try" in + *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; + *) ac_try_echo=$ac_try;; +esac +eval ac_try_echo="\"\$as_me:${as_lineno-$LINENO}: $ac_try_echo\"" +$as_echo "$ac_try_echo"; } >&5 + (eval "$ac_compiler $ac_option >&5") 2>conftest.err + ac_status=$? + if test -s conftest.err; then + sed '10a\ +... rest of stderr output deleted ... + 10q' conftest.err >conftest.er1 + cat conftest.er1 >&5 + fi + rm -f conftest.er1 conftest.err + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; } +done + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are using the GNU C compiler" >&5 +$as_echo_n "checking whether we are using the GNU C compiler... " >&6; } +if ${ac_cv_c_compiler_gnu+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ +#ifndef __GNUC__ + choke me +#endif + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_compiler_gnu=yes +else + ac_compiler_gnu=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +ac_cv_c_compiler_gnu=$ac_compiler_gnu + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_compiler_gnu" >&5 +$as_echo "$ac_cv_c_compiler_gnu" >&6; } +if test $ac_compiler_gnu = yes; then + GCC=yes +else + GCC= +fi +ac_test_CFLAGS=${CFLAGS+set} +ac_save_CFLAGS=$CFLAGS +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC accepts -g" >&5 +$as_echo_n "checking whether $CC accepts -g... " >&6; } +if ${ac_cv_prog_cc_g+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_save_c_werror_flag=$ac_c_werror_flag + ac_c_werror_flag=yes + ac_cv_prog_cc_g=no + CFLAGS="-g" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_prog_cc_g=yes +else + CFLAGS="" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + +else + ac_c_werror_flag=$ac_save_c_werror_flag + CFLAGS="-g" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_prog_cc_g=yes +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_c_werror_flag=$ac_save_c_werror_flag +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_g" >&5 +$as_echo "$ac_cv_prog_cc_g" >&6; } +if test "$ac_test_CFLAGS" = set; then + CFLAGS=$ac_save_CFLAGS +elif test $ac_cv_prog_cc_g = yes; then + if test "$GCC" = yes; then + CFLAGS="-g -O2" + else + CFLAGS="-g" + fi +else + if test "$GCC" = yes; then + CFLAGS="-O2" + else + CFLAGS= + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $CC option to accept ISO C89" >&5 +$as_echo_n "checking for $CC option to accept ISO C89... " >&6; } +if ${ac_cv_prog_cc_c89+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_cv_prog_cc_c89=no +ac_save_CC=$CC +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +#include +struct stat; +/* Most of the following tests are stolen from RCS 5.7's src/conf.sh. */ +struct buf { int x; }; +FILE * (*rcsopen) (struct buf *, struct stat *, int); +static char *e (p, i) + char **p; + int i; +{ + return p[i]; +} +static char *f (char * (*g) (char **, int), char **p, ...) +{ + char *s; + va_list v; + va_start (v,p); + s = g (p, va_arg (v,int)); + va_end (v); + return s; +} + +/* OSF 4.0 Compaq cc is some sort of almost-ANSI by default. It has + function prototypes and stuff, but not '\xHH' hex character constants. + These don't provoke an error unfortunately, instead are silently treated + as 'x'. The following induces an error, until -std is added to get + proper ANSI mode. Curiously '\x00'!='x' always comes out true, for an + array size at least. It's necessary to write '\x00'==0 to get something + that's true only with -std. */ +int osf4_cc_array ['\x00' == 0 ? 1 : -1]; + +/* IBM C 6 for AIX is almost-ANSI by default, but it replaces macro parameters + inside strings and character constants. */ +#define FOO(x) 'x' +int xlc6_cc_array[FOO(a) == 'x' ? 1 : -1]; + +int test (int i, double x); +struct s1 {int (*f) (int a);}; +struct s2 {int (*f) (double a);}; +int pairnames (int, char **, FILE *(*)(struct buf *, struct stat *, int), int, int); +int argc; +char **argv; +int +main () +{ +return f (e, argv, 0) != argv[0] || f (e, argv, 1) != argv[1]; + ; + return 0; +} +_ACEOF +for ac_arg in '' -qlanglvl=extc89 -qlanglvl=ansi -std \ + -Ae "-Aa -D_HPUX_SOURCE" "-Xc -D__EXTENSIONS__" +do + CC="$ac_save_CC $ac_arg" + if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_prog_cc_c89=$ac_arg +fi +rm -f core conftest.err conftest.$ac_objext + test "x$ac_cv_prog_cc_c89" != "xno" && break +done +rm -f conftest.$ac_ext +CC=$ac_save_CC + +fi +# AC_CACHE_VAL +case "x$ac_cv_prog_cc_c89" in + x) + { $as_echo "$as_me:${as_lineno-$LINENO}: result: none needed" >&5 +$as_echo "none needed" >&6; } ;; + xno) + { $as_echo "$as_me:${as_lineno-$LINENO}: result: unsupported" >&5 +$as_echo "unsupported" >&6; } ;; + *) + CC="$CC $ac_cv_prog_cc_c89" + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_prog_cc_c89" >&5 +$as_echo "$ac_cv_prog_cc_c89" >&6; } ;; +esac +if test "x$ac_cv_prog_cc_c89" != xno; then : + +fi + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC understands -c and -o together" >&5 +$as_echo_n "checking whether $CC understands -c and -o together... " >&6; } +if ${am_cv_prog_cc_c_o+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +int +main () +{ + + ; + return 0; +} +_ACEOF + # Make sure it works both with $CC and with simple cc. + # Following AC_PROG_CC_C_O, we do the test twice because some + # compilers refuse to overwrite an existing .o file with -o, + # though they will create one. + am_cv_prog_cc_c_o=yes + for am_i in 1 2; do + if { echo "$as_me:$LINENO: $CC -c conftest.$ac_ext -o conftest2.$ac_objext" >&5 + ($CC -c conftest.$ac_ext -o conftest2.$ac_objext) >&5 2>&5 + ac_status=$? + echo "$as_me:$LINENO: \$? = $ac_status" >&5 + (exit $ac_status); } \ + && test -f conftest2.$ac_objext; then + : OK + else + am_cv_prog_cc_c_o=no + break + fi + done + rm -f core conftest* + unset am_i +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_prog_cc_c_o" >&5 +$as_echo "$am_cv_prog_cc_c_o" >&6; } +if test "$am_cv_prog_cc_c_o" != yes; then + # Losing compiler, so override with the script. + # FIXME: It is wrong to rewrite CC. + # But if we don't then we get into trouble of one sort or another. + # A longer-term fix would be to have automake use am__CC in this case, + # and then we could set am__CC="\$(top_srcdir)/compile \$(CC)" + CC="$am_aux_dir/compile $CC" +fi +ac_ext=c +ac_cpp='$CPP $CPPFLAGS' +ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +ac_compiler_gnu=$ac_cv_c_compiler_gnu + + +depcc="$CC" am_compiler_list= + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking dependency style of $depcc" >&5 +$as_echo_n "checking dependency style of $depcc... " >&6; } +if ${am_cv_CC_dependencies_compiler_type+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -z "$AMDEP_TRUE" && test -f "$am_depcomp"; then + # We make a subdir and do the tests there. Otherwise we can end up + # making bogus files that we don't know about and never remove. For + # instance it was reported that on HP-UX the gcc test will end up + # making a dummy file named 'D' -- because '-MD' means "put the output + # in D". + rm -rf conftest.dir + mkdir conftest.dir + # Copy depcomp to subdir because otherwise we won't find it if we're + # using a relative directory. + cp "$am_depcomp" conftest.dir + cd conftest.dir + # We will build objects and dependencies in a subdirectory because + # it helps to detect inapplicable dependency modes. For instance + # both Tru64's cc and ICC support -MD to output dependencies as a + # side effect of compilation, but ICC will put the dependencies in + # the current directory while Tru64 will put them in the object + # directory. + mkdir sub + + am_cv_CC_dependencies_compiler_type=none + if test "$am_compiler_list" = ""; then + am_compiler_list=`sed -n 's/^#*\([a-zA-Z0-9]*\))$/\1/p' < ./depcomp` + fi + am__universal=false + case " $depcc " in #( + *\ -arch\ *\ -arch\ *) am__universal=true ;; + esac + + for depmode in $am_compiler_list; do + # Setup a source with many dependencies, because some compilers + # like to wrap large dependency lists on column 80 (with \), and + # we should not choose a depcomp mode which is confused by this. + # + # We need to recreate these files for each test, as the compiler may + # overwrite some of them when testing with obscure command lines. + # This happens at least with the AIX C compiler. + : > sub/conftest.c + for i in 1 2 3 4 5 6; do + echo '#include "conftst'$i'.h"' >> sub/conftest.c + # Using ": > sub/conftst$i.h" creates only sub/conftst1.h with + # Solaris 10 /bin/sh. + echo '/* dummy */' > sub/conftst$i.h + done + echo "${am__include} ${am__quote}sub/conftest.Po${am__quote}" > confmf + + # We check with '-c' and '-o' for the sake of the "dashmstdout" + # mode. It turns out that the SunPro C++ compiler does not properly + # handle '-M -o', and we need to detect this. Also, some Intel + # versions had trouble with output in subdirs. + am__obj=sub/conftest.${OBJEXT-o} + am__minus_obj="-o $am__obj" + case $depmode in + gcc) + # This depmode causes a compiler race in universal mode. + test "$am__universal" = false || continue + ;; + nosideeffect) + # After this tag, mechanisms are not by side-effect, so they'll + # only be used when explicitly requested. + if test "x$enable_dependency_tracking" = xyes; then + continue + else + break + fi + ;; + msvc7 | msvc7msys | msvisualcpp | msvcmsys) + # This compiler won't grok '-c -o', but also, the minuso test has + # not run yet. These depmodes are late enough in the game, and + # so weak that their functioning should not be impacted. + am__obj=conftest.${OBJEXT-o} + am__minus_obj= + ;; + none) break ;; + esac + if depmode=$depmode \ + source=sub/conftest.c object=$am__obj \ + depfile=sub/conftest.Po tmpdepfile=sub/conftest.TPo \ + $SHELL ./depcomp $depcc -c $am__minus_obj sub/conftest.c \ + >/dev/null 2>conftest.err && + grep sub/conftst1.h sub/conftest.Po > /dev/null 2>&1 && + grep sub/conftst6.h sub/conftest.Po > /dev/null 2>&1 && + grep $am__obj sub/conftest.Po > /dev/null 2>&1 && + ${MAKE-make} -s -f confmf > /dev/null 2>&1; then + # icc doesn't choke on unknown options, it will just issue warnings + # or remarks (even with -Werror). So we grep stderr for any message + # that says an option was ignored or not supported. + # When given -MP, icc 7.0 and 7.1 complain thusly: + # icc: Command line warning: ignoring option '-M'; no argument required + # The diagnosis changed in icc 8.0: + # icc: Command line remark: option '-MP' not supported + if (grep 'ignoring option' conftest.err || + grep 'not supported' conftest.err) >/dev/null 2>&1; then :; else + am_cv_CC_dependencies_compiler_type=$depmode + break + fi + fi + done + + cd .. + rm -rf conftest.dir +else + am_cv_CC_dependencies_compiler_type=none +fi + +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $am_cv_CC_dependencies_compiler_type" >&5 +$as_echo "$am_cv_CC_dependencies_compiler_type" >&6; } +CCDEPMODE=depmode=$am_cv_CC_dependencies_compiler_type + + if + test "x$enable_dependency_tracking" != xno \ + && test "$am_cv_CC_dependencies_compiler_type" = gcc3; then + am__fastdepCC_TRUE= + am__fastdepCC_FALSE='#' +else + am__fastdepCC_TRUE='#' + am__fastdepCC_FALSE= +fi + + + + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5 +$as_echo_n "checking whether byte ordering is bigendian... " >&6; } +if ${ac_cv_c_bigendian+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_cv_c_bigendian=unknown + # See if we're dealing with a universal compiler. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#ifndef __APPLE_CC__ + not a universal capable compiler + #endif + typedef int dummy; + +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + + # Check for potential -arch flags. It is not universal unless + # there are at least two -arch flags with different values. + ac_arch= + ac_prev= + for ac_word in $CC $CFLAGS $CPPFLAGS $LDFLAGS; do + if test -n "$ac_prev"; then + case $ac_word in + i?86 | x86_64 | ppc | ppc64) + if test -z "$ac_arch" || test "$ac_arch" = "$ac_word"; then + ac_arch=$ac_word + else + ac_cv_c_bigendian=universal + break + fi + ;; + esac + ac_prev= + elif test "x$ac_word" = "x-arch"; then + ac_prev=arch + fi + done +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + if test $ac_cv_c_bigendian = unknown; then + # See if sys/param.h defines the BYTE_ORDER macro. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + #include + +int +main () +{ +#if ! (defined BYTE_ORDER && defined BIG_ENDIAN \ + && defined LITTLE_ENDIAN && BYTE_ORDER && BIG_ENDIAN \ + && LITTLE_ENDIAN) + bogus endian macros + #endif + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + # It does; now see whether it defined to BIG_ENDIAN or not. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + #include + +int +main () +{ +#if BYTE_ORDER != BIG_ENDIAN + not big endian + #endif + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_c_bigendian=yes +else + ac_cv_c_bigendian=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + fi + if test $ac_cv_c_bigendian = unknown; then + # See if defines _LITTLE_ENDIAN or _BIG_ENDIAN (e.g., Solaris). + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + +int +main () +{ +#if ! (defined _LITTLE_ENDIAN || defined _BIG_ENDIAN) + bogus endian macros + #endif + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + # It does; now see whether it defined to _BIG_ENDIAN or not. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + +int +main () +{ +#ifndef _BIG_ENDIAN + not big endian + #endif + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_c_bigendian=yes +else + ac_cv_c_bigendian=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + fi + if test $ac_cv_c_bigendian = unknown; then + # Compile a test program. + if test "$cross_compiling" = yes; then : + # Try to guess by grepping values from an object file. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +short int ascii_mm[] = + { 0x4249, 0x4765, 0x6E44, 0x6961, 0x6E53, 0x7953, 0 }; + short int ascii_ii[] = + { 0x694C, 0x5454, 0x656C, 0x6E45, 0x6944, 0x6E61, 0 }; + int use_ascii (int i) { + return ascii_mm[i] + ascii_ii[i]; + } + short int ebcdic_ii[] = + { 0x89D3, 0xE3E3, 0x8593, 0x95C5, 0x89C4, 0x9581, 0 }; + short int ebcdic_mm[] = + { 0xC2C9, 0xC785, 0x95C4, 0x8981, 0x95E2, 0xA8E2, 0 }; + int use_ebcdic (int i) { + return ebcdic_mm[i] + ebcdic_ii[i]; + } + extern int foo; + +int +main () +{ +return use_ascii (foo) == use_ebcdic (foo); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + if grep BIGenDianSyS conftest.$ac_objext >/dev/null; then + ac_cv_c_bigendian=yes + fi + if grep LiTTleEnDian conftest.$ac_objext >/dev/null ; then + if test "$ac_cv_c_bigendian" = unknown; then + ac_cv_c_bigendian=no + else + # finding both strings is unlikely to happen, but who knows? + ac_cv_c_bigendian=unknown + fi + fi +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +$ac_includes_default +int +main () +{ + + /* Are we little or big endian? From Harbison&Steele. */ + union + { + long int l; + char c[sizeof (long int)]; + } u; + u.l = 1; + return u.c[sizeof (long int) - 1] == 1; + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_run "$LINENO"; then : + ac_cv_c_bigendian=no +else + ac_cv_c_bigendian=yes +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ + conftest.$ac_objext conftest.beam conftest.$ac_ext +fi + + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_c_bigendian" >&5 +$as_echo "$ac_cv_c_bigendian" >&6; } + case $ac_cv_c_bigendian in #( + yes) + $as_echo "#define WORDS_BIGENDIAN 1" >>confdefs.h +;; #( + no) + ;; #( + universal) + +$as_echo "#define AC_APPLE_UNIVERSAL_BUILD 1" >>confdefs.h + + ;; #( + *) + as_fn_error $? "unknown endianness + presetting ac_cv_c_bigendian=no (or yes) will help" "$LINENO" 5 ;; + esac + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5 +$as_echo_n "checking for ANSI C header files... " >&6; } +if ${ac_cv_header_stdc+:} false; then : + $as_echo_n "(cached) " >&6 +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +#include +#include +#include + +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_header_stdc=yes +else + ac_cv_header_stdc=no +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + +if test $ac_cv_header_stdc = yes; then + # SunOS 4.x string.h does not declare mem*, contrary to ANSI. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "memchr" >/dev/null 2>&1; then : + +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + +_ACEOF +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "free" >/dev/null 2>&1; then : + +else + ac_cv_header_stdc=no +fi +rm -f conftest* + +fi + +if test $ac_cv_header_stdc = yes; then + # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. + if test "$cross_compiling" = yes; then : + : +else + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include +#include +#if ((' ' & 0x0FF) == 0x020) +# define ISLOWER(c) ('a' <= (c) && (c) <= 'z') +# define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) +#else +# define ISLOWER(c) \ + (('a' <= (c) && (c) <= 'i') \ + || ('j' <= (c) && (c) <= 'r') \ + || ('s' <= (c) && (c) <= 'z')) +# define TOUPPER(c) (ISLOWER(c) ? ((c) | 0x40) : (c)) +#endif + +#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) +int +main () +{ + int i; + for (i = 0; i < 256; i++) + if (XOR (islower (i), ISLOWER (i)) + || toupper (i) != TOUPPER (i)) + return 2; + return 0; +} +_ACEOF +if ac_fn_c_try_run "$LINENO"; then : + +else + ac_cv_header_stdc=no +fi +rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ + conftest.$ac_objext conftest.beam conftest.$ac_ext +fi + +fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_header_stdc" >&5 +$as_echo "$ac_cv_header_stdc" >&6; } +if test $ac_cv_header_stdc = yes; then + +$as_echo "#define STDC_HEADERS 1" >>confdefs.h + +fi + +# Check whether --enable-largefile was given. +if test "${enable_largefile+set}" = set; then : + enableval=$enable_largefile; +fi + +if test "$enable_largefile" != no; then + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for special C compiler options needed for large files" >&5 +$as_echo_n "checking for special C compiler options needed for large files... " >&6; } +if ${ac_cv_sys_largefile_CC+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_cv_sys_largefile_CC=no + if test "$GCC" != yes; then + ac_save_CC=$CC + while :; do + # IRIX 6.2 and later do not support large files by default, + # so use the C compiler's -n32 option if that helps. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + /* Check that off_t can represent 2**63 - 1 correctly. + We can't simply define LARGE_OFF_T to be 9223372036854775807, + since some C++ compilers masquerading as C compilers + incorrectly reject 9223372036854775807. */ +#define LARGE_OFF_T ((((off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31)) + int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721 + && LARGE_OFF_T % 2147483647 == 1) + ? 1 : -1]; +int +main () +{ + + ; + return 0; +} +_ACEOF + if ac_fn_c_try_compile "$LINENO"; then : + break +fi +rm -f core conftest.err conftest.$ac_objext + CC="$CC -n32" + if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_sys_largefile_CC=' -n32'; break +fi +rm -f core conftest.err conftest.$ac_objext + break + done + CC=$ac_save_CC + rm -f conftest.$ac_ext + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_largefile_CC" >&5 +$as_echo "$ac_cv_sys_largefile_CC" >&6; } + if test "$ac_cv_sys_largefile_CC" != no; then + CC=$CC$ac_cv_sys_largefile_CC + fi + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for _FILE_OFFSET_BITS value needed for large files" >&5 +$as_echo_n "checking for _FILE_OFFSET_BITS value needed for large files... " >&6; } +if ${ac_cv_sys_file_offset_bits+:} false; then : + $as_echo_n "(cached) " >&6 +else + while :; do + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + /* Check that off_t can represent 2**63 - 1 correctly. + We can't simply define LARGE_OFF_T to be 9223372036854775807, + since some C++ compilers masquerading as C compilers + incorrectly reject 9223372036854775807. */ +#define LARGE_OFF_T ((((off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31)) + int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721 + && LARGE_OFF_T % 2147483647 == 1) + ? 1 : -1]; +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_sys_file_offset_bits=no; break +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#define _FILE_OFFSET_BITS 64 +#include + /* Check that off_t can represent 2**63 - 1 correctly. + We can't simply define LARGE_OFF_T to be 9223372036854775807, + since some C++ compilers masquerading as C compilers + incorrectly reject 9223372036854775807. */ +#define LARGE_OFF_T ((((off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31)) + int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721 + && LARGE_OFF_T % 2147483647 == 1) + ? 1 : -1]; +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_sys_file_offset_bits=64; break +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_cv_sys_file_offset_bits=unknown + break +done +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_file_offset_bits" >&5 +$as_echo "$ac_cv_sys_file_offset_bits" >&6; } +case $ac_cv_sys_file_offset_bits in #( + no | unknown) ;; + *) +cat >>confdefs.h <<_ACEOF +#define _FILE_OFFSET_BITS $ac_cv_sys_file_offset_bits +_ACEOF +;; +esac +rm -rf conftest* + if test $ac_cv_sys_file_offset_bits = unknown; then + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for _LARGE_FILES value needed for large files" >&5 +$as_echo_n "checking for _LARGE_FILES value needed for large files... " >&6; } +if ${ac_cv_sys_large_files+:} false; then : + $as_echo_n "(cached) " >&6 +else + while :; do + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include + /* Check that off_t can represent 2**63 - 1 correctly. + We can't simply define LARGE_OFF_T to be 9223372036854775807, + since some C++ compilers masquerading as C compilers + incorrectly reject 9223372036854775807. */ +#define LARGE_OFF_T ((((off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31)) + int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721 + && LARGE_OFF_T % 2147483647 == 1) + ? 1 : -1]; +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_sys_large_files=no; break +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#define _LARGE_FILES 1 +#include + /* Check that off_t can represent 2**63 - 1 correctly. + We can't simply define LARGE_OFF_T to be 9223372036854775807, + since some C++ compilers masquerading as C compilers + incorrectly reject 9223372036854775807. */ +#define LARGE_OFF_T ((((off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31)) + int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721 + && LARGE_OFF_T % 2147483647 == 1) + ? 1 : -1]; +int +main () +{ + + ; + return 0; +} +_ACEOF +if ac_fn_c_try_compile "$LINENO"; then : + ac_cv_sys_large_files=1; break +fi +rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + ac_cv_sys_large_files=unknown + break +done +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_large_files" >&5 +$as_echo "$ac_cv_sys_large_files" >&6; } +case $ac_cv_sys_large_files in #( + no | unknown) ;; + *) +cat >>confdefs.h <<_ACEOF +#define _LARGE_FILES $ac_cv_sys_large_files +_ACEOF +;; +esac +rm -rf conftest* + fi + + +fi + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sin in -lm" >&5 +$as_echo_n "checking for sin in -lm... " >&6; } +if ${ac_cv_lib_m_sin+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lm $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char sin (); +int +main () +{ +return sin (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_m_sin=yes +else + ac_cv_lib_m_sin=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_m_sin" >&5 +$as_echo "$ac_cv_lib_m_sin" >&6; } +if test "x$ac_cv_lib_m_sin" = xyes; then : + cat >>confdefs.h <<_ACEOF +#define HAVE_LIBM 1 +_ACEOF + + LIBS="-lm $LIBS" + +fi + +for ac_func in log2f +do : + ac_fn_c_check_func "$LINENO" "log2f" "ac_cv_func_log2f" +if test "x$ac_cv_func_log2f" = xyes; then : + cat >>confdefs.h <<_ACEOF +#define HAVE_LOG2F 1 +_ACEOF + +fi +done + +for ac_prog in python2 python +do + # Extract the first word of "$ac_prog", so it can be a program name with args. +set dummy $ac_prog; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_PYTHON2+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$PYTHON2"; then + ac_cv_prog_PYTHON2="$PYTHON2" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_prog_PYTHON2="$ac_prog" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +PYTHON2=$ac_cv_prog_PYTHON2 +if test -n "$PYTHON2"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $PYTHON2" >&5 +$as_echo "$PYTHON2" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + test -n "$PYTHON2" && break +done + + +LIBVA_PACKAGE_VERSION=1.7.1 + + +LIBDRM_VERSION=2.4.52 + + + + + + + +if test "x$ac_cv_env_PKG_CONFIG_set" != "xset"; then + if test -n "$ac_tool_prefix"; then + # Extract the first word of "${ac_tool_prefix}pkg-config", so it can be a program name with args. +set dummy ${ac_tool_prefix}pkg-config; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_PKG_CONFIG+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $PKG_CONFIG in + [\\/]* | ?:[\\/]*) + ac_cv_path_PKG_CONFIG="$PKG_CONFIG" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_PKG_CONFIG="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + + ;; +esac +fi +PKG_CONFIG=$ac_cv_path_PKG_CONFIG +if test -n "$PKG_CONFIG"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $PKG_CONFIG" >&5 +$as_echo "$PKG_CONFIG" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +fi +if test -z "$ac_cv_path_PKG_CONFIG"; then + ac_pt_PKG_CONFIG=$PKG_CONFIG + # Extract the first word of "pkg-config", so it can be a program name with args. +set dummy pkg-config; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_ac_pt_PKG_CONFIG+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $ac_pt_PKG_CONFIG in + [\\/]* | ?:[\\/]*) + ac_cv_path_ac_pt_PKG_CONFIG="$ac_pt_PKG_CONFIG" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_ac_pt_PKG_CONFIG="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + + ;; +esac +fi +ac_pt_PKG_CONFIG=$ac_cv_path_ac_pt_PKG_CONFIG +if test -n "$ac_pt_PKG_CONFIG"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_pt_PKG_CONFIG" >&5 +$as_echo "$ac_pt_PKG_CONFIG" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + if test "x$ac_pt_PKG_CONFIG" = x; then + PKG_CONFIG="" + else + case $cross_compiling:$ac_tool_warned in +yes:) +{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 +$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} +ac_tool_warned=yes ;; +esac + PKG_CONFIG=$ac_pt_PKG_CONFIG + fi +else + PKG_CONFIG="$ac_cv_path_PKG_CONFIG" +fi + +fi +if test -n "$PKG_CONFIG"; then + _pkg_min_version=0.9.0 + { $as_echo "$as_me:${as_lineno-$LINENO}: checking pkg-config is at least version $_pkg_min_version" >&5 +$as_echo_n "checking pkg-config is at least version $_pkg_min_version... " >&6; } + if $PKG_CONFIG --atleast-pkgconfig-version $_pkg_min_version; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + PKG_CONFIG="" + fi +fi + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for DRM" >&5 +$as_echo_n "checking for DRM... " >&6; } + +if test -n "$DRM_CFLAGS"; then + pkg_cv_DRM_CFLAGS="$DRM_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= \$LIBDRM_VERSION\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm >= $LIBDRM_VERSION") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_DRM_CFLAGS=`$PKG_CONFIG --cflags "libdrm >= $LIBDRM_VERSION" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$DRM_LIBS"; then + pkg_cv_DRM_LIBS="$DRM_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm >= \$LIBDRM_VERSION\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm >= $LIBDRM_VERSION") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_DRM_LIBS=`$PKG_CONFIG --libs "libdrm >= $LIBDRM_VERSION" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + DRM_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm >= $LIBDRM_VERSION" 2>&1` + else + DRM_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm >= $LIBDRM_VERSION" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$DRM_PKG_ERRORS" >&5 + + as_fn_error $? "Package requirements (libdrm >= $LIBDRM_VERSION) were not met: + +$DRM_PKG_ERRORS + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables DRM_CFLAGS +and DRM_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. + +Alternatively, you may set the environment variables DRM_CFLAGS +and DRM_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } +else + DRM_CFLAGS=$pkg_cv_DRM_CFLAGS + DRM_LIBS=$pkg_cv_DRM_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + +fi + + + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for GEN4ASM" >&5 +$as_echo_n "checking for GEN4ASM... " >&6; } + +if test -n "$GEN4ASM_CFLAGS"; then + pkg_cv_GEN4ASM_CFLAGS="$GEN4ASM_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"intel-gen4asm >= 1.9\""; } >&5 + ($PKG_CONFIG --exists --print-errors "intel-gen4asm >= 1.9") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_GEN4ASM_CFLAGS=`$PKG_CONFIG --cflags "intel-gen4asm >= 1.9" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$GEN4ASM_LIBS"; then + pkg_cv_GEN4ASM_LIBS="$GEN4ASM_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"intel-gen4asm >= 1.9\""; } >&5 + ($PKG_CONFIG --exists --print-errors "intel-gen4asm >= 1.9") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_GEN4ASM_LIBS=`$PKG_CONFIG --libs "intel-gen4asm >= 1.9" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + GEN4ASM_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "intel-gen4asm >= 1.9" 2>&1` + else + GEN4ASM_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "intel-gen4asm >= 1.9" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$GEN4ASM_PKG_ERRORS" >&5 + + gen4asm=no +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + gen4asm=no +else + GEN4ASM_CFLAGS=$pkg_cv_GEN4ASM_CFLAGS + GEN4ASM_LIBS=$pkg_cv_GEN4ASM_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + gen4asm=yes +fi +# Extract the first word of "intel-gen4asm", so it can be a program name with args. +set dummy intel-gen4asm; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_GEN4ASM+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $GEN4ASM in + [\\/]* | ?:[\\/]*) + ac_cv_path_GEN4ASM="$GEN4ASM" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_GEN4ASM="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + + ;; +esac +fi +GEN4ASM=$ac_cv_path_GEN4ASM +if test -n "$GEN4ASM"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GEN4ASM" >&5 +$as_echo "$GEN4ASM" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + +if test "x$GEN4ASM" = "x" ; then : + if false; then + HAVE_GEN4ASM_TRUE= + HAVE_GEN4ASM_FALSE='#' +else + HAVE_GEN4ASM_TRUE='#' + HAVE_GEN4ASM_FALSE= +fi + +else + if test x$gen4asm = xyes; then + HAVE_GEN4ASM_TRUE= + HAVE_GEN4ASM_FALSE='#' +else + HAVE_GEN4ASM_TRUE='#' + HAVE_GEN4ASM_FALSE= +fi + +fi + + +# Extract the first word of "git", so it can be a program name with args. +set dummy git; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_GIT+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $GIT in + [\\/]* | ?:[\\/]*) + ac_cv_path_GIT="$GIT" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_GIT="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + + ;; +esac +fi +GIT=$ac_cv_path_GIT +if test -n "$GIT"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GIT" >&5 +$as_echo "$GIT" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + if test -n "$GIT"; then + HAVE_GIT_TRUE= + HAVE_GIT_FALSE='#' +else + HAVE_GIT_TRUE='#' + HAVE_GIT_FALSE= +fi + + + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBVA_DEPS" >&5 +$as_echo_n "checking for LIBVA_DEPS... " >&6; } + +if test -n "$LIBVA_DEPS_CFLAGS"; then + pkg_cv_LIBVA_DEPS_CFLAGS="$LIBVA_DEPS_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva >= 0.39.2\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva >= 0.39.2") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_DEPS_CFLAGS=`$PKG_CONFIG --cflags "libva >= 0.39.2" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$LIBVA_DEPS_LIBS"; then + pkg_cv_LIBVA_DEPS_LIBS="$LIBVA_DEPS_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva >= 0.39.2\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva >= 0.39.2") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_DEPS_LIBS=`$PKG_CONFIG --libs "libva >= 0.39.2" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + LIBVA_DEPS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libva >= 0.39.2" 2>&1` + else + LIBVA_DEPS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libva >= 0.39.2" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$LIBVA_DEPS_PKG_ERRORS" >&5 + + as_fn_error $? "Package requirements (libva >= 0.39.2) were not met: + +$LIBVA_DEPS_PKG_ERRORS + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables LIBVA_DEPS_CFLAGS +and LIBVA_DEPS_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. + +Alternatively, you may set the environment variables LIBVA_DEPS_CFLAGS +and LIBVA_DEPS_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } +else + LIBVA_DEPS_CFLAGS=$pkg_cv_LIBVA_DEPS_CFLAGS + LIBVA_DEPS_LIBS=$pkg_cv_LIBVA_DEPS_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + +fi + +USE_DRM="$enable_drm" +if test "$USE_DRM" = "yes"; then + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBVA_DRM_DEPS" >&5 +$as_echo_n "checking for LIBVA_DRM_DEPS... " >&6; } + +if test -n "$LIBVA_DRM_DEPS_CFLAGS"; then + pkg_cv_LIBVA_DRM_DEPS_CFLAGS="$LIBVA_DRM_DEPS_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva-drm\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva-drm") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_DRM_DEPS_CFLAGS=`$PKG_CONFIG --cflags "libva-drm" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$LIBVA_DRM_DEPS_LIBS"; then + pkg_cv_LIBVA_DRM_DEPS_LIBS="$LIBVA_DRM_DEPS_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva-drm\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva-drm") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_DRM_DEPS_LIBS=`$PKG_CONFIG --libs "libva-drm" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + LIBVA_DRM_DEPS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libva-drm" 2>&1` + else + LIBVA_DRM_DEPS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libva-drm" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$LIBVA_DRM_DEPS_PKG_ERRORS" >&5 + + USE_DRM="no" +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + USE_DRM="no" +else + LIBVA_DRM_DEPS_CFLAGS=$pkg_cv_LIBVA_DRM_DEPS_CFLAGS + LIBVA_DRM_DEPS_LIBS=$pkg_cv_LIBVA_DRM_DEPS_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + +$as_echo "#define HAVE_VA_DRM 1" >>confdefs.h + +fi + + # Check for + if test "$USE_DRM" = "yes"; then + saved_CPPFLAGS="$CPPFLAGS" + CPPFLAGS="$CPPFLAGS $DRM_CFLAGS" + for ac_header in drm_fourcc.h +do : + ac_fn_c_check_header_mongrel "$LINENO" "drm_fourcc.h" "ac_cv_header_drm_fourcc_h" "$ac_includes_default" +if test "x$ac_cv_header_drm_fourcc_h" = xyes; then : + cat >>confdefs.h <<_ACEOF +#define HAVE_DRM_FOURCC_H 1 +_ACEOF + : +else + USE_DRM="no" +fi + +done + + CPPFLAGS="$saved_CPPFLAGS" + fi +fi + if test "$USE_DRM" = "yes"; then + USE_DRM_TRUE= + USE_DRM_FALSE='#' +else + USE_DRM_TRUE='#' + USE_DRM_FALSE= +fi + + +if test "$enable_hybrid_codec" = "yes"; then + +$as_echo "#define HAVE_HYBRID_CODEC 1" >>confdefs.h + +fi + +VA_VERSION=`$PKG_CONFIG --modversion libva` +VA_MAJOR_VERSION=`echo "$VA_VERSION" | cut -d'.' -f1` +VA_MINOR_VERSION=`echo "$VA_VERSION" | cut -d'.' -f2` +VA_MICRO_VERSION=`echo "$VA_VERSION" | cut -d'.' -f3` +VA_VERSION_STR="$VA_VERSION" + +va_full_version_int=`expr ${VA_MAJOR_VERSION:-0} "*" 1000000 + \ + ${VA_MINOR_VERSION:-0} "*" 10000 + \ + ${VA_MICRO_VERSION:-0} "*" 100 + \ + 0` +VA_DRIVER_INIT_FUNC="__vaDriverInit_${VA_MAJOR_VERSION}_${VA_MINOR_VERSION}" + +cat >>confdefs.h <<_ACEOF +#define VA_DRIVER_INIT_FUNC $VA_DRIVER_INIT_FUNC +_ACEOF + + +USE_X11="$enable_x11" +if test "$USE_X11" = "yes"; then + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBVA_X11_DEPS" >&5 +$as_echo_n "checking for LIBVA_X11_DEPS... " >&6; } + +if test -n "$LIBVA_X11_DEPS_CFLAGS"; then + pkg_cv_LIBVA_X11_DEPS_CFLAGS="$LIBVA_X11_DEPS_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva-x11\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva-x11") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_X11_DEPS_CFLAGS=`$PKG_CONFIG --cflags "libva-x11" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$LIBVA_X11_DEPS_LIBS"; then + pkg_cv_LIBVA_X11_DEPS_LIBS="$LIBVA_X11_DEPS_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva-x11\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva-x11") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_X11_DEPS_LIBS=`$PKG_CONFIG --libs "libva-x11" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + LIBVA_X11_DEPS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libva-x11" 2>&1` + else + LIBVA_X11_DEPS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libva-x11" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$LIBVA_X11_DEPS_PKG_ERRORS" >&5 + + USE_X11="no" +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + USE_X11="no" +else + LIBVA_X11_DEPS_CFLAGS=$pkg_cv_LIBVA_X11_DEPS_CFLAGS + LIBVA_X11_DEPS_LIBS=$pkg_cv_LIBVA_X11_DEPS_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + +$as_echo "#define HAVE_VA_X11 1" >>confdefs.h + +fi +fi + if test "$USE_X11" = "yes"; then + USE_X11_TRUE= + USE_X11_FALSE='#' +else + USE_X11_TRUE='#' + USE_X11_FALSE= +fi + + + +if test -z "$LIBVA_DRIVERS_PATH"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for VA drivers path" >&5 +$as_echo_n "checking for VA drivers path... " >&6; } + LIBVA_DRIVERS_PATH=`$PKG_CONFIG libva --variable driverdir` +fi +if test -z "$LIBVA_DRIVERS_PATH"; then + LIBVA_DRIVERS_PATH="${libdir}/xorg/modules/drivers" +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $LIBVA_DRIVERS_PATH" >&5 +$as_echo "$LIBVA_DRIVERS_PATH" >&6; } + + +# Check for EGL +if test "$enable_wayland" = "yes"; then + enable_egl="yes" +fi + +USE_EGL="no" +if test "$enable_egl" = "yes"; then + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for EGL" >&5 +$as_echo_n "checking for EGL... " >&6; } + +if test -n "$EGL_CFLAGS"; then + pkg_cv_EGL_CFLAGS="$EGL_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"egl\""; } >&5 + ($PKG_CONFIG --exists --print-errors "egl") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_EGL_CFLAGS=`$PKG_CONFIG --cflags "egl" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$EGL_LIBS"; then + pkg_cv_EGL_LIBS="$EGL_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"egl\""; } >&5 + ($PKG_CONFIG --exists --print-errors "egl") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_EGL_LIBS=`$PKG_CONFIG --libs "egl" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + EGL_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "egl" 2>&1` + else + EGL_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "egl" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$EGL_PKG_ERRORS" >&5 + + USE_EGL="no" +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + USE_EGL="no" +else + EGL_CFLAGS=$pkg_cv_EGL_CFLAGS + EGL_LIBS=$pkg_cv_EGL_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + USE_EGL="yes" +fi + saved_CPPFLAGS="$CPPFLAGS" + saved_LIBS="$LIBS" + CPPFLAGS="$CPPFLAGS $EGL_CFLAGS" + LIBS="$LIBS $EGL_LIBS" + for ac_header in EGL/egl.h +do : + ac_fn_c_check_header_mongrel "$LINENO" "EGL/egl.h" "ac_cv_header_EGL_egl_h" "$ac_includes_default" +if test "x$ac_cv_header_EGL_egl_h" = xyes; then : + cat >>confdefs.h <<_ACEOF +#define HAVE_EGL_EGL_H 1 +_ACEOF + : +else + USE_EGL="no" +fi + +done + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for eglGetDisplay in -lEGL" >&5 +$as_echo_n "checking for eglGetDisplay in -lEGL... " >&6; } +if ${ac_cv_lib_EGL_eglGetDisplay+:} false; then : + $as_echo_n "(cached) " >&6 +else + ac_check_lib_save_LIBS=$LIBS +LIBS="-lEGL $LIBS" +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ + +/* Override any GCC internal prototype to avoid an error. + Use char because int might match the return type of a GCC + builtin and then its argument prototype would still apply. */ +#ifdef __cplusplus +extern "C" +#endif +char eglGetDisplay (); +int +main () +{ +return eglGetDisplay (); + ; + return 0; +} +_ACEOF +if ac_fn_c_try_link "$LINENO"; then : + ac_cv_lib_EGL_eglGetDisplay=yes +else + ac_cv_lib_EGL_eglGetDisplay=no +fi +rm -f core conftest.err conftest.$ac_objext \ + conftest$ac_exeext conftest.$ac_ext +LIBS=$ac_check_lib_save_LIBS +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_EGL_eglGetDisplay" >&5 +$as_echo "$ac_cv_lib_EGL_eglGetDisplay" >&6; } +if test "x$ac_cv_lib_EGL_eglGetDisplay" = xyes; then : + : +else + USE_EGL="no" +fi + + CPPFLAGS="$saved_CPPFLAGS" + LIBS="$saved_LIBS" +fi + if test "$USE_EGL" = "yes"; then + USE_EGL_TRUE= + USE_EGL_FALSE='#' +else + USE_EGL_TRUE='#' + USE_EGL_FALSE= +fi + + +# Check for Wayland +USE_WAYLAND="no" +if test "$enable_wayland" = "yes"; then + +pkg_failed=no +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for LIBVA_WAYLAND_DEPS" >&5 +$as_echo_n "checking for LIBVA_WAYLAND_DEPS... " >&6; } + +if test -n "$LIBVA_WAYLAND_DEPS_CFLAGS"; then + pkg_cv_LIBVA_WAYLAND_DEPS_CFLAGS="$LIBVA_WAYLAND_DEPS_CFLAGS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva-wayland\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva-wayland") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_WAYLAND_DEPS_CFLAGS=`$PKG_CONFIG --cflags "libva-wayland" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi +if test -n "$LIBVA_WAYLAND_DEPS_LIBS"; then + pkg_cv_LIBVA_WAYLAND_DEPS_LIBS="$LIBVA_WAYLAND_DEPS_LIBS" + elif test -n "$PKG_CONFIG"; then + if test -n "$PKG_CONFIG" && \ + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva-wayland\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva-wayland") 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; then + pkg_cv_LIBVA_WAYLAND_DEPS_LIBS=`$PKG_CONFIG --libs "libva-wayland" 2>/dev/null` + test "x$?" != "x0" && pkg_failed=yes +else + pkg_failed=yes +fi + else + pkg_failed=untried +fi + + + +if test $pkg_failed = yes; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + +if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then + _pkg_short_errors_supported=yes +else + _pkg_short_errors_supported=no +fi + if test $_pkg_short_errors_supported = yes; then + LIBVA_WAYLAND_DEPS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libva-wayland" 2>&1` + else + LIBVA_WAYLAND_DEPS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libva-wayland" 2>&1` + fi + # Put the nasty error message in config.log where it belongs + echo "$LIBVA_WAYLAND_DEPS_PKG_ERRORS" >&5 + + : +elif test $pkg_failed = untried; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } + : +else + LIBVA_WAYLAND_DEPS_CFLAGS=$pkg_cv_LIBVA_WAYLAND_DEPS_CFLAGS + LIBVA_WAYLAND_DEPS_LIBS=$pkg_cv_LIBVA_WAYLAND_DEPS_LIBS + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +$as_echo "yes" >&6; } + USE_WAYLAND="yes" +fi + + if test "$USE_WAYLAND" = "yes"; then + + WAYLAND_PREFIX=`$PKG_CONFIG --variable=prefix wayland-client` + # Extract the first word of "wayland-scanner", so it can be a program name with args. +set dummy wayland-scanner; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_path_WAYLAND_SCANNER+:} false; then : + $as_echo_n "(cached) " >&6 +else + case $WAYLAND_SCANNER in + [\\/]* | ?:[\\/]*) + ac_cv_path_WAYLAND_SCANNER="$WAYLAND_SCANNER" # Let the user override the test with a path. + ;; + *) + as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in ${WAYLAND_PREFIX}/bin$PATH_SEPARATOR$PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then + ac_cv_path_WAYLAND_SCANNER="$as_dir/$ac_word$ac_exec_ext" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + + ;; +esac +fi +WAYLAND_SCANNER=$ac_cv_path_WAYLAND_SCANNER +if test -n "$WAYLAND_SCANNER"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $WAYLAND_SCANNER" >&5 +$as_echo "$WAYLAND_SCANNER" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + + +$as_echo "#define HAVE_VA_WAYLAND 1" >>confdefs.h + + fi +fi + if test "$USE_WAYLAND" = "yes"; then + USE_WAYLAND_TRUE= + USE_WAYLAND_FALSE='#' +else + USE_WAYLAND_TRUE='#' + USE_WAYLAND_FALSE= +fi + + +ac_config_files="$ac_config_files Makefile debian.upstream/Makefile src/Makefile src/shaders/Makefile src/shaders/h264/Makefile src/shaders/h264/ildb/Makefile src/shaders/h264/mc/Makefile src/shaders/mpeg2/Makefile src/shaders/mpeg2/vld/Makefile src/shaders/post_processing/Makefile src/shaders/post_processing/gen5_6/Makefile src/shaders/post_processing/gen7/Makefile src/shaders/post_processing/gen75/Makefile src/shaders/post_processing/gen8/Makefile src/shaders/post_processing/gen9/Makefile src/shaders/render/Makefile src/shaders/utils/Makefile src/shaders/vme/Makefile" + +cat >confcache <<\_ACEOF +# This file is a shell script that caches the results of configure +# tests run on this system so they can be shared between configure +# scripts and configure runs, see configure's option --config-cache. +# It is not useful on other systems. If it contains results you don't +# want to keep, you may remove or edit it. +# +# config.status only pays attention to the cache file if you give it +# the --recheck option to rerun configure. +# +# `ac_cv_env_foo' variables (set or unset) will be overridden when +# loading this file, other *unset* `ac_cv_foo' will be assigned the +# following values. + +_ACEOF + +# The following way of writing the cache mishandles newlines in values, +# but we know of no workaround that is simple, portable, and efficient. +# So, we kill variables containing newlines. +# Ultrix sh set writes to stderr and can't be redirected directly, +# and sets the high bit in the cache file unless we assign to the vars. +( + for ac_var in `(set) 2>&1 | sed -n 's/^\([a-zA-Z_][a-zA-Z0-9_]*\)=.*/\1/p'`; do + eval ac_val=\$$ac_var + case $ac_val in #( + *${as_nl}*) + case $ac_var in #( + *_cv_*) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: cache variable $ac_var contains a newline" >&5 +$as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;; + esac + case $ac_var in #( + _ | IFS | as_nl) ;; #( + BASH_ARGV | BASH_SOURCE) eval $ac_var= ;; #( + *) { eval $ac_var=; unset $ac_var;} ;; + esac ;; + esac + done + + (set) 2>&1 | + case $as_nl`(ac_space=' '; set) 2>&1` in #( + *${as_nl}ac_space=\ *) + # `set' does not quote correctly, so add quotes: double-quote + # substitution turns \\\\ into \\, and sed turns \\ into \. + sed -n \ + "s/'/'\\\\''/g; + s/^\\([_$as_cr_alnum]*_cv_[_$as_cr_alnum]*\\)=\\(.*\\)/\\1='\\2'/p" + ;; #( + *) + # `set' quotes correctly as required by POSIX, so do not add quotes. + sed -n "/^[_$as_cr_alnum]*_cv_[_$as_cr_alnum]*=/p" + ;; + esac | + sort +) | + sed ' + /^ac_cv_env_/b end + t clear + :clear + s/^\([^=]*\)=\(.*[{}].*\)$/test "${\1+set}" = set || &/ + t end + s/^\([^=]*\)=\(.*\)$/\1=${\1=\2}/ + :end' >>confcache +if diff "$cache_file" confcache >/dev/null 2>&1; then :; else + if test -w "$cache_file"; then + if test "x$cache_file" != "x/dev/null"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: updating cache $cache_file" >&5 +$as_echo "$as_me: updating cache $cache_file" >&6;} + if test ! -f "$cache_file" || test -h "$cache_file"; then + cat confcache >"$cache_file" + else + case $cache_file in #( + */* | ?:*) + mv -f confcache "$cache_file"$$ && + mv -f "$cache_file"$$ "$cache_file" ;; #( + *) + mv -f confcache "$cache_file" ;; + esac + fi + fi + else + { $as_echo "$as_me:${as_lineno-$LINENO}: not updating unwritable cache $cache_file" >&5 +$as_echo "$as_me: not updating unwritable cache $cache_file" >&6;} + fi +fi +rm -f confcache + +test "x$prefix" = xNONE && prefix=$ac_default_prefix +# Let make expand exec_prefix. +test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' + +DEFS=-DHAVE_CONFIG_H + +ac_libobjs= +ac_ltlibobjs= +U= +for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue + # 1. Remove the extension, and $U if already installed. + ac_script='s/\$U\././;s/\.o$//;s/\.obj$//' + ac_i=`$as_echo "$ac_i" | sed "$ac_script"` + # 2. Prepend LIBOBJDIR. When used with automake>=1.10 LIBOBJDIR + # will be set to the directory where LIBOBJS objects are built. + as_fn_append ac_libobjs " \${LIBOBJDIR}$ac_i\$U.$ac_objext" + as_fn_append ac_ltlibobjs " \${LIBOBJDIR}$ac_i"'$U.lo' +done +LIBOBJS=$ac_libobjs + +LTLIBOBJS=$ac_ltlibobjs + + +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking that generated files are newer than configure" >&5 +$as_echo_n "checking that generated files are newer than configure... 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"$LINENO" 5 +fi + +if test -z "${HAVE_GEN4ASM_TRUE}" && test -z "${HAVE_GEN4ASM_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GEN4ASM\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${HAVE_GEN4ASM_TRUE}" && test -z "${HAVE_GEN4ASM_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GEN4ASM\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${HAVE_GIT_TRUE}" && test -z "${HAVE_GIT_FALSE}"; then + as_fn_error $? "conditional \"HAVE_GIT\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${USE_DRM_TRUE}" && test -z "${USE_DRM_FALSE}"; then + as_fn_error $? "conditional \"USE_DRM\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${USE_X11_TRUE}" && test -z "${USE_X11_FALSE}"; then + as_fn_error $? "conditional \"USE_X11\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${USE_EGL_TRUE}" && test -z "${USE_EGL_FALSE}"; then + as_fn_error $? "conditional \"USE_EGL\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi +if test -z "${USE_WAYLAND_TRUE}" && test -z "${USE_WAYLAND_FALSE}"; then + as_fn_error $? "conditional \"USE_WAYLAND\" was never defined. +Usually this means the macro was only invoked conditionally." "$LINENO" 5 +fi + +: "${CONFIG_STATUS=./config.status}" +ac_write_fail=0 +ac_clean_files_save=$ac_clean_files +ac_clean_files="$ac_clean_files $CONFIG_STATUS" +{ $as_echo "$as_me:${as_lineno-$LINENO}: creating $CONFIG_STATUS" >&5 +$as_echo "$as_me: creating $CONFIG_STATUS" >&6;} +as_write_fail=0 +cat >$CONFIG_STATUS <<_ASEOF || as_write_fail=1 +#! $SHELL +# Generated by $as_me. +# Run this file to recreate the current configuration. +# Compiler output produced by configure, useful for debugging +# configure, is in config.log if it exists. + +debug=false +ac_cs_recheck=false +ac_cs_silent=false + +SHELL=\${CONFIG_SHELL-$SHELL} +export SHELL +_ASEOF +cat >>$CONFIG_STATUS <<\_ASEOF || as_write_fail=1 +## -------------------- ## +## M4sh Initialization. ## +## -------------------- ## + +# Be more Bourne compatible +DUALCASE=1; export DUALCASE # for MKS sh +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : + emulate sh + NULLCMD=: + # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in #( + *posix*) : + set -o posix ;; #( + *) : + ;; +esac +fi + + +as_nl=' +' +export as_nl +# Printing a long string crashes Solaris 7 /usr/bin/printf. +as_echo='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\' +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo +as_echo=$as_echo$as_echo$as_echo$as_echo$as_echo$as_echo +# Prefer a ksh shell builtin over an external printf program on Solaris, +# but without wasting forks for bash or zsh. +if test -z "$BASH_VERSION$ZSH_VERSION" \ + && (test "X`print -r -- $as_echo`" = "X$as_echo") 2>/dev/null; then + as_echo='print -r --' + as_echo_n='print -rn --' +elif (test "X`printf %s $as_echo`" = "X$as_echo") 2>/dev/null; then + as_echo='printf %s\n' + as_echo_n='printf %s' +else + if test "X`(/usr/ucb/echo -n -n $as_echo) 2>/dev/null`" = "X-n $as_echo"; then + as_echo_body='eval /usr/ucb/echo -n "$1$as_nl"' + as_echo_n='/usr/ucb/echo -n' + else + as_echo_body='eval expr "X$1" : "X\\(.*\\)"' + as_echo_n_body='eval + arg=$1; + case $arg in #( + *"$as_nl"*) + expr "X$arg" : "X\\(.*\\)$as_nl"; + arg=`expr "X$arg" : ".*$as_nl\\(.*\\)"`;; + esac; + expr "X$arg" : "X\\(.*\\)" | tr -d "$as_nl" + ' + export as_echo_n_body + as_echo_n='sh -c $as_echo_n_body as_echo' + fi + export as_echo_body + as_echo='sh -c $as_echo_body as_echo' +fi + +# The user is always right. +if test "${PATH_SEPARATOR+set}" != set; then + PATH_SEPARATOR=: + (PATH='/bin;/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 && { + (PATH='/bin:/bin'; FPATH=$PATH; sh -c :) >/dev/null 2>&1 || + PATH_SEPARATOR=';' + } +fi + + +# IFS +# We need space, tab and new line, in precisely that order. Quoting is +# there to prevent editors from complaining about space-tab. +# (If _AS_PATH_WALK were called with IFS unset, it would disable word +# splitting by setting IFS to empty value.) +IFS=" "" $as_nl" + +# Find who we are. Look in the path if we contain no directory separator. +as_myself= +case $0 in #(( + *[\\/]* ) as_myself=$0 ;; + *) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + test -r "$as_dir/$0" && as_myself=$as_dir/$0 && break + done +IFS=$as_save_IFS + + ;; +esac +# We did not find ourselves, most probably we were run as `sh COMMAND' +# in which case we are not to be found in the path. +if test "x$as_myself" = x; then + as_myself=$0 +fi +if test ! -f "$as_myself"; then + $as_echo "$as_myself: error: cannot find myself; rerun with an absolute file name" >&2 + exit 1 +fi + +# Unset variables that we do not need and which cause bugs (e.g. in +# pre-3.0 UWIN ksh). But do not cause bugs in bash 2.01; the "|| exit 1" +# suppresses any "Segmentation fault" message there. '((' could +# trigger a bug in pdksh 5.2.14. +for as_var in BASH_ENV ENV MAIL MAILPATH +do eval test x\${$as_var+set} = xset \ + && ( (unset $as_var) || exit 1) >/dev/null 2>&1 && unset $as_var || : +done +PS1='$ ' +PS2='> ' +PS4='+ ' + +# NLS nuisances. +LC_ALL=C +export LC_ALL +LANGUAGE=C +export LANGUAGE + +# CDPATH. +(unset CDPATH) >/dev/null 2>&1 && unset CDPATH + + +# as_fn_error STATUS ERROR [LINENO LOG_FD] +# ---------------------------------------- +# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are +# provided, also output the error to LOG_FD, referencing LINENO. Then exit the +# script with STATUS, using 1 if that was 0. +as_fn_error () +{ + as_status=$1; test $as_status -eq 0 && as_status=1 + if test "$4"; then + as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack + $as_echo "$as_me:${as_lineno-$LINENO}: error: $2" >&$4 + fi + $as_echo "$as_me: error: $2" >&2 + as_fn_exit $as_status +} # as_fn_error + + +# as_fn_set_status STATUS +# ----------------------- +# Set $? to STATUS, without forking. +as_fn_set_status () +{ + return $1 +} # as_fn_set_status + +# as_fn_exit STATUS +# ----------------- +# Exit the shell with STATUS, even in a "trap 0" or "set -e" context. +as_fn_exit () +{ + set +e + as_fn_set_status $1 + exit $1 +} # as_fn_exit + +# as_fn_unset VAR +# --------------- +# Portably unset VAR. +as_fn_unset () +{ + { eval $1=; unset $1;} +} +as_unset=as_fn_unset +# as_fn_append VAR VALUE +# ---------------------- +# Append the text in VALUE to the end of the definition contained in VAR. Take +# advantage of any shell optimizations that allow amortized linear growth over +# repeated appends, instead of the typical quadratic growth present in naive +# implementations. +if (eval "as_var=1; as_var+=2; test x\$as_var = x12") 2>/dev/null; then : + eval 'as_fn_append () + { + eval $1+=\$2 + }' +else + as_fn_append () + { + eval $1=\$$1\$2 + } +fi # as_fn_append + +# as_fn_arith ARG... +# ------------------ +# Perform arithmetic evaluation on the ARGs, and store the result in the +# global $as_val. Take advantage of shells that can avoid forks. The arguments +# must be portable across $(()) and expr. +if (eval "test \$(( 1 + 1 )) = 2") 2>/dev/null; then : + eval 'as_fn_arith () + { + as_val=$(( $* )) + }' +else + as_fn_arith () + { + as_val=`expr "$@" || test $? -eq 1` + } +fi # as_fn_arith + + +if expr a : '\(a\)' >/dev/null 2>&1 && + test "X`expr 00001 : '.*\(...\)'`" = X001; then + as_expr=expr +else + as_expr=false +fi + +if (basename -- /) >/dev/null 2>&1 && test "X`basename -- / 2>&1`" = "X/"; then + as_basename=basename +else + as_basename=false +fi + +if (as_dir=`dirname -- /` && test "X$as_dir" = X/) >/dev/null 2>&1; then + as_dirname=dirname +else + as_dirname=false +fi + +as_me=`$as_basename -- "$0" || +$as_expr X/"$0" : '.*/\([^/][^/]*\)/*$' \| \ + X"$0" : 'X\(//\)$' \| \ + X"$0" : 'X\(/\)' \| . 2>/dev/null || +$as_echo X/"$0" | + sed '/^.*\/\([^/][^/]*\)\/*$/{ + s//\1/ + q + } + /^X\/\(\/\/\)$/{ + s//\1/ + q + } + /^X\/\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + +# Avoid depending upon Character Ranges. +as_cr_letters='abcdefghijklmnopqrstuvwxyz' +as_cr_LETTERS='ABCDEFGHIJKLMNOPQRSTUVWXYZ' +as_cr_Letters=$as_cr_letters$as_cr_LETTERS +as_cr_digits='0123456789' +as_cr_alnum=$as_cr_Letters$as_cr_digits + +ECHO_C= ECHO_N= ECHO_T= +case `echo -n x` in #((((( +-n*) + case `echo 'xy\c'` in + *c*) ECHO_T=' ';; # ECHO_T is single tab character. + xy) ECHO_C='\c';; + *) echo `echo ksh88 bug on AIX 6.1` > /dev/null + ECHO_T=' ';; + esac;; +*) + ECHO_N='-n';; +esac + +rm -f conf$$ conf$$.exe conf$$.file +if test -d conf$$.dir; then + rm -f conf$$.dir/conf$$.file +else + rm -f conf$$.dir + mkdir conf$$.dir 2>/dev/null +fi +if (echo >conf$$.file) 2>/dev/null; then + if ln -s conf$$.file conf$$ 2>/dev/null; then + as_ln_s='ln -s' + # ... but there are two gotchas: + # 1) On MSYS, both `ln -s file dir' and `ln file dir' fail. + # 2) DJGPP < 2.04 has no symlinks; `ln -s' creates a wrapper executable. + # In both cases, we have to default to `cp -pR'. + ln -s conf$$.file conf$$.dir 2>/dev/null && test ! -f conf$$.exe || + as_ln_s='cp -pR' + elif ln conf$$.file conf$$ 2>/dev/null; then + as_ln_s=ln + else + as_ln_s='cp -pR' + fi +else + as_ln_s='cp -pR' +fi +rm -f conf$$ conf$$.exe conf$$.dir/conf$$.file conf$$.file +rmdir conf$$.dir 2>/dev/null + + +# as_fn_mkdir_p +# ------------- +# Create "$as_dir" as a directory, including parents if necessary. +as_fn_mkdir_p () +{ + + case $as_dir in #( + -*) as_dir=./$as_dir;; + esac + test -d "$as_dir" || eval $as_mkdir_p || { + as_dirs= + while :; do + case $as_dir in #( + *\'*) as_qdir=`$as_echo "$as_dir" | sed "s/'/'\\\\\\\\''/g"`;; #'( + *) as_qdir=$as_dir;; + esac + as_dirs="'$as_qdir' $as_dirs" + as_dir=`$as_dirname -- "$as_dir" || +$as_expr X"$as_dir" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$as_dir" : 'X\(//\)[^/]' \| \ + X"$as_dir" : 'X\(//\)$' \| \ + X"$as_dir" : 'X\(/\)' \| . 2>/dev/null || +$as_echo X"$as_dir" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q'` + test -d "$as_dir" && break + done + test -z "$as_dirs" || eval "mkdir $as_dirs" + } || test -d "$as_dir" || as_fn_error $? "cannot create directory $as_dir" + + +} # as_fn_mkdir_p +if mkdir -p . 2>/dev/null; then + as_mkdir_p='mkdir -p "$as_dir"' +else + test -d ./-p && rmdir ./-p + as_mkdir_p=false +fi + + +# as_fn_executable_p FILE +# ----------------------- +# Test if FILE is an executable regular file. +as_fn_executable_p () +{ + test -f "$1" && test -x "$1" +} # as_fn_executable_p +as_test_x='test -x' +as_executable_p=as_fn_executable_p + +# Sed expression to map a string onto a valid CPP name. +as_tr_cpp="eval sed 'y%*$as_cr_letters%P$as_cr_LETTERS%;s%[^_$as_cr_alnum]%_%g'" + +# Sed expression to map a string onto a valid variable name. +as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'" + + +exec 6>&1 +## ----------------------------------- ## +## Main body of $CONFIG_STATUS script. ## +## ----------------------------------- ## +_ASEOF +test $as_write_fail = 0 && chmod +x $CONFIG_STATUS || ac_write_fail=1 + +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +# Save the log message, to keep $0 and so on meaningful, and to +# report actual input values of CONFIG_FILES etc. instead of their +# values after options handling. +ac_log=" +This file was extended by intel_driver $as_me 1.7.1, which was +generated by GNU Autoconf 2.69. Invocation command line was + + CONFIG_FILES = $CONFIG_FILES + CONFIG_HEADERS = $CONFIG_HEADERS + CONFIG_LINKS = $CONFIG_LINKS + CONFIG_COMMANDS = $CONFIG_COMMANDS + $ $0 $@ + +on `(hostname || uname -n) 2>/dev/null | sed 1q` +" + +_ACEOF + +case $ac_config_files in *" +"*) set x $ac_config_files; shift; ac_config_files=$*;; +esac + +case $ac_config_headers in *" +"*) set x $ac_config_headers; shift; ac_config_headers=$*;; +esac + + +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +# Files that config.status was made for. +config_files="$ac_config_files" +config_headers="$ac_config_headers" +config_commands="$ac_config_commands" + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +ac_cs_usage="\ +\`$as_me' instantiates files and other configuration actions +from templates according to the current configuration. Unless the files +and actions are specified as TAGs, all are instantiated by default. + +Usage: $0 [OPTION]... [TAG]... + + -h, --help print this help, then exit + -V, --version print version number and configuration settings, then exit + --config print configuration, then exit + -q, --quiet, --silent + do not print progress messages + -d, --debug don't remove temporary files + --recheck update $as_me by reconfiguring in the same conditions + --file=FILE[:TEMPLATE] + instantiate the configuration file FILE + --header=FILE[:TEMPLATE] + instantiate the configuration header FILE + +Configuration files: +$config_files + +Configuration headers: +$config_headers + +Configuration commands: +$config_commands + +Report bugs to ." + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" +ac_cs_version="\\ +intel_driver config.status 1.7.1 +configured by $0, generated by GNU Autoconf 2.69, + with options \\"\$ac_cs_config\\" + +Copyright (C) 2012 Free Software Foundation, Inc. +This config.status script is free software; the Free Software Foundation +gives unlimited permission to copy, distribute and modify it." + +ac_pwd='$ac_pwd' +srcdir='$srcdir' +INSTALL='$INSTALL' +MKDIR_P='$MKDIR_P' +AWK='$AWK' +test -n "\$AWK" || AWK=awk +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +# The default lists apply if the user does not specify any file. +ac_need_defaults=: +while test $# != 0 +do + case $1 in + --*=?*) + ac_option=`expr "X$1" : 'X\([^=]*\)='` + ac_optarg=`expr "X$1" : 'X[^=]*=\(.*\)'` + ac_shift=: + ;; + --*=) + ac_option=`expr "X$1" : 'X\([^=]*\)='` + ac_optarg= + ac_shift=: + ;; + *) + ac_option=$1 + ac_optarg=$2 + ac_shift=shift + ;; + esac + + case $ac_option in + # Handling of the options. + -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r) + ac_cs_recheck=: ;; + --version | --versio | --versi | --vers | --ver | --ve | --v | -V ) + $as_echo "$ac_cs_version"; exit ;; + --config | --confi | --conf | --con | --co | --c ) + $as_echo "$ac_cs_config"; exit ;; + --debug | --debu | --deb | --de | --d | -d ) + debug=: ;; + --file | --fil | --fi | --f ) + $ac_shift + case $ac_optarg in + *\'*) ac_optarg=`$as_echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;; + '') as_fn_error $? "missing file argument" ;; + esac + as_fn_append CONFIG_FILES " '$ac_optarg'" + ac_need_defaults=false;; + --header | --heade | --head | --hea ) + $ac_shift + case $ac_optarg in + *\'*) ac_optarg=`$as_echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;; + esac + as_fn_append CONFIG_HEADERS " '$ac_optarg'" + ac_need_defaults=false;; + --he | --h) + # Conflict between --help and --header + as_fn_error $? "ambiguous option: \`$1' +Try \`$0 --help' for more information.";; + --help | --hel | -h ) + $as_echo "$ac_cs_usage"; exit ;; + -q | -quiet | --quiet | --quie | --qui | --qu | --q \ + | -silent | --silent | --silen | --sile | --sil | --si | --s) + ac_cs_silent=: ;; + + # This is an error. + -*) as_fn_error $? "unrecognized option: \`$1' +Try \`$0 --help' for more information." ;; + + *) as_fn_append ac_config_targets " $1" + ac_need_defaults=false ;; + + esac + shift +done + +ac_configure_extra_args= + +if $ac_cs_silent; then + exec 6>/dev/null + ac_configure_extra_args="$ac_configure_extra_args --silent" +fi + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +if \$ac_cs_recheck; then + set X $SHELL '$0' $ac_configure_args \$ac_configure_extra_args --no-create --no-recursion + shift + \$as_echo "running CONFIG_SHELL=$SHELL \$*" >&6 + CONFIG_SHELL='$SHELL' + export CONFIG_SHELL + exec "\$@" +fi + +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +exec 5>>config.log +{ + echo + sed 'h;s/./-/g;s/^.../## /;s/...$/ ##/;p;x;p;x' <<_ASBOX +## Running $as_me. ## +_ASBOX + $as_echo "$ac_log" +} >&5 + +_ACEOF +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +# +# INIT-COMMANDS +# +AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac_aux_dir" + + +# The HP-UX ksh and POSIX shell print the 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+module_expsym_cmds='`$ECHO "$module_expsym_cmds" | $SED "$delay_single_quote_subst"`' +with_gnu_ld='`$ECHO "$with_gnu_ld" | $SED "$delay_single_quote_subst"`' +allow_undefined_flag='`$ECHO "$allow_undefined_flag" | $SED "$delay_single_quote_subst"`' +no_undefined_flag='`$ECHO "$no_undefined_flag" | $SED "$delay_single_quote_subst"`' +hardcode_libdir_flag_spec='`$ECHO "$hardcode_libdir_flag_spec" | $SED "$delay_single_quote_subst"`' +hardcode_libdir_separator='`$ECHO "$hardcode_libdir_separator" | $SED "$delay_single_quote_subst"`' +hardcode_direct='`$ECHO "$hardcode_direct" | $SED "$delay_single_quote_subst"`' +hardcode_direct_absolute='`$ECHO "$hardcode_direct_absolute" | $SED "$delay_single_quote_subst"`' +hardcode_minus_L='`$ECHO "$hardcode_minus_L" | $SED "$delay_single_quote_subst"`' +hardcode_shlibpath_var='`$ECHO "$hardcode_shlibpath_var" | $SED "$delay_single_quote_subst"`' +hardcode_automatic='`$ECHO "$hardcode_automatic" | $SED "$delay_single_quote_subst"`' +inherit_rpath='`$ECHO "$inherit_rpath" | $SED "$delay_single_quote_subst"`' +link_all_deplibs='`$ECHO "$link_all_deplibs" | $SED "$delay_single_quote_subst"`' +always_export_symbols='`$ECHO "$always_export_symbols" | $SED "$delay_single_quote_subst"`' +export_symbols_cmds='`$ECHO "$export_symbols_cmds" | $SED "$delay_single_quote_subst"`' +exclude_expsyms='`$ECHO "$exclude_expsyms" | $SED "$delay_single_quote_subst"`' +include_expsyms='`$ECHO "$include_expsyms" | $SED "$delay_single_quote_subst"`' +prelink_cmds='`$ECHO "$prelink_cmds" | $SED "$delay_single_quote_subst"`' +postlink_cmds='`$ECHO "$postlink_cmds" | $SED "$delay_single_quote_subst"`' +file_list_spec='`$ECHO "$file_list_spec" | $SED "$delay_single_quote_subst"`' +variables_saved_for_relink='`$ECHO "$variables_saved_for_relink" | $SED "$delay_single_quote_subst"`' +need_lib_prefix='`$ECHO "$need_lib_prefix" | $SED "$delay_single_quote_subst"`' +need_version='`$ECHO "$need_version" | $SED "$delay_single_quote_subst"`' +version_type='`$ECHO "$version_type" | $SED "$delay_single_quote_subst"`' +runpath_var='`$ECHO "$runpath_var" | $SED "$delay_single_quote_subst"`' +shlibpath_var='`$ECHO "$shlibpath_var" | $SED "$delay_single_quote_subst"`' +shlibpath_overrides_runpath='`$ECHO "$shlibpath_overrides_runpath" | $SED "$delay_single_quote_subst"`' +libname_spec='`$ECHO "$libname_spec" | $SED "$delay_single_quote_subst"`' +library_names_spec='`$ECHO "$library_names_spec" | $SED "$delay_single_quote_subst"`' +soname_spec='`$ECHO "$soname_spec" | $SED "$delay_single_quote_subst"`' +install_override_mode='`$ECHO "$install_override_mode" | $SED "$delay_single_quote_subst"`' +postinstall_cmds='`$ECHO "$postinstall_cmds" | $SED "$delay_single_quote_subst"`' +postuninstall_cmds='`$ECHO "$postuninstall_cmds" | $SED "$delay_single_quote_subst"`' +finish_cmds='`$ECHO "$finish_cmds" | $SED "$delay_single_quote_subst"`' +finish_eval='`$ECHO "$finish_eval" | $SED "$delay_single_quote_subst"`' +hardcode_into_libs='`$ECHO "$hardcode_into_libs" | $SED "$delay_single_quote_subst"`' +sys_lib_search_path_spec='`$ECHO "$sys_lib_search_path_spec" | $SED "$delay_single_quote_subst"`' +sys_lib_dlsearch_path_spec='`$ECHO "$sys_lib_dlsearch_path_spec" | $SED "$delay_single_quote_subst"`' +hardcode_action='`$ECHO "$hardcode_action" | $SED "$delay_single_quote_subst"`' +enable_dlopen='`$ECHO "$enable_dlopen" | $SED "$delay_single_quote_subst"`' +enable_dlopen_self='`$ECHO "$enable_dlopen_self" | $SED "$delay_single_quote_subst"`' +enable_dlopen_self_static='`$ECHO "$enable_dlopen_self_static" | $SED "$delay_single_quote_subst"`' +old_striplib='`$ECHO "$old_striplib" | $SED "$delay_single_quote_subst"`' +striplib='`$ECHO "$striplib" | $SED "$delay_single_quote_subst"`' + +LTCC='$LTCC' +LTCFLAGS='$LTCFLAGS' +compiler='$compiler_DEFAULT' + +# A function that is used when there is no print builtin or printf. +func_fallback_echo () +{ + eval 'cat <<_LTECHO_EOF +\$1 +_LTECHO_EOF' +} + +# Quote evaled strings. +for var in SHELL \ +ECHO \ +PATH_SEPARATOR \ +SED \ +GREP \ +EGREP \ +FGREP \ +LD \ +NM \ +LN_S \ +lt_SP2NL \ +lt_NL2SP \ +reload_flag \ +OBJDUMP \ +deplibs_check_method \ +file_magic_cmd \ +file_magic_glob \ +want_nocaseglob \ +DLLTOOL \ +sharedlib_from_linklib_cmd \ +AR \ +AR_FLAGS \ +archiver_list_spec \ +STRIP \ +RANLIB \ +CC \ +CFLAGS \ +compiler \ +lt_cv_sys_global_symbol_pipe \ +lt_cv_sys_global_symbol_to_cdecl \ +lt_cv_sys_global_symbol_to_c_name_address \ +lt_cv_sys_global_symbol_to_c_name_address_lib_prefix \ +nm_file_list_spec \ +lt_prog_compiler_no_builtin_flag \ +lt_prog_compiler_pic \ +lt_prog_compiler_wl \ +lt_prog_compiler_static \ +lt_cv_prog_compiler_c_o \ +need_locks \ +MANIFEST_TOOL \ +DSYMUTIL \ +NMEDIT \ +LIPO \ +OTOOL \ +OTOOL64 \ +shrext_cmds \ +export_dynamic_flag_spec \ +whole_archive_flag_spec \ +compiler_needs_object \ +with_gnu_ld \ +allow_undefined_flag \ +no_undefined_flag \ +hardcode_libdir_flag_spec \ +hardcode_libdir_separator \ +exclude_expsyms \ +include_expsyms \ +file_list_spec \ +variables_saved_for_relink \ +libname_spec \ +library_names_spec \ +soname_spec \ +install_override_mode \ +finish_eval \ +old_striplib \ +striplib; do + case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in + *[\\\\\\\`\\"\\\$]*) + eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\"" + ;; + *) + eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\"" + ;; + esac +done + +# Double-quote double-evaled strings. +for var in reload_cmds \ +old_postinstall_cmds \ +old_postuninstall_cmds \ +old_archive_cmds \ +extract_expsyms_cmds \ +old_archive_from_new_cmds \ +old_archive_from_expsyms_cmds \ +archive_cmds \ +archive_expsym_cmds \ +module_cmds \ +module_expsym_cmds \ +export_symbols_cmds \ +prelink_cmds \ +postlink_cmds \ +postinstall_cmds \ +postuninstall_cmds \ +finish_cmds \ +sys_lib_search_path_spec \ +sys_lib_dlsearch_path_spec; do + case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in + *[\\\\\\\`\\"\\\$]*) + eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\"" + ;; + *) + eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\"" + ;; + esac +done + +ac_aux_dir='$ac_aux_dir' +xsi_shell='$xsi_shell' +lt_shell_append='$lt_shell_append' + +# See if we are running on zsh, and set the options which allow our +# commands through without removal of \ escapes INIT. +if test -n "\${ZSH_VERSION+set}" ; then + setopt NO_GLOB_SUBST +fi + + + PACKAGE='$PACKAGE' + VERSION='$VERSION' + TIMESTAMP='$TIMESTAMP' + RM='$RM' + ofile='$ofile' + + + + +_ACEOF + +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + +# Handling of arguments. +for ac_config_target in $ac_config_targets +do + case $ac_config_target in + "src/config.h") CONFIG_HEADERS="$CONFIG_HEADERS src/config.h" ;; + "depfiles") CONFIG_COMMANDS="$CONFIG_COMMANDS depfiles" ;; + "libtool") CONFIG_COMMANDS="$CONFIG_COMMANDS libtool" ;; + "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;; + "debian.upstream/Makefile") CONFIG_FILES="$CONFIG_FILES debian.upstream/Makefile" ;; + "src/Makefile") CONFIG_FILES="$CONFIG_FILES src/Makefile" ;; + "src/shaders/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/Makefile" ;; + "src/shaders/h264/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/h264/Makefile" ;; + "src/shaders/h264/ildb/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/h264/ildb/Makefile" ;; + "src/shaders/h264/mc/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/h264/mc/Makefile" ;; + "src/shaders/mpeg2/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/mpeg2/Makefile" ;; + "src/shaders/mpeg2/vld/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/mpeg2/vld/Makefile" ;; + "src/shaders/post_processing/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/post_processing/Makefile" ;; + "src/shaders/post_processing/gen5_6/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/post_processing/gen5_6/Makefile" ;; + "src/shaders/post_processing/gen7/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/post_processing/gen7/Makefile" ;; + "src/shaders/post_processing/gen75/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/post_processing/gen75/Makefile" ;; + "src/shaders/post_processing/gen8/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/post_processing/gen8/Makefile" ;; + "src/shaders/post_processing/gen9/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/post_processing/gen9/Makefile" ;; + "src/shaders/render/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/render/Makefile" ;; + "src/shaders/utils/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/utils/Makefile" ;; + "src/shaders/vme/Makefile") CONFIG_FILES="$CONFIG_FILES src/shaders/vme/Makefile" ;; + + *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;; + esac +done + + +# If the user did not use the arguments to specify the items to instantiate, +# then the envvar interface is used. Set only those that are not. +# We use the long form for the default assignment because of an extremely +# bizarre bug on SunOS 4.1.3. +if $ac_need_defaults; then + test "${CONFIG_FILES+set}" = set || CONFIG_FILES=$config_files + test "${CONFIG_HEADERS+set}" = set || CONFIG_HEADERS=$config_headers + test "${CONFIG_COMMANDS+set}" = set || CONFIG_COMMANDS=$config_commands +fi + +# Have a temporary directory for convenience. Make it in the build tree +# simply because there is no reason against having it here, and in addition, +# creating and moving files from /tmp can sometimes cause problems. +# Hook for its removal unless debugging. +# Note that there is a small window in which the directory will not be cleaned: +# after its creation but before its name has been assigned to `$tmp'. +$debug || +{ + tmp= ac_tmp= + trap 'exit_status=$? + : "${ac_tmp:=$tmp}" + { test ! -d "$ac_tmp" || rm -fr "$ac_tmp"; } && exit $exit_status +' 0 + trap 'as_fn_exit 1' 1 2 13 15 +} +# Create a (secure) tmp directory for tmp files. + +{ + tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` && + test -d "$tmp" +} || +{ + tmp=./conf$$-$RANDOM + (umask 077 && mkdir "$tmp") +} || as_fn_error $? "cannot create a temporary directory in ." "$LINENO" 5 +ac_tmp=$tmp + +# Set up the scripts for CONFIG_FILES section. +# No need to generate them if there are no CONFIG_FILES. +# This happens for instance with `./config.status config.h'. +if test -n "$CONFIG_FILES"; then + + +ac_cr=`echo X | tr X '\015'` +# On cygwin, bash can eat \r inside `` if the user requested igncr. +# But we know of no other shell where ac_cr would be empty at this +# point, so we can use a bashism as a fallback. +if test "x$ac_cr" = x; then + eval ac_cr=\$\'\\r\' +fi +ac_cs_awk_cr=`$AWK 'BEGIN { print "a\rb" }' /dev/null` +if test "$ac_cs_awk_cr" = "a${ac_cr}b"; then + ac_cs_awk_cr='\\r' +else + ac_cs_awk_cr=$ac_cr +fi + +echo 'BEGIN {' >"$ac_tmp/subs1.awk" && +_ACEOF + + +{ + echo "cat >conf$$subs.awk <<_ACEOF" && + echo "$ac_subst_vars" | sed 's/.*/&!$&$ac_delim/' && + echo "_ACEOF" +} >conf$$subs.sh || + as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5 +ac_delim_num=`echo "$ac_subst_vars" | grep -c '^'` +ac_delim='%!_!# ' +for ac_last_try in false false false false false :; do + . ./conf$$subs.sh || + as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5 + + ac_delim_n=`sed -n "s/.*$ac_delim\$/X/p" conf$$subs.awk | grep -c X` + if test $ac_delim_n = $ac_delim_num; then + break + elif $ac_last_try; then + as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5 + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! " + fi +done +rm -f conf$$subs.sh + +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +cat >>"\$ac_tmp/subs1.awk" <<\\_ACAWK && +_ACEOF +sed -n ' +h +s/^/S["/; s/!.*/"]=/ +p +g +s/^[^!]*!// +:repl +t repl +s/'"$ac_delim"'$// +t delim +:nl +h +s/\(.\{148\}\)..*/\1/ +t more1 +s/["\\]/\\&/g; s/^/"/; s/$/\\n"\\/ +p +n +b repl +:more1 +s/["\\]/\\&/g; s/^/"/; s/$/"\\/ +p +g +s/.\{148\}// +t nl +:delim +h +s/\(.\{148\}\)..*/\1/ +t more2 +s/["\\]/\\&/g; s/^/"/; s/$/"/ +p +b +:more2 +s/["\\]/\\&/g; s/^/"/; s/$/"\\/ +p +g +s/.\{148\}// +t delim +' >$CONFIG_STATUS || ac_write_fail=1 +rm -f conf$$subs.awk +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 +_ACAWK +cat >>"\$ac_tmp/subs1.awk" <<_ACAWK && + for (key in S) S_is_set[key] = 1 + FS = "" + +} +{ + line = $ 0 + nfields = split(line, field, "@") + substed = 0 + len = length(field[1]) + for (i = 2; i < nfields; i++) { + key = field[i] + keylen = length(key) + if (S_is_set[key]) { + value = S[key] + line = substr(line, 1, len) "" value "" substr(line, len + keylen + 3) + len += length(value) + length(field[++i]) + substed = 1 + } else + len += 1 + keylen + } + + print line +} + +_ACAWK +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +if sed "s/$ac_cr//" < /dev/null > /dev/null 2>&1; then + sed "s/$ac_cr\$//; s/$ac_cr/$ac_cs_awk_cr/g" +else + cat +fi < "$ac_tmp/subs1.awk" > "$ac_tmp/subs.awk" \ + || as_fn_error $? "could not setup config files machinery" "$LINENO" 5 +_ACEOF + +# VPATH may cause trouble with some makes, so we remove sole $(srcdir), +# ${srcdir} and @srcdir@ entries from VPATH if srcdir is ".", strip leading and +# trailing colons and then remove the whole line if VPATH becomes empty +# (actually we leave an empty line to preserve line numbers). +if test "x$srcdir" = x.; then + ac_vpsub='/^[ ]*VPATH[ ]*=[ ]*/{ +h +s/// +s/^/:/ +s/[ ]*$/:/ +s/:\$(srcdir):/:/g +s/:\${srcdir}:/:/g +s/:@srcdir@:/:/g +s/^:*// +s/:*$// +x +s/\(=[ ]*\).*/\1/ +G +s/\n// +s/^[^=]*=[ ]*$// +}' +fi + +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 +fi # test -n "$CONFIG_FILES" + +# Set up the scripts for CONFIG_HEADERS section. +# No need to generate them if there are no CONFIG_HEADERS. +# This happens for instance with `./config.status Makefile'. +if test -n "$CONFIG_HEADERS"; then +cat >"$ac_tmp/defines.awk" <<\_ACAWK || +BEGIN { +_ACEOF + +# Transform confdefs.h into an awk script `defines.awk', embedded as +# here-document in config.status, that substitutes the proper values into +# config.h.in to produce config.h. + +# Create a delimiter string that does not exist in confdefs.h, to ease +# handling of long lines. +ac_delim='%!_!# ' +for ac_last_try in false false :; do + ac_tt=`sed -n "/$ac_delim/p" confdefs.h` + if test -z "$ac_tt"; then + break + elif $ac_last_try; then + as_fn_error $? "could not make $CONFIG_HEADERS" "$LINENO" 5 + else + ac_delim="$ac_delim!$ac_delim _$ac_delim!! " + fi +done + +# For the awk script, D is an array of macro values keyed by name, +# likewise P contains macro parameters if any. Preserve backslash +# newline sequences. + +ac_word_re=[_$as_cr_Letters][_$as_cr_alnum]* +sed -n ' +s/.\{148\}/&'"$ac_delim"'/g +t rset +:rset +s/^[ ]*#[ ]*define[ ][ ]*/ / +t def +d +:def +s/\\$// +t bsnl +s/["\\]/\\&/g +s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\ +D["\1"]=" \3"/p +s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2"/p +d +:bsnl +s/["\\]/\\&/g +s/^ \('"$ac_word_re"'\)\(([^()]*)\)[ ]*\(.*\)/P["\1"]="\2"\ +D["\1"]=" \3\\\\\\n"\\/p +t cont +s/^ \('"$ac_word_re"'\)[ ]*\(.*\)/D["\1"]=" \2\\\\\\n"\\/p +t cont +d +:cont +n +s/.\{148\}/&'"$ac_delim"'/g +t clear +:clear +s/\\$// +t bsnlc +s/["\\]/\\&/g; s/^/"/; s/$/"/p +d +:bsnlc +s/["\\]/\\&/g; s/^/"/; s/$/\\\\\\n"\\/p +b cont +' >$CONFIG_STATUS || ac_write_fail=1 + +cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 + for (key in D) D_is_set[key] = 1 + FS = "" +} +/^[\t ]*#[\t ]*(define|undef)[\t ]+$ac_word_re([\t (]|\$)/ { + line = \$ 0 + split(line, arg, " ") + if (arg[1] == "#") { + defundef = arg[2] + mac1 = arg[3] + } else { + defundef = substr(arg[1], 2) + mac1 = arg[2] + } + split(mac1, mac2, "(") #) + macro = mac2[1] + prefix = substr(line, 1, index(line, defundef) - 1) + if (D_is_set[macro]) { + # Preserve the white space surrounding the "#". + print prefix "define", macro P[macro] D[macro] + next + } else { + # Replace #undef with comments. This is necessary, for example, + # in the case of _POSIX_SOURCE, which is predefined and required + # on some systems where configure will not decide to define it. + if (defundef == "undef") { + print "/*", prefix defundef, macro, "*/" + next + } + } +} +{ print } +_ACAWK +_ACEOF +cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 + as_fn_error $? "could not setup config headers machinery" "$LINENO" 5 +fi # test -n "$CONFIG_HEADERS" + + +eval set X " :F $CONFIG_FILES :H $CONFIG_HEADERS :C $CONFIG_COMMANDS" +shift +for ac_tag +do + case $ac_tag in + :[FHLC]) ac_mode=$ac_tag; continue;; + esac + case $ac_mode$ac_tag in + :[FHL]*:*);; + :L* | :C*:*) as_fn_error $? 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+need_version=$need_version + +# Library versioning type. +version_type=$version_type + +# Shared library runtime path variable. +runpath_var=$runpath_var + +# Shared library path variable. +shlibpath_var=$shlibpath_var + +# Is shlibpath searched before the hard-coded library search path? +shlibpath_overrides_runpath=$shlibpath_overrides_runpath + +# Format of library name prefix. +libname_spec=$lt_libname_spec + +# List of archive names. First name is the real one, the rest are links. +# The last name is the one that the linker finds with -lNAME +library_names_spec=$lt_library_names_spec + +# The coded name of the library, if different from the real name. +soname_spec=$lt_soname_spec + +# Permission mode override for installation of shared libraries. +install_override_mode=$lt_install_override_mode + +# Command to use after installation of a shared archive. +postinstall_cmds=$lt_postinstall_cmds + +# Command to use after uninstallation of a shared archive. +postuninstall_cmds=$lt_postuninstall_cmds + +# Commands used to finish a libtool library installation in a directory. +finish_cmds=$lt_finish_cmds + +# As "finish_cmds", except a single script fragment to be evaled but +# not shown. +finish_eval=$lt_finish_eval + +# Whether we should hardcode library paths into libraries. +hardcode_into_libs=$hardcode_into_libs + +# Compile-time system search path for libraries. +sys_lib_search_path_spec=$lt_sys_lib_search_path_spec + +# Run-time system search path for libraries. +sys_lib_dlsearch_path_spec=$lt_sys_lib_dlsearch_path_spec + +# Whether dlopen is supported. +dlopen_support=$enable_dlopen + +# Whether dlopen of programs is supported. +dlopen_self=$enable_dlopen_self + +# Whether dlopen of statically linked programs is supported. +dlopen_self_static=$enable_dlopen_self_static + +# Commands to strip libraries. +old_striplib=$lt_old_striplib +striplib=$lt_striplib + + +# The linker used to build libraries. +LD=$lt_LD + +# How to create reloadable object files. +reload_flag=$lt_reload_flag +reload_cmds=$lt_reload_cmds + +# Commands used to build an old-style archive. +old_archive_cmds=$lt_old_archive_cmds + +# A language specific compiler. +CC=$lt_compiler + +# Is the compiler the GNU compiler? +with_gcc=$GCC + +# Compiler flag to turn off builtin functions. +no_builtin_flag=$lt_lt_prog_compiler_no_builtin_flag + +# Additional compiler flags for building library objects. +pic_flag=$lt_lt_prog_compiler_pic + +# How to pass a linker flag through the compiler. +wl=$lt_lt_prog_compiler_wl + +# Compiler flag to prevent dynamic linking. +link_static_flag=$lt_lt_prog_compiler_static + +# Does compiler simultaneously support -c and -o options? +compiler_c_o=$lt_lt_cv_prog_compiler_c_o + +# Whether or not to add -lc for building shared libraries. +build_libtool_need_lc=$archive_cmds_need_lc + +# Whether or not to disallow shared libs when runtime libs are static. +allow_libtool_libs_with_static_runtimes=$enable_shared_with_static_runtimes + +# Compiler flag to allow reflexive dlopens. +export_dynamic_flag_spec=$lt_export_dynamic_flag_spec + +# Compiler flag to generate shared objects directly from archives. +whole_archive_flag_spec=$lt_whole_archive_flag_spec + +# Whether the compiler copes with passing no objects directly. +compiler_needs_object=$lt_compiler_needs_object + +# Create an old-style archive from a shared archive. +old_archive_from_new_cmds=$lt_old_archive_from_new_cmds + +# Create a temporary old-style archive to link instead of a shared archive. +old_archive_from_expsyms_cmds=$lt_old_archive_from_expsyms_cmds + +# Commands used to build a shared archive. +archive_cmds=$lt_archive_cmds +archive_expsym_cmds=$lt_archive_expsym_cmds + +# Commands used to build a loadable module if different from building +# a shared archive. +module_cmds=$lt_module_cmds +module_expsym_cmds=$lt_module_expsym_cmds + +# Whether we are building with GNU ld or not. +with_gnu_ld=$lt_with_gnu_ld + +# Flag that allows shared libraries with undefined symbols to be built. +allow_undefined_flag=$lt_allow_undefined_flag + +# Flag that enforces no undefined symbols. +no_undefined_flag=$lt_no_undefined_flag + +# Flag to hardcode \$libdir into a binary during linking. +# This must work even if \$libdir does not exist +hardcode_libdir_flag_spec=$lt_hardcode_libdir_flag_spec + +# Whether we need a single "-rpath" flag with a separated argument. +hardcode_libdir_separator=$lt_hardcode_libdir_separator + +# Set to "yes" if using DIR/libNAME\${shared_ext} during linking hardcodes +# DIR into the resulting binary. +hardcode_direct=$hardcode_direct + +# Set to "yes" if using DIR/libNAME\${shared_ext} during linking hardcodes +# DIR into the resulting binary and the resulting library dependency is +# "absolute",i.e impossible to change by setting \${shlibpath_var} if the +# library is relocated. +hardcode_direct_absolute=$hardcode_direct_absolute + +# Set to "yes" if using the -LDIR flag during linking hardcodes DIR +# into the resulting binary. +hardcode_minus_L=$hardcode_minus_L + +# Set to "yes" if using SHLIBPATH_VAR=DIR during linking hardcodes DIR +# into the resulting binary. +hardcode_shlibpath_var=$hardcode_shlibpath_var + +# Set to "yes" if building a shared library automatically hardcodes DIR +# into the library and all subsequent libraries and executables linked +# against it. +hardcode_automatic=$hardcode_automatic + +# Set to yes if linker adds runtime paths of dependent libraries +# to runtime path list. +inherit_rpath=$inherit_rpath + +# Whether libtool must link a program against all its dependency libraries. +link_all_deplibs=$link_all_deplibs + +# Set to "yes" if exported symbols are required. +always_export_symbols=$always_export_symbols + +# The commands to list exported symbols. +export_symbols_cmds=$lt_export_symbols_cmds + +# Symbols that should not be listed in the preloaded symbols. +exclude_expsyms=$lt_exclude_expsyms + +# Symbols that must always be exported. +include_expsyms=$lt_include_expsyms + +# Commands necessary for linking programs (against libraries) with templates. +prelink_cmds=$lt_prelink_cmds + +# Commands necessary for finishing linking programs. +postlink_cmds=$lt_postlink_cmds + +# Specify filename containing input files. +file_list_spec=$lt_file_list_spec + +# How to hardcode a shared library path into an executable. +hardcode_action=$hardcode_action + +# ### END LIBTOOL CONFIG + +_LT_EOF + + case $host_os in + aix3*) + cat <<\_LT_EOF >> "$cfgfile" +# AIX sometimes has problems with the GCC collect2 program. For some +# reason, if we set the COLLECT_NAMES environment variable, the problems +# vanish in a puff of smoke. +if test "X${COLLECT_NAMES+set}" != Xset; then + COLLECT_NAMES= + export COLLECT_NAMES +fi +_LT_EOF + ;; + esac + + +ltmain="$ac_aux_dir/ltmain.sh" + + + # We use sed instead of cat because bash on DJGPP gets confused if + # if finds mixed CR/LF and LF-only lines. Since sed operates in + # text mode, it properly converts lines to CR/LF. This bash problem + # is reportedly fixed, but why not run on old versions too? + sed '$q' "$ltmain" >> "$cfgfile" \ + || (rm -f "$cfgfile"; exit 1) + + if test x"$xsi_shell" = xyes; then + sed -e '/^func_dirname ()$/,/^} # func_dirname /c\ +func_dirname ()\ +{\ +\ case ${1} in\ +\ */*) func_dirname_result="${1%/*}${2}" ;;\ +\ * ) func_dirname_result="${3}" ;;\ +\ esac\ +} # Extended-shell func_dirname implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_basename ()$/,/^} # func_basename /c\ +func_basename ()\ +{\ +\ func_basename_result="${1##*/}"\ +} # Extended-shell func_basename implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_dirname_and_basename ()$/,/^} # func_dirname_and_basename /c\ +func_dirname_and_basename ()\ +{\ +\ case ${1} in\ +\ */*) func_dirname_result="${1%/*}${2}" ;;\ +\ * ) func_dirname_result="${3}" ;;\ +\ esac\ +\ func_basename_result="${1##*/}"\ +} # Extended-shell func_dirname_and_basename implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_stripname ()$/,/^} # func_stripname /c\ +func_stripname ()\ +{\ +\ # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are\ +\ # positional parameters, so assign one to ordinary parameter first.\ +\ func_stripname_result=${3}\ +\ func_stripname_result=${func_stripname_result#"${1}"}\ +\ func_stripname_result=${func_stripname_result%"${2}"}\ +} # Extended-shell func_stripname implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_split_long_opt ()$/,/^} # func_split_long_opt /c\ +func_split_long_opt ()\ +{\ +\ func_split_long_opt_name=${1%%=*}\ +\ func_split_long_opt_arg=${1#*=}\ +} # Extended-shell func_split_long_opt implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_split_short_opt ()$/,/^} # func_split_short_opt /c\ +func_split_short_opt ()\ +{\ +\ func_split_short_opt_arg=${1#??}\ +\ func_split_short_opt_name=${1%"$func_split_short_opt_arg"}\ +} # Extended-shell func_split_short_opt implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_lo2o ()$/,/^} # func_lo2o /c\ +func_lo2o ()\ +{\ +\ case ${1} in\ +\ *.lo) func_lo2o_result=${1%.lo}.${objext} ;;\ +\ *) func_lo2o_result=${1} ;;\ +\ esac\ +} # Extended-shell func_lo2o implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_xform ()$/,/^} # func_xform /c\ +func_xform ()\ +{\ + func_xform_result=${1%.*}.lo\ +} # Extended-shell func_xform implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_arith ()$/,/^} # func_arith /c\ +func_arith ()\ +{\ + func_arith_result=$(( $* ))\ +} # Extended-shell func_arith implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_len ()$/,/^} # func_len /c\ +func_len ()\ +{\ + func_len_result=${#1}\ +} # Extended-shell func_len implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + +fi + +if test x"$lt_shell_append" = xyes; then + sed -e '/^func_append ()$/,/^} # func_append /c\ +func_append ()\ +{\ + eval "${1}+=\\${2}"\ +} # Extended-shell func_append implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + sed -e '/^func_append_quoted ()$/,/^} # func_append_quoted /c\ +func_append_quoted ()\ +{\ +\ func_quote_for_eval "${2}"\ +\ eval "${1}+=\\\\ \\$func_quote_for_eval_result"\ +} # Extended-shell func_append_quoted implementation' "$cfgfile" > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") +test 0 -eq $? || _lt_function_replace_fail=: + + + # Save a `func_append' function call where possible by direct use of '+=' + sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") + test 0 -eq $? || _lt_function_replace_fail=: +else + # Save a `func_append' function call even when '+=' is not available + sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \ + && mv -f "$cfgfile.tmp" "$cfgfile" \ + || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") + test 0 -eq $? || _lt_function_replace_fail=: +fi + +if test x"$_lt_function_replace_fail" = x":"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Unable to substitute extended shell functions in $ofile" >&5 +$as_echo "$as_me: WARNING: Unable to substitute extended shell functions in $ofile" >&2;} +fi + + + mv -f "$cfgfile" "$ofile" || + (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile") + chmod +x "$ofile" + + ;; + + esac +done # for ac_tag + + +as_fn_exit 0 +_ACEOF +ac_clean_files=$ac_clean_files_save + +test $ac_write_fail = 0 || + as_fn_error $? "write failure creating $CONFIG_STATUS" "$LINENO" 5 + + +# configure is writing to config.log, and then calls config.status. +# config.status does its own redirection, appending to config.log. +# Unfortunately, on DOS this fails, as config.log is still kept open +# by configure, so config.status won't be able to write to it; its +# output is simply discarded. So we exec the FD to /dev/null, +# effectively closing config.log, so it can be properly (re)opened and +# appended to by config.status. When coming back to configure, we +# need to make the FD available again. +if test "$no_create" != yes; then + ac_cs_success=: + ac_config_status_args= + test "$silent" = yes && + ac_config_status_args="$ac_config_status_args --quiet" + exec 5>/dev/null + $SHELL $CONFIG_STATUS $ac_config_status_args || ac_cs_success=false + exec 5>>config.log + # Use ||, not &&, to avoid exiting from the if with $? = 1, which + # would make configure fail if this is the last instruction. + $ac_cs_success || as_fn_exit 1 +fi +if test -n "$ac_unrecognized_opts" && test "$enable_option_checking" != no; then + { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: unrecognized options: $ac_unrecognized_opts" >&5 +$as_echo "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2;} +fi + + +BACKENDS="" +if test "$USE_DRM" = "yes"; then : + BACKENDS="$BACKENDS drm" +fi +if test "$USE_X11" = "yes"; then : + BACKENDS="$BACKENDS x11" +fi +if test "$USE_WAYLAND" = "yes"; then : + BACKENDS="$BACKENDS wayland" +fi + +echo +echo $PACKAGE configuration summary: +echo +echo VA-API version ................... : $VA_VERSION_STR +echo VA-API drivers path .............. : $LIBVA_DRIVERS_PATH +echo Windowing systems ................ : $BACKENDS +echo diff -Nru intel-vaapi-driver-1.0.15/configure.ac intel-vaapi-driver-1.7.1/configure.ac --- intel-vaapi-driver-1.0.15/configure.ac 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/configure.ac 2016-06-21 02:05:31.000000000 +0000 @@ -1,7 +1,7 @@ # intel-driver package version number m4_define([intel_driver_major_version], [1]) -m4_define([intel_driver_minor_version], [0]) -m4_define([intel_driver_micro_version], [15]) +m4_define([intel_driver_minor_version], [7]) +m4_define([intel_driver_micro_version], [1]) m4_define([intel_driver_pre_version], [0]) m4_define([intel_driver_version], [intel_driver_major_version.intel_driver_minor_version.intel_driver_micro_version]) @@ -10,18 +10,19 @@ ]) # libva minimum version requirement -m4_define([libva_package_version], [1.0.14]) +m4_define([va_api_version], [0.39.2]) +m4_define([libva_package_version], [1.7.1]) # libdrm minimum version requirement -m4_define([libdrm_version], [2.4.23]) +m4_define([libdrm_version], [2.4.52]) AC_PREREQ([2.57]) AC_INIT([intel_driver], [intel_driver_version], [haihao.xiang@intel.com], - [libva-driver-intel]) + [libva-intel-driver]) AC_CONFIG_SRCDIR([Makefile.am]) -AM_INIT_AUTOMAKE +AM_INIT_AUTOMAKE([1.9 tar-ustar]) -AM_CONFIG_HEADER([src/config.h]) +AC_CONFIG_HEADERS([src/config.h]) INTEL_DRIVER_MAJOR_VERSION=intel_driver_major_version INTEL_DRIVER_MINOR_VERSION=intel_driver_minor_version @@ -40,6 +41,26 @@ AC_SUBST(AM_DEFAULT_VERBOSITY) ]) +AC_ARG_ENABLE(drm, + [AC_HELP_STRING([--enable-drm], + [build with VA/DRM API support @<:@default=yes@:>@])], + [], [enable_drm="yes"]) + +AC_ARG_ENABLE(x11, + [AC_HELP_STRING([--enable-x11], + [build with VA/X11 API support @<:@default=yes@:>@])], + [], [enable_x11="yes"]) + +AC_ARG_ENABLE([wayland], + [AC_HELP_STRING([--enable-wayland], + [build with VA/Wayland API support @<:@default=yes@:>@])], + [], [enable_wayland="yes"]) + +AC_ARG_ENABLE([hybrid-codec], + [AC_HELP_STRING([--enable-hybrid-codec], + [build with hybrid codec support @<:@default=no@:>@])], + [], [enable_hybrid_codec="no"]) + AC_DISABLE_STATIC AC_PROG_LIBTOOL AC_PROG_CC @@ -48,6 +69,9 @@ AC_C_BIGENDIAN AC_HEADER_STDC AC_SYS_LARGEFILE +AC_CHECK_LIB([m], [sin]) +AC_CHECK_FUNCS([log2f]) +AC_CHECK_PROGS([PYTHON2], [python2 python]) LIBVA_PACKAGE_VERSION=libva_package_version AC_SUBST(LIBVA_PACKAGE_VERSION) @@ -58,13 +82,39 @@ AC_SUBST(LIBDRM_VERSION) dnl Check for gen4asm -PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.2], [gen4asm=yes], [gen4asm=no]) -AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes) +PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.9], [gen4asm=yes], [gen4asm=no]) AC_PATH_PROG([GEN4ASM], [intel-gen4asm]) +AS_IF([test "x$GEN4ASM" = "x" ], [AM_CONDITIONAL(HAVE_GEN4ASM, false)], + [AM_CONDITIONAL(HAVE_GEN4ASM, [test x$gen4asm = xyes])]) + +dnl Check for git +AC_ARG_VAR([GIT], [Path to git program, if any]) +AC_PATH_PROG([GIT], [git]) +AM_CONDITIONAL([HAVE_GIT], [test -n "$GIT"]) dnl Check for VA-API -PKG_CHECK_MODULES(LIBVA_DEPS, [libva]) -PKG_CHECK_MODULES(LIBVA_X11_DEPS, [libva-x11]) +PKG_CHECK_MODULES(LIBVA_DEPS, [libva >= va_api_version]) + +dnl Check for VA/DRM API +USE_DRM="$enable_drm" +if test "$USE_DRM" = "yes"; then + PKG_CHECK_MODULES(LIBVA_DRM_DEPS, [libva-drm], + [AC_DEFINE([HAVE_VA_DRM], [1], [Defined to 1 if VA/DRM API is enabled])], + [USE_DRM="no"]) + + # Check for + if test "$USE_DRM" = "yes"; then + saved_CPPFLAGS="$CPPFLAGS" + CPPFLAGS="$CPPFLAGS $DRM_CFLAGS" + AC_CHECK_HEADERS([drm_fourcc.h], [:], [USE_DRM="no"]) + CPPFLAGS="$saved_CPPFLAGS" + fi +fi +AM_CONDITIONAL(USE_DRM, test "$USE_DRM" = "yes") + +if test "$enable_hybrid_codec" = "yes"; then + AC_DEFINE([HAVE_HYBRID_CODEC], [1], [Defined to 1 if hybrid codec is needed]) +fi VA_VERSION=`$PKG_CONFIG --modversion libva` VA_MAJOR_VERSION=`echo "$VA_VERSION" | cut -d'.' -f1` @@ -80,15 +130,64 @@ AC_DEFINE_UNQUOTED([VA_DRIVER_INIT_FUNC], [$VA_DRIVER_INIT_FUNC], [Define driver entry-point]) +dnl Check for VA/DRM API +USE_X11="$enable_x11" +if test "$USE_X11" = "yes"; then + PKG_CHECK_MODULES(LIBVA_X11_DEPS, [libva-x11], + [AC_DEFINE([HAVE_VA_X11], [1], [Defined to 1 if VA/X11 API is enabled])], + [USE_X11="no"]) +fi +AM_CONDITIONAL(USE_X11, test "$USE_X11" = "yes") + dnl Check for VA-API drivers path -AC_MSG_CHECKING([for VA drivers path]) -LIBVA_DRIVERS_PATH=`$PKG_CONFIG libva --variable driverdir` +AC_ARG_VAR(LIBVA_DRIVERS_PATH, [drivers install path]) if test -z "$LIBVA_DRIVERS_PATH"; then - LIBVA_DRIVERS_PATH="/usr/lib/xorg/modules/drivers" + AC_MSG_CHECKING([for VA drivers path]) + LIBVA_DRIVERS_PATH=`$PKG_CONFIG libva --variable driverdir` +fi +if test -z "$LIBVA_DRIVERS_PATH"; then + LIBVA_DRIVERS_PATH="${libdir}/xorg/modules/drivers" fi AC_MSG_RESULT([$LIBVA_DRIVERS_PATH]) AC_SUBST(LIBVA_DRIVERS_PATH) +# Check for EGL +if test "$enable_wayland" = "yes"; then + enable_egl="yes" +fi + +USE_EGL="no" +if test "$enable_egl" = "yes"; then + PKG_CHECK_MODULES([EGL], [egl], [USE_EGL="yes"], [USE_EGL="no"]) + saved_CPPFLAGS="$CPPFLAGS" + saved_LIBS="$LIBS" + CPPFLAGS="$CPPFLAGS $EGL_CFLAGS" + LIBS="$LIBS $EGL_LIBS" + AC_CHECK_HEADERS([EGL/egl.h], [:], [USE_EGL="no"]) + AC_CHECK_LIB([EGL], [eglGetDisplay], [:], [USE_EGL="no"]) + CPPFLAGS="$saved_CPPFLAGS" + LIBS="$saved_LIBS" +fi +AM_CONDITIONAL(USE_EGL, test "$USE_EGL" = "yes") + +# Check for Wayland +USE_WAYLAND="no" +if test "$enable_wayland" = "yes"; then + PKG_CHECK_MODULES([LIBVA_WAYLAND_DEPS], [libva-wayland], + [USE_WAYLAND="yes"], [:]) + + if test "$USE_WAYLAND" = "yes"; then + + WAYLAND_PREFIX=`$PKG_CONFIG --variable=prefix wayland-client` + AC_PATH_PROG([WAYLAND_SCANNER], [wayland-scanner],, + [${WAYLAND_PREFIX}/bin$PATH_SEPARATOR$PATH]) + + AC_DEFINE([HAVE_VA_WAYLAND], [1], + [Defined to 1 if VA/Wayland API is enabled]) + fi +fi +AM_CONDITIONAL(USE_WAYLAND, test "$USE_WAYLAND" = "yes") + AC_OUTPUT([ Makefile debian.upstream/Makefile @@ -100,14 +199,26 @@ src/shaders/mpeg2/Makefile src/shaders/mpeg2/vld/Makefile src/shaders/post_processing/Makefile + src/shaders/post_processing/gen5_6/Makefile + src/shaders/post_processing/gen7/Makefile + src/shaders/post_processing/gen75/Makefile + src/shaders/post_processing/gen8/Makefile + src/shaders/post_processing/gen9/Makefile src/shaders/render/Makefile + src/shaders/utils/Makefile src/shaders/vme/Makefile ]) dnl Print summary +BACKENDS="" +AS_IF([test "$USE_DRM" = "yes"], [BACKENDS="$BACKENDS drm"]) +AS_IF([test "$USE_X11" = "yes"], [BACKENDS="$BACKENDS x11"]) +AS_IF([test "$USE_WAYLAND" = "yes"], [BACKENDS="$BACKENDS wayland"]) + echo echo $PACKAGE configuration summary: echo echo VA-API version ................... : $VA_VERSION_STR echo VA-API drivers path .............. : $LIBVA_DRIVERS_PATH +echo Windowing systems ................ : $BACKENDS echo diff -Nru intel-vaapi-driver-1.0.15/debian/changelog intel-vaapi-driver-1.7.1/debian/changelog --- intel-vaapi-driver-1.0.15/debian/changelog 2012-03-29 18:24:51.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/changelog 2016-08-31 21:29:22.000000000 +0000 @@ -1,15 +1,314 @@ -intel-vaapi-driver (1.0.15-1ubuntu2) precise; urgency=low +intel-vaapi-driver (1.7.1-1~ppa12.04+1) precise; urgency=medium - * Fix FTBFS, change dri path from /usr/lib/dri/* to /usr/lib/*/dri/* + * Merge from Debian Unstable. - -- Stéphane Graber Thu, 29 Mar 2012 14:24:33 -0400 + -- Nicolas Derive Wed, 31 Aug 2016 23:29:02 +0200 -intel-vaapi-driver (1.0.15-1ubuntu1) precise; urgency=low +intel-vaapi-driver (1.7.1-1) unstable; urgency=medium - * Add factor-out-typedefs.patch and fix-ref-idx-state.patch from upstream - master, thanks Robert Hooker! (LP: #946742) + * New upstream release. + * debian/control: + - Bump Standards-Version. + - Build-Depends: Bump libdrm-dev and libva-dev according to configure.ac. + - Description: Mention Skylake. - -- Timo Aaltonen Mon, 05 Mar 2012 13:53:27 +0200 + -- Sebastian Ramacher Wed, 22 Jun 2016 19:08:16 +0200 + +intel-vaapi-driver (1.7.0-1) unstable; urgency=medium + + * New upstream release. + * Move to automatic debug symbol packages. + * debian/control: + - Bump Standards-Version. + - Update Vcs-*. + - Bump B-D on libva-dev to 1.7.0. + - Remove obsolete Breaks, Replaces and Provides. + * debian/{rules,i965-va-driver.install}: Update for change to a single + binary package. + + -- Sebastian Ramacher Wed, 16 Mar 2016 01:52:03 +0100 + +intel-vaapi-driver (1.6.2-1) unstable; urgency=medium + + * New upstream release. + + -- Sebastian Ramacher Thu, 17 Dec 2015 11:47:20 +0100 + +intel-vaapi-driver (1.6.1-1) unstable; urgency=medium + + * New upstream release. + + -- Sebastian Ramacher Thu, 10 Sep 2015 22:45:53 +0200 + +intel-vaapi-driver (1.6.0-1) unstable; urgency=medium + + * New upstream release. + * Upload to unstable. + + -- Sebastian Ramacher Wed, 01 Jul 2015 21:28:43 +0200 + +intel-vaapi-driver (1.6.0~pre1-1) experimental; urgency=medium + + * New upstream release. + * debian/copyright: Update copyright years. + * debian/control: Bump Build-Depends on libva-dev and intel-gpu-tools. + + -- Sebastian Ramacher Thu, 04 Jun 2015 12:32:31 +0200 + +intel-vaapi-driver (1.5.1-2) unstable; urgency=medium + + * Upload to unstable. + + -- Sebastian Ramacher Sun, 26 Apr 2015 19:24:51 +0200 + +intel-vaapi-driver (1.5.1-1) experimental; urgency=medium + + * New upstream release. + + -- Sebastian Ramacher Fri, 20 Mar 2015 17:25:52 +0100 + +intel-vaapi-driver (1.5.0-1) experimental; urgency=medium + + * New upstream release. + + -- Sebastian Ramacher Mon, 29 Dec 2014 22:08:51 +0100 + +intel-vaapi-driver (1.5.0~pre1-1) experimental; urgency=medium + + [ Matteo F. Vescovi ] + * debian/control: Uploader e-mail address updated + + [ Sebastian Ramacher ] + * New upstream release. + * debian/patches/0002-avoid_segfault_on_unsupported_platforms.patch: + Removed, no longer needed. + * Track supported libva driver ABI version. (LP: #1384100) + - debian/rules: Add libva dh sequence. + - debian/control: Build-Depend on libva-dev (>= 1.5~pre1) + * debian/copyright: Update copyright information. + + -- Sebastian Ramacher Mon, 15 Dec 2014 20:37:45 +0100 + +intel-vaapi-driver (1.4.1-2) unstable; urgency=medium + + * debian/patches/0002-avoid_segfault_on_unsupported_platforms.patch: Apply + upstream patch to avoid segmentation faults on unsupported platforms. + + -- Sebastian Ramacher Mon, 10 Nov 2014 13:59:29 +0100 + +intel-vaapi-driver (1.4.1-1) unstable; urgency=medium + + * New upstream release. + + -- Sebastian Ramacher Fri, 24 Oct 2014 13:49:03 +0200 + +intel-vaapi-driver (1.4.0-2) unstable; urgency=medium + + * Upload to unstable. + * debian/control: Restrict intel-gpu-tools and python in Build-Depends to + amd64 and i386. + * debian/rules: Remove unused get-orig-source target. + + -- Sebastian Ramacher Wed, 01 Oct 2014 13:59:16 +0200 + +intel-vaapi-driver (1.4.0-1) experimental; urgency=medium + + [ Matteo F. Vescovi ] + * debian/control: i965-va-driver long description updated. (Closes: #752043) + + [ Sebastian Ramacher ] + * New upstream release. + * debian/watch: Update watch file for new download location. + * debian/control: + - Build-Depends: + + Bump libva-dev to >= 1.4. + + Add intel-gpu-tools and python to run intel-gen4asm during build. + + Add libwayland-dev on linux to build with wayland support. + - Bump Standards-Version. No changes required. + + -- Sebastian Ramacher Tue, 30 Sep 2014 16:42:27 +0200 + +intel-vaapi-driver (1.3.2-1) unstable; urgency=medium + + * New upstream release. + * debian/control: Fix typos in Description and replace a list of technical + definitions with a list of supported hardware. (Closes: #751204) + * debian/patches/0002-Define_i965_proc_picture_in_header.patch: Removed + since it has been applied upstream. + + -- Sebastian Ramacher Mon, 16 Jun 2014 10:33:15 +0200 + +intel-vaapi-driver (1.3.1-2) unstable; urgency=medium + + * debian/control: + - Change Section to video to align with the override. + - Add Provides: va-driver to i965-va-driver. + * debian/patches/0002-Define_i965_proc_picture_in_header.patch: Fix + conflicting return types of i965_proc_picture. (Closes: #748555) + + -- Sebastian Ramacher Sat, 31 May 2014 16:09:47 +0200 + +intel-vaapi-driver (1.3.1-1) unstable; urgency=medium + + * New upstream release. + * debian/control: Add Enhances: libva1. + + -- Sebastian Ramacher Sat, 10 May 2014 16:22:23 +0200 + +intel-vaapi-driver (1.3.0-1) unstable; urgency=medium + + [ Matteo F. Vescovi ] + * New upstream release + - debian/patches/: patchset refreshed + - 0002-Adjust_default_contrast-saturation.patch dropped + (applied upstream) + - debian/control: libva-dev b-dep version bump 1.2 => 1.3 + + [ Sebastian Ramacher ] + * debian/copyright: + - Add license information for new files. + - Update copyright years. + * debian/control: + - Remove Andres Mejia from Uploaders. Thank you for maintaining + intel-vaapi-driver, Andres. (Closes: #743530) + - Remove transitional packages which are no longer in the archive. + - Add myself to Uploaders. + - Remove explicit dependency on libva1. A stricter dependency on libva1 + will be generated by dh_shlibdeps anyway. + + -- Sebastian Ramacher Sat, 05 Apr 2014 15:36:28 +0200 + +intel-vaapi-driver (1.2.2-2) unstable; urgency=medium + + * debian/patches/: patchset updated + - 0001-Fix_FTBFS_on_kFreeBSD.patch refreshed + - 0002-Adjust_default_contrast-saturation.patch added (Closes: #734246) + + -- Matteo F. Vescovi Wed, 15 Jan 2014 18:25:37 +0100 + +intel-vaapi-driver (1.2.2-1) unstable; urgency=low + + [ Reinhard Tartler ] + * Tighten dependency on libdrm (Closes: #732162) + + [ Matteo F. Vescovi ] + * New upstream release + * debian/control: S-V bump 3.9.4 => 3.9.5 (no changes needed) + + -- Matteo F. Vescovi Fri, 03 Jan 2014 15:06:13 +0100 + +intel-vaapi-driver (1.2.1-2) unstable; urgency=low + + * Upload to unstable. + + -- Matteo F. Vescovi Thu, 07 Nov 2013 18:00:34 +0100 + +intel-vaapi-driver (1.2.1-1) experimental; urgency=low + + * New upstream release + * debian/patches/: patchset created + - 0001-Fix_FTBFS_on_kFreeBSD.patch added (Closes: #722354) + + -- Matteo F. Vescovi Tue, 15 Oct 2013 19:49:05 +0200 + +intel-vaapi-driver (1.2.0-1) experimental; urgency=low + + [ Matteo F. Vescovi ] + * New upstream release + + [ Sebastian Ramacher ] + * debian/control: Bump libva-dev in Build-Depends to >= 1.2. + * debian/copyright: Complete copyright information. (Closes: #719603) + - Update Format URL. + - Add missing license for src/shaders/post_processing/gen7/*.g4a. + - Add full text of EPL-1.0. + - Update copyright years. + + -- Matteo F. Vescovi Sun, 08 Sep 2013 02:04:00 +0200 + +intel-vaapi-driver (1.0.20-2) unstable; urgency=low + + * Upload to unstable + * Enable verbose builds + + -- Reinhard Tartler Thu, 23 May 2013 07:28:04 +0200 + +intel-vaapi-driver (1.0.20-1) experimental; urgency=low + + [ Matteo F. Vescovi ] + * New upstream release + - Supports more decoding profiles for older hardware, closes: #670921 + + [ Reinhard Tartler ] + * Clarify changelog + + -- Reinhard Tartler Fri, 29 Mar 2013 10:12:26 +0100 + +intel-vaapi-driver (1.0.19-1) experimental; urgency=low + + [ Matteo F. Vescovi ] + * New upstream release + * debian/control: S-V 3.9.3 => 3.9.4 (no changes needed) + * debian/control: Vcs-Git URL updated + + [ Reinhard Tartler ] + * bump library dependency on libav-dev (>> 1.0.16) + this is stated as such in the upstream's README + + -- Matteo F. Vescovi Tue, 15 Jan 2013 16:23:59 +0100 + +intel-vaapi-driver (1.0.17-1) unstable; urgency=low + + [ Matteo F. Vescovi ] + * New upstream release + + -- Andres Mejia Tue, 01 May 2012 22:23:31 -0400 + +intel-vaapi-driver (1.0.16-4) unstable; urgency=low + + * Rename libva-intel-vaapi-driver package back to i965-va-driver. + This is done to match naming sceme picked for other VAAPI modules. + The name is picked by looking at the name of the *.so file installed + under /usr/lib//dri, and using the first part of the name. + In this case, the driver file is named "i965_drv_video.so" and so the + package to install the driver is named i965-va-driver. + + -- Andres Mejia Tue, 20 Mar 2012 11:16:29 -0400 + +intel-vaapi-driver (1.0.16-3) unstable; urgency=low + + * Set Architecture field to specific supported architecture fields. + + -- Andres Mejia Sat, 17 Mar 2012 10:01:45 -0400 + +intel-vaapi-driver (1.0.16-2) unstable; urgency=low + + * Make driver build only on i386 and amd64 architectures. + + -- Andres Mejia Fri, 16 Mar 2012 23:20:26 -0400 + +intel-vaapi-driver (1.0.16-1) unstable; urgency=low + + [ Matteo F. Vescovi ] + * debian/README.Debian: list of supported hardware (Closes: #623045) + * debian/control: list of platform definitions added + * debian/control: Standards-Version bumped to 3.9.3 + * debian/: Multi-Arch support added + + [ Andres Mejia ] + * Add options to unapply patches and abort on upstream changes. + * Fix Priority fields in packages. + * Don't include version depends in Replaces field. + * Add Provides on i965-va-driver for libva-intel-vaapi-driver package. + * Remove compression option, it is now gz. + * Remove some unneeded lines from debian/rules. + * Support parallel builds. + * Install NEWS file as changelog and don't install README. README is repition + of package description. + * Fix watch file. + * Add myself to uploaders field. + + -- Andres Mejia Fri, 16 Mar 2012 12:37:33 -0400 intel-vaapi-driver (1.0.15-1) experimental; urgency=low diff -Nru intel-vaapi-driver-1.0.15/debian/compat intel-vaapi-driver-1.7.1/debian/compat --- intel-vaapi-driver-1.0.15/debian/compat 2012-01-04 19:06:32.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/compat 2014-06-16 08:13:49.000000000 +0000 @@ -1 +1 @@ -8 +9 diff -Nru intel-vaapi-driver-1.0.15/debian/control intel-vaapi-driver-1.7.1/debian/control --- intel-vaapi-driver-1.0.15/debian/control 2012-03-05 11:54:19.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/control 2016-06-22 07:14:07.000000000 +0000 @@ -1,81 +1,52 @@ Source: intel-vaapi-driver -Section: libs -Priority: extra -Maintainer: Ubuntu Developers -XSBC-Original-Maintainer: Debian Multimedia Maintainers +Section: video +Priority: optional +Maintainer: Debian Multimedia Maintainers Uploaders: Brandon Snider , Reinhard Tartler , - Matteo F. Vescovi + Matteo F. Vescovi , + Sebastian Ramacher Build-Depends: - debhelper (>= 8), + debhelper (>= 9), dh-autoreconf, - libdrm-dev, - libva-dev (>> 1.0.15~), + intel-gpu-tools (>= 1.9) [amd64 i386], + libdrm-dev (>= 2.4.52), + libva-dev (>= 1.7.1), + libwayland-dev (>= 1.0.0) [amd64 i386], libx11-dev, - pkg-config -Standards-Version: 3.9.2 + pkg-config, + python [amd64 i386] +Standards-Version: 3.9.8 Homepage: http://www.freedesktop.org/wiki/Software/vaapi -Vcs-Git: git://git.debian.org/pkg-multimedia/intel-vaapi-driver.git -Vcs-Browser: http://anonscm.debian.org/gitweb/?p=pkg-multimedia/intel-vaapi-driver.git +Vcs-Git: https://anonscm.debian.org/git/pkg-multimedia/intel-vaapi-driver.git +Vcs-Browser: https://anonscm.debian.org/cgit/pkg-multimedia/intel-vaapi-driver.git -Package: libva-intel-vaapi-driver -Architecture: any +Package: i965-va-driver +Architecture: amd64 i386 kfreebsd-amd64 kfreebsd-i386 +Multi-Arch: same +Pre-Depends: ${misc:Pre-Depends} Depends: - libva1, ${misc:Depends}, ${shlibs:Depends} -Breaks: - i965-va-driver (<< 1.0.15~) -Replaces: - i965-va-driver (<< 1.0.15~) +Provides: + va-driver +Enhances: + libva1 Description: VAAPI driver for Intel G45 & HD Graphics family The VA-API (Video Acceleration API) enables hardware accelerated video decode/encode at various entry-points (VLD, IDCT, Motion Compensation etc.) for the prevailing coding standards today (MPEG-2, MPEG-4 - ASP/H.263, MPEG-4 AVC/H.264, and VC-1/VMW3). It provides an interface - to fully expose the video decode capabilities in today's GPUs. - . - This package contains the video decode & encode driver backend for the - Intel G45 chipsets and Intel HD Graphics for Intel Core processor - family. - -Package: i965-va-driver -Architecture: all -Depends: - libva-intel-vaapi-driver, - ${misc:Depends} -Section: oldlibs -Description: VAAPI driver for Intel G45 & HD Graphics family (transitional package) - The VA-API (Video Acceleration API) enables hardware accelerated video - decode/encode at various entry-points (VLD, IDCT, Motion Compensation - etc.) for the prevailing coding standards today (MPEG-2, MPEG-4 - ASP/H.263, MPEG-4 AVC/H.264, and VC-1/VMW3). It provides an interface - to fully expose the video decode capabilities in today's GPUs. - . - This package installs the video decode & encode driver backend for the - Intel G45 chipsets and Intel HD Graphics for Intel Core processor - family. - . - This package ensures a smooth upgrades from previous versions of Debian. - It can safely be removed if no other packages depend on it. - -Package: libva-intel-vaapi-driver-dbg -Section: debug -Architecture: any -Depends: - libva-intel-vaapi-driver (= ${binary:Version}), - ${misc:Depends} -Description: VAAPI driver for Intel G45 & HD Graphics family (debug symbols) - Video decode & encode driver for Intel G45 chipsets and Intel HD - Graphics for Intel Core processor family. - . - The VA-API (Video Acceleration API) enables hardware accelerated video - decode/encode at various entry-points (VLD, IDCT, Motion Compensation - etc.) for the prevailing coding standards today (MPEG-2, MPEG-4 - ASP/H.263, MPEG-4 AVC/H.264, and VC-1/VMW3). It provides an interface + ASP/H.263, MPEG-4 AVC/H.264, and VC-1/WMV3). It provides an interface to fully expose the video decode capabilities in today's GPUs. . - This package contains the debug files for the video decode & encode - driver backend for the Intel G45 chipsets and Intel HD Graphics for - Intel Core processor family. + This package contains the video decode and encode driver backend for the + Intel G45 chipsets and Intel HD Graphics for the Intel Core processor family. + The supported platforms include: + * Cantiga, Intel GMA 4500MHD (GM45) + * Ironlake, Intel HD Graphics for 2010 Intel Core processor family + * Sandy Bridge, Intel HD Graphics for 2011 Intel Core processor family + * Ivy Bridge + * Haswell + * Broadwell + * Skylake diff -Nru intel-vaapi-driver-1.0.15/debian/copyright intel-vaapi-driver-1.7.1/debian/copyright --- intel-vaapi-driver-1.0.15/debian/copyright 2012-01-05 11:47:59.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/copyright 2015-06-04 10:28:43.000000000 +0000 @@ -1,4 +1,4 @@ -Format: http://anonscm.debian.org/viewvc/dep/web/deps/dep5.mdwn?revision=240 +Format: http://www.debian.org/doc/packaging-manuals/copyright-format/1.0/ Upstream-Name: i965-va-driver Upstream-Contact: Chang Zhou Gwenole Beauchesne @@ -7,39 +7,265 @@ Source: http://www.freedesktop.org/wiki/Software/vaapi Files: * -Copyright: 2006-2009, Intel Corportation +Copyright: 2006-2015, Intel Corportation 2009, Splitted-Desktop Systems - All Rights Reserved -License: - Permission is hereby granted, free of charge, to any person obtaining a - copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sub license, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: +License: Expat + +Files: src/shaders/* +Copyright: 2006,2008-2014, Intel Corportation +License: EPL-1.0 + THE ACCOMPANYING PROGRAM IS PROVIDED UNDER THE TERMS OF THIS ECLIPSE + PUBLIC LICENSE ("AGREEMENT"). ANY USE, REPRODUCTION OR DISTRIBUTION + OF THE PROGRAM CONSTITUTES RECIPIENT'S ACCEPTANCE OF THIS AGREEMENT. . - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial portions - of the Software. + 1. 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If all Recipient's + rights under this Agreement terminate, Recipient agrees to cease use + and distribution of the Program as soon as reasonably + practicable. However, Recipient's obligations under this Agreement + and any licenses granted by Recipient relating to the Program shall + continue and survive. + . + Everyone is permitted to copy and distribute copies of this + Agreement, but in order to avoid inconsistency the Agreement is + copyrighted and may only be modified in the following manner. The + Agreement Steward reserves the right to publish new versions + (including revisions) of this Agreement from time to time. No one + other than the Agreement Steward has the right to modify this + Agreement. The Eclipse Foundation is the initial Agreement + Steward. The Eclipse Foundation may assign the responsibility to + serve as the Agreement Steward to a suitable separate entity. Each + new version of the Agreement will be given a distinguishing version + number. The Program (including Contributions) may always be + distributed subject to the version of the Agreement under which it + was received. In addition, after a new version of the Agreement is + published, Contributor may elect to distribute the Program (including + its Contributions) under the new version. Except as expressly stated + in Sections 2(a) and 2(b) above, Recipient receives no rights or + licenses to the intellectual property of any Contributor under this + Agreement, whether expressly, by implication, estoppel or + otherwise. All rights in the Program not expressly granted under this + Agreement are reserved. + . + This Agreement is governed by the laws of the State of New York and + the intellectual property laws of the United States of America. No + party to this Agreement will bring a legal action under this + Agreement more than one year after the cause of action arose. Each + party waives its rights to a jury trial in any resulting litigation. -Files: src/shaders/* -Copyright: 2010, Intel Corportation -License: EPL - This program is licensed under the terms and conditions of the - Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - http://www.opensource.org/licenses/eclipse-1.0.php. +Files: src/shaders/post_processing/gen7/*.g4a + src/shaders/post_processing/gen8/*.g8a +Copyright: 2000-2012, Intel Corportation +License: Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + . + http://www.apache.org/licenses/LICENSE-2.0 + . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. + . + On a Debian system, the complete text of the Apache License, Version 2.0 can be + found in "/usr/share/common-licenses/Apache-2.0". + +Files: src/shaders/render/*.g8a + src/shaders/render/*.g9a +Copyright: 2013-2014, Intel Corporation +License: Expat Files: debian/* Copyright: 2011 Brandon Snider + 2013-2014 Sebastian Ramacher License: GPL-2+ This package is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -56,3 +282,25 @@ . On Debian systems, the complete text of the GNU General Public License version 2 can be found in "/usr/share/common-licenses/GPL-2". + +License: Expat + Permission is hereby granted, free of charge, to any person obtaining a + copy of this software and associated documentation files (the + "Software"), to deal in the Software without restriction, including + without limitation the rights to use, copy, modify, merge, publish, + distribute, sub license, and/or sell copies of the Software, and to + permit persons to whom the Software is furnished to do so, subject to + the following conditions: + . + The above copyright notice and this permission notice (including the + next paragraph) shall be included in all copies or substantial portions + of the Software. + . + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + diff -Nru intel-vaapi-driver-1.0.15/debian/docs intel-vaapi-driver-1.7.1/debian/docs --- intel-vaapi-driver-1.0.15/debian/docs 2012-01-04 19:06:32.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/docs 1970-01-01 00:00:00.000000000 +0000 @@ -1,2 +0,0 @@ -NEWS -README diff -Nru intel-vaapi-driver-1.0.15/debian/gbp.conf intel-vaapi-driver-1.7.1/debian/gbp.conf --- intel-vaapi-driver-1.0.15/debian/gbp.conf 2012-01-04 19:56:39.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/gbp.conf 2015-04-20 21:13:33.000000000 +0000 @@ -1,3 +1,3 @@ [DEFAULT] pristine-tar = True -compression = bzip2 +compression = bz2 diff -Nru intel-vaapi-driver-1.0.15/debian/intel-get-orig-source intel-vaapi-driver-1.7.1/debian/intel-get-orig-source --- intel-vaapi-driver-1.0.15/debian/intel-get-orig-source 2012-01-04 19:06:32.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/intel-get-orig-source 1970-01-01 00:00:00.000000000 +0000 @@ -1,65 +0,0 @@ -#!/bin/sh - -# This script is used to download the upstream source for libva and -# generate it into an orig source tarball for Debian. - -# Common variables used to ease maintenance of this script -I965_VERSION="1.0.15" -I965_TARBALL="intel-driver-$I965_VERSION.tar.gz" -I965_ORIG_TARBALL="intel-driver_$I965_VERSION.orig.tar.gz" -USAGE="\n\ -This script is used to generate the orig tarball used in building\n\ -Debian packages for intel-driver-$I965_VERSION.\n\ -Usage: i965-get-orig-source [OPTION]\n\ -\n\ - -h, --help Display this help message.\n" - -while [ "$#" -gt "0" ] -do - case "$1" in - -h|--help|*) - echo "${USAGE}" - exit 1 - ;; - esac -done - -make_current_tarball() { - # Download the tarball if it's not available in the current directory - [ -f $I965_TARBALL ] || \ - wget -c http://cgit.freedesktop.org/vaapi/intel-driver/snapshot/$I965_TARBALL - - # Extract tarball and run 'autoreconf -vif' - echo "Extracting tarball and running 'autoreconf -vif'" - tar -zxf $I965_TARBALL - cd intel-driver-$I965_VERSION - autoreconf -vif - cd .. - - # Remove temp files and other cruft from source tarball - # The find command snippet here was taken from debhelper's dh_clean command - # with some modification to delete more unneeded files. - echo "Removing temp files and other cruft from source tarball" - find intel-driver-$I965_VERSION \( \( -type f -a \ - \( -name '#*#' -o -name '.*~' -o -name '*~' -o -name DEADJOE \ - -o -name '*.orig' -o -name '*.rej' -o -name '*.bak' \ - -o -name '.*.orig' -o -name .*.rej -o -name '.SUMS' \ - -o -name TAGS -o \( -path '*/.deps/*' -a -name '*.P' \) \ - -o -name config.status -o -name config.cache -o -name config.log \ - \) -exec rm -f "{}" \; \) -o \ - \( -type d -a -name autom4te.cache -prune -exec rm -rf "{}" \; \) \) - rm intel-driver-$I965_VERSION/.gitignore - rm intel-driver-$I965_VERSION/.cvsignore - rm -rf intel-driver-$I965_VERSION/debian.upstream - rm -rf intel-driver-$I965_VERSION/debian - - # Remove empty directories - echo "Removing empty directories" - find intel-driver-$I965_VERSION -type d -empty -delete - - # Repack tarball to final orig tarball - echo "Creating orig tarball" - tar --exclude-vcs -zcf "$I965_ORIG_TARBALL" "intel-driver-$I965_VERSION/" -} - -make_current_tarball diff -Nru intel-vaapi-driver-1.0.15/debian/libva-intel-vaapi-driver.install intel-vaapi-driver-1.7.1/debian/libva-intel-vaapi-driver.install --- intel-vaapi-driver-1.0.15/debian/libva-intel-vaapi-driver.install 2012-03-26 19:33:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/libva-intel-vaapi-driver.install 1970-01-01 00:00:00.000000000 +0000 @@ -1 +0,0 @@ -usr/lib/*/dri/*.so diff -Nru intel-vaapi-driver-1.0.15/debian/patches/0001-Fix_FTBFS_on_kFreeBSD.patch intel-vaapi-driver-1.7.1/debian/patches/0001-Fix_FTBFS_on_kFreeBSD.patch --- intel-vaapi-driver-1.0.15/debian/patches/0001-Fix_FTBFS_on_kFreeBSD.patch 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/patches/0001-Fix_FTBFS_on_kFreeBSD.patch 2014-06-16 08:13:49.000000000 +0000 @@ -0,0 +1,33 @@ +From: "Matteo F. Vescovi" +Date: Fri, 27 Sep 2013 09:49:05 +0200 +Subject: Fix_FTBFS_on_kFreeBSD + +--- + src/intel_driver.h | 1 + + src/intel_memman.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/src/intel_driver.h b/src/intel_driver.h +index 8f44274..7f83eb6 100644 +--- a/src/intel_driver.h ++++ b/src/intel_driver.h +@@ -5,6 +5,7 @@ + #include + #include + #include ++#include + + #include + #include +diff --git a/src/intel_memman.c b/src/intel_memman.c +index 7d56e96..bacad73 100644 +--- a/src/intel_memman.c ++++ b/src/intel_memman.c +@@ -28,6 +28,7 @@ + */ + + #include ++#include + + #include "intel_driver.h" + diff -Nru intel-vaapi-driver-1.0.15/debian/patches/factor-out-typedefs.patch intel-vaapi-driver-1.7.1/debian/patches/factor-out-typedefs.patch --- intel-vaapi-driver-1.0.15/debian/patches/factor-out-typedefs.patch 2012-03-12 14:19:08.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/patches/factor-out-typedefs.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,244 +0,0 @@ -commit 99ded53e66af1903f1d58ffbc24404d435a6de84 -Author: Gwenole Beauchesne -Date: Mon Jan 30 11:05:17 2012 +0100 - - Factor out type definitions (GenFrameStore, GenBuffer). - - Signed-off-by: Gwenole Beauchesne - -diff --git a/src/Makefile.am b/src/Makefile.am -index 7a8de4d..f472655 100644 ---- a/src/Makefile.am -+++ b/src/Makefile.am -@@ -76,6 +76,7 @@ source_h = \ - i965_avc_bsd.h \ - i965_avc_hw_scoreboard.h\ - i965_avc_ildb.h \ -+ i965_decoder.h \ - i965_defines.h \ - i965_drv_video.h \ - i965_encoder.h \ -diff --git a/src/gen6_mfd.h b/src/gen6_mfd.h -index 46bb0e4..bf06a00 100644 ---- a/src/gen6_mfd.h -+++ b/src/gen6_mfd.h -@@ -33,6 +33,7 @@ - #include - #include - #include -+#include "i965_decoder.h" - - struct gen6_avc_surface - { -@@ -58,7 +59,6 @@ struct gen6_vc1_surface - int picture_type; - }; - --#define MAX_MFX_REFERENCE_SURFACES 16 - struct hw_context; - - struct gen6_mfd_context -@@ -69,45 +69,14 @@ struct gen6_mfd_context - VAIQMatrixBufferMPEG2 mpeg2; - } iq_matrix; - -- struct { -- VASurfaceID surface_id; -- int frame_store_id; -- } reference_surface[MAX_MFX_REFERENCE_SURFACES]; -- -- struct { -- dri_bo *bo; -- int valid; -- } post_deblocking_output; -- -- struct { -- dri_bo *bo; -- int valid; -- } pre_deblocking_output; -- -- struct { -- dri_bo *bo; -- int valid; -- } intra_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } deblocking_filter_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } bsd_mpc_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } mpr_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } bitplane_read_buffer; -+ GenFrameStore reference_surface[MAX_GEN_REFERENCE_FRAMES]; -+ GenBuffer post_deblocking_output; -+ GenBuffer pre_deblocking_output; -+ GenBuffer intra_row_store_scratch_buffer; -+ GenBuffer deblocking_filter_row_store_scratch_buffer; -+ GenBuffer bsd_mpc_row_store_scratch_buffer; -+ GenBuffer mpr_row_store_scratch_buffer; -+ GenBuffer bitplane_read_buffer; - }; - - #endif /* _GEN6_MFD_H_ */ -diff --git a/src/gen7_mfd.h b/src/gen7_mfd.h -index 088dbda..08658f4 100644 ---- a/src/gen7_mfd.h -+++ b/src/gen7_mfd.h -@@ -33,6 +33,7 @@ - #include - #include - #include -+#include "i965_decoder.h" - - struct gen7_avc_surface - { -@@ -58,7 +59,6 @@ struct gen7_vc1_surface - int picture_type; - }; - --#define MAX_MFX_REFERENCE_SURFACES 16 - struct hw_context; - - struct gen7_mfd_context -@@ -69,45 +69,14 @@ struct gen7_mfd_context - VAIQMatrixBufferMPEG2 mpeg2; - } iq_matrix; - -- struct { -- VASurfaceID surface_id; -- int frame_store_id; -- } reference_surface[MAX_MFX_REFERENCE_SURFACES]; -- -- struct { -- dri_bo *bo; -- int valid; -- } post_deblocking_output; -- -- struct { -- dri_bo *bo; -- int valid; -- } pre_deblocking_output; -- -- struct { -- dri_bo *bo; -- int valid; -- } intra_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } deblocking_filter_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } bsd_mpc_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } mpr_row_store_scratch_buffer; -- -- struct { -- dri_bo *bo; -- int valid; -- } bitplane_read_buffer; -+ GenFrameStore reference_surface[MAX_GEN_REFERENCE_FRAMES]; -+ GenBuffer post_deblocking_output; -+ GenBuffer pre_deblocking_output; -+ GenBuffer intra_row_store_scratch_buffer; -+ GenBuffer deblocking_filter_row_store_scratch_buffer; -+ GenBuffer bsd_mpc_row_store_scratch_buffer; -+ GenBuffer mpr_row_store_scratch_buffer; -+ GenBuffer bitplane_read_buffer; - }; - - #endif /* _GEN7_MFD_H_ */ -diff --git a/src/i965_decoder.h b/src/i965_decoder.h -new file mode 100644 -index 0000000..0e69e14 ---- /dev/null -+++ b/src/i965_decoder.h -@@ -0,0 +1,46 @@ -+/* -+ * Copyright (C) 2012 Intel Corporation -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the -+ * "Software"), to deal in the Software without restriction, including -+ * without limitation the rights to use, copy, modify, merge, publish, -+ * distribute, sub license, and/or sell copies of the Software, and to -+ * permit persons to whom the Software is furnished to do so, subject to -+ * the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS -+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. -+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR -+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#ifndef I965_DECODER_H -+#define I965_DECODER_H -+ -+#include -+#include -+#include -+ -+#define MAX_GEN_REFERENCE_FRAMES 16 -+ -+typedef struct gen_frame_store GenFrameStore; -+struct gen_frame_store { -+ VASurfaceID surface_id; -+ int frame_store_id; -+}; -+ -+typedef struct gen_buffer GenBuffer; -+struct gen_buffer { -+ dri_bo *bo; -+ int valid; -+}; -+ -+#endif /* I965_DECODER_H */ -diff --git a/src/i965_media_h264.h b/src/i965_media_h264.h -index 8a8dc8e..490213c 100644 ---- a/src/i965_media_h264.h -+++ b/src/i965_media_h264.h -@@ -4,6 +4,7 @@ - #include "i965_avc_bsd.h" - #include "i965_avc_hw_scoreboard.h" - #include "i965_avc_ildb.h" -+#include "i965_decoder.h" - - struct decode_state; - struct i965_media_context; -@@ -60,10 +61,7 @@ struct i965_h264_context - struct i965_avc_hw_scoreboard_context avc_hw_scoreboard_context; - struct i965_avc_ildb_context avc_ildb_context; - -- struct { -- VASurfaceID surface_id; -- int frame_store_id; -- } fsid_list[16]; -+ GenFrameStore fsid_list[MAX_GEN_REFERENCE_FRAMES]; - - struct i965_kernel avc_kernels[NUM_H264_AVC_KERNELS]; - struct intel_batchbuffer *batch; diff -Nru intel-vaapi-driver-1.0.15/debian/patches/fix-ref-idx-state.patch intel-vaapi-driver-1.7.1/debian/patches/fix-ref-idx-state.patch --- intel-vaapi-driver-1.0.15/debian/patches/fix-ref-idx-state.patch 2012-03-12 14:19:13.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/patches/fix-ref-idx-state.patch 1970-01-01 00:00:00.000000000 +0000 @@ -1,528 +0,0 @@ -commit 368731d104da84605fcf6683d6ce014916fe76b0 -Author: Gwenole Beauchesne -Date: Sun Jan 29 19:07:37 2012 +0100 - - h264: fix and simplify REF_IDX_STATE (ILK, SNB, IVB). - - Original code was parsing RefPicList0/1 over what is actually available - and filled in, i.e. wrt. num_ref_idx_l0/1_minus1 + 1. Besides, bit 5 of - Reference List Entry set to 1 means a frame, not a field. - - Signed-off-by: Gwenole Beauchesne - -diff --git a/NEWS b/NEWS -index f0244ad..58ef116 100644 ---- a/NEWS -+++ b/NEWS -@@ -1,6 +1,9 @@ --libva-driver-intel NEWS -- summary of changes. 2011-10-28 -+libva-driver-intel NEWS -- summary of changes. 2012-02-DD - Copyright (C) 2009-2011 Intel Corporation - -+Version 1.0.16 - DD.Feb.2012 -+* Fix and simplify AVC_REF_IDX_STATE setup (ILK, SNB, IVB) -+ - Version 1.0.15 - 28.Oct.2011 - * Add auto-generated Debian packaging - * Fix VC-1 decoding (TTFRM packing) -diff --git a/src/Makefile.am b/src/Makefile.am -index f472655..1e4bbf2 100644 ---- a/src/Makefile.am -+++ b/src/Makefile.am -@@ -54,6 +54,7 @@ source_c = \ - i965_avc_bsd.c \ - i965_avc_hw_scoreboard.c\ - i965_avc_ildb.c \ -+ i965_decoder_utils.c \ - i965_drv_video.c \ - i965_encoder.c \ - i965_media.c \ -@@ -77,6 +78,7 @@ source_h = \ - i965_avc_hw_scoreboard.h\ - i965_avc_ildb.h \ - i965_decoder.h \ -+ i965_decoder_utils.h \ - i965_defines.h \ - i965_drv_video.h \ - i965_encoder.h \ -diff --git a/src/gen6_mfd.c b/src/gen6_mfd.c -index a38360b..811135c 100644 ---- a/src/gen6_mfd.c -+++ b/src/gen6_mfd.c -@@ -36,6 +36,7 @@ - - #include "i965_defines.h" - #include "i965_drv_video.h" -+#include "i965_decoder_utils.h" - - #include "gen6_mfd.h" - -@@ -781,81 +782,17 @@ gen6_mfd_avc_phantom_slice_state(VADriverContextP ctx, - ADVANCE_BCS_BATCH(batch); - } - --static void -+static inline void - gen6_mfd_avc_ref_idx_state(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - VASliceParameterBufferH264 *slice_param, - struct gen6_mfd_context *gen6_mfd_context) - { -- struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; -- int i, j, num_ref_list; -- struct { -- unsigned char bottom_idc:1; -- unsigned char frame_store_index:4; -- unsigned char field_picture:1; -- unsigned char long_term:1; -- unsigned char non_exist:1; -- } refs[32]; -- -- if (slice_param->slice_type == SLICE_TYPE_I || -- slice_param->slice_type == SLICE_TYPE_SI) -- return; -- -- if (slice_param->slice_type == SLICE_TYPE_P || -- slice_param->slice_type == SLICE_TYPE_SP) { -- num_ref_list = 1; -- } else { -- num_ref_list = 2; -- } -- -- for (i = 0; i < num_ref_list; i++) { -- VAPictureH264 *va_pic; -- -- if (i == 0) { -- va_pic = slice_param->RefPicList0; -- } else { -- va_pic = slice_param->RefPicList1; -- } -- -- BEGIN_BCS_BATCH(batch, 10); -- OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); -- OUT_BCS_BATCH(batch, i); -- -- for (j = 0; j < 32; j++) { -- if (va_pic->flags & VA_PICTURE_H264_INVALID) { -- refs[j].non_exist = 1; -- refs[j].long_term = 1; -- refs[j].field_picture = 1; -- refs[j].frame_store_index = 0xf; -- refs[j].bottom_idc = 1; -- } else { -- int frame_idx; -- -- for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface); frame_idx++) { -- if (gen6_mfd_context->reference_surface[frame_idx].surface_id != VA_INVALID_ID && -- va_pic->picture_id == gen6_mfd_context->reference_surface[frame_idx].surface_id) { -- assert(frame_idx == gen6_mfd_context->reference_surface[frame_idx].frame_store_id); -- break; -- } -- } -- -- assert(frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface)); -- -- refs[j].non_exist = 0; -- refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); -- refs[j].field_picture = !!(va_pic->flags & -- (VA_PICTURE_H264_TOP_FIELD | -- VA_PICTURE_H264_BOTTOM_FIELD)); -- refs[j].frame_store_index = frame_idx; -- refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); -- } -- -- va_pic++; -- } -- -- intel_batchbuffer_data(batch, refs, sizeof(refs)); -- ADVANCE_BCS_BATCH(batch); -- } -+ gen6_send_avc_ref_idx_state( -+ gen6_mfd_context->base.batch, -+ slice_param, -+ gen6_mfd_context->reference_surface -+ ); - } - - static void -diff --git a/src/gen7_mfd.c b/src/gen7_mfd.c -index 07cc0c9..ca468cb 100644 ---- a/src/gen7_mfd.c -+++ b/src/gen7_mfd.c -@@ -36,6 +36,7 @@ - - #include "i965_defines.h" - #include "i965_drv_video.h" -+#include "i965_decoder_utils.h" - - #include "gen7_mfd.h" - -@@ -750,81 +751,17 @@ gen7_mfd_avc_slice_state(VADriverContextP ctx, - ADVANCE_BCS_BATCH(batch); - } - --static void -+static inline void - gen7_mfd_avc_ref_idx_state(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - VASliceParameterBufferH264 *slice_param, - struct gen7_mfd_context *gen7_mfd_context) - { -- struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; -- int i, j, num_ref_list; -- struct { -- unsigned char bottom_idc:1; -- unsigned char frame_store_index:4; -- unsigned char field_picture:1; -- unsigned char long_term:1; -- unsigned char non_exist:1; -- } refs[32]; -- -- if (slice_param->slice_type == SLICE_TYPE_I || -- slice_param->slice_type == SLICE_TYPE_SI) -- return; -- -- if (slice_param->slice_type == SLICE_TYPE_P || -- slice_param->slice_type == SLICE_TYPE_SP) { -- num_ref_list = 1; -- } else { -- num_ref_list = 2; -- } -- -- for (i = 0; i < num_ref_list; i++) { -- VAPictureH264 *va_pic; -- -- if (i == 0) { -- va_pic = slice_param->RefPicList0; -- } else { -- va_pic = slice_param->RefPicList1; -- } -- -- BEGIN_BCS_BATCH(batch, 10); -- OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); -- OUT_BCS_BATCH(batch, i); -- -- for (j = 0; j < 32; j++) { -- if (va_pic->flags & VA_PICTURE_H264_INVALID) { -- refs[j].non_exist = 1; -- refs[j].long_term = 1; -- refs[j].field_picture = 1; -- refs[j].frame_store_index = 0xf; -- refs[j].bottom_idc = 1; -- } else { -- int frame_idx; -- -- for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface); frame_idx++) { -- if (gen7_mfd_context->reference_surface[frame_idx].surface_id != VA_INVALID_ID && -- va_pic->picture_id == gen7_mfd_context->reference_surface[frame_idx].surface_id) { -- assert(frame_idx == gen7_mfd_context->reference_surface[frame_idx].frame_store_id); -- break; -- } -- } -- -- assert(frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface)); -- -- refs[j].non_exist = 0; -- refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); -- refs[j].field_picture = !!(va_pic->flags & -- (VA_PICTURE_H264_TOP_FIELD | -- VA_PICTURE_H264_BOTTOM_FIELD)); -- refs[j].frame_store_index = frame_idx; -- refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); -- } -- -- va_pic++; -- } -- -- intel_batchbuffer_data(batch, refs, sizeof(refs)); -- ADVANCE_BCS_BATCH(batch); -- } -+ gen6_send_avc_ref_idx_state( -+ gen7_mfd_context->base.batch, -+ slice_param, -+ gen7_mfd_context->reference_surface -+ ); - } - - static void -diff --git a/src/i965_avc_bsd.c b/src/i965_avc_bsd.c -index 9fa9649..6f133a3 100644 ---- a/src/i965_avc_bsd.c -+++ b/src/i965_avc_bsd.c -@@ -38,6 +38,7 @@ - #include "i965_avc_bsd.h" - #include "i965_media_h264.h" - #include "i965_media.h" -+#include "i965_decoder_utils.h" - - static void - i965_avc_bsd_free_avc_bsd_surface(void **data) -@@ -259,13 +260,7 @@ i965_avc_bsd_slice_state(VADriverContextP ctx, - { - struct intel_batchbuffer *batch = i965_h264_context->batch; - int present_flag, cmd_len, list, j; -- struct { -- unsigned char bottom_idc:1; -- unsigned char frame_store_index:4; -- unsigned char field_picture:1; -- unsigned char long_term:1; -- unsigned char non_exist:1; -- } refs[32]; -+ uint8_t ref_idx_state[32]; - char weightoffsets[32 * 6]; - - /* don't issue SLICE_STATE for intra-prediction decoding */ -@@ -302,53 +297,28 @@ i965_avc_bsd_slice_state(VADriverContextP ctx, - OUT_BCS_BATCH(batch, present_flag); - - for (list = 0; list < 2; list++) { -- int flag; -+ int flag, num_va_pics; - VAPictureH264 *va_pic; - - if (list == 0) { -- flag = PRESENT_REF_LIST0; -- va_pic = slice_param->RefPicList0; -+ flag = PRESENT_REF_LIST0; -+ va_pic = slice_param->RefPicList0; -+ num_va_pics = slice_param->num_ref_idx_l0_active_minus1 + 1; - } else { -- flag = PRESENT_REF_LIST1; -- va_pic = slice_param->RefPicList1; -+ flag = PRESENT_REF_LIST1; -+ va_pic = slice_param->RefPicList1; -+ num_va_pics = slice_param->num_ref_idx_l1_active_minus1 + 1; - } - - if (!(present_flag & flag)) - continue; - -- for (j = 0; j < 32; j++) { -- if (va_pic->flags & VA_PICTURE_H264_INVALID) { -- refs[j].non_exist = 1; -- refs[j].long_term = 1; -- refs[j].field_picture = 1; -- refs[j].frame_store_index = 0xf; -- refs[j].bottom_idc = 1; -- } else { -- int frame_idx; -- -- for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) { -- if (i965_h264_context->fsid_list[frame_idx].surface_id != VA_INVALID_ID && -- va_pic->picture_id == i965_h264_context->fsid_list[frame_idx].surface_id) { -- assert(frame_idx == i965_h264_context->fsid_list[frame_idx].frame_store_id); -- break; -- } -- } -- -- assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list)); -- -- refs[j].non_exist = 0; -- refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); -- refs[j].field_picture = !!(va_pic->flags & -- (VA_PICTURE_H264_TOP_FIELD | -- VA_PICTURE_H264_BOTTOM_FIELD)); -- refs[j].frame_store_index = frame_idx; -- refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); -- } -- -- va_pic++; -- } -- -- intel_batchbuffer_data(batch, refs, sizeof(refs)); -+ gen5_fill_avc_ref_idx_state( -+ ref_idx_state, -+ va_pic, num_va_pics, -+ i965_h264_context->fsid_list -+ ); -+ intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state)); - } - - i965_h264_context->weight128_luma_l0 = 0; -diff --git a/src/i965_decoder_utils.c b/src/i965_decoder_utils.c -new file mode 100644 -index 0000000..36f51c4 ---- /dev/null -+++ b/src/i965_decoder_utils.c -@@ -0,0 +1,130 @@ -+/* -+ * Copyright (C) 2006-2012 Intel Corporation -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the next -+ * paragraph) shall be included in all copies or substantial portions of the -+ * Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include -+#include -+#include "intel_batchbuffer.h" -+#include "i965_decoder_utils.h" -+#include "i965_defines.h" -+ -+static inline uint8_t -+get_ref_idx_state_1(const VAPictureH264 *va_pic, unsigned int frame_store_id) -+{ -+ const unsigned int is_long_term = -+ !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); -+ const unsigned int is_top_field = -+ !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD); -+ const unsigned int is_bottom_field = -+ !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); -+ -+ return ((is_long_term << 6) | -+ ((is_top_field ^ is_bottom_field ^ 1) << 5) | -+ (frame_store_id << 1) | -+ ((is_top_field ^ 1) & is_bottom_field)); -+} -+ -+/* Fill in Reference List Entries (Gen5+: ILK, SNB, IVB) */ -+void -+gen5_fill_avc_ref_idx_state( -+ uint8_t state[32], -+ const VAPictureH264 ref_list[32], -+ unsigned int ref_list_count, -+ const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] -+) -+{ -+ unsigned int i, n, frame_idx; -+ -+ for (i = 0, n = 0; i < ref_list_count; i++) { -+ const VAPictureH264 * const va_pic = &ref_list[i]; -+ -+ if (va_pic->flags & VA_PICTURE_H264_INVALID) -+ continue; -+ -+ for (frame_idx = 0; frame_idx < MAX_GEN_REFERENCE_FRAMES; frame_idx++) { -+ const GenFrameStore * const fs = &frame_store[frame_idx]; -+ if (fs->surface_id != VA_INVALID_ID && -+ fs->surface_id == va_pic->picture_id) { -+ assert(frame_idx == fs->frame_store_id); -+ break; -+ } -+ } -+ assert(frame_idx < MAX_GEN_REFERENCE_FRAMES); -+ state[n++] = get_ref_idx_state_1(va_pic, frame_idx); -+ } -+ -+ for (; n < 32; n++) -+ state[n] = 0xff; -+} -+ -+/* Emit Reference List Entries (Gen6+: SNB, IVB) */ -+static void -+gen6_send_avc_ref_idx_state_1( -+ struct intel_batchbuffer *batch, -+ unsigned int list, -+ const VAPictureH264 *ref_list, -+ unsigned int ref_list_count, -+ const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] -+) -+{ -+ uint8_t ref_idx_state[32]; -+ -+ BEGIN_BCS_BATCH(batch, 10); -+ OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); -+ OUT_BCS_BATCH(batch, list); -+ gen5_fill_avc_ref_idx_state( -+ ref_idx_state, -+ ref_list, ref_list_count, -+ frame_store -+ ); -+ intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state)); -+ ADVANCE_BCS_BATCH(batch); -+} -+ -+void -+gen6_send_avc_ref_idx_state( -+ struct intel_batchbuffer *batch, -+ const VASliceParameterBufferH264 *slice_param, -+ const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] -+) -+{ -+ if (slice_param->slice_type == SLICE_TYPE_I || -+ slice_param->slice_type == SLICE_TYPE_SI) -+ return; -+ -+ /* RefPicList0 */ -+ gen6_send_avc_ref_idx_state_1( -+ batch, 0, -+ slice_param->RefPicList0, slice_param->num_ref_idx_l0_active_minus1 + 1, -+ frame_store -+ ); -+ -+ if (slice_param->slice_type != SLICE_TYPE_B) -+ return; -+ -+ /* RefPicList1 */ -+ gen6_send_avc_ref_idx_state_1( -+ batch, 1, -+ slice_param->RefPicList1, slice_param->num_ref_idx_l1_active_minus1 + 1, -+ frame_store -+ ); -+} -diff --git a/src/i965_decoder_utils.h b/src/i965_decoder_utils.h -new file mode 100644 -index 0000000..6390ecc ---- /dev/null -+++ b/src/i965_decoder_utils.h -@@ -0,0 +1,45 @@ -+/* -+ * Copyright (C) 2006-2012 Intel Corporation -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the next -+ * paragraph) shall be included in all copies or substantial portions of the -+ * Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+ -+#ifndef I965_DECODER_UTILS_H -+#define I965_DECODER_UTILS_H -+ -+#include "i965_decoder.h" -+#include "intel_batchbuffer.h" -+ -+void -+gen5_fill_avc_ref_idx_state( -+ uint8_t state[32], -+ const VAPictureH264 ref_list[32], -+ unsigned int ref_list_count, -+ const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] -+); -+ -+void -+gen6_send_avc_ref_idx_state( -+ struct intel_batchbuffer *batch, -+ const VASliceParameterBufferH264 *slice_param, -+ const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] -+); -+ -+#endif /* I965_DECODER_UTILS_H */ diff -Nru intel-vaapi-driver-1.0.15/debian/patches/series intel-vaapi-driver-1.7.1/debian/patches/series --- intel-vaapi-driver-1.0.15/debian/patches/series 2012-03-12 14:20:32.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/patches/series 2015-04-20 21:13:26.000000000 +0000 @@ -1,2 +1 @@ -factor-out-typedefs.patch -fix-ref-idx-state.patch +0001-Fix_FTBFS_on_kFreeBSD.patch diff -Nru intel-vaapi-driver-1.0.15/debian/README.Debian intel-vaapi-driver-1.7.1/debian/README.Debian --- intel-vaapi-driver-1.0.15/debian/README.Debian 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/README.Debian 2014-06-16 08:13:49.000000000 +0000 @@ -0,0 +1,48 @@ +intel-vaapi-driver for Debian +----------------------------- + +Supported hardware: +------------------ + +Sandybridge Intel® HD Graphics 2000/3000 + (used in 2nd Generation Intel® Core™ i7/i5/i3 processor family) +HD Intel® HD Graphics + (used in Intel® 2010 Core™ i7/i5/i3 processor family) +GMA3150 Intel® Graphics Media Accelerator 3150 + (used in Intel® Atom™ processor N450/D410/D450 family) +G45 Intel® G45 Express Chipset +Q45 Intel® Q45 Express Chipset +G43 Intel® G43 Express Chipset +Q43 Intel® Q43 Express Chipset +B43 Intel® B43 Express Chipset +G41 Intel® G41 Express Chipset +GM45 Mobile Intel® GM45/GS45/GL40 Express Chipset +G35 Intel® G35 Express Chipset +Q35 Intel® Q35 Express Chipset +Q33 Intel® Q33 Express Chipset +G33 Intel® G33/G31 Express Chipset +965GM Mobile Intel® GM965 Express Chipset +965G G965 Integrated Graphics Controller +965Q Q963/Q965 Integrated Graphics Controller +946GZ 946GZ/GL Integrated Graphics Controller +945G 945G Integrated Graphics Controller +945GM Mobile 945GM/GMS/940GML Express Integrated Graphics Controller +915G 82915G/GV/910GL Express Chipset Family Graphics Controller +915GM Mobile 915GM/GMS/910GML Express Graphics Controller +865G 82865G Integrated Graphics Controller +855GM 82852/855GM Integrated Graphics Device +845G 82845G/GL[Brookdale-G]/GE Chipset Integrated Graphics Device +i830M 82830 Chipset Graphics Controller +815 82815 Chipset Graphics Controller +810 82810 Chipset Graphics Controller +810-DC100 82810-M DC-100 System and Graphics Controller + +Codecs: +------ + +H.264 D ILK+ +H.264 E SNB+ +MPEG-2 D CTG+ +VC-1 D SNB+ + + -- Matteo F. Vescovi Mon, 09 Jan 2012 10:00:00 +0100 diff -Nru intel-vaapi-driver-1.0.15/debian/rules intel-vaapi-driver-1.7.1/debian/rules --- intel-vaapi-driver-1.0.15/debian/rules 2012-01-04 19:06:32.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/rules 2016-03-16 00:44:13.000000000 +0000 @@ -1,19 +1,14 @@ #!/usr/bin/make -f -# Uncomment this to turn on verbose mode. -#export DH_VERBOSE=1 -%: - dh $@ --with autoreconf - -.PHONY: override_dh_strip -override_dh_strip: - dh_strip --dbg-package=libva-intel-vaapi-driver-dbg +export V=1 +export DEB_LDFLAGS_MAINT_APPEND=-Wl,--as-needed -override_dh_auto_install: - dh_auto_install --destdir=debian/tmp +%: + dh $@ --parallel --with autoreconf --with libva override_dh_install: - dh_install --list-missing + find -name *.la -delete + dh_install -get-orig-source: - $(dir $_)intel-get-orig-source +override_dh_installchangelogs: + dh_installchangelogs NEWS diff -Nru intel-vaapi-driver-1.0.15/debian/watch intel-vaapi-driver-1.7.1/debian/watch --- intel-vaapi-driver-1.0.15/debian/watch 2012-01-04 19:06:32.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian/watch 2014-09-20 00:45:17.000000000 +0000 @@ -1,3 +1,3 @@ version=3 -# we look for urls like http://cgit.freedesktop.org/vaapi/intel-driver/snapshot/intel-driver-1.0.5.tar.bz2 -http://cgit.freedesktop.org/vaapi/intel-driver/ /intel-driver/snapshot/intel-driver-([\d+\.]+)\.tar\.bz2 +opts="filenamemangle=s/libva-intel-driver/intel-vaapi-driver/" \ +http://www.freedesktop.org/software/vaapi/releases/libva-intel-driver/libva-intel-driver-(\d.*)\.(?:tgz|tbz2|tar\.(?:gz|bz2|xz)) diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/changelog intel-vaapi-driver-1.7.1/debian.upstream/changelog --- intel-vaapi-driver-1.0.15/debian.upstream/changelog 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/changelog 2016-06-21 02:07:56.000000000 +0000 @@ -0,0 +1,5 @@ +libva-intel-driver (1.7.1-1) unstable; urgency=low + + * Autogenerated package, see NEWS file for ChangeLog. + + -- Gwenole Beauchesne Tue, 21 Jun 2016 10:07:56 +0800 diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/changelog.in intel-vaapi-driver-1.7.1/debian.upstream/changelog.in --- intel-vaapi-driver-1.0.15/debian.upstream/changelog.in 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/changelog.in 2016-02-22 04:30:34.000000000 +0000 @@ -1,4 +1,4 @@ -libva-driver-intel (@PACKAGE_VERSION@-1) unstable; urgency=low +libva-intel-driver (@PACKAGE_VERSION@-1) unstable; urgency=low * Autogenerated package, see NEWS file for ChangeLog. diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/control intel-vaapi-driver-1.7.1/debian.upstream/control --- intel-vaapi-driver-1.0.15/debian.upstream/control 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/control 2016-06-21 02:07:56.000000000 +0000 @@ -0,0 +1,28 @@ +Source: libva-intel-driver +Section: libs +Priority: optional +Maintainer: Gwenole Beauchesne +Build-Depends: debhelper (>= 5), + cdbs, + libdrm-dev (>= 2.4.52), + libva-dev (>= 1.7.1) +Standards-Version: 3.7.2 + +Package: libva-intel-driver +Section: libs +Architecture: any +Depends: libva1 (>= 1.7.1), + ${shlibs:Depends}, ${misc:Depends} +Description: VA driver for Intel G45 & HD Graphics family + Video decode & encode driver for Intel G45 chipsets and Intel HD + Graphics for Intel Core processor family. + +Package: libva-intel-driver-dbg +Section: libdevel +Architecture: any +Depends: libva-intel-driver (= ${Source-Version}) +Description: VA driver for Intel G45 & HD Graphics family (debug symbols) + Video decode & encode driver for Intel G45 chipsets and Intel HD + Graphics for Intel Core processor family. + . + This package contains the debug files. diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/control.in intel-vaapi-driver-1.7.1/debian.upstream/control.in --- intel-vaapi-driver-1.0.15/debian.upstream/control.in 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/control.in 2016-02-22 04:30:34.000000000 +0000 @@ -1,4 +1,4 @@ -Source: libva-driver-intel +Source: libva-intel-driver Section: libs Priority: optional Maintainer: Gwenole Beauchesne @@ -8,7 +8,7 @@ libva-dev (>= @LIBVA_PACKAGE_VERSION@) Standards-Version: 3.7.2 -Package: libva-driver-intel +Package: libva-intel-driver Section: libs Architecture: any Depends: libva1 (>= @LIBVA_PACKAGE_VERSION@), @@ -17,10 +17,10 @@ Video decode & encode driver for Intel G45 chipsets and Intel HD Graphics for Intel Core processor family. -Package: libva-driver-intel-dbg +Package: libva-intel-driver-dbg Section: libdevel Architecture: any -Depends: libva-driver-intel (= ${Source-Version}) +Depends: libva-intel-driver (= ${Source-Version}) Description: VA driver for Intel G45 & HD Graphics family (debug symbols) Video decode & encode driver for Intel G45 chipsets and Intel HD Graphics for Intel Core processor family. diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/libva-driver-intel.install intel-vaapi-driver-1.7.1/debian.upstream/libva-driver-intel.install --- intel-vaapi-driver-1.0.15/debian.upstream/libva-driver-intel.install 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/libva-driver-intel.install 1970-01-01 00:00:00.000000000 +0000 @@ -1 +0,0 @@ -debian/tmp/usr/lib/dri/*.so diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/libva-intel-driver.install intel-vaapi-driver-1.7.1/debian.upstream/libva-intel-driver.install --- intel-vaapi-driver-1.0.15/debian.upstream/libva-intel-driver.install 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/libva-intel-driver.install 2016-02-22 04:30:34.000000000 +0000 @@ -0,0 +1 @@ +debian/tmp/usr/lib/dri/*.so diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/Makefile.am intel-vaapi-driver-1.7.1/debian.upstream/Makefile.am --- intel-vaapi-driver-1.0.15/debian.upstream/Makefile.am 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -3,7 +3,7 @@ compat \ control.in \ copyright \ - libva-driver-intel.install \ + libva-intel-driver.install \ rules \ $(NULL) @@ -16,8 +16,10 @@ dist_noinst_DATA = $(DEBIANGENFILES) +DISTCLEANFILES = $(DEBIANGENFILES) + # Extra clean files so that maintainer-clean removes *everything* -MAINTAINERCLEANFILES = Makefile.in $(DEBIANGENFILES) +MAINTAINERCLEANFILES = Makefile.in $(DEBIANGENFILES): %: %.in Makefile -$(AM_V_GEN)sed \ diff -Nru intel-vaapi-driver-1.0.15/debian.upstream/Makefile.in intel-vaapi-driver-1.7.1/debian.upstream/Makefile.in --- intel-vaapi-driver-1.0.15/debian.upstream/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/debian.upstream/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,476 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +VPATH = @srcdir@ +am__is_gnu_make = test -n '$(MAKEFILE_LIST)' && test -n '$(MAKELEVEL)' +am__make_running_with_option = \ + case $${target_option-} in \ + ?) ;; \ + *) echo "am__make_running_with_option: internal error: invalid" \ + "target option '$${target_option-}' specified" >&2; \ + exit 1;; \ + esac; \ + has_opt=no; \ + sane_makeflags=$$MAKEFLAGS; \ + if $(am__is_gnu_make); then \ + sane_makeflags=$$MFLAGS; \ + else \ + case $$MAKEFLAGS in \ + *\\[\ \ ]*) \ + bs=\\; \ + sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \ + | sed 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+'%a, %d %b %Y %X %z'`"'|' \ + -e 's|\@LIBDRM_VERSION\@|$(LIBDRM_VERSION)|' \ + -e 's|\@LIBVA_PACKAGE_VERSION\@|$(LIBVA_PACKAGE_VERSION)|' \ + -e 's|\@PACKAGE_VERSION\@|$(PACKAGE_VERSION)|' \ + $< > $@ + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/depcomp intel-vaapi-driver-1.7.1/depcomp --- intel-vaapi-driver-1.0.15/depcomp 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/depcomp 2016-02-22 04:30:57.000000000 +0000 @@ -0,0 +1,791 @@ +#! /bin/sh +# depcomp - compile a program generating dependencies as side-effects + +scriptversion=2013-05-30.07; # UTC + +# Copyright (C) 1999-2013 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# Originally written by Alexandre Oliva . + +case $1 in + '') + echo "$0: No command. Try '$0 --help' for more information." 1>&2 + exit 1; + ;; + -h | --h*) + cat <<\EOF +Usage: depcomp [--help] [--version] PROGRAM [ARGS] + +Run PROGRAMS ARGS to compile a file, generating dependencies +as side-effects. + +Environment variables: + depmode Dependency tracking mode. + source Source file read by 'PROGRAMS ARGS'. + object Object file output by 'PROGRAMS ARGS'. + DEPDIR directory where to store dependencies. + depfile Dependency file to output. + tmpdepfile Temporary file to use when outputting dependencies. + libtool Whether libtool is used (yes/no). + +Report bugs to . +EOF + exit $? + ;; + -v | --v*) + echo "depcomp $scriptversion" + exit $? + ;; +esac + +# Get the directory component of the given path, and save it in the +# global variables '$dir'. Note that this directory component will +# be either empty or ending with a '/' character. This is deliberate. +set_dir_from () +{ + case $1 in + */*) dir=`echo "$1" | sed -e 's|/[^/]*$|/|'`;; + *) dir=;; + esac +} + +# Get the suffix-stripped basename of the given path, and save it the +# global variable '$base'. +set_base_from () +{ + base=`echo "$1" | sed -e 's|^.*/||' -e 's/\.[^.]*$//'` +} + +# If no dependency file was actually created by the compiler invocation, +# we still have to create a dummy depfile, to avoid errors with the +# Makefile "include basename.Plo" scheme. +make_dummy_depfile () +{ + echo "#dummy" > "$depfile" +} + +# Factor out some common post-processing of the generated depfile. +# Requires the auxiliary global variable '$tmpdepfile' to be set. +aix_post_process_depfile () +{ + # If the compiler actually managed to produce a dependency file, + # post-process it. + if test -f "$tmpdepfile"; then + # Each line is of the form 'foo.o: dependency.h'. + # Do two passes, one to just change these to + # $object: dependency.h + # and one to simply output + # dependency.h: + # which is needed to avoid the deleted-header problem. + { sed -e "s,^.*\.[$lower]*:,$object:," < "$tmpdepfile" + sed -e "s,^.*\.[$lower]*:[$tab ]*,," -e 's,$,:,' < "$tmpdepfile" + } > "$depfile" + rm -f "$tmpdepfile" + else + make_dummy_depfile + fi +} + +# A tabulation character. +tab=' ' +# A newline character. +nl=' +' +# Character ranges might be problematic outside the C locale. +# These definitions help. +upper=ABCDEFGHIJKLMNOPQRSTUVWXYZ +lower=abcdefghijklmnopqrstuvwxyz +digits=0123456789 +alpha=${upper}${lower} + +if test -z "$depmode" || test -z "$source" || test -z "$object"; then + echo "depcomp: Variables source, object and depmode must be set" 1>&2 + exit 1 +fi + +# Dependencies for sub/bar.o or sub/bar.obj go into sub/.deps/bar.Po. +depfile=${depfile-`echo "$object" | + sed 's|[^\\/]*$|'${DEPDIR-.deps}'/&|;s|\.\([^.]*\)$|.P\1|;s|Pobj$|Po|'`} +tmpdepfile=${tmpdepfile-`echo "$depfile" | sed 's/\.\([^.]*\)$/.T\1/'`} + +rm -f "$tmpdepfile" + +# Avoid interferences from the environment. +gccflag= dashmflag= + +# Some modes work just like other modes, but use different flags. We +# parameterize here, but still list the modes in the big case below, +# to make depend.m4 easier to write. Note that we *cannot* use a case +# here, because this file can only contain one case statement. +if test "$depmode" = hp; then + # HP compiler uses -M and no extra arg. + gccflag=-M + depmode=gcc +fi + +if test "$depmode" = dashXmstdout; then + # This is just like dashmstdout with a different argument. + dashmflag=-xM + depmode=dashmstdout +fi + +cygpath_u="cygpath -u -f -" +if test "$depmode" = msvcmsys; then + # This is just like msvisualcpp but w/o cygpath translation. + # Just convert the backslash-escaped backslashes to single forward + # slashes to satisfy depend.m4 + cygpath_u='sed s,\\\\,/,g' + depmode=msvisualcpp +fi + +if test "$depmode" = msvc7msys; then + # This is just like msvc7 but w/o cygpath translation. + # Just convert the backslash-escaped backslashes to single forward + # slashes to satisfy depend.m4 + cygpath_u='sed s,\\\\,/,g' + depmode=msvc7 +fi + +if test "$depmode" = xlc; then + # IBM C/C++ Compilers xlc/xlC can output gcc-like dependency information. + gccflag=-qmakedep=gcc,-MF + depmode=gcc +fi + +case "$depmode" in +gcc3) +## gcc 3 implements dependency tracking that does exactly what +## we want. Yay! Note: for some reason libtool 1.4 doesn't like +## it if -MD -MP comes after the -MF stuff. Hmm. +## Unfortunately, FreeBSD c89 acceptance of flags depends upon +## the command line argument order; so add the flags where they +## appear in depend2.am. Note that the slowdown incurred here +## affects only configure: in makefiles, %FASTDEP% shortcuts this. + for arg + do + case $arg in + -c) set fnord "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" "$arg" ;; + *) set fnord "$@" "$arg" ;; + esac + shift # fnord + shift # $arg + done + "$@" + stat=$? + if test $stat -ne 0; then + rm -f "$tmpdepfile" + exit $stat + fi + mv "$tmpdepfile" "$depfile" + ;; + +gcc) +## Note that this doesn't just cater to obsosete pre-3.x GCC compilers. +## but also to in-use compilers like IMB xlc/xlC and the HP C compiler. +## (see the conditional assignment to $gccflag above). +## There are various ways to get dependency output from gcc. Here's +## why we pick this rather obscure method: +## - Don't want to use -MD because we'd like the dependencies to end +## up in a subdir. Having to rename by hand is ugly. +## (We might end up doing this anyway to support other compilers.) +## - The DEPENDENCIES_OUTPUT environment variable makes gcc act like +## -MM, not -M (despite what the docs say). Also, it might not be +## supported by the other compilers which use the 'gcc' depmode. +## - Using -M directly means running the compiler twice (even worse +## than renaming). + if test -z "$gccflag"; then + gccflag=-MD, + fi + "$@" -Wp,"$gccflag$tmpdepfile" + stat=$? + if test $stat -ne 0; then + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + echo "$object : \\" > "$depfile" + # The second -e expression handles DOS-style file names with drive + # letters. + sed -e 's/^[^:]*: / /' \ + -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile" +## This next piece of magic avoids the "deleted header file" problem. +## The problem is that when a header file which appears in a .P file +## is deleted, the dependency causes make to die (because there is +## typically no way to rebuild the header). We avoid this by adding +## dummy dependencies for each header file. Too bad gcc doesn't do +## this for us directly. +## Some versions of gcc put a space before the ':'. On the theory +## that the space means something, we add a space to the output as +## well. hp depmode also adds that space, but also prefixes the VPATH +## to the object. Take care to not repeat it in the output. +## Some versions of the HPUX 10.20 sed can't process this invocation +## correctly. Breaking it into two sed invocations is a workaround. + tr ' ' "$nl" < "$tmpdepfile" \ + | sed -e 's/^\\$//' -e '/^$/d' -e "s|.*$object$||" -e '/:$/d' \ + | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +hp) + # This case exists only to let depend.m4 do its work. It works by + # looking at the text of this script. This case will never be run, + # since it is checked for above. + exit 1 + ;; + +sgi) + if test "$libtool" = yes; then + "$@" "-Wp,-MDupdate,$tmpdepfile" + else + "$@" -MDupdate "$tmpdepfile" + fi + stat=$? + if test $stat -ne 0; then + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + + if test -f "$tmpdepfile"; then # yes, the sourcefile depend on other files + echo "$object : \\" > "$depfile" + # Clip off the initial element (the dependent). Don't try to be + # clever and replace this with sed code, as IRIX sed won't handle + # lines with more than a fixed number of characters (4096 in + # IRIX 6.2 sed, 8192 in IRIX 6.5). We also remove comment lines; + # the IRIX cc adds comments like '#:fec' to the end of the + # dependency line. + tr ' ' "$nl" < "$tmpdepfile" \ + | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' \ + | tr "$nl" ' ' >> "$depfile" + echo >> "$depfile" + # The second pass generates a dummy entry for each header file. + tr ' ' "$nl" < "$tmpdepfile" \ + | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \ + >> "$depfile" + else + make_dummy_depfile + fi + rm -f "$tmpdepfile" + ;; + +xlc) + # This case exists only to let depend.m4 do its work. It works by + # looking at the text of this script. This case will never be run, + # since it is checked for above. + exit 1 + ;; + +aix) + # The C for AIX Compiler uses -M and outputs the dependencies + # in a .u file. In older versions, this file always lives in the + # current directory. Also, the AIX compiler puts '$object:' at the + # start of each line; $object doesn't have directory information. + # Version 6 uses the directory in both cases. + set_dir_from "$object" + set_base_from "$object" + if test "$libtool" = yes; then + tmpdepfile1=$dir$base.u + tmpdepfile2=$base.u + tmpdepfile3=$dir.libs/$base.u + "$@" -Wc,-M + else + tmpdepfile1=$dir$base.u + tmpdepfile2=$dir$base.u + tmpdepfile3=$dir$base.u + "$@" -M + fi + stat=$? + if test $stat -ne 0; then + rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" + do + test -f "$tmpdepfile" && break + done + aix_post_process_depfile + ;; + +tcc) + # tcc (Tiny C Compiler) understand '-MD -MF file' since version 0.9.26 + # FIXME: That version still under development at the moment of writing. + # Make that this statement remains true also for stable, released + # versions. + # It will wrap lines (doesn't matter whether long or short) with a + # trailing '\', as in: + # + # foo.o : \ + # foo.c \ + # foo.h \ + # + # It will put a trailing '\' even on the last line, and will use leading + # spaces rather than leading tabs (at least since its commit 0394caf7 + # "Emit spaces for -MD"). + "$@" -MD -MF "$tmpdepfile" + stat=$? + if test $stat -ne 0; then + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + # Each non-empty line is of the form 'foo.o : \' or ' dep.h \'. + # We have to change lines of the first kind to '$object: \'. + sed -e "s|.*:|$object :|" < "$tmpdepfile" > "$depfile" + # And for each line of the second kind, we have to emit a 'dep.h:' + # dummy dependency, to avoid the deleted-header problem. + sed -n -e 's|^ *\(.*\) *\\$|\1:|p' < "$tmpdepfile" >> "$depfile" + rm -f "$tmpdepfile" + ;; + +## The order of this option in the case statement is important, since the +## shell code in configure will try each of these formats in the order +## listed in this file. A plain '-MD' option would be understood by many +## compilers, so we must ensure this comes after the gcc and icc options. +pgcc) + # Portland's C compiler understands '-MD'. + # Will always output deps to 'file.d' where file is the root name of the + # source file under compilation, even if file resides in a subdirectory. + # The object file name does not affect the name of the '.d' file. + # pgcc 10.2 will output + # foo.o: sub/foo.c sub/foo.h + # and will wrap long lines using '\' : + # foo.o: sub/foo.c ... \ + # sub/foo.h ... \ + # ... + set_dir_from "$object" + # Use the source, not the object, to determine the base name, since + # that's sadly what pgcc will do too. + set_base_from "$source" + tmpdepfile=$base.d + + # For projects that build the same source file twice into different object + # files, the pgcc approach of using the *source* file root name can cause + # problems in parallel builds. Use a locking strategy to avoid stomping on + # the same $tmpdepfile. + lockdir=$base.d-lock + trap " + echo '$0: caught signal, cleaning up...' >&2 + rmdir '$lockdir' + exit 1 + " 1 2 13 15 + numtries=100 + i=$numtries + while test $i -gt 0; do + # mkdir is a portable test-and-set. + if mkdir "$lockdir" 2>/dev/null; then + # This process acquired the lock. + "$@" -MD + stat=$? + # Release the lock. + rmdir "$lockdir" + break + else + # If the lock is being held by a different process, wait + # until the winning process is done or we timeout. + while test -d "$lockdir" && test $i -gt 0; do + sleep 1 + i=`expr $i - 1` + done + fi + i=`expr $i - 1` + done + trap - 1 2 13 15 + if test $i -le 0; then + echo "$0: failed to acquire lock after $numtries attempts" >&2 + echo "$0: check lockdir '$lockdir'" >&2 + exit 1 + fi + + if test $stat -ne 0; then + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + # Each line is of the form `foo.o: dependent.h', + # or `foo.o: dep1.h dep2.h \', or ` dep3.h dep4.h \'. + # Do two passes, one to just change these to + # `$object: dependent.h' and one to simply `dependent.h:'. + sed "s,^[^:]*:,$object :," < "$tmpdepfile" > "$depfile" + # Some versions of the HPUX 10.20 sed can't process this invocation + # correctly. Breaking it into two sed invocations is a workaround. + sed 's,^[^:]*: \(.*\)$,\1,;s/^\\$//;/^$/d;/:$/d' < "$tmpdepfile" \ + | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +hp2) + # The "hp" stanza above does not work with aCC (C++) and HP's ia64 + # compilers, which have integrated preprocessors. The correct option + # to use with these is +Maked; it writes dependencies to a file named + # 'foo.d', which lands next to the object file, wherever that + # happens to be. + # Much of this is similar to the tru64 case; see comments there. + set_dir_from "$object" + set_base_from "$object" + if test "$libtool" = yes; then + tmpdepfile1=$dir$base.d + tmpdepfile2=$dir.libs/$base.d + "$@" -Wc,+Maked + else + tmpdepfile1=$dir$base.d + tmpdepfile2=$dir$base.d + "$@" +Maked + fi + stat=$? + if test $stat -ne 0; then + rm -f "$tmpdepfile1" "$tmpdepfile2" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" + do + test -f "$tmpdepfile" && break + done + if test -f "$tmpdepfile"; then + sed -e "s,^.*\.[$lower]*:,$object:," "$tmpdepfile" > "$depfile" + # Add 'dependent.h:' lines. + sed -ne '2,${ + s/^ *// + s/ \\*$// + s/$/:/ + p + }' "$tmpdepfile" >> "$depfile" + else + make_dummy_depfile + fi + rm -f "$tmpdepfile" "$tmpdepfile2" + ;; + +tru64) + # The Tru64 compiler uses -MD to generate dependencies as a side + # effect. 'cc -MD -o foo.o ...' puts the dependencies into 'foo.o.d'. + # At least on Alpha/Redhat 6.1, Compaq CCC V6.2-504 seems to put + # dependencies in 'foo.d' instead, so we check for that too. + # Subdirectories are respected. + set_dir_from "$object" + set_base_from "$object" + + if test "$libtool" = yes; then + # Libtool generates 2 separate objects for the 2 libraries. These + # two compilations output dependencies in $dir.libs/$base.o.d and + # in $dir$base.o.d. We have to check for both files, because + # one of the two compilations can be disabled. We should prefer + # $dir$base.o.d over $dir.libs/$base.o.d because the latter is + # automatically cleaned when .libs/ is deleted, while ignoring + # the former would cause a distcleancheck panic. + tmpdepfile1=$dir$base.o.d # libtool 1.5 + tmpdepfile2=$dir.libs/$base.o.d # Likewise. + tmpdepfile3=$dir.libs/$base.d # Compaq CCC V6.2-504 + "$@" -Wc,-MD + else + tmpdepfile1=$dir$base.d + tmpdepfile2=$dir$base.d + tmpdepfile3=$dir$base.d + "$@" -MD + fi + + stat=$? + if test $stat -ne 0; then + rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" + exit $stat + fi + + for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" + do + test -f "$tmpdepfile" && break + done + # Same post-processing that is required for AIX mode. + aix_post_process_depfile + ;; + +msvc7) + if test "$libtool" = yes; then + showIncludes=-Wc,-showIncludes + else + showIncludes=-showIncludes + fi + "$@" $showIncludes > "$tmpdepfile" + stat=$? + grep -v '^Note: including file: ' "$tmpdepfile" + if test $stat -ne 0; then + rm -f "$tmpdepfile" + exit $stat + fi + rm -f "$depfile" + echo "$object : \\" > "$depfile" + # The first sed program below extracts the file names and escapes + # backslashes for cygpath. The second sed program outputs the file + # name when reading, but also accumulates all include files in the + # hold buffer in order to output them again at the end. This only + # works with sed implementations that can handle large buffers. + sed < "$tmpdepfile" -n ' +/^Note: including file: *\(.*\)/ { + s//\1/ + s/\\/\\\\/g + p +}' | $cygpath_u | sort -u | sed -n ' +s/ /\\ /g +s/\(.*\)/'"$tab"'\1 \\/p +s/.\(.*\) \\/\1:/ +H +$ { + s/.*/'"$tab"'/ + G + p +}' >> "$depfile" + echo >> "$depfile" # make sure the fragment doesn't end with a backslash + rm -f "$tmpdepfile" + ;; + +msvc7msys) + # This case exists only to let depend.m4 do its work. It works by + # looking at the text of this script. This case will never be run, + # since it is checked for above. + exit 1 + ;; + +#nosideeffect) + # This comment above is used by automake to tell side-effect + # dependency tracking mechanisms from slower ones. + +dashmstdout) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout, regardless of -o. + "$@" || exit $? + + # Remove the call to Libtool. + if test "$libtool" = yes; then + while test "X$1" != 'X--mode=compile'; do + shift + done + shift + fi + + # Remove '-o $object'. + IFS=" " + for arg + do + case $arg in + -o) + shift + ;; + $object) + shift + ;; + *) + set fnord "$@" "$arg" + shift # fnord + shift # $arg + ;; + esac + done + + test -z "$dashmflag" && dashmflag=-M + # Require at least two characters before searching for ':' + # in the target name. This is to cope with DOS-style filenames: + # a dependency such as 'c:/foo/bar' could be seen as target 'c' otherwise. + "$@" $dashmflag | + sed "s|^[$tab ]*[^:$tab ][^:][^:]*:[$tab ]*|$object: |" > "$tmpdepfile" + rm -f "$depfile" + cat < "$tmpdepfile" > "$depfile" + # Some versions of the HPUX 10.20 sed can't process this sed invocation + # correctly. Breaking it into two sed invocations is a workaround. + tr ' ' "$nl" < "$tmpdepfile" \ + | sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' \ + | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +dashXmstdout) + # This case only exists to satisfy depend.m4. It is never actually + # run, as this mode is specially recognized in the preamble. + exit 1 + ;; + +makedepend) + "$@" || exit $? + # Remove any Libtool call + if test "$libtool" = yes; then + while test "X$1" != 'X--mode=compile'; do + shift + done + shift + fi + # X makedepend + shift + cleared=no eat=no + for arg + do + case $cleared in + no) + set ""; shift + cleared=yes ;; + esac + if test $eat = yes; then + eat=no + continue + fi + case "$arg" in + -D*|-I*) + set fnord "$@" "$arg"; shift ;; + # Strip any option that makedepend may not understand. Remove + # the object too, otherwise makedepend will parse it as a source file. + -arch) + eat=yes ;; + -*|$object) + ;; + *) + set fnord "$@" "$arg"; shift ;; + esac + done + obj_suffix=`echo "$object" | sed 's/^.*\././'` + touch "$tmpdepfile" + ${MAKEDEPEND-makedepend} -o"$obj_suffix" -f"$tmpdepfile" "$@" + rm -f "$depfile" + # makedepend may prepend the VPATH from the source file name to the object. + # No need to regex-escape $object, excess matching of '.' is harmless. + sed "s|^.*\($object *:\)|\1|" "$tmpdepfile" > "$depfile" + # Some versions of the HPUX 10.20 sed can't process the last invocation + # correctly. Breaking it into two sed invocations is a workaround. + sed '1,2d' "$tmpdepfile" \ + | tr ' ' "$nl" \ + | sed -e 's/^\\$//' -e '/^$/d' -e '/:$/d' \ + | sed -e 's/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" "$tmpdepfile".bak + ;; + +cpp) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout. + "$@" || exit $? + + # Remove the call to Libtool. + if test "$libtool" = yes; then + while test "X$1" != 'X--mode=compile'; do + shift + done + shift + fi + + # Remove '-o $object'. + IFS=" " + for arg + do + case $arg in + -o) + shift + ;; + $object) + shift + ;; + *) + set fnord "$@" "$arg" + shift # fnord + shift # $arg + ;; + esac + done + + "$@" -E \ + | sed -n -e '/^# [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ + -e '/^#line [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ + | sed '$ s: \\$::' > "$tmpdepfile" + rm -f "$depfile" + echo "$object : \\" > "$depfile" + cat < "$tmpdepfile" >> "$depfile" + sed < "$tmpdepfile" '/^$/d;s/^ //;s/ \\$//;s/$/ :/' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +msvisualcpp) + # Important note: in order to support this mode, a compiler *must* + # always write the preprocessed file to stdout. + "$@" || exit $? + + # Remove the call to Libtool. + if test "$libtool" = yes; then + while test "X$1" != 'X--mode=compile'; do + shift + done + shift + fi + + IFS=" " + for arg + do + case "$arg" in + -o) + shift + ;; + $object) + shift + ;; + "-Gm"|"/Gm"|"-Gi"|"/Gi"|"-ZI"|"/ZI") + set fnord "$@" + shift + shift + ;; + *) + set fnord "$@" "$arg" + shift + shift + ;; + esac + done + "$@" -E 2>/dev/null | + sed -n '/^#line [0-9][0-9]* "\([^"]*\)"/ s::\1:p' | $cygpath_u | sort -u > "$tmpdepfile" + rm -f "$depfile" + echo "$object : \\" > "$depfile" + sed < "$tmpdepfile" -n -e 's% %\\ %g' -e '/^\(.*\)$/ s::'"$tab"'\1 \\:p' >> "$depfile" + echo "$tab" >> "$depfile" + sed < "$tmpdepfile" -n -e 's% %\\ %g' -e '/^\(.*\)$/ s::\1\::p' >> "$depfile" + rm -f "$tmpdepfile" + ;; + +msvcmsys) + # This case exists only to let depend.m4 do its work. It works by + # looking at the text of this script. This case will never be run, + # since it is checked for above. + exit 1 + ;; + +none) + exec "$@" + ;; + +*) + echo "Unknown depmode $depmode" 1>&2 + exit 1 + ;; +esac + +exit 0 + +# Local Variables: +# mode: shell-script +# sh-indentation: 2 +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-time-zone: "UTC" +# time-stamp-end: "; # UTC" +# End: diff -Nru intel-vaapi-driver-1.0.15/.gitignore intel-vaapi-driver-1.7.1/.gitignore --- intel-vaapi-driver-1.0.15/.gitignore 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/.gitignore 1970-01-01 00:00:00.000000000 +0000 @@ -1,33 +0,0 @@ -*~ -*.o -*.lo -*.la -*.orig -*.rej -*.loT -*.bin -*.pc -*.g[4-7]s -.deps -.libs -install-sh -libtool -ltmain.sh -compile -missing -Makefile -Makefile.in -config.h -config.h.in -stamp-h1 -aclocal.m4 -autom4te.cache -config.guess -config.log -config.status -config.sub -configure -depcomp -TAGS -/debian.upstream/changelog -/debian.upstream/control diff -Nru intel-vaapi-driver-1.0.15/install-sh intel-vaapi-driver-1.7.1/install-sh --- intel-vaapi-driver-1.0.15/install-sh 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/install-sh 2016-02-22 04:30:56.000000000 +0000 @@ -0,0 +1,527 @@ +#!/bin/sh +# install - install a program, script, or datafile + +scriptversion=2011-11-20.07; # UTC + +# This originates from X11R5 (mit/util/scripts/install.sh), which was +# later released in X11R6 (xc/config/util/install.sh) with the +# following copyright and license. +# +# Copyright (C) 1994 X Consortium +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to +# deal in the Software without restriction, including without limitation the +# rights to use, copy, modify, merge, publish, distribute, sublicense, and/or +# sell copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN +# AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNEC- +# TION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# +# Except as contained in this notice, the name of the X Consortium shall not +# be used in advertising or otherwise to promote the sale, use or other deal- +# ings in this Software without prior written authorization from the X Consor- +# tium. +# +# +# FSF changes to this file are in the public domain. +# +# Calling this script install-sh is preferred over install.sh, to prevent +# 'make' implicit rules from creating a file called install from it +# when there is no Makefile. +# +# This script is compatible with the BSD install script, but was written +# from scratch. + +nl=' +' +IFS=" "" $nl" + +# set DOITPROG to echo to test this script + +# Don't use :- since 4.3BSD and earlier shells don't like it. +doit=${DOITPROG-} +if test -z "$doit"; then + doit_exec=exec +else + doit_exec=$doit +fi + +# Put in absolute file names if you don't have them in your path; +# or use environment vars. + +chgrpprog=${CHGRPPROG-chgrp} +chmodprog=${CHMODPROG-chmod} +chownprog=${CHOWNPROG-chown} +cmpprog=${CMPPROG-cmp} +cpprog=${CPPROG-cp} +mkdirprog=${MKDIRPROG-mkdir} +mvprog=${MVPROG-mv} +rmprog=${RMPROG-rm} +stripprog=${STRIPPROG-strip} + +posix_glob='?' +initialize_posix_glob=' + test "$posix_glob" != "?" || { + if (set -f) 2>/dev/null; then + posix_glob= + else + posix_glob=: + fi + } +' + +posix_mkdir= + +# Desired mode of installed file. +mode=0755 + +chgrpcmd= +chmodcmd=$chmodprog +chowncmd= +mvcmd=$mvprog +rmcmd="$rmprog -f" +stripcmd= + +src= +dst= +dir_arg= +dst_arg= + +copy_on_change=false +no_target_directory= + +usage="\ +Usage: $0 [OPTION]... [-T] SRCFILE DSTFILE + or: $0 [OPTION]... SRCFILES... DIRECTORY + or: $0 [OPTION]... -t DIRECTORY SRCFILES... + or: $0 [OPTION]... -d DIRECTORIES... + +In the 1st form, copy SRCFILE to DSTFILE. +In the 2nd and 3rd, copy all SRCFILES to DIRECTORY. +In the 4th, create DIRECTORIES. + +Options: + --help display this help and exit. + --version display version info and exit. + + -c (ignored) + -C install only if different (preserve the last data modification time) + -d create directories instead of installing files. + -g GROUP $chgrpprog installed files to GROUP. + -m MODE $chmodprog installed files to MODE. + -o USER $chownprog installed files to USER. + -s $stripprog installed files. + -t DIRECTORY install into DIRECTORY. + -T report an error if DSTFILE is a directory. + +Environment variables override the default commands: + CHGRPPROG CHMODPROG CHOWNPROG CMPPROG CPPROG MKDIRPROG MVPROG + RMPROG STRIPPROG +" + +while test $# -ne 0; do + case $1 in + -c) ;; + + -C) copy_on_change=true;; + + -d) dir_arg=true;; + + -g) chgrpcmd="$chgrpprog $2" + shift;; + + --help) echo "$usage"; exit $?;; + + -m) mode=$2 + case $mode in + *' '* | *' '* | *' +'* | *'*'* | *'?'* | *'['*) + echo "$0: invalid mode: $mode" >&2 + exit 1;; + esac + shift;; + + -o) chowncmd="$chownprog $2" + shift;; + + -s) stripcmd=$stripprog;; + + -t) dst_arg=$2 + # Protect names problematic for 'test' and other utilities. + case $dst_arg in + -* | [=\(\)!]) dst_arg=./$dst_arg;; + esac + shift;; + + -T) no_target_directory=true;; + + --version) echo "$0 $scriptversion"; exit $?;; + + --) shift + break;; + + -*) echo "$0: invalid option: $1" >&2 + exit 1;; + + *) break;; + esac + shift +done + +if test $# -ne 0 && test -z "$dir_arg$dst_arg"; then + # When -d is used, all remaining arguments are directories to create. + # When -t is used, the destination is already specified. + # Otherwise, the last argument is the destination. Remove it from $@. + for arg + do + if test -n "$dst_arg"; then + # $@ is not empty: it contains at least $arg. + set fnord "$@" "$dst_arg" + shift # fnord + fi + shift # arg + dst_arg=$arg + # Protect names problematic for 'test' and other utilities. + case $dst_arg in + -* | [=\(\)!]) dst_arg=./$dst_arg;; + esac + done +fi + +if test $# -eq 0; then + if test -z "$dir_arg"; then + echo "$0: no input file specified." >&2 + exit 1 + fi + # It's OK to call 'install-sh -d' without argument. + # This can happen when creating conditional directories. + exit 0 +fi + +if test -z "$dir_arg"; then + do_exit='(exit $ret); exit $ret' + trap "ret=129; $do_exit" 1 + trap "ret=130; $do_exit" 2 + trap "ret=141; $do_exit" 13 + trap "ret=143; $do_exit" 15 + + # Set umask so as not to create temps with too-generous modes. + # However, 'strip' requires both read and write access to temps. + case $mode in + # Optimize common cases. + *644) cp_umask=133;; + *755) cp_umask=22;; + + *[0-7]) + if test -z "$stripcmd"; then + u_plus_rw= + else + u_plus_rw='% 200' + fi + cp_umask=`expr '(' 777 - $mode % 1000 ')' $u_plus_rw`;; + *) + if test -z "$stripcmd"; then + u_plus_rw= + else + u_plus_rw=,u+rw + fi + cp_umask=$mode$u_plus_rw;; + esac +fi + +for src +do + # Protect names problematic for 'test' and other utilities. + case $src in + -* | [=\(\)!]) src=./$src;; + esac + + if test -n "$dir_arg"; then + dst=$src + dstdir=$dst + test -d "$dstdir" + dstdir_status=$? + else + + # Waiting for this to be detected by the "$cpprog $src $dsttmp" command + # might cause directories to be created, which would be especially bad + # if $src (and thus $dsttmp) contains '*'. + if test ! -f "$src" && test ! -d "$src"; then + echo "$0: $src does not exist." >&2 + exit 1 + fi + + if test -z "$dst_arg"; then + echo "$0: no destination specified." >&2 + exit 1 + fi + dst=$dst_arg + + # If destination is a directory, append the input filename; won't work + # if double slashes aren't ignored. + if test -d "$dst"; then + if test -n "$no_target_directory"; then + echo "$0: $dst_arg: Is a directory" >&2 + exit 1 + fi + dstdir=$dst + dst=$dstdir/`basename "$src"` + dstdir_status=0 + else + # Prefer dirname, but fall back on a substitute if dirname fails. + dstdir=` + (dirname "$dst") 2>/dev/null || + expr X"$dst" : 'X\(.*[^/]\)//*[^/][^/]*/*$' \| \ + X"$dst" : 'X\(//\)[^/]' \| \ + X"$dst" : 'X\(//\)$' \| \ + X"$dst" : 'X\(/\)' \| . 2>/dev/null || + echo X"$dst" | + sed '/^X\(.*[^/]\)\/\/*[^/][^/]*\/*$/{ + s//\1/ + q + } + /^X\(\/\/\)[^/].*/{ + s//\1/ + q + } + /^X\(\/\/\)$/{ + s//\1/ + q + } + /^X\(\/\).*/{ + s//\1/ + q + } + s/.*/./; q' + ` + + test -d "$dstdir" + dstdir_status=$? + fi + fi + + obsolete_mkdir_used=false + + if test $dstdir_status != 0; then + case $posix_mkdir in + '') + # Create intermediate dirs using mode 755 as modified by the umask. + # This is like FreeBSD 'install' as of 1997-10-28. + umask=`umask` + case $stripcmd.$umask in + # Optimize common cases. + *[2367][2367]) mkdir_umask=$umask;; + .*0[02][02] | .[02][02] | .[02]) mkdir_umask=22;; + + *[0-7]) + mkdir_umask=`expr $umask + 22 \ + - $umask % 100 % 40 + $umask % 20 \ + - $umask % 10 % 4 + $umask % 2 + `;; + *) mkdir_umask=$umask,go-w;; + esac + + # With -d, create the new directory with the user-specified mode. + # Otherwise, rely on $mkdir_umask. + if test -n "$dir_arg"; then + mkdir_mode=-m$mode + else + mkdir_mode= + fi + + posix_mkdir=false + case $umask in + *[123567][0-7][0-7]) + # POSIX mkdir -p sets u+wx bits regardless of umask, which + # is incompatible with FreeBSD 'install' when (umask & 300) != 0. + ;; + *) + tmpdir=${TMPDIR-/tmp}/ins$RANDOM-$$ + trap 'ret=$?; rmdir "$tmpdir/d" "$tmpdir" 2>/dev/null; exit $ret' 0 + + if (umask $mkdir_umask && + exec $mkdirprog $mkdir_mode -p -- "$tmpdir/d") >/dev/null 2>&1 + then + if test -z "$dir_arg" || { + # Check for POSIX incompatibilities with -m. + # HP-UX 11.23 and IRIX 6.5 mkdir -m -p sets group- or + # other-writable bit of parent directory when it shouldn't. + # FreeBSD 6.1 mkdir -m -p sets mode of existing directory. + ls_ld_tmpdir=`ls -ld "$tmpdir"` + case $ls_ld_tmpdir in + d????-?r-*) different_mode=700;; + d????-?--*) different_mode=755;; + *) false;; + esac && + $mkdirprog -m$different_mode -p -- "$tmpdir" && { + ls_ld_tmpdir_1=`ls -ld "$tmpdir"` + test "$ls_ld_tmpdir" = "$ls_ld_tmpdir_1" + } + } + then posix_mkdir=: + fi + rmdir "$tmpdir/d" "$tmpdir" + else + # Remove any dirs left behind by ancient mkdir implementations. + rmdir ./$mkdir_mode ./-p ./-- 2>/dev/null + fi + trap '' 0;; + esac;; + esac + + if + $posix_mkdir && ( + umask $mkdir_umask && + $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir" + ) + then : + else + + # The umask is ridiculous, or mkdir does not conform to POSIX, + # or it failed possibly due to a race condition. Create the + # directory the slow way, step by step, checking for races as we go. + + case $dstdir in + /*) prefix='/';; + [-=\(\)!]*) prefix='./';; + *) prefix='';; + esac + + eval "$initialize_posix_glob" + + oIFS=$IFS + IFS=/ + $posix_glob set -f + set fnord $dstdir + shift + $posix_glob set +f + IFS=$oIFS + + prefixes= + + for d + do + test X"$d" = X && continue + + prefix=$prefix$d + if test -d "$prefix"; then + prefixes= + else + if $posix_mkdir; then + (umask=$mkdir_umask && + $doit_exec $mkdirprog $mkdir_mode -p -- "$dstdir") && break + # Don't fail if two instances are running concurrently. + test -d "$prefix" || exit 1 + else + case $prefix in + *\'*) qprefix=`echo "$prefix" | sed "s/'/'\\\\\\\\''/g"`;; + *) qprefix=$prefix;; + esac + prefixes="$prefixes '$qprefix'" + fi + fi + prefix=$prefix/ + done + + if test -n "$prefixes"; then + # Don't fail if two instances are running concurrently. + (umask $mkdir_umask && + eval "\$doit_exec \$mkdirprog $prefixes") || + test -d "$dstdir" || exit 1 + obsolete_mkdir_used=true + fi + fi + fi + + if test -n "$dir_arg"; then + { test -z "$chowncmd" || $doit $chowncmd "$dst"; } && + { test -z "$chgrpcmd" || $doit $chgrpcmd "$dst"; } && + { test "$obsolete_mkdir_used$chowncmd$chgrpcmd" = false || + test -z "$chmodcmd" || $doit $chmodcmd $mode "$dst"; } || exit 1 + else + + # Make a couple of temp file names in the proper directory. + dsttmp=$dstdir/_inst.$$_ + rmtmp=$dstdir/_rm.$$_ + + # Trap to clean up those temp files at exit. + trap 'ret=$?; rm -f "$dsttmp" "$rmtmp" && exit $ret' 0 + + # Copy the file name to the temp name. + (umask $cp_umask && $doit_exec $cpprog "$src" "$dsttmp") && + + # and set any options; do chmod last to preserve setuid bits. + # + # If any of these fail, we abort the whole thing. If we want to + # ignore errors from any of these, just make sure not to ignore + # errors from the above "$doit $cpprog $src $dsttmp" command. + # + { test -z "$chowncmd" || $doit $chowncmd "$dsttmp"; } && + { test -z "$chgrpcmd" || $doit $chgrpcmd "$dsttmp"; } && + { test -z "$stripcmd" || $doit $stripcmd "$dsttmp"; } && + { test -z "$chmodcmd" || $doit $chmodcmd $mode "$dsttmp"; } && + + # If -C, don't bother to copy if it wouldn't change the file. + if $copy_on_change && + old=`LC_ALL=C ls -dlL "$dst" 2>/dev/null` && + new=`LC_ALL=C ls -dlL "$dsttmp" 2>/dev/null` && + + eval "$initialize_posix_glob" && + $posix_glob set -f && + set X $old && old=:$2:$4:$5:$6 && + set X $new && new=:$2:$4:$5:$6 && + $posix_glob set +f && + + test "$old" = "$new" && + $cmpprog "$dst" "$dsttmp" >/dev/null 2>&1 + then + rm -f "$dsttmp" + else + # Rename the file to the real destination. + $doit $mvcmd -f "$dsttmp" "$dst" 2>/dev/null || + + # The rename failed, perhaps because mv can't rename something else + # to itself, or perhaps because mv is so ancient that it does not + # support -f. + { + # Now remove or move aside any old file at destination location. + # We try this two ways since rm can't unlink itself on some + # systems and the destination file might be busy for other + # reasons. In this case, the final cleanup might fail but the new + # file should still install successfully. + { + test ! -f "$dst" || + $doit $rmcmd -f "$dst" 2>/dev/null || + { $doit $mvcmd -f "$dst" "$rmtmp" 2>/dev/null && + { $doit $rmcmd -f "$rmtmp" 2>/dev/null; :; } + } || + { echo "$0: cannot unlink or rename $dst" >&2 + (exit 1); exit 1 + } + } && + + # Now rename the file to the real destination. + $doit $mvcmd "$dsttmp" "$dst" + } + fi || exit 1 + + trap '' 0 + fi +done + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-time-zone: "UTC" +# time-stamp-end: "; # UTC" +# End: diff -Nru intel-vaapi-driver-1.0.15/ltmain.sh intel-vaapi-driver-1.7.1/ltmain.sh --- intel-vaapi-driver-1.0.15/ltmain.sh 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/ltmain.sh 2016-02-22 04:30:46.000000000 +0000 @@ -0,0 +1,9661 @@ + +# libtool (GNU libtool) 2.4.2 +# Written by Gordon Matzigkeit , 1996 + +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, +# 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. +# This is free software; see the source for copying conditions. There is NO +# warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + +# GNU Libtool is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# As a special exception to the GNU General Public License, +# if you distribute this file as part of a program or library that +# is built using GNU Libtool, you may include this file under the +# same distribution terms that you use for the rest of that program. +# +# GNU Libtool is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GNU Libtool; see the file COPYING. If not, a copy +# can be downloaded from http://www.gnu.org/licenses/gpl.html, +# or obtained by writing to the Free Software Foundation, Inc., +# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +# Usage: $progname [OPTION]... [MODE-ARG]... +# +# Provide generalized library-building support services. +# +# --config show all configuration variables +# --debug enable verbose shell tracing +# -n, --dry-run display commands without modifying any files +# --features display basic configuration information and exit +# --mode=MODE use operation mode MODE +# --preserve-dup-deps don't remove duplicate dependency libraries +# --quiet, --silent don't print informational messages +# --no-quiet, --no-silent +# print informational messages (default) +# --no-warn don't display warning messages +# --tag=TAG use configuration variables from tag TAG +# -v, --verbose print more informational messages than default +# --no-verbose don't print the extra informational messages +# --version print version information +# -h, --help, --help-all print short, long, or detailed help message +# +# MODE must be one of the following: +# +# clean remove files from the build directory +# compile compile a source file into a libtool object +# execute automatically set library path, then run a program +# finish complete the installation of libtool libraries +# install install libraries or executables +# link create a library or an executable +# uninstall remove libraries from an installed directory +# +# MODE-ARGS vary depending on the MODE. When passed as first option, +# `--mode=MODE' may be abbreviated as `MODE' or a unique abbreviation of that. +# Try `$progname --help --mode=MODE' for a more detailed description of MODE. +# +# When reporting a bug, please describe a test case to reproduce it and +# include the following information: +# +# host-triplet: $host +# shell: $SHELL +# compiler: $LTCC +# compiler flags: $LTCFLAGS +# linker: $LD (gnu? $with_gnu_ld) +# $progname: (GNU libtool) 2.4.2 Debian-2.4.2-1.7ubuntu1 +# automake: $automake_version +# autoconf: $autoconf_version +# +# Report bugs to . +# GNU libtool home page: . +# General help using GNU software: . + +PROGRAM=libtool +PACKAGE=libtool +VERSION="2.4.2 Debian-2.4.2-1.7ubuntu1" +TIMESTAMP="" +package_revision=1.3337 + +# Be Bourne compatible +if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which + # is contrary to our usage. Disable this feature. + alias -g '${1+"$@"}'='"$@"' + setopt NO_GLOB_SUBST +else + case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + +# A function that is used when there is no print builtin or printf. +func_fallback_echo () +{ + eval 'cat <<_LTECHO_EOF +$1 +_LTECHO_EOF' +} + +# NLS nuisances: We save the old values to restore during execute mode. +lt_user_locale= +lt_safe_locale= +for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES +do + eval "if test \"\${$lt_var+set}\" = set; then + save_$lt_var=\$$lt_var + $lt_var=C + export $lt_var + lt_user_locale=\"$lt_var=\\\$save_\$lt_var; \$lt_user_locale\" + lt_safe_locale=\"$lt_var=C; \$lt_safe_locale\" + fi" +done +LC_ALL=C +LANGUAGE=C +export LANGUAGE LC_ALL + +$lt_unset CDPATH + + +# Work around backward compatibility issue on IRIX 6.5. On IRIX 6.4+, sh +# is ksh but when the shell is invoked as "sh" and the current value of +# the _XPG environment variable is not equal to 1 (one), the special +# positional parameter $0, within a function call, is the name of the +# function. +progpath="$0" + + + +: ${CP="cp -f"} +test "${ECHO+set}" = set || ECHO=${as_echo-'printf %s\n'} +: ${MAKE="make"} +: ${MKDIR="mkdir"} +: ${MV="mv -f"} +: ${RM="rm -f"} +: ${SHELL="${CONFIG_SHELL-/bin/sh}"} +: ${Xsed="$SED -e 1s/^X//"} + +# Global variables: +EXIT_SUCCESS=0 +EXIT_FAILURE=1 +EXIT_MISMATCH=63 # $? = 63 is used to indicate version mismatch to missing. +EXIT_SKIP=77 # $? = 77 is used to indicate a skipped test to automake. + +exit_status=$EXIT_SUCCESS + +# Make sure IFS has a sensible default +lt_nl=' +' +IFS=" $lt_nl" + +dirname="s,/[^/]*$,," +basename="s,^.*/,," + +# func_dirname file append nondir_replacement +# Compute the dirname of FILE. If nonempty, add APPEND to the result, +# otherwise set result to NONDIR_REPLACEMENT. +func_dirname () +{ + func_dirname_result=`$ECHO "${1}" | $SED "$dirname"` + if test "X$func_dirname_result" = "X${1}"; then + func_dirname_result="${3}" + else + func_dirname_result="$func_dirname_result${2}" + fi +} # func_dirname may be replaced by extended shell implementation + + +# func_basename file +func_basename () +{ + func_basename_result=`$ECHO "${1}" | $SED "$basename"` +} # func_basename may be replaced by extended shell implementation + + +# func_dirname_and_basename file append nondir_replacement +# perform func_basename and func_dirname in a single function +# call: +# dirname: Compute the dirname of FILE. If nonempty, +# add APPEND to the result, otherwise set result +# to NONDIR_REPLACEMENT. +# value returned in "$func_dirname_result" +# basename: Compute filename of FILE. +# value retuned in "$func_basename_result" +# Implementation must be kept synchronized with func_dirname +# and func_basename. For efficiency, we do not delegate to +# those functions but instead duplicate the functionality here. +func_dirname_and_basename () +{ + # Extract subdirectory from the argument. + func_dirname_result=`$ECHO "${1}" | $SED -e "$dirname"` + if test "X$func_dirname_result" = "X${1}"; then + func_dirname_result="${3}" + else + func_dirname_result="$func_dirname_result${2}" + fi + func_basename_result=`$ECHO "${1}" | $SED -e "$basename"` +} # func_dirname_and_basename may be replaced by extended shell implementation + + +# func_stripname prefix suffix name +# strip PREFIX and SUFFIX off of NAME. +# PREFIX and SUFFIX must not contain globbing or regex special +# characters, hashes, percent signs, but SUFFIX may contain a leading +# dot (in which case that matches only a dot). +# func_strip_suffix prefix name +func_stripname () +{ + case ${2} in + .*) func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%\\\\${2}\$%%"`;; + *) func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%${2}\$%%"`;; + esac +} # func_stripname may be replaced by extended shell implementation + + +# These SED scripts presuppose an absolute path with a trailing slash. +pathcar='s,^/\([^/]*\).*$,\1,' +pathcdr='s,^/[^/]*,,' +removedotparts=':dotsl + s@/\./@/@g + t dotsl + s,/\.$,/,' +collapseslashes='s@/\{1,\}@/@g' +finalslash='s,/*$,/,' + +# func_normal_abspath PATH +# Remove doubled-up and trailing slashes, "." path components, +# and cancel out any ".." path components in PATH after making +# it an absolute path. +# value returned in "$func_normal_abspath_result" +func_normal_abspath () +{ + # Start from root dir and reassemble the path. + func_normal_abspath_result= + func_normal_abspath_tpath=$1 + func_normal_abspath_altnamespace= + case $func_normal_abspath_tpath in + "") + # Empty path, that just means $cwd. + func_stripname '' '/' "`pwd`" + func_normal_abspath_result=$func_stripname_result + return + ;; + # The next three entries are used to spot a run of precisely + # two leading slashes without using negated character classes; + # we take advantage of case's first-match behaviour. + ///*) + # Unusual form of absolute path, do nothing. + ;; + //*) + # Not necessarily an ordinary path; POSIX reserves leading '//' + # and for example Cygwin uses it to access remote file shares + # over CIFS/SMB, so we conserve a leading double slash if found. + func_normal_abspath_altnamespace=/ + ;; + /*) + # Absolute path, do nothing. + ;; + *) + # Relative path, prepend $cwd. + func_normal_abspath_tpath=`pwd`/$func_normal_abspath_tpath + ;; + esac + # Cancel out all the simple stuff to save iterations. We also want + # the path to end with a slash for ease of parsing, so make sure + # there is one (and only one) here. + func_normal_abspath_tpath=`$ECHO "$func_normal_abspath_tpath" | $SED \ + -e "$removedotparts" -e "$collapseslashes" -e "$finalslash"` + while :; do + # Processed it all yet? + if test "$func_normal_abspath_tpath" = / ; then + # If we ascended to the root using ".." the result may be empty now. + if test -z "$func_normal_abspath_result" ; then + func_normal_abspath_result=/ + fi + break + fi + func_normal_abspath_tcomponent=`$ECHO "$func_normal_abspath_tpath" | $SED \ + -e "$pathcar"` + func_normal_abspath_tpath=`$ECHO "$func_normal_abspath_tpath" | $SED \ + -e "$pathcdr"` + # Figure out what to do with it + case $func_normal_abspath_tcomponent in + "") + # Trailing empty path component, ignore it. + ;; + ..) + # Parent dir; strip last assembled component from result. + func_dirname "$func_normal_abspath_result" + func_normal_abspath_result=$func_dirname_result + ;; + *) + # Actual path component, append it. + func_normal_abspath_result=$func_normal_abspath_result/$func_normal_abspath_tcomponent + ;; + esac + done + # Restore leading double-slash if one was found on entry. + func_normal_abspath_result=$func_normal_abspath_altnamespace$func_normal_abspath_result +} + +# func_relative_path SRCDIR DSTDIR +# generates a relative path from SRCDIR to DSTDIR, with a trailing +# slash if non-empty, suitable for immediately appending a filename +# without needing to append a separator. +# value returned in "$func_relative_path_result" +func_relative_path () +{ + func_relative_path_result= + func_normal_abspath "$1" + func_relative_path_tlibdir=$func_normal_abspath_result + func_normal_abspath "$2" + func_relative_path_tbindir=$func_normal_abspath_result + + # Ascend the tree starting from libdir + while :; do + # check if we have found a prefix of bindir + case $func_relative_path_tbindir in + $func_relative_path_tlibdir) + # found an exact match + func_relative_path_tcancelled= + break + ;; + $func_relative_path_tlibdir*) + # found a matching prefix + func_stripname "$func_relative_path_tlibdir" '' "$func_relative_path_tbindir" + func_relative_path_tcancelled=$func_stripname_result + if test -z "$func_relative_path_result"; then + func_relative_path_result=. + fi + break + ;; + *) + func_dirname $func_relative_path_tlibdir + func_relative_path_tlibdir=${func_dirname_result} + if test "x$func_relative_path_tlibdir" = x ; then + # Have to descend all the way to the root! + func_relative_path_result=../$func_relative_path_result + func_relative_path_tcancelled=$func_relative_path_tbindir + break + fi + func_relative_path_result=../$func_relative_path_result + ;; + esac + done + + # Now calculate path; take care to avoid doubling-up slashes. + func_stripname '' '/' "$func_relative_path_result" + func_relative_path_result=$func_stripname_result + func_stripname '/' '/' "$func_relative_path_tcancelled" + if test "x$func_stripname_result" != x ; then + func_relative_path_result=${func_relative_path_result}/${func_stripname_result} + fi + + # Normalisation. If bindir is libdir, return empty string, + # else relative path ending with a slash; either way, target + # file name can be directly appended. + if test ! -z "$func_relative_path_result"; then + func_stripname './' '' "$func_relative_path_result/" + func_relative_path_result=$func_stripname_result + fi +} + +# The name of this program: +func_dirname_and_basename "$progpath" +progname=$func_basename_result + +# Make sure we have an absolute path for reexecution: +case $progpath in + [\\/]*|[A-Za-z]:\\*) ;; + *[\\/]*) + progdir=$func_dirname_result + progdir=`cd "$progdir" && pwd` + progpath="$progdir/$progname" + ;; + *) + save_IFS="$IFS" + IFS=${PATH_SEPARATOR-:} + for progdir in $PATH; do + IFS="$save_IFS" + test -x "$progdir/$progname" && break + done + IFS="$save_IFS" + test -n "$progdir" || progdir=`pwd` + progpath="$progdir/$progname" + ;; +esac + +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +Xsed="${SED}"' -e 1s/^X//' +sed_quote_subst='s/\([`"$\\]\)/\\\1/g' + +# Same as above, but do not quote variable references. +double_quote_subst='s/\(["`\\]\)/\\\1/g' + +# Sed substitution that turns a string into a regex matching for the +# string literally. +sed_make_literal_regex='s,[].[^$\\*\/],\\&,g' + +# Sed substitution that converts a w32 file name or path +# which contains forward slashes, into one that contains +# (escaped) backslashes. A very naive implementation. +lt_sed_naive_backslashify='s|\\\\*|\\|g;s|/|\\|g;s|\\|\\\\|g' + +# Re-`\' parameter expansions in output of double_quote_subst that were +# `\'-ed in input to the same. If an odd number of `\' preceded a '$' +# in input to double_quote_subst, that '$' was protected from expansion. +# Since each input `\' is now two `\'s, look for any number of runs of +# four `\'s followed by two `\'s and then a '$'. `\' that '$'. +bs='\\' +bs2='\\\\' +bs4='\\\\\\\\' +dollar='\$' +sed_double_backslash="\ + s/$bs4/&\\ +/g + s/^$bs2$dollar/$bs&/ + s/\\([^$bs]\\)$bs2$dollar/\\1$bs2$bs$dollar/g + s/\n//g" + +# Standard options: +opt_dry_run=false +opt_help=false +opt_quiet=false +opt_verbose=false +opt_warning=: + +# func_echo arg... +# Echo program name prefixed message, along with the current mode +# name if it has been set yet. +func_echo () +{ + $ECHO "$progname: ${opt_mode+$opt_mode: }$*" +} + +# func_verbose arg... +# Echo program name prefixed message in verbose mode only. +func_verbose () +{ + $opt_verbose && func_echo ${1+"$@"} + + # A bug in bash halts the script if the last line of a function + # fails when set -e is in force, so we need another command to + # work around that: + : +} + +# func_echo_all arg... +# Invoke $ECHO with all args, space-separated. +func_echo_all () +{ + $ECHO "$*" +} + +# func_error arg... +# Echo program name prefixed message to standard error. +func_error () +{ + $ECHO "$progname: ${opt_mode+$opt_mode: }"${1+"$@"} 1>&2 +} + +# func_warning arg... +# Echo program name prefixed warning message to standard error. +func_warning () +{ + $opt_warning && $ECHO "$progname: ${opt_mode+$opt_mode: }warning: "${1+"$@"} 1>&2 + + # bash bug again: + : +} + +# func_fatal_error arg... +# Echo program name prefixed message to standard error, and exit. +func_fatal_error () +{ + func_error ${1+"$@"} + exit $EXIT_FAILURE +} + +# func_fatal_help arg... +# Echo program name prefixed message to standard error, followed by +# a help hint, and exit. +func_fatal_help () +{ + func_error ${1+"$@"} + func_fatal_error "$help" +} +help="Try \`$progname --help' for more information." ## default + + +# func_grep expression filename +# Check whether EXPRESSION matches any line of FILENAME, without output. +func_grep () +{ + $GREP "$1" "$2" >/dev/null 2>&1 +} + + +# func_mkdir_p directory-path +# Make sure the entire path to DIRECTORY-PATH is available. +func_mkdir_p () +{ + my_directory_path="$1" + my_dir_list= + + if test -n "$my_directory_path" && test "$opt_dry_run" != ":"; then + + # Protect directory names starting with `-' + case $my_directory_path in + -*) my_directory_path="./$my_directory_path" ;; + esac + + # While some portion of DIR does not yet exist... + while test ! -d "$my_directory_path"; do + # ...make a list in topmost first order. Use a colon delimited + # list incase some portion of path contains whitespace. + my_dir_list="$my_directory_path:$my_dir_list" + + # If the last portion added has no slash in it, the list is done + case $my_directory_path in */*) ;; *) break ;; esac + + # ...otherwise throw away the child directory and loop + my_directory_path=`$ECHO "$my_directory_path" | $SED -e "$dirname"` + done + my_dir_list=`$ECHO "$my_dir_list" | $SED 's,:*$,,'` + + save_mkdir_p_IFS="$IFS"; IFS=':' + for my_dir in $my_dir_list; do + IFS="$save_mkdir_p_IFS" + # mkdir can fail with a `File exist' error if two processes + # try to create one of the directories concurrently. Don't + # stop in that case! + $MKDIR "$my_dir" 2>/dev/null || : + done + IFS="$save_mkdir_p_IFS" + + # Bail out if we (or some other process) failed to create a directory. + test -d "$my_directory_path" || \ + func_fatal_error "Failed to create \`$1'" + fi +} + + +# func_mktempdir [string] +# Make a temporary directory that won't clash with other running +# libtool processes, and avoids race conditions if possible. If +# given, STRING is the basename for that directory. +func_mktempdir () +{ + my_template="${TMPDIR-/tmp}/${1-$progname}" + + if test "$opt_dry_run" = ":"; then + # Return a directory name, but don't create it in dry-run mode + my_tmpdir="${my_template}-$$" + else + + # If mktemp works, use that first and foremost + my_tmpdir=`mktemp -d "${my_template}-XXXXXXXX" 2>/dev/null` + + if test ! -d "$my_tmpdir"; then + # Failing that, at least try and use $RANDOM to avoid a race + my_tmpdir="${my_template}-${RANDOM-0}$$" + + save_mktempdir_umask=`umask` + umask 0077 + $MKDIR "$my_tmpdir" + umask $save_mktempdir_umask + fi + + # If we're not in dry-run mode, bomb out on failure + test -d "$my_tmpdir" || \ + func_fatal_error "cannot create temporary directory \`$my_tmpdir'" + fi + + $ECHO "$my_tmpdir" +} + + +# func_quote_for_eval arg +# Aesthetically quote ARG to be evaled later. +# This function returns two values: FUNC_QUOTE_FOR_EVAL_RESULT +# is double-quoted, suitable for a subsequent eval, whereas +# FUNC_QUOTE_FOR_EVAL_UNQUOTED_RESULT has merely all characters +# which are still active within double quotes backslashified. +func_quote_for_eval () +{ + case $1 in + *[\\\`\"\$]*) + func_quote_for_eval_unquoted_result=`$ECHO "$1" | $SED "$sed_quote_subst"` ;; + *) + func_quote_for_eval_unquoted_result="$1" ;; + esac + + case $func_quote_for_eval_unquoted_result in + # Double-quote args containing shell metacharacters to delay + # word splitting, command substitution and and variable + # expansion for a subsequent eval. + # Many Bourne shells cannot handle close brackets correctly + # in scan sets, so we specify it separately. + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + func_quote_for_eval_result="\"$func_quote_for_eval_unquoted_result\"" + ;; + *) + func_quote_for_eval_result="$func_quote_for_eval_unquoted_result" + esac +} + + +# func_quote_for_expand arg +# Aesthetically quote ARG to be evaled later; same as above, +# but do not quote variable references. +func_quote_for_expand () +{ + case $1 in + *[\\\`\"]*) + my_arg=`$ECHO "$1" | $SED \ + -e "$double_quote_subst" -e "$sed_double_backslash"` ;; + *) + my_arg="$1" ;; + esac + + case $my_arg in + # Double-quote args containing shell metacharacters to delay + # word splitting and command substitution for a subsequent eval. + # Many Bourne shells cannot handle close brackets correctly + # in scan sets, so we specify it separately. + *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") + my_arg="\"$my_arg\"" + ;; + esac + + func_quote_for_expand_result="$my_arg" +} + + +# func_show_eval cmd [fail_exp] +# Unless opt_silent is true, then output CMD. Then, if opt_dryrun is +# not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP +# is given, then evaluate it. +func_show_eval () +{ + my_cmd="$1" + my_fail_exp="${2-:}" + + ${opt_silent-false} || { + func_quote_for_expand "$my_cmd" + eval "func_echo $func_quote_for_expand_result" + } + + if ${opt_dry_run-false}; then :; else + eval "$my_cmd" + my_status=$? + if test "$my_status" -eq 0; then :; else + eval "(exit $my_status); $my_fail_exp" + fi + fi +} + + +# func_show_eval_locale cmd [fail_exp] +# Unless opt_silent is true, then output CMD. Then, if opt_dryrun is +# not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP +# is given, then evaluate it. Use the saved locale for evaluation. +func_show_eval_locale () +{ + my_cmd="$1" + my_fail_exp="${2-:}" + + ${opt_silent-false} || { + func_quote_for_expand "$my_cmd" + eval "func_echo $func_quote_for_expand_result" + } + + if ${opt_dry_run-false}; then :; else + eval "$lt_user_locale + $my_cmd" + my_status=$? + eval "$lt_safe_locale" + if test "$my_status" -eq 0; then :; else + eval "(exit $my_status); $my_fail_exp" + fi + fi +} + +# func_tr_sh +# Turn $1 into a string suitable for a shell variable name. +# Result is stored in $func_tr_sh_result. All characters +# not in the set a-zA-Z0-9_ are replaced with '_'. Further, +# if $1 begins with a digit, a '_' is prepended as well. +func_tr_sh () +{ + case $1 in + [0-9]* | *[!a-zA-Z0-9_]*) + func_tr_sh_result=`$ECHO "$1" | $SED 's/^\([0-9]\)/_\1/; s/[^a-zA-Z0-9_]/_/g'` + ;; + * ) + func_tr_sh_result=$1 + ;; + esac +} + + +# func_version +# Echo version message to standard output and exit. +func_version () +{ + $opt_debug + + $SED -n '/(C)/!b go + :more + /\./!{ + N + s/\n# / / + b more + } + :go + /^# '$PROGRAM' (GNU /,/# warranty; / { + s/^# // + s/^# *$// + s/\((C)\)[ 0-9,-]*\( [1-9][0-9]*\)/\1\2/ + p + }' < "$progpath" + exit $? +} + +# func_usage +# Echo short help message to standard output and exit. +func_usage () +{ + $opt_debug + + $SED -n '/^# Usage:/,/^# *.*--help/ { + s/^# // + s/^# *$// + s/\$progname/'$progname'/ + p + }' < "$progpath" + echo + $ECHO "run \`$progname --help | more' for full usage" + exit $? +} + +# func_help [NOEXIT] +# Echo long help message to standard output and exit, +# unless 'noexit' is passed as argument. +func_help () +{ + $opt_debug + + $SED -n '/^# Usage:/,/# Report bugs to/ { + :print + s/^# // + s/^# *$// + s*\$progname*'$progname'* + s*\$host*'"$host"'* + s*\$SHELL*'"$SHELL"'* + s*\$LTCC*'"$LTCC"'* + s*\$LTCFLAGS*'"$LTCFLAGS"'* + s*\$LD*'"$LD"'* + s/\$with_gnu_ld/'"$with_gnu_ld"'/ + s/\$automake_version/'"`(${AUTOMAKE-automake} --version) 2>/dev/null |$SED 1q`"'/ + s/\$autoconf_version/'"`(${AUTOCONF-autoconf} --version) 2>/dev/null |$SED 1q`"'/ + p + d + } + /^# .* home page:/b print + /^# General help using/b print + ' < "$progpath" + ret=$? + if test -z "$1"; then + exit $ret + fi +} + +# func_missing_arg argname +# Echo program name prefixed message to standard error and set global +# exit_cmd. +func_missing_arg () +{ + $opt_debug + + func_error "missing argument for $1." + exit_cmd=exit +} + + +# func_split_short_opt shortopt +# Set func_split_short_opt_name and func_split_short_opt_arg shell +# variables after splitting SHORTOPT after the 2nd character. +func_split_short_opt () +{ + my_sed_short_opt='1s/^\(..\).*$/\1/;q' + my_sed_short_rest='1s/^..\(.*\)$/\1/;q' + + func_split_short_opt_name=`$ECHO "$1" | $SED "$my_sed_short_opt"` + func_split_short_opt_arg=`$ECHO "$1" | $SED "$my_sed_short_rest"` +} # func_split_short_opt may be replaced by extended shell implementation + + +# func_split_long_opt longopt +# Set func_split_long_opt_name and func_split_long_opt_arg shell +# variables after splitting LONGOPT at the `=' sign. +func_split_long_opt () +{ + my_sed_long_opt='1s/^\(--[^=]*\)=.*/\1/;q' + my_sed_long_arg='1s/^--[^=]*=//' + + func_split_long_opt_name=`$ECHO "$1" | $SED "$my_sed_long_opt"` + func_split_long_opt_arg=`$ECHO "$1" | $SED "$my_sed_long_arg"` +} # func_split_long_opt may be replaced by extended shell implementation + +exit_cmd=: + + + + + +magic="%%%MAGIC variable%%%" +magic_exe="%%%MAGIC EXE variable%%%" + +# Global variables. +nonopt= +preserve_args= +lo2o="s/\\.lo\$/.${objext}/" +o2lo="s/\\.${objext}\$/.lo/" +extracted_archives= +extracted_serial=0 + +# If this variable is set in any of the actions, the command in it +# will be execed at the end. This prevents here-documents from being +# left over by shells. +exec_cmd= + +# func_append var value +# Append VALUE to the end of shell variable VAR. +func_append () +{ + eval "${1}=\$${1}\${2}" +} # func_append may be replaced by extended shell implementation + +# func_append_quoted var value +# Quote VALUE and append to the end of shell variable VAR, separated +# by a space. +func_append_quoted () +{ + func_quote_for_eval "${2}" + eval "${1}=\$${1}\\ \$func_quote_for_eval_result" +} # func_append_quoted may be replaced by extended shell implementation + + +# func_arith arithmetic-term... +func_arith () +{ + func_arith_result=`expr "${@}"` +} # func_arith may be replaced by extended shell implementation + + +# func_len string +# STRING may not start with a hyphen. +func_len () +{ + func_len_result=`expr "${1}" : ".*" 2>/dev/null || echo $max_cmd_len` +} # func_len may be replaced by extended shell implementation + + +# func_lo2o object +func_lo2o () +{ + func_lo2o_result=`$ECHO "${1}" | $SED "$lo2o"` +} # func_lo2o may be replaced by extended shell implementation + + +# func_xform libobj-or-source +func_xform () +{ + func_xform_result=`$ECHO "${1}" | $SED 's/\.[^.]*$/.lo/'` +} # func_xform may be replaced by extended shell implementation + + +# func_fatal_configuration arg... +# Echo program name prefixed message to standard error, followed by +# a configuration failure hint, and exit. +func_fatal_configuration () +{ + func_error ${1+"$@"} + func_error "See the $PACKAGE documentation for more information." + func_fatal_error "Fatal configuration error." +} + + +# func_config +# Display the configuration for all the tags in this script. +func_config () +{ + re_begincf='^# ### BEGIN LIBTOOL' + re_endcf='^# ### END LIBTOOL' + + # Default configuration. + $SED "1,/$re_begincf CONFIG/d;/$re_endcf CONFIG/,\$d" < "$progpath" + + # Now print the configurations for the tags. + for tagname in $taglist; do + $SED -n "/$re_begincf TAG CONFIG: $tagname\$/,/$re_endcf TAG CONFIG: $tagname\$/p" < "$progpath" + done + + exit $? +} + +# func_features +# Display the features supported by this script. +func_features () +{ + echo "host: $host" + if test "$build_libtool_libs" = yes; then + echo "enable shared libraries" + else + echo "disable shared libraries" + fi + if test "$build_old_libs" = yes; then + echo "enable static libraries" + else + echo "disable static libraries" + fi + + exit $? +} + +# func_enable_tag tagname +# Verify that TAGNAME is valid, and either flag an error and exit, or +# enable the TAGNAME tag. We also add TAGNAME to the global $taglist +# variable here. +func_enable_tag () +{ + # Global variable: + tagname="$1" + + re_begincf="^# ### BEGIN LIBTOOL TAG CONFIG: $tagname\$" + re_endcf="^# ### END LIBTOOL TAG CONFIG: $tagname\$" + sed_extractcf="/$re_begincf/,/$re_endcf/p" + + # Validate tagname. + case $tagname in + *[!-_A-Za-z0-9,/]*) + func_fatal_error "invalid tag name: $tagname" + ;; + esac + + # Don't test for the "default" C tag, as we know it's + # there but not specially marked. + case $tagname in + CC) ;; + *) + if $GREP "$re_begincf" "$progpath" >/dev/null 2>&1; then + taglist="$taglist $tagname" + + # Evaluate the configuration. Be careful to quote the path + # and the sed script, to avoid splitting on whitespace, but + # also don't use non-portable quotes within backquotes within + # quotes we have to do it in 2 steps: + extractedcf=`$SED -n -e "$sed_extractcf" < "$progpath"` + eval "$extractedcf" + else + func_error "ignoring unknown tag $tagname" + fi + ;; + esac +} + +# func_check_version_match +# Ensure that we are using m4 macros, and libtool script from the same +# release of libtool. +func_check_version_match () +{ + if test "$package_revision" != "$macro_revision"; then + if test "$VERSION" != "$macro_version"; then + if test -z "$macro_version"; then + cat >&2 <<_LT_EOF +$progname: Version mismatch error. This is $PACKAGE $VERSION, but the +$progname: definition of this LT_INIT comes from an older release. +$progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION +$progname: and run autoconf again. +_LT_EOF + else + cat >&2 <<_LT_EOF +$progname: Version mismatch error. This is $PACKAGE $VERSION, but the +$progname: definition of this LT_INIT comes from $PACKAGE $macro_version. +$progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION +$progname: and run autoconf again. +_LT_EOF + fi + else + cat >&2 <<_LT_EOF +$progname: Version mismatch error. This is $PACKAGE $VERSION, revision $package_revision, +$progname: but the definition of this LT_INIT comes from revision $macro_revision. +$progname: You should recreate aclocal.m4 with macros from revision $package_revision +$progname: of $PACKAGE $VERSION and run autoconf again. +_LT_EOF + fi + + exit $EXIT_MISMATCH + fi +} + + +# Shorthand for --mode=foo, only valid as the first argument +case $1 in +clean|clea|cle|cl) + shift; set dummy --mode clean ${1+"$@"}; shift + ;; +compile|compil|compi|comp|com|co|c) + shift; set dummy --mode compile ${1+"$@"}; shift + ;; +execute|execut|execu|exec|exe|ex|e) + shift; set dummy --mode execute ${1+"$@"}; shift + ;; +finish|finis|fini|fin|fi|f) + shift; set dummy --mode finish ${1+"$@"}; shift + ;; +install|instal|insta|inst|ins|in|i) + shift; set dummy --mode install ${1+"$@"}; shift + ;; +link|lin|li|l) + shift; set dummy --mode link ${1+"$@"}; shift + ;; +uninstall|uninstal|uninsta|uninst|unins|unin|uni|un|u) + shift; set dummy --mode uninstall ${1+"$@"}; shift + ;; +esac + + + +# Option defaults: +opt_debug=: +opt_dry_run=false +opt_config=false +opt_preserve_dup_deps=false +opt_features=false +opt_finish=false +opt_help=false +opt_help_all=false +opt_silent=: +opt_warning=: +opt_verbose=: +opt_silent=false +opt_verbose=false + + +# Parse options once, thoroughly. This comes as soon as possible in the +# script to make things like `--version' happen as quickly as we can. +{ + # this just eases exit handling + while test $# -gt 0; do + opt="$1" + shift + case $opt in + --debug|-x) opt_debug='set -x' + func_echo "enabling shell trace mode" + $opt_debug + ;; + --dry-run|--dryrun|-n) + opt_dry_run=: + ;; + --config) + opt_config=: +func_config + ;; + --dlopen|-dlopen) + optarg="$1" + opt_dlopen="${opt_dlopen+$opt_dlopen +}$optarg" + shift + ;; + --preserve-dup-deps) + opt_preserve_dup_deps=: + ;; + --features) + opt_features=: +func_features + ;; + --finish) + opt_finish=: +set dummy --mode finish ${1+"$@"}; shift + ;; + --help) + opt_help=: + ;; + --help-all) + opt_help_all=: +opt_help=': help-all' + ;; + --mode) + test $# = 0 && func_missing_arg $opt && break + optarg="$1" + opt_mode="$optarg" +case $optarg in + # Valid mode arguments: + clean|compile|execute|finish|install|link|relink|uninstall) ;; + + # Catch anything else as an error + *) func_error "invalid argument for $opt" + exit_cmd=exit + break + ;; +esac + shift + ;; + --no-silent|--no-quiet) + opt_silent=false +func_append preserve_args " $opt" + ;; + --no-warning|--no-warn) + opt_warning=false +func_append preserve_args " $opt" + ;; + --no-verbose) + opt_verbose=false +func_append preserve_args " $opt" + ;; + --silent|--quiet) + opt_silent=: +func_append preserve_args " $opt" + opt_verbose=false + ;; + --verbose|-v) + opt_verbose=: +func_append preserve_args " $opt" +opt_silent=false + ;; + --tag) + test $# = 0 && func_missing_arg $opt && break + optarg="$1" + opt_tag="$optarg" +func_append preserve_args " $opt $optarg" +func_enable_tag "$optarg" + shift + ;; + + -\?|-h) func_usage ;; + --help) func_help ;; + --version) func_version ;; + + # Separate optargs to long options: + --*=*) + func_split_long_opt "$opt" + set dummy "$func_split_long_opt_name" "$func_split_long_opt_arg" ${1+"$@"} + shift + ;; + + # Separate non-argument short options: + -\?*|-h*|-n*|-v*) + func_split_short_opt "$opt" + set dummy "$func_split_short_opt_name" "-$func_split_short_opt_arg" ${1+"$@"} + shift + ;; + + --) break ;; + -*) func_fatal_help "unrecognized option \`$opt'" ;; + *) set dummy "$opt" ${1+"$@"}; shift; break ;; + esac + done + + # Validate options: + + # save first non-option argument + if test "$#" -gt 0; then + nonopt="$opt" + shift + fi + + # preserve --debug + test "$opt_debug" = : || func_append preserve_args " --debug" + + case $host in + *cygwin* | *mingw* | *pw32* | *cegcc*) + # don't eliminate duplications in $postdeps and $predeps + opt_duplicate_compiler_generated_deps=: + ;; + *) + opt_duplicate_compiler_generated_deps=$opt_preserve_dup_deps + ;; + esac + + $opt_help || { + # Sanity checks first: + func_check_version_match + + if test "$build_libtool_libs" != yes && test "$build_old_libs" != yes; then + func_fatal_configuration "not configured to build any kind of library" + fi + + # Darwin sucks + eval std_shrext=\"$shrext_cmds\" + + # Only execute mode is allowed to have -dlopen flags. + if test -n "$opt_dlopen" && test "$opt_mode" != execute; then + func_error "unrecognized option \`-dlopen'" + $ECHO "$help" 1>&2 + exit $EXIT_FAILURE + fi + + # Change the help message to a mode-specific one. + generic_help="$help" + help="Try \`$progname --help --mode=$opt_mode' for more information." + } + + + # Bail if the options were screwed + $exit_cmd $EXIT_FAILURE +} + + + + +## ----------- ## +## Main. ## +## ----------- ## + +# func_lalib_p file +# True iff FILE is a libtool `.la' library or `.lo' object file. +# This function is only a basic sanity check; it will hardly flush out +# determined imposters. +func_lalib_p () +{ + test -f "$1" && + $SED -e 4q "$1" 2>/dev/null \ + | $GREP "^# Generated by .*$PACKAGE" > /dev/null 2>&1 +} + +# func_lalib_unsafe_p file +# True iff FILE is a libtool `.la' library or `.lo' object file. +# This function implements the same check as func_lalib_p without +# resorting to external programs. To this end, it redirects stdin and +# closes it afterwards, without saving the original file descriptor. +# As a safety measure, use it only where a negative result would be +# fatal anyway. Works if `file' does not exist. +func_lalib_unsafe_p () +{ + lalib_p=no + if test -f "$1" && test -r "$1" && exec 5<&0 <"$1"; then + for lalib_p_l in 1 2 3 4 + do + read lalib_p_line + case "$lalib_p_line" in + \#\ Generated\ by\ *$PACKAGE* ) lalib_p=yes; break;; + esac + done + exec 0<&5 5<&- + fi + test "$lalib_p" = yes +} + +# func_ltwrapper_script_p file +# True iff FILE is a libtool wrapper script +# This function is only a basic sanity check; it will hardly flush out +# determined imposters. +func_ltwrapper_script_p () +{ + func_lalib_p "$1" +} + +# func_ltwrapper_executable_p file +# True iff FILE is a libtool wrapper executable +# This function is only a basic sanity check; it will hardly flush out +# determined imposters. +func_ltwrapper_executable_p () +{ + func_ltwrapper_exec_suffix= + case $1 in + *.exe) ;; + *) func_ltwrapper_exec_suffix=.exe ;; + esac + $GREP "$magic_exe" "$1$func_ltwrapper_exec_suffix" >/dev/null 2>&1 +} + +# func_ltwrapper_scriptname file +# Assumes file is an ltwrapper_executable +# uses $file to determine the appropriate filename for a +# temporary ltwrapper_script. +func_ltwrapper_scriptname () +{ + func_dirname_and_basename "$1" "" "." + func_stripname '' '.exe' "$func_basename_result" + func_ltwrapper_scriptname_result="$func_dirname_result/$objdir/${func_stripname_result}_ltshwrapper" +} + +# func_ltwrapper_p file +# True iff FILE is a libtool wrapper script or wrapper executable +# This function is only a basic sanity check; it will hardly flush out +# determined imposters. +func_ltwrapper_p () +{ + func_ltwrapper_script_p "$1" || func_ltwrapper_executable_p "$1" +} + + +# func_execute_cmds commands fail_cmd +# Execute tilde-delimited COMMANDS. +# If FAIL_CMD is given, eval that upon failure. +# FAIL_CMD may read-access the current command in variable CMD! +func_execute_cmds () +{ + $opt_debug + save_ifs=$IFS; IFS='~' + for cmd in $1; do + IFS=$save_ifs + eval cmd=\"$cmd\" + func_show_eval "$cmd" "${2-:}" + done + IFS=$save_ifs +} + + +# func_source file +# Source FILE, adding directory component if necessary. +# Note that it is not necessary on cygwin/mingw to append a dot to +# FILE even if both FILE and FILE.exe exist: automatic-append-.exe +# behavior happens only for exec(3), not for open(2)! Also, sourcing +# `FILE.' does not work on cygwin managed mounts. +func_source () +{ + $opt_debug + case $1 in + */* | *\\*) . "$1" ;; + *) . "./$1" ;; + esac +} + + +# func_resolve_sysroot PATH +# Replace a leading = in PATH with a sysroot. Store the result into +# func_resolve_sysroot_result +func_resolve_sysroot () +{ + func_resolve_sysroot_result=$1 + case $func_resolve_sysroot_result in + =*) + func_stripname '=' '' "$func_resolve_sysroot_result" + func_resolve_sysroot_result=$lt_sysroot$func_stripname_result + ;; + esac +} + +# func_replace_sysroot PATH +# If PATH begins with the sysroot, replace it with = and +# store the result into func_replace_sysroot_result. +func_replace_sysroot () +{ + case "$lt_sysroot:$1" in + ?*:"$lt_sysroot"*) + func_stripname "$lt_sysroot" '' "$1" + func_replace_sysroot_result="=$func_stripname_result" + ;; + *) + # Including no sysroot. + func_replace_sysroot_result=$1 + ;; + esac +} + +# func_infer_tag arg +# Infer tagged configuration to use if any are available and +# if one wasn't chosen via the "--tag" command line option. +# Only attempt this if the compiler in the base compile +# command doesn't match the default compiler. +# arg is usually of the form 'gcc ...' +func_infer_tag () +{ + $opt_debug + if test -n "$available_tags" && test -z "$tagname"; then + CC_quoted= + for arg in $CC; do + func_append_quoted CC_quoted "$arg" + done + CC_expanded=`func_echo_all $CC` + CC_quoted_expanded=`func_echo_all $CC_quoted` + case $@ in + # Blanks in the command may have been stripped by the calling shell, + # but not from the CC environment variable when configure was run. + " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ + " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) ;; + # Blanks at the start of $base_compile will cause this to fail + # if we don't check for them as well. + *) + for z in $available_tags; do + if $GREP "^# ### BEGIN LIBTOOL TAG CONFIG: $z$" < "$progpath" > /dev/null; then + # Evaluate the configuration. + eval "`${SED} -n -e '/^# ### BEGIN LIBTOOL TAG CONFIG: '$z'$/,/^# ### END LIBTOOL TAG CONFIG: '$z'$/p' < $progpath`" + CC_quoted= + for arg in $CC; do + # Double-quote args containing other shell metacharacters. + func_append_quoted CC_quoted "$arg" + done + CC_expanded=`func_echo_all $CC` + CC_quoted_expanded=`func_echo_all $CC_quoted` + case "$@ " in + " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ + " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) + # The compiler in the base compile command matches + # the one in the tagged configuration. + # Assume this is the tagged configuration we want. + tagname=$z + break + ;; + esac + fi + done + # If $tagname still isn't set, then no tagged configuration + # was found and let the user know that the "--tag" command + # line option must be used. + if test -z "$tagname"; then + func_echo "unable to infer tagged configuration" + func_fatal_error "specify a tag with \`--tag'" +# else +# func_verbose "using $tagname tagged configuration" + fi + ;; + esac + fi +} + + + +# func_write_libtool_object output_name pic_name nonpic_name +# Create a libtool object file (analogous to a ".la" file), +# but don't create it if we're doing a dry run. +func_write_libtool_object () +{ + write_libobj=${1} + if test "$build_libtool_libs" = yes; then + write_lobj=\'${2}\' + else + write_lobj=none + fi + + if test "$build_old_libs" = yes; then + write_oldobj=\'${3}\' + else + write_oldobj=none + fi + + $opt_dry_run || { + cat >${write_libobj}T </dev/null` + if test "$?" -eq 0 && test -n "${func_convert_core_file_wine_to_w32_tmp}"; then + func_convert_core_file_wine_to_w32_result=`$ECHO "$func_convert_core_file_wine_to_w32_tmp" | + $SED -e "$lt_sed_naive_backslashify"` + else + func_convert_core_file_wine_to_w32_result= + fi + fi +} +# end: func_convert_core_file_wine_to_w32 + + +# func_convert_core_path_wine_to_w32 ARG +# Helper function used by path conversion functions when $build is *nix, and +# $host is mingw, cygwin, or some other w32 environment. Relies on a correctly +# configured wine environment available, with the winepath program in $build's +# $PATH. Assumes ARG has no leading or trailing path separator characters. +# +# ARG is path to be converted from $build format to win32. +# Result is available in $func_convert_core_path_wine_to_w32_result. +# Unconvertible file (directory) names in ARG are skipped; if no directory names +# are convertible, then the result may be empty. +func_convert_core_path_wine_to_w32 () +{ + $opt_debug + # unfortunately, winepath doesn't convert paths, only file names + func_convert_core_path_wine_to_w32_result="" + if test -n "$1"; then + oldIFS=$IFS + IFS=: + for func_convert_core_path_wine_to_w32_f in $1; do + IFS=$oldIFS + func_convert_core_file_wine_to_w32 "$func_convert_core_path_wine_to_w32_f" + if test -n "$func_convert_core_file_wine_to_w32_result" ; then + if test -z "$func_convert_core_path_wine_to_w32_result"; then + func_convert_core_path_wine_to_w32_result="$func_convert_core_file_wine_to_w32_result" + else + func_append func_convert_core_path_wine_to_w32_result ";$func_convert_core_file_wine_to_w32_result" + fi + fi + done + IFS=$oldIFS + fi +} +# end: func_convert_core_path_wine_to_w32 + + +# func_cygpath ARGS... +# Wrapper around calling the cygpath program via LT_CYGPATH. This is used when +# when (1) $build is *nix and Cygwin is hosted via a wine environment; or (2) +# $build is MSYS and $host is Cygwin, or (3) $build is Cygwin. In case (1) or +# (2), returns the Cygwin file name or path in func_cygpath_result (input +# file name or path is assumed to be in w32 format, as previously converted +# from $build's *nix or MSYS format). In case (3), returns the w32 file name +# or path in func_cygpath_result (input file name or path is assumed to be in +# Cygwin format). Returns an empty string on error. +# +# ARGS are passed to cygpath, with the last one being the file name or path to +# be converted. +# +# Specify the absolute *nix (or w32) name to cygpath in the LT_CYGPATH +# environment variable; do not put it in $PATH. +func_cygpath () +{ + $opt_debug + if test -n "$LT_CYGPATH" && test -f "$LT_CYGPATH"; then + func_cygpath_result=`$LT_CYGPATH "$@" 2>/dev/null` + if test "$?" -ne 0; then + # on failure, ensure result is empty + func_cygpath_result= + fi + else + func_cygpath_result= + func_error "LT_CYGPATH is empty or specifies non-existent file: \`$LT_CYGPATH'" + fi +} +#end: func_cygpath + + +# func_convert_core_msys_to_w32 ARG +# Convert file name or path ARG from MSYS format to w32 format. Return +# result in func_convert_core_msys_to_w32_result. +func_convert_core_msys_to_w32 () +{ + $opt_debug + # awkward: cmd appends spaces to result + func_convert_core_msys_to_w32_result=`( cmd //c echo "$1" ) 2>/dev/null | + $SED -e 's/[ ]*$//' -e "$lt_sed_naive_backslashify"` +} +#end: func_convert_core_msys_to_w32 + + +# func_convert_file_check ARG1 ARG2 +# Verify that ARG1 (a file name in $build format) was converted to $host +# format in ARG2. Otherwise, emit an error message, but continue (resetting +# func_to_host_file_result to ARG1). +func_convert_file_check () +{ + $opt_debug + if test -z "$2" && test -n "$1" ; then + func_error "Could not determine host file name corresponding to" + func_error " \`$1'" + func_error "Continuing, but uninstalled executables may not work." + # Fallback: + func_to_host_file_result="$1" + fi +} +# end func_convert_file_check + + +# func_convert_path_check FROM_PATHSEP TO_PATHSEP FROM_PATH TO_PATH +# Verify that FROM_PATH (a path in $build format) was converted to $host +# format in TO_PATH. Otherwise, emit an error message, but continue, resetting +# func_to_host_file_result to a simplistic fallback value (see below). +func_convert_path_check () +{ + $opt_debug + if test -z "$4" && test -n "$3"; then + func_error "Could not determine the host path corresponding to" + func_error " \`$3'" + func_error "Continuing, but uninstalled executables may not work." + # Fallback. This is a deliberately simplistic "conversion" and + # should not be "improved". See libtool.info. + if test "x$1" != "x$2"; then + lt_replace_pathsep_chars="s|$1|$2|g" + func_to_host_path_result=`echo "$3" | + $SED -e "$lt_replace_pathsep_chars"` + else + func_to_host_path_result="$3" + fi + fi +} +# end func_convert_path_check + + +# func_convert_path_front_back_pathsep FRONTPAT BACKPAT REPL ORIG +# Modifies func_to_host_path_result by prepending REPL if ORIG matches FRONTPAT +# and appending REPL if ORIG matches BACKPAT. +func_convert_path_front_back_pathsep () +{ + $opt_debug + case $4 in + $1 ) func_to_host_path_result="$3$func_to_host_path_result" + ;; + esac + case $4 in + $2 ) func_append func_to_host_path_result "$3" + ;; + esac +} +# end func_convert_path_front_back_pathsep + + +################################################## +# $build to $host FILE NAME CONVERSION FUNCTIONS # +################################################## +# invoked via `$to_host_file_cmd ARG' +# +# In each case, ARG is the path to be converted from $build to $host format. +# Result will be available in $func_to_host_file_result. + + +# func_to_host_file ARG +# Converts the file name ARG from $build format to $host format. Return result +# in func_to_host_file_result. +func_to_host_file () +{ + $opt_debug + $to_host_file_cmd "$1" +} +# end func_to_host_file + + +# func_to_tool_file ARG LAZY +# converts the file name ARG from $build format to toolchain format. Return +# result in func_to_tool_file_result. If the conversion in use is listed +# in (the comma separated) LAZY, no conversion takes place. +func_to_tool_file () +{ + $opt_debug + case ,$2, in + *,"$to_tool_file_cmd",*) + func_to_tool_file_result=$1 + ;; + *) + $to_tool_file_cmd "$1" + func_to_tool_file_result=$func_to_host_file_result + ;; + esac +} +# end func_to_tool_file + + +# func_convert_file_noop ARG +# Copy ARG to func_to_host_file_result. +func_convert_file_noop () +{ + func_to_host_file_result="$1" +} +# end func_convert_file_noop + + +# func_convert_file_msys_to_w32 ARG +# Convert file name ARG from (mingw) MSYS to (mingw) w32 format; automatic +# conversion to w32 is not available inside the cwrapper. Returns result in +# func_to_host_file_result. +func_convert_file_msys_to_w32 () +{ + $opt_debug + func_to_host_file_result="$1" + if test -n "$1"; then + func_convert_core_msys_to_w32 "$1" + func_to_host_file_result="$func_convert_core_msys_to_w32_result" + fi + func_convert_file_check "$1" "$func_to_host_file_result" +} +# end func_convert_file_msys_to_w32 + + +# func_convert_file_cygwin_to_w32 ARG +# Convert file name ARG from Cygwin to w32 format. Returns result in +# func_to_host_file_result. +func_convert_file_cygwin_to_w32 () +{ + $opt_debug + func_to_host_file_result="$1" + if test -n "$1"; then + # because $build is cygwin, we call "the" cygpath in $PATH; no need to use + # LT_CYGPATH in this case. + func_to_host_file_result=`cygpath -m "$1"` + fi + func_convert_file_check "$1" "$func_to_host_file_result" +} +# end func_convert_file_cygwin_to_w32 + + +# func_convert_file_nix_to_w32 ARG +# Convert file name ARG from *nix to w32 format. Requires a wine environment +# and a working winepath. Returns result in func_to_host_file_result. +func_convert_file_nix_to_w32 () +{ + $opt_debug + func_to_host_file_result="$1" + if test -n "$1"; then + func_convert_core_file_wine_to_w32 "$1" + func_to_host_file_result="$func_convert_core_file_wine_to_w32_result" + fi + func_convert_file_check "$1" "$func_to_host_file_result" +} +# end func_convert_file_nix_to_w32 + + +# func_convert_file_msys_to_cygwin ARG +# Convert file name ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. +# Returns result in func_to_host_file_result. +func_convert_file_msys_to_cygwin () +{ + $opt_debug + func_to_host_file_result="$1" + if test -n "$1"; then + func_convert_core_msys_to_w32 "$1" + func_cygpath -u "$func_convert_core_msys_to_w32_result" + func_to_host_file_result="$func_cygpath_result" + fi + func_convert_file_check "$1" "$func_to_host_file_result" +} +# end func_convert_file_msys_to_cygwin + + +# func_convert_file_nix_to_cygwin ARG +# Convert file name ARG from *nix to Cygwin format. Requires Cygwin installed +# in a wine environment, working winepath, and LT_CYGPATH set. Returns result +# in func_to_host_file_result. +func_convert_file_nix_to_cygwin () +{ + $opt_debug + func_to_host_file_result="$1" + if test -n "$1"; then + # convert from *nix to w32, then use cygpath to convert from w32 to cygwin. + func_convert_core_file_wine_to_w32 "$1" + func_cygpath -u "$func_convert_core_file_wine_to_w32_result" + func_to_host_file_result="$func_cygpath_result" + fi + func_convert_file_check "$1" "$func_to_host_file_result" +} +# end func_convert_file_nix_to_cygwin + + +############################################# +# $build to $host PATH CONVERSION FUNCTIONS # +############################################# +# invoked via `$to_host_path_cmd ARG' +# +# In each case, ARG is the path to be converted from $build to $host format. +# The result will be available in $func_to_host_path_result. +# +# Path separators are also converted from $build format to $host format. If +# ARG begins or ends with a path separator character, it is preserved (but +# converted to $host format) on output. +# +# All path conversion functions are named using the following convention: +# file name conversion function : func_convert_file_X_to_Y () +# path conversion function : func_convert_path_X_to_Y () +# where, for any given $build/$host combination the 'X_to_Y' value is the +# same. If conversion functions are added for new $build/$host combinations, +# the two new functions must follow this pattern, or func_init_to_host_path_cmd +# will break. + + +# func_init_to_host_path_cmd +# Ensures that function "pointer" variable $to_host_path_cmd is set to the +# appropriate value, based on the value of $to_host_file_cmd. +to_host_path_cmd= +func_init_to_host_path_cmd () +{ + $opt_debug + if test -z "$to_host_path_cmd"; then + func_stripname 'func_convert_file_' '' "$to_host_file_cmd" + to_host_path_cmd="func_convert_path_${func_stripname_result}" + fi +} + + +# func_to_host_path ARG +# Converts the path ARG from $build format to $host format. Return result +# in func_to_host_path_result. +func_to_host_path () +{ + $opt_debug + func_init_to_host_path_cmd + $to_host_path_cmd "$1" +} +# end func_to_host_path + + +# func_convert_path_noop ARG +# Copy ARG to func_to_host_path_result. +func_convert_path_noop () +{ + func_to_host_path_result="$1" +} +# end func_convert_path_noop + + +# func_convert_path_msys_to_w32 ARG +# Convert path ARG from (mingw) MSYS to (mingw) w32 format; automatic +# conversion to w32 is not available inside the cwrapper. Returns result in +# func_to_host_path_result. +func_convert_path_msys_to_w32 () +{ + $opt_debug + func_to_host_path_result="$1" + if test -n "$1"; then + # Remove leading and trailing path separator characters from ARG. MSYS + # behavior is inconsistent here; cygpath turns them into '.;' and ';.'; + # and winepath ignores them completely. + func_stripname : : "$1" + func_to_host_path_tmp1=$func_stripname_result + func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" + func_to_host_path_result="$func_convert_core_msys_to_w32_result" + func_convert_path_check : ";" \ + "$func_to_host_path_tmp1" "$func_to_host_path_result" + func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" + fi +} +# end func_convert_path_msys_to_w32 + + +# func_convert_path_cygwin_to_w32 ARG +# Convert path ARG from Cygwin to w32 format. Returns result in +# func_to_host_file_result. +func_convert_path_cygwin_to_w32 () +{ + $opt_debug + func_to_host_path_result="$1" + if test -n "$1"; then + # See func_convert_path_msys_to_w32: + func_stripname : : "$1" + func_to_host_path_tmp1=$func_stripname_result + func_to_host_path_result=`cygpath -m -p "$func_to_host_path_tmp1"` + func_convert_path_check : ";" \ + "$func_to_host_path_tmp1" "$func_to_host_path_result" + func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" + fi +} +# end func_convert_path_cygwin_to_w32 + + +# func_convert_path_nix_to_w32 ARG +# Convert path ARG from *nix to w32 format. Requires a wine environment and +# a working winepath. Returns result in func_to_host_file_result. +func_convert_path_nix_to_w32 () +{ + $opt_debug + func_to_host_path_result="$1" + if test -n "$1"; then + # See func_convert_path_msys_to_w32: + func_stripname : : "$1" + func_to_host_path_tmp1=$func_stripname_result + func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" + func_to_host_path_result="$func_convert_core_path_wine_to_w32_result" + func_convert_path_check : ";" \ + "$func_to_host_path_tmp1" "$func_to_host_path_result" + func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" + fi +} +# end func_convert_path_nix_to_w32 + + +# func_convert_path_msys_to_cygwin ARG +# Convert path ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. +# Returns result in func_to_host_file_result. +func_convert_path_msys_to_cygwin () +{ + $opt_debug + func_to_host_path_result="$1" + if test -n "$1"; then + # See func_convert_path_msys_to_w32: + func_stripname : : "$1" + func_to_host_path_tmp1=$func_stripname_result + func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" + func_cygpath -u -p "$func_convert_core_msys_to_w32_result" + func_to_host_path_result="$func_cygpath_result" + func_convert_path_check : : \ + "$func_to_host_path_tmp1" "$func_to_host_path_result" + func_convert_path_front_back_pathsep ":*" "*:" : "$1" + fi +} +# end func_convert_path_msys_to_cygwin + + +# func_convert_path_nix_to_cygwin ARG +# Convert path ARG from *nix to Cygwin format. Requires Cygwin installed in a +# a wine environment, working winepath, and LT_CYGPATH set. Returns result in +# func_to_host_file_result. +func_convert_path_nix_to_cygwin () +{ + $opt_debug + func_to_host_path_result="$1" + if test -n "$1"; then + # Remove leading and trailing path separator characters from + # ARG. msys behavior is inconsistent here, cygpath turns them + # into '.;' and ';.', and winepath ignores them completely. + func_stripname : : "$1" + func_to_host_path_tmp1=$func_stripname_result + func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" + func_cygpath -u -p "$func_convert_core_path_wine_to_w32_result" + func_to_host_path_result="$func_cygpath_result" + func_convert_path_check : : \ + "$func_to_host_path_tmp1" "$func_to_host_path_result" + func_convert_path_front_back_pathsep ":*" "*:" : "$1" + fi +} +# end func_convert_path_nix_to_cygwin + + +# func_mode_compile arg... +func_mode_compile () +{ + $opt_debug + # Get the compilation command and the source file. + base_compile= + srcfile="$nonopt" # always keep a non-empty value in "srcfile" + suppress_opt=yes + suppress_output= + arg_mode=normal + libobj= + later= + pie_flag= + + for arg + do + case $arg_mode in + arg ) + # do not "continue". Instead, add this to base_compile + lastarg="$arg" + arg_mode=normal + ;; + + target ) + libobj="$arg" + arg_mode=normal + continue + ;; + + normal ) + # Accept any command-line options. + case $arg in + -o) + test -n "$libobj" && \ + func_fatal_error "you cannot specify \`-o' more than once" + arg_mode=target + continue + ;; + + -pie | -fpie | -fPIE) + func_append pie_flag " $arg" + continue + ;; + + -shared | -static | -prefer-pic | -prefer-non-pic) + func_append later " $arg" + continue + ;; + + -no-suppress) + suppress_opt=no + continue + ;; + + -Xcompiler) + arg_mode=arg # the next one goes into the "base_compile" arg list + continue # The current "srcfile" will either be retained or + ;; # replaced later. I would guess that would be a bug. + + -Wc,*) + func_stripname '-Wc,' '' "$arg" + args=$func_stripname_result + lastarg= + save_ifs="$IFS"; IFS=',' + for arg in $args; do + IFS="$save_ifs" + func_append_quoted lastarg "$arg" + done + IFS="$save_ifs" + func_stripname ' ' '' "$lastarg" + lastarg=$func_stripname_result + + # Add the arguments to base_compile. + func_append base_compile " $lastarg" + continue + ;; + + *) + # Accept the current argument as the source file. + # The previous "srcfile" becomes the current argument. + # + lastarg="$srcfile" + srcfile="$arg" + ;; + esac # case $arg + ;; + esac # case $arg_mode + + # Aesthetically quote the previous argument. + func_append_quoted base_compile "$lastarg" + done # for arg + + case $arg_mode in + arg) + func_fatal_error "you must specify an argument for -Xcompile" + ;; + target) + func_fatal_error "you must specify a target with \`-o'" + ;; + *) + # Get the name of the library object. + test -z "$libobj" && { + func_basename "$srcfile" + libobj="$func_basename_result" + } + ;; + esac + + # Recognize several different file suffixes. + # If the user specifies -o file.o, it is replaced with file.lo + case $libobj in + *.[cCFSifmso] | \ + *.ada | *.adb | *.ads | *.asm | \ + *.c++ | *.cc | *.ii | *.class | *.cpp | *.cxx | \ + *.[fF][09]? | *.for | *.java | *.go | *.obj | *.sx | *.cu | *.cup) + func_xform "$libobj" + libobj=$func_xform_result + ;; + esac + + case $libobj in + *.lo) func_lo2o "$libobj"; obj=$func_lo2o_result ;; + *) + func_fatal_error "cannot determine name of library object from \`$libobj'" + ;; + esac + + func_infer_tag $base_compile + + for arg in $later; do + case $arg in + -shared) + test "$build_libtool_libs" != yes && \ + func_fatal_configuration "can not build a shared library" + build_old_libs=no + continue + ;; + + -static) + build_libtool_libs=no + build_old_libs=yes + continue + ;; + + -prefer-pic) + pic_mode=yes + continue + ;; + + -prefer-non-pic) + pic_mode=no + continue + ;; + esac + done + + func_quote_for_eval "$libobj" + test "X$libobj" != "X$func_quote_for_eval_result" \ + && $ECHO "X$libobj" | $GREP '[]~#^*{};<>?"'"'"' &()|`$[]' \ + && func_warning "libobj name \`$libobj' may not contain shell special characters." + func_dirname_and_basename "$obj" "/" "" + objname="$func_basename_result" + xdir="$func_dirname_result" + lobj=${xdir}$objdir/$objname + + test -z "$base_compile" && \ + func_fatal_help "you must specify a compilation command" + + # Delete any leftover library objects. + if test "$build_old_libs" = yes; then + removelist="$obj $lobj $libobj ${libobj}T" + else + removelist="$lobj $libobj ${libobj}T" + fi + + # On Cygwin there's no "real" PIC flag so we must build both object types + case $host_os in + cygwin* | mingw* | pw32* | os2* | cegcc*) + pic_mode=default + ;; + esac + if test "$pic_mode" = no && test "$deplibs_check_method" != pass_all; then + # non-PIC code in shared libraries is not supported + pic_mode=default + fi + + # Calculate the filename of the output object if compiler does + # not support -o with -c + if test "$compiler_c_o" = no; then + output_obj=`$ECHO "$srcfile" | $SED 's%^.*/%%; s%\.[^.]*$%%'`.${objext} + lockfile="$output_obj.lock" + else + output_obj= + need_locks=no + lockfile= + fi + + # Lock this critical section if it is needed + # We use this script file to make the link, it avoids creating a new file + if test "$need_locks" = yes; then + until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do + func_echo "Waiting for $lockfile to be removed" + sleep 2 + done + elif test "$need_locks" = warn; then + if test -f "$lockfile"; then + $ECHO "\ +*** ERROR, $lockfile exists and contains: +`cat $lockfile 2>/dev/null` + +This indicates that another process is trying to use the same +temporary object file, and libtool could not work around it because +your compiler does not support \`-c' and \`-o' together. If you +repeat this compilation, it may succeed, by chance, but you had better +avoid parallel builds (make -j) in this platform, or get a better +compiler." + + $opt_dry_run || $RM $removelist + exit $EXIT_FAILURE + fi + func_append removelist " $output_obj" + $ECHO "$srcfile" > "$lockfile" + fi + + $opt_dry_run || $RM $removelist + func_append removelist " $lockfile" + trap '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' 1 2 15 + + func_to_tool_file "$srcfile" func_convert_file_msys_to_w32 + srcfile=$func_to_tool_file_result + func_quote_for_eval "$srcfile" + qsrcfile=$func_quote_for_eval_result + + # Only build a PIC object if we are building libtool libraries. + if test "$build_libtool_libs" = yes; then + # Without this assignment, base_compile gets emptied. + fbsd_hideous_sh_bug=$base_compile + + if test "$pic_mode" != no; then + command="$base_compile $qsrcfile $pic_flag" + else + # Don't build PIC code + command="$base_compile $qsrcfile" + fi + + func_mkdir_p "$xdir$objdir" + + if test -z "$output_obj"; then + # Place PIC objects in $objdir + func_append command " -o $lobj" + fi + + func_show_eval_locale "$command" \ + 'test -n "$output_obj" && $RM $removelist; exit $EXIT_FAILURE' + + if test "$need_locks" = warn && + test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then + $ECHO "\ +*** ERROR, $lockfile contains: +`cat $lockfile 2>/dev/null` + +but it should contain: +$srcfile + +This indicates that another process is trying to use the same +temporary object file, and libtool could not work around it because +your compiler does not support \`-c' and \`-o' together. If you +repeat this compilation, it may succeed, by chance, but you had better +avoid parallel builds (make -j) in this platform, or get a better +compiler." + + $opt_dry_run || $RM $removelist + exit $EXIT_FAILURE + fi + + # Just move the object if needed, then go on to compile the next one + if test -n "$output_obj" && test "X$output_obj" != "X$lobj"; then + func_show_eval '$MV "$output_obj" "$lobj"' \ + 'error=$?; $opt_dry_run || $RM $removelist; exit $error' + fi + + # Allow error messages only from the first compilation. + if test "$suppress_opt" = yes; then + suppress_output=' >/dev/null 2>&1' + fi + fi + + # Only build a position-dependent object if we build old libraries. + if test "$build_old_libs" = yes; then + if test "$pic_mode" != yes; then + # Don't build PIC code + command="$base_compile $qsrcfile$pie_flag" + else + command="$base_compile $qsrcfile $pic_flag" + fi + if test "$compiler_c_o" = yes; then + func_append command " -o $obj" + fi + + # Suppress compiler output if we already did a PIC compilation. + func_append command "$suppress_output" + func_show_eval_locale "$command" \ + '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' + + if test "$need_locks" = warn && + test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then + $ECHO "\ +*** ERROR, $lockfile contains: +`cat $lockfile 2>/dev/null` + +but it should contain: +$srcfile + +This indicates that another process is trying to use the same +temporary object file, and libtool could not work around it because +your compiler does not support \`-c' and \`-o' together. If you +repeat this compilation, it may succeed, by chance, but you had better +avoid parallel builds (make -j) in this platform, or get a better +compiler." + + $opt_dry_run || $RM $removelist + exit $EXIT_FAILURE + fi + + # Just move the object if needed + if test -n "$output_obj" && test "X$output_obj" != "X$obj"; then + func_show_eval '$MV "$output_obj" "$obj"' \ + 'error=$?; $opt_dry_run || $RM $removelist; exit $error' + fi + fi + + $opt_dry_run || { + func_write_libtool_object "$libobj" "$objdir/$objname" "$objname" + + # Unlock the critical section if it was locked + if test "$need_locks" != no; then + removelist=$lockfile + $RM "$lockfile" + fi + } + + exit $EXIT_SUCCESS +} + +$opt_help || { + test "$opt_mode" = compile && func_mode_compile ${1+"$@"} +} + +func_mode_help () +{ + # We need to display help for each of the modes. + case $opt_mode in + "") + # Generic help is extracted from the usage comments + # at the start of this file. + func_help + ;; + + clean) + $ECHO \ +"Usage: $progname [OPTION]... --mode=clean RM [RM-OPTION]... FILE... + +Remove files from the build directory. + +RM is the name of the program to use to delete files associated with each FILE +(typically \`/bin/rm'). RM-OPTIONS are options (such as \`-f') to be passed +to RM. + +If FILE is a libtool library, object or program, all the files associated +with it are deleted. Otherwise, only FILE itself is deleted using RM." + ;; + + compile) + $ECHO \ +"Usage: $progname [OPTION]... --mode=compile COMPILE-COMMAND... SOURCEFILE + +Compile a source file into a libtool library object. + +This mode accepts the following additional options: + + -o OUTPUT-FILE set the output file name to OUTPUT-FILE + -no-suppress do not suppress compiler output for multiple passes + -prefer-pic try to build PIC objects only + -prefer-non-pic try to build non-PIC objects only + -shared do not build a \`.o' file suitable for static linking + -static only build a \`.o' file suitable for static linking + -Wc,FLAG pass FLAG directly to the compiler + +COMPILE-COMMAND is a command to be used in creating a \`standard' object file +from the given SOURCEFILE. + +The output file name is determined by removing the directory component from +SOURCEFILE, then substituting the C source code suffix \`.c' with the +library object suffix, \`.lo'." + ;; + + execute) + $ECHO \ +"Usage: $progname [OPTION]... --mode=execute COMMAND [ARGS]... + +Automatically set library path, then run a program. + +This mode accepts the following additional options: + + -dlopen FILE add the directory containing FILE to the library path + +This mode sets the library path environment variable according to \`-dlopen' +flags. + +If any of the ARGS are libtool executable wrappers, then they are translated +into their corresponding uninstalled binary, and any of their required library +directories are added to the library path. + +Then, COMMAND is executed, with ARGS as arguments." + ;; + + finish) + $ECHO \ +"Usage: $progname [OPTION]... --mode=finish [LIBDIR]... + +Complete the installation of libtool libraries. + +Each LIBDIR is a directory that contains libtool libraries. + +The commands that this mode executes may require superuser privileges. Use +the \`--dry-run' option if you just want to see what would be executed." + ;; + + install) + $ECHO \ +"Usage: $progname [OPTION]... --mode=install INSTALL-COMMAND... + +Install executables or libraries. + +INSTALL-COMMAND is the installation command. The first component should be +either the \`install' or \`cp' program. + +The following components of INSTALL-COMMAND are treated specially: + + -inst-prefix-dir PREFIX-DIR Use PREFIX-DIR as a staging area for installation + +The rest of the components are interpreted as arguments to that command (only +BSD-compatible install options are recognized)." + ;; + + link) + $ECHO \ +"Usage: $progname [OPTION]... --mode=link LINK-COMMAND... + +Link object files or libraries together to form another library, or to +create an executable program. + +LINK-COMMAND is a command using the C compiler that you would use to create +a program from several object files. + +The following components of LINK-COMMAND are treated specially: + + -all-static do not do any dynamic linking at all + -avoid-version do not add a version suffix if possible + -bindir BINDIR specify path to binaries directory (for systems where + libraries must be found in the PATH setting at runtime) + -dlopen FILE \`-dlpreopen' FILE if it cannot be dlopened at runtime + -dlpreopen FILE link in FILE and add its symbols to lt_preloaded_symbols + -export-dynamic allow symbols from OUTPUT-FILE to be resolved with dlsym(3) + -export-symbols SYMFILE + try to export only the symbols listed in SYMFILE + -export-symbols-regex REGEX + try to export only the symbols matching REGEX + -LLIBDIR search LIBDIR for required installed libraries + -lNAME OUTPUT-FILE requires the installed library libNAME + -module build a library that can dlopened + -no-fast-install disable the fast-install mode + -no-install link a not-installable executable + -no-undefined declare that a library does not refer to external symbols + -o OUTPUT-FILE create OUTPUT-FILE from the specified objects + -objectlist FILE Use a list of object files found in FILE to specify objects + -precious-files-regex REGEX + don't remove output files matching REGEX + -release RELEASE specify package release information + -rpath LIBDIR the created library will eventually be installed in LIBDIR + -R[ ]LIBDIR add LIBDIR to the runtime path of programs and libraries + -shared only do dynamic linking of libtool libraries + -shrext SUFFIX override the standard shared library file extension + -static do not do any dynamic linking of uninstalled libtool libraries + -static-libtool-libs + do not do any dynamic linking of libtool libraries + -version-info CURRENT[:REVISION[:AGE]] + specify library version info [each variable defaults to 0] + -weak LIBNAME declare that the target provides the LIBNAME interface + -Wc,FLAG + -Xcompiler FLAG pass linker-specific FLAG directly to the compiler + -Wl,FLAG + -Xlinker FLAG pass linker-specific FLAG directly to the linker + -XCClinker FLAG pass link-specific FLAG to the compiler driver (CC) + +All other options (arguments beginning with \`-') are ignored. + +Every other argument is treated as a filename. Files ending in \`.la' are +treated as uninstalled libtool libraries, other files are standard or library +object files. + +If the OUTPUT-FILE ends in \`.la', then a libtool library is created, +only library objects (\`.lo' files) may be specified, and \`-rpath' is +required, except when creating a convenience library. + +If OUTPUT-FILE ends in \`.a' or \`.lib', then a standard library is created +using \`ar' and \`ranlib', or on Windows using \`lib'. + +If OUTPUT-FILE ends in \`.lo' or \`.${objext}', then a reloadable object file +is created, otherwise an executable program is created." + ;; + + uninstall) + $ECHO \ +"Usage: $progname [OPTION]... --mode=uninstall RM [RM-OPTION]... FILE... + +Remove libraries from an installation directory. + +RM is the name of the program to use to delete files associated with each FILE +(typically \`/bin/rm'). RM-OPTIONS are options (such as \`-f') to be passed +to RM. + +If FILE is a libtool library, all the files associated with it are deleted. +Otherwise, only FILE itself is deleted using RM." + ;; + + *) + func_fatal_help "invalid operation mode \`$opt_mode'" + ;; + esac + + echo + $ECHO "Try \`$progname --help' for more information about other modes." +} + +# Now that we've collected a possible --mode arg, show help if necessary +if $opt_help; then + if test "$opt_help" = :; then + func_mode_help + else + { + func_help noexit + for opt_mode in compile link execute install finish uninstall clean; do + func_mode_help + done + } | sed -n '1p; 2,$s/^Usage:/ or: /p' + { + func_help noexit + for opt_mode in compile link execute install finish uninstall clean; do + echo + func_mode_help + done + } | + sed '1d + /^When reporting/,/^Report/{ + H + d + } + $x + /information about other modes/d + /more detailed .*MODE/d + s/^Usage:.*--mode=\([^ ]*\) .*/Description of \1 mode:/' + fi + exit $? +fi + + +# func_mode_execute arg... +func_mode_execute () +{ + $opt_debug + # The first argument is the command name. + cmd="$nonopt" + test -z "$cmd" && \ + func_fatal_help "you must specify a COMMAND" + + # Handle -dlopen flags immediately. + for file in $opt_dlopen; do + test -f "$file" \ + || func_fatal_help "\`$file' is not a file" + + dir= + case $file in + *.la) + func_resolve_sysroot "$file" + file=$func_resolve_sysroot_result + + # Check to see that this really is a libtool archive. + func_lalib_unsafe_p "$file" \ + || func_fatal_help "\`$lib' is not a valid libtool archive" + + # Read the libtool library. + dlname= + library_names= + func_source "$file" + + # Skip this library if it cannot be dlopened. + if test -z "$dlname"; then + # Warn if it was a shared library. + test -n "$library_names" && \ + func_warning "\`$file' was not linked with \`-export-dynamic'" + continue + fi + + func_dirname "$file" "" "." + dir="$func_dirname_result" + + if test -f "$dir/$objdir/$dlname"; then + func_append dir "/$objdir" + else + if test ! -f "$dir/$dlname"; then + func_fatal_error "cannot find \`$dlname' in \`$dir' or \`$dir/$objdir'" + fi + fi + ;; + + *.lo) + # Just add the directory containing the .lo file. + func_dirname "$file" "" "." + dir="$func_dirname_result" + ;; + + *) + func_warning "\`-dlopen' is ignored for non-libtool libraries and objects" + continue + ;; + esac + + # Get the absolute pathname. + absdir=`cd "$dir" && pwd` + test -n "$absdir" && dir="$absdir" + + # Now add the directory to shlibpath_var. + if eval "test -z \"\$$shlibpath_var\""; then + eval "$shlibpath_var=\"\$dir\"" + else + eval "$shlibpath_var=\"\$dir:\$$shlibpath_var\"" + fi + done + + # This variable tells wrapper scripts just to set shlibpath_var + # rather than running their programs. + libtool_execute_magic="$magic" + + # Check if any of the arguments is a wrapper script. + args= + for file + do + case $file in + -* | *.la | *.lo ) ;; + *) + # Do a test to see if this is really a libtool program. + if func_ltwrapper_script_p "$file"; then + func_source "$file" + # Transform arg to wrapped name. + file="$progdir/$program" + elif func_ltwrapper_executable_p "$file"; then + func_ltwrapper_scriptname "$file" + func_source "$func_ltwrapper_scriptname_result" + # Transform arg to wrapped name. + file="$progdir/$program" + fi + ;; + esac + # Quote arguments (to preserve shell metacharacters). + func_append_quoted args "$file" + done + + if test "X$opt_dry_run" = Xfalse; then + if test -n "$shlibpath_var"; then + # Export the shlibpath_var. + eval "export $shlibpath_var" + fi + + # Restore saved environment variables + for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES + do + eval "if test \"\${save_$lt_var+set}\" = set; then + $lt_var=\$save_$lt_var; export $lt_var + else + $lt_unset $lt_var + fi" + done + + # Now prepare to actually exec the command. + exec_cmd="\$cmd$args" + else + # Display what would be done. + if test -n "$shlibpath_var"; then + eval "\$ECHO \"\$shlibpath_var=\$$shlibpath_var\"" + echo "export $shlibpath_var" + fi + $ECHO "$cmd$args" + exit $EXIT_SUCCESS + fi +} + +test "$opt_mode" = execute && func_mode_execute ${1+"$@"} + + +# func_mode_finish arg... +func_mode_finish () +{ + $opt_debug + libs= + libdirs= + admincmds= + + for opt in "$nonopt" ${1+"$@"} + do + if test -d "$opt"; then + func_append libdirs " $opt" + + elif test -f "$opt"; then + if func_lalib_unsafe_p "$opt"; then + func_append libs " $opt" + else + func_warning "\`$opt' is not a valid libtool archive" + fi + + else + func_fatal_error "invalid argument \`$opt'" + fi + done + + if test -n "$libs"; then + if test -n "$lt_sysroot"; then + sysroot_regex=`$ECHO "$lt_sysroot" | $SED "$sed_make_literal_regex"` + sysroot_cmd="s/\([ ']\)$sysroot_regex/\1/g;" + else + sysroot_cmd= + fi + + # Remove sysroot references + if $opt_dry_run; then + for lib in $libs; do + echo "removing references to $lt_sysroot and \`=' prefixes from $lib" + done + else + tmpdir=`func_mktempdir` + for lib in $libs; do + sed -e "${sysroot_cmd} s/\([ ']-[LR]\)=/\1/g; s/\([ ']\)=/\1/g" $lib \ + > $tmpdir/tmp-la + mv -f $tmpdir/tmp-la $lib + done + ${RM}r "$tmpdir" + fi + fi + + if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then + for libdir in $libdirs; do + if test -n "$finish_cmds"; then + # Do each command in the finish commands. + func_execute_cmds "$finish_cmds" 'admincmds="$admincmds +'"$cmd"'"' + fi + if test -n "$finish_eval"; then + # Do the single finish_eval. + eval cmds=\"$finish_eval\" + $opt_dry_run || eval "$cmds" || func_append admincmds " + $cmds" + fi + done + fi + + # Exit here if they wanted silent mode. + $opt_silent && exit $EXIT_SUCCESS + + if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then + echo "----------------------------------------------------------------------" + echo "Libraries have been installed in:" + for libdir in $libdirs; do + $ECHO " $libdir" + done + echo + echo "If you ever happen to want to link against installed libraries" + echo "in a given directory, LIBDIR, you must either use libtool, and" + echo "specify the full pathname of the library, or use the \`-LLIBDIR'" + echo "flag during linking and do at least one of the following:" + if test -n "$shlibpath_var"; then + echo " - add LIBDIR to the \`$shlibpath_var' environment variable" + echo " during execution" + fi + if test -n "$runpath_var"; then + echo " - add LIBDIR to the \`$runpath_var' environment variable" + echo " during linking" + fi + if test -n "$hardcode_libdir_flag_spec"; then + libdir=LIBDIR + eval flag=\"$hardcode_libdir_flag_spec\" + + $ECHO " - use the \`$flag' linker flag" + fi + if test -n "$admincmds"; then + $ECHO " - have your system administrator run these commands:$admincmds" + fi + if test -f /etc/ld.so.conf; then + echo " - have your system administrator add LIBDIR to \`/etc/ld.so.conf'" + fi + echo + + echo "See any operating system documentation about shared libraries for" + case $host in + solaris2.[6789]|solaris2.1[0-9]) + echo "more information, such as the ld(1), crle(1) and ld.so(8) manual" + echo "pages." + ;; + *) + echo "more information, such as the ld(1) and ld.so(8) manual pages." + ;; + esac + echo "----------------------------------------------------------------------" + fi + exit $EXIT_SUCCESS +} + +test "$opt_mode" = finish && func_mode_finish ${1+"$@"} + + +# func_mode_install arg... +func_mode_install () +{ + $opt_debug + # There may be an optional sh(1) argument at the beginning of + # install_prog (especially on Windows NT). + if test "$nonopt" = "$SHELL" || test "$nonopt" = /bin/sh || + # Allow the use of GNU shtool's install command. + case $nonopt in *shtool*) :;; *) false;; esac; then + # Aesthetically quote it. + func_quote_for_eval "$nonopt" + install_prog="$func_quote_for_eval_result " + arg=$1 + shift + else + install_prog= + arg=$nonopt + fi + + # The real first argument should be the name of the installation program. + # Aesthetically quote it. + func_quote_for_eval "$arg" + func_append install_prog "$func_quote_for_eval_result" + install_shared_prog=$install_prog + case " $install_prog " in + *[\\\ /]cp\ *) install_cp=: ;; + *) install_cp=false ;; + esac + + # We need to accept at least all the BSD install flags. + dest= + files= + opts= + prev= + install_type= + isdir=no + stripme= + no_mode=: + for arg + do + arg2= + if test -n "$dest"; then + func_append files " $dest" + dest=$arg + continue + fi + + case $arg in + -d) isdir=yes ;; + -f) + if $install_cp; then :; else + prev=$arg + fi + ;; + -g | -m | -o) + prev=$arg + ;; + -s) + stripme=" -s" + continue + ;; + -*) + ;; + *) + # If the previous option needed an argument, then skip it. + if test -n "$prev"; then + if test "x$prev" = x-m && test -n "$install_override_mode"; then + arg2=$install_override_mode + no_mode=false + fi + prev= + else + dest=$arg + continue + fi + ;; + esac + + # Aesthetically quote the argument. + func_quote_for_eval "$arg" + func_append install_prog " $func_quote_for_eval_result" + if test -n "$arg2"; then + func_quote_for_eval "$arg2" + fi + func_append install_shared_prog " $func_quote_for_eval_result" + done + + test -z "$install_prog" && \ + func_fatal_help "you must specify an install program" + + test -n "$prev" && \ + func_fatal_help "the \`$prev' option requires an argument" + + if test -n "$install_override_mode" && $no_mode; then + if $install_cp; then :; else + func_quote_for_eval "$install_override_mode" + func_append install_shared_prog " -m $func_quote_for_eval_result" + fi + fi + + if test -z "$files"; then + if test -z "$dest"; then + func_fatal_help "no file or destination specified" + else + func_fatal_help "you must specify a destination" + fi + fi + + # Strip any trailing slash from the destination. + func_stripname '' '/' "$dest" + dest=$func_stripname_result + + # Check to see that the destination is a directory. + test -d "$dest" && isdir=yes + if test "$isdir" = yes; then + destdir="$dest" + destname= + else + func_dirname_and_basename "$dest" "" "." + destdir="$func_dirname_result" + destname="$func_basename_result" + + # Not a directory, so check to see that there is only one file specified. + set dummy $files; shift + test "$#" -gt 1 && \ + func_fatal_help "\`$dest' is not a directory" + fi + case $destdir in + [\\/]* | [A-Za-z]:[\\/]*) ;; + *) + for file in $files; do + case $file in + *.lo) ;; + *) + func_fatal_help "\`$destdir' must be an absolute directory name" + ;; + esac + done + ;; + esac + + # This variable tells wrapper scripts just to set variables rather + # than running their programs. + libtool_install_magic="$magic" + + staticlibs= + future_libdirs= + current_libdirs= + for file in $files; do + + # Do each installation. + case $file in + *.$libext) + # Do the static libraries later. + func_append staticlibs " $file" + ;; + + *.la) + func_resolve_sysroot "$file" + file=$func_resolve_sysroot_result + + # Check to see that this really is a libtool archive. + func_lalib_unsafe_p "$file" \ + || func_fatal_help "\`$file' is not a valid libtool archive" + + library_names= + old_library= + relink_command= + func_source "$file" + + # Add the libdir to current_libdirs if it is the destination. + if test "X$destdir" = "X$libdir"; then + case "$current_libdirs " in + *" $libdir "*) ;; + *) func_append current_libdirs " $libdir" ;; + esac + else + # Note the libdir as a future libdir. + case "$future_libdirs " in + *" $libdir "*) ;; + *) func_append future_libdirs " $libdir" ;; + esac + fi + + func_dirname "$file" "/" "" + dir="$func_dirname_result" + func_append dir "$objdir" + + if test -n "$relink_command"; then + # Determine the prefix the user has applied to our future dir. + inst_prefix_dir=`$ECHO "$destdir" | $SED -e "s%$libdir\$%%"` + + # Don't allow the user to place us outside of our expected + # location b/c this prevents finding dependent libraries that + # are installed to the same prefix. + # At present, this check doesn't affect windows .dll's that + # are installed into $libdir/../bin (currently, that works fine) + # but it's something to keep an eye on. + test "$inst_prefix_dir" = "$destdir" && \ + func_fatal_error "error: cannot install \`$file' to a directory not ending in $libdir" + + if test -n "$inst_prefix_dir"; then + # Stick the inst_prefix_dir data into the link command. + relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%"` + else + relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%%"` + fi + + func_warning "relinking \`$file'" + func_show_eval "$relink_command" \ + 'func_fatal_error "error: relink \`$file'\'' with the above command before installing it"' + fi + + # See the names of the shared library. + set dummy $library_names; shift + if test -n "$1"; then + realname="$1" + shift + + srcname="$realname" + test -n "$relink_command" && srcname="$realname"T + + # Install the shared library and build the symlinks. + func_show_eval "$install_shared_prog $dir/$srcname $destdir/$realname" \ + 'exit $?' + tstripme="$stripme" + case $host_os in + cygwin* | mingw* | pw32* | cegcc*) + case $realname in + *.dll.a) + tstripme="" + ;; + esac + ;; + esac + if test -n "$tstripme" && test -n "$striplib"; then + func_show_eval "$striplib $destdir/$realname" 'exit $?' + fi + + if test "$#" -gt 0; then + # Delete the old symlinks, and create new ones. + # Try `ln -sf' first, because the `ln' binary might depend on + # the symlink we replace! Solaris /bin/ln does not understand -f, + # so we also need to try rm && ln -s. + for linkname + do + test "$linkname" != "$realname" \ + && func_show_eval "(cd $destdir && { $LN_S -f $realname $linkname || { $RM $linkname && $LN_S $realname $linkname; }; })" + done + fi + + # Do each command in the postinstall commands. + lib="$destdir/$realname" + func_execute_cmds "$postinstall_cmds" 'exit $?' + fi + + # Install the pseudo-library for information purposes. + func_basename "$file" + name="$func_basename_result" + instname="$dir/$name"i + func_show_eval "$install_prog $instname $destdir/$name" 'exit $?' + + # Maybe install the static library, too. + test -n "$old_library" && func_append staticlibs " $dir/$old_library" + ;; + + *.lo) + # Install (i.e. copy) a libtool object. + + # Figure out destination file name, if it wasn't already specified. + if test -n "$destname"; then + destfile="$destdir/$destname" + else + func_basename "$file" + destfile="$func_basename_result" + destfile="$destdir/$destfile" + fi + + # Deduce the name of the destination old-style object file. + case $destfile in + *.lo) + func_lo2o "$destfile" + staticdest=$func_lo2o_result + ;; + *.$objext) + staticdest="$destfile" + destfile= + ;; + *) + func_fatal_help "cannot copy a libtool object to \`$destfile'" + ;; + esac + + # Install the libtool object if requested. + test -n "$destfile" && \ + func_show_eval "$install_prog $file $destfile" 'exit $?' + + # Install the old object if enabled. + if test "$build_old_libs" = yes; then + # Deduce the name of the old-style object file. + func_lo2o "$file" + staticobj=$func_lo2o_result + func_show_eval "$install_prog \$staticobj \$staticdest" 'exit $?' + fi + exit $EXIT_SUCCESS + ;; + + *) + # Figure out destination file name, if it wasn't already specified. + if test -n "$destname"; then + destfile="$destdir/$destname" + else + func_basename "$file" + destfile="$func_basename_result" + destfile="$destdir/$destfile" + fi + + # If the file is missing, and there is a .exe on the end, strip it + # because it is most likely a libtool script we actually want to + # install + stripped_ext="" + case $file in + *.exe) + if test ! -f "$file"; then + func_stripname '' '.exe' "$file" + file=$func_stripname_result + stripped_ext=".exe" + fi + ;; + esac + + # Do a test to see if this is really a libtool program. + case $host in + *cygwin* | *mingw*) + if func_ltwrapper_executable_p "$file"; then + func_ltwrapper_scriptname "$file" + wrapper=$func_ltwrapper_scriptname_result + else + func_stripname '' '.exe' "$file" + wrapper=$func_stripname_result + fi + ;; + *) + wrapper=$file + ;; + esac + if func_ltwrapper_script_p "$wrapper"; then + notinst_deplibs= + relink_command= + + func_source "$wrapper" + + # Check the variables that should have been set. + test -z "$generated_by_libtool_version" && \ + func_fatal_error "invalid libtool wrapper script \`$wrapper'" + + finalize=yes + for lib in $notinst_deplibs; do + # Check to see that each library is installed. + libdir= + if test -f "$lib"; then + func_source "$lib" + fi + libfile="$libdir/"`$ECHO "$lib" | $SED 's%^.*/%%g'` ### testsuite: skip nested quoting test + if test -n "$libdir" && test ! -f "$libfile"; then + func_warning "\`$lib' has not been installed in \`$libdir'" + finalize=no + fi + done + + relink_command= + func_source "$wrapper" + + outputname= + if test "$fast_install" = no && test -n "$relink_command"; then + $opt_dry_run || { + if test "$finalize" = yes; then + tmpdir=`func_mktempdir` + func_basename "$file$stripped_ext" + file="$func_basename_result" + outputname="$tmpdir/$file" + # Replace the output file specification. + relink_command=`$ECHO "$relink_command" | $SED 's%@OUTPUT@%'"$outputname"'%g'` + + $opt_silent || { + func_quote_for_expand "$relink_command" + eval "func_echo $func_quote_for_expand_result" + } + if eval "$relink_command"; then : + else + func_error "error: relink \`$file' with the above command before installing it" + $opt_dry_run || ${RM}r "$tmpdir" + continue + fi + file="$outputname" + else + func_warning "cannot relink \`$file'" + fi + } + else + # Install the binary that we compiled earlier. + file=`$ECHO "$file$stripped_ext" | $SED "s%\([^/]*\)$%$objdir/\1%"` + fi + fi + + # remove .exe since cygwin /usr/bin/install will append another + # one anyway + case $install_prog,$host in + */usr/bin/install*,*cygwin*) + case $file:$destfile in + *.exe:*.exe) + # this is ok + ;; + *.exe:*) + destfile=$destfile.exe + ;; + *:*.exe) + func_stripname '' '.exe' "$destfile" + destfile=$func_stripname_result + ;; + esac + ;; + esac + func_show_eval "$install_prog\$stripme \$file \$destfile" 'exit $?' + $opt_dry_run || if test -n "$outputname"; then + ${RM}r "$tmpdir" + fi + ;; + esac + done + + for file in $staticlibs; do + func_basename "$file" + name="$func_basename_result" + + # Set up the ranlib parameters. + oldlib="$destdir/$name" + func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 + tool_oldlib=$func_to_tool_file_result + + func_show_eval "$install_prog \$file \$oldlib" 'exit $?' + + if test -n "$stripme" && test -n "$old_striplib"; then + func_show_eval "$old_striplib $tool_oldlib" 'exit $?' + fi + + # Do each command in the postinstall commands. + func_execute_cmds "$old_postinstall_cmds" 'exit $?' + done + + test -n "$future_libdirs" && \ + func_warning "remember to run \`$progname --finish$future_libdirs'" + + if test -n "$current_libdirs"; then + # Maybe just do a dry run. + $opt_dry_run && current_libdirs=" -n$current_libdirs" + exec_cmd='$SHELL $progpath $preserve_args --finish$current_libdirs' + else + exit $EXIT_SUCCESS + fi +} + +test "$opt_mode" = install && func_mode_install ${1+"$@"} + + +# func_generate_dlsyms outputname originator pic_p +# Extract symbols from dlprefiles and create ${outputname}S.o with +# a dlpreopen symbol table. +func_generate_dlsyms () +{ + $opt_debug + my_outputname="$1" + my_originator="$2" + my_pic_p="${3-no}" + my_prefix=`$ECHO "$my_originator" | sed 's%[^a-zA-Z0-9]%_%g'` + my_dlsyms= + + if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then + if test -n "$NM" && test -n "$global_symbol_pipe"; then + my_dlsyms="${my_outputname}S.c" + else + func_error "not configured to extract global symbols from dlpreopened files" + fi + fi + + if test -n "$my_dlsyms"; then + case $my_dlsyms in + "") ;; + *.c) + # Discover the nlist of each of the dlfiles. + nlist="$output_objdir/${my_outputname}.nm" + + func_show_eval "$RM $nlist ${nlist}S ${nlist}T" + + # Parse the name list into a source file. + func_verbose "creating $output_objdir/$my_dlsyms" + + $opt_dry_run || $ECHO > "$output_objdir/$my_dlsyms" "\ +/* $my_dlsyms - symbol resolution table for \`$my_outputname' dlsym emulation. */ +/* Generated by $PROGRAM (GNU $PACKAGE$TIMESTAMP) $VERSION */ + +#ifdef __cplusplus +extern \"C\" { +#endif + +#if defined(__GNUC__) && (((__GNUC__ == 4) && (__GNUC_MINOR__ >= 4)) || (__GNUC__ > 4)) +#pragma GCC diagnostic ignored \"-Wstrict-prototypes\" +#endif + +/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ +#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE) +/* DATA imports from DLLs on WIN32 con't be const, because runtime + relocations are performed -- see ld's documentation on pseudo-relocs. */ +# define LT_DLSYM_CONST +#elif defined(__osf__) +/* This system does not cope well with relocations in const data. */ +# define LT_DLSYM_CONST +#else +# define LT_DLSYM_CONST const +#endif + +/* External symbol declarations for the compiler. */\ +" + + if test "$dlself" = yes; then + func_verbose "generating symbol list for \`$output'" + + $opt_dry_run || echo ': @PROGRAM@ ' > "$nlist" + + # Add our own program objects to the symbol list. + progfiles=`$ECHO "$objs$old_deplibs" | $SP2NL | $SED "$lo2o" | $NL2SP` + for progfile in $progfiles; do + func_to_tool_file "$progfile" func_convert_file_msys_to_w32 + func_verbose "extracting global C symbols from \`$func_to_tool_file_result'" + $opt_dry_run || eval "$NM $func_to_tool_file_result | $global_symbol_pipe >> '$nlist'" + done + + if test -n "$exclude_expsyms"; then + $opt_dry_run || { + eval '$EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T' + eval '$MV "$nlist"T "$nlist"' + } + fi + + if test -n "$export_symbols_regex"; then + $opt_dry_run || { + eval '$EGREP -e "$export_symbols_regex" "$nlist" > "$nlist"T' + eval '$MV "$nlist"T "$nlist"' + } + fi + + # Prepare the list of exported symbols + if test -z "$export_symbols"; then + export_symbols="$output_objdir/$outputname.exp" + $opt_dry_run || { + $RM $export_symbols + eval "${SED} -n -e '/^: @PROGRAM@ $/d' -e 's/^.* \(.*\)$/\1/p' "'< "$nlist" > "$export_symbols"' + case $host in + *cygwin* | *mingw* | *cegcc* ) + eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' + eval 'cat "$export_symbols" >> "$output_objdir/$outputname.def"' + ;; + esac + } + else + $opt_dry_run || { + eval "${SED} -e 's/\([].[*^$]\)/\\\\\1/g' -e 's/^/ /' -e 's/$/$/'"' < "$export_symbols" > "$output_objdir/$outputname.exp"' + eval '$GREP -f "$output_objdir/$outputname.exp" < "$nlist" > "$nlist"T' + eval '$MV "$nlist"T "$nlist"' + case $host in + *cygwin* | *mingw* | *cegcc* ) + eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' + eval 'cat "$nlist" >> "$output_objdir/$outputname.def"' + ;; + esac + } + fi + fi + + for dlprefile in $dlprefiles; do + func_verbose "extracting global C symbols from \`$dlprefile'" + func_basename "$dlprefile" + name="$func_basename_result" + case $host in + *cygwin* | *mingw* | *cegcc* ) + # if an import library, we need to obtain dlname + if func_win32_import_lib_p "$dlprefile"; then + func_tr_sh "$dlprefile" + eval "curr_lafile=\$libfile_$func_tr_sh_result" + dlprefile_dlbasename="" + if test -n "$curr_lafile" && func_lalib_p "$curr_lafile"; then + # Use subshell, to avoid clobbering current variable values + dlprefile_dlname=`source "$curr_lafile" && echo "$dlname"` + if test -n "$dlprefile_dlname" ; then + func_basename "$dlprefile_dlname" + dlprefile_dlbasename="$func_basename_result" + else + # no lafile. user explicitly requested -dlpreopen . + $sharedlib_from_linklib_cmd "$dlprefile" + dlprefile_dlbasename=$sharedlib_from_linklib_result + fi + fi + $opt_dry_run || { + if test -n "$dlprefile_dlbasename" ; then + eval '$ECHO ": $dlprefile_dlbasename" >> "$nlist"' + else + func_warning "Could not compute DLL name from $name" + eval '$ECHO ": $name " >> "$nlist"' + fi + func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 + eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe | + $SED -e '/I __imp/d' -e 's/I __nm_/D /;s/_nm__//' >> '$nlist'" + } + else # not an import lib + $opt_dry_run || { + eval '$ECHO ": $name " >> "$nlist"' + func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 + eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" + } + fi + ;; + *) + $opt_dry_run || { + eval '$ECHO ": $name " >> "$nlist"' + func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 + eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" + } + ;; + esac + done + + $opt_dry_run || { + # Make sure we have at least an empty file. + test -f "$nlist" || : > "$nlist" + + if test -n "$exclude_expsyms"; then + $EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T + $MV "$nlist"T "$nlist" + fi + + # Try sorting and uniquifying the output. + if $GREP -v "^: " < "$nlist" | + if sort -k 3 /dev/null 2>&1; then + sort -k 3 + else + sort +2 + fi | + uniq > "$nlist"S; then + : + else + $GREP -v "^: " < "$nlist" > "$nlist"S + fi + + if test -f "$nlist"S; then + eval "$global_symbol_to_cdecl"' < "$nlist"S >> "$output_objdir/$my_dlsyms"' + else + echo '/* NONE */' >> "$output_objdir/$my_dlsyms" + fi + + echo >> "$output_objdir/$my_dlsyms" "\ + +/* The mapping between symbol names and symbols. */ +typedef struct { + const char *name; + void *address; +} lt_dlsymlist; +extern LT_DLSYM_CONST lt_dlsymlist +lt_${my_prefix}_LTX_preloaded_symbols[]; +LT_DLSYM_CONST lt_dlsymlist +lt_${my_prefix}_LTX_preloaded_symbols[] = +{\ + { \"$my_originator\", (void *) 0 }," + + case $need_lib_prefix in + no) + eval "$global_symbol_to_c_name_address" < "$nlist" >> "$output_objdir/$my_dlsyms" + ;; + *) + eval "$global_symbol_to_c_name_address_lib_prefix" < "$nlist" >> "$output_objdir/$my_dlsyms" + ;; + esac + echo >> "$output_objdir/$my_dlsyms" "\ + {0, (void *) 0} +}; + +/* This works around a problem in FreeBSD linker */ +#ifdef FREEBSD_WORKAROUND +static const void *lt_preloaded_setup() { + return lt_${my_prefix}_LTX_preloaded_symbols; +} +#endif + +#ifdef __cplusplus +} +#endif\ +" + } # !$opt_dry_run + + pic_flag_for_symtable= + case "$compile_command " in + *" -static "*) ;; + *) + case $host in + # compiling the symbol table file with pic_flag works around + # a FreeBSD bug that causes programs to crash when -lm is + # linked before any other PIC object. But we must not use + # pic_flag when linking with -static. The problem exists in + # FreeBSD 2.2.6 and is fixed in FreeBSD 3.1. + *-*-freebsd2.*|*-*-freebsd3.0*|*-*-freebsdelf3.0*) + pic_flag_for_symtable=" $pic_flag -DFREEBSD_WORKAROUND" ;; + *-*-hpux*) + pic_flag_for_symtable=" $pic_flag" ;; + *) + if test "X$my_pic_p" != Xno; then + pic_flag_for_symtable=" $pic_flag" + fi + ;; + esac + ;; + esac + symtab_cflags= + for arg in $LTCFLAGS; do + case $arg in + -pie | -fpie | -fPIE) ;; + *) func_append symtab_cflags " $arg" ;; + esac + done + + # Now compile the dynamic symbol file. + func_show_eval '(cd $output_objdir && $LTCC$symtab_cflags -c$no_builtin_flag$pic_flag_for_symtable "$my_dlsyms")' 'exit $?' + + # Clean up the generated files. + func_show_eval '$RM "$output_objdir/$my_dlsyms" "$nlist" "${nlist}S" "${nlist}T"' + + # Transform the symbol file into the correct name. + symfileobj="$output_objdir/${my_outputname}S.$objext" + case $host in + *cygwin* | *mingw* | *cegcc* ) + if test -f "$output_objdir/$my_outputname.def"; then + compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` + finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` + else + compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` + finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` + fi + ;; + *) + compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` + finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` + ;; + esac + ;; + *) + func_fatal_error "unknown suffix for \`$my_dlsyms'" + ;; + esac + else + # We keep going just in case the user didn't refer to + # lt_preloaded_symbols. The linker will fail if global_symbol_pipe + # really was required. + + # Nullify the symbol file. + compile_command=`$ECHO "$compile_command" | $SED "s% @SYMFILE@%%"` + finalize_command=`$ECHO "$finalize_command" | $SED "s% @SYMFILE@%%"` + fi +} + +# func_win32_libid arg +# return the library type of file 'arg' +# +# Need a lot of goo to handle *both* DLLs and import libs +# Has to be a shell function in order to 'eat' the argument +# that is supplied when $file_magic_command is called. +# Despite the name, also deal with 64 bit binaries. +func_win32_libid () +{ + $opt_debug + win32_libid_type="unknown" + win32_fileres=`file -L $1 2>/dev/null` + case $win32_fileres in + *ar\ archive\ import\ library*) # definitely import + win32_libid_type="x86 archive import" + ;; + *ar\ archive*) # could be an import, or static + # Keep the egrep pattern in sync with the one in _LT_CHECK_MAGIC_METHOD. + if eval $OBJDUMP -f $1 | $SED -e '10q' 2>/dev/null | + $EGREP 'file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' >/dev/null; then + func_to_tool_file "$1" func_convert_file_msys_to_w32 + win32_nmres=`eval $NM -f posix -A \"$func_to_tool_file_result\" | + $SED -n -e ' + 1,100{ + / I /{ + s,.*,import, + p + q + } + }'` + case $win32_nmres in + import*) win32_libid_type="x86 archive import";; + *) win32_libid_type="x86 archive static";; + esac + fi + ;; + *DLL*) + win32_libid_type="x86 DLL" + ;; + *executable*) # but shell scripts are "executable" too... + case $win32_fileres in + *MS\ Windows\ PE\ Intel*) + win32_libid_type="x86 DLL" + ;; + esac + ;; + esac + $ECHO "$win32_libid_type" +} + +# func_cygming_dll_for_implib ARG +# +# Platform-specific function to extract the +# name of the DLL associated with the specified +# import library ARG. +# Invoked by eval'ing the libtool variable +# $sharedlib_from_linklib_cmd +# Result is available in the variable +# $sharedlib_from_linklib_result +func_cygming_dll_for_implib () +{ + $opt_debug + sharedlib_from_linklib_result=`$DLLTOOL --identify-strict --identify "$1"` +} + +# func_cygming_dll_for_implib_fallback_core SECTION_NAME LIBNAMEs +# +# The is the core of a fallback implementation of a +# platform-specific function to extract the name of the +# DLL associated with the specified import library LIBNAME. +# +# SECTION_NAME is either .idata$6 or .idata$7, depending +# on the platform and compiler that created the implib. +# +# Echos the name of the DLL associated with the +# specified import library. +func_cygming_dll_for_implib_fallback_core () +{ + $opt_debug + match_literal=`$ECHO "$1" | $SED "$sed_make_literal_regex"` + $OBJDUMP -s --section "$1" "$2" 2>/dev/null | + $SED '/^Contents of section '"$match_literal"':/{ + # Place marker at beginning of archive member dllname section + s/.*/====MARK====/ + p + d + } + # These lines can sometimes be longer than 43 characters, but + # are always uninteresting + /:[ ]*file format pe[i]\{,1\}-/d + /^In archive [^:]*:/d + # Ensure marker is printed + /^====MARK====/p + # Remove all lines with less than 43 characters + /^.\{43\}/!d + # From remaining lines, remove first 43 characters + s/^.\{43\}//' | + $SED -n ' + # Join marker and all lines until next marker into a single line + /^====MARK====/ b para + H + $ b para + b + :para + x + s/\n//g + # Remove the marker + s/^====MARK====// + # Remove trailing dots and whitespace + s/[\. \t]*$// + # Print + /./p' | + # we now have a list, one entry per line, of the stringified + # contents of the appropriate section of all members of the + # archive which possess that section. Heuristic: eliminate + # all those which have a first or second character that is + # a '.' (that is, objdump's representation of an unprintable + # character.) This should work for all archives with less than + # 0x302f exports -- but will fail for DLLs whose name actually + # begins with a literal '.' or a single character followed by + # a '.'. + # + # Of those that remain, print the first one. + $SED -e '/^\./d;/^.\./d;q' +} + +# func_cygming_gnu_implib_p ARG +# This predicate returns with zero status (TRUE) if +# ARG is a GNU/binutils-style import library. Returns +# with nonzero status (FALSE) otherwise. +func_cygming_gnu_implib_p () +{ + $opt_debug + func_to_tool_file "$1" func_convert_file_msys_to_w32 + func_cygming_gnu_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $EGREP ' (_head_[A-Za-z0-9_]+_[ad]l*|[A-Za-z0-9_]+_[ad]l*_iname)$'` + test -n "$func_cygming_gnu_implib_tmp" +} + +# func_cygming_ms_implib_p ARG +# This predicate returns with zero status (TRUE) if +# ARG is an MS-style import library. Returns +# with nonzero status (FALSE) otherwise. +func_cygming_ms_implib_p () +{ + $opt_debug + func_to_tool_file "$1" func_convert_file_msys_to_w32 + func_cygming_ms_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $GREP '_NULL_IMPORT_DESCRIPTOR'` + test -n "$func_cygming_ms_implib_tmp" +} + +# func_cygming_dll_for_implib_fallback ARG +# Platform-specific function to extract the +# name of the DLL associated with the specified +# import library ARG. +# +# This fallback implementation is for use when $DLLTOOL +# does not support the --identify-strict option. +# Invoked by eval'ing the libtool variable +# $sharedlib_from_linklib_cmd +# Result is available in the variable +# $sharedlib_from_linklib_result +func_cygming_dll_for_implib_fallback () +{ + $opt_debug + if func_cygming_gnu_implib_p "$1" ; then + # binutils import library + sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$7' "$1"` + elif func_cygming_ms_implib_p "$1" ; then + # ms-generated import library + sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$6' "$1"` + else + # unknown + sharedlib_from_linklib_result="" + fi +} + + +# func_extract_an_archive dir oldlib +func_extract_an_archive () +{ + $opt_debug + f_ex_an_ar_dir="$1"; shift + f_ex_an_ar_oldlib="$1" + if test "$lock_old_archive_extraction" = yes; then + lockfile=$f_ex_an_ar_oldlib.lock + until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do + func_echo "Waiting for $lockfile to be removed" + sleep 2 + done + fi + func_show_eval "(cd \$f_ex_an_ar_dir && $AR x \"\$f_ex_an_ar_oldlib\")" \ + 'stat=$?; rm -f "$lockfile"; exit $stat' + if test "$lock_old_archive_extraction" = yes; then + $opt_dry_run || rm -f "$lockfile" + fi + if ($AR t "$f_ex_an_ar_oldlib" | sort | sort -uc >/dev/null 2>&1); then + : + else + func_fatal_error "object name conflicts in archive: $f_ex_an_ar_dir/$f_ex_an_ar_oldlib" + fi +} + + +# func_extract_archives gentop oldlib ... +func_extract_archives () +{ + $opt_debug + my_gentop="$1"; shift + my_oldlibs=${1+"$@"} + my_oldobjs="" + my_xlib="" + my_xabs="" + my_xdir="" + + for my_xlib in $my_oldlibs; do + # Extract the objects. + case $my_xlib in + [\\/]* | [A-Za-z]:[\\/]*) my_xabs="$my_xlib" ;; + *) my_xabs=`pwd`"/$my_xlib" ;; + esac + func_basename "$my_xlib" + my_xlib="$func_basename_result" + my_xlib_u=$my_xlib + while :; do + case " $extracted_archives " in + *" $my_xlib_u "*) + func_arith $extracted_serial + 1 + extracted_serial=$func_arith_result + my_xlib_u=lt$extracted_serial-$my_xlib ;; + *) break ;; + esac + done + extracted_archives="$extracted_archives $my_xlib_u" + my_xdir="$my_gentop/$my_xlib_u" + + func_mkdir_p "$my_xdir" + + case $host in + *-darwin*) + func_verbose "Extracting $my_xabs" + # Do not bother doing anything if just a dry run + $opt_dry_run || { + darwin_orig_dir=`pwd` + cd $my_xdir || exit $? + darwin_archive=$my_xabs + darwin_curdir=`pwd` + darwin_base_archive=`basename "$darwin_archive"` + darwin_arches=`$LIPO -info "$darwin_archive" 2>/dev/null | $GREP Architectures 2>/dev/null || true` + if test -n "$darwin_arches"; then + darwin_arches=`$ECHO "$darwin_arches" | $SED -e 's/.*are://'` + darwin_arch= + func_verbose "$darwin_base_archive has multiple architectures $darwin_arches" + for darwin_arch in $darwin_arches ; do + func_mkdir_p "unfat-$$/${darwin_base_archive}-${darwin_arch}" + $LIPO -thin $darwin_arch -output "unfat-$$/${darwin_base_archive}-${darwin_arch}/${darwin_base_archive}" "${darwin_archive}" + cd "unfat-$$/${darwin_base_archive}-${darwin_arch}" + func_extract_an_archive "`pwd`" "${darwin_base_archive}" + cd "$darwin_curdir" + $RM "unfat-$$/${darwin_base_archive}-${darwin_arch}/${darwin_base_archive}" + done # $darwin_arches + ## Okay now we've a bunch of thin objects, gotta fatten them up :) + darwin_filelist=`find unfat-$$ -type f -name \*.o -print -o -name \*.lo -print | $SED -e "$basename" | sort -u` + darwin_file= + darwin_files= + for darwin_file in $darwin_filelist; do + darwin_files=`find unfat-$$ -name $darwin_file -print | sort | $NL2SP` + $LIPO -create -output "$darwin_file" $darwin_files + done # $darwin_filelist + $RM -rf unfat-$$ + cd "$darwin_orig_dir" + else + cd $darwin_orig_dir + func_extract_an_archive "$my_xdir" "$my_xabs" + fi # $darwin_arches + } # !$opt_dry_run + ;; + *) + func_extract_an_archive "$my_xdir" "$my_xabs" + ;; + esac + my_oldobjs="$my_oldobjs "`find $my_xdir -name \*.$objext -print -o -name \*.lo -print | sort | $NL2SP` + done + + func_extract_archives_result="$my_oldobjs" +} + + +# func_emit_wrapper [arg=no] +# +# Emit a libtool wrapper script on stdout. +# Don't directly open a file because we may want to +# incorporate the script contents within a cygwin/mingw +# wrapper executable. Must ONLY be called from within +# func_mode_link because it depends on a number of variables +# set therein. +# +# ARG is the value that the WRAPPER_SCRIPT_BELONGS_IN_OBJDIR +# variable will take. If 'yes', then the emitted script +# will assume that the directory in which it is stored is +# the $objdir directory. This is a cygwin/mingw-specific +# behavior. +func_emit_wrapper () +{ + func_emit_wrapper_arg1=${1-no} + + $ECHO "\ +#! $SHELL + +# $output - temporary wrapper script for $objdir/$outputname +# Generated by $PROGRAM (GNU $PACKAGE$TIMESTAMP) $VERSION +# +# The $output program cannot be directly executed until all the libtool +# libraries that it depends on are installed. +# +# This wrapper script should never be moved out of the build directory. +# If it is, it will not operate correctly. + +# Sed substitution that helps us do robust quoting. It backslashifies +# metacharacters that are still active within double-quoted strings. +sed_quote_subst='$sed_quote_subst' + +# Be Bourne compatible +if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then + emulate sh + NULLCMD=: + # Zsh 3.x and 4.x performs word splitting on \${1+\"\$@\"}, which + # is contrary to our usage. Disable this feature. + alias -g '\${1+\"\$@\"}'='\"\$@\"' + setopt NO_GLOB_SUBST +else + case \`(set -o) 2>/dev/null\` in *posix*) set -o posix;; esac +fi +BIN_SH=xpg4; export BIN_SH # for Tru64 +DUALCASE=1; export DUALCASE # for MKS sh + +# The HP-UX ksh and POSIX shell print the target directory to stdout +# if CDPATH is set. +(unset CDPATH) >/dev/null 2>&1 && unset CDPATH + +relink_command=\"$relink_command\" + +# This environment variable determines our operation mode. +if test \"\$libtool_install_magic\" = \"$magic\"; then + # install mode needs the following variables: + generated_by_libtool_version='$macro_version' + notinst_deplibs='$notinst_deplibs' +else + # When we are sourced in execute mode, \$file and \$ECHO are already set. + if test \"\$libtool_execute_magic\" != \"$magic\"; then + file=\"\$0\"" + + qECHO=`$ECHO "$ECHO" | $SED "$sed_quote_subst"` + $ECHO "\ + +# A function that is used when there is no print builtin or printf. +func_fallback_echo () +{ + eval 'cat <<_LTECHO_EOF +\$1 +_LTECHO_EOF' +} + ECHO=\"$qECHO\" + fi + +# Very basic option parsing. These options are (a) specific to +# the libtool wrapper, (b) are identical between the wrapper +# /script/ and the wrapper /executable/ which is used only on +# windows platforms, and (c) all begin with the string "--lt-" +# (application programs are unlikely to have options which match +# this pattern). +# +# There are only two supported options: --lt-debug and +# --lt-dump-script. There is, deliberately, no --lt-help. +# +# The first argument to this parsing function should be the +# script's $0 value, followed by "$@". +lt_option_debug= +func_parse_lt_options () +{ + lt_script_arg0=\$0 + shift + for lt_opt + do + case \"\$lt_opt\" in + --lt-debug) lt_option_debug=1 ;; + --lt-dump-script) + lt_dump_D=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%/[^/]*$%%'\` + test \"X\$lt_dump_D\" = \"X\$lt_script_arg0\" && lt_dump_D=. + lt_dump_F=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%^.*/%%'\` + cat \"\$lt_dump_D/\$lt_dump_F\" + exit 0 + ;; + --lt-*) + \$ECHO \"Unrecognized --lt- option: '\$lt_opt'\" 1>&2 + exit 1 + ;; + esac + done + + # Print the debug banner immediately: + if test -n \"\$lt_option_debug\"; then + echo \"${outputname}:${output}:\${LINENO}: libtool wrapper (GNU $PACKAGE$TIMESTAMP) $VERSION\" 1>&2 + fi +} + +# Used when --lt-debug. Prints its arguments to stdout +# (redirection is the responsibility of the caller) +func_lt_dump_args () +{ + lt_dump_args_N=1; + for lt_arg + do + \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[\$lt_dump_args_N]: \$lt_arg\" + lt_dump_args_N=\`expr \$lt_dump_args_N + 1\` + done +} + +# Core function for launching the target application +func_exec_program_core () +{ +" + case $host in + # Backslashes separate directories on plain windows + *-*-mingw | *-*-os2* | *-cegcc*) + $ECHO "\ + if test -n \"\$lt_option_debug\"; then + \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[0]: \$progdir\\\\\$program\" 1>&2 + func_lt_dump_args \${1+\"\$@\"} 1>&2 + fi + exec \"\$progdir\\\\\$program\" \${1+\"\$@\"} +" + ;; + + *) + $ECHO "\ + if test -n \"\$lt_option_debug\"; then + \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[0]: \$progdir/\$program\" 1>&2 + func_lt_dump_args \${1+\"\$@\"} 1>&2 + fi + exec \"\$progdir/\$program\" \${1+\"\$@\"} +" + ;; + esac + $ECHO "\ + \$ECHO \"\$0: cannot exec \$program \$*\" 1>&2 + exit 1 +} + +# A function to encapsulate launching the target application +# Strips options in the --lt-* namespace from \$@ and +# launches target application with the remaining arguments. +func_exec_program () +{ + case \" \$* \" in + *\\ --lt-*) + for lt_wr_arg + do + case \$lt_wr_arg in + --lt-*) ;; + *) set x \"\$@\" \"\$lt_wr_arg\"; shift;; + esac + shift + done ;; + esac + func_exec_program_core \${1+\"\$@\"} +} + + # Parse options + func_parse_lt_options \"\$0\" \${1+\"\$@\"} + + # Find the directory that this script lives in. + thisdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*$%%'\` + test \"x\$thisdir\" = \"x\$file\" && thisdir=. + + # Follow symbolic links until we get to the real thisdir. + file=\`ls -ld \"\$file\" | $SED -n 's/.*-> //p'\` + while test -n \"\$file\"; do + destdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*\$%%'\` + + # If there was a directory component, then change thisdir. + if test \"x\$destdir\" != \"x\$file\"; then + case \"\$destdir\" in + [\\\\/]* | [A-Za-z]:[\\\\/]*) thisdir=\"\$destdir\" ;; + *) thisdir=\"\$thisdir/\$destdir\" ;; + esac + fi + + file=\`\$ECHO \"\$file\" | $SED 's%^.*/%%'\` + file=\`ls -ld \"\$thisdir/\$file\" | $SED -n 's/.*-> //p'\` + done + + # Usually 'no', except on cygwin/mingw when embedded into + # the cwrapper. + WRAPPER_SCRIPT_BELONGS_IN_OBJDIR=$func_emit_wrapper_arg1 + if test \"\$WRAPPER_SCRIPT_BELONGS_IN_OBJDIR\" = \"yes\"; then + # special case for '.' + if test \"\$thisdir\" = \".\"; then + thisdir=\`pwd\` + fi + # remove .libs from thisdir + case \"\$thisdir\" in + *[\\\\/]$objdir ) thisdir=\`\$ECHO \"\$thisdir\" | $SED 's%[\\\\/][^\\\\/]*$%%'\` ;; + $objdir ) thisdir=. ;; + esac + fi + + # Try to get the absolute directory name. + absdir=\`cd \"\$thisdir\" && pwd\` + test -n \"\$absdir\" && thisdir=\"\$absdir\" +" + + if test "$fast_install" = yes; then + $ECHO "\ + program=lt-'$outputname'$exeext + progdir=\"\$thisdir/$objdir\" + + if test ! -f \"\$progdir/\$program\" || + { file=\`ls -1dt \"\$progdir/\$program\" \"\$progdir/../\$program\" 2>/dev/null | ${SED} 1q\`; \\ + test \"X\$file\" != \"X\$progdir/\$program\"; }; then + + file=\"\$\$-\$program\" + + if test ! -d \"\$progdir\"; then + $MKDIR \"\$progdir\" + else + $RM \"\$progdir/\$file\" + fi" + + $ECHO "\ + + # relink executable if necessary + if test -n \"\$relink_command\"; then + if relink_command_output=\`eval \$relink_command 2>&1\`; then : + else + $ECHO \"\$relink_command_output\" >&2 + $RM \"\$progdir/\$file\" + exit 1 + fi + fi + + $MV \"\$progdir/\$file\" \"\$progdir/\$program\" 2>/dev/null || + { $RM \"\$progdir/\$program\"; + $MV \"\$progdir/\$file\" \"\$progdir/\$program\"; } + $RM \"\$progdir/\$file\" + fi" + else + $ECHO "\ + program='$outputname' + progdir=\"\$thisdir/$objdir\" +" + fi + + $ECHO "\ + + if test -f \"\$progdir/\$program\"; then" + + # fixup the dll searchpath if we need to. + # + # Fix the DLL searchpath if we need to. Do this before prepending + # to shlibpath, because on Windows, both are PATH and uninstalled + # libraries must come first. + if test -n "$dllsearchpath"; then + $ECHO "\ + # Add the dll search path components to the executable PATH + PATH=$dllsearchpath:\$PATH +" + fi + + # Export our shlibpath_var if we have one. + if test "$shlibpath_overrides_runpath" = yes && test -n "$shlibpath_var" && test -n "$temp_rpath"; then + $ECHO "\ + # Add our own library path to $shlibpath_var + $shlibpath_var=\"$temp_rpath\$$shlibpath_var\" + + # Some systems cannot cope with colon-terminated $shlibpath_var + # The second colon is a workaround for a bug in BeOS R4 sed + $shlibpath_var=\`\$ECHO \"\$$shlibpath_var\" | $SED 's/::*\$//'\` + + export $shlibpath_var +" + fi + + $ECHO "\ + if test \"\$libtool_execute_magic\" != \"$magic\"; then + # Run the actual program with our arguments. + func_exec_program \${1+\"\$@\"} + fi + else + # The program doesn't exist. + \$ECHO \"\$0: error: \\\`\$progdir/\$program' does not exist\" 1>&2 + \$ECHO \"This script is just a wrapper for \$program.\" 1>&2 + \$ECHO \"See the $PACKAGE documentation for more information.\" 1>&2 + exit 1 + fi +fi\ +" +} + + +# func_emit_cwrapperexe_src +# emit the source code for a wrapper executable on stdout +# Must ONLY be called from within func_mode_link because +# it depends on a number of variable set therein. +func_emit_cwrapperexe_src () +{ + cat < +#include +#ifdef _MSC_VER +# include +# include +# include +#else +# include +# include +# ifdef __CYGWIN__ +# include +# endif +#endif +#include +#include +#include +#include +#include +#include +#include +#include + +/* declarations of non-ANSI functions */ +#if defined(__MINGW32__) +# ifdef __STRICT_ANSI__ +int _putenv (const char *); +# endif +#elif defined(__CYGWIN__) +# ifdef __STRICT_ANSI__ +char *realpath (const char *, char *); +int putenv (char *); +int setenv (const char *, const char *, int); +# endif +/* #elif defined (other platforms) ... */ +#endif + +/* portability defines, excluding path handling macros */ +#if defined(_MSC_VER) +# define setmode _setmode +# define stat _stat +# define chmod _chmod +# define getcwd _getcwd +# define putenv _putenv +# define S_IXUSR _S_IEXEC +# ifndef _INTPTR_T_DEFINED +# define _INTPTR_T_DEFINED +# define intptr_t int +# endif +#elif defined(__MINGW32__) +# define setmode _setmode +# define stat _stat +# define chmod _chmod +# define getcwd _getcwd +# define putenv _putenv +#elif defined(__CYGWIN__) +# define HAVE_SETENV +# define FOPEN_WB "wb" +/* #elif defined (other platforms) ... */ +#endif + +#if defined(PATH_MAX) +# define LT_PATHMAX PATH_MAX +#elif defined(MAXPATHLEN) +# define LT_PATHMAX MAXPATHLEN +#else +# define LT_PATHMAX 1024 +#endif + +#ifndef S_IXOTH +# define S_IXOTH 0 +#endif +#ifndef S_IXGRP +# define S_IXGRP 0 +#endif + +/* path handling portability macros */ +#ifndef DIR_SEPARATOR +# define DIR_SEPARATOR '/' +# define PATH_SEPARATOR ':' +#endif + +#if defined (_WIN32) || defined (__MSDOS__) || defined (__DJGPP__) || \ + defined (__OS2__) +# define HAVE_DOS_BASED_FILE_SYSTEM +# define FOPEN_WB "wb" +# ifndef DIR_SEPARATOR_2 +# define DIR_SEPARATOR_2 '\\' +# endif +# ifndef PATH_SEPARATOR_2 +# define PATH_SEPARATOR_2 ';' +# endif +#endif + +#ifndef DIR_SEPARATOR_2 +# define IS_DIR_SEPARATOR(ch) ((ch) == DIR_SEPARATOR) +#else /* DIR_SEPARATOR_2 */ +# define IS_DIR_SEPARATOR(ch) \ + (((ch) == DIR_SEPARATOR) || ((ch) == DIR_SEPARATOR_2)) +#endif /* DIR_SEPARATOR_2 */ + +#ifndef PATH_SEPARATOR_2 +# define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR) +#else /* PATH_SEPARATOR_2 */ +# define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR_2) +#endif /* PATH_SEPARATOR_2 */ + +#ifndef FOPEN_WB +# define FOPEN_WB "w" +#endif +#ifndef _O_BINARY +# define _O_BINARY 0 +#endif + +#define XMALLOC(type, num) ((type *) xmalloc ((num) * sizeof(type))) +#define XFREE(stale) do { \ + if (stale) { free ((void *) stale); stale = 0; } \ +} while (0) + +#if defined(LT_DEBUGWRAPPER) +static int lt_debug = 1; +#else +static int lt_debug = 0; +#endif + +const char *program_name = "libtool-wrapper"; /* in case xstrdup fails */ + +void *xmalloc (size_t num); +char *xstrdup (const char *string); +const char *base_name (const char *name); +char *find_executable (const char *wrapper); +char *chase_symlinks (const char *pathspec); +int make_executable (const char *path); +int check_executable (const char *path); +char *strendzap (char *str, const char *pat); +void lt_debugprintf (const char *file, int line, const char *fmt, ...); +void lt_fatal (const char *file, int line, const char *message, ...); +static const char *nonnull (const char *s); +static const char *nonempty (const char *s); +void lt_setenv (const char *name, const char *value); +char *lt_extend_str (const char *orig_value, const char *add, int to_end); +void lt_update_exe_path (const char *name, const char *value); +void lt_update_lib_path (const char *name, const char *value); +char **prepare_spawn (char **argv); +void lt_dump_script (FILE *f); +EOF + + cat <= 0) + && (st.st_mode & (S_IXUSR | S_IXGRP | S_IXOTH))) + return 1; + else + return 0; +} + +int +make_executable (const char *path) +{ + int rval = 0; + struct stat st; + + lt_debugprintf (__FILE__, __LINE__, "(make_executable): %s\n", + nonempty (path)); + if ((!path) || (!*path)) + return 0; + + if (stat (path, &st) >= 0) + { + rval = chmod (path, st.st_mode | S_IXOTH | S_IXGRP | S_IXUSR); + } + return rval; +} + +/* Searches for the full path of the wrapper. Returns + newly allocated full path name if found, NULL otherwise + Does not chase symlinks, even on platforms that support them. +*/ +char * +find_executable (const char *wrapper) +{ + int has_slash = 0; + const char *p; + const char *p_next; + /* static buffer for getcwd */ + char tmp[LT_PATHMAX + 1]; + int tmp_len; + char *concat_name; + + lt_debugprintf (__FILE__, __LINE__, "(find_executable): %s\n", + nonempty (wrapper)); + + if ((wrapper == NULL) || (*wrapper == '\0')) + return NULL; + + /* Absolute path? */ +#if defined (HAVE_DOS_BASED_FILE_SYSTEM) + if (isalpha ((unsigned char) wrapper[0]) && wrapper[1] == ':') + { + concat_name = xstrdup (wrapper); + if (check_executable (concat_name)) + return concat_name; + XFREE (concat_name); + } + else + { +#endif + if (IS_DIR_SEPARATOR (wrapper[0])) + { + concat_name = xstrdup (wrapper); + if (check_executable (concat_name)) + return concat_name; + XFREE (concat_name); + } +#if defined (HAVE_DOS_BASED_FILE_SYSTEM) + } +#endif + + for (p = wrapper; *p; p++) + if (*p == '/') + { + has_slash = 1; + break; + } + if (!has_slash) + { + /* no slashes; search PATH */ + const char *path = getenv ("PATH"); + if (path != NULL) + { + for (p = path; *p; p = p_next) + { + const char *q; + size_t p_len; + for (q = p; *q; q++) + if (IS_PATH_SEPARATOR (*q)) + break; + p_len = q - p; + p_next = (*q == '\0' ? q : q + 1); + if (p_len == 0) + { + /* empty path: current directory */ + if (getcwd (tmp, LT_PATHMAX) == NULL) + lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", + nonnull (strerror (errno))); + tmp_len = strlen (tmp); + concat_name = + XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); + memcpy (concat_name, tmp, tmp_len); + concat_name[tmp_len] = '/'; + strcpy (concat_name + tmp_len + 1, wrapper); + } + else + { + concat_name = + XMALLOC (char, p_len + 1 + strlen (wrapper) + 1); + memcpy (concat_name, p, p_len); + concat_name[p_len] = '/'; + strcpy (concat_name + p_len + 1, wrapper); + } + if (check_executable (concat_name)) + return concat_name; + XFREE (concat_name); + } + } + /* not found in PATH; assume curdir */ + } + /* Relative path | not found in path: prepend cwd */ + if (getcwd (tmp, LT_PATHMAX) == NULL) + lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", + nonnull (strerror (errno))); + tmp_len = strlen (tmp); + concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); + memcpy (concat_name, tmp, tmp_len); + concat_name[tmp_len] = '/'; + strcpy (concat_name + tmp_len + 1, wrapper); + + if (check_executable (concat_name)) + return concat_name; + XFREE (concat_name); + return NULL; +} + +char * +chase_symlinks (const char *pathspec) +{ +#ifndef S_ISLNK + return xstrdup (pathspec); +#else + char buf[LT_PATHMAX]; + struct stat s; + char *tmp_pathspec = xstrdup (pathspec); + char *p; + int has_symlinks = 0; + while (strlen (tmp_pathspec) && !has_symlinks) + { + lt_debugprintf (__FILE__, __LINE__, + "checking path component for symlinks: %s\n", + tmp_pathspec); + if (lstat (tmp_pathspec, &s) == 0) + { + if (S_ISLNK (s.st_mode) != 0) + { + has_symlinks = 1; + break; + } + + /* search backwards for last DIR_SEPARATOR */ + p = tmp_pathspec + strlen (tmp_pathspec) - 1; + while ((p > tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) + p--; + if ((p == tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) + { + /* no more DIR_SEPARATORS left */ + break; + } + *p = '\0'; + } + else + { + lt_fatal (__FILE__, __LINE__, + "error accessing file \"%s\": %s", + tmp_pathspec, nonnull (strerror (errno))); + } + } + XFREE (tmp_pathspec); + + if (!has_symlinks) + { + return xstrdup (pathspec); + } + + tmp_pathspec = realpath (pathspec, buf); + if (tmp_pathspec == 0) + { + lt_fatal (__FILE__, __LINE__, + "could not follow symlinks for %s", pathspec); + } + return xstrdup (tmp_pathspec); +#endif +} + +char * +strendzap (char *str, const char *pat) +{ + size_t len, patlen; + + assert (str != NULL); + assert (pat != NULL); + + len = strlen (str); + patlen = strlen (pat); + + if (patlen <= len) + { + str += len - patlen; + if (strcmp (str, pat) == 0) + *str = '\0'; + } + return str; +} + +void +lt_debugprintf (const char *file, int line, const char *fmt, ...) +{ + va_list args; + if (lt_debug) + { + (void) fprintf (stderr, "%s:%s:%d: ", program_name, file, line); + va_start (args, fmt); + (void) vfprintf (stderr, fmt, args); + va_end (args); + } +} + +static void +lt_error_core (int exit_status, const char *file, + int line, const char *mode, + const char *message, va_list ap) +{ + fprintf (stderr, "%s:%s:%d: %s: ", program_name, file, line, mode); + vfprintf (stderr, message, ap); + fprintf (stderr, ".\n"); + + if (exit_status >= 0) + exit (exit_status); +} + +void +lt_fatal (const char *file, int line, const char *message, ...) +{ + va_list ap; + va_start (ap, message); + lt_error_core (EXIT_FAILURE, file, line, "FATAL", message, ap); + va_end (ap); +} + +static const char * +nonnull (const char *s) +{ + return s ? s : "(null)"; +} + +static const char * +nonempty (const char *s) +{ + return (s && !*s) ? "(empty)" : nonnull (s); +} + +void +lt_setenv (const char *name, const char *value) +{ + lt_debugprintf (__FILE__, __LINE__, + "(lt_setenv) setting '%s' to '%s'\n", + nonnull (name), nonnull (value)); + { +#ifdef HAVE_SETENV + /* always make a copy, for consistency with !HAVE_SETENV */ + char *str = xstrdup (value); + setenv (name, str, 1); +#else + int len = strlen (name) + 1 + strlen (value) + 1; + char *str = XMALLOC (char, len); + sprintf (str, "%s=%s", name, value); + if (putenv (str) != EXIT_SUCCESS) + { + XFREE (str); + } +#endif + } +} + +char * +lt_extend_str (const char *orig_value, const char *add, int to_end) +{ + char *new_value; + if (orig_value && *orig_value) + { + int orig_value_len = strlen (orig_value); + int add_len = strlen (add); + new_value = XMALLOC (char, add_len + orig_value_len + 1); + if (to_end) + { + strcpy (new_value, orig_value); + strcpy (new_value + orig_value_len, add); + } + else + { + strcpy (new_value, add); + strcpy (new_value + add_len, orig_value); + } + } + else + { + new_value = xstrdup (add); + } + return new_value; +} + +void +lt_update_exe_path (const char *name, const char *value) +{ + lt_debugprintf (__FILE__, __LINE__, + "(lt_update_exe_path) modifying '%s' by prepending '%s'\n", + nonnull (name), nonnull (value)); + + if (name && *name && value && *value) + { + char *new_value = lt_extend_str (getenv (name), value, 0); + /* some systems can't cope with a ':'-terminated path #' */ + int len = strlen (new_value); + while (((len = strlen (new_value)) > 0) && IS_PATH_SEPARATOR (new_value[len-1])) + { + new_value[len-1] = '\0'; + } + lt_setenv (name, new_value); + XFREE (new_value); + } +} + +void +lt_update_lib_path (const char *name, const char *value) +{ + lt_debugprintf (__FILE__, __LINE__, + "(lt_update_lib_path) modifying '%s' by prepending '%s'\n", + nonnull (name), nonnull (value)); + + if (name && *name && value && *value) + { + char *new_value = lt_extend_str (getenv (name), value, 0); + lt_setenv (name, new_value); + XFREE (new_value); + } +} + +EOF + case $host_os in + mingw*) + cat <<"EOF" + +/* Prepares an argument vector before calling spawn(). + Note that spawn() does not by itself call the command interpreter + (getenv ("COMSPEC") != NULL ? getenv ("COMSPEC") : + ({ OSVERSIONINFO v; v.dwOSVersionInfoSize = sizeof(OSVERSIONINFO); + GetVersionEx(&v); + v.dwPlatformId == VER_PLATFORM_WIN32_NT; + }) ? "cmd.exe" : "command.com"). + Instead it simply concatenates the arguments, separated by ' ', and calls + CreateProcess(). We must quote the arguments since Win32 CreateProcess() + interprets characters like ' ', '\t', '\\', '"' (but not '<' and '>') in a + special way: + - Space and tab are interpreted as delimiters. They are not treated as + delimiters if they are surrounded by double quotes: "...". + - Unescaped double quotes are removed from the input. Their only effect is + that within double quotes, space and tab are treated like normal + characters. + - Backslashes not followed by double quotes are not special. + - But 2*n+1 backslashes followed by a double quote become + n backslashes followed by a double quote (n >= 0): + \" -> " + \\\" -> \" + \\\\\" -> \\" + */ +#define SHELL_SPECIAL_CHARS "\"\\ \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" +#define SHELL_SPACE_CHARS " \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" +char ** +prepare_spawn (char **argv) +{ + size_t argc; + char **new_argv; + size_t i; + + /* Count number of arguments. */ + for (argc = 0; argv[argc] != NULL; argc++) + ; + + /* Allocate new argument vector. */ + new_argv = XMALLOC (char *, argc + 1); + + /* Put quoted arguments into the new argument vector. */ + for (i = 0; i < argc; i++) + { + const char *string = argv[i]; + + if (string[0] == '\0') + new_argv[i] = xstrdup ("\"\""); + else if (strpbrk (string, SHELL_SPECIAL_CHARS) != NULL) + { + int quote_around = (strpbrk (string, SHELL_SPACE_CHARS) != NULL); + size_t length; + unsigned int backslashes; + const char *s; + char *quoted_string; + char *p; + + length = 0; + backslashes = 0; + if (quote_around) + length++; + for (s = string; *s != '\0'; s++) + { + char c = *s; + if (c == '"') + length += backslashes + 1; + length++; + if (c == '\\') + backslashes++; + else + backslashes = 0; + } + if (quote_around) + length += backslashes + 1; + + quoted_string = XMALLOC (char, length + 1); + + p = quoted_string; + backslashes = 0; + if (quote_around) + *p++ = '"'; + for (s = string; *s != '\0'; s++) + { + char c = *s; + if (c == '"') + { + unsigned int j; + for (j = backslashes + 1; j > 0; j--) + *p++ = '\\'; + } + *p++ = c; + if (c == '\\') + backslashes++; + else + backslashes = 0; + } + if (quote_around) + { + unsigned int j; + for (j = backslashes; j > 0; j--) + *p++ = '\\'; + *p++ = '"'; + } + *p = '\0'; + + new_argv[i] = quoted_string; + } + else + new_argv[i] = (char *) string; + } + new_argv[argc] = NULL; + + return new_argv; +} +EOF + ;; + esac + + cat <<"EOF" +void lt_dump_script (FILE* f) +{ +EOF + func_emit_wrapper yes | + $SED -n -e ' +s/^\(.\{79\}\)\(..*\)/\1\ +\2/ +h +s/\([\\"]\)/\\\1/g +s/$/\\n/ +s/\([^\n]*\).*/ fputs ("\1", f);/p +g +D' + cat <<"EOF" +} +EOF +} +# end: func_emit_cwrapperexe_src + +# func_win32_import_lib_p ARG +# True if ARG is an import lib, as indicated by $file_magic_cmd +func_win32_import_lib_p () +{ + $opt_debug + case `eval $file_magic_cmd \"\$1\" 2>/dev/null | $SED -e 10q` in + *import*) : ;; + *) false ;; + esac +} + +# func_mode_link arg... +func_mode_link () +{ + $opt_debug + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) + # It is impossible to link a dll without this setting, and + # we shouldn't force the makefile maintainer to figure out + # which system we are compiling for in order to pass an extra + # flag for every libtool invocation. + # allow_undefined=no + + # FIXME: Unfortunately, there are problems with the above when trying + # to make a dll which has undefined symbols, in which case not + # even a static library is built. For now, we need to specify + # -no-undefined on the libtool link line when we can be certain + # that all symbols are satisfied, otherwise we get a static library. + allow_undefined=yes + ;; + *) + allow_undefined=yes + ;; + esac + libtool_args=$nonopt + base_compile="$nonopt $@" + compile_command=$nonopt + finalize_command=$nonopt + + compile_rpath= + finalize_rpath= + compile_shlibpath= + finalize_shlibpath= + convenience= + old_convenience= + deplibs= + old_deplibs= + compiler_flags= + linker_flags= + dllsearchpath= + lib_search_path=`pwd` + inst_prefix_dir= + new_inherited_linker_flags= + + avoid_version=no + bindir= + dlfiles= + dlprefiles= + dlself=no + export_dynamic=no + export_symbols= + export_symbols_regex= + generated= + libobjs= + ltlibs= + module=no + no_install=no + objs= + non_pic_objects= + precious_files_regex= + prefer_static_libs=no + preload=no + prev= + prevarg= + release= + rpath= + xrpath= + perm_rpath= + temp_rpath= + thread_safe=no + vinfo= + vinfo_number=no + weak_libs= + single_module="${wl}-single_module" + func_infer_tag $base_compile + + # We need to know -static, to get the right output filenames. + for arg + do + case $arg in + -shared) + test "$build_libtool_libs" != yes && \ + func_fatal_configuration "can not build a shared library" + build_old_libs=no + break + ;; + -all-static | -static | -static-libtool-libs) + case $arg in + -all-static) + if test "$build_libtool_libs" = yes && test -z "$link_static_flag"; then + func_warning "complete static linking is impossible in this configuration" + fi + if test -n "$link_static_flag"; then + dlopen_self=$dlopen_self_static + fi + prefer_static_libs=yes + ;; + -static) + if test -z "$pic_flag" && test -n "$link_static_flag"; then + dlopen_self=$dlopen_self_static + fi + prefer_static_libs=built + ;; + -static-libtool-libs) + if test -z "$pic_flag" && test -n "$link_static_flag"; then + dlopen_self=$dlopen_self_static + fi + prefer_static_libs=yes + ;; + esac + build_libtool_libs=no + build_old_libs=yes + break + ;; + esac + done + + # See if our shared archives depend on static archives. + test -n "$old_archive_from_new_cmds" && build_old_libs=yes + + # Go through the arguments, transforming them on the way. + while test "$#" -gt 0; do + arg="$1" + shift + func_quote_for_eval "$arg" + qarg=$func_quote_for_eval_unquoted_result + func_append libtool_args " $func_quote_for_eval_result" + + # If the previous option needs an argument, assign it. + if test -n "$prev"; then + case $prev in + output) + func_append compile_command " @OUTPUT@" + func_append finalize_command " @OUTPUT@" + ;; + esac + + case $prev in + bindir) + bindir="$arg" + prev= + continue + ;; + dlfiles|dlprefiles) + if test "$preload" = no; then + # Add the symbol object into the linking commands. + func_append compile_command " @SYMFILE@" + func_append finalize_command " @SYMFILE@" + preload=yes + fi + case $arg in + *.la | *.lo) ;; # We handle these cases below. + force) + if test "$dlself" = no; then + dlself=needless + export_dynamic=yes + fi + prev= + continue + ;; + self) + if test "$prev" = dlprefiles; then + dlself=yes + elif test "$prev" = dlfiles && test "$dlopen_self" != yes; then + dlself=yes + else + dlself=needless + export_dynamic=yes + fi + prev= + continue + ;; + *) + if test "$prev" = dlfiles; then + func_append dlfiles " $arg" + else + func_append dlprefiles " $arg" + fi + prev= + continue + ;; + esac + ;; + expsyms) + export_symbols="$arg" + test -f "$arg" \ + || func_fatal_error "symbol file \`$arg' does not exist" + prev= + continue + ;; + expsyms_regex) + export_symbols_regex="$arg" + prev= + continue + ;; + framework) + case $host in + *-*-darwin*) + case "$deplibs " in + *" $qarg.ltframework "*) ;; + *) func_append deplibs " $qarg.ltframework" # this is fixed later + ;; + esac + ;; + esac + prev= + continue + ;; + inst_prefix) + inst_prefix_dir="$arg" + prev= + continue + ;; + objectlist) + if test -f "$arg"; then + save_arg=$arg + moreargs= + for fil in `cat "$save_arg"` + do +# func_append moreargs " $fil" + arg=$fil + # A libtool-controlled object. + + # Check to see that this really is a libtool object. + if func_lalib_unsafe_p "$arg"; then + pic_object= + non_pic_object= + + # Read the .lo file + func_source "$arg" + + if test -z "$pic_object" || + test -z "$non_pic_object" || + test "$pic_object" = none && + test "$non_pic_object" = none; then + func_fatal_error "cannot find name of object for \`$arg'" + fi + + # Extract subdirectory from the argument. + func_dirname "$arg" "/" "" + xdir="$func_dirname_result" + + if test "$pic_object" != none; then + # Prepend the subdirectory the object is found in. + pic_object="$xdir$pic_object" + + if test "$prev" = dlfiles; then + if test "$build_libtool_libs" = yes && test "$dlopen_support" = yes; then + func_append dlfiles " $pic_object" + prev= + continue + else + # If libtool objects are unsupported, then we need to preload. + prev=dlprefiles + fi + fi + + # CHECK ME: I think I busted this. -Ossama + if test "$prev" = dlprefiles; then + # Preload the old-style object. + func_append dlprefiles " $pic_object" + prev= + fi + + # A PIC object. + func_append libobjs " $pic_object" + arg="$pic_object" + fi + + # Non-PIC object. + if test "$non_pic_object" != none; then + # Prepend the subdirectory the object is found in. + non_pic_object="$xdir$non_pic_object" + + # A standard non-PIC object + func_append non_pic_objects " $non_pic_object" + if test -z "$pic_object" || test "$pic_object" = none ; then + arg="$non_pic_object" + fi + else + # If the PIC object exists, use it instead. + # $xdir was prepended to $pic_object above. + non_pic_object="$pic_object" + func_append non_pic_objects " $non_pic_object" + fi + else + # Only an error if not doing a dry-run. + if $opt_dry_run; then + # Extract subdirectory from the argument. + func_dirname "$arg" "/" "" + xdir="$func_dirname_result" + + func_lo2o "$arg" + pic_object=$xdir$objdir/$func_lo2o_result + non_pic_object=$xdir$func_lo2o_result + func_append libobjs " $pic_object" + func_append non_pic_objects " $non_pic_object" + else + func_fatal_error "\`$arg' is not a valid libtool object" + fi + fi + done + else + func_fatal_error "link input file \`$arg' does not exist" + fi + arg=$save_arg + prev= + continue + ;; + precious_regex) + precious_files_regex="$arg" + prev= + continue + ;; + release) + release="-$arg" + prev= + continue + ;; + rpath | xrpath) + # We need an absolute path. + case $arg in + [\\/]* | [A-Za-z]:[\\/]*) ;; + *) + func_fatal_error "only absolute run-paths are allowed" + ;; + esac + if test "$prev" = rpath; then + case "$rpath " in + *" $arg "*) ;; + *) func_append rpath " $arg" ;; + esac + else + case "$xrpath " in + *" $arg "*) ;; + *) func_append xrpath " $arg" ;; + esac + fi + prev= + continue + ;; + shrext) + shrext_cmds="$arg" + prev= + continue + ;; + weak) + func_append weak_libs " $arg" + prev= + continue + ;; + xcclinker) + func_append linker_flags " $qarg" + func_append compiler_flags " $qarg" + prev= + func_append compile_command " $qarg" + func_append finalize_command " $qarg" + continue + ;; + xcompiler) + func_append compiler_flags " $qarg" + prev= + func_append compile_command " $qarg" + func_append finalize_command " $qarg" + continue + ;; + xlinker) + func_append linker_flags " $qarg" + func_append compiler_flags " $wl$qarg" + prev= + func_append compile_command " $wl$qarg" + func_append finalize_command " $wl$qarg" + continue + ;; + *) + eval "$prev=\"\$arg\"" + prev= + continue + ;; + esac + fi # test -n "$prev" + + prevarg="$arg" + + case $arg in + -all-static) + if test -n "$link_static_flag"; then + # See comment for -static flag below, for more details. + func_append compile_command " $link_static_flag" + func_append finalize_command " $link_static_flag" + fi + continue + ;; + + -allow-undefined) + # FIXME: remove this flag sometime in the future. + func_fatal_error "\`-allow-undefined' must not be used because it is the default" + ;; + + -avoid-version) + avoid_version=yes + continue + ;; + + -bindir) + prev=bindir + continue + ;; + + -dlopen) + prev=dlfiles + continue + ;; + + -dlpreopen) + prev=dlprefiles + continue + ;; + + -export-dynamic) + export_dynamic=yes + continue + ;; + + -export-symbols | -export-symbols-regex) + if test -n "$export_symbols" || test -n "$export_symbols_regex"; then + func_fatal_error "more than one -exported-symbols argument is not allowed" + fi + if test "X$arg" = "X-export-symbols"; then + prev=expsyms + else + prev=expsyms_regex + fi + continue + ;; + + -framework) + prev=framework + continue + ;; + + -inst-prefix-dir) + prev=inst_prefix + continue + ;; + + # The native IRIX linker understands -LANG:*, -LIST:* and -LNO:* + # so, if we see these flags be careful not to treat them like -L + -L[A-Z][A-Z]*:*) + case $with_gcc/$host in + no/*-*-irix* | /*-*-irix*) + func_append compile_command " $arg" + func_append finalize_command " $arg" + ;; + esac + continue + ;; + + -L*) + func_stripname "-L" '' "$arg" + if test -z "$func_stripname_result"; then + if test "$#" -gt 0; then + func_fatal_error "require no space between \`-L' and \`$1'" + else + func_fatal_error "need path for \`-L' option" + fi + fi + func_resolve_sysroot "$func_stripname_result" + dir=$func_resolve_sysroot_result + # We need an absolute path. + case $dir in + [\\/]* | [A-Za-z]:[\\/]*) ;; + *) + absdir=`cd "$dir" && pwd` + test -z "$absdir" && \ + func_fatal_error "cannot determine absolute directory name of \`$dir'" + dir="$absdir" + ;; + esac + case "$deplibs " in + *" -L$dir "* | *" $arg "*) + # Will only happen for absolute or sysroot arguments + ;; + *) + # Preserve sysroot, but never include relative directories + case $dir in + [\\/]* | [A-Za-z]:[\\/]* | =*) func_append deplibs " $arg" ;; + *) func_append deplibs " -L$dir" ;; + esac + func_append lib_search_path " $dir" + ;; + esac + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) + testbindir=`$ECHO "$dir" | $SED 's*/lib$*/bin*'` + case :$dllsearchpath: in + *":$dir:"*) ;; + ::) dllsearchpath=$dir;; + *) func_append dllsearchpath ":$dir";; + esac + case :$dllsearchpath: in + *":$testbindir:"*) ;; + ::) dllsearchpath=$testbindir;; + *) func_append dllsearchpath ":$testbindir";; + esac + ;; + esac + continue + ;; + + -l*) + if test "X$arg" = "X-lc" || test "X$arg" = "X-lm"; then + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-beos* | *-cegcc* | *-*-haiku*) + # These systems don't actually have a C or math library (as such) + continue + ;; + *-*-os2*) + # These systems don't actually have a C library (as such) + test "X$arg" = "X-lc" && continue + ;; + *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) + # Do not include libc due to us having libc/libc_r. + test "X$arg" = "X-lc" && continue + ;; + *-*-rhapsody* | *-*-darwin1.[012]) + # Rhapsody C and math libraries are in the System framework + func_append deplibs " System.ltframework" + continue + ;; + *-*-sco3.2v5* | *-*-sco5v6*) + # Causes problems with __ctype + test "X$arg" = "X-lc" && continue + ;; + *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) + # Compiler inserts libc in the correct place for threads to work + test "X$arg" = "X-lc" && continue + ;; + esac + elif test "X$arg" = "X-lc_r"; then + case $host in + *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) + # Do not include libc_r directly, use -pthread flag. + continue + ;; + esac + fi + func_append deplibs " $arg" + continue + ;; + + -module) + module=yes + continue + ;; + + # Tru64 UNIX uses -model [arg] to determine the layout of C++ + # classes, name mangling, and exception handling. + # Darwin uses the -arch flag to determine output architecture. + -model|-arch|-isysroot|--sysroot) + func_append compiler_flags " $arg" + func_append compile_command " $arg" + func_append finalize_command " $arg" + prev=xcompiler + continue + ;; + + -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ + |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) + func_append compiler_flags " $arg" + func_append compile_command " $arg" + func_append finalize_command " $arg" + case "$new_inherited_linker_flags " in + *" $arg "*) ;; + * ) func_append new_inherited_linker_flags " $arg" ;; + esac + continue + ;; + + -multi_module) + single_module="${wl}-multi_module" + continue + ;; + + -no-fast-install) + fast_install=no + continue + ;; + + -no-install) + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-darwin* | *-cegcc*) + # The PATH hackery in wrapper scripts is required on Windows + # and Darwin in order for the loader to find any dlls it needs. + func_warning "\`-no-install' is ignored for $host" + func_warning "assuming \`-no-fast-install' instead" + fast_install=no + ;; + *) no_install=yes ;; + esac + continue + ;; + + -no-undefined) + allow_undefined=no + continue + ;; + + -objectlist) + prev=objectlist + continue + ;; + + -o) prev=output ;; + + -precious-files-regex) + prev=precious_regex + continue + ;; + + -release) + prev=release + continue + ;; + + -rpath) + prev=rpath + continue + ;; + + -R) + prev=xrpath + continue + ;; + + -R*) + func_stripname '-R' '' "$arg" + dir=$func_stripname_result + # We need an absolute path. + case $dir in + [\\/]* | [A-Za-z]:[\\/]*) ;; + =*) + func_stripname '=' '' "$dir" + dir=$lt_sysroot$func_stripname_result + ;; + *) + func_fatal_error "only absolute run-paths are allowed" + ;; + esac + case "$xrpath " in + *" $dir "*) ;; + *) func_append xrpath " $dir" ;; + esac + continue + ;; + + -shared) + # The effects of -shared are defined in a previous loop. + continue + ;; + + -shrext) + prev=shrext + continue + ;; + + -static | -static-libtool-libs) + # The effects of -static are defined in a previous loop. + # We used to do the same as -all-static on platforms that + # didn't have a PIC flag, but the assumption that the effects + # would be equivalent was wrong. It would break on at least + # Digital Unix and AIX. + continue + ;; + + -thread-safe) + thread_safe=yes + continue + ;; + + -version-info) + prev=vinfo + continue + ;; + + -version-number) + prev=vinfo + vinfo_number=yes + continue + ;; + + -weak) + prev=weak + continue + ;; + + -Wc,*) + func_stripname '-Wc,' '' "$arg" + args=$func_stripname_result + arg= + save_ifs="$IFS"; IFS=',' + for flag in $args; do + IFS="$save_ifs" + func_quote_for_eval "$flag" + func_append arg " $func_quote_for_eval_result" + func_append compiler_flags " $func_quote_for_eval_result" + done + IFS="$save_ifs" + func_stripname ' ' '' "$arg" + arg=$func_stripname_result + ;; + + -Wl,*) + func_stripname '-Wl,' '' "$arg" + args=$func_stripname_result + arg= + save_ifs="$IFS"; IFS=',' + for flag in $args; do + IFS="$save_ifs" + func_quote_for_eval "$flag" + func_append arg " $wl$func_quote_for_eval_result" + func_append compiler_flags " $wl$func_quote_for_eval_result" + func_append linker_flags " $func_quote_for_eval_result" + done + IFS="$save_ifs" + func_stripname ' ' '' "$arg" + arg=$func_stripname_result + ;; + + -Xcompiler) + prev=xcompiler + continue + ;; + + -Xlinker) + prev=xlinker + continue + ;; + + -XCClinker) + prev=xcclinker + continue + ;; + + # -msg_* for osf cc + -msg_*) + func_quote_for_eval "$arg" + arg="$func_quote_for_eval_result" + ;; + + # Flags to be passed through unchanged, with rationale: + # -64, -mips[0-9] enable 64-bit mode for the SGI compiler + # -r[0-9][0-9]* specify processor for the SGI compiler + # -xarch=*, -xtarget=* enable 64-bit mode for the Sun compiler + # +DA*, +DD* enable 64-bit mode for the HP compiler + # -q* compiler args for the IBM compiler + # -m*, -t[45]*, -txscale* architecture-specific flags for GCC + # -F/path path to uninstalled frameworks, gcc on darwin + # -p, -pg, --coverage, -fprofile-* profiling flags for GCC + # @file GCC response files + # -tp=* Portland pgcc target processor selection + # --sysroot=* for sysroot support + # -O*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization + -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \ + -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*|--sysroot=*| \ + -O*|-flto*|-fwhopr*|-fuse-linker-plugin) + func_quote_for_eval "$arg" + arg="$func_quote_for_eval_result" + func_append compile_command " $arg" + func_append finalize_command " $arg" + func_append compiler_flags " $arg" + continue + ;; + + # Some other compiler flag. + -* | +*) + func_quote_for_eval "$arg" + arg="$func_quote_for_eval_result" + ;; + + *.$objext) + # A standard object. + func_append objs " $arg" + ;; + + *.lo) + # A libtool-controlled object. + + # Check to see that this really is a libtool object. + if func_lalib_unsafe_p "$arg"; then + pic_object= + non_pic_object= + + # Read the .lo file + func_source "$arg" + + if test -z "$pic_object" || + test -z "$non_pic_object" || + test "$pic_object" = none && + test "$non_pic_object" = none; then + func_fatal_error "cannot find name of object for \`$arg'" + fi + + # Extract subdirectory from the argument. + func_dirname "$arg" "/" "" + xdir="$func_dirname_result" + + if test "$pic_object" != none; then + # Prepend the subdirectory the object is found in. + pic_object="$xdir$pic_object" + + if test "$prev" = dlfiles; then + if test "$build_libtool_libs" = yes && test "$dlopen_support" = yes; then + func_append dlfiles " $pic_object" + prev= + continue + else + # If libtool objects are unsupported, then we need to preload. + prev=dlprefiles + fi + fi + + # CHECK ME: I think I busted this. -Ossama + if test "$prev" = dlprefiles; then + # Preload the old-style object. + func_append dlprefiles " $pic_object" + prev= + fi + + # A PIC object. + func_append libobjs " $pic_object" + arg="$pic_object" + fi + + # Non-PIC object. + if test "$non_pic_object" != none; then + # Prepend the subdirectory the object is found in. + non_pic_object="$xdir$non_pic_object" + + # A standard non-PIC object + func_append non_pic_objects " $non_pic_object" + if test -z "$pic_object" || test "$pic_object" = none ; then + arg="$non_pic_object" + fi + else + # If the PIC object exists, use it instead. + # $xdir was prepended to $pic_object above. + non_pic_object="$pic_object" + func_append non_pic_objects " $non_pic_object" + fi + else + # Only an error if not doing a dry-run. + if $opt_dry_run; then + # Extract subdirectory from the argument. + func_dirname "$arg" "/" "" + xdir="$func_dirname_result" + + func_lo2o "$arg" + pic_object=$xdir$objdir/$func_lo2o_result + non_pic_object=$xdir$func_lo2o_result + func_append libobjs " $pic_object" + func_append non_pic_objects " $non_pic_object" + else + func_fatal_error "\`$arg' is not a valid libtool object" + fi + fi + ;; + + *.$libext) + # An archive. + func_append deplibs " $arg" + func_append old_deplibs " $arg" + continue + ;; + + *.la) + # A libtool-controlled library. + + func_resolve_sysroot "$arg" + if test "$prev" = dlfiles; then + # This library was specified with -dlopen. + func_append dlfiles " $func_resolve_sysroot_result" + prev= + elif test "$prev" = dlprefiles; then + # The library was specified with -dlpreopen. + func_append dlprefiles " $func_resolve_sysroot_result" + prev= + else + func_append deplibs " $func_resolve_sysroot_result" + fi + continue + ;; + + # Some other compiler argument. + *) + # Unknown arguments in both finalize_command and compile_command need + # to be aesthetically quoted because they are evaled later. + func_quote_for_eval "$arg" + arg="$func_quote_for_eval_result" + ;; + esac # arg + + # Now actually substitute the argument into the commands. + if test -n "$arg"; then + func_append compile_command " $arg" + func_append finalize_command " $arg" + fi + done # argument parsing loop + + test -n "$prev" && \ + func_fatal_help "the \`$prevarg' option requires an argument" + + if test "$export_dynamic" = yes && test -n "$export_dynamic_flag_spec"; then + eval arg=\"$export_dynamic_flag_spec\" + func_append compile_command " $arg" + func_append finalize_command " $arg" + fi + + oldlibs= + # calculate the name of the file, without its directory + func_basename "$output" + outputname="$func_basename_result" + libobjs_save="$libobjs" + + if test -n "$shlibpath_var"; then + # get the directories listed in $shlibpath_var + eval shlib_search_path=\`\$ECHO \"\${$shlibpath_var}\" \| \$SED \'s/:/ /g\'\` + else + shlib_search_path= + fi + eval sys_lib_search_path=\"$sys_lib_search_path_spec\" + eval sys_lib_dlsearch_path=\"$sys_lib_dlsearch_path_spec\" + + func_dirname "$output" "/" "" + output_objdir="$func_dirname_result$objdir" + func_to_tool_file "$output_objdir/" + tool_output_objdir=$func_to_tool_file_result + # Create the object directory. + func_mkdir_p "$output_objdir" + + # Determine the type of output + case $output in + "") + func_fatal_help "you must specify an output file" + ;; + *.$libext) linkmode=oldlib ;; + *.lo | *.$objext) linkmode=obj ;; + *.la) linkmode=lib ;; + *) linkmode=prog ;; # Anything else should be a program. + esac + + specialdeplibs= + + libs= + # Find all interdependent deplibs by searching for libraries + # that are linked more than once (e.g. -la -lb -la) + for deplib in $deplibs; do + if $opt_preserve_dup_deps ; then + case "$libs " in + *" $deplib "*) func_append specialdeplibs " $deplib" ;; + esac + fi + func_append libs " $deplib" + done + + if test "$linkmode" = lib; then + libs="$predeps $libs $compiler_lib_search_path $postdeps" + + # Compute libraries that are listed more than once in $predeps + # $postdeps and mark them as special (i.e., whose duplicates are + # not to be eliminated). + pre_post_deps= + if $opt_duplicate_compiler_generated_deps; then + for pre_post_dep in $predeps $postdeps; do + case "$pre_post_deps " in + *" $pre_post_dep "*) func_append specialdeplibs " $pre_post_deps" ;; + esac + func_append pre_post_deps " $pre_post_dep" + done + fi + pre_post_deps= + fi + + deplibs= + newdependency_libs= + newlib_search_path= + need_relink=no # whether we're linking any uninstalled libtool libraries + notinst_deplibs= # not-installed libtool libraries + notinst_path= # paths that contain not-installed libtool libraries + + case $linkmode in + lib) + passes="conv dlpreopen link" + for file in $dlfiles $dlprefiles; do + case $file in + *.la) ;; + *) + func_fatal_help "libraries can \`-dlopen' only libtool libraries: $file" + ;; + esac + done + ;; + prog) + compile_deplibs= + finalize_deplibs= + alldeplibs=no + newdlfiles= + newdlprefiles= + passes="conv scan dlopen dlpreopen link" + ;; + *) passes="conv" + ;; + esac + + for pass in $passes; do + # The preopen pass in lib mode reverses $deplibs; put it back here + # so that -L comes before libs that need it for instance... + if test "$linkmode,$pass" = "lib,link"; then + ## FIXME: Find the place where the list is rebuilt in the wrong + ## order, and fix it there properly + tmp_deplibs= + for deplib in $deplibs; do + tmp_deplibs="$deplib $tmp_deplibs" + done + deplibs="$tmp_deplibs" + fi + + if test "$linkmode,$pass" = "lib,link" || + test "$linkmode,$pass" = "prog,scan"; then + libs="$deplibs" + deplibs= + fi + if test "$linkmode" = prog; then + case $pass in + dlopen) libs="$dlfiles" ;; + dlpreopen) libs="$dlprefiles" ;; + link) + libs="$deplibs %DEPLIBS%" + test "X$link_all_deplibs" != Xno && libs="$libs $dependency_libs" + ;; + esac + fi + if test "$linkmode,$pass" = "lib,dlpreopen"; then + # Collect and forward deplibs of preopened libtool libs + for lib in $dlprefiles; do + # Ignore non-libtool-libs + dependency_libs= + func_resolve_sysroot "$lib" + case $lib in + *.la) func_source "$func_resolve_sysroot_result" ;; + esac + + # Collect preopened libtool deplibs, except any this library + # has declared as weak libs + for deplib in $dependency_libs; do + func_basename "$deplib" + deplib_base=$func_basename_result + case " $weak_libs " in + *" $deplib_base "*) ;; + *) func_append deplibs " $deplib" ;; + esac + done + done + libs="$dlprefiles" + fi + if test "$pass" = dlopen; then + # Collect dlpreopened libraries + save_deplibs="$deplibs" + deplibs= + fi + + for deplib in $libs; do + lib= + found=no + case $deplib in + -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ + |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) + if test "$linkmode,$pass" = "prog,link"; then + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + else + func_append compiler_flags " $deplib" + if test "$linkmode" = lib ; then + case "$new_inherited_linker_flags " in + *" $deplib "*) ;; + * ) func_append new_inherited_linker_flags " $deplib" ;; + esac + fi + fi + continue + ;; + -l*) + if test "$linkmode" != lib && test "$linkmode" != prog; then + func_warning "\`-l' is ignored for archives/objects" + continue + fi + func_stripname '-l' '' "$deplib" + name=$func_stripname_result + if test "$linkmode" = lib; then + searchdirs="$newlib_search_path $lib_search_path $compiler_lib_search_dirs $sys_lib_search_path $shlib_search_path" + else + searchdirs="$newlib_search_path $lib_search_path $sys_lib_search_path $shlib_search_path" + fi + for searchdir in $searchdirs; do + for search_ext in .la $std_shrext .so .a; do + # Search the libtool library + lib="$searchdir/lib${name}${search_ext}" + if test -f "$lib"; then + if test "$search_ext" = ".la"; then + found=yes + else + found=no + fi + break 2 + fi + done + done + if test "$found" != yes; then + # deplib doesn't seem to be a libtool library + if test "$linkmode,$pass" = "prog,link"; then + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + else + deplibs="$deplib $deplibs" + test "$linkmode" = lib && newdependency_libs="$deplib $newdependency_libs" + fi + continue + else # deplib is a libtool library + # If $allow_libtool_libs_with_static_runtimes && $deplib is a stdlib, + # We need to do some special things here, and not later. + if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then + case " $predeps $postdeps " in + *" $deplib "*) + if func_lalib_p "$lib"; then + library_names= + old_library= + func_source "$lib" + for l in $old_library $library_names; do + ll="$l" + done + if test "X$ll" = "X$old_library" ; then # only static version available + found=no + func_dirname "$lib" "" "." + ladir="$func_dirname_result" + lib=$ladir/$old_library + if test "$linkmode,$pass" = "prog,link"; then + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + else + deplibs="$deplib $deplibs" + test "$linkmode" = lib && newdependency_libs="$deplib $newdependency_libs" + fi + continue + fi + fi + ;; + *) ;; + esac + fi + fi + ;; # -l + *.ltframework) + if test "$linkmode,$pass" = "prog,link"; then + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + else + deplibs="$deplib $deplibs" + if test "$linkmode" = lib ; then + case "$new_inherited_linker_flags " in + *" $deplib "*) ;; + * ) func_append new_inherited_linker_flags " $deplib" ;; + esac + fi + fi + continue + ;; + -L*) + case $linkmode in + lib) + deplibs="$deplib $deplibs" + test "$pass" = conv && continue + newdependency_libs="$deplib $newdependency_libs" + func_stripname '-L' '' "$deplib" + func_resolve_sysroot "$func_stripname_result" + func_append newlib_search_path " $func_resolve_sysroot_result" + ;; + prog) + if test "$pass" = conv; then + deplibs="$deplib $deplibs" + continue + fi + if test "$pass" = scan; then + deplibs="$deplib $deplibs" + else + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + fi + func_stripname '-L' '' "$deplib" + func_resolve_sysroot "$func_stripname_result" + func_append newlib_search_path " $func_resolve_sysroot_result" + ;; + *) + func_warning "\`-L' is ignored for archives/objects" + ;; + esac # linkmode + continue + ;; # -L + -R*) + if test "$pass" = link; then + func_stripname '-R' '' "$deplib" + func_resolve_sysroot "$func_stripname_result" + dir=$func_resolve_sysroot_result + # Make sure the xrpath contains only unique directories. + case "$xrpath " in + *" $dir "*) ;; + *) func_append xrpath " $dir" ;; + esac + fi + deplibs="$deplib $deplibs" + continue + ;; + *.la) + func_resolve_sysroot "$deplib" + lib=$func_resolve_sysroot_result + ;; + *.$libext) + if test "$pass" = conv; then + deplibs="$deplib $deplibs" + continue + fi + case $linkmode in + lib) + # Linking convenience modules into shared libraries is allowed, + # but linking other static libraries is non-portable. + case " $dlpreconveniencelibs " in + *" $deplib "*) ;; + *) + valid_a_lib=no + case $deplibs_check_method in + match_pattern*) + set dummy $deplibs_check_method; shift + match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` + if eval "\$ECHO \"$deplib\"" 2>/dev/null | $SED 10q \ + | $EGREP "$match_pattern_regex" > /dev/null; then + valid_a_lib=yes + fi + ;; + pass_all) + valid_a_lib=yes + ;; + esac + if test "$valid_a_lib" != yes; then + echo + $ECHO "*** Warning: Trying to link with static lib archive $deplib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have" + echo "*** because the file extensions .$libext of this argument makes me believe" + echo "*** that it is just a static archive that I should not use here." + else + echo + $ECHO "*** Warning: Linking the shared library $output against the" + $ECHO "*** static library $deplib is not portable!" + deplibs="$deplib $deplibs" + fi + ;; + esac + continue + ;; + prog) + if test "$pass" != link; then + deplibs="$deplib $deplibs" + else + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + fi + continue + ;; + esac # linkmode + ;; # *.$libext + *.lo | *.$objext) + if test "$pass" = conv; then + deplibs="$deplib $deplibs" + elif test "$linkmode" = prog; then + if test "$pass" = dlpreopen || test "$dlopen_support" != yes || test "$build_libtool_libs" = no; then + # If there is no dlopen support or we're linking statically, + # we need to preload. + func_append newdlprefiles " $deplib" + compile_deplibs="$deplib $compile_deplibs" + finalize_deplibs="$deplib $finalize_deplibs" + else + func_append newdlfiles " $deplib" + fi + fi + continue + ;; + %DEPLIBS%) + alldeplibs=yes + continue + ;; + esac # case $deplib + + if test "$found" = yes || test -f "$lib"; then : + else + func_fatal_error "cannot find the library \`$lib' or unhandled argument \`$deplib'" + fi + + # Check to see that this really is a libtool archive. + func_lalib_unsafe_p "$lib" \ + || func_fatal_error "\`$lib' is not a valid libtool archive" + + func_dirname "$lib" "" "." + ladir="$func_dirname_result" + + dlname= + dlopen= + dlpreopen= + libdir= + library_names= + old_library= + inherited_linker_flags= + # If the library was installed with an old release of libtool, + # it will not redefine variables installed, or shouldnotlink + installed=yes + shouldnotlink=no + avoidtemprpath= + + + # Read the .la file + func_source "$lib" + + # Convert "-framework foo" to "foo.ltframework" + if test -n "$inherited_linker_flags"; then + tmp_inherited_linker_flags=`$ECHO "$inherited_linker_flags" | $SED 's/-framework \([^ $]*\)/\1.ltframework/g'` + for tmp_inherited_linker_flag in $tmp_inherited_linker_flags; do + case " $new_inherited_linker_flags " in + *" $tmp_inherited_linker_flag "*) ;; + *) func_append new_inherited_linker_flags " $tmp_inherited_linker_flag";; + esac + done + fi + dependency_libs=`$ECHO " $dependency_libs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` + if test "$linkmode,$pass" = "lib,link" || + test "$linkmode,$pass" = "prog,scan" || + { test "$linkmode" != prog && test "$linkmode" != lib; }; then + test -n "$dlopen" && func_append dlfiles " $dlopen" + test -n "$dlpreopen" && func_append dlprefiles " $dlpreopen" + fi + + if test "$pass" = conv; then + # Only check for convenience libraries + deplibs="$lib $deplibs" + if test -z "$libdir"; then + if test -z "$old_library"; then + func_fatal_error "cannot find name of link library for \`$lib'" + fi + # It is a libtool convenience library, so add in its objects. + func_append convenience " $ladir/$objdir/$old_library" + func_append old_convenience " $ladir/$objdir/$old_library" + tmp_libs= + for deplib in $dependency_libs; do + deplibs="$deplib $deplibs" + if $opt_preserve_dup_deps ; then + case "$tmp_libs " in + *" $deplib "*) func_append specialdeplibs " $deplib" ;; + esac + fi + func_append tmp_libs " $deplib" + done + elif test "$linkmode" != prog && test "$linkmode" != lib; then + func_fatal_error "\`$lib' is not a convenience library" + fi + continue + fi # $pass = conv + + + # Get the name of the library we link against. + linklib= + if test -n "$old_library" && + { test "$prefer_static_libs" = yes || + test "$prefer_static_libs,$installed" = "built,no"; }; then + linklib=$old_library + else + for l in $old_library $library_names; do + linklib="$l" + done + fi + if test -z "$linklib"; then + func_fatal_error "cannot find name of link library for \`$lib'" + fi + + # This library was specified with -dlopen. + if test "$pass" = dlopen; then + if test -z "$libdir"; then + func_fatal_error "cannot -dlopen a convenience library: \`$lib'" + fi + if test -z "$dlname" || + test "$dlopen_support" != yes || + test "$build_libtool_libs" = no; then + # If there is no dlname, no dlopen support or we're linking + # statically, we need to preload. We also need to preload any + # dependent libraries so libltdl's deplib preloader doesn't + # bomb out in the load deplibs phase. + func_append dlprefiles " $lib $dependency_libs" + else + func_append newdlfiles " $lib" + fi + continue + fi # $pass = dlopen + + # We need an absolute path. + case $ladir in + [\\/]* | [A-Za-z]:[\\/]*) abs_ladir="$ladir" ;; + *) + abs_ladir=`cd "$ladir" && pwd` + if test -z "$abs_ladir"; then + func_warning "cannot determine absolute directory name of \`$ladir'" + func_warning "passing it literally to the linker, although it might fail" + abs_ladir="$ladir" + fi + ;; + esac + func_basename "$lib" + laname="$func_basename_result" + + # Find the relevant object directory and library name. + if test "X$installed" = Xyes; then + if test ! -f "$lt_sysroot$libdir/$linklib" && test -f "$abs_ladir/$linklib"; then + func_warning "library \`$lib' was moved." + dir="$ladir" + absdir="$abs_ladir" + libdir="$abs_ladir" + else + dir="$lt_sysroot$libdir" + absdir="$lt_sysroot$libdir" + fi + test "X$hardcode_automatic" = Xyes && avoidtemprpath=yes + else + if test ! -f "$ladir/$objdir/$linklib" && test -f "$abs_ladir/$linklib"; then + dir="$ladir" + absdir="$abs_ladir" + # Remove this search path later + func_append notinst_path " $abs_ladir" + else + dir="$ladir/$objdir" + absdir="$abs_ladir/$objdir" + # Remove this search path later + func_append notinst_path " $abs_ladir" + fi + fi # $installed = yes + func_stripname 'lib' '.la' "$laname" + name=$func_stripname_result + + # This library was specified with -dlpreopen. + if test "$pass" = dlpreopen; then + if test -z "$libdir" && test "$linkmode" = prog; then + func_fatal_error "only libraries may -dlpreopen a convenience library: \`$lib'" + fi + case "$host" in + # special handling for platforms with PE-DLLs. + *cygwin* | *mingw* | *cegcc* ) + # Linker will automatically link against shared library if both + # static and shared are present. Therefore, ensure we extract + # symbols from the import library if a shared library is present + # (otherwise, the dlopen module name will be incorrect). We do + # this by putting the import library name into $newdlprefiles. + # We recover the dlopen module name by 'saving' the la file + # name in a special purpose variable, and (later) extracting the + # dlname from the la file. + if test -n "$dlname"; then + func_tr_sh "$dir/$linklib" + eval "libfile_$func_tr_sh_result=\$abs_ladir/\$laname" + func_append newdlprefiles " $dir/$linklib" + else + func_append newdlprefiles " $dir/$old_library" + # Keep a list of preopened convenience libraries to check + # that they are being used correctly in the link pass. + test -z "$libdir" && \ + func_append dlpreconveniencelibs " $dir/$old_library" + fi + ;; + * ) + # Prefer using a static library (so that no silly _DYNAMIC symbols + # are required to link). + if test -n "$old_library"; then + func_append newdlprefiles " $dir/$old_library" + # Keep a list of preopened convenience libraries to check + # that they are being used correctly in the link pass. + test -z "$libdir" && \ + func_append dlpreconveniencelibs " $dir/$old_library" + # Otherwise, use the dlname, so that lt_dlopen finds it. + elif test -n "$dlname"; then + func_append newdlprefiles " $dir/$dlname" + else + func_append newdlprefiles " $dir/$linklib" + fi + ;; + esac + fi # $pass = dlpreopen + + if test -z "$libdir"; then + # Link the convenience library + if test "$linkmode" = lib; then + deplibs="$dir/$old_library $deplibs" + elif test "$linkmode,$pass" = "prog,link"; then + compile_deplibs="$dir/$old_library $compile_deplibs" + finalize_deplibs="$dir/$old_library $finalize_deplibs" + else + deplibs="$lib $deplibs" # used for prog,scan pass + fi + continue + fi + + + if test "$linkmode" = prog && test "$pass" != link; then + func_append newlib_search_path " $ladir" + deplibs="$lib $deplibs" + + linkalldeplibs=no + if test "$link_all_deplibs" != no || test -z "$library_names" || + test "$build_libtool_libs" = no; then + linkalldeplibs=yes + fi + + tmp_libs= + for deplib in $dependency_libs; do + case $deplib in + -L*) func_stripname '-L' '' "$deplib" + func_resolve_sysroot "$func_stripname_result" + func_append newlib_search_path " $func_resolve_sysroot_result" + ;; + esac + # Need to link against all dependency_libs? + if test "$linkalldeplibs" = yes; then + deplibs="$deplib $deplibs" + else + # Need to hardcode shared library paths + # or/and link against static libraries + newdependency_libs="$deplib $newdependency_libs" + fi + if $opt_preserve_dup_deps ; then + case "$tmp_libs " in + *" $deplib "*) func_append specialdeplibs " $deplib" ;; + esac + fi + func_append tmp_libs " $deplib" + done # for deplib + continue + fi # $linkmode = prog... + + if test "$linkmode,$pass" = "prog,link"; then + if test -n "$library_names" && + { { test "$prefer_static_libs" = no || + test "$prefer_static_libs,$installed" = "built,yes"; } || + test -z "$old_library"; }; then + # We need to hardcode the library path + if test -n "$shlibpath_var" && test -z "$avoidtemprpath" ; then + # Make sure the rpath contains only unique directories. + case "$temp_rpath:" in + *"$absdir:"*) ;; + *) func_append temp_rpath "$absdir:" ;; + esac + fi + + # Hardcode the library path. + # Skip directories that are in the system default run-time + # search path. + case " $sys_lib_dlsearch_path " in + *" $absdir "*) ;; + *) + case "$compile_rpath " in + *" $absdir "*) ;; + *) func_append compile_rpath " $absdir" ;; + esac + ;; + esac + case " $sys_lib_dlsearch_path " in + *" $libdir "*) ;; + *) + case "$finalize_rpath " in + *" $libdir "*) ;; + *) func_append finalize_rpath " $libdir" ;; + esac + ;; + esac + fi # $linkmode,$pass = prog,link... + + if test "$alldeplibs" = yes && + { test "$deplibs_check_method" = pass_all || + { test "$build_libtool_libs" = yes && + test -n "$library_names"; }; }; then + # We only need to search for static libraries + continue + fi + fi + + link_static=no # Whether the deplib will be linked statically + use_static_libs=$prefer_static_libs + if test "$use_static_libs" = built && test "$installed" = yes; then + use_static_libs=no + fi + if test -n "$library_names" && + { test "$use_static_libs" = no || test -z "$old_library"; }; then + case $host in + *cygwin* | *mingw* | *cegcc*) + # No point in relinking DLLs because paths are not encoded + func_append notinst_deplibs " $lib" + need_relink=no + ;; + *) + if test "$installed" = no; then + func_append notinst_deplibs " $lib" + need_relink=yes + fi + ;; + esac + # This is a shared library + + # Warn about portability, can't link against -module's on some + # systems (darwin). Don't bleat about dlopened modules though! + dlopenmodule="" + for dlpremoduletest in $dlprefiles; do + if test "X$dlpremoduletest" = "X$lib"; then + dlopenmodule="$dlpremoduletest" + break + fi + done + if test -z "$dlopenmodule" && test "$shouldnotlink" = yes && test "$pass" = link; then + echo + if test "$linkmode" = prog; then + $ECHO "*** Warning: Linking the executable $output against the loadable module" + else + $ECHO "*** Warning: Linking the shared library $output against the loadable module" + fi + $ECHO "*** $linklib is not portable!" + fi + if test "$linkmode" = lib && + test "$hardcode_into_libs" = yes; then + # Hardcode the library path. + # Skip directories that are in the system default run-time + # search path. + case " $sys_lib_dlsearch_path " in + *" $absdir "*) ;; + *) + case "$compile_rpath " in + *" $absdir "*) ;; + *) func_append compile_rpath " $absdir" ;; + esac + ;; + esac + case " $sys_lib_dlsearch_path " in + *" $libdir "*) ;; + *) + case "$finalize_rpath " in + *" $libdir "*) ;; + *) func_append finalize_rpath " $libdir" ;; + esac + ;; + esac + fi + + if test -n "$old_archive_from_expsyms_cmds"; then + # figure out the soname + set dummy $library_names + shift + realname="$1" + shift + libname=`eval "\\$ECHO \"$libname_spec\""` + # use dlname if we got it. it's perfectly good, no? + if test -n "$dlname"; then + soname="$dlname" + elif test -n "$soname_spec"; then + # bleh windows + case $host in + *cygwin* | mingw* | *cegcc*) + func_arith $current - $age + major=$func_arith_result + versuffix="-$major" + ;; + esac + eval soname=\"$soname_spec\" + else + soname="$realname" + fi + + # Make a new name for the extract_expsyms_cmds to use + soroot="$soname" + func_basename "$soroot" + soname="$func_basename_result" + func_stripname 'lib' '.dll' "$soname" + newlib=libimp-$func_stripname_result.a + + # If the library has no export list, then create one now + if test -f "$output_objdir/$soname-def"; then : + else + func_verbose "extracting exported symbol list from \`$soname'" + func_execute_cmds "$extract_expsyms_cmds" 'exit $?' + fi + + # Create $newlib + if test -f "$output_objdir/$newlib"; then :; else + func_verbose "generating import library for \`$soname'" + func_execute_cmds "$old_archive_from_expsyms_cmds" 'exit $?' + fi + # make sure the library variables are pointing to the new library + dir=$output_objdir + linklib=$newlib + fi # test -n "$old_archive_from_expsyms_cmds" + + if test "$linkmode" = prog || test "$opt_mode" != relink; then + add_shlibpath= + add_dir= + add= + lib_linked=yes + case $hardcode_action in + immediate | unsupported) + if test "$hardcode_direct" = no; then + add="$dir/$linklib" + case $host in + *-*-sco3.2v5.0.[024]*) add_dir="-L$dir" ;; + *-*-sysv4*uw2*) add_dir="-L$dir" ;; + *-*-sysv5OpenUNIX* | *-*-sysv5UnixWare7.[01].[10]* | \ + *-*-unixware7*) add_dir="-L$dir" ;; + *-*-darwin* ) + # if the lib is a (non-dlopened) module then we can not + # link against it, someone is ignoring the earlier warnings + if /usr/bin/file -L $add 2> /dev/null | + $GREP ": [^:]* bundle" >/dev/null ; then + if test "X$dlopenmodule" != "X$lib"; then + $ECHO "*** Warning: lib $linklib is a module, not a shared library" + if test -z "$old_library" ; then + echo + echo "*** And there doesn't seem to be a static archive available" + echo "*** The link will probably fail, sorry" + else + add="$dir/$old_library" + fi + elif test -n "$old_library"; then + add="$dir/$old_library" + fi + fi + esac + elif test "$hardcode_minus_L" = no; then + case $host in + *-*-sunos*) add_shlibpath="$dir" ;; + esac + add_dir="-L$dir" + add="-l$name" + elif test "$hardcode_shlibpath_var" = no; then + add_shlibpath="$dir" + add="-l$name" + else + lib_linked=no + fi + ;; + relink) + if test "$hardcode_direct" = yes && + test "$hardcode_direct_absolute" = no; then + add="$dir/$linklib" + elif test "$hardcode_minus_L" = yes; then + add_dir="-L$absdir" + # Try looking first in the location we're being installed to. + if test -n "$inst_prefix_dir"; then + case $libdir in + [\\/]*) + func_append add_dir " -L$inst_prefix_dir$libdir" + ;; + esac + fi + add="-l$name" + elif test "$hardcode_shlibpath_var" = yes; then + add_shlibpath="$dir" + add="-l$name" + else + lib_linked=no + fi + ;; + *) lib_linked=no ;; + esac + + if test "$lib_linked" != yes; then + func_fatal_configuration "unsupported hardcode properties" + fi + + if test -n "$add_shlibpath"; then + case :$compile_shlibpath: in + *":$add_shlibpath:"*) ;; + *) func_append compile_shlibpath "$add_shlibpath:" ;; + esac + fi + if test "$linkmode" = prog; then + test -n "$add_dir" && compile_deplibs="$add_dir $compile_deplibs" + test -n "$add" && compile_deplibs="$add $compile_deplibs" + else + test -n "$add_dir" && deplibs="$add_dir $deplibs" + test -n "$add" && deplibs="$add $deplibs" + if test "$hardcode_direct" != yes && + test "$hardcode_minus_L" != yes && + test "$hardcode_shlibpath_var" = yes; then + case :$finalize_shlibpath: in + *":$libdir:"*) ;; + *) func_append finalize_shlibpath "$libdir:" ;; + esac + fi + fi + fi + + if test "$linkmode" = prog || test "$opt_mode" = relink; then + add_shlibpath= + add_dir= + add= + # Finalize command for both is simple: just hardcode it. + if test "$hardcode_direct" = yes && + test "$hardcode_direct_absolute" = no; then + add="$libdir/$linklib" + elif test "$hardcode_minus_L" = yes; then + add_dir="-L$libdir" + add="-l$name" + elif test "$hardcode_shlibpath_var" = yes; then + case :$finalize_shlibpath: in + *":$libdir:"*) ;; + *) func_append finalize_shlibpath "$libdir:" ;; + esac + add="-l$name" + elif test "$hardcode_automatic" = yes; then + if test -n "$inst_prefix_dir" && + test -f "$inst_prefix_dir$libdir/$linklib" ; then + add="$inst_prefix_dir$libdir/$linklib" + else + add="$libdir/$linklib" + fi + else + # We cannot seem to hardcode it, guess we'll fake it. + add_dir="-L$libdir" + # Try looking first in the location we're being installed to. + if test -n "$inst_prefix_dir"; then + case $libdir in + [\\/]*) + func_append add_dir " -L$inst_prefix_dir$libdir" + ;; + esac + fi + add="-l$name" + fi + + if test "$linkmode" = prog; then + test -n "$add_dir" && finalize_deplibs="$add_dir $finalize_deplibs" + test -n "$add" && finalize_deplibs="$add $finalize_deplibs" + else + test -n "$add_dir" && deplibs="$add_dir $deplibs" + test -n "$add" && deplibs="$add $deplibs" + fi + fi + elif test "$linkmode" = prog; then + # Here we assume that one of hardcode_direct or hardcode_minus_L + # is not unsupported. This is valid on all known static and + # shared platforms. + if test "$hardcode_direct" != unsupported; then + test -n "$old_library" && linklib="$old_library" + compile_deplibs="$dir/$linklib $compile_deplibs" + finalize_deplibs="$dir/$linklib $finalize_deplibs" + else + compile_deplibs="-l$name -L$dir $compile_deplibs" + finalize_deplibs="-l$name -L$dir $finalize_deplibs" + fi + elif test "$build_libtool_libs" = yes; then + # Not a shared library + if test "$deplibs_check_method" != pass_all; then + # We're trying link a shared library against a static one + # but the system doesn't support it. + + # Just print a warning and add the library to dependency_libs so + # that the program can be linked against the static library. + echo + $ECHO "*** Warning: This system can not link to static lib archive $lib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have." + if test "$module" = yes; then + echo "*** But as you try to build a module library, libtool will still create " + echo "*** a static module, that should work as long as the dlopening application" + echo "*** is linked with the -dlopen flag to resolve symbols at runtime." + if test -z "$global_symbol_pipe"; then + echo + echo "*** However, this would only work if libtool was able to extract symbol" + echo "*** lists from a program, using \`nm' or equivalent, but libtool could" + echo "*** not find such a program. So, this module is probably useless." + echo "*** \`nm' from GNU binutils and a full rebuild may help." + fi + if test "$build_old_libs" = no; then + build_libtool_libs=module + build_old_libs=yes + else + build_libtool_libs=no + fi + fi + else + deplibs="$dir/$old_library $deplibs" + link_static=yes + fi + fi # link shared/static library? + + if test "$linkmode" = lib; then + if test -n "$dependency_libs" && + { test "$hardcode_into_libs" != yes || + test "$build_old_libs" = yes || + test "$link_static" = yes; }; then + # Extract -R from dependency_libs + temp_deplibs= + for libdir in $dependency_libs; do + case $libdir in + -R*) func_stripname '-R' '' "$libdir" + temp_xrpath=$func_stripname_result + case " $xrpath " in + *" $temp_xrpath "*) ;; + *) func_append xrpath " $temp_xrpath";; + esac;; + *) func_append temp_deplibs " $libdir";; + esac + done + dependency_libs="$temp_deplibs" + fi + + func_append newlib_search_path " $absdir" + # Link against this library + test "$link_static" = no && newdependency_libs="$abs_ladir/$laname $newdependency_libs" + # ... and its dependency_libs + tmp_libs= + for deplib in $dependency_libs; do + newdependency_libs="$deplib $newdependency_libs" + case $deplib in + -L*) func_stripname '-L' '' "$deplib" + func_resolve_sysroot "$func_stripname_result";; + *) func_resolve_sysroot "$deplib" ;; + esac + if $opt_preserve_dup_deps ; then + case "$tmp_libs " in + *" $func_resolve_sysroot_result "*) + func_append specialdeplibs " $func_resolve_sysroot_result" ;; + esac + fi + func_append tmp_libs " $func_resolve_sysroot_result" + done + + if test "$link_all_deplibs" != no; then + # Add the search paths of all dependency libraries + for deplib in $dependency_libs; do + path= + case $deplib in + -L*) path="$deplib" ;; + *.la) + func_resolve_sysroot "$deplib" + deplib=$func_resolve_sysroot_result + func_dirname "$deplib" "" "." + dir=$func_dirname_result + # We need an absolute path. + case $dir in + [\\/]* | [A-Za-z]:[\\/]*) absdir="$dir" ;; + *) + absdir=`cd "$dir" && pwd` + if test -z "$absdir"; then + func_warning "cannot determine absolute directory name of \`$dir'" + absdir="$dir" + fi + ;; + esac + if $GREP "^installed=no" $deplib > /dev/null; then + case $host in + *-*-darwin*) + depdepl= + eval deplibrary_names=`${SED} -n -e 's/^library_names=\(.*\)$/\1/p' $deplib` + if test -n "$deplibrary_names" ; then + for tmp in $deplibrary_names ; do + depdepl=$tmp + done + if test -f "$absdir/$objdir/$depdepl" ; then + depdepl="$absdir/$objdir/$depdepl" + darwin_install_name=`${OTOOL} -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` + if test -z "$darwin_install_name"; then + darwin_install_name=`${OTOOL64} -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` + fi + func_append compiler_flags " ${wl}-dylib_file ${wl}${darwin_install_name}:${depdepl}" + func_append linker_flags " -dylib_file ${darwin_install_name}:${depdepl}" + path= + fi + fi + ;; + *) + path="-L$absdir/$objdir" + ;; + esac + else + eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $deplib` + test -z "$libdir" && \ + func_fatal_error "\`$deplib' is not a valid libtool archive" + test "$absdir" != "$libdir" && \ + func_warning "\`$deplib' seems to be moved" + + path="-L$absdir" + fi + ;; + esac + case " $deplibs " in + *" $path "*) ;; + *) deplibs="$path $deplibs" ;; + esac + done + fi # link_all_deplibs != no + fi # linkmode = lib + done # for deplib in $libs + if test "$pass" = link; then + if test "$linkmode" = "prog"; then + compile_deplibs="$new_inherited_linker_flags $compile_deplibs" + finalize_deplibs="$new_inherited_linker_flags $finalize_deplibs" + else + compiler_flags="$compiler_flags "`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` + fi + fi + dependency_libs="$newdependency_libs" + if test "$pass" = dlpreopen; then + # Link the dlpreopened libraries before other libraries + for deplib in $save_deplibs; do + deplibs="$deplib $deplibs" + done + fi + if test "$pass" != dlopen; then + if test "$pass" != conv; then + # Make sure lib_search_path contains only unique directories. + lib_search_path= + for dir in $newlib_search_path; do + case "$lib_search_path " in + *" $dir "*) ;; + *) func_append lib_search_path " $dir" ;; + esac + done + newlib_search_path= + fi + + if test "$linkmode,$pass" != "prog,link"; then + vars="deplibs" + else + vars="compile_deplibs finalize_deplibs" + fi + for var in $vars dependency_libs; do + # Add libraries to $var in reverse order + eval tmp_libs=\"\$$var\" + new_libs= + for deplib in $tmp_libs; do + # FIXME: Pedantically, this is the right thing to do, so + # that some nasty dependency loop isn't accidentally + # broken: + #new_libs="$deplib $new_libs" + # Pragmatically, this seems to cause very few problems in + # practice: + case $deplib in + -L*) new_libs="$deplib $new_libs" ;; + -R*) ;; + *) + # And here is the reason: when a library appears more + # than once as an explicit dependence of a library, or + # is implicitly linked in more than once by the + # compiler, it is considered special, and multiple + # occurrences thereof are not removed. Compare this + # with having the same library being listed as a + # dependency of multiple other libraries: in this case, + # we know (pedantically, we assume) the library does not + # need to be listed more than once, so we keep only the + # last copy. This is not always right, but it is rare + # enough that we require users that really mean to play + # such unportable linking tricks to link the library + # using -Wl,-lname, so that libtool does not consider it + # for duplicate removal. + case " $specialdeplibs " in + *" $deplib "*) new_libs="$deplib $new_libs" ;; + *) + case " $new_libs " in + *" $deplib "*) ;; + *) new_libs="$deplib $new_libs" ;; + esac + ;; + esac + ;; + esac + done + tmp_libs= + for deplib in $new_libs; do + case $deplib in + -L*) + case " $tmp_libs " in + *" $deplib "*) ;; + *) func_append tmp_libs " $deplib" ;; + esac + ;; + *) func_append tmp_libs " $deplib" ;; + esac + done + eval $var=\"$tmp_libs\" + done # for var + fi + # Last step: remove runtime libs from dependency_libs + # (they stay in deplibs) + tmp_libs= + for i in $dependency_libs ; do + case " $predeps $postdeps $compiler_lib_search_path " in + *" $i "*) + i="" + ;; + esac + if test -n "$i" ; then + func_append tmp_libs " $i" + fi + done + dependency_libs=$tmp_libs + done # for pass + if test "$linkmode" = prog; then + dlfiles="$newdlfiles" + fi + if test "$linkmode" = prog || test "$linkmode" = lib; then + dlprefiles="$newdlprefiles" + fi + + case $linkmode in + oldlib) + if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then + func_warning "\`-dlopen' is ignored for archives" + fi + + case " $deplibs" in + *\ -l* | *\ -L*) + func_warning "\`-l' and \`-L' are ignored for archives" ;; + esac + + test -n "$rpath" && \ + func_warning "\`-rpath' is ignored for archives" + + test -n "$xrpath" && \ + func_warning "\`-R' is ignored for archives" + + test -n "$vinfo" && \ + func_warning "\`-version-info/-version-number' is ignored for archives" + + test -n "$release" && \ + func_warning "\`-release' is ignored for archives" + + test -n "$export_symbols$export_symbols_regex" && \ + func_warning "\`-export-symbols' is ignored for archives" + + # Now set the variables for building old libraries. + build_libtool_libs=no + oldlibs="$output" + func_append objs "$old_deplibs" + ;; + + lib) + # Make sure we only generate libraries of the form `libNAME.la'. + case $outputname in + lib*) + func_stripname 'lib' '.la' "$outputname" + name=$func_stripname_result + eval shared_ext=\"$shrext_cmds\" + eval libname=\"$libname_spec\" + ;; + *) + test "$module" = no && \ + func_fatal_help "libtool library \`$output' must begin with \`lib'" + + if test "$need_lib_prefix" != no; then + # Add the "lib" prefix for modules if required + func_stripname '' '.la' "$outputname" + name=$func_stripname_result + eval shared_ext=\"$shrext_cmds\" + eval libname=\"$libname_spec\" + else + func_stripname '' '.la' "$outputname" + libname=$func_stripname_result + fi + ;; + esac + + if test -n "$objs"; then + if test "$deplibs_check_method" != pass_all; then + func_fatal_error "cannot build libtool library \`$output' from non-libtool objects on this host:$objs" + else + echo + $ECHO "*** Warning: Linking the shared library $output against the non-libtool" + $ECHO "*** objects $objs is not portable!" + func_append libobjs " $objs" + fi + fi + + test "$dlself" != no && \ + func_warning "\`-dlopen self' is ignored for libtool libraries" + + set dummy $rpath + shift + test "$#" -gt 1 && \ + func_warning "ignoring multiple \`-rpath's for a libtool library" + + install_libdir="$1" + + oldlibs= + if test -z "$rpath"; then + if test "$build_libtool_libs" = yes; then + # Building a libtool convenience library. + # Some compilers have problems with a `.al' extension so + # convenience libraries should have the same extension an + # archive normally would. + oldlibs="$output_objdir/$libname.$libext $oldlibs" + build_libtool_libs=convenience + build_old_libs=yes + fi + + test -n "$vinfo" && \ + func_warning "\`-version-info/-version-number' is ignored for convenience libraries" + + test -n "$release" && \ + func_warning "\`-release' is ignored for convenience libraries" + else + + # Parse the version information argument. + save_ifs="$IFS"; IFS=':' + set dummy $vinfo 0 0 0 + shift + IFS="$save_ifs" + + test -n "$7" && \ + func_fatal_help "too many parameters to \`-version-info'" + + # convert absolute version numbers to libtool ages + # this retains compatibility with .la files and attempts + # to make the code below a bit more comprehensible + + case $vinfo_number in + yes) + number_major="$1" + number_minor="$2" + number_revision="$3" + # + # There are really only two kinds -- those that + # use the current revision as the major version + # and those that subtract age and use age as + # a minor version. But, then there is irix + # which has an extra 1 added just for fun + # + case $version_type in + # correct linux to gnu/linux during the next big refactor + darwin|linux|osf|windows|none) + func_arith $number_major + $number_minor + current=$func_arith_result + age="$number_minor" + revision="$number_revision" + ;; + freebsd-aout|freebsd-elf|qnx|sunos) + current="$number_major" + revision="$number_minor" + age="0" + ;; + irix|nonstopux) + func_arith $number_major + $number_minor + current=$func_arith_result + age="$number_minor" + revision="$number_minor" + lt_irix_increment=no + ;; + *) + func_fatal_configuration "$modename: unknown library version type \`$version_type'" + ;; + esac + ;; + no) + current="$1" + revision="$2" + age="$3" + ;; + esac + + # Check that each of the things are valid numbers. + case $current in + 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; + *) + func_error "CURRENT \`$current' must be a nonnegative integer" + func_fatal_error "\`$vinfo' is not valid version information" + ;; + esac + + case $revision in + 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; + *) + func_error "REVISION \`$revision' must be a nonnegative integer" + func_fatal_error "\`$vinfo' is not valid version information" + ;; + esac + + case $age in + 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; + *) + func_error "AGE \`$age' must be a nonnegative integer" + func_fatal_error "\`$vinfo' is not valid version information" + ;; + esac + + if test "$age" -gt "$current"; then + func_error "AGE \`$age' is greater than the current interface number \`$current'" + func_fatal_error "\`$vinfo' is not valid version information" + fi + + # Calculate the version variables. + major= + versuffix= + verstring= + case $version_type in + none) ;; + + darwin) + # Like Linux, but with the current version available in + # verstring for coding it into the library header + func_arith $current - $age + major=.$func_arith_result + versuffix="$major.$age.$revision" + # Darwin ld doesn't like 0 for these options... + func_arith $current + 1 + minor_current=$func_arith_result + xlcverstring="${wl}-compatibility_version ${wl}$minor_current ${wl}-current_version ${wl}$minor_current.$revision" + verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" + ;; + + freebsd-aout) + major=".$current" + versuffix=".$current.$revision"; + ;; + + freebsd-elf) + major=".$current" + versuffix=".$current" + ;; + + irix | nonstopux) + if test "X$lt_irix_increment" = "Xno"; then + func_arith $current - $age + else + func_arith $current - $age + 1 + fi + major=$func_arith_result + + case $version_type in + nonstopux) verstring_prefix=nonstopux ;; + *) verstring_prefix=sgi ;; + esac + verstring="$verstring_prefix$major.$revision" + + # Add in all the interfaces that we are compatible with. + loop=$revision + while test "$loop" -ne 0; do + func_arith $revision - $loop + iface=$func_arith_result + func_arith $loop - 1 + loop=$func_arith_result + verstring="$verstring_prefix$major.$iface:$verstring" + done + + # Before this point, $major must not contain `.'. + major=.$major + versuffix="$major.$revision" + ;; + + linux) # correct to gnu/linux during the next big refactor + func_arith $current - $age + major=.$func_arith_result + versuffix="$major.$age.$revision" + ;; + + osf) + func_arith $current - $age + major=.$func_arith_result + versuffix=".$current.$age.$revision" + verstring="$current.$age.$revision" + + # Add in all the interfaces that we are compatible with. + loop=$age + while test "$loop" -ne 0; do + func_arith $current - $loop + iface=$func_arith_result + func_arith $loop - 1 + loop=$func_arith_result + verstring="$verstring:${iface}.0" + done + + # Make executables depend on our current version. + func_append verstring ":${current}.0" + ;; + + qnx) + major=".$current" + versuffix=".$current" + ;; + + sunos) + major=".$current" + versuffix=".$current.$revision" + ;; + + windows) + # Use '-' rather than '.', since we only want one + # extension on DOS 8.3 filesystems. + func_arith $current - $age + major=$func_arith_result + versuffix="-$major" + ;; + + *) + func_fatal_configuration "unknown library version type \`$version_type'" + ;; + esac + + # Clear the version info if we defaulted, and they specified a release. + if test -z "$vinfo" && test -n "$release"; then + major= + case $version_type in + darwin) + # we can't check for "0.0" in archive_cmds due to quoting + # problems, so we reset it completely + verstring= + ;; + *) + verstring="0.0" + ;; + esac + if test "$need_version" = no; then + versuffix= + else + versuffix=".0.0" + fi + fi + + # Remove version info from name if versioning should be avoided + if test "$avoid_version" = yes && test "$need_version" = no; then + major= + versuffix= + verstring="" + fi + + # Check to see if the archive will have undefined symbols. + if test "$allow_undefined" = yes; then + if test "$allow_undefined_flag" = unsupported; then + func_warning "undefined symbols not allowed in $host shared libraries" + build_libtool_libs=no + build_old_libs=yes + fi + else + # Don't allow undefined symbols. + allow_undefined_flag="$no_undefined_flag" + fi + + fi + + func_generate_dlsyms "$libname" "$libname" "yes" + func_append libobjs " $symfileobj" + test "X$libobjs" = "X " && libobjs= + + if test "$opt_mode" != relink; then + # Remove our outputs, but don't remove object files since they + # may have been created when compiling PIC objects. + removelist= + tempremovelist=`$ECHO "$output_objdir/*"` + for p in $tempremovelist; do + case $p in + *.$objext | *.gcno) + ;; + $output_objdir/$outputname | $output_objdir/$libname.* | $output_objdir/${libname}${release}.*) + if test "X$precious_files_regex" != "X"; then + if $ECHO "$p" | $EGREP -e "$precious_files_regex" >/dev/null 2>&1 + then + continue + fi + fi + func_append removelist " $p" + ;; + *) ;; + esac + done + test -n "$removelist" && \ + func_show_eval "${RM}r \$removelist" + fi + + # Now set the variables for building old libraries. + if test "$build_old_libs" = yes && test "$build_libtool_libs" != convenience ; then + func_append oldlibs " $output_objdir/$libname.$libext" + + # Transform .lo files to .o files. + oldobjs="$objs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.${libext}$/d; $lo2o" | $NL2SP` + fi + + # Eliminate all temporary directories. + #for path in $notinst_path; do + # lib_search_path=`$ECHO "$lib_search_path " | $SED "s% $path % %g"` + # deplibs=`$ECHO "$deplibs " | $SED "s% -L$path % %g"` + # dependency_libs=`$ECHO "$dependency_libs " | $SED "s% -L$path % %g"` + #done + + if test -n "$xrpath"; then + # If the user specified any rpath flags, then add them. + temp_xrpath= + for libdir in $xrpath; do + func_replace_sysroot "$libdir" + func_append temp_xrpath " -R$func_replace_sysroot_result" + case "$finalize_rpath " in + *" $libdir "*) ;; + *) func_append finalize_rpath " $libdir" ;; + esac + done + if test "$hardcode_into_libs" != yes || test "$build_old_libs" = yes; then + dependency_libs="$temp_xrpath $dependency_libs" + fi + fi + + # Make sure dlfiles contains only unique files that won't be dlpreopened + old_dlfiles="$dlfiles" + dlfiles= + for lib in $old_dlfiles; do + case " $dlprefiles $dlfiles " in + *" $lib "*) ;; + *) func_append dlfiles " $lib" ;; + esac + done + + # Make sure dlprefiles contains only unique files + old_dlprefiles="$dlprefiles" + dlprefiles= + for lib in $old_dlprefiles; do + case "$dlprefiles " in + *" $lib "*) ;; + *) func_append dlprefiles " $lib" ;; + esac + done + + if test "$build_libtool_libs" = yes; then + if test -n "$rpath"; then + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-beos* | *-cegcc* | *-*-haiku*) + # these systems don't actually have a c library (as such)! + ;; + *-*-rhapsody* | *-*-darwin1.[012]) + # Rhapsody C library is in the System framework + func_append deplibs " System.ltframework" + ;; + *-*-netbsd*) + # Don't link with libc until the a.out ld.so is fixed. + ;; + *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) + # Do not include libc due to us having libc/libc_r. + ;; + *-*-sco3.2v5* | *-*-sco5v6*) + # Causes problems with __ctype + ;; + *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) + # Compiler inserts libc in the correct place for threads to work + ;; + *) + # Add libc to deplibs on all other systems if necessary. + if test "$build_libtool_need_lc" = "yes"; then + func_append deplibs " -lc" + fi + ;; + esac + fi + + # Transform deplibs into only deplibs that can be linked in shared. + name_save=$name + libname_save=$libname + release_save=$release + versuffix_save=$versuffix + major_save=$major + # I'm not sure if I'm treating the release correctly. I think + # release should show up in the -l (ie -lgmp5) so we don't want to + # add it in twice. Is that correct? + release="" + versuffix="" + major="" + newdeplibs= + droppeddeps=no + case $deplibs_check_method in + pass_all) + # Don't check for shared/static. Everything works. + # This might be a little naive. We might want to check + # whether the library exists or not. But this is on + # osf3 & osf4 and I'm not really sure... Just + # implementing what was already the behavior. + newdeplibs=$deplibs + ;; + test_compile) + # This code stresses the "libraries are programs" paradigm to its + # limits. Maybe even breaks it. We compile a program, linking it + # against the deplibs as a proxy for the library. Then we can check + # whether they linked in statically or dynamically with ldd. + $opt_dry_run || $RM conftest.c + cat > conftest.c </dev/null` + $nocaseglob + else + potential_libs=`ls $i/$libnameglob[.-]* 2>/dev/null` + fi + for potent_lib in $potential_libs; do + # Follow soft links. + if ls -lLd "$potent_lib" 2>/dev/null | + $GREP " -> " >/dev/null; then + continue + fi + # The statement above tries to avoid entering an + # endless loop below, in case of cyclic links. + # We might still enter an endless loop, since a link + # loop can be closed while we follow links, + # but so what? + potlib="$potent_lib" + while test -h "$potlib" 2>/dev/null; do + potliblink=`ls -ld $potlib | ${SED} 's/.* -> //'` + case $potliblink in + [\\/]* | [A-Za-z]:[\\/]*) potlib="$potliblink";; + *) potlib=`$ECHO "$potlib" | $SED 's,[^/]*$,,'`"$potliblink";; + esac + done + if eval $file_magic_cmd \"\$potlib\" 2>/dev/null | + $SED -e 10q | + $EGREP "$file_magic_regex" > /dev/null; then + func_append newdeplibs " $a_deplib" + a_deplib="" + break 2 + fi + done + done + fi + if test -n "$a_deplib" ; then + droppeddeps=yes + echo + $ECHO "*** Warning: linker path does not have real file for library $a_deplib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have" + echo "*** because I did check the linker path looking for a file starting" + if test -z "$potlib" ; then + $ECHO "*** with $libname but no candidates were found. (...for file magic test)" + else + $ECHO "*** with $libname and none of the candidates passed a file format test" + $ECHO "*** using a file magic. Last file checked: $potlib" + fi + fi + ;; + *) + # Add a -L argument. + func_append newdeplibs " $a_deplib" + ;; + esac + done # Gone through all deplibs. + ;; + match_pattern*) + set dummy $deplibs_check_method; shift + match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` + for a_deplib in $deplibs; do + case $a_deplib in + -l*) + func_stripname -l '' "$a_deplib" + name=$func_stripname_result + if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then + case " $predeps $postdeps " in + *" $a_deplib "*) + func_append newdeplibs " $a_deplib" + a_deplib="" + ;; + esac + fi + if test -n "$a_deplib" ; then + libname=`eval "\\$ECHO \"$libname_spec\""` + for i in $lib_search_path $sys_lib_search_path $shlib_search_path; do + potential_libs=`ls $i/$libname[.-]* 2>/dev/null` + for potent_lib in $potential_libs; do + potlib="$potent_lib" # see symlink-check above in file_magic test + if eval "\$ECHO \"$potent_lib\"" 2>/dev/null | $SED 10q | \ + $EGREP "$match_pattern_regex" > /dev/null; then + func_append newdeplibs " $a_deplib" + a_deplib="" + break 2 + fi + done + done + fi + if test -n "$a_deplib" ; then + droppeddeps=yes + echo + $ECHO "*** Warning: linker path does not have real file for library $a_deplib." + echo "*** I have the capability to make that library automatically link in when" + echo "*** you link to this library. But I can only do this if you have a" + echo "*** shared version of the library, which you do not appear to have" + echo "*** because I did check the linker path looking for a file starting" + if test -z "$potlib" ; then + $ECHO "*** with $libname but no candidates were found. (...for regex pattern test)" + else + $ECHO "*** with $libname and none of the candidates passed a file format test" + $ECHO "*** using a regex pattern. Last file checked: $potlib" + fi + fi + ;; + *) + # Add a -L argument. + func_append newdeplibs " $a_deplib" + ;; + esac + done # Gone through all deplibs. + ;; + none | unknown | *) + newdeplibs="" + tmp_deplibs=`$ECHO " $deplibs" | $SED 's/ -lc$//; s/ -[LR][^ ]*//g'` + if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then + for i in $predeps $postdeps ; do + # can't use Xsed below, because $i might contain '/' + tmp_deplibs=`$ECHO " $tmp_deplibs" | $SED "s,$i,,"` + done + fi + case $tmp_deplibs in + *[!\ \ ]*) + echo + if test "X$deplibs_check_method" = "Xnone"; then + echo "*** Warning: inter-library dependencies are not supported in this platform." + else + echo "*** Warning: inter-library dependencies are not known to be supported." + fi + echo "*** All declared inter-library dependencies are being dropped." + droppeddeps=yes + ;; + esac + ;; + esac + versuffix=$versuffix_save + major=$major_save + release=$release_save + libname=$libname_save + name=$name_save + + case $host in + *-*-rhapsody* | *-*-darwin1.[012]) + # On Rhapsody replace the C library with the System framework + newdeplibs=`$ECHO " $newdeplibs" | $SED 's/ -lc / System.ltframework /'` + ;; + esac + + if test "$droppeddeps" = yes; then + if test "$module" = yes; then + echo + echo "*** Warning: libtool could not satisfy all declared inter-library" + $ECHO "*** dependencies of module $libname. Therefore, libtool will create" + echo "*** a static module, that should work as long as the dlopening" + echo "*** application is linked with the -dlopen flag." + if test -z "$global_symbol_pipe"; then + echo + echo "*** However, this would only work if libtool was able to extract symbol" + echo "*** lists from a program, using \`nm' or equivalent, but libtool could" + echo "*** not find such a program. So, this module is probably useless." + echo "*** \`nm' from GNU binutils and a full rebuild may help." + fi + if test "$build_old_libs" = no; then + oldlibs="$output_objdir/$libname.$libext" + build_libtool_libs=module + build_old_libs=yes + else + build_libtool_libs=no + fi + else + echo "*** The inter-library dependencies that have been dropped here will be" + echo "*** automatically added whenever a program is linked with this library" + echo "*** or is declared to -dlopen it." + + if test "$allow_undefined" = no; then + echo + echo "*** Since this library must not contain undefined symbols," + echo "*** because either the platform does not support them or" + echo "*** it was explicitly requested with -no-undefined," + echo "*** libtool will only create a static version of it." + if test "$build_old_libs" = no; then + oldlibs="$output_objdir/$libname.$libext" + build_libtool_libs=module + build_old_libs=yes + else + build_libtool_libs=no + fi + fi + fi + fi + # Done checking deplibs! + deplibs=$newdeplibs + fi + # Time to change all our "foo.ltframework" stuff back to "-framework foo" + case $host in + *-*-darwin*) + newdeplibs=`$ECHO " $newdeplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` + new_inherited_linker_flags=`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` + deplibs=`$ECHO " $deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` + ;; + esac + + # move library search paths that coincide with paths to not yet + # installed libraries to the beginning of the library search list + new_libs= + for path in $notinst_path; do + case " $new_libs " in + *" -L$path/$objdir "*) ;; + *) + case " $deplibs " in + *" -L$path/$objdir "*) + func_append new_libs " -L$path/$objdir" ;; + esac + ;; + esac + done + for deplib in $deplibs; do + case $deplib in + -L*) + case " $new_libs " in + *" $deplib "*) ;; + *) func_append new_libs " $deplib" ;; + esac + ;; + *) func_append new_libs " $deplib" ;; + esac + done + deplibs="$new_libs" + + # All the library-specific variables (install_libdir is set above). + library_names= + old_library= + dlname= + + # Test again, we may have decided not to build it any more + if test "$build_libtool_libs" = yes; then + # Remove ${wl} instances when linking with ld. + # FIXME: should test the right _cmds variable. + case $archive_cmds in + *\$LD\ *) wl= ;; + esac + if test "$hardcode_into_libs" = yes; then + # Hardcode the library paths + hardcode_libdirs= + dep_rpath= + rpath="$finalize_rpath" + test "$opt_mode" != relink && rpath="$compile_rpath$rpath" + for libdir in $rpath; do + if test -n "$hardcode_libdir_flag_spec"; then + if test -n "$hardcode_libdir_separator"; then + func_replace_sysroot "$libdir" + libdir=$func_replace_sysroot_result + if test -z "$hardcode_libdirs"; then + hardcode_libdirs="$libdir" + else + # Just accumulate the unique libdirs. + case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in + *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) + ;; + *) + func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" + ;; + esac + fi + else + eval flag=\"$hardcode_libdir_flag_spec\" + func_append dep_rpath " $flag" + fi + elif test -n "$runpath_var"; then + case "$perm_rpath " in + *" $libdir "*) ;; + *) func_append perm_rpath " $libdir" ;; + esac + fi + done + # Substitute the hardcoded libdirs into the rpath. + if test -n "$hardcode_libdir_separator" && + test -n "$hardcode_libdirs"; then + libdir="$hardcode_libdirs" + eval "dep_rpath=\"$hardcode_libdir_flag_spec\"" + fi + if test -n "$runpath_var" && test -n "$perm_rpath"; then + # We should set the runpath_var. + rpath= + for dir in $perm_rpath; do + func_append rpath "$dir:" + done + eval "$runpath_var='$rpath\$$runpath_var'; export $runpath_var" + fi + test -n "$dep_rpath" && deplibs="$dep_rpath $deplibs" + fi + + shlibpath="$finalize_shlibpath" + test "$opt_mode" != relink && shlibpath="$compile_shlibpath$shlibpath" + if test -n "$shlibpath"; then + eval "$shlibpath_var='$shlibpath\$$shlibpath_var'; export $shlibpath_var" + fi + + # Get the real and link names of the library. + eval shared_ext=\"$shrext_cmds\" + eval library_names=\"$library_names_spec\" + set dummy $library_names + shift + realname="$1" + shift + + if test -n "$soname_spec"; then + eval soname=\"$soname_spec\" + else + soname="$realname" + fi + if test -z "$dlname"; then + dlname=$soname + fi + + lib="$output_objdir/$realname" + linknames= + for link + do + func_append linknames " $link" + done + + # Use standard objects if they are pic + test -z "$pic_flag" && libobjs=`$ECHO "$libobjs" | $SP2NL | $SED "$lo2o" | $NL2SP` + test "X$libobjs" = "X " && libobjs= + + delfiles= + if test -n "$export_symbols" && test -n "$include_expsyms"; then + $opt_dry_run || cp "$export_symbols" "$output_objdir/$libname.uexp" + export_symbols="$output_objdir/$libname.uexp" + func_append delfiles " $export_symbols" + fi + + orig_export_symbols= + case $host_os in + cygwin* | mingw* | cegcc*) + if test -n "$export_symbols" && test -z "$export_symbols_regex"; then + # exporting using user supplied symfile + if test "x`$SED 1q $export_symbols`" != xEXPORTS; then + # and it's NOT already a .def file. Must figure out + # which of the given symbols are data symbols and tag + # them as such. So, trigger use of export_symbols_cmds. + # export_symbols gets reassigned inside the "prepare + # the list of exported symbols" if statement, so the + # include_expsyms logic still works. + orig_export_symbols="$export_symbols" + export_symbols= + always_export_symbols=yes + fi + fi + ;; + esac + + # Prepare the list of exported symbols + if test -z "$export_symbols"; then + if test "$always_export_symbols" = yes || test -n "$export_symbols_regex"; then + func_verbose "generating symbol list for \`$libname.la'" + export_symbols="$output_objdir/$libname.exp" + $opt_dry_run || $RM $export_symbols + cmds=$export_symbols_cmds + save_ifs="$IFS"; IFS='~' + for cmd1 in $cmds; do + IFS="$save_ifs" + # Take the normal branch if the nm_file_list_spec branch + # doesn't work or if tool conversion is not needed. + case $nm_file_list_spec~$to_tool_file_cmd in + *~func_convert_file_noop | *~func_convert_file_msys_to_w32 | ~*) + try_normal_branch=yes + eval cmd=\"$cmd1\" + func_len " $cmd" + len=$func_len_result + ;; + *) + try_normal_branch=no + ;; + esac + if test "$try_normal_branch" = yes \ + && { test "$len" -lt "$max_cmd_len" \ + || test "$max_cmd_len" -le -1; } + then + func_show_eval "$cmd" 'exit $?' + skipped_export=false + elif test -n "$nm_file_list_spec"; then + func_basename "$output" + output_la=$func_basename_result + save_libobjs=$libobjs + save_output=$output + output=${output_objdir}/${output_la}.nm + func_to_tool_file "$output" + libobjs=$nm_file_list_spec$func_to_tool_file_result + func_append delfiles " $output" + func_verbose "creating $NM input file list: $output" + for obj in $save_libobjs; do + func_to_tool_file "$obj" + $ECHO "$func_to_tool_file_result" + done > "$output" + eval cmd=\"$cmd1\" + func_show_eval "$cmd" 'exit $?' + output=$save_output + libobjs=$save_libobjs + skipped_export=false + else + # The command line is too long to execute in one step. + func_verbose "using reloadable object file for export list..." + skipped_export=: + # Break out early, otherwise skipped_export may be + # set to false by a later but shorter cmd. + break + fi + done + IFS="$save_ifs" + if test -n "$export_symbols_regex" && test "X$skipped_export" != "X:"; then + func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' + func_show_eval '$MV "${export_symbols}T" "$export_symbols"' + fi + fi + fi + + if test -n "$export_symbols" && test -n "$include_expsyms"; then + tmp_export_symbols="$export_symbols" + test -n "$orig_export_symbols" && tmp_export_symbols="$orig_export_symbols" + $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' + fi + + if test "X$skipped_export" != "X:" && test -n "$orig_export_symbols"; then + # The given exports_symbols file has to be filtered, so filter it. + func_verbose "filter symbol list for \`$libname.la' to tag DATA exports" + # FIXME: $output_objdir/$libname.filter potentially contains lots of + # 's' commands which not all seds can handle. GNU sed should be fine + # though. Also, the filter scales superlinearly with the number of + # global variables. join(1) would be nice here, but unfortunately + # isn't a blessed tool. + $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter + func_append delfiles " $export_symbols $output_objdir/$libname.filter" + export_symbols=$output_objdir/$libname.def + $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols + fi + + tmp_deplibs= + for test_deplib in $deplibs; do + case " $convenience " in + *" $test_deplib "*) ;; + *) + func_append tmp_deplibs " $test_deplib" + ;; + esac + done + deplibs="$tmp_deplibs" + + if test -n "$convenience"; then + if test -n "$whole_archive_flag_spec" && + test "$compiler_needs_object" = yes && + test -z "$libobjs"; then + # extract the archives, so we have objects to list. + # TODO: could optimize this to just extract one archive. + whole_archive_flag_spec= + fi + if test -n "$whole_archive_flag_spec"; then + save_libobjs=$libobjs + eval libobjs=\"\$libobjs $whole_archive_flag_spec\" + test "X$libobjs" = "X " && libobjs= + else + gentop="$output_objdir/${outputname}x" + func_append generated " $gentop" + + func_extract_archives $gentop $convenience + func_append libobjs " $func_extract_archives_result" + test "X$libobjs" = "X " && libobjs= + fi + fi + + if test "$thread_safe" = yes && test -n "$thread_safe_flag_spec"; then + eval flag=\"$thread_safe_flag_spec\" + func_append linker_flags " $flag" + fi + + # Make a backup of the uninstalled library when relinking + if test "$opt_mode" = relink; then + $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}U && $MV $realname ${realname}U)' || exit $? + fi + + # Do each of the archive commands. + if test "$module" = yes && test -n "$module_cmds" ; then + if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then + eval test_cmds=\"$module_expsym_cmds\" + cmds=$module_expsym_cmds + else + eval test_cmds=\"$module_cmds\" + cmds=$module_cmds + fi + else + if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then + eval test_cmds=\"$archive_expsym_cmds\" + cmds=$archive_expsym_cmds + else + eval test_cmds=\"$archive_cmds\" + cmds=$archive_cmds + fi + fi + + if test "X$skipped_export" != "X:" && + func_len " $test_cmds" && + len=$func_len_result && + test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then + : + else + # The command line is too long to link in one step, link piecewise + # or, if using GNU ld and skipped_export is not :, use a linker + # script. + + # Save the value of $output and $libobjs because we want to + # use them later. If we have whole_archive_flag_spec, we + # want to use save_libobjs as it was before + # whole_archive_flag_spec was expanded, because we can't + # assume the linker understands whole_archive_flag_spec. + # This may have to be revisited, in case too many + # convenience libraries get linked in and end up exceeding + # the spec. + if test -z "$convenience" || test -z "$whole_archive_flag_spec"; then + save_libobjs=$libobjs + fi + save_output=$output + func_basename "$output" + output_la=$func_basename_result + + # Clear the reloadable object creation command queue and + # initialize k to one. + test_cmds= + concat_cmds= + objlist= + last_robj= + k=1 + + if test -n "$save_libobjs" && test "X$skipped_export" != "X:" && test "$with_gnu_ld" = yes; then + output=${output_objdir}/${output_la}.lnkscript + func_verbose "creating GNU ld script: $output" + echo 'INPUT (' > $output + for obj in $save_libobjs + do + func_to_tool_file "$obj" + $ECHO "$func_to_tool_file_result" >> $output + done + echo ')' >> $output + func_append delfiles " $output" + func_to_tool_file "$output" + output=$func_to_tool_file_result + elif test -n "$save_libobjs" && test "X$skipped_export" != "X:" && test "X$file_list_spec" != X; then + output=${output_objdir}/${output_la}.lnk + func_verbose "creating linker input file list: $output" + : > $output + set x $save_libobjs + shift + firstobj= + if test "$compiler_needs_object" = yes; then + firstobj="$1 " + shift + fi + for obj + do + func_to_tool_file "$obj" + $ECHO "$func_to_tool_file_result" >> $output + done + func_append delfiles " $output" + func_to_tool_file "$output" + output=$firstobj\"$file_list_spec$func_to_tool_file_result\" + else + if test -n "$save_libobjs"; then + func_verbose "creating reloadable object files..." + output=$output_objdir/$output_la-${k}.$objext + eval test_cmds=\"$reload_cmds\" + func_len " $test_cmds" + len0=$func_len_result + len=$len0 + + # Loop over the list of objects to be linked. + for obj in $save_libobjs + do + func_len " $obj" + func_arith $len + $func_len_result + len=$func_arith_result + if test "X$objlist" = X || + test "$len" -lt "$max_cmd_len"; then + func_append objlist " $obj" + else + # The command $test_cmds is almost too long, add a + # command to the queue. + if test "$k" -eq 1 ; then + # The first file doesn't have a previous command to add. + reload_objs=$objlist + eval concat_cmds=\"$reload_cmds\" + else + # All subsequent reloadable object files will link in + # the last one created. + reload_objs="$objlist $last_robj" + eval concat_cmds=\"\$concat_cmds~$reload_cmds~\$RM $last_robj\" + fi + last_robj=$output_objdir/$output_la-${k}.$objext + func_arith $k + 1 + k=$func_arith_result + output=$output_objdir/$output_la-${k}.$objext + objlist=" $obj" + func_len " $last_robj" + func_arith $len0 + $func_len_result + len=$func_arith_result + fi + done + # Handle the remaining objects by creating one last + # reloadable object file. All subsequent reloadable object + # files will link in the last one created. + test -z "$concat_cmds" || concat_cmds=$concat_cmds~ + reload_objs="$objlist $last_robj" + eval concat_cmds=\"\${concat_cmds}$reload_cmds\" + if test -n "$last_robj"; then + eval concat_cmds=\"\${concat_cmds}~\$RM $last_robj\" + fi + func_append delfiles " $output" + + else + output= + fi + + if ${skipped_export-false}; then + func_verbose "generating symbol list for \`$libname.la'" + export_symbols="$output_objdir/$libname.exp" + $opt_dry_run || $RM $export_symbols + libobjs=$output + # Append the command to create the export file. + test -z "$concat_cmds" || concat_cmds=$concat_cmds~ + eval concat_cmds=\"\$concat_cmds$export_symbols_cmds\" + if test -n "$last_robj"; then + eval concat_cmds=\"\$concat_cmds~\$RM $last_robj\" + fi + fi + + test -n "$save_libobjs" && + func_verbose "creating a temporary reloadable object file: $output" + + # Loop through the commands generated above and execute them. + save_ifs="$IFS"; IFS='~' + for cmd in $concat_cmds; do + IFS="$save_ifs" + $opt_silent || { + func_quote_for_expand "$cmd" + eval "func_echo $func_quote_for_expand_result" + } + $opt_dry_run || eval "$cmd" || { + lt_exit=$? + + # Restore the uninstalled library and exit + if test "$opt_mode" = relink; then + ( cd "$output_objdir" && \ + $RM "${realname}T" && \ + $MV "${realname}U" "$realname" ) + fi + + exit $lt_exit + } + done + IFS="$save_ifs" + + if test -n "$export_symbols_regex" && ${skipped_export-false}; then + func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' + func_show_eval '$MV "${export_symbols}T" "$export_symbols"' + fi + fi + + if ${skipped_export-false}; then + if test -n "$export_symbols" && test -n "$include_expsyms"; then + tmp_export_symbols="$export_symbols" + test -n "$orig_export_symbols" && tmp_export_symbols="$orig_export_symbols" + $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' + fi + + if test -n "$orig_export_symbols"; then + # The given exports_symbols file has to be filtered, so filter it. + func_verbose "filter symbol list for \`$libname.la' to tag DATA exports" + # FIXME: $output_objdir/$libname.filter potentially contains lots of + # 's' commands which not all seds can handle. GNU sed should be fine + # though. Also, the filter scales superlinearly with the number of + # global variables. join(1) would be nice here, but unfortunately + # isn't a blessed tool. + $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter + func_append delfiles " $export_symbols $output_objdir/$libname.filter" + export_symbols=$output_objdir/$libname.def + $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols + fi + fi + + libobjs=$output + # Restore the value of output. + output=$save_output + + if test -n "$convenience" && test -n "$whole_archive_flag_spec"; then + eval libobjs=\"\$libobjs $whole_archive_flag_spec\" + test "X$libobjs" = "X " && libobjs= + fi + # Expand the library linking commands again to reset the + # value of $libobjs for piecewise linking. + + # Do each of the archive commands. + if test "$module" = yes && test -n "$module_cmds" ; then + if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then + cmds=$module_expsym_cmds + else + cmds=$module_cmds + fi + else + if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then + cmds=$archive_expsym_cmds + else + cmds=$archive_cmds + fi + fi + fi + + if test -n "$delfiles"; then + # Append the command to remove temporary files to $cmds. + eval cmds=\"\$cmds~\$RM $delfiles\" + fi + + # Add any objects from preloaded convenience libraries + if test -n "$dlprefiles"; then + gentop="$output_objdir/${outputname}x" + func_append generated " $gentop" + + func_extract_archives $gentop $dlprefiles + func_append libobjs " $func_extract_archives_result" + test "X$libobjs" = "X " && libobjs= + fi + + save_ifs="$IFS"; IFS='~' + for cmd in $cmds; do + IFS="$save_ifs" + eval cmd=\"$cmd\" + $opt_silent || { + func_quote_for_expand "$cmd" + eval "func_echo $func_quote_for_expand_result" + } + $opt_dry_run || eval "$cmd" || { + lt_exit=$? + + # Restore the uninstalled library and exit + if test "$opt_mode" = relink; then + ( cd "$output_objdir" && \ + $RM "${realname}T" && \ + $MV "${realname}U" "$realname" ) + fi + + exit $lt_exit + } + done + IFS="$save_ifs" + + # Restore the uninstalled library and exit + if test "$opt_mode" = relink; then + $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}T && $MV $realname ${realname}T && $MV ${realname}U $realname)' || exit $? + + if test -n "$convenience"; then + if test -z "$whole_archive_flag_spec"; then + func_show_eval '${RM}r "$gentop"' + fi + fi + + exit $EXIT_SUCCESS + fi + + # Create links to the real library. + for linkname in $linknames; do + if test "$realname" != "$linkname"; then + func_show_eval '(cd "$output_objdir" && $RM "$linkname" && $LN_S "$realname" "$linkname")' 'exit $?' + fi + done + + # If -module or -export-dynamic was specified, set the dlname. + if test "$module" = yes || test "$export_dynamic" = yes; then + # On all known operating systems, these are identical. + dlname="$soname" + fi + fi + ;; + + obj) + if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then + func_warning "\`-dlopen' is ignored for objects" + fi + + case " $deplibs" in + *\ -l* | *\ -L*) + func_warning "\`-l' and \`-L' are ignored for objects" ;; + esac + + test -n "$rpath" && \ + func_warning "\`-rpath' is ignored for objects" + + test -n "$xrpath" && \ + func_warning "\`-R' is ignored for objects" + + test -n "$vinfo" && \ + func_warning "\`-version-info' is ignored for objects" + + test -n "$release" && \ + func_warning "\`-release' is ignored for objects" + + case $output in + *.lo) + test -n "$objs$old_deplibs" && \ + func_fatal_error "cannot build library object \`$output' from non-libtool objects" + + libobj=$output + func_lo2o "$libobj" + obj=$func_lo2o_result + ;; + *) + libobj= + obj="$output" + ;; + esac + + # Delete the old objects. + $opt_dry_run || $RM $obj $libobj + + # Objects from convenience libraries. This assumes + # single-version convenience libraries. Whenever we create + # different ones for PIC/non-PIC, this we'll have to duplicate + # the extraction. + reload_conv_objs= + gentop= + # reload_cmds runs $LD directly, so let us get rid of + # -Wl from whole_archive_flag_spec and hope we can get by with + # turning comma into space.. + wl= + + if test -n "$convenience"; then + if test -n "$whole_archive_flag_spec"; then + eval tmp_whole_archive_flags=\"$whole_archive_flag_spec\" + reload_conv_objs=$reload_objs\ `$ECHO "$tmp_whole_archive_flags" | $SED 's|,| |g'` + else + gentop="$output_objdir/${obj}x" + func_append generated " $gentop" + + func_extract_archives $gentop $convenience + reload_conv_objs="$reload_objs $func_extract_archives_result" + fi + fi + + # If we're not building shared, we need to use non_pic_objs + test "$build_libtool_libs" != yes && libobjs="$non_pic_objects" + + # Create the old-style object. + reload_objs="$objs$old_deplibs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.${libext}$/d; /\.lib$/d; $lo2o" | $NL2SP`" $reload_conv_objs" ### testsuite: skip nested quoting test + + output="$obj" + func_execute_cmds "$reload_cmds" 'exit $?' + + # Exit if we aren't doing a library object file. + if test -z "$libobj"; then + if test -n "$gentop"; then + func_show_eval '${RM}r "$gentop"' + fi + + exit $EXIT_SUCCESS + fi + + if test "$build_libtool_libs" != yes; then + if test -n "$gentop"; then + func_show_eval '${RM}r "$gentop"' + fi + + # Create an invalid libtool object if no PIC, so that we don't + # accidentally link it into a program. + # $show "echo timestamp > $libobj" + # $opt_dry_run || eval "echo timestamp > $libobj" || exit $? + exit $EXIT_SUCCESS + fi + + if test -n "$pic_flag" || test "$pic_mode" != default; then + # Only do commands if we really have different PIC objects. + reload_objs="$libobjs $reload_conv_objs" + output="$libobj" + func_execute_cmds "$reload_cmds" 'exit $?' + fi + + if test -n "$gentop"; then + func_show_eval '${RM}r "$gentop"' + fi + + exit $EXIT_SUCCESS + ;; + + prog) + case $host in + *cygwin*) func_stripname '' '.exe' "$output" + output=$func_stripname_result.exe;; + esac + test -n "$vinfo" && \ + func_warning "\`-version-info' is ignored for programs" + + test -n "$release" && \ + func_warning "\`-release' is ignored for programs" + + test "$preload" = yes \ + && test "$dlopen_support" = unknown \ + && test "$dlopen_self" = unknown \ + && test "$dlopen_self_static" = unknown && \ + func_warning "\`LT_INIT([dlopen])' not used. Assuming no dlopen support." + + case $host in + *-*-rhapsody* | *-*-darwin1.[012]) + # On Rhapsody replace the C library is the System framework + compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's/ -lc / System.ltframework /'` + finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's/ -lc / System.ltframework /'` + ;; + esac + + case $host in + *-*-darwin*) + # Don't allow lazy linking, it breaks C++ global constructors + # But is supposedly fixed on 10.4 or later (yay!). + if test "$tagname" = CXX ; then + case ${MACOSX_DEPLOYMENT_TARGET-10.0} in + 10.[0123]) + func_append compile_command " ${wl}-bind_at_load" + func_append finalize_command " ${wl}-bind_at_load" + ;; + esac + fi + # Time to change all our "foo.ltframework" stuff back to "-framework foo" + compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` + finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` + ;; + esac + + + # move library search paths that coincide with paths to not yet + # installed libraries to the beginning of the library search list + new_libs= + for path in $notinst_path; do + case " $new_libs " in + *" -L$path/$objdir "*) ;; + *) + case " $compile_deplibs " in + *" -L$path/$objdir "*) + func_append new_libs " -L$path/$objdir" ;; + esac + ;; + esac + done + for deplib in $compile_deplibs; do + case $deplib in + -L*) + case " $new_libs " in + *" $deplib "*) ;; + *) func_append new_libs " $deplib" ;; + esac + ;; + *) func_append new_libs " $deplib" ;; + esac + done + compile_deplibs="$new_libs" + + + func_append compile_command " $compile_deplibs" + func_append finalize_command " $finalize_deplibs" + + if test -n "$rpath$xrpath"; then + # If the user specified any rpath flags, then add them. + for libdir in $rpath $xrpath; do + # This is the magic to use -rpath. + case "$finalize_rpath " in + *" $libdir "*) ;; + *) func_append finalize_rpath " $libdir" ;; + esac + done + fi + + # Now hardcode the library paths + rpath= + hardcode_libdirs= + for libdir in $compile_rpath $finalize_rpath; do + if test -n "$hardcode_libdir_flag_spec"; then + if test -n "$hardcode_libdir_separator"; then + if test -z "$hardcode_libdirs"; then + hardcode_libdirs="$libdir" + else + # Just accumulate the unique libdirs. + case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in + *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) + ;; + *) + func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" + ;; + esac + fi + else + eval flag=\"$hardcode_libdir_flag_spec\" + func_append rpath " $flag" + fi + elif test -n "$runpath_var"; then + case "$perm_rpath " in + *" $libdir "*) ;; + *) func_append perm_rpath " $libdir" ;; + esac + fi + case $host in + *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) + testbindir=`${ECHO} "$libdir" | ${SED} -e 's*/lib$*/bin*'` + case :$dllsearchpath: in + *":$libdir:"*) ;; + ::) dllsearchpath=$libdir;; + *) func_append dllsearchpath ":$libdir";; + esac + case :$dllsearchpath: in + *":$testbindir:"*) ;; + ::) dllsearchpath=$testbindir;; + *) func_append dllsearchpath ":$testbindir";; + esac + ;; + esac + done + # Substitute the hardcoded libdirs into the rpath. + if test -n "$hardcode_libdir_separator" && + test -n "$hardcode_libdirs"; then + libdir="$hardcode_libdirs" + eval rpath=\" $hardcode_libdir_flag_spec\" + fi + compile_rpath="$rpath" + + rpath= + hardcode_libdirs= + for libdir in $finalize_rpath; do + if test -n "$hardcode_libdir_flag_spec"; then + if test -n "$hardcode_libdir_separator"; then + if test -z "$hardcode_libdirs"; then + hardcode_libdirs="$libdir" + else + # Just accumulate the unique libdirs. + case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in + *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) + ;; + *) + func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" + ;; + esac + fi + else + eval flag=\"$hardcode_libdir_flag_spec\" + func_append rpath " $flag" + fi + elif test -n "$runpath_var"; then + case "$finalize_perm_rpath " in + *" $libdir "*) ;; + *) func_append finalize_perm_rpath " $libdir" ;; + esac + fi + done + # Substitute the hardcoded libdirs into the rpath. + if test -n "$hardcode_libdir_separator" && + test -n "$hardcode_libdirs"; then + libdir="$hardcode_libdirs" + eval rpath=\" $hardcode_libdir_flag_spec\" + fi + finalize_rpath="$rpath" + + if test -n "$libobjs" && test "$build_old_libs" = yes; then + # Transform all the library objects into standard objects. + compile_command=`$ECHO "$compile_command" | $SP2NL | $SED "$lo2o" | $NL2SP` + finalize_command=`$ECHO "$finalize_command" | $SP2NL | $SED "$lo2o" | $NL2SP` + fi + + func_generate_dlsyms "$outputname" "@PROGRAM@" "no" + + # template prelinking step + if test -n "$prelink_cmds"; then + func_execute_cmds "$prelink_cmds" 'exit $?' + fi + + wrappers_required=yes + case $host in + *cegcc* | *mingw32ce*) + # Disable wrappers for cegcc and mingw32ce hosts, we are cross compiling anyway. + wrappers_required=no + ;; + *cygwin* | *mingw* ) + if test "$build_libtool_libs" != yes; then + wrappers_required=no + fi + ;; + *) + if test "$need_relink" = no || test "$build_libtool_libs" != yes; then + wrappers_required=no + fi + ;; + esac + if test "$wrappers_required" = no; then + # Replace the output file specification. + compile_command=`$ECHO "$compile_command" | $SED 's%@OUTPUT@%'"$output"'%g'` + link_command="$compile_command$compile_rpath" + + # We have no uninstalled library dependencies, so finalize right now. + exit_status=0 + func_show_eval "$link_command" 'exit_status=$?' + + if test -n "$postlink_cmds"; then + func_to_tool_file "$output" + postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` + func_execute_cmds "$postlink_cmds" 'exit $?' + fi + + # Delete the generated files. + if test -f "$output_objdir/${outputname}S.${objext}"; then + func_show_eval '$RM "$output_objdir/${outputname}S.${objext}"' + fi + + exit $exit_status + fi + + if test -n "$compile_shlibpath$finalize_shlibpath"; then + compile_command="$shlibpath_var=\"$compile_shlibpath$finalize_shlibpath\$$shlibpath_var\" $compile_command" + fi + if test -n "$finalize_shlibpath"; then + finalize_command="$shlibpath_var=\"$finalize_shlibpath\$$shlibpath_var\" $finalize_command" + fi + + compile_var= + finalize_var= + if test -n "$runpath_var"; then + if test -n "$perm_rpath"; then + # We should set the runpath_var. + rpath= + for dir in $perm_rpath; do + func_append rpath "$dir:" + done + compile_var="$runpath_var=\"$rpath\$$runpath_var\" " + fi + if test -n "$finalize_perm_rpath"; then + # We should set the runpath_var. + rpath= + for dir in $finalize_perm_rpath; do + func_append rpath "$dir:" + done + finalize_var="$runpath_var=\"$rpath\$$runpath_var\" " + fi + fi + + if test "$no_install" = yes; then + # We don't need to create a wrapper script. + link_command="$compile_var$compile_command$compile_rpath" + # Replace the output file specification. + link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output"'%g'` + # Delete the old output file. + $opt_dry_run || $RM $output + # Link the executable and exit + func_show_eval "$link_command" 'exit $?' + + if test -n "$postlink_cmds"; then + func_to_tool_file "$output" + postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` + func_execute_cmds "$postlink_cmds" 'exit $?' + fi + + exit $EXIT_SUCCESS + fi + + if test "$hardcode_action" = relink; then + # Fast installation is not supported + link_command="$compile_var$compile_command$compile_rpath" + relink_command="$finalize_var$finalize_command$finalize_rpath" + + func_warning "this platform does not like uninstalled shared libraries" + func_warning "\`$output' will be relinked during installation" + else + if test "$fast_install" != no; then + link_command="$finalize_var$compile_command$finalize_rpath" + if test "$fast_install" = yes; then + relink_command=`$ECHO "$compile_var$compile_command$compile_rpath" | $SED 's%@OUTPUT@%\$progdir/\$file%g'` + else + # fast_install is set to needless + relink_command= + fi + else + link_command="$compile_var$compile_command$compile_rpath" + relink_command="$finalize_var$finalize_command$finalize_rpath" + fi + fi + + # Replace the output file specification. + link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output_objdir/$outputname"'%g'` + + # Delete the old output files. + $opt_dry_run || $RM $output $output_objdir/$outputname $output_objdir/lt-$outputname + + func_show_eval "$link_command" 'exit $?' + + if test -n "$postlink_cmds"; then + func_to_tool_file "$output_objdir/$outputname" + postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output_objdir/$outputname"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` + func_execute_cmds "$postlink_cmds" 'exit $?' + fi + + # Now create the wrapper script. + func_verbose "creating $output" + + # Quote the relink command for shipping. + if test -n "$relink_command"; then + # Preserve any variables that may affect compiler behavior + for var in $variables_saved_for_relink; do + if eval test -z \"\${$var+set}\"; then + relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" + elif eval var_value=\$$var; test -z "$var_value"; then + relink_command="$var=; export $var; $relink_command" + else + func_quote_for_eval "$var_value" + relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" + fi + done + relink_command="(cd `pwd`; $relink_command)" + relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` + fi + + # Only actually do things if not in dry run mode. + $opt_dry_run || { + # win32 will think the script is a binary if it has + # a .exe suffix, so we strip it off here. + case $output in + *.exe) func_stripname '' '.exe' "$output" + output=$func_stripname_result ;; + esac + # test for cygwin because mv fails w/o .exe extensions + case $host in + *cygwin*) + exeext=.exe + func_stripname '' '.exe' "$outputname" + outputname=$func_stripname_result ;; + *) exeext= ;; + esac + case $host in + *cygwin* | *mingw* ) + func_dirname_and_basename "$output" "" "." + output_name=$func_basename_result + output_path=$func_dirname_result + cwrappersource="$output_path/$objdir/lt-$output_name.c" + cwrapper="$output_path/$output_name.exe" + $RM $cwrappersource $cwrapper + trap "$RM $cwrappersource $cwrapper; exit $EXIT_FAILURE" 1 2 15 + + func_emit_cwrapperexe_src > $cwrappersource + + # The wrapper executable is built using the $host compiler, + # because it contains $host paths and files. If cross- + # compiling, it, like the target executable, must be + # executed on the $host or under an emulation environment. + $opt_dry_run || { + $LTCC $LTCFLAGS -o $cwrapper $cwrappersource + $STRIP $cwrapper + } + + # Now, create the wrapper script for func_source use: + func_ltwrapper_scriptname $cwrapper + $RM $func_ltwrapper_scriptname_result + trap "$RM $func_ltwrapper_scriptname_result; exit $EXIT_FAILURE" 1 2 15 + $opt_dry_run || { + # note: this script will not be executed, so do not chmod. + if test "x$build" = "x$host" ; then + $cwrapper --lt-dump-script > $func_ltwrapper_scriptname_result + else + func_emit_wrapper no > $func_ltwrapper_scriptname_result + fi + } + ;; + * ) + $RM $output + trap "$RM $output; exit $EXIT_FAILURE" 1 2 15 + + func_emit_wrapper no > $output + chmod +x $output + ;; + esac + } + exit $EXIT_SUCCESS + ;; + esac + + # See if we need to build an old-fashioned archive. + for oldlib in $oldlibs; do + + if test "$build_libtool_libs" = convenience; then + oldobjs="$libobjs_save $symfileobj" + addlibs="$convenience" + build_libtool_libs=no + else + if test "$build_libtool_libs" = module; then + oldobjs="$libobjs_save" + build_libtool_libs=no + else + oldobjs="$old_deplibs $non_pic_objects" + if test "$preload" = yes && test -f "$symfileobj"; then + func_append oldobjs " $symfileobj" + fi + fi + addlibs="$old_convenience" + fi + + if test -n "$addlibs"; then + gentop="$output_objdir/${outputname}x" + func_append generated " $gentop" + + func_extract_archives $gentop $addlibs + func_append oldobjs " $func_extract_archives_result" + fi + + # Do each command in the archive commands. + if test -n "$old_archive_from_new_cmds" && test "$build_libtool_libs" = yes; then + cmds=$old_archive_from_new_cmds + else + + # Add any objects from preloaded convenience libraries + if test -n "$dlprefiles"; then + gentop="$output_objdir/${outputname}x" + func_append generated " $gentop" + + func_extract_archives $gentop $dlprefiles + func_append oldobjs " $func_extract_archives_result" + fi + + # POSIX demands no paths to be encoded in archives. We have + # to avoid creating archives with duplicate basenames if we + # might have to extract them afterwards, e.g., when creating a + # static archive out of a convenience library, or when linking + # the entirety of a libtool archive into another (currently + # not supported by libtool). + if (for obj in $oldobjs + do + func_basename "$obj" + $ECHO "$func_basename_result" + done | sort | sort -uc >/dev/null 2>&1); then + : + else + echo "copying selected object files to avoid basename conflicts..." + gentop="$output_objdir/${outputname}x" + func_append generated " $gentop" + func_mkdir_p "$gentop" + save_oldobjs=$oldobjs + oldobjs= + counter=1 + for obj in $save_oldobjs + do + func_basename "$obj" + objbase="$func_basename_result" + case " $oldobjs " in + " ") oldobjs=$obj ;; + *[\ /]"$objbase "*) + while :; do + # Make sure we don't pick an alternate name that also + # overlaps. + newobj=lt$counter-$objbase + func_arith $counter + 1 + counter=$func_arith_result + case " $oldobjs " in + *[\ /]"$newobj "*) ;; + *) if test ! -f "$gentop/$newobj"; then break; fi ;; + esac + done + func_show_eval "ln $obj $gentop/$newobj || cp $obj $gentop/$newobj" + func_append oldobjs " $gentop/$newobj" + ;; + *) func_append oldobjs " $obj" ;; + esac + done + fi + func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 + tool_oldlib=$func_to_tool_file_result + eval cmds=\"$old_archive_cmds\" + + func_len " $cmds" + len=$func_len_result + if test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then + cmds=$old_archive_cmds + elif test -n "$archiver_list_spec"; then + func_verbose "using command file archive linking..." + for obj in $oldobjs + do + func_to_tool_file "$obj" + $ECHO "$func_to_tool_file_result" + done > $output_objdir/$libname.libcmd + func_to_tool_file "$output_objdir/$libname.libcmd" + oldobjs=" $archiver_list_spec$func_to_tool_file_result" + cmds=$old_archive_cmds + else + # the command line is too long to link in one step, link in parts + func_verbose "using piecewise archive linking..." + save_RANLIB=$RANLIB + RANLIB=: + objlist= + concat_cmds= + save_oldobjs=$oldobjs + oldobjs= + # Is there a better way of finding the last object in the list? + for obj in $save_oldobjs + do + last_oldobj=$obj + done + eval test_cmds=\"$old_archive_cmds\" + func_len " $test_cmds" + len0=$func_len_result + len=$len0 + for obj in $save_oldobjs + do + func_len " $obj" + func_arith $len + $func_len_result + len=$func_arith_result + func_append objlist " $obj" + if test "$len" -lt "$max_cmd_len"; then + : + else + # the above command should be used before it gets too long + oldobjs=$objlist + if test "$obj" = "$last_oldobj" ; then + RANLIB=$save_RANLIB + fi + test -z "$concat_cmds" || concat_cmds=$concat_cmds~ + eval concat_cmds=\"\${concat_cmds}$old_archive_cmds\" + objlist= + len=$len0 + fi + done + RANLIB=$save_RANLIB + oldobjs=$objlist + if test "X$oldobjs" = "X" ; then + eval cmds=\"\$concat_cmds\" + else + eval cmds=\"\$concat_cmds~\$old_archive_cmds\" + fi + fi + fi + func_execute_cmds "$cmds" 'exit $?' + done + + test -n "$generated" && \ + func_show_eval "${RM}r$generated" + + # Now create the libtool archive. + case $output in + *.la) + old_library= + test "$build_old_libs" = yes && old_library="$libname.$libext" + func_verbose "creating $output" + + # Preserve any variables that may affect compiler behavior + for var in $variables_saved_for_relink; do + if eval test -z \"\${$var+set}\"; then + relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" + elif eval var_value=\$$var; test -z "$var_value"; then + relink_command="$var=; export $var; $relink_command" + else + func_quote_for_eval "$var_value" + relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" + fi + done + # Quote the link command for shipping. + relink_command="(cd `pwd`; $SHELL $progpath $preserve_args --mode=relink $libtool_args @inst_prefix_dir@)" + relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` + if test "$hardcode_automatic" = yes ; then + relink_command= + fi + + # Only create the output if not a dry run. + $opt_dry_run || { + for installed in no yes; do + if test "$installed" = yes; then + if test -z "$install_libdir"; then + break + fi + output="$output_objdir/$outputname"i + # Replace all uninstalled libtool libraries with the installed ones + newdependency_libs= + for deplib in $dependency_libs; do + case $deplib in + *.la) + func_basename "$deplib" + name="$func_basename_result" + func_resolve_sysroot "$deplib" + eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $func_resolve_sysroot_result` + test -z "$libdir" && \ + func_fatal_error "\`$deplib' is not a valid libtool archive" + func_append newdependency_libs " ${lt_sysroot:+=}$libdir/$name" + ;; + -L*) + func_stripname -L '' "$deplib" + func_replace_sysroot "$func_stripname_result" + func_append newdependency_libs " -L$func_replace_sysroot_result" + ;; + -R*) + func_stripname -R '' "$deplib" + func_replace_sysroot "$func_stripname_result" + func_append newdependency_libs " -R$func_replace_sysroot_result" + ;; + *) func_append newdependency_libs " $deplib" ;; + esac + done + dependency_libs="$newdependency_libs" + newdlfiles= + + for lib in $dlfiles; do + case $lib in + *.la) + func_basename "$lib" + name="$func_basename_result" + eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $lib` + test -z "$libdir" && \ + func_fatal_error "\`$lib' is not a valid libtool archive" + func_append newdlfiles " ${lt_sysroot:+=}$libdir/$name" + ;; + *) func_append newdlfiles " $lib" ;; + esac + done + dlfiles="$newdlfiles" + newdlprefiles= + for lib in $dlprefiles; do + case $lib in + *.la) + # Only pass preopened files to the pseudo-archive (for + # eventual linking with the app. that links it) if we + # didn't already link the preopened objects directly into + # the library: + func_basename "$lib" + name="$func_basename_result" + eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $lib` + test -z "$libdir" && \ + func_fatal_error "\`$lib' is not a valid libtool archive" + func_append newdlprefiles " ${lt_sysroot:+=}$libdir/$name" + ;; + esac + done + dlprefiles="$newdlprefiles" + else + newdlfiles= + for lib in $dlfiles; do + case $lib in + [\\/]* | [A-Za-z]:[\\/]*) abs="$lib" ;; + *) abs=`pwd`"/$lib" ;; + esac + func_append newdlfiles " $abs" + done + dlfiles="$newdlfiles" + newdlprefiles= + for lib in $dlprefiles; do + case $lib in + [\\/]* | [A-Za-z]:[\\/]*) abs="$lib" ;; + *) abs=`pwd`"/$lib" ;; + esac + func_append newdlprefiles " $abs" + done + dlprefiles="$newdlprefiles" + fi + $RM $output + # place dlname in correct position for cygwin + # In fact, it would be nice if we could use this code for all target + # systems that can't hard-code library paths into their executables + # and that have no shared library path variable independent of PATH, + # but it turns out we can't easily determine that from inspecting + # libtool variables, so we have to hard-code the OSs to which it + # applies here; at the moment, that means platforms that use the PE + # object format with DLL files. See the long comment at the top of + # tests/bindir.at for full details. + tdlname=$dlname + case $host,$output,$installed,$module,$dlname in + *cygwin*,*lai,yes,no,*.dll | *mingw*,*lai,yes,no,*.dll | *cegcc*,*lai,yes,no,*.dll) + # If a -bindir argument was supplied, place the dll there. + if test "x$bindir" != x ; + then + func_relative_path "$install_libdir" "$bindir" + tdlname=$func_relative_path_result$dlname + else + # Otherwise fall back on heuristic. + tdlname=../bin/$dlname + fi + ;; + esac + $ECHO > $output "\ +# $outputname - a libtool library file +# Generated by $PROGRAM (GNU $PACKAGE$TIMESTAMP) $VERSION +# +# Please DO NOT delete this file! +# It is necessary for linking the library. + +# The name that we can dlopen(3). +dlname='$tdlname' + +# Names of this library. +library_names='$library_names' + +# The name of the static archive. +old_library='$old_library' + +# Linker flags that can not go in dependency_libs. +inherited_linker_flags='$new_inherited_linker_flags' + +# Libraries that this one depends upon. +dependency_libs='$dependency_libs' + +# Names of additional weak libraries provided by this library +weak_library_names='$weak_libs' + +# Version information for $libname. +current=$current +age=$age +revision=$revision + +# Is this an already installed library? +installed=$installed + +# Should we warn about portability when linking against -modules? +shouldnotlink=$module + +# Files to dlopen/dlpreopen +dlopen='$dlfiles' +dlpreopen='$dlprefiles' + +# Directory that this library needs to be installed in: +libdir='$install_libdir'" + if test "$installed" = no && test "$need_relink" = yes; then + $ECHO >> $output "\ +relink_command=\"$relink_command\"" + fi + done + } + + # Do a symbolic link so that the libtool archive can be found in + # LD_LIBRARY_PATH before the program is installed. + func_show_eval '( cd "$output_objdir" && $RM "$outputname" && $LN_S "../$outputname" "$outputname" )' 'exit $?' + ;; + esac + exit $EXIT_SUCCESS +} + +{ test "$opt_mode" = link || test "$opt_mode" = relink; } && + func_mode_link ${1+"$@"} + + +# func_mode_uninstall arg... +func_mode_uninstall () +{ + $opt_debug + RM="$nonopt" + files= + rmforce= + exit_status=0 + + # This variable tells wrapper scripts just to set variables rather + # than running their programs. + libtool_install_magic="$magic" + + for arg + do + case $arg in + -f) func_append RM " $arg"; rmforce=yes ;; + -*) func_append RM " $arg" ;; + *) func_append files " $arg" ;; + esac + done + + test -z "$RM" && \ + func_fatal_help "you must specify an RM program" + + rmdirs= + + for file in $files; do + func_dirname "$file" "" "." + dir="$func_dirname_result" + if test "X$dir" = X.; then + odir="$objdir" + else + odir="$dir/$objdir" + fi + func_basename "$file" + name="$func_basename_result" + test "$opt_mode" = uninstall && odir="$dir" + + # Remember odir for removal later, being careful to avoid duplicates + if test "$opt_mode" = clean; then + case " $rmdirs " in + *" $odir "*) ;; + *) func_append rmdirs " $odir" ;; + esac + fi + + # Don't error if the file doesn't exist and rm -f was used. + if { test -L "$file"; } >/dev/null 2>&1 || + { test -h "$file"; } >/dev/null 2>&1 || + test -f "$file"; then + : + elif test -d "$file"; then + exit_status=1 + continue + elif test "$rmforce" = yes; then + continue + fi + + rmfiles="$file" + + case $name in + *.la) + # Possibly a libtool archive, so verify it. + if func_lalib_p "$file"; then + func_source $dir/$name + + # Delete the libtool libraries and symlinks. + for n in $library_names; do + func_append rmfiles " $odir/$n" + done + test -n "$old_library" && func_append rmfiles " $odir/$old_library" + + case "$opt_mode" in + clean) + case " $library_names " in + *" $dlname "*) ;; + *) test -n "$dlname" && func_append rmfiles " $odir/$dlname" ;; + esac + test -n "$libdir" && func_append rmfiles " $odir/$name $odir/${name}i" + ;; + uninstall) + if test -n "$library_names"; then + # Do each command in the postuninstall commands. + func_execute_cmds "$postuninstall_cmds" 'test "$rmforce" = yes || exit_status=1' + fi + + if test -n "$old_library"; then + # Do each command in the old_postuninstall commands. + func_execute_cmds "$old_postuninstall_cmds" 'test "$rmforce" = yes || exit_status=1' + fi + # FIXME: should reinstall the best remaining shared library. + ;; + esac + fi + ;; + + *.lo) + # Possibly a libtool object, so verify it. + if func_lalib_p "$file"; then + + # Read the .lo file + func_source $dir/$name + + # Add PIC object to the list of files to remove. + if test -n "$pic_object" && + test "$pic_object" != none; then + func_append rmfiles " $dir/$pic_object" + fi + + # Add non-PIC object to the list of files to remove. + if test -n "$non_pic_object" && + test "$non_pic_object" != none; then + func_append rmfiles " $dir/$non_pic_object" + fi + fi + ;; + + *) + if test "$opt_mode" = clean ; then + noexename=$name + case $file in + *.exe) + func_stripname '' '.exe' "$file" + file=$func_stripname_result + func_stripname '' '.exe' "$name" + noexename=$func_stripname_result + # $file with .exe has already been added to rmfiles, + # add $file without .exe + func_append rmfiles " $file" + ;; + esac + # Do a test to see if this is a libtool program. + if func_ltwrapper_p "$file"; then + if func_ltwrapper_executable_p "$file"; then + func_ltwrapper_scriptname "$file" + relink_command= + func_source $func_ltwrapper_scriptname_result + func_append rmfiles " $func_ltwrapper_scriptname_result" + else + relink_command= + func_source $dir/$noexename + fi + + # note $name still contains .exe if it was in $file originally + # as does the version of $file that was added into $rmfiles + func_append rmfiles " $odir/$name $odir/${name}S.${objext}" + if test "$fast_install" = yes && test -n "$relink_command"; then + func_append rmfiles " $odir/lt-$name" + fi + if test "X$noexename" != "X$name" ; then + func_append rmfiles " $odir/lt-${noexename}.c" + fi + fi + fi + ;; + esac + func_show_eval "$RM $rmfiles" 'exit_status=1' + done + + # Try to remove the ${objdir}s in the directories where we deleted files + for dir in $rmdirs; do + if test -d "$dir"; then + func_show_eval "rmdir $dir >/dev/null 2>&1" + fi + done + + exit $exit_status +} + +{ test "$opt_mode" = uninstall || test "$opt_mode" = clean; } && + func_mode_uninstall ${1+"$@"} + +test -z "$opt_mode" && { + help="$generic_help" + func_fatal_help "you must specify a MODE" +} + +test -z "$exec_cmd" && \ + func_fatal_help "invalid operation mode \`$opt_mode'" + +if test -n "$exec_cmd"; then + eval exec "$exec_cmd" + exit $EXIT_FAILURE +fi + +exit $exit_status + + +# The TAGs below are defined such that we never get into a situation +# in which we disable both kinds of libraries. Given conflicting +# choices, we go for a static library, that is the most portable, +# since we can't tell whether shared libraries were disabled because +# the user asked for that or because the platform doesn't support +# them. This is particularly important on AIX, because we don't +# support having both static and shared libraries enabled at the same +# time on that platform, so we default to a shared-only configuration. +# If a disable-shared tag is given, we'll fallback to a static-only +# configuration. But we'll never go from static-only to shared-only. + +# ### BEGIN LIBTOOL TAG CONFIG: disable-shared +build_libtool_libs=no +build_old_libs=yes +# ### END LIBTOOL TAG CONFIG: disable-shared + +# ### BEGIN LIBTOOL TAG CONFIG: disable-static +build_old_libs=`case $build_libtool_libs in yes) echo no;; *) echo yes;; esac` +# ### END LIBTOOL TAG CONFIG: disable-static + +# Local Variables: +# mode:shell-script +# sh-indentation:2 +# End: +# vi:sw=2 + diff -Nru intel-vaapi-driver-1.0.15/Makefile.am intel-vaapi-driver-1.7.1/Makefile.am --- intel-vaapi-driver-1.0.15/Makefile.am 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -21,3 +21,5 @@ tar zxvf ../$(PACKAGE)-$(VERSION).tar.gz && \ cd $(PACKAGE)-$(VERSION) && \ $(MAKE) deb -f Makefile.am + +EXTRA_DIST = Android.mk diff -Nru intel-vaapi-driver-1.0.15/Makefile.in intel-vaapi-driver-1.7.1/Makefile.in --- intel-vaapi-driver-1.0.15/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,823 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; 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# UTC + +# Copyright (C) 1996-2013 Free Software Foundation, Inc. +# Originally written by Fran,cois Pinard , 1996. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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This often happens when the user +# tries to use an ancient version of a tool on a file that requires a +# minimum version. +if test $st -eq 63; then + msg="probably too old" +elif test $st -eq 127; then + # Program was missing. + msg="missing on your system" +else + # Program was found and executed, but failed. Give up. + exit $st +fi + +perl_URL=http://www.perl.org/ +flex_URL=http://flex.sourceforge.net/ +gnu_software_URL=http://www.gnu.org/software + +program_details () +{ + case $1 in + aclocal|automake) + echo "The '$1' program is part of the GNU Automake package:" + echo "<$gnu_software_URL/automake>" + echo "It also requires GNU Autoconf, GNU m4 and Perl in order to run:" + echo "<$gnu_software_URL/autoconf>" + echo "<$gnu_software_URL/m4/>" + echo "<$perl_URL>" + ;; + autoconf|autom4te|autoheader) + echo "The '$1' program is part of the GNU Autoconf package:" + echo "<$gnu_software_URL/autoconf/>" + echo "It also requires GNU m4 and Perl in order to run:" + echo "<$gnu_software_URL/m4/>" + echo "<$perl_URL>" + ;; + esac +} + +give_advice () +{ + # Normalize program name to check for. + normalized_program=`echo "$1" | sed ' + s/^gnu-//; t + s/^gnu//; t + s/^g//; t'` + + printf '%s\n' "'$1' is $msg." + + configure_deps="'configure.ac' or m4 files included by 'configure.ac'" + case $normalized_program in + autoconf*) + echo "You should only need it if you modified 'configure.ac'," + echo "or m4 files included by it." + program_details 'autoconf' + ;; + autoheader*) + echo "You should only need it if you modified 'acconfig.h' or" + echo "$configure_deps." + program_details 'autoheader' + ;; + automake*) + echo "You should only need it if you modified 'Makefile.am' or" + echo "$configure_deps." + program_details 'automake' + ;; + aclocal*) + echo "You should only need it if you modified 'acinclude.m4' or" + echo "$configure_deps." + program_details 'aclocal' + ;; + autom4te*) + echo "You might have modified some maintainer files that require" + echo "the 'autom4te' program to be rebuilt." + program_details 'autom4te' + ;; + bison*|yacc*) + echo "You should only need it if you modified a '.y' file." + echo "You may want to install the GNU Bison package:" + echo "<$gnu_software_URL/bison/>" + ;; + lex*|flex*) + echo "You should only need it if you modified a '.l' file." + echo "You may want to install the Fast Lexical Analyzer package:" + echo "<$flex_URL>" + ;; + help2man*) + echo "You should only need it if you modified a dependency" \ + "of a man page." + echo "You may want to install the GNU Help2man package:" + echo "<$gnu_software_URL/help2man/>" + ;; + makeinfo*) + echo "You should only need it if you modified a '.texi' file, or" + echo "any other file indirectly affecting the aspect of the manual." + echo "You might want to install the Texinfo package:" + echo "<$gnu_software_URL/texinfo/>" + echo "The spurious makeinfo call might also be the consequence of" + echo "using a buggy 'make' (AIX, DU, IRIX), in which case you might" + echo "want to install GNU make:" + echo "<$gnu_software_URL/make/>" + ;; + *) + echo "You might have modified some files without having the proper" + echo "tools for further handling them. Check the 'README' file, it" + echo "often tells you about the needed prerequisites for installing" + echo "this package. You may also peek at any GNU archive site, in" + echo "case some other package contains this missing '$1' program." + ;; + esac +} + +give_advice "$1" | sed -e '1s/^/WARNING: /' \ + -e '2,$s/^/ /' >&2 + +# Propagate the correct exit status (expected to be 127 for a program +# not found, 63 for a program that failed due to version mismatch). +exit $st + +# Local variables: +# eval: (add-hook 'write-file-hooks 'time-stamp) +# time-stamp-start: "scriptversion=" +# time-stamp-format: "%:y-%02m-%02d.%02H" +# time-stamp-time-zone: "UTC" +# time-stamp-end: "; # UTC" +# End: diff -Nru intel-vaapi-driver-1.0.15/NEWS intel-vaapi-driver-1.7.1/NEWS --- intel-vaapi-driver-1.0.15/NEWS 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/NEWS 2016-06-21 01:36:08.000000000 +0000 @@ -1,5 +1,226 @@ -libva-driver-intel NEWS -- summary of changes. 2011-10-28 -Copyright (C) 2009-2011 Intel Corporation +libva-intel-driver NEWS -- summary of changes. 2016-06-21 +Copyright (C) 2009-2016 Intel Corporation + +Version 1.7.1 - 21.Jun.2016 +* Add support VP9 8bit encoding on KBL +* Add support for low-power/high-performance H.264 encoder on SKL +* Fix incorrect color space conversion in driver + (https://bugs.freedesktop.org/show_bug.cgi?id=94845) +* Fix FPS caculation for HEVC encoder +* Fix VP9 10bit decoding issue on KBL +* Fix the noise issue when VA_FILTER_SCALING_HQ upscaling from 1280x720 to 1920x1080 with YUY2 format on BDW+ + (https://bugs.freedesktop.org/show_bug.cgi?id=94765) + +Version 1.7.0 - 15.Mar.2016 +* Add support for Kabylake + - Decoding: H.264/MPEG-2/VC-1/JPEG/VP8/HEVC/HEVC 10-bit/VP9/VP9 10-bit + - Encoding: H.264/MPEG-2/JPEG/VP8/HEVC + - VPP: CSC/scaling/NoiseReduction/Deinterlacing{Bob, MotionAdaptive, MotionCompensated}/ColorBalance/STD +* Add new SKL and BXT PCI IDs +* Fix lots of VP9 decoding issues on BXT + +Version 1.6.2 - 15.Dec.2015 +* Add support for Broxton + - Decoding: H.264/MPEG-2/VC-1/JPEG/VP8/HEVC/HEVC 10-bit/VP9 + - Encoding: H.264/JPEG/VP8/HEVC + - VPP: CSC/scaling/NoiseReduction/Deinterlacing{Bob, MotionAdaptive, MotionCompensated}/ColorBalance/STD +* Add support for HEVC CBR on SKL +* Fix the broken VA_FILTER_SCALING_HQ on SKL +* Fix the incorrect loading of GPU shaders on GEN8/GEN9 +* Fix the wrong address relocation in VPP on GEN8/GEN9 +* Fix the wrong VAImage foramt + (https://bugs.freedesktop.org/show_bug.cgi?id=92088) +* Fix YUV to RGB conversion on GEN7/GEN8/GEN9 +* Fix the segmentation fault causing by NULL buffer object on SNB + (The issue mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=92811) +* Fix the wrong coordinate used in VPP + (The issue mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=92811) + +Version 1.6.1 - 09.Sep.2015 +* Wrapper other backend driver to support VP9 hybrid decoding on BDW/BSW/SKL (--enable-hybrid-codec) +* Fix HEVC decoding issue on BSW/SKL +* Fix HEVC encoding on SKL GT3 +* Fix GPU hang issue when decoding H.264 MBAFF clips + (https://bugs.freedesktop.org/show_bug.cgi?id=91207) +* Fix issues detected by klockwork scan +* Combine csc/scaling together to optimize the performance + +Version 1.6.0 - 01.Jul.2015 +* Add support for VP8 encoding (CQP, CBR) on BSW/SKL +* Add support for HEVC decoding on BSW +* Add support for HEVC encoding (CQP) on SKL +* Add support for low-power mode (VA_PROC_PIPELINE_FAST) in VPP to discard + any complex operation that would consume too many HW resources +* Fix memory leak issue for JPEG decoding +* Fix HEVC decoding issue on BSW/SKL +* Fix GPU hang issue caused by VP8 decoding on BDW/BSW +* Fix MADI/MCDI issues on SNB/IVB +* Improve the JPEG encoding quality +* Optimize MPEG-2 start code search on IVB + +Version 1.5.1 - DD.03.2015 +* Fix forward reference requirement for Bob deinterlacing +* Fix a lot of potential rendering issues on GEN8+ +* Fix scaling of NV12 surfaces when no output_region is set +* Fix the broken attribute setting of i965_GetConfigAttrib +* Fix the GetConfigAttributes() for JPEGBaseline profile +* Fix the wrong overlap setting for VC-1 decoding on GEN6+ +* Fix VP8 decoding issue on GEN8+, HW needs 1 extra byte for each partition +* Fix JPEG encoding issue. +* Add support for aub dump +* Enhance STD on GEN8+ +* Implement max width and height in QuerySurfaceAttributes +* Add new SKL PCI ids + +Version 1.5.0 - 28.Dec.2014 +* Add support for Skylake + - Decoding: H.264/MPEG-2/VC-1/JPEG/VP8/HEVC + - Encoding: H.264/MPEG-2/JPEG + - VPP: CSC/scaling/NoiseReduction/Deinterlacing{Bob, MotionAdaptive, MotionCompensated}/ColorBalance/STD +* Add support for JPEG encoding on Braswell +* Add enhancement for video post/pre processing +* Fix out of tree builds (Emil Velikov) + +Version 1.4.1 - 24.Oct.2014 +* Use a new method to detect encoding capabilitiy on Haswell + +Version 1.4.0 - 30.Sep.2014 +* Add support for exporting VA buffer +* Add support for MVC decoding/encoding +* Add support for encoding quality level on Sandybride and newer +* Add support of inserting packed slice header & raw data for encoding +* Add support for Cherryview +* Fix the GPU hang issue on Ivybridge when using the gstreamer and mplayer to play back one H264 clip + (https://bugs.freedesktop.org/show_bug.cgi?id=80720) +* Fix the GPU hang issue on Sandybride and newer when playing back one H264 clip + (https://bugs.freedesktop.org/show_bug.cgi?id=76363) +* Fix the GPU hang issue on Haswell when using XBMC to play back one H264 clip + (https://bugs.freedesktop.org/show_bug.cgi?id=81447) + +Version 1.3.2 - 16.Jun.2014 +* Export JPEG format by vaDeriveImage() +* Add support for MADI on SNB +* H.264: fix the support for grayscale format (Y800) +* Fix vaGetConfigAttributes() to validate the profile/entrypoint pair +* Fix vaCreateConfig() to not override user chroma format +* Fix the scaling issue on IVB/HSW/BDW +* Fix https://bugs.freedesktop.org/show_bug.cgi?id=73424 +* Fix https://bugs.freedesktop.org/show_bug.cgi?id=72522 +* Fix https://bugs.freedesktop.org/show_bug.cgi?id=77041 +* Quality improvement for H.264 encoding on BDW + +Version 1.3.1 - 09.May.2014 +* Add support for STE on Broadwell +* Add support for YV16 +* Add support for user specified tiling and stride +* Fix VP8 decoding on Broadwell +* Fix the wrong alpha when convert NV12 into RGBA +* Fix https://bugs.freedesktop.org/show_bug.cgi?id=77386 + +Version 1.3.0 - 24.Mar.2014 +* Add support for Broadwell + - Decoding: H.264/MPEG-2/VC-1/JPEG/VP8 + - Encoding: H.264/MPEG-2 + - VPP: CSC/scaling/NoiseReduction/Deinterlacing{Bob, MotionAdaptive, MotionCompensated}/Sharpening/ColorBalance +* Fix the wrong setting in MI_BATCH_BATCH_START + +Version 1.2.2 - 16.Dec.2013 +* Motion compensation DI on HSW +* Optimization of FPS for H.264 encoding on HSW +* Add brightness/contrast/hue/saturation support for rendering. +* Support BT601/BT709/SMPTE240 in vaPutSurface() +* Expose Constrained Baseline Profile instead of Baseline Profile for H.264 +* Bug fixes + +Version 1.2.1 - 23.Sep.2013 +* Add PCI IDs for Bay Trail +* Performance improvement for MPEG-2 Encoding on IVB/HSW +* Add basic processing support for packed YUV to packed YUV on ILK+ +* Check the underlying OS support for VEBOX on HSW +* Quality improvement for BobDI on SNB/IVB +* Add support for Motion Adaptive Deinterlacing on IVB +* vaDeriveImage() works for UYVY formats +* Fix thread safety issue +* Fix GPU hang issue when decoding some videos on SNB +* Fix output filter count from QueryVideoProcFilters() + +Version 1.2.0 - 26.Jun.2013 +* The new H.264 encoding API on SNB/IVB/HSW + - Profile: BP/MP/HP + - Entropy Coding: CAVLC/CABAC + - Rate Control: CQP, CBR + - Progressive frame + - Multi Slice encoding + - Configurable GOP Structure +* MPEG-2 encoding on IVB/HSW + - Profile: SP/MP + - Progressive frame + - Configurable GOP Structure +* Video process on ILK/SNB/IVB/HSW + - CSC/scaling on ILK + - CSC/scaling/NoiseReduction/Deinterlacing{Bob} on SNB/IVB + - CSC/scaling/NoiseReduction/Deinterlacing{Bob,MotionAdaptive}/Sharpening/ColorBalance on HSW +* Implement vaQuerySurfaceAttributes() +* Implement the new version of vaCreateSurfaces() + - Create VA surface with specified fourcc + - Create VA surface from external buffer + . flinked GEM buffer + . prime/dma buffer +* Optimize H.264 encoding on IVB/HSW +* More reserved PCI IDs for HSW +* A lot of bug fixes + +Version 1.0.20 - 19.Mar.2013 +* Add support for wayland 1.0 protocol (Rob Bradford) +* Add global alpha support for subpicture +* Add support for IA88/AI88 subpicture +* Support up to 4 subpictures for each VA surface +* Update PCI IDs for Haswell CRW +* Automake 1.13 fixups (Armin K) +* Fix libva-intel-driver-1.0.19 display corruption on IVB GT1 + https://bugs.freedesktop.org/show_bug.cgi?id=57323 +* Fix decoding with FREXT02_JVC_C.264 on SNB + https://bugs.freedesktop.org/show_bug.cgi?id=57720 +* Fix H.264 decoding broken/visual errors on ILK (Tobias Jakobi) + https://bugs.freedesktop.org/show_bug.cgi?id=58875 +* Fix GPU hung with h.264 video and a resolution of 1920x816 on IVB + https://bugs.freedesktop.org/show_bug.cgi?id=59050 + +Version 1.0.19 - 09.Nov.2012 +* Add support for Haswell +* Add raw DRM support (Dmitry Ermilov) +* Add Wayland support +* Add support for display rotation attribute +* Support 4K encoding on IVB and HSW +* Drop explicit dependency on X11 and libva-x11 +* Fix VC-1 decoding when VSTRANSFORM is 0 +* Fix SIGSEGV caused by use-after-free of the bufmgr (Stéphane Marchesin) +* Fix thread safety issue (Gautam) +* Fix vaUnlockSurface() for libva trace + +Version 1.0.18 - 02.Aug.2012 +* Add JPEG decoding on Ivy Bridge +* Add support for a new Ivy Bridge chip +* Add support for vaSyncSurface() and vaQuerySurfaceStatus() (Dmitry Ermilov) +* Fix decoding of MPEG-2 videos with implicit IQ matrices +* Fix concurrent creation of VA objects (MT safety) +* Fix decoding of large resolution videos (up to 4K on IVB) + +Version 1.0.17 - 02.Apr.2012 +* Add support for IMC1/IMC3 surface formats +* Fix rendering of interlaced surfaces +* Fix MPEG-2 decoding of interlaced streams (SNB, IVB) +* Fix H.264 weighted prediction indicator (SNB) +* Fix and simplify calculation of H.264 macroblock bit offset (ILK, SNB, IVB) + +Version 1.0.16 - 14.Feb.2012 +* Fix VC-1 bitplane buffer size (SNB, IVB) +* Fix VC-1 motion vector modes for Ivy Bridge +* Fix MFX_QM_STATE for H.264 flat scaling lists (IVB) +* Fix and simplify AVC_REF_IDX_STATE setup (ILK, SNB, IVB) +* Fix memory leak of encoder buffers +* Fix check for internal VA surface format prior to rendering +* Add support for B43 chipset (Alexander Inyukhin) Version 1.0.15 - 28.Oct.2011 * Add auto-generated Debian packaging diff -Nru intel-vaapi-driver-1.0.15/README intel-vaapi-driver-1.7.1/README --- intel-vaapi-driver-1.0.15/README 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/README 2016-06-16 00:57:46.000000000 +0000 @@ -1,8 +1,8 @@ - libva-driver-intel + libva-intel-driver VA driver for Intel G45 & HD Graphics family - Copyright (C) 2009-2011 Intel Corporation + Copyright (C) 2009-2015 Intel Corporation License @@ -14,7 +14,7 @@ Overview -------- -libva-driver-intel is the VA-API implementation for Intel G45 chipsets +libva-intel-driver is the VA-API implementation for Intel G45 chipsets and Intel HD Graphics for Intel Core processor family. Platform definitions: @@ -22,7 +22,12 @@ ILK: Ironlake, Intel HD Graphics for 2010 Intel Core processor family SNB: Sandybridge, Intel HD Graphics for 2011 Intel Core processor family IVB: Ivybridge - +HSW: Haswell +BDW: Broadwell +CHV/BSW: Cherryview/Braswell +SKL: Skylake +BXT: Broxton +KBL: Kabylake Codecs ------ @@ -31,9 +36,17 @@ H.264 E SNB+ MPEG-2 D CTG+ VC-1 D SNB+ - +JPEG D IVB+ +JPEG E CHV+/BSW+ +VP8 D BDW+ +VP8 E CHV+/BSW+ +HEVC D CHV+/BSW+ +HEVC E SKL+ +VP9 D BXT+ +HEVC 10bit D BXT+ +VP9 10bit D KBL+ Requirements ------------ -libva >= 1.0.14 +libva >= 1.7.0 diff -Nru intel-vaapi-driver-1.0.15/src/Android.mk intel-vaapi-driver-1.7.1/src/Android.mk --- intel-vaapi-driver-1.0.15/src/Android.mk 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/Android.mk 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,105 @@ +# Copyright (c) 2012 Intel Corporation. All Rights Reserved. +# +# +# Permission is hereby granted, free of charge, to any person obtaining a +# copy of this software and associated documentation files (the +# "Software"), to deal in the Software without restriction, including +# without limitation the rights to use, copy, modify, merge, publish, +# distribute, sub license, and/or sell copies of the Software, and to +# permit persons to whom the Software is furnished to do so, subject to +# the following conditions: +# +# The above copyright notice and this permission notice (including the +# next paragraph) shall be included in all copies or substantial portions +# of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +# IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR +# ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, +# TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE +# SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# + +LOCAL_PATH:= $(call my-dir) + +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + dso_utils.c \ + gen6_mfc.c \ + gen6_mfc_common.c \ + gen6_mfd.c \ + gen6_vme.c \ + gen7_vme.c \ + gen7_mfc.c \ + gen7_mfd.c \ + gen75_mfd.c \ + gen75_mfc.c \ + gen8_mfc.c \ + gen8_mfd.c \ + gen8_vme.c \ + gen9_vme.c \ + gen9_mfc.c \ + gen9_mfc_hevc.c \ + gen9_mfd.c \ + gen75_picture_process.c \ + gen75_vme.c \ + gen75_vpp_gpe.c \ + gen75_vpp_vebox.c \ + gen9_post_processing.c \ + i965_avc_bsd.c \ + i965_avc_hw_scoreboard.c\ + i965_avc_ildb.c \ + i965_decoder_utils.c \ + i965_device_info.c \ + i965_drv_video.c \ + i965_encoder.c \ + i965_encoder_utils.c \ + i965_media.c \ + i965_media_h264.c \ + i965_media_mpeg2.c \ + i965_gpe_utils.c \ + i965_post_processing.c \ + gen8_post_processing.c \ + i965_render.c \ + i965_vpp_avs.c \ + gen8_render.c \ + gen9_render.c \ + intel_batchbuffer.c \ + intel_batchbuffer_dump.c\ + intel_driver.c \ + intel_memman.c \ + object_heap.c \ + intel_media_common.c \ + $(NULL) + +GEN := $(LOCAL_PATH)/intel_version.h +$(GEN): SCRIPT := $(LOCAL_PATH)/../build/gen_version.sh +$(GEN): PRIVATE_PATH := $(LOCAL_PATH) +$(GEN): PRIVATE_CUSTOM_TOOL = sh $(SCRIPT) $(PRIVATE_PATH)/.. $(PRIVATE_PATH) > $@ +$(GEN): $(LOCAL_PATH)/%.h : $(LOCAL_PATH)/%.h.in $(SCRIPT) + $(transform-generated-source) +LOCAL_GENERATED_SOURCES += $(GEN) + +LOCAL_CFLAGS := -DLINUX -DANDROID -g -Wall -Wno-unused -fvisibility=hidden + +LOCAL_C_INCLUDES := \ + $(TARGET_OUT_HEADERS)/libva \ + $(TARGET_OUT_HEADERS)/libdrm + +LOCAL_MODULE_TAGS := optional +LOCAL_MODULE := i965_drv_video + +LOCAL_SHARED_LIBRARIES := libdl libdrm libdrm_intel libcutils \ + libva libva-android libstdc++ + +ifeq ($(strip $(DRIVER_LOG_ENABLE)),true) +LOCAL_CFLAGS += -DDRIVER_LOG_ENABLE +LOCAL_SHARED_LIBRARIES += liblog +endif + +include $(BUILD_SHARED_LIBRARY) + + diff -Nru intel-vaapi-driver-1.0.15/src/config.h.in intel-vaapi-driver-1.7.1/src/config.h.in --- intel-vaapi-driver-1.0.15/src/config.h.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/config.h.in 2016-06-21 02:07:56.000000000 +0000 @@ -0,0 +1,127 @@ +/* src/config.h.in. Generated from configure.ac by autoheader. */ + +/* Define if building universal (internal helper macro) */ +#undef AC_APPLE_UNIVERSAL_BUILD + +/* Define to 1 if you have the header file. */ +#undef HAVE_DLFCN_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_DRM_FOURCC_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_EGL_EGL_H + +/* Defined to 1 if hybrid codec is needed */ +#undef HAVE_HYBRID_CODEC + +/* Define to 1 if you have the header file. */ +#undef HAVE_INTTYPES_H + +/* Define to 1 if you have the `m' library (-lm). */ +#undef HAVE_LIBM + +/* Define to 1 if you have the `log2f' function. */ +#undef HAVE_LOG2F + +/* Define to 1 if you have the header file. */ +#undef HAVE_MEMORY_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDINT_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STDLIB_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STRINGS_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_STRING_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_STAT_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_SYS_TYPES_H + +/* Define to 1 if you have the header file. */ +#undef HAVE_UNISTD_H + +/* Defined to 1 if VA/DRM API is enabled */ +#undef HAVE_VA_DRM + +/* Defined to 1 if VA/Wayland API is enabled */ +#undef HAVE_VA_WAYLAND + +/* Defined to 1 if VA/X11 API is enabled */ +#undef HAVE_VA_X11 + +/* Major version of the driver */ +#undef INTEL_DRIVER_MAJOR_VERSION + +/* Micro version of the driver */ +#undef INTEL_DRIVER_MICRO_VERSION + +/* Minor version of the driver */ +#undef INTEL_DRIVER_MINOR_VERSION + +/* Preversion of the driver */ +#undef INTEL_DRIVER_PRE_VERSION + +/* Define to the sub-directory in which libtool stores uninstalled libraries. + */ +#undef LT_OBJDIR + +/* Name of package */ +#undef PACKAGE + +/* Define to the address where bug reports for this package should be sent. */ +#undef PACKAGE_BUGREPORT + +/* Define to the full name of this package. */ +#undef PACKAGE_NAME + +/* Define to the full name and version of this package. */ +#undef PACKAGE_STRING + +/* Define to the one symbol short name of this package. */ +#undef PACKAGE_TARNAME + +/* Define to the home page for this package. */ +#undef PACKAGE_URL + +/* Define to the version of this package. */ +#undef PACKAGE_VERSION + +/* Define to 1 if you have the ANSI C header files. */ +#undef STDC_HEADERS + +/* Define driver entry-point */ +#undef VA_DRIVER_INIT_FUNC + +/* Version number of package */ +#undef VERSION + +/* Define WORDS_BIGENDIAN to 1 if your processor stores words with the most + significant byte first (like Motorola and SPARC, unlike Intel). */ +#if defined AC_APPLE_UNIVERSAL_BUILD +# if defined __BIG_ENDIAN__ +# define WORDS_BIGENDIAN 1 +# endif +#else +# ifndef WORDS_BIGENDIAN +# undef WORDS_BIGENDIAN +# endif +#endif + +/* Enable large inode numbers on Mac OS X 10.5. */ +#ifndef _DARWIN_USE_64_BIT_INODE +# define _DARWIN_USE_64_BIT_INODE 1 +#endif + +/* Number of bits in a file offset, on hosts where this is settable. */ +#undef _FILE_OFFSET_BITS + +/* Define for large files, on AIX-style hosts. */ +#undef _LARGE_FILES diff -Nru intel-vaapi-driver-1.0.15/src/dso_utils.c intel-vaapi-driver-1.7.1/src/dso_utils.c --- intel-vaapi-driver-1.0.15/src/dso_utils.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/dso_utils.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,110 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#define _GNU_SOURCE 1 +#include +#include +#include +#include "dso_utils.h" + +struct dso_handle { + void *handle; +}; + +/* Opens the named shared library */ +struct dso_handle * +dso_open(const char *path) +{ + struct dso_handle *h; + + h = calloc(1, sizeof(*h)); + if (!h) + return NULL; + + if (path) { + h->handle = dlopen(path, RTLD_LAZY|RTLD_LOCAL); + if (!h->handle) + goto error; + } + else + h->handle = RTLD_DEFAULT; + return h; + +error: + dso_close(h); + return NULL; +} + +/* Closes and disposed any allocated data */ +void +dso_close(struct dso_handle *h) +{ + if (!h) + return; + + if (h->handle) { + if (h->handle != RTLD_DEFAULT) + dlclose(h->handle); + h->handle = NULL; + } + free(h); +} + +/* Load symbol into the supplied location */ +static bool +get_symbol(struct dso_handle *h, void *func_vptr, const char *name) +{ + dso_generic_func func, * const func_ptr = func_vptr; + const char *error; + + dlerror(); + func = (dso_generic_func)dlsym(h->handle, name); + error = dlerror(); + if (error) { + fprintf(stderr, "error: failed to resolve %s(): %s\n", name, error); + return false; + } + *func_ptr = func; + return true; +} + +/* Loads symbols into the supplied vtable */ +bool +dso_get_symbols( + struct dso_handle *h, + void *vtable, + unsigned int vtable_length, + const struct dso_symbol *symbols +) +{ + const struct dso_symbol *s; + + for (s = symbols; s->name != NULL; s++) { + if (s->offset + sizeof(dso_generic_func) > vtable_length) + return false; + if (!get_symbol(h, ((char *)vtable) + s->offset, s->name)) + return false; + } + return true; +} diff -Nru intel-vaapi-driver-1.0.15/src/dso_utils.h intel-vaapi-driver-1.7.1/src/dso_utils.h --- intel-vaapi-driver-1.0.15/src/dso_utils.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/dso_utils.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef DSO_UTILS_H +#define DSO_UTILS_H + +#include + +/** Generic pointer to function. */ +typedef void (*dso_generic_func)(void); + +/** Library handle (opaque). */ +struct dso_handle; + +/** Symbol lookup table. */ +struct dso_symbol { + /** Symbol name */ + const char *name; + /** Offset into the supplied vtable where symbol is to be loaded. */ + unsigned int offset; +}; + +/** + * Opens the named shared library. + * + * @param[in] path the library name, or NULL to lookup into loaded libraries + * @return the newly allocated library handle + */ +struct dso_handle * +dso_open(const char *path); + +/** Closes and disposed any allocated data. */ +void +dso_close(struct dso_handle *h); + +/** + * Loads symbols into the supplied vtable. + * + * @param[in] handle the DSO handle + * @param[in] vtable the function table to fill in + * @param[in] vtable_length the size (in bytes) of the function table + * @param[in] symbols the NULL terminated array of symbols to lookup + * @return true on success, false otherwise + **/ +bool +dso_get_symbols( + struct dso_handle *h, + void *vtable, + unsigned int vtable_length, + const struct dso_symbol *symbols +); + +#endif /* DSO_UTILS_H */ diff -Nru intel-vaapi-driver-1.0.15/src/gen6_mfc.c intel-vaapi-driver-1.7.1/src/gen6_mfc.c --- intel-vaapi-driver-1.0.15/src/gen6_mfc.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen6_mfc.c 2016-06-17 01:56:44.000000000 +0000 @@ -30,26 +30,65 @@ #include #include #include +#include -#include "assert.h" #include "intel_batchbuffer.h" #include "i965_defines.h" #include "i965_structs.h" #include "i965_drv_video.h" #include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "gen6_mfc.h" +#include "gen6_vme.h" +#include "intel_media.h" + +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +static const uint32_t gen6_mfc_batchbuffer_avc_intra[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_intra.g6b" +}; + +static const uint32_t gen6_mfc_batchbuffer_avc_inter[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_inter.g6b" +}; + +static struct i965_kernel gen6_mfc_kernels[] = { + { + "MFC AVC INTRA BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTRA, + gen6_mfc_batchbuffer_avc_intra, + sizeof(gen6_mfc_batchbuffer_avc_intra), + NULL + }, + + { + "MFC AVC INTER BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTER, + gen6_mfc_batchbuffer_avc_inter, + sizeof(gen6_mfc_batchbuffer_avc_inter), + NULL + }, +}; static void -gen6_mfc_pipe_mode_select(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +gen6_mfc_pipe_mode_select(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(standard_select == MFX_FORMAT_AVC); BEGIN_BCS_BATCH(batch, 4); OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (4 - 2)); OUT_BCS_BATCH(batch, - (0 << 10) | /* disable Stream-Out */ - (1 << 9) | /* Post Deblocking Output */ - (0 << 8) | /* Pre Deblocking Output */ + (1 << 10) | /* disable Stream-Out , advanced QP/bitrate control need enable it*/ + ((!!mfc_context->post_deblocking_output.bo) << 9) | /* Post Deblocking Output */ + ((!!mfc_context->pre_deblocking_output.bo) << 8) | /* Pre Deblocking Output */ (0 << 7) | /* disable TLB prefectch */ (0 << 5) | /* not in stitch mode */ (1 << 4) | /* encoding mode */ @@ -71,46 +110,10 @@ } static void -gen7_mfc_pipe_mode_select(VADriverContextP ctx, - int standard_select, - struct gen6_encoder_context *gen6_encoder_context) +gen6_mfc_surface_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - - assert(standard_select == MFX_FORMAT_MPEG2 || - standard_select == MFX_FORMAT_AVC); - - BEGIN_BCS_BATCH(batch, 5); - OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); - OUT_BCS_BATCH(batch, - (MFX_LONG_MODE << 17) | /* Must be long format for encoder */ - (MFD_MODE_VLD << 15) | /* VLD mode */ - (0 << 10) | /* disable Stream-Out */ - (1 << 9) | /* Post Deblocking Output */ - (0 << 8) | /* Pre Deblocking Output */ - (0 << 5) | /* not in stitch mode */ - (1 << 4) | /* encoding mode */ - (standard_select << 0)); /* standard select: avc or mpeg2 */ - OUT_BCS_BATCH(batch, - (0 << 7) | /* expand NOA bus flag */ - (0 << 6) | /* disable slice-level clock gating */ - (0 << 5) | /* disable clock gating for NOA */ - (0 << 4) | /* terminate if AVC motion and POC table error occurs */ - (0 << 3) | /* terminate if AVC mbdata error occurs */ - (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ - (0 << 1) | - (0 << 0)); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - - ADVANCE_BCS_BATCH(batch); -} - -static void -gen6_mfc_surface_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; BEGIN_BCS_BATCH(batch, 6); @@ -134,56 +137,37 @@ ADVANCE_BCS_BATCH(batch); } -static void -gen7_mfc_surface_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; - - BEGIN_BCS_BATCH(batch, 6); - - OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, - ((mfc_context->surface_state.height - 1) << 18) | - ((mfc_context->surface_state.width - 1) << 4)); - OUT_BCS_BATCH(batch, - (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ - (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ - (0 << 22) | /* surface object control state, FIXME??? */ - ((mfc_context->surface_state.w_pitch - 1) << 3) | /* pitch */ - (0 << 2) | /* must be 0 for interleave U/V */ - (1 << 1) | /* must be tiled */ - (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ - OUT_BCS_BATCH(batch, - (0 << 16) | /* must be 0 for interleave U/V */ - (mfc_context->surface_state.h_pitch)); /* y offset for U(cb) */ - OUT_BCS_BATCH(batch, 0); - ADVANCE_BCS_BATCH(batch); -} - -static void -gen6_mfc_pipe_buf_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +void +gen6_mfc_pipe_buf_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; int i; BEGIN_BCS_BATCH(batch, 24); OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (24 - 2)); - OUT_BCS_BATCH(batch, 0); /* pre output addr */ + if (mfc_context->pre_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); /* pre output addr */ - OUT_BCS_RELOC(batch, mfc_context->post_deblocking_output.bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - 0); /* post output addr */ + if (mfc_context->post_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* post output addr */ + else + OUT_BCS_BATCH(batch, 0); OUT_BCS_RELOC(batch, mfc_context->uncompressed_picture_source.bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); /* uncompressed data */ - - OUT_BCS_BATCH(batch, 0); /* StreamOut data*/ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* StreamOut data*/ OUT_BCS_RELOC(batch, mfc_context->intra_row_store_scratch_buffer.bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); @@ -200,16 +184,19 @@ OUT_BCS_BATCH(batch, 0); } } - OUT_BCS_BATCH(batch, 0); /* no block status */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* Macroblock status buffer*/ ADVANCE_BCS_BATCH(batch); } static void -gen6_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +gen6_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; BEGIN_BCS_BATCH(batch, 11); @@ -224,42 +211,23 @@ OUT_BCS_BATCH(batch, 0); OUT_BCS_BATCH(batch, 0); /*MFC Indirect PAK-BSE Object Base Address for Encoder*/ - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - - ADVANCE_BCS_BATCH(batch); -} - -static void -gen7_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - - BEGIN_BCS_BATCH(batch, 11); - - OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - /* MFX Indirect MV Object Base Address */ - OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); - OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - /*MFC Indirect PAK-BSE Object Base Address for Encoder*/ - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.end_offset); ADVANCE_BCS_BATCH(batch); } -static void -gen6_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +void +gen6_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; BEGIN_BCS_BATCH(batch, 4); @@ -274,11 +242,13 @@ } static void -gen6_mfc_avc_img_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +gen6_mfc_avc_img_state(VADriverContextP ctx,struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; - + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; @@ -299,180 +269,204 @@ (0 << 8) | /*Image Structure*/ (0 << 0) ); /*Current Decoed Image Frame Store ID, reserved in Encode mode*/ OUT_BCS_BATCH(batch, - (0 << 16) | /*Mininum Frame size*/ - (0 << 15) | /*Disable reading of Macroblock Status Buffer*/ + (400 << 16) | /*Mininum Frame size*/ + (0 << 15) | /*Disable reading of Macroblock Status Buffer*/ (0 << 14) | /*Load BitStream Pointer only once, 1 slic 1 frame*/ (0 << 13) | /*CABAC 0 word insertion test enable*/ (1 << 12) | /*MVUnpackedEnable,compliant to DXVA*/ (1 << 10) | /*Chroma Format IDC, 4:2:0*/ - (1 << 7) | /*0:CAVLC encoding mode,1:CABAC*/ + (pPicParameter->pic_fields.bits.entropy_coding_mode_flag << 7) | /*0:CAVLC encoding mode,1:CABAC*/ (0 << 6) | /*Only valid for VLD decoding mode*/ (0 << 5) | /*Constrained Intra Predition Flag, from PPS*/ - (0 << 4) | /*Direct 8x8 inference flag*/ - (0 << 3) | /*Only 8x8 IDCT Transform Mode Flag*/ + (pSequenceParameter->seq_fields.bits.direct_8x8_inference_flag << 4) | /*Direct 8x8 inference flag*/ + (pPicParameter->pic_fields.bits.transform_8x8_mode_flag << 3) | /*8x8 or 4x4 IDCT Transform Mode Flag*/ (1 << 2) | /*Frame MB only flag*/ (0 << 1) | /*MBAFF mode is in active*/ (0 << 0) ); /*Field picture flag*/ - OUT_BCS_BATCH(batch, 0); /*Mainly about MB rate control and debug, just ignoring*/ + OUT_BCS_BATCH(batch, + (1<<16) | /*Frame Size Rate Control Flag*/ + (1<<12) | + (1<<9) | /*MB level Rate Control Enabling Flag*/ + (1 << 3) | /*FrameBitRateMinReportMask*/ + (1 << 2) | /*FrameBitRateMaxReportMask*/ + (1 << 1) | /*InterMBMaxSizeReportMask*/ + (1 << 0) ); /*IntraMBMaxSizeReportMask*/ OUT_BCS_BATCH(batch, /*Inter and Intra Conformance Max size limit*/ - (0xBB8 << 16) | /*InterMbMaxSz*/ - (0xEE8) ); /*IntraMbMaxSz*/ - OUT_BCS_BATCH(batch, 0); /*Reserved*/ - OUT_BCS_BATCH(batch, 0); /*Slice QP Delta for bitrate control*/ - OUT_BCS_BATCH(batch, 0); /*Slice QP Delta for bitrate control*/ - OUT_BCS_BATCH(batch, 0x8C000000); - OUT_BCS_BATCH(batch, 0x00010000); + (0x0600 << 16) | /*InterMbMaxSz 192 Byte*/ + (0x0800) ); /*IntraMbMaxSz 256 Byte*/ + OUT_BCS_BATCH(batch, 0x00000000); /*Reserved : MBZReserved*/ + OUT_BCS_BATCH(batch, 0x01020304); /*Slice QP Delta for bitrate control*/ + OUT_BCS_BATCH(batch, 0xFEFDFCFB); + OUT_BCS_BATCH(batch, 0x80601004); /*MAX = 128KB, MIN = 64KB*/ + OUT_BCS_BATCH(batch, 0x00800001); OUT_BCS_BATCH(batch, 0); ADVANCE_BCS_BATCH(batch); } static void -gen7_mfc_avc_img_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +gen6_mfc_avc_directmode_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; - - int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; - int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; - - BEGIN_BCS_BATCH(batch, 16); - OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); - OUT_BCS_BATCH(batch, - ((width_in_mbs * height_in_mbs) & 0xFFFF)); - OUT_BCS_BATCH(batch, - ((height_in_mbs - 1) << 16) | - ((width_in_mbs - 1) << 0)); - OUT_BCS_BATCH(batch, - (0 << 24) | /* Second Chroma QP Offset */ - (0 << 16) | /* Chroma QP Offset */ - (0 << 14) | /* Max-bit conformance Intra flag */ - (0 << 13) | /* Max Macroblock size conformance Inter flag */ - (0 << 12) | /* FIXME: Weighted_Pred_Flag */ - (0 << 10) | /* FIXME: Weighted_BiPred_Idc */ - (0 << 8) | /* FIXME: Image Structure */ - (0 << 0) ); /* Current Decoed Image Frame Store ID, reserved in Encode mode */ - OUT_BCS_BATCH(batch, - (0 << 16) | /* Mininum Frame size */ - (0 << 15) | /* Disable reading of Macroblock Status Buffer */ - (0 << 14) | /* Load BitStream Pointer only once, 1 slic 1 frame */ - (0 << 13) | /* CABAC 0 word insertion test enable */ - (1 << 12) | /* MVUnpackedEnable,compliant to DXVA */ - (1 << 10) | /* Chroma Format IDC, 4:2:0 */ - (0 << 9) | /* FIXME: MbMvFormatFlag */ - (1 << 7) | /* 0:CAVLC encoding mode,1:CABAC */ - (0 << 6) | /* Only valid for VLD decoding mode */ - (0 << 5) | /* Constrained Intra Predition Flag, from PPS */ - (0 << 4) | /* Direct 8x8 inference flag */ - (0 << 3) | /* Only 8x8 IDCT Transform Mode Flag */ - (1 << 2) | /* Frame MB only flag */ - (0 << 1) | /* MBAFF mode is in active */ - (0 << 0)); /* Field picture flag */ - OUT_BCS_BATCH(batch, 0); /* Mainly about MB rate control and debug, just ignoring */ - OUT_BCS_BATCH(batch, /* Inter and Intra Conformance Max size limit */ - (0xBB8 << 16) | /* InterMbMaxSz */ - (0xEE8) ); /* IntraMbMaxSz */ - OUT_BCS_BATCH(batch, 0); /* Reserved */ - OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ - OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ - OUT_BCS_BATCH(batch, 0x8C000000); - OUT_BCS_BATCH(batch, 0x00010000); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - - ADVANCE_BCS_BATCH(batch); -} + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; -static void gen6_mfc_avc_directmode_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; int i; BEGIN_BCS_BATCH(batch, 69); OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); - //TODO: reference DMV - for(i = 0; i < 16; i++){ - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); + + /* Reference frames and Current frames */ + for(i = 0; i < NUM_MFC_DMV_BUFFERS; i++) { + if ( mfc_context->direct_mv_buffers[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } } - //TODO: current DMV just for test -#if 0 - OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[0].bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - 0); -#else - //drm_intel_bo_pin(mfc_context->direct_mv_buffers[0].bo, 0x1000); - //OUT_BCS_BATCH(batch, mfc_context->direct_mv_buffers[0].bo->offset); + /* POL list */ + for(i = 0; i < 32; i++) { + OUT_BCS_BATCH(batch, i/2); + } OUT_BCS_BATCH(batch, 0); -#endif - - OUT_BCS_BATCH(batch, 0); - //TODO: POL list - for(i = 0; i < 34; i++) { - OUT_BCS_BATCH(batch, 0); - } - ADVANCE_BCS_BATCH(batch); } -static void gen6_mfc_avc_slice_state(VADriverContextP ctx, - int intra_slice, - struct gen6_encoder_context *gen6_encoder_context) +static void +gen6_mfc_avc_slice_state(VADriverContextP ctx, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int rate_control_enable, + int qp, + struct intel_batchbuffer *batch) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int beginmb = slice_param->macroblock_address; + int endmb = beginmb + slice_param->num_macroblocks; + int beginx = beginmb % width_in_mbs; + int beginy = beginmb / width_in_mbs; + int nextx = endmb % width_in_mbs; + int nexty = endmb / width_in_mbs; + int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + int last_slice = (endmb == (width_in_mbs * height_in_mbs)); + int maxQpN, maxQpP; + unsigned char correct[6], grow, shrink; + int i; + int weighted_pred_idc = 0; + unsigned int luma_log2_weight_denom = slice_param->luma_log2_weight_denom; + unsigned int chroma_log2_weight_denom = slice_param->chroma_log2_weight_denom; + int num_ref_l0 = 0, num_ref_l1 = 0; + + if (batch == NULL) + batch = encoder_context->base.batch; + + if (slice_type == SLICE_TYPE_I) { + luma_log2_weight_denom = 0; + chroma_log2_weight_denom = 0; + } else if (slice_type == SLICE_TYPE_P) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + } else if (slice_type == SLICE_TYPE_B) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = pic_param->num_ref_idx_l1_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) { + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + if (weighted_pred_idc == 2) { + /* 8.4.3 - Derivation process for prediction weights (8-279) */ + luma_log2_weight_denom = 5; + chroma_log2_weight_denom = 5; + } + } + + maxQpN = mfc_context->bit_rate_control_context[slice_type].MaxQpNegModifier; + maxQpP = mfc_context->bit_rate_control_context[slice_type].MaxQpPosModifier; + + for (i = 0; i < 6; i++) + correct[i] = mfc_context->bit_rate_control_context[slice_type].Correct[i]; + + grow = mfc_context->bit_rate_control_context[slice_type].GrowInit + + (mfc_context->bit_rate_control_context[slice_type].GrowResistance << 4); + shrink = mfc_context->bit_rate_control_context[slice_type].ShrinkInit + + (mfc_context->bit_rate_control_context[slice_type].ShrinkResistance << 4); BEGIN_BCS_BATCH(batch, 11);; OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2) ); + OUT_BCS_BATCH(batch, slice_type); /*Slice Type: I:P:B Slice*/ - if ( intra_slice ) - OUT_BCS_BATCH(batch, 2); /*Slice Type: I Slice*/ - else - OUT_BCS_BATCH(batch, 0); /*Slice Type: P Slice*/ - - if ( intra_slice ) - OUT_BCS_BATCH(batch, 0); /*no reference frames and pred_weight_table*/ - else - OUT_BCS_BATCH(batch, 0x00010000); /*1 reference frame*/ - - OUT_BCS_BATCH(batch, (0<<24) | /*Enable deblocking operation*/ - (26<<16) | /*Slice Quantization Parameter*/ - 0x0202 ); - OUT_BCS_BATCH(batch, 0); /*First MB X&Y , the postion of current slice*/ - OUT_BCS_BATCH(batch, ( ((mfc_context->surface_state.height+15)/16) << 16) ); + OUT_BCS_BATCH(batch, + (num_ref_l0 << 16) | + (num_ref_l1 << 24) | + (chroma_log2_weight_denom << 8) | + (luma_log2_weight_denom << 0)); OUT_BCS_BATCH(batch, - (0<<31) | /*RateControlCounterEnable = disable*/ - (1<<30) | /*ResetRateControlCounter*/ - (2<<28) | /*RC Triggle Mode = Loose Rate Control*/ - (1<<19) | /*IsLastSlice*/ - (0<<18) | /*BitstreamOutputFlag Compressed BitStream Output Disable Flag 0:enable 1:disable*/ - (0<<17) | /*HeaderPresentFlag*/ - (1<<16) | /*SliceData PresentFlag*/ - (0<<15) | /*TailPresentFlag*/ - (1<<13) | /*RBSP NAL TYPE*/ - (0<<12) ); /*CabacZeroWordInsertionEnable*/ - - OUT_BCS_RELOC(batch, mfc_context->mfc_indirect_pak_bse_object.bo, - I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, - mfc_context->mfc_indirect_pak_bse_object.offset); - - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag<<29) | /*Direct Prediction Type*/ + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + (qp<<16) | /*Slice Quantization Parameter*/ + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (beginy << 24) | /*First MB X&Y , the begin postion of current slice*/ + (beginx << 16) | + slice_param->macroblock_address ); + OUT_BCS_BATCH(batch, (nexty << 16) | nextx); /*Next slice first MB X&Y*/ + OUT_BCS_BATCH(batch, + (0/*rate_control_enable*/ << 31) | /*in CBR mode RateControlCounterEnable = enable*/ + (1 << 30) | /*ResetRateControlCounter*/ + (0 << 28) | /*RC Triggle Mode = Always Rate Control*/ + (4 << 24) | /*RC Stable Tolerance, middle level*/ + (0/*rate_control_enable*/ << 23) | /*RC Panic Enable*/ + (0 << 22) | /*QP mode, don't modfiy CBP*/ + (0 << 21) | /*MB Type Direct Conversion Enabled*/ + (0 << 20) | /*MB Type Skip Conversion Enabled*/ + (last_slice << 19) | /*IsLastSlice*/ + (0 << 18) | /*BitstreamOutputFlag Compressed BitStream Output Disable Flag 0:enable 1:disable*/ + (1 << 17) | /*HeaderPresentFlag*/ + (1 << 16) | /*SliceData PresentFlag*/ + (1 << 15) | /*TailPresentFlag*/ + (1 << 13) | /*RBSP NAL TYPE*/ + (0 << 12) ); /*CabacZeroWordInsertionEnable*/ + OUT_BCS_BATCH(batch, mfc_context->mfc_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, + (maxQpN << 24) | /*Target QP - 24 is lowest QP*/ + (maxQpP << 16) | /*Target QP + 20 is highest QP*/ + (shrink << 8) | + (grow << 0)); + OUT_BCS_BATCH(batch, + (correct[5] << 20) | + (correct[4] << 16) | + (correct[3] << 12) | + (correct[2] << 8) | + (correct[1] << 4) | + (correct[0] << 0)); OUT_BCS_BATCH(batch, 0); ADVANCE_BCS_BATCH(batch); } -static void gen6_mfc_avc_qm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) + +static void gen6_mfc_avc_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct intel_batchbuffer *batch = encoder_context->base.batch; int i; BEGIN_BCS_BATCH(batch, 58); @@ -486,9 +480,9 @@ ADVANCE_BCS_BATCH(batch); } -static void gen6_mfc_avc_fqm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +static void gen6_mfc_avc_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct intel_batchbuffer *batch = encoder_context->base.batch; int i; BEGIN_BCS_BATCH(batch, 113); @@ -502,125 +496,199 @@ } static void -gen7_mfc_qm_state(VADriverContextP ctx, - int qm_type, - unsigned int *qm, - int qm_length, - struct gen6_encoder_context *gen6_encoder_context) +gen6_mfc_avc_insert_object(VADriverContextP ctx, struct intel_encoder_context *encoder_context, + unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag, + struct intel_batchbuffer *batch) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - unsigned int qm_buffer[16]; + if (batch == NULL) + batch = encoder_context->base.batch; - assert(qm_length <= 16); - assert(sizeof(*qm) == 4); - memcpy(qm_buffer, qm, qm_length * 4); + BEGIN_BCS_BATCH(batch, lenght_in_dws + 2); - BEGIN_BCS_BATCH(batch, 18); - OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); - OUT_BCS_BATCH(batch, qm_type << 0); - intel_batchbuffer_data(batch, qm_buffer, 16 * 4); - ADVANCE_BCS_BATCH(batch); -} + OUT_BCS_BATCH(batch, MFC_AVC_INSERT_OBJECT | (lenght_in_dws + 2 - 2)); -static void gen7_mfc_avc_qm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - unsigned int qm[16] = { - 0x10101010, 0x10101010, 0x10101010, 0x10101010, - 0x10101010, 0x10101010, 0x10101010, 0x10101010, - 0x10101010, 0x10101010, 0x10101010, 0x10101010, - 0x10101010, 0x10101010, 0x10101010, 0x10101010 - }; + OUT_BCS_BATCH(batch, + (0 << 16) | /* always start at offset 0 */ + (data_bits_in_last_dw << 8) | + (skip_emul_byte_count << 4) | + (!!emulation_flag << 3) | + ((!!is_last_header) << 2) | + ((!!is_end_of_slice) << 1) | + (0 << 0)); /* FIXME: ??? */ - gen7_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 12, gen6_encoder_context); - gen7_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 12, gen6_encoder_context); - gen7_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 16, gen6_encoder_context); - gen7_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 16, gen6_encoder_context); + intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4); + ADVANCE_BCS_BATCH(batch); } -static void -gen7_mfc_fqm_state(VADriverContextP ctx, - int fqm_type, - unsigned int *fqm, - int fqm_length, - struct gen6_encoder_context *gen6_encoder_context) +void +gen6_mfc_init(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - unsigned int fqm_buffer[32]; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + dri_bo *bo; + int i; + int width_in_mbs = 0; + int height_in_mbs = 0; + int slice_batchbuffer_size; + + if (encoder_context->codec == CODEC_H264) { + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + width_in_mbs = pSequenceParameter->picture_width_in_mbs; + height_in_mbs = pSequenceParameter->picture_height_in_mbs; + } else { + VAEncSequenceParameterBufferMPEG2 *pSequenceParameter = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; - assert(fqm_length <= 32); - assert(sizeof(*fqm) == 4); - memcpy(fqm_buffer, fqm, fqm_length * 4); + assert(encoder_context->codec == CODEC_MPEG2); - BEGIN_BCS_BATCH(batch, 34); - OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2)); - OUT_BCS_BATCH(batch, fqm_type << 0); - intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); - ADVANCE_BCS_BATCH(batch); -} + width_in_mbs = ALIGN(pSequenceParameter->picture_width, 16) / 16; + height_in_mbs = ALIGN(pSequenceParameter->picture_height, 16) / 16; + } -static void gen7_mfc_avc_fqm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - unsigned int qm[32] = { - 0x10001000, 0x10001000, 0x10001000, 0x10001000, - 0x10001000, 0x10001000, 0x10001000, 0x10001000, - 0x10001000, 0x10001000, 0x10001000, 0x10001000, - 0x10001000, 0x10001000, 0x10001000, 0x10001000, - 0x10001000, 0x10001000, 0x10001000, 0x10001000, - 0x10001000, 0x10001000, 0x10001000, 0x10001000, - 0x10001000, 0x10001000, 0x10001000, 0x10001000, - 0x10001000, 0x10001000, 0x10001000, 0x10001000 - }; + slice_batchbuffer_size = 64 * width_in_mbs * height_in_mbs + 4096 + + (SLICE_HEADER + SLICE_TAIL) * encode_state->num_slice_params_ext; - gen7_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 24, gen6_encoder_context); - gen7_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 24, gen6_encoder_context); - gen7_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 32, gen6_encoder_context); - gen7_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 32, gen6_encoder_context); -} + /*Encode common setup for MFC*/ + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; -static void gen6_mfc_avc_ref_idx_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - int i; + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; - BEGIN_BCS_BATCH(batch, 10); + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; - OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8); - OUT_BCS_BATCH(batch, 0); //Select L0 + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; - OUT_BCS_BATCH(batch, 0x80808000); //Only 1 reference - for(i = 0; i < 7; i++) { - OUT_BCS_BATCH(batch, 0x80808080); + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + if (mfc_context->direct_mv_buffers[i].bo != NULL) + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; } - ADVANCE_BCS_BATCH(batch); + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + if (mfc_context->reference_surfaces[i].bo != NULL) + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * 64, + 64); + assert(bo); + mfc_context->intra_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * height_in_mbs * 16, + 64); + assert(bo); + mfc_context->macroblock_status_buffer.bo = bo; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 4 * width_in_mbs * 64, /* 4 * width_in_mbs * 64 */ + 64); + assert(bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 128 * width_in_mbs, /* 2 * widht_in_mbs * 64 */ + 0x1000); + assert(bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, + slice_batchbuffer_size); + mfc_context->aux_batchbuffer_surface.bo = mfc_context->aux_batchbuffer->buffer; + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.pitch = 16; + mfc_context->aux_batchbuffer_surface.num_blocks = mfc_context->aux_batchbuffer->size / 16; + mfc_context->aux_batchbuffer_surface.size_block = 16; + + i965_gpe_context_init(ctx, &mfc_context->gpe_context); +} + +static void gen6_mfc_avc_pipeline_picture_programing( VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_AVC, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen6_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen6_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + mfc_context->avc_img_state(ctx, encode_state, encoder_context); + mfc_context->avc_qm_state(ctx, encoder_context); + mfc_context->avc_fqm_state(ctx, encoder_context); + gen6_mfc_avc_directmode_state(ctx, encoder_context); + intel_mfc_avc_ref_idx_state(ctx, encode_state, encoder_context); } - -static void -gen6_mfc_avc_insert_object(VADriverContextP ctx, int flush_data, struct gen6_encoder_context *gen6_encoder_context) + + +VAStatus +gen6_mfc_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct intel_batchbuffer *batch = encoder_context->base.batch; - BEGIN_BCS_BATCH(batch, 4); + intel_batchbuffer_flush(batch); //run the pipeline - OUT_BCS_BATCH(batch, MFC_AVC_INSERT_OBJECT | (4 -2 ) ); - OUT_BCS_BATCH(batch, (32<<8) | - (1 << 3) | - (1 << 2) | - (flush_data << 1) | - (1<<0) ); - OUT_BCS_BATCH(batch, 0x00000003); - OUT_BCS_BATCH(batch, 0xABCD1234); + return VA_STATUS_SUCCESS; +} - ADVANCE_BCS_BATCH(batch); +VAStatus +gen6_mfc_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int *encoded_bits_size) +{ + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VACodedBufferSegment *coded_buffer_segment; + + vaStatus = i965_MapBuffer(ctx, pPicParameter->coded_buf, (void **)&coded_buffer_segment); + assert(vaStatus == VA_STATUS_SUCCESS); + *encoded_bits_size = coded_buffer_segment->size * 8; + i965_UnmapBuffer(ctx, pPicParameter->coded_buf); + + return VA_STATUS_SUCCESS; } +#if __SOFTWARE__ + static int gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, int qp,unsigned int *msg, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size, unsigned char max_mb_size, + struct intel_batchbuffer *batch) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; int len_in_dwords = 11; + if (batch == NULL) + batch = encoder_context->base.batch; + BEGIN_BCS_BATCH(batch, len_in_dwords); OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); @@ -634,7 +702,7 @@ (1 << 17) | /* CbpDcV */ (msg[0] & 0xFFFF) ); - OUT_BCS_BATCH(batch, (0xFFFF<<16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, (0xFFFF << 16) | (y << 8) | x); /* Code Block Pattern for Y*/ OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ OUT_BCS_BATCH(batch, (0 << 27) | (end_mb << 26) | qp); /* Last MB */ @@ -642,290 +710,673 @@ OUT_BCS_BATCH(batch, msg[1]); /* We using Intra16x16 no 4x4 predmode*/ OUT_BCS_BATCH(batch, msg[2]); OUT_BCS_BATCH(batch, msg[3]&0xFC); - - OUT_BCS_BATCH(batch, 0x8040000); /*MaxSizeInWord and TargetSzieInWord*/ + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); ADVANCE_BCS_BATCH(batch); return len_in_dwords; } -static int gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, unsigned int offset, - struct gen6_encoder_context *gen6_encoder_context) +static int +gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, + unsigned int *msg, unsigned int offset, + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size,unsigned char max_mb_size, int slice_type, + struct intel_batchbuffer *batch) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct gen6_vme_context *vme_context = encoder_context->vme_context; int len_in_dwords = 11; + if (batch == NULL) + batch = encoder_context->base.batch; + BEGIN_BCS_BATCH(batch, len_in_dwords); OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); - OUT_BCS_BATCH(batch, 32); /* 32 MV*/ + OUT_BCS_BATCH(batch, msg[2]); /* 32 MV*/ OUT_BCS_BATCH(batch, offset); - OUT_BCS_BATCH(batch, - (1 << 24) | /* PackedMvNum, Debug*/ - (4 << 20) | /* 8 MV, SNB don't use it*/ - (1 << 19) | /* CbpDcY */ - (1 << 18) | /* CbpDcU */ - (1 << 17) | /* CbpDcV */ - (0 << 15) | /* Transform8x8Flag = 0*/ - (0 << 14) | /* Frame based*/ - (0 << 13) | /* Inter MB */ - (1 << 8) | /* MbType = P_L0_16x16 */ - (0 << 7) | /* MBZ for frame */ - (0 << 6) | /* MBZ */ - (2 << 4) | /* MBZ for inter*/ - (0 << 3) | /* MBZ */ - (0 << 2) | /* SkipMbFlag */ - (0 << 0)); /* InterMbMode */ + OUT_BCS_BATCH(batch, msg[0]); OUT_BCS_BATCH(batch, (0xFFFF<<16) | (y << 8) | x); /* Code Block Pattern for Y*/ - OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ - OUT_BCS_BATCH(batch, (0 << 27) | (end_mb << 26) | qp); /* Last MB */ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ +#if 0 + if ( slice_type == SLICE_TYPE_B) { + OUT_BCS_BATCH(batch, (0xF<<28) | (end_mb << 26) | qp); /* Last MB */ + } else { + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ + } +#else + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ +#endif - /*Stuff for Inter MB*/ - OUT_BCS_BATCH(batch, 0x0); - OUT_BCS_BATCH(batch, 0x0); - OUT_BCS_BATCH(batch, 0x0); - OUT_BCS_BATCH(batch, 0xF0020000); /*MaxSizeInWord and TargetSzieInWord*/ + /*Stuff for Inter MB*/ + OUT_BCS_BATCH(batch, msg[1]); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[0]); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[1]); + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); ADVANCE_BCS_BATCH(batch); return len_in_dwords; } -static void gen6_mfc_init(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; - dri_bo *bo; - int i; +static void +gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + unsigned int *msg = NULL, offset = 0; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int i,x,y; + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int is_intra = slice_type == SLICE_TYPE_I; + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + qp_slice = qp; + } + } - /*Encode common setup for MFC*/ - dri_bo_unreference(mfc_context->post_deblocking_output.bo); - mfc_context->post_deblocking_output.bo = NULL; + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + gen6_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, encoder_context, + (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch); - dri_bo_unreference(mfc_context->pre_deblocking_output.bo); - mfc_context->pre_deblocking_output.bo = NULL; + if ( slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); - dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); - mfc_context->uncompressed_picture_source.bo = NULL; + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); - dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); - mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + dri_bo_map(vme_context->vme_output.bo , 1); + msg = (unsigned int *)vme_context->vme_output.bo->virtual; - for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ - dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); - mfc_context->direct_mv_buffers[i].bo = NULL; + if (is_intra) { + msg += pSliceParameter->macroblock_address * INTRA_VME_OUTPUT_IN_DWS; + } else { + msg += pSliceParameter->macroblock_address * INTER_VME_OUTPUT_IN_DWS; + msg += 32; /* the first 32 DWs are MVs */ + offset = pSliceParameter->macroblock_address * INTER_VME_OUTPUT_IN_BYTES; } + + for (i = pSliceParameter->macroblock_address; + i < pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks; i++) { + int last_mb = (i == (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks - 1) ); + x = i % width_in_mbs; + y = i / width_in_mbs; + + if (is_intra) { + assert(msg); + gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + msg += INTRA_VME_OUTPUT_IN_DWS; + } else { + if (msg[0] & INTRA_MB_FLAG_MASK) { + gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + } else { + gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, msg, offset, encoder_context, 0, 0, slice_type, slice_batch); + } - for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ - if (mfc_context->reference_surfaces[i].bo != NULL) - dri_bo_unreference(mfc_context->reference_surfaces[i].bo); - mfc_context->reference_surfaces[i].bo = NULL; + msg += INTER_VME_OUTPUT_IN_DWS; + offset += INTER_VME_OUTPUT_IN_BYTES; + } } + + dri_bo_unmap(vme_context->vme_output.bo); - dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "Buffer", - 128 * 64, - 64); - assert(bo); - mfc_context->intra_row_store_scratch_buffer.bo = bo; + if ( last_slice ) { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 2, 8, + 2, 1, 1, 0, slice_batch); + } else { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 1, 8, + 1, 1, 1, 0, slice_batch); + } - dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "Buffer", - 49152, /* 6 * 128 * 64 */ - 64); - assert(bo); - mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; - dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "Buffer", - 12288, /* 1.5 * 128 * 64 */ - 0x1000); - assert(bo); - mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; } -void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx, - struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) +static dri_bo * +gen6_mfc_avc_software_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch;; + dri_bo *batch_bo; + int i; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + gen6_mfc_avc_pipeline_slice_programing(ctx, encode_state, encoder_context, i, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +#else + +static void +gen6_mfc_batchbuffer_surfaces_input(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(vme_context->vme_output.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(BIND_IDX_VME_OUTPUT), + SURFACE_STATE_OFFSET(BIND_IDX_VME_OUTPUT)); + assert(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &mfc_context->aux_batchbuffer_surface, + BINDING_TABLE_OFFSET(BIND_IDX_MFC_SLICE_HEADER), + SURFACE_STATE_OFFSET(BIND_IDX_MFC_SLICE_HEADER)); +} + +static void +gen6_mfc_batchbuffer_surfaces_output(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; - VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; /* FIXME: multi slices */ - unsigned int *msg = NULL, offset = 0; - int emit_new_state = 1, object_len_in_bytes; - int is_intra = pSliceParameter->slice_flags.bits.is_intra; - int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; - int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; - int x,y; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + mfc_context->mfc_batchbuffer_surface.num_blocks = width_in_mbs * height_in_mbs + encode_state->num_slice_params_ext * 8 + 1; + mfc_context->mfc_batchbuffer_surface.size_block = 16 * CMD_LEN_IN_OWORD; /* 3 OWORDs */ + mfc_context->mfc_batchbuffer_surface.pitch = 16; + mfc_context->mfc_batchbuffer_surface.bo = dri_bo_alloc(i965->intel.bufmgr, + "MFC batchbuffer", + mfc_context->mfc_batchbuffer_surface.num_blocks * mfc_context->mfc_batchbuffer_surface.size_block, + 0x1000); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &mfc_context->mfc_batchbuffer_surface, + BINDING_TABLE_OFFSET(BIND_IDX_MFC_BATCHBUFFER), + SURFACE_STATE_OFFSET(BIND_IDX_MFC_BATCHBUFFER)); +} - intel_batchbuffer_start_atomic_bcs(batch, 0x1000); +static void +gen6_mfc_batchbuffer_surfaces_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen6_mfc_batchbuffer_surfaces_input(ctx, encode_state, encoder_context); + gen6_mfc_batchbuffer_surfaces_output(ctx, encode_state, encoder_context); +} - if (is_intra) { - dri_bo_map(vme_context->vme_output.bo , 1); - msg = (unsigned int *)vme_context->vme_output.bo->virtual; +static void +gen6_mfc_batchbuffer_idrt_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_interface_descriptor_data *desc; + int i; + dri_bo *bo; + + bo = mfc_context->gpe_context.idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < mfc_context->gpe_context.num_kernels; i++) { + struct i965_kernel *kernel; + + kernel = &mfc_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 0; + desc->desc2.sampler_state_pointer = 0; + desc->desc3.binding_table_entry_count = 2; + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = 4; + + /*kernel start*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + desc++; } - for (y = 0; y < height_in_mbs; y++) { - for (x = 0; x < width_in_mbs; x++) { - int last_mb = (y == (height_in_mbs-1)) && ( x == (width_in_mbs-1) ); - int qp = pSequenceParameter->initial_qp; - - if (emit_new_state) { - intel_batchbuffer_emit_mi_flush(batch); - - if (IS_GEN7(i965->intel.device_id)) { - gen7_mfc_pipe_mode_select(ctx, MFX_FORMAT_AVC, gen6_encoder_context); - gen7_mfc_surface_state(ctx, gen6_encoder_context); - gen7_mfc_ind_obj_base_addr_state(ctx, gen6_encoder_context); - } else { - gen6_mfc_pipe_mode_select(ctx, gen6_encoder_context); - gen6_mfc_surface_state(ctx, gen6_encoder_context); - gen6_mfc_ind_obj_base_addr_state(ctx, gen6_encoder_context); - } + dri_bo_unmap(bo); +} - gen6_mfc_pipe_buf_addr_state(ctx, gen6_encoder_context); - gen6_mfc_bsp_buf_base_addr_state(ctx, gen6_encoder_context); +static void +gen6_mfc_batchbuffer_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + (void)mfc_context; +} - if (IS_GEN7(i965->intel.device_id)) { - gen7_mfc_avc_img_state(ctx, gen6_encoder_context); - gen7_mfc_avc_qm_state(ctx, gen6_encoder_context); - gen7_mfc_avc_fqm_state(ctx, gen6_encoder_context); - } else { - gen6_mfc_avc_img_state(ctx, gen6_encoder_context); - gen6_mfc_avc_qm_state(ctx, gen6_encoder_context); - gen6_mfc_avc_fqm_state(ctx, gen6_encoder_context); - } +static void +gen6_mfc_batchbuffer_emit_object_command(struct intel_batchbuffer *batch, + int index, + int head_offset, + int batchbuffer_offset, + int head_size, + int tail_size, + int number_mb_cmds, + int first_object, + int last_object, + int last_slice, + int mb_x, + int mb_y, + int width_in_mbs, + int qp, + unsigned int ref_index[2]) +{ + BEGIN_BATCH(batch, 14); + + OUT_BATCH(batch, CMD_MEDIA_OBJECT | (14 - 2)); + OUT_BATCH(batch, index); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /*inline data */ + OUT_BATCH(batch, head_offset); + OUT_BATCH(batch, batchbuffer_offset); + OUT_BATCH(batch, + head_size << 16 | + tail_size); + OUT_BATCH(batch, + number_mb_cmds << 16 | + first_object << 2 | + last_object << 1 | + last_slice); + OUT_BATCH(batch, + mb_y << 8 | + mb_x); + OUT_BATCH(batch, + qp << 16 | + width_in_mbs); + OUT_BATCH(batch, ref_index[0]); + OUT_BATCH(batch, ref_index[1]); - gen6_mfc_avc_ref_idx_state(ctx, gen6_encoder_context); - gen6_mfc_avc_slice_state(ctx, is_intra, gen6_encoder_context); - emit_new_state = 0; - } + ADVANCE_BATCH(batch); +} - if (is_intra) { - assert(msg); - object_len_in_bytes = gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, gen6_encoder_context); - msg += 4; - } else { - object_len_in_bytes = gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, offset, gen6_encoder_context); - offset += 64; - } +static void +gen6_mfc_avc_batchbuffer_slice_command(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncSliceParameterBufferH264 *slice_param, + int head_offset, + unsigned short head_size, + unsigned short tail_size, + int batchbuffer_offset, + int qp, + int last_slice) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int total_mbs = slice_param->num_macroblocks; + int number_mb_cmds = 128; + int starting_mb = 0; + int last_object = 0; + int first_object = 1; + int i; + int mb_x, mb_y; + int index = (slice_param->slice_type == SLICE_TYPE_I) ? MFC_BATCHBUFFER_AVC_INTRA : MFC_BATCHBUFFER_AVC_INTER; - if (intel_batchbuffer_check_free_space(batch, object_len_in_bytes) == 0) { - intel_batchbuffer_end_atomic(batch); - intel_batchbuffer_flush(batch); - emit_new_state = 1; - intel_batchbuffer_start_atomic_bcs(batch, 0x1000); - } + for (i = 0; i < total_mbs / number_mb_cmds; i++) { + last_object = (total_mbs - starting_mb) == number_mb_cmds; + mb_x = (slice_param->macroblock_address + starting_mb) % width_in_mbs; + mb_y = (slice_param->macroblock_address + starting_mb) / width_in_mbs; + assert(mb_x <= 255 && mb_y <= 255); + + starting_mb += number_mb_cmds; + + gen6_mfc_batchbuffer_emit_object_command(batch, + index, + head_offset, + batchbuffer_offset, + head_size, + tail_size, + number_mb_cmds, + first_object, + last_object, + last_slice, + mb_x, + mb_y, + width_in_mbs, + qp, + vme_context->ref_index_in_mb); + + if (first_object) { + head_offset += head_size; + batchbuffer_offset += head_size; + } + + if (last_object) { + head_offset += tail_size; + batchbuffer_offset += tail_size; } + + batchbuffer_offset += number_mb_cmds * CMD_LEN_IN_OWORD; + + first_object = 0; } - if (is_intra) - dri_bo_unmap(vme_context->vme_output.bo); - - intel_batchbuffer_end_atomic(batch); + if (!last_object) { + last_object = 1; + number_mb_cmds = total_mbs % number_mb_cmds; + mb_x = (slice_param->macroblock_address + starting_mb) % width_in_mbs; + mb_y = (slice_param->macroblock_address + starting_mb) / width_in_mbs; + assert(mb_x <= 255 && mb_y <= 255); + starting_mb += number_mb_cmds; + + gen6_mfc_batchbuffer_emit_object_command(batch, + index, + head_offset, + batchbuffer_offset, + head_size, + tail_size, + number_mb_cmds, + first_object, + last_object, + last_slice, + mb_x, + mb_y, + width_in_mbs, + qp, + vme_context->ref_index_in_mb); + } } + +/* + * return size in Owords (16bytes) + */ +static int +gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + int batchbuffer_offset) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *slice_batch = mfc_context->aux_batchbuffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + long head_offset; + int old_used = intel_batchbuffer_used_size(slice_batch), used; + unsigned short head_size, tail_size; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + /* Use the adjusted qp when slice_header is generated by driver */ + qp_slice = qp; + } + } -static VAStatus gen6_mfc_avc_prepare(VADriverContextP ctx, - struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; - struct object_surface *obj_surface; - struct object_buffer *obj_buffer; - dri_bo *bo; - VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; - VAStatus vaStatus = VA_STATUS_SUCCESS; + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + head_offset = old_used / 16; + gen6_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, + encoder_context, + (rate_control_mode == VA_RC_CBR), + qp_slice, + slice_batch); + + if (slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + used = intel_batchbuffer_used_size(slice_batch); + head_size = (used - old_used) / 16; + old_used = used; + + /* tail */ + if (last_slice) { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 2, + 8, + 2, + 1, + 1, + 0, + slice_batch); + } else { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 1, + 8, + 1, + 1, + 1, + 0, + slice_batch); + } - /*Setup all the input&output object*/ - obj_surface = SURFACE(pPicParameter->reconstructed_picture); - assert(obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); - - mfc_context->post_deblocking_output.bo = obj_surface->bo; - dri_bo_reference(mfc_context->post_deblocking_output.bo); - - mfc_context->surface_state.width = obj_surface->orig_width; - mfc_context->surface_state.height = obj_surface->orig_height; - mfc_context->surface_state.w_pitch = obj_surface->width; - mfc_context->surface_state.h_pitch = obj_surface->height; - - obj_surface = SURFACE(pPicParameter->reference_picture); - assert(obj_surface); - if (obj_surface->bo != NULL) { - mfc_context->reference_surfaces[0].bo = obj_surface->bo; - dri_bo_reference(obj_surface->bo); - } - - obj_surface = SURFACE(encode_state->current_render_target); - assert(obj_surface && obj_surface->bo); - mfc_context->uncompressed_picture_source.bo = obj_surface->bo; - dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + used = intel_batchbuffer_used_size(slice_batch); + tail_size = (used - old_used) / 16; + + + gen6_mfc_avc_batchbuffer_slice_command(ctx, + encoder_context, + pSliceParameter, + head_offset, + head_size, + tail_size, + batchbuffer_offset, + qp, + last_slice); - obj_buffer = BUFFER (pPicParameter->coded_buf); /* FIXME: fix this later */ - bo = obj_buffer->buffer_store->bo; - assert(bo); - mfc_context->mfc_indirect_pak_bse_object.bo = bo; - mfc_context->mfc_indirect_pak_bse_object.offset = ALIGN(sizeof(VACodedBufferSegment), 64); - dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); - - /*Programing bcs pipeline*/ - gen6_mfc_avc_pipeline_programing(ctx, encode_state, gen6_encoder_context); //filling the pipeline - - return vaStatus; + return head_size + tail_size + pSliceParameter->num_macroblocks * CMD_LEN_IN_OWORD; } -static VAStatus gen6_mfc_run(VADriverContextP ctx, - struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; +static void +gen6_mfc_avc_batchbuffer_pipeline(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + int i, size, offset = 0; + intel_batchbuffer_start_atomic(batch, 0x4000); + gen6_gpe_pipeline_setup(ctx, &mfc_context->gpe_context, batch); + + for ( i = 0; i < encode_state->num_slice_params_ext; i++) { + size = gen6_mfc_avc_batchbuffer_slice(ctx, encode_state, encoder_context, i, offset); + offset += size; + } - intel_batchbuffer_flush(batch); //run the pipeline + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} - return VA_STATUS_SUCCESS; +static void +gen6_mfc_build_avc_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen6_mfc_batchbuffer_surfaces_setup(ctx, encode_state, encoder_context); + gen6_mfc_batchbuffer_idrt_setup(ctx, encode_state, encoder_context); + gen6_mfc_batchbuffer_constant_setup(ctx, encode_state, encoder_context); + gen6_mfc_avc_batchbuffer_pipeline(ctx, encode_state, encoder_context); } -static VAStatus gen6_mfc_stop(VADriverContextP ctx, - struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) +static dri_bo * +gen6_mfc_avc_hardware_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) { -#if 0 - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context; - - VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; - - struct object_surface *obj_surface = SURFACE(pPicParameter->reconstructed_picture); - //struct object_surface *obj_surface = SURFACE(pPicParameter->reference_picture[0]); - //struct object_surface *obj_surface = SURFACE(encode_state->current_render_target); - my_debug(obj_surface); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + gen6_mfc_build_avc_batchbuffer(ctx, encode_state, encoder_context); + dri_bo_reference(mfc_context->mfc_batchbuffer_surface.bo); + + return mfc_context->mfc_batchbuffer_surface.bo; +} #endif - return VA_STATUS_SUCCESS; + +static void +gen6_mfc_avc_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + if ( intel_mfc_interlace_check(ctx, encode_state, encoder_context) ) { + fprintf(stderr, "Current VA driver don't support interlace mode!\n"); + assert(0); + return; + } + +#if __SOFTWARE__ + slice_batch_bo = gen6_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); +#else + slice_batch_bo = gen6_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); +#endif + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen6_mfc_avc_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); } -static VAStatus +VAStatus gen6_mfc_avc_encode_picture(VADriverContextP ctx, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - gen6_mfc_init(ctx, gen6_encoder_context); - gen6_mfc_avc_prepare(ctx, encode_state, gen6_encoder_context); - gen6_mfc_run(ctx, encode_state, gen6_encoder_context); - gen6_mfc_stop(ctx, encode_state, gen6_encoder_context); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int current_frame_bits_size; + int sts; + + for (;;) { + gen6_mfc_init(ctx, encode_state, encoder_context); + intel_mfc_avc_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen6_mfc_avc_pipeline_programing(ctx, encode_state, encoder_context); //filling the pipeline + gen6_mfc_run(ctx, encode_state, encoder_context); + if (rate_control_mode == VA_RC_CBR /*|| rate_control_mode == VA_RC_VBR*/) { + gen6_mfc_stop(ctx, encode_state, encoder_context, ¤t_frame_bits_size); + sts = intel_mfc_brc_postpack(encode_state, mfc_context, current_frame_bits_size); + if (sts == BRC_NO_HRD_VIOLATION) { + intel_mfc_hrd_context_update(encode_state, mfc_context); + break; + } + else if (sts == BRC_OVERFLOW_WITH_MIN_QP || sts == BRC_UNDERFLOW_WITH_MAX_QP) { + if (!mfc_context->hrd.violation_noted) { + fprintf(stderr, "Unrepairable %s!\n", (sts == BRC_OVERFLOW_WITH_MIN_QP)? "overflow": "underflow"); + mfc_context->hrd.violation_noted = 1; + } + return VA_STATUS_SUCCESS; + } + } else { + break; + } + } return VA_STATUS_SUCCESS; } @@ -934,13 +1385,15 @@ gen6_mfc_pipeline(VADriverContextP ctx, VAProfile profile, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { VAStatus vaStatus; switch (profile) { - case VAProfileH264Baseline: - vaStatus = gen6_mfc_avc_encode_picture(ctx, encode_state, gen6_encoder_context); + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + vaStatus = gen6_mfc_avc_encode_picture(ctx, encode_state, encoder_context); break; /* FIXME: add for other profile */ @@ -952,13 +1405,10 @@ return vaStatus; } -Bool gen6_mfc_context_init(VADriverContextP ctx, struct gen6_mfc_context *mfc_context) -{ - return True; -} - -Bool gen6_mfc_context_destroy(struct gen6_mfc_context *mfc_context) +void +gen6_mfc_context_destroy(void *context) { + struct gen6_mfc_context *mfc_context = context; int i; dri_bo_unreference(mfc_context->post_deblocking_output.bo); @@ -981,11 +1431,75 @@ dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); mfc_context->intra_row_store_scratch_buffer.bo = NULL; + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + mfc_context->macroblock_status_buffer.bo = NULL; + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); mfc_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); mfc_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + i965_gpe_context_destroy(&mfc_context->gpe_context); + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = NULL; + + free(mfc_context); +} + +Bool gen6_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = calloc(1, sizeof(struct gen6_mfc_context)); + + if (!mfc_context) + return False; + + mfc_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + mfc_context->gpe_context.idrt.max_entries = MAX_GPE_KERNELS; + mfc_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + + mfc_context->gpe_context.curbe.length = 32 * 4; + + mfc_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + mfc_context->gpe_context.vfe_state.num_urb_entries = 16; + mfc_context->gpe_context.vfe_state.gpgpu_mode = 0; + mfc_context->gpe_context.vfe_state.urb_entry_size = 59 - 1; + mfc_context->gpe_context.vfe_state.curbe_allocation_size = 37 - 1; + + i965_gpe_load_kernels(ctx, + &mfc_context->gpe_context, + gen6_mfc_kernels, + NUM_MFC_KERNEL); + + mfc_context->pipe_mode_select = gen6_mfc_pipe_mode_select; + mfc_context->set_surface_state = gen6_mfc_surface_state; + mfc_context->ind_obj_base_addr_state = gen6_mfc_ind_obj_base_addr_state; + mfc_context->avc_img_state = gen6_mfc_avc_img_state; + mfc_context->avc_qm_state = gen6_mfc_avc_qm_state; + mfc_context->avc_fqm_state = gen6_mfc_avc_fqm_state; + mfc_context->insert_object = gen6_mfc_avc_insert_object; + mfc_context->buffer_suface_setup = i965_gpe_buffer_suface_setup; + + encoder_context->mfc_context = mfc_context; + encoder_context->mfc_context_destroy = gen6_mfc_context_destroy; + encoder_context->mfc_pipeline = gen6_mfc_pipeline; + encoder_context->mfc_brc_prepare = intel_mfc_brc_prepare; + return True; } diff -Nru intel-vaapi-driver-1.0.15/src/gen6_mfc_common.c intel-vaapi-driver-1.7.1/src/gen6_mfc_common.c --- intel-vaapi-driver-1.0.15/src/gen6_mfc_common.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen6_mfc_common.c 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,1874 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * Zhao Yakui + * + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "gen6_mfc.h" +#include "gen6_vme.h" +#include "gen9_mfc.h" +#include "intel_media.h" + +#ifndef HAVE_LOG2F +#define log2f(x) (logf(x)/(float)M_LN2) +#endif + +int intel_avc_enc_slice_type_fixup(int slice_type) +{ + if (slice_type == SLICE_TYPE_SP || + slice_type == SLICE_TYPE_P) + slice_type = SLICE_TYPE_P; + else if (slice_type == SLICE_TYPE_SI || + slice_type == SLICE_TYPE_I) + slice_type = SLICE_TYPE_I; + else { + if (slice_type != SLICE_TYPE_B) + WARN_ONCE("Invalid slice type for H.264 encoding!\n"); + + slice_type = SLICE_TYPE_B; + } + + return slice_type; +} + +static void +intel_mfc_bit_rate_control_context_init(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context) +{ + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + float fps = pSequenceParameter->time_scale * 0.5 / pSequenceParameter->num_units_in_tick ; + int inter_mb_size = pSequenceParameter->bits_per_second * 1.0 / (fps+4.0) / width_in_mbs / height_in_mbs; + int intra_mb_size = inter_mb_size * 5.0; + int i; + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_mb_size = intra_mb_size; + mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_frame_size = intra_mb_size * width_in_mbs * height_in_mbs; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_mb_size = inter_mb_size; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs; + mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_mb_size = inter_mb_size; + mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs; + + for(i = 0 ; i < 3; i++) { + mfc_context->bit_rate_control_context[i].QpPrimeY = 26; + mfc_context->bit_rate_control_context[i].MaxQpNegModifier = 6; + mfc_context->bit_rate_control_context[i].MaxQpPosModifier = 6; + mfc_context->bit_rate_control_context[i].GrowInit = 6; + mfc_context->bit_rate_control_context[i].GrowResistance = 4; + mfc_context->bit_rate_control_context[i].ShrinkInit = 6; + mfc_context->bit_rate_control_context[i].ShrinkResistance = 4; + + mfc_context->bit_rate_control_context[i].Correct[0] = 8; + mfc_context->bit_rate_control_context[i].Correct[1] = 4; + mfc_context->bit_rate_control_context[i].Correct[2] = 2; + mfc_context->bit_rate_control_context[i].Correct[3] = 2; + mfc_context->bit_rate_control_context[i].Correct[4] = 4; + mfc_context->bit_rate_control_context[i].Correct[5] = 8; + } + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord = (intra_mb_size + 16)/ 16; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord = (inter_mb_size + 16)/ 16; + mfc_context->bit_rate_control_context[SLICE_TYPE_B].TargetSizeInWord = (inter_mb_size + 16)/ 16; + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord * 1.5; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord * 1.5; + mfc_context->bit_rate_control_context[SLICE_TYPE_B].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_B].TargetSizeInWord * 1.5; +} + +static void intel_mfc_brc_init(struct encode_state *encode_state, + struct intel_encoder_context* encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncMiscParameterBuffer* pMiscParamHRD = NULL; + VAEncMiscParameterHRD* pParameterHRD = NULL; + double bitrate = pSequenceParameter->bits_per_second; + double framerate = (double)pSequenceParameter->time_scale /(2 * (double)pSequenceParameter->num_units_in_tick); + int inum = 1, pnum = 0, bnum = 0; /* Gop structure: number of I, P, B frames in the Gop. */ + int intra_period = pSequenceParameter->intra_period; + int ip_period = pSequenceParameter->ip_period; + double qp1_size = 0.1 * 8 * 3 * (pSequenceParameter->picture_width_in_mbs<<4) * (pSequenceParameter->picture_height_in_mbs<<4)/2; + double qp51_size = 0.001 * 8 * 3 * (pSequenceParameter->picture_width_in_mbs<<4) * (pSequenceParameter->picture_height_in_mbs<<4)/2; + double bpf; + + if (!encode_state->misc_param[VAEncMiscParameterTypeHRD] || !encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer) + return; + + pMiscParamHRD = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer; + pParameterHRD = (VAEncMiscParameterHRD*)pMiscParamHRD->data; + + if (pSequenceParameter->ip_period) { + pnum = (intra_period + ip_period - 1)/ip_period - 1; + bnum = intra_period - inum - pnum; + } + + mfc_context->brc.mode = encoder_context->rate_control_mode; + + mfc_context->brc.target_frame_size[SLICE_TYPE_I] = (int)((double)((bitrate * intra_period)/framerate) / + (double)(inum + BRC_PWEIGHT * pnum + BRC_BWEIGHT * bnum)); + mfc_context->brc.target_frame_size[SLICE_TYPE_P] = BRC_PWEIGHT * mfc_context->brc.target_frame_size[SLICE_TYPE_I]; + mfc_context->brc.target_frame_size[SLICE_TYPE_B] = BRC_BWEIGHT * mfc_context->brc.target_frame_size[SLICE_TYPE_I]; + + mfc_context->brc.gop_nums[SLICE_TYPE_I] = inum; + mfc_context->brc.gop_nums[SLICE_TYPE_P] = pnum; + mfc_context->brc.gop_nums[SLICE_TYPE_B] = bnum; + + bpf = mfc_context->brc.bits_per_frame = bitrate/framerate; + + mfc_context->hrd.buffer_size = (double)pParameterHRD->buffer_size; + mfc_context->hrd.current_buffer_fullness = + (double)(pParameterHRD->initial_buffer_fullness < mfc_context->hrd.buffer_size)? + pParameterHRD->initial_buffer_fullness: mfc_context->hrd.buffer_size/2.; + mfc_context->hrd.target_buffer_fullness = (double)mfc_context->hrd.buffer_size/2.; + mfc_context->hrd.buffer_capacity = (double)mfc_context->hrd.buffer_size/qp1_size; + mfc_context->hrd.violation_noted = 0; + + if ((bpf > qp51_size) && (bpf < qp1_size)) { + mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 51 - 50*(bpf - qp51_size)/(qp1_size - qp51_size); + } + else if (bpf >= qp1_size) + mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 1; + else if (bpf <= qp51_size) + mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = 51; + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY = mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY; + mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY = mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY; + + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY, 1, 51); +} + +int intel_mfc_update_hrd(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context, + int frame_bits) +{ + double prev_bf = mfc_context->hrd.current_buffer_fullness; + + mfc_context->hrd.current_buffer_fullness -= frame_bits; + + if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness <= 0.) { + mfc_context->hrd.current_buffer_fullness = prev_bf; + return BRC_UNDERFLOW; + } + + mfc_context->hrd.current_buffer_fullness += mfc_context->brc.bits_per_frame; + if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness > mfc_context->hrd.buffer_size) { + if (mfc_context->brc.mode == VA_RC_VBR) + mfc_context->hrd.current_buffer_fullness = mfc_context->hrd.buffer_size; + else { + mfc_context->hrd.current_buffer_fullness = prev_bf; + return BRC_OVERFLOW; + } + } + return BRC_NO_HRD_VIOLATION; +} + +int intel_mfc_brc_postpack(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context, + int frame_bits) +{ + gen6_brc_status sts = BRC_NO_HRD_VIOLATION; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int slicetype = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int qpi = mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY; + int qpp = mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY; + int qpb = mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY; + int qp; // quantizer of previously encoded slice of current type + int qpn; // predicted quantizer for next frame of current type in integer format + double qpf; // predicted quantizer for next frame of current type in float format + double delta_qp; // QP correction + int target_frame_size, frame_size_next; + /* Notes: + * x - how far we are from HRD buffer borders + * y - how far we are from target HRD buffer fullness + */ + double x, y; + double frame_size_alpha; + + qp = mfc_context->bit_rate_control_context[slicetype].QpPrimeY; + + target_frame_size = mfc_context->brc.target_frame_size[slicetype]; + if (mfc_context->hrd.buffer_capacity < 5) + frame_size_alpha = 0; + else + frame_size_alpha = (double)mfc_context->brc.gop_nums[slicetype]; + if (frame_size_alpha > 30) frame_size_alpha = 30; + frame_size_next = target_frame_size + (double)(target_frame_size - frame_bits) / + (double)(frame_size_alpha + 1.); + + /* frame_size_next: avoiding negative number and too small value */ + if ((double)frame_size_next < (double)(target_frame_size * 0.25)) + frame_size_next = (int)((double)target_frame_size * 0.25); + + qpf = (double)qp * target_frame_size / frame_size_next; + qpn = (int)(qpf + 0.5); + + if (qpn == qp) { + /* setting qpn we round qpf making mistakes: now we are trying to compensate this */ + mfc_context->brc.qpf_rounding_accumulator += qpf - qpn; + if (mfc_context->brc.qpf_rounding_accumulator > 1.0) { + qpn++; + mfc_context->brc.qpf_rounding_accumulator = 0.; + } else if (mfc_context->brc.qpf_rounding_accumulator < -1.0) { + qpn--; + mfc_context->brc.qpf_rounding_accumulator = 0.; + } + } + /* making sure that QP is not changing too fast */ + if ((qpn - qp) > BRC_QP_MAX_CHANGE) qpn = qp + BRC_QP_MAX_CHANGE; + else if ((qpn - qp) < -BRC_QP_MAX_CHANGE) qpn = qp - BRC_QP_MAX_CHANGE; + /* making sure that with QP predictions we did do not leave QPs range */ + BRC_CLIP(qpn, 1, 51); + + /* checking wthether HRD compliance is still met */ + sts = intel_mfc_update_hrd(encode_state, mfc_context, frame_bits); + + /* calculating QP delta as some function*/ + x = mfc_context->hrd.target_buffer_fullness - mfc_context->hrd.current_buffer_fullness; + if (x > 0) { + x /= mfc_context->hrd.target_buffer_fullness; + y = mfc_context->hrd.current_buffer_fullness; + } + else { + x /= (mfc_context->hrd.buffer_size - mfc_context->hrd.target_buffer_fullness); + y = mfc_context->hrd.buffer_size - mfc_context->hrd.current_buffer_fullness; + } + if (y < 0.01) y = 0.01; + if (x > 1) x = 1; + else if (x < -1) x = -1; + + delta_qp = BRC_QP_MAX_CHANGE*exp(-1/y)*sin(BRC_PI_0_5 * x); + qpn = (int)(qpn + delta_qp + 0.5); + + /* making sure that with QP predictions we did do not leave QPs range */ + BRC_CLIP(qpn, 1, 51); + + if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation + /* correcting QPs of slices of other types */ + if (slicetype == SLICE_TYPE_P) { + if (abs(qpn + BRC_P_B_QP_DIFF - qpb) > 2) + mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_P_B_QP_DIFF - qpb) >> 1; + if (abs(qpn - BRC_I_P_QP_DIFF - qpi) > 2) + mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_P_QP_DIFF - qpi) >> 1; + } else if (slicetype == SLICE_TYPE_I) { + if (abs(qpn + BRC_I_B_QP_DIFF - qpb) > 4) + mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_I_B_QP_DIFF - qpb) >> 2; + if (abs(qpn + BRC_I_P_QP_DIFF - qpp) > 2) + mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn + BRC_I_P_QP_DIFF - qpp) >> 2; + } else { // SLICE_TYPE_B + if (abs(qpn - BRC_P_B_QP_DIFF - qpp) > 2) + mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn - BRC_P_B_QP_DIFF - qpp) >> 1; + if (abs(qpn - BRC_I_B_QP_DIFF - qpi) > 4) + mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_B_QP_DIFF - qpi) >> 2; + } + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY, 1, 51); + } else if (sts == BRC_UNDERFLOW) { // underflow + if (qpn <= qp) qpn = qp + 1; + if (qpn > 51) { + qpn = 51; + sts = BRC_UNDERFLOW_WITH_MAX_QP; //underflow with maxQP + } + } else if (sts == BRC_OVERFLOW) { + if (qpn >= qp) qpn = qp - 1; + if (qpn < 1) { // < 0 (?) overflow with minQP + qpn = 1; + sts = BRC_OVERFLOW_WITH_MIN_QP; // bit stuffing to be done + } + } + + mfc_context->bit_rate_control_context[slicetype].QpPrimeY = qpn; + + return sts; +} + +static void intel_mfc_hrd_context_init(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int target_bit_rate = pSequenceParameter->bits_per_second; + + // current we only support CBR mode. + if (rate_control_mode == VA_RC_CBR) { + mfc_context->vui_hrd.i_bit_rate_value = target_bit_rate >> 10; + mfc_context->vui_hrd.i_cpb_size_value = (target_bit_rate * 8) >> 10; + mfc_context->vui_hrd.i_initial_cpb_removal_delay = mfc_context->vui_hrd.i_cpb_size_value * 0.5 * 1024 / target_bit_rate * 90000; + mfc_context->vui_hrd.i_cpb_removal_delay = 2; + mfc_context->vui_hrd.i_frame_number = 0; + + mfc_context->vui_hrd.i_initial_cpb_removal_delay_length = 24; + mfc_context->vui_hrd.i_cpb_removal_delay_length = 24; + mfc_context->vui_hrd.i_dpb_output_delay_length = 24; + } + +} + +void +intel_mfc_hrd_context_update(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context) +{ + mfc_context->vui_hrd.i_frame_number++; +} + +int intel_mfc_interlace_check(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSliceParameterBufferH264 *pSliceParameter; + int i; + int mbCount = 0; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[i]->buffer; + mbCount += pSliceParameter->num_macroblocks; + } + + if ( mbCount == ( width_in_mbs * height_in_mbs ) ) + return 0; + + return 1; +} + +/* + * Check whether the parameters related with CBR are updated and decide whether + * it needs to reinitialize the configuration related with CBR. + * Currently it will check the following parameters: + * bits_per_second + * frame_rate + * gop_configuration(intra_period, ip_period, intra_idr_period) + */ +static bool intel_mfc_brc_updated_check(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + unsigned int rate_control_mode = encoder_context->rate_control_mode; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + double cur_fps, cur_bitrate; + VAEncSequenceParameterBufferH264 *pSequenceParameter; + + + if (rate_control_mode != VA_RC_CBR) { + return false; + } + + pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + + cur_bitrate = pSequenceParameter->bits_per_second; + cur_fps = (double)pSequenceParameter->time_scale / + (2 * (double)pSequenceParameter->num_units_in_tick); + + if ((cur_bitrate == mfc_context->brc.saved_bps) && + (cur_fps == mfc_context->brc.saved_fps) && + (pSequenceParameter->intra_period == mfc_context->brc.saved_intra_period) && + (pSequenceParameter->intra_idr_period == mfc_context->brc.saved_idr_period) && + (pSequenceParameter->intra_period == mfc_context->brc.saved_intra_period)) { + /* the parameters related with CBR are not updaetd */ + return false; + } + + mfc_context->brc.saved_ip_period = pSequenceParameter->ip_period; + mfc_context->brc.saved_intra_period = pSequenceParameter->intra_period; + mfc_context->brc.saved_idr_period = pSequenceParameter->intra_idr_period; + mfc_context->brc.saved_fps = cur_fps; + mfc_context->brc.saved_bps = cur_bitrate; + return true; +} + +void intel_mfc_brc_prepare(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + unsigned int rate_control_mode = encoder_context->rate_control_mode; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + if (rate_control_mode == VA_RC_CBR) { + bool brc_updated; + assert(encoder_context->codec != CODEC_MPEG2); + + brc_updated = intel_mfc_brc_updated_check(encode_state, encoder_context); + + /*Programing bit rate control */ + if ((mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord == 0) || + brc_updated) { + intel_mfc_bit_rate_control_context_init(encode_state, mfc_context); + intel_mfc_brc_init(encode_state, encoder_context); + } + + /*Programing HRD control */ + if ((mfc_context->vui_hrd.i_cpb_size_value == 0) || brc_updated ) + intel_mfc_hrd_context_init(encode_state, encoder_context); + } +} + +void intel_mfc_avc_pipeline_header_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SPS); + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int skip_emul_byte_cnt; + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_PPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SEI); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } else if (rate_control_mode == VA_RC_CBR) { + // this is frist AU + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + unsigned char *sei_data = NULL; + + int length_in_bits = build_avc_sei_buffer_timing( + mfc_context->vui_hrd.i_initial_cpb_removal_delay_length, + mfc_context->vui_hrd.i_initial_cpb_removal_delay, + 0, + mfc_context->vui_hrd.i_cpb_removal_delay_length, mfc_context->vui_hrd.i_cpb_removal_delay * mfc_context->vui_hrd.i_frame_number, + mfc_context->vui_hrd.i_dpb_output_delay_length, + 0, + &sei_data); + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int *)sei_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 5, + 0, + 0, + 1, + slice_batch); + free(sei_data); + } +} + +VAStatus intel_mfc_avc_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + GenAvcSurface *gen6_avc_surface; + dri_bo *bo; + VAStatus vaStatus = VA_STATUS_SUCCESS; + int i, j, enable_avc_ildb = 0; + VAEncSliceParameterBufferH264 *slice_param; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + if (IS_GEN6(i965->intel.device_info)) { + /* On the SNB it should be fixed to 128 for the DMV buffer */ + width_in_mbs = 128; + } + + for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == 0; j++) { + assert(encode_state->slice_params_ext && encode_state->slice_params_ext[j]->buffer); + slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[j]->buffer; + + for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) { + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (slice_param->disable_deblocking_filter_idc != 1) { + enable_avc_ildb = 1; + break; + } + + slice_param++; + } + } + + /*Setup all the input&output object*/ + + /* Setup current frame and current direct mv buffer*/ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + if ( obj_surface->private_data == NULL) { + gen6_avc_surface = calloc(sizeof(GenAvcSurface), 1); + assert(gen6_avc_surface); + gen6_avc_surface->dmv_top = + dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 68 * width_in_mbs * height_in_mbs, + 64); + gen6_avc_surface->dmv_bottom = + dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 68 * width_in_mbs * height_in_mbs, + 64); + assert(gen6_avc_surface->dmv_top); + assert(gen6_avc_surface->dmv_bottom); + obj_surface->private_data = (void *)gen6_avc_surface; + obj_surface->free_private_data = (void *)gen_free_avc_surface; + } + gen6_avc_surface = (GenAvcSurface *) obj_surface->private_data; + mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo = gen6_avc_surface->dmv_top; + mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 1].bo = gen6_avc_surface->dmv_bottom; + dri_bo_reference(gen6_avc_surface->dmv_top); + dri_bo_reference(gen6_avc_surface->dmv_bottom); + + if (enable_avc_ildb) { + mfc_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->post_deblocking_output.bo); + } else { + mfc_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->pre_deblocking_output.bo); + } + + mfc_context->surface_state.width = obj_surface->orig_width; + mfc_context->surface_state.height = obj_surface->orig_height; + mfc_context->surface_state.w_pitch = obj_surface->width; + mfc_context->surface_state.h_pitch = obj_surface->height; + + /* Setup reference frames and direct mv buffers*/ + for(i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++) { + obj_surface = encode_state->reference_objects[i]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[i].bo = obj_surface->bo; + dri_bo_reference(obj_surface->bo); + + /* Check DMV buffer */ + if ( obj_surface->private_data == NULL) { + + gen6_avc_surface = calloc(sizeof(GenAvcSurface), 1); + assert(gen6_avc_surface); + gen6_avc_surface->dmv_top = + dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 68 * width_in_mbs * height_in_mbs, + 64); + gen6_avc_surface->dmv_bottom = + dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 68 * width_in_mbs * height_in_mbs, + 64); + assert(gen6_avc_surface->dmv_top); + assert(gen6_avc_surface->dmv_bottom); + obj_surface->private_data = gen6_avc_surface; + obj_surface->free_private_data = gen_free_avc_surface; + } + + gen6_avc_surface = (GenAvcSurface *) obj_surface->private_data; + /* Setup DMV buffer */ + mfc_context->direct_mv_buffers[i*2].bo = gen6_avc_surface->dmv_top; + mfc_context->direct_mv_buffers[i*2+1].bo = gen6_avc_surface->dmv_bottom; + dri_bo_reference(gen6_avc_surface->dmv_top); + dri_bo_reference(gen6_avc_surface->dmv_bottom); + } else { + break; + } + } + + mfc_context->uncompressed_picture_source.bo = encode_state->input_yuv_object->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + mfc_context->mfc_indirect_pak_bse_object.bo = bo; + mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); + + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return vaStatus; +} +/* + * The LUT uses the pair of 4-bit units: (shift, base) structure. + * 2^K * X = value . + * So it is necessary to convert one cost into the nearest LUT format. + * The derivation is: + * 2^K *x = 2^n * (1 + deltaX) + * k + log2(x) = n + log2(1 + deltaX) + * log2(x) = n - k + log2(1 + deltaX) + * As X is in the range of [1, 15] + * 4 > n - k + log2(1 + deltaX) >= 0 + * => n + log2(1 + deltaX) >= k > n - 4 + log2(1 + deltaX) + * Then we can derive the corresponding K and get the nearest LUT format. + */ +int intel_format_lutvalue(int value, int max) +{ + int ret; + int logvalue, temp1, temp2; + + if (value <= 0) + return 0; + + logvalue = (int)(log2f((float)value)); + if (logvalue < 4) { + ret = value; + } else { + int error, temp_value, base, j, temp_err; + error = value; + j = logvalue - 4 + 1; + ret = -1; + for(; j <= logvalue; j++) { + if (j == 0) { + base = value >> j; + } else { + base = (value + (1 << (j - 1)) - 1) >> j; + } + if (base >= 16) + continue; + + temp_value = base << j; + temp_err = abs(value - temp_value); + if (temp_err < error) { + error = temp_err; + ret = (j << 4) | base; + if (temp_err == 0) + break; + } + } + } + temp1 = (ret & 0xf) << ((ret & 0xf0) >> 4); + temp2 = (max & 0xf) << ((max & 0xf0) >> 4); + if (temp1 > temp2) + ret = max; + return ret; + +} + + +#define QP_MAX 52 +#define VP8_QP_MAX 128 + + +static float intel_lambda_qp(int qp) +{ + float value, lambdaf; + value = qp; + value = value / 6 - 2; + if (value < 0) + value = 0; + lambdaf = roundf(powf(2, value)); + return lambdaf; +} + + +void intel_vme_update_mbmv_cost(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int qp, m_cost, j, mv_count; + uint8_t *vme_state_message = (uint8_t *)(vme_context->vme_state_message); + float lambda, m_costf; + + int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + + + if (encoder_context->rate_control_mode == VA_RC_CQP) + qp = pic_param->pic_init_qp + slice_param->slice_qp_delta; + else + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + + if (vme_state_message == NULL) + return; + + assert(qp <= QP_MAX); + lambda = intel_lambda_qp(qp); + if (slice_type == SLICE_TYPE_I) { + vme_state_message[MODE_INTRA_16X16] = 0; + m_cost = lambda * 4; + vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 16; + vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 3; + vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f); + } else { + m_cost = 0; + vme_state_message[MODE_INTER_MV0] = intel_format_lutvalue(m_cost, 0x6f); + for (j = 1; j < 3; j++) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f); + } + mv_count = 3; + for (j = 4; j <= 64; j *= 2) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + mv_count] = intel_format_lutvalue(m_cost, 0x6f); + mv_count++; + } + + if (qp <= 25) { + vme_state_message[MODE_INTRA_16X16] = 0x4a; + vme_state_message[MODE_INTRA_8X8] = 0x4a; + vme_state_message[MODE_INTRA_4X4] = 0x4a; + vme_state_message[MODE_INTRA_NONPRED] = 0x4a; + vme_state_message[MODE_INTER_16X16] = 0x4a; + vme_state_message[MODE_INTER_16X8] = 0x4a; + vme_state_message[MODE_INTER_8X8] = 0x4a; + vme_state_message[MODE_INTER_8X4] = 0x4a; + vme_state_message[MODE_INTER_4X4] = 0x4a; + vme_state_message[MODE_INTER_BWD] = 0x2a; + return; + } + m_costf = lambda * 10; + vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 14; + vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 24; + vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 3.5; + m_cost = m_costf; + vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f); + if (slice_type == SLICE_TYPE_P) { + m_costf = lambda * 2.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 4; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 1.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 3; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 5; + m_cost = m_costf; + vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f); + /* BWD is not used in P-frame */ + vme_state_message[MODE_INTER_BWD] = 0; + } else { + m_costf = lambda * 2.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 5.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 3.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 5.0; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 6.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 1.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f); + } + } +} + +void intel_vme_vp8_update_mbmv_cost(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + VAQMatrixBufferVP8 *q_matrix = (VAQMatrixBufferVP8 *)encode_state->q_matrix->buffer; + int qp, m_cost, j, mv_count; + uint8_t *vme_state_message = (uint8_t *)(vme_context->vme_state_message); + float lambda, m_costf; + + int is_key_frame = !pic_param->pic_flags.bits.frame_type; + int slice_type = (is_key_frame ? SLICE_TYPE_I : SLICE_TYPE_P); + + if (vme_state_message == NULL) + return; + + if (encoder_context->rate_control_mode == VA_RC_CQP) + qp = q_matrix->quantization_index[0]; + else + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + + lambda = intel_lambda_qp(qp * QP_MAX / VP8_QP_MAX); + if (is_key_frame) { + vme_state_message[MODE_INTRA_16X16] = 0; + m_cost = lambda * 16; + vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f); + } else { + m_cost = 0; + vme_state_message[MODE_INTER_MV0] = intel_format_lutvalue(m_cost, 0x6f); + for (j = 1; j < 3; j++) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f); + } + mv_count = 3; + for (j = 4; j <= 64; j *= 2) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + mv_count] = intel_format_lutvalue(m_cost, 0x6f); + mv_count++; + } + + if (qp < 92 ) { + vme_state_message[MODE_INTRA_16X16] = 0x4a; + vme_state_message[MODE_INTRA_4X4] = 0x4a; + vme_state_message[MODE_INTRA_NONPRED] = 0x4a; + vme_state_message[MODE_INTER_16X16] = 0x4a; + vme_state_message[MODE_INTER_16X8] = 0x4a; + vme_state_message[MODE_INTER_8X8] = 0x4a; + vme_state_message[MODE_INTER_4X4] = 0x4a; + return; + } + m_costf = lambda * 10; + vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 24; + vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f); + + m_costf = lambda * 2.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 4; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 1.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 5; + m_cost = m_costf; + vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f); + /* BWD is not used in P-frame */ + vme_state_message[MODE_INTER_BWD] = 0; + } +} + +#define MB_SCOREBOARD_A (1 << 0) +#define MB_SCOREBOARD_B (1 << 1) +#define MB_SCOREBOARD_C (1 << 2) +void +gen7_vme_scoreboard_init(VADriverContextP ctx, struct gen6_vme_context *vme_context) +{ + vme_context->gpe_context.vfe_desc5.scoreboard0.enable = 1; + vme_context->gpe_context.vfe_desc5.scoreboard0.type = SCOREBOARD_STALLING; + vme_context->gpe_context.vfe_desc5.scoreboard0.mask = (MB_SCOREBOARD_A | + MB_SCOREBOARD_B | + MB_SCOREBOARD_C); + + /* In VME prediction the current mb depends on the neighbour + * A/B/C macroblock. So the left/up/up-right dependency should + * be considered. + */ + vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x0 = -1; + vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y0 = 0; + vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x1 = 0; + vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y1 = -1; + vme_context->gpe_context.vfe_desc6.scoreboard1.delta_x2 = 1; + vme_context->gpe_context.vfe_desc6.scoreboard1.delta_y2 = -1; + + vme_context->gpe_context.vfe_desc7.dword = 0; + return; +} + +/* check whether the mb of (x_index, y_index) is out of bound */ +static inline int loop_in_bounds(int x_index, int y_index, int first_mb, int num_mb, int mb_width, int mb_height) +{ + int mb_index; + if (x_index < 0 || x_index >= mb_width) + return -1; + if (y_index < 0 || y_index >= mb_height) + return -1; + + mb_index = y_index * mb_width + x_index; + if (mb_index < first_mb || mb_index > (first_mb + num_mb)) + return -1; + return 0; +} + +void +gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_row; + int s; + unsigned int *command_ptr; + +#define USE_SCOREBOARD (1 << 21) + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + int first_mb = pSliceParameter->macroblock_address; + int num_mb = pSliceParameter->num_macroblocks; + unsigned int mb_intra_ub, score_dep; + int x_outer, y_outer, x_inner, y_inner; + int xtemp_outer = 0; + + x_outer = first_mb % mb_width; + y_outer = first_mb / mb_width; + mb_row = y_outer; + + for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + x_inner = x_outer; + y_inner = y_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + x_inner -= 2; + y_inner += 1; + } + x_outer += 1; + } + + xtemp_outer = mb_width - 2; + if (xtemp_outer < 0) + xtemp_outer = 0; + x_outer = xtemp_outer; + y_outer = first_mb / mb_width; + for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + y_inner = y_outer; + x_inner = x_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + x_inner -= 2; + y_inner += 1; + } + x_outer++; + if (x_outer >= mb_width) { + y_outer += 1; + x_outer = xtemp_outer; + } + } + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static uint8_t +intel_get_ref_idx_state_1(VAPictureH264 *va_pic, unsigned int frame_store_id) +{ + unsigned int is_long_term = + !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); + unsigned int is_top_field = + !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD); + unsigned int is_bottom_field = + !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + + return ((is_long_term << 6) | + ((is_top_field ^ is_bottom_field ^ 1) << 5) | + (frame_store_id << 1) | + ((is_top_field ^ 1) & is_bottom_field)); +} + +void +intel_mfc_avc_ref_idx_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + int slice_type; + struct object_surface *obj_surface; + unsigned int fref_entry, bref_entry; + int frame_index, i; + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + + fref_entry = 0x80808080; + bref_entry = 0x80808080; + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + + if (slice_type == SLICE_TYPE_P || slice_type == SLICE_TYPE_B) { + int ref_idx_l0 = (vme_context->ref_index_in_mb[0] & 0xff); + + if (ref_idx_l0 > 3) { + WARN_ONCE("ref_idx_l0 is out of range\n"); + ref_idx_l0 = 0; + } + + obj_surface = vme_context->used_reference_objects[0]; + frame_index = -1; + for (i = 0; i < 16; i++) { + if (obj_surface && + obj_surface == encode_state->reference_objects[i]) { + frame_index = i; + break; + } + } + if (frame_index == -1) { + WARN_ONCE("RefPicList0 is not found in DPB!\n"); + } else { + int ref_idx_l0_shift = ref_idx_l0 * 8; + fref_entry &= ~(0xFF << ref_idx_l0_shift); + fref_entry += (intel_get_ref_idx_state_1(vme_context->used_references[0], frame_index) << ref_idx_l0_shift); + } + if(frame_index == 1){ + WARN_ONCE("Input ref list is Wrong !\n"); + } + } + + if (slice_type == SLICE_TYPE_B) { + int ref_idx_l1 = (vme_context->ref_index_in_mb[1] & 0xff); + + if (ref_idx_l1 > 3) { + WARN_ONCE("ref_idx_l1 is out of range\n"); + ref_idx_l1 = 0; + } + + obj_surface = vme_context->used_reference_objects[1]; + frame_index = -1; + for (i = 0; i < 16; i++) { + if (obj_surface && + obj_surface == encode_state->reference_objects[i]) { + frame_index = i; + break; + } + } + if (frame_index == -1) { + WARN_ONCE("RefPicList1 is not found in DPB!\n"); + } else { + int ref_idx_l1_shift = ref_idx_l1 * 8; + bref_entry &= ~(0xFF << ref_idx_l1_shift); + bref_entry += (intel_get_ref_idx_state_1(vme_context->used_references[1], frame_index) << ref_idx_l1_shift); + } + } + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8); + OUT_BCS_BATCH(batch, 0); //Select L0 + OUT_BCS_BATCH(batch, fref_entry); //Only 1 reference + for(i = 0; i < 7; i++) { + OUT_BCS_BATCH(batch, 0x80808080); + } + ADVANCE_BCS_BATCH(batch); + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8); + OUT_BCS_BATCH(batch, 1); //Select L1 + OUT_BCS_BATCH(batch, bref_entry); //Only 1 reference + for(i = 0; i < 7; i++) { + OUT_BCS_BATCH(batch, 0x80808080); + } + ADVANCE_BCS_BATCH(batch); +} + + +void intel_vme_mpeg2_state_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + uint32_t *vme_state_message = (uint32_t *)(vme_context->vme_state_message); + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + uint32_t mv_x, mv_y; + VAEncSliceParameterBufferMPEG2 *slice_param = NULL; + VAEncPictureParameterBufferMPEG2 *pic_param = NULL; + slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + + if (vme_context->mpeg2_level == MPEG2_LEVEL_LOW) { + mv_x = 512; + mv_y = 64; + } else if (vme_context->mpeg2_level == MPEG2_LEVEL_MAIN) { + mv_x = 1024; + mv_y = 128; + } else if (vme_context->mpeg2_level == MPEG2_LEVEL_HIGH) { + mv_x = 2048; + mv_y = 128; + } else { + WARN_ONCE("Incorrect Mpeg2 level setting!\n"); + mv_x = 512; + mv_y = 64; + } + + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + if (pic_param->picture_type != VAEncPictureTypeIntra) { + int qp, m_cost, j, mv_count; + float lambda, m_costf; + slice_param = (VAEncSliceParameterBufferMPEG2 *) + encode_state->slice_params_ext[0]->buffer; + qp = slice_param->quantiser_scale_code; + lambda = intel_lambda_qp(qp); + /* No Intra prediction. So it is zero */ + vme_state_message[MODE_INTRA_8X8] = 0; + vme_state_message[MODE_INTRA_4X4] = 0; + vme_state_message[MODE_INTER_MV0] = 0; + for (j = 1; j < 3; j++) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f); + } + mv_count = 3; + for (j = 4; j <= 64; j *= 2) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + mv_count] = + intel_format_lutvalue(m_cost, 0x6f); + mv_count++; + } + m_cost = lambda; + /* It can only perform the 16x16 search. So mode cost can be ignored for + * the other mode. for example: 16x8/8x8 + */ + vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f); + vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f); + + vme_state_message[MODE_INTER_16X8] = 0; + vme_state_message[MODE_INTER_8X8] = 0; + vme_state_message[MODE_INTER_8X4] = 0; + vme_state_message[MODE_INTER_4X4] = 0; + vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f); + + } + vme_state_message[MPEG2_MV_RANGE] = (mv_y << 16) | (mv_x); + + vme_state_message[MPEG2_PIC_WIDTH_HEIGHT] = (height_in_mbs << 16) | + width_in_mbs; +} + +void +gen7_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned int *command_ptr; + +#define MPEG2_SCOREBOARD (1 << 21) + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + { + unsigned int mb_intra_ub, score_dep; + int x_outer, y_outer, x_inner, y_inner; + int xtemp_outer = 0; + int first_mb = 0; + int num_mb = mb_width * mb_height; + + x_outer = 0; + y_outer = 0; + + + for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + x_inner = x_outer; + y_inner = y_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = MPEG2_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8)); + x_inner -= 2; + y_inner += 1; + } + x_outer += 1; + } + + xtemp_outer = mb_width - 2; + if (xtemp_outer < 0) + xtemp_outer = 0; + x_outer = xtemp_outer; + y_outer = 0; + for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + y_inner = y_outer; + x_inner = x_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = MPEG2_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8)); + + x_inner -= 2; + y_inner += 1; + } + x_outer++; + if (x_outer >= mb_width) { + y_outer += 1; + x_outer = xtemp_outer; + } + } + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); + return; +} + +static int +avc_temporal_find_surface(VAPictureH264 *curr_pic, + VAPictureH264 *ref_list, + int num_pictures, + int dir) +{ + int i, found = -1, min = 0x7FFFFFFF; + + for (i = 0; i < num_pictures; i++) { + int tmp; + + if ((ref_list[i].flags & VA_PICTURE_H264_INVALID) || + (ref_list[i].picture_id == VA_INVALID_SURFACE)) + break; + + tmp = curr_pic->TopFieldOrderCnt - ref_list[i].TopFieldOrderCnt; + + if (dir) + tmp = -tmp; + + if (tmp > 0 && tmp < min) { + min = tmp; + found = i; + } + } + + return found; +} + +void +intel_avc_vme_reference_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int list_index, + int surface_index, + void (* vme_source_surface_state)( + VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context)) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct object_surface *obj_surface = NULL; + struct i965_driver_data *i965 = i965_driver_data(ctx); + VASurfaceID ref_surface_id; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int max_num_references; + VAPictureH264 *curr_pic; + VAPictureH264 *ref_list; + int ref_idx; + + if (list_index == 0) { + max_num_references = pic_param->num_ref_idx_l0_active_minus1 + 1; + ref_list = slice_param->RefPicList0; + } else { + max_num_references = pic_param->num_ref_idx_l1_active_minus1 + 1; + ref_list = slice_param->RefPicList1; + } + + if (max_num_references == 1) { + if (list_index == 0) { + ref_surface_id = slice_param->RefPicList0[0].picture_id; + vme_context->used_references[0] = &slice_param->RefPicList0[0]; + } else { + ref_surface_id = slice_param->RefPicList1[0].picture_id; + vme_context->used_references[1] = &slice_param->RefPicList1[0]; + } + + if (ref_surface_id != VA_INVALID_SURFACE) + obj_surface = SURFACE(ref_surface_id); + + if (!obj_surface || + !obj_surface->bo) { + obj_surface = encode_state->reference_objects[list_index]; + vme_context->used_references[list_index] = &pic_param->ReferenceFrames[list_index]; + } + + ref_idx = 0; + } else { + curr_pic = &pic_param->CurrPic; + + /* select the reference frame in temporal space */ + ref_idx = avc_temporal_find_surface(curr_pic, ref_list, max_num_references, list_index == 1); + ref_surface_id = ref_list[ref_idx].picture_id; + + if (ref_surface_id != VA_INVALID_SURFACE) /* otherwise warning later */ + obj_surface = SURFACE(ref_surface_id); + + vme_context->used_reference_objects[list_index] = obj_surface; + vme_context->used_references[list_index] = &ref_list[ref_idx]; + } + + if (obj_surface && + obj_surface->bo) { + assert(ref_idx >= 0); + vme_context->used_reference_objects[list_index] = obj_surface; + vme_source_surface_state(ctx, surface_index, obj_surface, encoder_context); + vme_context->ref_index_in_mb[list_index] = (ref_idx << 24 | + ref_idx << 16 | + ref_idx << 8 | + ref_idx); + } else { + vme_context->used_reference_objects[list_index] = NULL; + vme_context->used_references[list_index] = NULL; + vme_context->ref_index_in_mb[list_index] = 0; + } +} + +void intel_avc_slice_insert_packed_data(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch) +{ + int count, i, start_index; + unsigned int length_in_bits; + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = NULL; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int slice_header_index; + + if (encode_state->slice_header_index[slice_index] == 0) + slice_header_index = -1; + else + slice_header_index = (encode_state->slice_header_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK); + + count = encode_state->slice_rawdata_count[slice_index]; + start_index = (encode_state->slice_rawdata_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK); + + for (i = 0; i < count; i++) { + unsigned int skip_emul_byte_cnt; + + header_data = (unsigned int *)encode_state->packed_header_data_ext[start_index + i]->buffer; + + param = (VAEncPackedHeaderParameterBuffer *) + (encode_state->packed_header_params_ext[start_index + i]->buffer); + + /* skip the slice header packed data type as it is lastly inserted */ + if (param->type == VAEncPackedHeaderSlice) + continue; + + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + /* as the slice header is still required, the last header flag is set to + * zero. + */ + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + if (slice_header_index == -1) { + unsigned char *slice_header = NULL; + int slice_header_length_in_bits = 0; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + + /* No slice header data is passed. And the driver needs to generate it */ + /* For the Normal H264 */ + slice_header_length_in_bits = build_avc_slice_header(pSequenceParameter, + pPicParameter, + pSliceParameter, + &slice_header); + mfc_context->insert_object(ctx, encoder_context, + (unsigned int *)slice_header, + ALIGN(slice_header_length_in_bits, 32) >> 5, + slice_header_length_in_bits & 0x1f, + 5, /* first 5 bytes are start code + nal unit type */ + 1, 0, 1, slice_batch); + + free(slice_header); + } else { + unsigned int skip_emul_byte_cnt; + + header_data = (unsigned int *)encode_state->packed_header_data_ext[slice_header_index]->buffer; + + param = (VAEncPackedHeaderParameterBuffer *) + (encode_state->packed_header_params_ext[slice_header_index]->buffer); + length_in_bits = param->bit_length; + + /* as the slice header is the last header data for one slice, + * the last header flag is set to one. + */ + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 1, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + return; +} + +/* HEVC */ +static int +hevc_temporal_find_surface(VAPictureHEVC *curr_pic, + VAPictureHEVC *ref_list, + int num_pictures, + int dir) +{ + int i, found = -1, min = 0x7FFFFFFF; + + for (i = 0; i < num_pictures; i++) { + int tmp; + + if ((ref_list[i].flags & VA_PICTURE_HEVC_INVALID) || + (ref_list[i].picture_id == VA_INVALID_SURFACE)) + break; + + tmp = curr_pic->pic_order_cnt - ref_list[i].pic_order_cnt; + + if (dir) + tmp = -tmp; + + if (tmp > 0 && tmp < min) { + min = tmp; + found = i; + } + } + + return found; +} +void +intel_hevc_vme_reference_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int list_index, + int surface_index, + void (* vme_source_surface_state)( + VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context)) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct object_surface *obj_surface = NULL; + struct i965_driver_data *i965 = i965_driver_data(ctx); + VASurfaceID ref_surface_id; + VAEncPictureParameterBufferHEVC *pic_param = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + int max_num_references; + VAPictureHEVC *curr_pic; + VAPictureHEVC *ref_list; + int ref_idx; + + if (list_index == 0) { + max_num_references = pic_param->num_ref_idx_l0_default_active_minus1 + 1; + ref_list = slice_param->ref_pic_list0; + } else { + max_num_references = pic_param->num_ref_idx_l1_default_active_minus1 + 1; + ref_list = slice_param->ref_pic_list1; + } + + if (max_num_references == 1) { + if (list_index == 0) { + ref_surface_id = slice_param->ref_pic_list0[0].picture_id; + vme_context->used_references[0] = &slice_param->ref_pic_list0[0]; + } else { + ref_surface_id = slice_param->ref_pic_list1[0].picture_id; + vme_context->used_references[1] = &slice_param->ref_pic_list1[0]; + } + + if (ref_surface_id != VA_INVALID_SURFACE) + obj_surface = SURFACE(ref_surface_id); + + if (!obj_surface || + !obj_surface->bo) { + obj_surface = encode_state->reference_objects[list_index]; + vme_context->used_references[list_index] = &pic_param->reference_frames[list_index]; + } + + ref_idx = 0; + } else { + curr_pic = &pic_param->decoded_curr_pic; + + /* select the reference frame in temporal space */ + ref_idx = hevc_temporal_find_surface(curr_pic, ref_list, max_num_references, list_index == 1); + ref_surface_id = ref_list[ref_idx].picture_id; + + if (ref_surface_id != VA_INVALID_SURFACE) /* otherwise warning later */ + obj_surface = SURFACE(ref_surface_id); + + vme_context->used_reference_objects[list_index] = obj_surface; + vme_context->used_references[list_index] = &ref_list[ref_idx]; + } + + if (obj_surface && + obj_surface->bo) { + assert(ref_idx >= 0); + vme_context->used_reference_objects[list_index] = obj_surface; + vme_source_surface_state(ctx, surface_index, obj_surface, encoder_context); + vme_context->ref_index_in_mb[list_index] = (ref_idx << 24 | + ref_idx << 16 | + ref_idx << 8 | + ref_idx); + } else { + vme_context->used_reference_objects[list_index] = NULL; + vme_context->used_references[list_index] = NULL; + vme_context->ref_index_in_mb[list_index] = 0; + } +} + +void intel_vme_hevc_update_mbmv_cost(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncPictureParameterBufferHEVC *pic_param = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int qp, m_cost, j, mv_count; + uint8_t *vme_state_message = (uint8_t *)(vme_context->vme_state_message); + float lambda, m_costf; + + /* here no SI SP slice for HEVC, do not need slice fixup */ + int slice_type = slice_param->slice_type; + + + qp = pic_param->pic_init_qp + slice_param->slice_qp_delta; + + if(encoder_context->rate_control_mode == VA_RC_CBR) + { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if(slice_type == HEVC_SLICE_B) { + if(pSequenceParameter->ip_period == 1) + { + slice_type = HEVC_SLICE_P; + qp = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY; + + }else if(mfc_context->vui_hrd.i_frame_number % pSequenceParameter->ip_period == 1){ + slice_type = HEVC_SLICE_P; + qp = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY; + } + } + + } + + if (vme_state_message == NULL) + return; + + assert(qp <= QP_MAX); + lambda = intel_lambda_qp(qp); + if (slice_type == HEVC_SLICE_I) { + vme_state_message[MODE_INTRA_16X16] = 0; + m_cost = lambda * 4; + vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 16; + vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 3; + vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f); + } else { + m_cost = 0; + vme_state_message[MODE_INTER_MV0] = intel_format_lutvalue(m_cost, 0x6f); + for (j = 1; j < 3; j++) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + j] = intel_format_lutvalue(m_cost, 0x6f); + } + mv_count = 3; + for (j = 4; j <= 64; j *= 2) { + m_costf = (log2f((float)(j + 1)) + 1.718f) * lambda; + m_cost = (int)m_costf; + vme_state_message[MODE_INTER_MV0 + mv_count] = intel_format_lutvalue(m_cost, 0x6f); + mv_count++; + } + + if (qp <= 25) { + vme_state_message[MODE_INTRA_16X16] = 0x4a; + vme_state_message[MODE_INTRA_8X8] = 0x4a; + vme_state_message[MODE_INTRA_4X4] = 0x4a; + vme_state_message[MODE_INTRA_NONPRED] = 0x4a; + vme_state_message[MODE_INTER_16X16] = 0x4a; + vme_state_message[MODE_INTER_16X8] = 0x4a; + vme_state_message[MODE_INTER_8X8] = 0x4a; + vme_state_message[MODE_INTER_8X4] = 0x4a; + vme_state_message[MODE_INTER_4X4] = 0x4a; + vme_state_message[MODE_INTER_BWD] = 0x2a; + return; + } + m_costf = lambda * 10; + vme_state_message[MODE_INTRA_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 14; + vme_state_message[MODE_INTRA_8X8] = intel_format_lutvalue(m_cost, 0x8f); + m_cost = lambda * 24; + vme_state_message[MODE_INTRA_4X4] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 3.5; + m_cost = m_costf; + vme_state_message[MODE_INTRA_NONPRED] = intel_format_lutvalue(m_cost, 0x6f); + if (slice_type == HEVC_SLICE_P) { + m_costf = lambda * 2.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 4; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 1.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 3; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 5; + m_cost = m_costf; + vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f); + /* BWD is not used in P-frame */ + vme_state_message[MODE_INTER_BWD] = 0; + } else { + m_costf = lambda * 2.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X16] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 5.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_16X8] = intel_format_lutvalue(m_cost, 0x8f); + m_costf = lambda * 3.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X8] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 5.0; + m_cost = m_costf; + vme_state_message[MODE_INTER_8X4] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 6.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_4X4] = intel_format_lutvalue(m_cost, 0x6f); + m_costf = lambda * 1.5; + m_cost = m_costf; + vme_state_message[MODE_INTER_BWD] = intel_format_lutvalue(m_cost, 0x6f); + } + } +} diff -Nru intel-vaapi-driver-1.0.15/src/gen6_mfc.h intel-vaapi-driver-1.7.1/src/gen6_mfc.h --- intel-vaapi-driver-1.0.15/src/gen6_mfc.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen6_mfc.h 2016-06-17 01:56:44.000000000 +0000 @@ -29,15 +29,133 @@ #ifndef _GEN6_MFC_H_ #define _GEN6_MFC_H_ -#include #include #include #include +#include "i965_gpe_utils.h" +#include "i965_encoder.h" + struct encode_state; -#define MAX_MFC_REFERENCE_SURFACES 16 -#define NUM_MFC_DMV_BUFFERS 34 +#define MAX_MFC_REFERENCE_SURFACES 16 +#define NUM_MFC_DMV_BUFFERS 34 + +#define INTRA_MB_FLAG_MASK 0x00002000 + +/* The space required for slice header SLICE_STATE + header. + * Is it enough? */ +#define SLICE_HEADER 80 + +/* the space required for slice tail. */ +#define SLICE_TAIL 16 + +#define __SOFTWARE__ 0 + +#define MFC_BATCHBUFFER_AVC_INTRA 0 +#define MFC_BATCHBUFFER_AVC_INTER 1 +#define NUM_MFC_KERNEL 2 + +#define BIND_IDX_VME_OUTPUT 0 +#define BIND_IDX_MFC_SLICE_HEADER 1 +#define BIND_IDX_MFC_BATCHBUFFER 2 + +#define CMD_LEN_IN_OWORD 4 + +#define BRC_CLIP(x, min, max) \ + { \ + x = ((x > (max)) ? (max) : ((x < (min)) ? (min) : x)); \ + } + +#define BRC_P_B_QP_DIFF 4 +#define BRC_I_P_QP_DIFF 2 +#define BRC_I_B_QP_DIFF (BRC_I_P_QP_DIFF + BRC_P_B_QP_DIFF) + +#define BRC_PWEIGHT 0.6 /* weight if P slice with comparison to I slice */ +#define BRC_BWEIGHT 0.25 /* weight if B slice with comparison to I slice */ + +#define BRC_QP_MAX_CHANGE 5 /* maximum qp modification */ +#define BRC_CY 0.1 /* weight for */ +#define BRC_CX_UNDERFLOW 5. +#define BRC_CX_OVERFLOW -4. + +#define BRC_PI_0_5 1.5707963267948966192313216916398 + +typedef enum { + VME_V_PRED = 0, + VME_H_PRED = 1, + VME_DC_PRED = 2, + VME_PL_PRED = 3, + + VME_MB_INTRA_MODE_COUNT +} VME_MB_INTRA_PRED_MODE; + +typedef enum { + PAK_DC_PRED = 0, + PAK_V_PRED = 1, + PAK_H_PRED = 2, + PAK_TM_PRED = 3, + + PAK_MB_INTRA_MODE_COUNT +} VP8_PAK_MB_INTRA_PRED_MODE; + +typedef enum +{ + VME_B_V_PRED = 0, + VME_B_H_PRED = 1, + VME_B_DC_PRED = 2, + VME_B_DL_PRED = 3, + VME_B_DR_PRED = 4, + VME_B_VR_PRED = 5, + VME_B_HD_PRED = 6, + VME_B_VL_PRED = 7, + VME_B_HU_PRED = 8, + + VME_B_INTRA_MODE_COUNT +} VME_BLOCK_INTRA_PRED_MODE; + +typedef enum +{ + PAK_B_DC_PRED = 0, + PAK_B_TM_PRED = 1, + PAK_B_VE_PRED = 2, + PAK_B_HE_PRED = 3, + PAK_B_LD_PRED = 4, + PAK_B_RD_PRED = 5, + PAK_B_VR_PRED = 6, + PAK_B_VL_PRED = 7, + PAK_B_HD_PRED = 8, + PAK_B_HU_PRED = 9, + + PAK_B_INTRA_MODE_COUNT +} VP8_PAK_BLOCK_INTRA_PRED_MODE; + +typedef struct +{ + int vme_intra_mb_mode; + int vp8_pak_intra_mb_mode; +} vp8_intra_mb_mode_map_t; + +typedef struct +{ + int vme_intra_block_mode; + int vp8_pak_intra_block_mode; +} vp8_intra_block_mode_map_t; + +typedef enum _gen6_brc_status +{ + BRC_NO_HRD_VIOLATION = 0, + BRC_UNDERFLOW = 1, + BRC_OVERFLOW = 2, + BRC_UNDERFLOW_WITH_MAX_QP = 3, + BRC_OVERFLOW_WITH_MIN_QP = 4, +} gen6_brc_status; + +struct gen6_mfc_avc_surface_aux +{ + dri_bo *dmv_top; + dri_bo *dmv_bottom; +}; struct gen6_mfc_context { @@ -48,59 +166,233 @@ unsigned int h_pitch; } surface_state; - //MFX_PIPE_BUF_ADDR_STATE struct { dri_bo *bo; - } post_deblocking_output; //OUTPUT: reconstructed picture + } post_deblocking_output; //OUTPUT: reconstructed picture struct { dri_bo *bo; - } pre_deblocking_output; //OUTPUT: reconstructed picture with deblocked + } pre_deblocking_output; //OUTPUT: reconstructed picture with deblocked struct { dri_bo *bo; - } uncompressed_picture_source; //INPUT: original compressed image + } uncompressed_picture_source; //INPUT: original compressed image struct { dri_bo *bo; - } intra_row_store_scratch_buffer; //INTERNAL: + } intra_row_store_scratch_buffer; //INTERNAL: + + struct { + dri_bo *bo; + } macroblock_status_buffer; //INTERNAL: struct { dri_bo *bo; - } deblocking_filter_row_store_scratch_buffer; //INTERNAL: + } deblocking_filter_row_store_scratch_buffer; //INTERNAL: struct { - dri_bo *bo; - } reference_surfaces[MAX_MFC_REFERENCE_SURFACES]; //INTERNAL: refrence surfaces + dri_bo *bo; + } reference_surfaces[MAX_MFC_REFERENCE_SURFACES]; //INTERNAL: refrence surfaces //MFX_IND_OBJ_BASE_ADDR_STATE struct{ dri_bo *bo; - } mfc_indirect_mv_object; //INPUT: the blocks' mv info + } mfc_indirect_mv_object; //INPUT: the blocks' mv info struct { dri_bo *bo; int offset; - } mfc_indirect_pak_bse_object; //OUTPUT: the compressed bitstream + int end_offset; + } mfc_indirect_pak_bse_object; //OUTPUT: the compressed bitstream //MFX_BSP_BUF_BASE_ADDR_STATE struct { dri_bo *bo; - }bsd_mpc_row_store_scratch_buffer; //INTERNAL: + } bsd_mpc_row_store_scratch_buffer; //INTERNAL: //MFX_AVC_DIRECTMODE_STATE struct { dri_bo *bo; - }direct_mv_buffers[NUM_MFC_DMV_BUFFERS]; //INTERNAL: 0-31 as input,32 and 33 as output + } direct_mv_buffers[NUM_MFC_DMV_BUFFERS]; //INTERNAL: 0-31 as input,32 and 33 as output + + //Bit rate tracking context + struct { + unsigned int QpPrimeY; + unsigned int MaxQpNegModifier; + unsigned int MaxQpPosModifier; + unsigned char MaxSizeInWord; + unsigned char TargetSizeInWord; + unsigned char Correct[6]; + unsigned char GrowInit; + unsigned char GrowResistance; + unsigned char ShrinkInit; + unsigned char ShrinkResistance; + + unsigned int target_mb_size; + unsigned int target_frame_size; + } bit_rate_control_context[3]; //INTERNAL: for I, P, B frames + + struct { + int mode; + int gop_nums[3]; + int target_frame_size[3]; // I,P,B + double bits_per_frame; + double qpf_rounding_accumulator; + + double saved_bps; + double saved_fps; + int saved_intra_period; + int saved_ip_period; + int saved_idr_period; + } brc; + + struct { + double current_buffer_fullness; + double target_buffer_fullness; + double buffer_capacity; + unsigned int buffer_size; + unsigned int violation_noted; + } hrd; + + //HRD control context + struct { + int i_bit_rate_value; + int i_cpb_size_value; + + int i_initial_cpb_removal_delay; + int i_cpb_removal_delay; + + int i_frame_number; + + int i_initial_cpb_removal_delay_length; + int i_cpb_removal_delay_length; + int i_dpb_output_delay_length; + }vui_hrd; + + struct { + unsigned char *vp8_frame_header; + unsigned int frame_header_bit_count; + unsigned int frame_header_qindex_update_pos; + unsigned int frame_header_lf_update_pos; + unsigned int frame_header_token_update_pos; + unsigned int frame_header_bin_mv_upate_pos; + + unsigned int intermediate_partition_offset[8]; + unsigned int intermediate_buffer_max_size; + unsigned int final_frame_byte_offset; + + unsigned char mb_segment_tree_probs[3]; + unsigned char y_mode_probs[4]; + unsigned char uv_mode_probs[3]; + unsigned char mv_probs[2][19]; + + unsigned char prob_skip_false; + unsigned char prob_intra; + unsigned char prob_last; + unsigned char prob_gf; + + dri_bo *frame_header_bo; + dri_bo *intermediate_bo; + dri_bo *final_frame_bo; + dri_bo *stream_out_bo; + dri_bo *coeff_probs_stream_in_bo; + dri_bo *token_statistics_bo; + dri_bo *mpc_row_store_bo; + }vp8_state; + + //"buffered_QMatrix" will be used to buffer the QMatrix if the app sends one. + // Or else, we will load a default QMatrix from the driver for JPEG encode. + VAQMatrixBufferJPEG buffered_qmatrix; + struct i965_gpe_context gpe_context; + struct i965_buffer_surface mfc_batchbuffer_surface; + struct intel_batchbuffer *aux_batchbuffer; + struct i965_buffer_surface aux_batchbuffer_surface; + + void (*pipe_mode_select)(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context); + void (*set_surface_state)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); + void (*ind_obj_base_addr_state)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); + void (*avc_img_state)(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + void (*avc_qm_state)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); + void (*avc_fqm_state)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); + void (*insert_object)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + unsigned int *insert_data, + int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, + int is_last_header, int is_end_of_slice, + int emulation_flag, + struct intel_batchbuffer *batch); + void (*buffer_suface_setup)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); }; -VAStatus -gen6_mfc_pipeline(VADriverContextP ctx, - VAProfile profile, - struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context); -Bool gen6_mfc_context_init(VADriverContextP ctx, struct gen6_mfc_context *mfc_context); -Bool gen6_mfc_context_destroy(struct gen6_mfc_context *mfc_context); +VAStatus gen6_mfc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); +void gen6_mfc_context_destroy(void *context); + +extern +Bool gen75_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + + +extern int intel_mfc_update_hrd(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context, + int frame_bits); + +extern int intel_mfc_brc_postpack(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context, + int frame_bits); + +extern void intel_mfc_hrd_context_update(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context); + +extern int intel_mfc_interlace_check(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern void intel_mfc_brc_prepare(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern void intel_mfc_avc_pipeline_header_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch); + +extern VAStatus intel_mfc_avc_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern int intel_avc_enc_slice_type_fixup(int type); + +extern void +intel_mfc_avc_ref_idx_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern +Bool gen8_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +extern void +intel_avc_slice_insert_packed_data(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch); + +extern +Bool gen9_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); #endif /* _GEN6_MFC_BCS_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/gen6_mfd.c intel-vaapi-driver-1.7.1/src/gen6_mfd.c --- intel-vaapi-driver-1.0.15/src/gen6_mfd.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen6_mfd.c 2016-06-03 06:05:58.000000000 +0000 @@ -26,22 +26,15 @@ * */ -#include -#include -#include -#include - -#include - +#include "sysdeps.h" #include "intel_batchbuffer.h" #include "intel_driver.h" - #include "i965_defines.h" #include "i965_drv_video.h" +#include "i965_decoder_utils.h" #include "gen6_mfd.h" - -#define DMV_SIZE 0x88000 /* 557056 bytes for a frame */ +#include "intel_media.h" static const uint32_t zigzag_direct[64] = { 0, 1, 8, 16, 9, 2, 3, 10, @@ -55,150 +48,21 @@ }; static void -gen6_mfd_avc_frame_store_index(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - struct gen6_mfd_context *gen6_mfd_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - int i, j; - - assert(ARRAY_ELEMS(gen6_mfd_context->reference_surface) == ARRAY_ELEMS(pic_param->ReferenceFrames)); - - for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { - int found = 0; - - if (gen6_mfd_context->reference_surface[i].surface_id == VA_INVALID_ID) - continue; - - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j]; - if (ref_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - if (gen6_mfd_context->reference_surface[i].surface_id == ref_pic->picture_id) { - found = 1; - break; - } - } - - if (!found) { - struct object_surface *obj_surface = SURFACE(gen6_mfd_context->reference_surface[i].surface_id); - obj_surface->flags &= ~SURFACE_REFERENCED; - - if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { - dri_bo_unreference(obj_surface->bo); - obj_surface->bo = NULL; - obj_surface->flags &= ~SURFACE_REF_DIS_MASK; - } - - if (obj_surface->free_private_data) - obj_surface->free_private_data(&obj_surface->private_data); - - gen6_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; - gen6_mfd_context->reference_surface[i].frame_store_id = -1; - } - } - - for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { - VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i]; - int found = 0; - - if (ref_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { - if (gen6_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) - continue; - - if (gen6_mfd_context->reference_surface[j].surface_id == ref_pic->picture_id) { - found = 1; - break; - } - } - - if (!found) { - int frame_idx; - struct object_surface *obj_surface = SURFACE(ref_pic->picture_id); - - assert(obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N', 'V', '1', '2')); - - for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface); frame_idx++) { - for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { - if (gen6_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) - continue; - - if (gen6_mfd_context->reference_surface[j].frame_store_id == frame_idx) - break; - } - - if (j == ARRAY_ELEMS(gen6_mfd_context->reference_surface)) - break; - } - - assert(frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface)); - - for (j = 0; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { - if (gen6_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) { - gen6_mfd_context->reference_surface[j].surface_id = ref_pic->picture_id; - gen6_mfd_context->reference_surface[j].frame_store_id = frame_idx; - break; - } - } - } - } - - /* sort */ - for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface) - 1; i++) { - if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && - gen6_mfd_context->reference_surface[i].frame_store_id == i) - continue; - - for (j = i + 1; j < ARRAY_ELEMS(gen6_mfd_context->reference_surface); j++) { - if (gen6_mfd_context->reference_surface[j].surface_id != VA_INVALID_ID && - gen6_mfd_context->reference_surface[j].frame_store_id == i) { - VASurfaceID id = gen6_mfd_context->reference_surface[i].surface_id; - int frame_idx = gen6_mfd_context->reference_surface[i].frame_store_id; - - gen6_mfd_context->reference_surface[i].surface_id = gen6_mfd_context->reference_surface[j].surface_id; - gen6_mfd_context->reference_surface[i].frame_store_id = gen6_mfd_context->reference_surface[j].frame_store_id; - gen6_mfd_context->reference_surface[j].surface_id = id; - gen6_mfd_context->reference_surface[j].frame_store_id = frame_idx; - break; - } - } - } -} - -static void -gen6_mfd_free_avc_surface(void **data) -{ - struct gen6_avc_surface *gen6_avc_surface = *data; - - if (!gen6_avc_surface) - return; - - dri_bo_unreference(gen6_avc_surface->dmv_top); - gen6_avc_surface->dmv_top = NULL; - dri_bo_unreference(gen6_avc_surface->dmv_bottom); - gen6_avc_surface->dmv_bottom = NULL; - - free(gen6_avc_surface); - *data = NULL; -} - -static void gen6_mfd_init_avc_surface(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param, struct object_surface *obj_surface) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen6_avc_surface *gen6_avc_surface = obj_surface->private_data; + GenAvcSurface *gen6_avc_surface = obj_surface->private_data; + int height_in_mbs; - obj_surface->free_private_data = gen6_mfd_free_avc_surface; + obj_surface->free_private_data = gen_free_avc_surface; + height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */ if (!gen6_avc_surface) { - gen6_avc_surface = calloc(sizeof(struct gen6_avc_surface), 1); + gen6_avc_surface = calloc(sizeof(GenAvcSurface), 1); + assert(gen6_avc_surface); + gen6_avc_surface->base.frame_store_id = -1; assert((obj_surface->size & 0x3f) == 0); obj_surface->private_data = gen6_avc_surface; } @@ -209,7 +73,7 @@ if (gen6_avc_surface->dmv_top == NULL) { gen6_avc_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr, "direct mv w/r buffer", - DMV_SIZE, + 128 * height_in_mbs * 64, /* scalable with frame height */ 0x1000); } @@ -217,7 +81,7 @@ gen6_avc_surface->dmv_bottom == NULL) { gen6_avc_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr, "direct mv w/r buffer", - DMV_SIZE, + 128 * height_in_mbs * 64, /* scalable with frame height */ 0x1000); } } @@ -267,10 +131,12 @@ struct gen6_mfd_context *gen6_mfd_context) { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct object_surface *obj_surface = SURFACE(decode_state->current_render_target); - assert(obj_surface); - + struct object_surface *obj_surface = decode_state->render_object; + unsigned int surface_format; + + surface_format = obj_surface->fourcc == VA_FOURCC_Y800 ? + MFX_SURFACE_MONOCHROME : MFX_SURFACE_PLANAR_420_8; + BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); OUT_BCS_BATCH(batch, 0); @@ -278,7 +144,7 @@ ((obj_surface->orig_height - 1) << 19) | ((obj_surface->orig_width - 1) << 6)); OUT_BCS_BATCH(batch, - (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (surface_format << 28) | /* 420 planar YUV surface */ (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ (0 << 22) | /* surface object control state, FIXME??? */ ((obj_surface->width - 1) << 3) | /* pitch */ @@ -299,7 +165,6 @@ struct gen6_mfd_context *gen6_mfd_context) { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - struct i965_driver_data *i965 = i965_driver_data(ctx); int i; BEGIN_BCS_BATCH(batch, 24); @@ -339,9 +204,10 @@ for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { struct object_surface *obj_surface; - if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { - obj_surface = SURFACE(gen6_mfd_context->reference_surface[i].surface_id); - assert(obj_surface && obj_surface->bo); + if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen6_mfd_context->reference_surface[i].obj_surface && + gen6_mfd_context->reference_surface[i].obj_surface->bo) { + obj_surface = gen6_mfd_context->reference_surface[i].obj_surface; OUT_BCS_RELOC(batch, obj_surface->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, @@ -414,27 +280,6 @@ } static void -gen6_mfd_aes_state(VADriverContextP ctx, - struct decode_state *decode_state, - int standard_select) -{ - /* FIXME */ -} - -static void -gen6_mfd_wait(VADriverContextP ctx, - struct decode_state *decode_state, - int standard_select, - struct gen6_mfd_context *gen6_mfd_context) -{ - struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - - BEGIN_BCS_BATCH(batch, 1); - OUT_BCS_BATCH(batch, MFX_WAIT | (1 << 8)); - ADVANCE_BCS_BATCH(batch); -} - -static void gen6_mfd_avc_img_state(VADriverContextP ctx, struct decode_state *decode_state, struct gen6_mfd_context *gen6_mfd_context) @@ -448,7 +293,6 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; - assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) qm_present_flag = 1; @@ -569,44 +413,40 @@ static void gen6_mfd_avc_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, VAPictureParameterBufferH264 *pic_param, VASliceParameterBufferH264 *slice_param, struct gen6_mfd_context *gen6_mfd_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; struct object_surface *obj_surface; - struct gen6_avc_surface *gen6_avc_surface; + GenAvcSurface *gen6_avc_surface; VAPictureH264 *va_pic; - int i, j; + int i; BEGIN_BCS_BATCH(batch, 69); OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); /* reference surfaces 0..15 */ for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { - if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { - obj_surface = SURFACE(gen6_mfd_context->reference_surface[i].surface_id); - assert(obj_surface); + if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen6_mfd_context->reference_surface[i].obj_surface && + gen6_mfd_context->reference_surface[i].obj_surface->private_data) { + + obj_surface = gen6_mfd_context->reference_surface[i].obj_surface; gen6_avc_surface = obj_surface->private_data; + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); - if (gen6_avc_surface == NULL) { - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - } else { + if (gen6_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); - - if (gen6_avc_surface->dmv_bottom_flag == 1) - OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_bottom, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - else - OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - } } else { OUT_BCS_BATCH(batch, 0); OUT_BCS_BATCH(batch, 0); @@ -615,9 +455,8 @@ /* the current decoding frame/field */ va_pic = &pic_param->CurrPic; - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface && obj_surface->bo && obj_surface->private_data); + obj_surface = decode_state->render_object; + assert(obj_surface->bo && obj_surface->private_data); gen6_avc_surface = obj_surface->private_data; OUT_BCS_RELOC(batch, gen6_avc_surface->dmv_top, @@ -635,23 +474,14 @@ /* POC List */ for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { - if (gen6_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { - int found = 0; - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - va_pic = &pic_param->ReferenceFrames[j]; - - if (va_pic->flags & VA_PICTURE_H264_INVALID) - continue; + obj_surface = gen6_mfd_context->reference_surface[i].obj_surface; - if (va_pic->picture_id == gen6_mfd_context->reference_surface[i].surface_id) { - found = 1; - break; - } - } + if (obj_surface) { + const VAPictureH264 * const va_pic = avc_find_picture( + obj_surface->base.id, pic_param->ReferenceFrames, + ARRAY_ELEMS(pic_param->ReferenceFrames)); - assert(found == 1); - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - + assert(va_pic != NULL); OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); } else { @@ -683,6 +513,7 @@ pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); int weighted_pred_idc = 0; int first_mb_in_slice = 0, first_mb_in_next_slice = 0; + unsigned int chroma_log2_weight_denom, luma_log2_weight_denom; int slice_type; if (slice_param->slice_type == SLICE_TYPE_I || @@ -696,6 +527,9 @@ slice_type = SLICE_TYPE_B; } + luma_log2_weight_denom = slice_param->luma_log2_weight_denom; + chroma_log2_weight_denom = slice_param->chroma_log2_weight_denom; + if (slice_type == SLICE_TYPE_I) { assert(slice_param->num_ref_idx_l0_active_minus1 == 0); assert(slice_param->num_ref_idx_l1_active_minus1 == 0); @@ -709,17 +543,29 @@ } else { num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; - weighted_pred_idc = (pic_param->pic_fields.bits.weighted_bipred_idc == 1); + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + + if (weighted_pred_idc == 2) { + /* 8.4.3 - Derivation process for prediction weights (8-279) */ + luma_log2_weight_denom = 5; + chroma_log2_weight_denom = 5; + } } - first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture; + first_mb_in_slice = slice_param->first_mb_in_slice; slice_hor_pos = first_mb_in_slice % width_in_mbs; slice_ver_pos = first_mb_in_slice / width_in_mbs; + if (mbaff_picture) + slice_ver_pos = slice_ver_pos << 1; + if (next_slice_param) { - first_mb_in_next_slice = next_slice_param->first_mb_in_slice << mbaff_picture; + first_mb_in_next_slice = next_slice_param->first_mb_in_slice; next_slice_hor_pos = first_mb_in_next_slice % width_in_mbs; next_slice_ver_pos = first_mb_in_next_slice / width_in_mbs; + + if (mbaff_picture) + next_slice_ver_pos = next_slice_ver_pos << 1; } else { next_slice_hor_pos = 0; next_slice_ver_pos = height_in_mbs; @@ -731,8 +577,8 @@ OUT_BCS_BATCH(batch, (num_ref_idx_l1 << 24) | (num_ref_idx_l0 << 16) | - (slice_param->chroma_log2_weight_denom << 8) | - (slice_param->luma_log2_weight_denom << 0)); + (chroma_log2_weight_denom << 8) | + (luma_log2_weight_denom << 0)); OUT_BCS_BATCH(batch, (weighted_pred_idc << 30) | (slice_param->direct_spatial_mv_pred_flag << 29) | @@ -757,107 +603,17 @@ ADVANCE_BCS_BATCH(batch); } -static void -gen6_mfd_avc_phantom_slice_state(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - struct gen6_mfd_context *gen6_mfd_context) -{ - struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; - int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ - - BEGIN_BCS_BATCH(batch, 11); /* FIXME: is it 10??? */ - OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, - height_in_mbs << 24 | - width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag)); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - ADVANCE_BCS_BATCH(batch); -} - -static void +static inline void gen6_mfd_avc_ref_idx_state(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param, VASliceParameterBufferH264 *slice_param, struct gen6_mfd_context *gen6_mfd_context) { - struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - int i, j, num_ref_list; - struct { - unsigned char bottom_idc:1; - unsigned char frame_store_index:4; - unsigned char field_picture:1; - unsigned char long_term:1; - unsigned char non_exist:1; - } refs[32]; - - if (slice_param->slice_type == SLICE_TYPE_I || - slice_param->slice_type == SLICE_TYPE_SI) - return; - - if (slice_param->slice_type == SLICE_TYPE_P || - slice_param->slice_type == SLICE_TYPE_SP) { - num_ref_list = 1; - } else { - num_ref_list = 2; - } - - for (i = 0; i < num_ref_list; i++) { - VAPictureH264 *va_pic; - - if (i == 0) { - va_pic = slice_param->RefPicList0; - } else { - va_pic = slice_param->RefPicList1; - } - - BEGIN_BCS_BATCH(batch, 10); - OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); - OUT_BCS_BATCH(batch, i); - - for (j = 0; j < 32; j++) { - if (va_pic->flags & VA_PICTURE_H264_INVALID) { - refs[j].non_exist = 1; - refs[j].long_term = 1; - refs[j].field_picture = 1; - refs[j].frame_store_index = 0xf; - refs[j].bottom_idc = 1; - } else { - int frame_idx; - - for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface); frame_idx++) { - if (gen6_mfd_context->reference_surface[frame_idx].surface_id != VA_INVALID_ID && - va_pic->picture_id == gen6_mfd_context->reference_surface[frame_idx].surface_id) { - assert(frame_idx == gen6_mfd_context->reference_surface[frame_idx].frame_store_id); - break; - } - } - - assert(frame_idx < ARRAY_ELEMS(gen6_mfd_context->reference_surface)); - - refs[j].non_exist = 0; - refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); - refs[j].field_picture = !!(va_pic->flags & - (VA_PICTURE_H264_TOP_FIELD | - VA_PICTURE_H264_BOTTOM_FIELD)); - refs[j].frame_store_index = frame_idx; - refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); - } - - va_pic++; - } - - intel_batchbuffer_data(batch, refs, sizeof(refs)); - ADVANCE_BCS_BATCH(batch); - } + gen6_send_avc_ref_idx_state( + gen6_mfd_context->base.batch, + slice_param, + gen6_mfd_context->reference_surface + ); } static void @@ -911,27 +667,6 @@ } } -static int -gen6_mfd_avc_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset) -{ - int out_slice_data_bit_offset; - int slice_header_size = in_slice_data_bit_offset / 8; - int i, j; - - for (i = 0, j = 0; i < slice_header_size; i++, j++) { - if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) { - i++, j += 2; - } - } - - out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; - - if (mode_flag == ENTROPY_CABAC) - out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8); - - return out_slice_data_bit_offset; -} - static void gen6_mfd_avc_bsd_object(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param, @@ -940,21 +675,19 @@ struct gen6_mfd_context *gen6_mfd_context) { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - int slice_data_bit_offset; - uint8_t *slice_data = NULL; + unsigned int slice_data_bit_offset; - dri_bo_map(slice_data_bo, 0); - slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); - slice_data_bit_offset = gen6_mfd_avc_get_slice_bit_offset(slice_data, - pic_param->pic_fields.bits.entropy_coding_mode_flag, - slice_param->slice_data_bit_offset); - dri_bo_unmap(slice_data_bo); + slice_data_bit_offset = avc_get_first_mb_bit_offset( + slice_data_bo, + slice_param, + pic_param->pic_fields.bits.entropy_coding_mode_flag + ); BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); OUT_BCS_BATCH(batch, - ((slice_param->slice_data_size - (slice_data_bit_offset >> 3)) << 0)); - OUT_BCS_BATCH(batch, slice_param->slice_data_offset + (slice_data_bit_offset >> 3)); + (slice_param->slice_data_size - slice_param->slice_data_offset)); + OUT_BCS_BATCH(batch, slice_param->slice_data_offset); OUT_BCS_BATCH(batch, (0 << 31) | (0 << 14) | @@ -962,37 +695,29 @@ (0 << 10) | (0 << 8)); OUT_BCS_BATCH(batch, - (0 << 16) | - (0 << 6) | + ((slice_data_bit_offset >> 3) << 16) | + (1 << 7) | + (1 << 6) | ((0x7 - (slice_data_bit_offset & 0x7)) << 0)); OUT_BCS_BATCH(batch, 0); ADVANCE_BCS_BATCH(batch); } static void -gen6_mfd_avc_phantom_slice_bsd_object(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - struct gen6_mfd_context *gen6_mfd_context) +gen6_mfd_avc_phantom_slice_first(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen6_mfd_context *gen6_mfd_context) { - struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - - BEGIN_BCS_BATCH(batch, 6); - OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - ADVANCE_BCS_BATCH(batch); + gen6_mfd_avc_phantom_slice(ctx, pic_param, next_slice_param, gen6_mfd_context->base.batch); } static void -gen6_mfd_avc_phantom_slice(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - struct gen6_mfd_context *gen6_mfd_context) +gen6_mfd_avc_phantom_slice_last(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct gen6_mfd_context *gen6_mfd_context) { - gen6_mfd_avc_phantom_slice_state(ctx, pic_param, gen6_mfd_context); - gen6_mfd_avc_phantom_slice_bsd_object(ctx, pic_param, gen6_mfd_context); + gen6_mfd_avc_phantom_slice(ctx, pic_param, NULL, gen6_mfd_context->base.batch); } static void @@ -1002,11 +727,11 @@ { VAPictureParameterBufferH264 *pic_param; VASliceParameterBufferH264 *slice_param; - VAPictureH264 *va_pic; struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; dri_bo *bo; int i, j, enable_avc_ildb = 0; + int width_in_mbs; for (j = 0; j < decode_state->num_slice_params && enable_avc_ildb == 0; j++) { assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); @@ -1031,17 +756,19 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; - gen6_mfd_avc_frame_store_index(ctx, pic_param, gen6_mfd_context); + intel_update_avc_frame_store_index(ctx, decode_state, pic_param, + gen6_mfd_context->reference_surface, &gen6_mfd_context->fs_ctx); + width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff); /* Current decoded picture */ - va_pic = &pic_param->CurrPic; - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface); - obj_surface->flags &= ~SURFACE_REF_DIS_MASK; - obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0); + obj_surface = decode_state->render_object; + if (pic_param->pic_fields.bits.reference_pic_flag) + obj_surface->flags |= SURFACE_REFERENCED; + else + obj_surface->flags &= ~SURFACE_REFERENCED; + + avc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param); gen6_mfd_init_avc_surface(ctx, pic_param, obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo); gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo; @@ -1056,7 +783,7 @@ dri_bo_unreference(gen6_mfd_context->intra_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "intra row store", - 128 * 64, + width_in_mbs * 64, 0x1000); assert(bo); gen6_mfd_context->intra_row_store_scratch_buffer.bo = bo; @@ -1065,7 +792,7 @@ dri_bo_unreference(gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "deblocking filter row store", - 30720, /* 4 * 120 * 64 */ + width_in_mbs * 64 * 4, 0x1000); assert(bo); gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; @@ -1074,7 +801,7 @@ dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "bsd mpc row store", - 11520, /* 1.5 * 120 * 64 */ + width_in_mbs * 96, 0x1000); assert(bo); gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; @@ -1083,7 +810,7 @@ dri_bo_unreference(gen6_mfd_context->mpr_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "mpr row store", - 7680, /* 1. 0 * 120 * 64 */ + width_in_mbs * 64, 0x1000); assert(bo); gen6_mfd_context->mpr_row_store_scratch_buffer.bo = bo; @@ -1127,6 +854,10 @@ else next_slice_group_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer; + if (j == 0 && + slice_param->first_mb_in_slice) + gen6_mfd_avc_phantom_slice_first(ctx, pic_param, slice_param, gen6_mfd_context); + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); assert((slice_param->slice_type == SLICE_TYPE_I) || @@ -1140,7 +871,7 @@ else next_slice_param = next_slice_group_param; - gen6_mfd_avc_directmode_state(ctx, pic_param, slice_param, gen6_mfd_context); + gen6_mfd_avc_directmode_state(ctx, decode_state, pic_param, slice_param, gen6_mfd_context); gen6_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param, gen6_mfd_context); gen6_mfd_avc_ref_idx_state(ctx, pic_param, slice_param, gen6_mfd_context); gen6_mfd_avc_weightoffset_state(ctx, pic_param, slice_param, gen6_mfd_context); @@ -1149,7 +880,7 @@ } } - gen6_mfd_avc_phantom_slice(ctx, pic_param, gen6_mfd_context); + gen6_mfd_avc_phantom_slice_last(ctx, pic_param, gen6_mfd_context); intel_batchbuffer_end_atomic(batch); intel_batchbuffer_flush(batch); } @@ -1162,35 +893,23 @@ VAPictureParameterBufferMPEG2 *pic_param; struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; - int i; dri_bo *bo; + unsigned int width_in_mbs; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; - /* reference picture */ - obj_surface = SURFACE(pic_param->forward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen6_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; - else - gen6_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; - - obj_surface = SURFACE(pic_param->backward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen6_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; - else - gen6_mfd_context->reference_surface[1].surface_id = gen6_mfd_context->reference_surface[0].surface_id; - - /* must do so !!! */ - for (i = 2; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) - gen6_mfd_context->reference_surface[i].surface_id = gen6_mfd_context->reference_surface[i % 2].surface_id; + mpeg2_set_reference_surfaces( + ctx, + gen6_mfd_context->reference_surface, + decode_state, + pic_param + ); /* Current decoded picture */ - obj_surface = SURFACE(decode_state->current_render_target); - assert(obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); dri_bo_unreference(gen6_mfd_context->pre_deblocking_output.bo); gen6_mfd_context->pre_deblocking_output.bo = obj_surface->bo; @@ -1200,7 +919,7 @@ dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "bsd mpc row store", - 11520, /* 1.5 * 120 * 64 */ + width_in_mbs * 96, 0x1000); assert(bo); gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; @@ -1220,10 +939,18 @@ { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; VAPictureParameterBufferMPEG2 *pic_param; + unsigned int tff, pic_structure; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + pic_structure = pic_param->picture_coding_extension.bits.picture_structure; + if (pic_structure == MPEG_FRAME) + tff = pic_param->picture_coding_extension.bits.top_field_first; + else + tff = !(pic_param->picture_coding_extension.bits.is_first_field ^ + (pic_structure & MPEG_TOP_FIELD)); + BEGIN_BCS_BATCH(batch, 4); OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (4 - 2)); OUT_BCS_BATCH(batch, @@ -1233,7 +960,7 @@ ((pic_param->f_code >> 12) & 0xf) << 16 | /* f_code[0][0] */ pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | pic_param->picture_coding_extension.bits.picture_structure << 12 | - pic_param->picture_coding_extension.bits.top_field_first << 11 | + tff << 11 | pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | pic_param->picture_coding_extension.bits.q_scale_type << 8 | @@ -1310,20 +1037,22 @@ { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; - int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic = 0; + int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic_wa, is_field_pic = 0; if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) is_field_pic = 1; + is_field_pic_wa = is_field_pic && + gen6_mfd_context->wa_mpeg2_slice_vertical_position > 0; - vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic); + vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic_wa); hpos0 = slice_param->slice_horizontal_position; if (next_slice_param == NULL) { vpos1 = ALIGN(pic_param->vertical_size, 16) / 16 / (1 + is_field_pic); hpos1 = 0; } else { - vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic); + vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic_wa); hpos1 = next_slice_param->slice_horizontal_position; } @@ -1354,9 +1083,9 @@ { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; VAPictureParameterBufferMPEG2 *pic_param; - VASliceParameterBufferMPEG2 *slice_param, *next_slice_param, *next_slice_group_param; + VASliceParameterBufferMPEG2 *slice_param, *next_slice_param; dri_bo *slice_data_bo; - int i, j; + int group_idx = 0, pre_group_idx = -1, element_idx = 0; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; @@ -1371,28 +1100,22 @@ gen6_mfd_mpeg2_pic_state(ctx, decode_state, gen6_mfd_context); gen6_mfd_mpeg2_qm_state(ctx, decode_state, gen6_mfd_context); - for (j = 0; j < decode_state->num_slice_params; j++) { - assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); - slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer; - slice_data_bo = decode_state->slice_datas[j]->bo; - gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2, gen6_mfd_context); - - if (j == decode_state->num_slice_params - 1) - next_slice_group_param = NULL; - else - next_slice_group_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j + 1]->buffer; - - for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { - assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); - - if (i < decode_state->slice_params[j]->num_elements - 1) - next_slice_param = slice_param + 1; - else - next_slice_param = next_slice_group_param; - - gen6_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen6_mfd_context); - slice_param++; - } + if (gen6_mfd_context->wa_mpeg2_slice_vertical_position < 0) + gen6_mfd_context->wa_mpeg2_slice_vertical_position = + mpeg2_wa_slice_vertical_position(decode_state, pic_param); + + slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[group_idx]->buffer; + + for (; slice_param;) { + if (pre_group_idx != group_idx) { + slice_data_bo = decode_state->slice_datas[group_idx]->bo; + gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2, gen6_mfd_context); + pre_group_idx = group_idx; + } + + next_slice_param = intel_mpeg2_find_next_slice(decode_state, pic_param, slice_param, &group_idx, &element_idx); + gen6_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen6_mfd_context); + slice_param = next_slice_param; } intel_batchbuffer_end_atomic(batch); @@ -1455,11 +1178,16 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct gen6_vc1_surface *gen6_vc1_surface = obj_surface->private_data; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; obj_surface->free_private_data = gen6_mfd_free_vc1_surface; if (!gen6_vc1_surface) { gen6_vc1_surface = calloc(sizeof(struct gen6_vc1_surface), 1); + + if (!gen6_vc1_surface) + return; + assert((obj_surface->size & 0x3f) == 0); obj_surface->private_data = gen6_vc1_surface; } @@ -1469,7 +1197,7 @@ if (gen6_vc1_surface->dmv == NULL) { gen6_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr, "direct mv w/r buffer", - 557056, /* 64 * 128 * 64 */ + 128 * height_in_mbs * 64, /* scalable with frame height */ 0x1000); } } @@ -1482,36 +1210,24 @@ VAPictureParameterBufferVC1 *pic_param; struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; - int i; dri_bo *bo; + int width_in_mbs; + int picture_type; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + picture_type = pic_param->picture_fields.bits.picture_type; - /* reference picture */ - obj_surface = SURFACE(pic_param->forward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen6_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; - else - gen6_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; - - obj_surface = SURFACE(pic_param->backward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen6_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; - else - gen6_mfd_context->reference_surface[1].surface_id = pic_param->forward_reference_picture; - - /* must do so !!! */ - for (i = 2; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) - gen6_mfd_context->reference_surface[i].surface_id = gen6_mfd_context->reference_surface[i % 2].surface_id; + intel_update_vc1_frame_store_index(ctx, + decode_state, + pic_param, + gen6_mfd_context->reference_surface); /* Current decoded picture */ - obj_surface = SURFACE(decode_state->current_render_target); - assert(obj_surface); + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); gen6_mfd_init_vc1_surface(ctx, pic_param, obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); dri_bo_unreference(gen6_mfd_context->post_deblocking_output.bo); gen6_mfd_context->post_deblocking_output.bo = obj_surface->bo; @@ -1526,7 +1242,7 @@ dri_bo_unreference(gen6_mfd_context->intra_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "intra row store", - 128 * 64, + width_in_mbs * 64, 0x1000); assert(bo); gen6_mfd_context->intra_row_store_scratch_buffer.bo = bo; @@ -1535,7 +1251,7 @@ dri_bo_unreference(gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "deblocking filter row store", - 46080, /* 6 * 120 * 64 */ + width_in_mbs * 7 * 64, 0x1000); assert(bo); gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; @@ -1544,7 +1260,7 @@ dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "bsd mpc row store", - 11520, /* 1.5 * 120 * 64 */ + width_in_mbs * 96, 0x1000); assert(bo); gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; @@ -1567,7 +1283,7 @@ bo = dri_bo_alloc(i965->intel.bufmgr, "VC-1 Bitplane", - bitplane_width * bitplane_width, + bitplane_width * height_in_mbs, 0x1000); assert(bo); gen6_mfd_context->bitplane_read_buffer.bo = bo; @@ -1586,6 +1302,10 @@ src_shift = !((src_h * width_in_mbs + src_w) & 1) * 4; src_value = ((src[src_index] >> src_shift) & 0xf); + if (picture_type == GEN6_VC1_SKIPPED_PICTURE){ + src_value |= 0x2; + } + dst_index = src_w / 2; dst[dst_index] = ((dst[dst_index] >> 4) | (src_value << 4)); } @@ -1608,7 +1328,6 @@ { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; VAPictureParameterBufferVC1 *pic_param; - struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; int alt_pquant_config = 0, alt_pquant_edge_mask = 0, alt_pq; int dquant, dquantfrm, dqprofile, dqdbedge, dqsbedge, dqbilevel; @@ -1711,16 +1430,27 @@ if (picture_type == GEN6_VC1_I_PICTURE || picture_type == GEN6_VC1_BI_PICTURE) /* I picture */ trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx2; - else + else { trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx1; - + /* + * 8.3.6.2.1 Transform Type Selection + * If variable-sized transform coding is not enabled, + * then the 8x8 transform shall be used for all blocks. + * it is also MFX_VC1_PIC_STATE requirement. + */ + if (pic_param->transform_fields.bits.variable_sized_transform_flag == 0) { + pic_param->transform_fields.bits.mb_level_transform_type_flag = 1; + pic_param->transform_fields.bits.frame_level_transform_type = 0; + } + } if (picture_type == GEN6_VC1_B_PICTURE) { struct gen6_vc1_surface *gen6_vc1_surface = NULL; - obj_surface = SURFACE(pic_param->backward_reference_picture); - assert(obj_surface); - gen6_vc1_surface = obj_surface->private_data; + obj_surface = decode_state->reference_objects[1]; + + if (obj_surface) + gen6_vc1_surface = obj_surface->private_data; if (!gen6_vc1_surface || (va_to_gen6_vc1_pic_type[gen6_vc1_surface->picture_type] == GEN6_VC1_I_PICTURE || @@ -1751,8 +1481,30 @@ } overlap = pic_param->sequence_fields.bits.overlap; - if (profile != GEN6_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9) + + if (overlap) { overlap = 0; + if (profile != GEN6_VC1_ADVANCED_PROFILE){ + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9 && + pic_param->picture_fields.bits.picture_type != GEN6_VC1_B_PICTURE) { + overlap = 1; + } + }else { + if (pic_param->picture_fields.bits.picture_type == GEN6_VC1_P_PICTURE && + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } + if (pic_param->picture_fields.bits.picture_type == GEN6_VC1_I_PICTURE || + pic_param->picture_fields.bits.picture_type == GEN6_VC1_BI_PICTURE){ + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } else if (va_to_gen6_vc1_condover[pic_param->conditional_overlap_flag] == 2 || + va_to_gen6_vc1_condover[pic_param->conditional_overlap_flag] == 3) { + overlap = 1; + } + } + } + } assert(pic_param->conditional_overlap_flag < 3); assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */ @@ -1873,21 +1625,16 @@ struct gen6_mfd_context *gen6_mfd_context) { struct intel_batchbuffer *batch = gen6_mfd_context->base.batch; - VAPictureParameterBufferVC1 *pic_param; - struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; dri_bo *dmv_read_buffer = NULL, *dmv_write_buffer = NULL; - assert(decode_state->pic_param && decode_state->pic_param->buffer); - pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; - - obj_surface = SURFACE(decode_state->current_render_target); + obj_surface = decode_state->render_object; if (obj_surface && obj_surface->private_data) { dmv_write_buffer = ((struct gen6_vc1_surface *)(obj_surface->private_data))->dmv; } - obj_surface = SURFACE(pic_param->backward_reference_picture); + obj_surface = decode_state->reference_objects[1]; if (obj_surface && obj_surface->private_data) { dmv_read_buffer = ((struct gen6_vc1_surface *)(obj_surface->private_data))->dmv; @@ -2026,7 +1773,7 @@ intel_batchbuffer_flush(batch); } -static void +static VAStatus gen6_mfd_decode_picture(VADriverContextP ctx, VAProfile profile, union codec_state *codec_state, @@ -2034,19 +1781,26 @@ { struct gen6_mfd_context *gen6_mfd_context = (struct gen6_mfd_context *)hw_context; - struct decode_state *decode_state = &codec_state->dec; + struct decode_state *decode_state = &codec_state->decode; + VAStatus vaStatus; assert(gen6_mfd_context); + vaStatus = intel_decoder_sanity_check_input(ctx, profile, decode_state); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + switch (profile) { case VAProfileMPEG2Simple: case VAProfileMPEG2Main: gen6_mfd_mpeg2_decode_picture(ctx, decode_state, gen6_mfd_context); break; - case VAProfileH264Baseline: + case VAProfileH264ConstrainedBaseline: case VAProfileH264Main: case VAProfileH264High: + case VAProfileH264StereoHigh: gen6_mfd_avc_decode_picture(ctx, decode_state, gen6_mfd_context); break; @@ -2060,6 +1814,11 @@ assert(0); break; } + + vaStatus = VA_STATUS_SUCCESS; + +out: + return vaStatus; } static void @@ -2093,20 +1852,26 @@ } struct hw_context * -gen6_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +gen6_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) { struct intel_driver_data *intel = intel_driver_data(ctx); struct gen6_mfd_context *gen6_mfd_context = calloc(1, sizeof(struct gen6_mfd_context)); int i; + if (!gen6_mfd_context) + return NULL; + gen6_mfd_context->base.destroy = gen6_mfd_context_destroy; gen6_mfd_context->base.run = gen6_mfd_decode_picture; - gen6_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + gen6_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) { gen6_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; gen6_mfd_context->reference_surface[i].frame_store_id = -1; + gen6_mfd_context->reference_surface[i].obj_surface = NULL; } + + gen6_mfd_context->wa_mpeg2_slice_vertical_position = -1; return (struct hw_context *)gen6_mfd_context; } diff -Nru intel-vaapi-driver-1.0.15/src/gen6_mfd.h intel-vaapi-driver-1.7.1/src/gen6_mfd.h --- intel-vaapi-driver-1.0.15/src/gen6_mfd.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen6_mfd.h 2016-06-03 06:05:58.000000000 +0000 @@ -33,13 +33,7 @@ #include #include #include - -struct gen6_avc_surface -{ - dri_bo *dmv_top; - dri_bo *dmv_bottom; - int dmv_bottom_flag; -}; +#include "i965_decoder.h" #define GEN6_VC1_I_PICTURE 0 #define GEN6_VC1_P_PICTURE 1 @@ -58,7 +52,6 @@ int picture_type; }; -#define MAX_MFX_REFERENCE_SURFACES 16 struct hw_context; struct gen6_mfd_context @@ -69,45 +62,17 @@ VAIQMatrixBufferMPEG2 mpeg2; } iq_matrix; - struct { - VASurfaceID surface_id; - int frame_store_id; - } reference_surface[MAX_MFX_REFERENCE_SURFACES]; - - struct { - dri_bo *bo; - int valid; - } post_deblocking_output; - - struct { - dri_bo *bo; - int valid; - } pre_deblocking_output; - - struct { - dri_bo *bo; - int valid; - } intra_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } deblocking_filter_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } bsd_mpc_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } mpr_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } bitplane_read_buffer; + GenFrameStoreContext fs_ctx; + GenFrameStore reference_surface[MAX_GEN_REFERENCE_FRAMES]; + GenBuffer post_deblocking_output; + GenBuffer pre_deblocking_output; + GenBuffer intra_row_store_scratch_buffer; + GenBuffer deblocking_filter_row_store_scratch_buffer; + GenBuffer bsd_mpc_row_store_scratch_buffer; + GenBuffer mpr_row_store_scratch_buffer; + GenBuffer bitplane_read_buffer; + + int wa_mpeg2_slice_vertical_position; }; #endif /* _GEN6_MFD_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/gen6_vme.c intel-vaapi-driver-1.7.1/src/gen6_vme.c --- intel-vaapi-driver-1.0.15/src/gen6_vme.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen6_vme.c 2016-06-16 00:57:46.000000000 +0000 @@ -27,38 +27,39 @@ */ #include +#include #include #include -#include - #include "intel_batchbuffer.h" #include "intel_driver.h" #include "i965_defines.h" #include "i965_drv_video.h" -#include "gen6_vme.h" #include "i965_encoder.h" - -#define SURFACE_STATE_PADDED_SIZE_0_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32) -#define SURFACE_STATE_PADDED_SIZE_1_GEN7 ALIGN(sizeof(struct gen7_surface_state2), 32) -#define SURFACE_STATE_PADDED_SIZE_GEN7 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7) - -#define SURFACE_STATE_PADDED_SIZE_0_GEN6 ALIGN(sizeof(struct i965_surface_state), 32) -#define SURFACE_STATE_PADDED_SIZE_1_GEN6 ALIGN(sizeof(struct i965_surface_state2), 32) -#define SURFACE_STATE_PADDED_SIZE_GEN6 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN7) +#include "gen6_vme.h" +#include "gen6_mfc.h" #define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) -#define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) - -#define VME_INTRA_SHADER 0 -#define VME_INTER_SHADER 1 +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) #define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */ #define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */ #define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */ - + +enum VIDEO_CODING_TYPE{ + VIDEO_CODING_AVC = 0, + VIDEO_CODING_SUM +}; + +enum AVC_VME_KERNEL_TYPE{ + AVC_VME_INTRA_SHADER = 0, + AVC_VME_INTER_SHADER, + AVC_VME_BATCHBUFFER, + AVC_VME_KERNEL_SUM +}; + static const uint32_t gen6_vme_intra_frame[][4] = { #include "shaders/vme/intra_frame.g6b" }; @@ -67,533 +68,178 @@ #include "shaders/vme/inter_frame.g6b" }; +static const uint32_t gen6_vme_batchbuffer[][4] = { +#include "shaders/vme/batchbuffer.g6b" +}; + static struct i965_kernel gen6_vme_kernels[] = { { - "VME Intra Frame", - VME_INTRA_SHADER, /*index*/ + "AVC VME Intra Frame", + AVC_VME_INTRA_SHADER, /*index*/ gen6_vme_intra_frame, sizeof(gen6_vme_intra_frame), NULL }, { - "VME inter Frame", - VME_INTER_SHADER, + "AVC VME inter Frame", + AVC_VME_INTER_SHADER, gen6_vme_inter_frame, sizeof(gen6_vme_inter_frame), NULL - } -}; - -static const uint32_t gen7_vme_intra_frame[][4] = { -#include "shaders/vme/intra_frame.g7b" -}; - -static const uint32_t gen7_vme_inter_frame[][4] = { -#include "shaders/vme/inter_frame.g7b" -}; - -static struct i965_kernel gen7_vme_kernels[] = { - { - "VME Intra Frame", - VME_INTRA_SHADER, /*index*/ - gen7_vme_intra_frame, - sizeof(gen7_vme_intra_frame), - NULL }, { - "VME inter Frame", - VME_INTER_SHADER, - gen7_vme_inter_frame, - sizeof(gen7_vme_inter_frame), + "AVC VME BATCHBUFFER", + AVC_VME_BATCHBUFFER, + gen6_vme_batchbuffer, + sizeof(gen6_vme_batchbuffer), NULL - } + }, }; -static void -gen6_vme_set_common_surface_tiling(struct i965_surface_state *ss, unsigned int tiling) -{ - switch (tiling) { - case I915_TILING_NONE: - ss->ss3.tiled_surface = 0; - ss->ss3.tile_walk = 0; - break; - case I915_TILING_X: - ss->ss3.tiled_surface = 1; - ss->ss3.tile_walk = I965_TILEWALK_XMAJOR; - break; - case I915_TILING_Y: - ss->ss3.tiled_surface = 1; - ss->ss3.tile_walk = I965_TILEWALK_YMAJOR; - break; - } -} - -static void -gen6_vme_set_source_surface_tiling(struct i965_surface_state2 *ss, unsigned int tiling) -{ - switch (tiling) { - case I915_TILING_NONE: - ss->ss2.tiled_surface = 0; - ss->ss2.tile_walk = 0; - break; - case I915_TILING_X: - ss->ss2.tiled_surface = 1; - ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; - break; - case I915_TILING_Y: - ss->ss2.tiled_surface = 1; - ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; - break; - } -} - /* only used for VME source surface state */ -static void gen6_vme_source_surface_state(VADriverContextP ctx, - int index, - struct object_surface *obj_surface, - struct gen6_encoder_context *gen6_encoder_context) -{ - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - struct i965_surface_state2 *ss; - dri_bo *bo; - int w, h, w_pitch, h_pitch; - unsigned int tiling, swizzle; - - assert(obj_surface->bo); - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); - - w = obj_surface->orig_width; - h = obj_surface->orig_height; - w_pitch = obj_surface->width; - h_pitch = obj_surface->height; - - bo = vme_context->surface_state_binding_table.bo; - dri_bo_map(bo, 1); - assert(bo->virtual); - - ss = (struct i965_surface_state2 *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); - memset(ss, 0, sizeof(*ss)); - - ss->ss0.surface_base_address = obj_surface->bo->offset; - - ss->ss1.cbcr_pixel_offset_v_direction = 2; - ss->ss1.width = w - 1; - ss->ss1.height = h - 1; - - ss->ss2.surface_format = MFX_SURFACE_PLANAR_420_8; - ss->ss2.interleave_chroma = 1; - ss->ss2.pitch = w_pitch - 1; - ss->ss2.half_pitch_for_chroma = 0; - - gen6_vme_set_source_surface_tiling(ss, tiling); - - /* UV offset for interleave mode */ - ss->ss3.x_offset_for_cb = 0; - ss->ss3.y_offset_for_cb = h_pitch; - - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, 0, - 0, - SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state2, ss0), - obj_surface->bo); - - ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); - dri_bo_unmap(bo); +static void +gen6_vme_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_surface2_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); } static void gen6_vme_media_source_surface_state(VADriverContextP ctx, int index, struct object_surface *obj_surface, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - struct i965_surface_state *ss; - dri_bo *bo; - int w, h, w_pitch; - unsigned int tiling, swizzle; + struct gen6_vme_context *vme_context = encoder_context->vme_context; - w = obj_surface->orig_width; - h = obj_surface->orig_height; - w_pitch = obj_surface->width; - - /* Y plane */ - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); - - bo = vme_context->surface_state_binding_table.bo; - dri_bo_map(bo, True); - assert(bo->virtual); - - ss = (struct i965_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = obj_surface->bo->offset; - ss->ss2.width = w / 4 - 1; - ss->ss2.height = h - 1; - ss->ss3.pitch = w_pitch - 1; - gen6_vme_set_common_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - 0, - SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state, ss1), - obj_surface->bo); - - ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); - dri_bo_unmap(bo); + vme_context->vme_media_rw_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); } -static VAStatus +static void gen6_vme_output_buffer_setup(VADriverContextP ctx, struct encode_state *encode_state, int index, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - struct i965_surface_state *ss; - dri_bo *bo; - VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; - VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; - int is_intra = pSliceParameter->slice_flags.bits.is_intra; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; int width_in_mbs = pSequenceParameter->picture_width_in_mbs; int height_in_mbs = pSequenceParameter->picture_height_in_mbs; - int num_entries; - - if ( is_intra ) { - vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; - } else { - vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs * 4; - } - vme_context->vme_output.size_block = 16; /* an OWORD */ - vme_context->vme_output.pitch = ALIGN(vme_context->vme_output.size_block, 16); - bo = dri_bo_alloc(i965->intel.bufmgr, - "VME output buffer", - vme_context->vme_output.num_blocks * vme_context->vme_output.pitch, - 0x1000); - assert(bo); - vme_context->vme_output.bo = bo; - - bo = vme_context->surface_state_binding_table.bo; - dri_bo_map(bo, 1); - assert(bo->virtual); - ss = (struct i965_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); - memset(ss, 0, sizeof(*ss)); + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ - /* always use 16 bytes as pitch on Sandy Bridge */ - num_entries = vme_context->vme_output.num_blocks * vme_context->vme_output.pitch / 16; - ss->ss0.render_cache_read_mode = 1; - ss->ss0.surface_type = I965_SURFACE_BUFFER; - ss->ss1.base_addr = vme_context->vme_output.bo->offset; - ss->ss2.width = ((num_entries - 1) & 0x7f); - ss->ss2.height = (((num_entries - 1) >> 7) & 0x1fff); - ss->ss3.depth = (((num_entries - 1) >> 20) & 0x7f); - ss->ss3.pitch = vme_context->vme_output.pitch - 1; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0, - SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state, ss1), - vme_context->vme_output.bo); - - - ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); - dri_bo_unmap(bo); - return VA_STATUS_SUCCESS; -} - -static VAStatus gen6_vme_surface_setup(VADriverContextP ctx, - struct encode_state *encode_state, - int is_intra, - struct gen6_encoder_context *gen6_encoder_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct object_surface *obj_surface; - VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; - - /*Setup surfaces state*/ - /* current picture for encoding */ - obj_surface = SURFACE(encode_state->current_render_target); - assert(obj_surface); - gen6_vme_source_surface_state(ctx, 0, obj_surface, gen6_encoder_context); - gen6_vme_media_source_surface_state(ctx, 4, obj_surface, gen6_encoder_context); - - if ( ! is_intra ) { - /* reference 0 */ - obj_surface = SURFACE(pPicParameter->reference_picture); - assert(obj_surface); - gen6_vme_source_surface_state(ctx, 1, obj_surface, gen6_encoder_context); - /* reference 1, FIXME: */ - // obj_surface = SURFACE(pPicParameter->reference_picture); - // assert(obj_surface); - //gen6_vme_source_surface_state(ctx, 2, obj_surface); - } - - /* VME output */ - gen6_vme_output_buffer_setup(ctx, encode_state, 3, gen6_encoder_context); - - return VA_STATUS_SUCCESS; -} - -/* - * Surface state for IvyBridge - */ -static void -gen7_vme_set_common_surface_tiling(struct gen7_surface_state *ss, unsigned int tiling) -{ - switch (tiling) { - case I915_TILING_NONE: - ss->ss0.tiled_surface = 0; - ss->ss0.tile_walk = 0; - break; - case I915_TILING_X: - ss->ss0.tiled_surface = 1; - ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; - break; - case I915_TILING_Y: - ss->ss0.tiled_surface = 1; - ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; - break; - } -} - -static void -gen7_vme_set_source_surface_tiling(struct gen7_surface_state2 *ss, unsigned int tiling) -{ - switch (tiling) { - case I915_TILING_NONE: - ss->ss2.tiled_surface = 0; - ss->ss2.tile_walk = 0; - break; - case I915_TILING_X: - ss->ss2.tiled_surface = 1; - ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; - break; - case I915_TILING_Y: - ss->ss2.tiled_surface = 1; - ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; - break; - } -} - -/* only used for VME source surface state */ -static void gen7_vme_source_surface_state(VADriverContextP ctx, - int index, - struct object_surface *obj_surface, - struct gen6_encoder_context *gen6_encoder_context) -{ - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - struct gen7_surface_state2 *ss; - dri_bo *bo; - int w, h, w_pitch, h_pitch; - unsigned int tiling, swizzle; - - assert(obj_surface->bo); - - w = obj_surface->orig_width; - h = obj_surface->orig_height; - w_pitch = obj_surface->width; - h_pitch = obj_surface->height; - - bo = vme_context->surface_state_binding_table.bo; - dri_bo_map(bo, 1); - assert(bo->virtual); - - ss = (struct gen7_surface_state2 *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); - memset(ss, 0, sizeof(*ss)); - - ss->ss0.surface_base_address = obj_surface->bo->offset; - - ss->ss1.cbcr_pixel_offset_v_direction = 2; - ss->ss1.width = w - 1; - ss->ss1.height = h - 1; - - ss->ss2.surface_format = MFX_SURFACE_PLANAR_420_8; - ss->ss2.interleave_chroma = 1; - ss->ss2.pitch = w_pitch - 1; - ss->ss2.half_pitch_for_chroma = 0; - - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); - gen7_vme_set_source_surface_tiling(ss, tiling); - - /* UV offset for interleave mode */ - ss->ss3.x_offset_for_cb = 0; - ss->ss3.y_offset_for_cb = h_pitch; - - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, 0, - 0, - SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state2, ss0), - obj_surface->bo); + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES; + else + vme_context->vme_output.size_block = INTER_VME_OUTPUT_IN_BYTES; - ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); - dri_bo_unmap(bo); + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); } static void -gen7_vme_media_source_surface_state(VADriverContextP ctx, - int index, - struct object_surface *obj_surface, - struct gen6_encoder_context *gen6_encoder_context) -{ - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - struct gen7_surface_state *ss; - dri_bo *bo; - int w, h, w_pitch; - unsigned int tiling, swizzle; - - /* Y plane */ - w = obj_surface->orig_width; - h = obj_surface->orig_height; - w_pitch = obj_surface->width; - - bo = vme_context->surface_state_binding_table.bo; - dri_bo_map(bo, True); - assert(bo->virtual); - - ss = (struct gen7_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); - memset(ss, 0, sizeof(*ss)); - - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - - ss->ss1.base_addr = obj_surface->bo->offset; - - ss->ss2.width = w / 4 - 1; - ss->ss2.height = h - 1; - - ss->ss3.pitch = w_pitch - 1; - - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); - gen7_vme_set_common_surface_tiling(ss, tiling); - - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, 0, - 0, - SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1), - obj_surface->bo); - - ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); - dri_bo_unmap(bo); -} - -static VAStatus -gen7_vme_output_buffer_setup(VADriverContextP ctx, - struct encode_state *encode_state, - int index, - struct gen6_encoder_context *gen6_encoder_context) +gen6_vme_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - struct gen7_surface_state *ss; - dri_bo *bo; - VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; - VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; - int is_intra = pSliceParameter->slice_flags.bits.is_intra; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; int width_in_mbs = pSequenceParameter->picture_width_in_mbs; int height_in_mbs = pSequenceParameter->picture_height_in_mbs; - int num_entries; - if ( is_intra ) { - vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; - } else { - vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs * 4; - } - vme_context->vme_output.size_block = 16; /* an OWORD */ - vme_context->vme_output.pitch = ALIGN(vme_context->vme_output.size_block, 16); - bo = dri_bo_alloc(i965->intel.bufmgr, - "VME output buffer", - vme_context->vme_output.num_blocks * vme_context->vme_output.pitch, - 0x1000); - assert(bo); - vme_context->vme_output.bo = bo; - - bo = vme_context->surface_state_binding_table.bo; - dri_bo_map(bo, 1); - assert(bo->virtual); - - ss = (struct gen7_surface_state *)((char *)bo->virtual + SURFACE_STATE_OFFSET(index)); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - - /* always use 16 bytes as pitch on Sandy Bridge */ - num_entries = vme_context->vme_output.num_blocks * vme_context->vme_output.pitch / 16; - - ss->ss0.surface_type = I965_SURFACE_BUFFER; - - ss->ss1.base_addr = vme_context->vme_output.bo->offset; - - ss->ss2.width = ((num_entries - 1) & 0x7f); - ss->ss2.height = (((num_entries - 1) >> 7) & 0x3fff); - ss->ss3.depth = (((num_entries - 1) >> 21) & 0x3f); - - ss->ss3.pitch = vme_context->vme_output.pitch - 1; - - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - 0, - SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1), - vme_context->vme_output.bo); - - ((unsigned int *)((char *)bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); - dri_bo_unmap(bo); - - return VA_STATUS_SUCCESS; + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 32; /* 2 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_batchbuffer, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); } -static VAStatus gen7_vme_surface_setup(VADriverContextP ctx, - struct encode_state *encode_state, - int is_intra, - struct gen6_encoder_context *gen6_encoder_context) +static VAStatus +gen6_vme_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; - VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param->buffer; /*Setup surfaces state*/ /* current picture for encoding */ - obj_surface = SURFACE(encode_state->current_render_target); - assert(obj_surface); - gen7_vme_source_surface_state(ctx, 1, obj_surface, gen6_encoder_context); - gen7_vme_media_source_surface_state(ctx, 4, obj_surface, gen6_encoder_context); - - if ( ! is_intra ) { - /* reference 0 */ - obj_surface = SURFACE(pPicParameter->reference_picture); - assert(obj_surface); - gen7_vme_source_surface_state(ctx, 2, obj_surface, gen6_encoder_context); - /* reference 1, FIXME: */ - // obj_surface = SURFACE(pPicParameter->reference_picture); - // assert(obj_surface); - //gen7_vme_source_surface_state(ctx, 3, obj_surface); + obj_surface = encode_state->input_yuv_object; + gen6_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen6_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + + if (!is_intra) { + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int slice_type; + + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI); + + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen6_vme_source_surface_state); + + if (slice_type == SLICE_TYPE_B) + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen6_vme_source_surface_state); } /* VME output */ - gen7_vme_output_buffer_setup(ctx, encode_state, 0, gen6_encoder_context); + gen6_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context); + gen6_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); return VA_STATUS_SUCCESS; } static VAStatus gen6_vme_interface_setup(VADriverContextP ctx, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; struct gen6_interface_descriptor_data *desc; int i; dri_bo *bo; - bo = vme_context->idrt.bo; + bo = vme_context->gpe_context.idrt.bo; dri_bo_map(bo, 1); assert(bo->virtual); desc = bo->virtual; - for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) { + for (i = 0; i < vme_context->vme_kernel_sum; i++) { struct i965_kernel *kernel; - kernel = &vme_context->vme_kernels[i]; + kernel = &vme_context->gpe_context.kernels[i]; assert(sizeof(*desc) == 32); /*Setup the descritor table*/ memset(desc, 0, sizeof(*desc)); @@ -601,7 +247,7 @@ desc->desc2.sampler_count = 1; /* FIXME: */ desc->desc2.sampler_state_pointer = (vme_context->vme_state.bo->offset >> 5); desc->desc3.binding_table_entry_count = 1; /* FIXME: */ - desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET >> 5); + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); desc->desc4.constant_urb_entry_read_offset = 0; desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH; @@ -626,28 +272,111 @@ static VAStatus gen6_vme_constant_setup(VADriverContextP ctx, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - unsigned char *constant_buffer; - - dri_bo_map(vme_context->curbe.bo, 1); - assert(vme_context->curbe.bo->virtual); - constant_buffer = vme_context->curbe.bo->virtual; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + // unsigned char *constant_buffer; + unsigned int *vme_state_message; + int mv_num = 32; + if (vme_context->h264_level >= 30) { + mv_num = 16; + if (vme_context->h264_level >= 31) + mv_num = 8; + } + + dri_bo_map(vme_context->gpe_context.curbe.bo, 1); + assert(vme_context->gpe_context.curbe.bo->virtual); + // constant_buffer = vme_context->curbe.bo->virtual; + vme_state_message = (unsigned int *)vme_context->gpe_context.curbe.bo->virtual; + vme_state_message[31] = mv_num; /*TODO copy buffer into CURB*/ - dri_bo_unmap( vme_context->curbe.bo); + dri_bo_unmap( vme_context->gpe_context.curbe.bo); return VA_STATUS_SUCCESS; } +static const unsigned int intra_mb_mode_cost_table[] = { + 0x31110001, // for qp0 + 0x09110001, // for qp1 + 0x15030001, // for qp2 + 0x0b030001, // for qp3 + 0x0d030011, // for qp4 + 0x17210011, // for qp5 + 0x41210011, // for qp6 + 0x19210011, // for qp7 + 0x25050003, // for qp8 + 0x1b130003, // for qp9 + 0x1d130003, // for qp10 + 0x27070021, // for qp11 + 0x51310021, // for qp12 + 0x29090021, // for qp13 + 0x35150005, // for qp14 + 0x2b0b0013, // for qp15 + 0x2d0d0013, // for qp16 + 0x37170007, // for qp17 + 0x61410031, // for qp18 + 0x39190009, // for qp19 + 0x45250015, // for qp20 + 0x3b1b000b, // for qp21 + 0x3d1d000d, // for qp22 + 0x47270017, // for qp23 + 0x71510041, // for qp24 ! center for qp=0..30 + 0x49290019, // for qp25 + 0x55350025, // for qp26 + 0x4b2b001b, // for qp27 + 0x4d2d001d, // for qp28 + 0x57370027, // for qp29 + 0x81610051, // for qp30 + 0x57270017, // for qp31 + 0x81510041, // for qp32 ! center for qp=31..51 + 0x59290019, // for qp33 + 0x65350025, // for qp34 + 0x5b2b001b, // for qp35 + 0x5d2d001d, // for qp36 + 0x67370027, // for qp37 + 0x91610051, // for qp38 + 0x69390029, // for qp39 + 0x75450035, // for qp40 + 0x6b3b002b, // for qp41 + 0x6d3d002d, // for qp42 + 0x77470037, // for qp43 + 0xa1710061, // for qp44 + 0x79490039, // for qp45 + 0x85550045, // for qp46 + 0x7b4b003b, // for qp47 + 0x7d4d003d, // for qp48 + 0x87570047, // for qp49 + 0xb1810071, // for qp50 + 0x89590049 // for qp51 +}; + +static void gen6_vme_state_setup_fixup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + unsigned int *vme_state_message) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + + if (slice_param->slice_type != SLICE_TYPE_I && + slice_param->slice_type != SLICE_TYPE_SI) + return; + + if (encoder_context->rate_control_mode == VA_RC_CQP) + vme_state_message[16] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta]; + else + vme_state_message[16] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY]; +} + static VAStatus gen6_vme_vme_state_setup(VADriverContextP ctx, struct encode_state *encode_state, int is_intra, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; unsigned int *vme_state_message; int i; @@ -655,178 +384,128 @@ dri_bo_map(vme_context->vme_state.bo, 1); assert(vme_context->vme_state.bo->virtual); vme_state_message = (unsigned int *)vme_context->vme_state.bo->virtual; - - vme_state_message[0] = 0x10010101; - vme_state_message[1] = 0x100F0F0F; - vme_state_message[2] = 0x10010101; - vme_state_message[3] = 0x000F0F0F; - for(i = 4; i < 14; i++) { - vme_state_message[i] = 0x00000000; - } + + if (encoder_context->quality_level != ENCODER_LOW_QUALITY) { + vme_state_message[0] = 0x01010101; + vme_state_message[1] = 0x10010101; + vme_state_message[2] = 0x0F0F0F0F; + vme_state_message[3] = 0x100F0F0F; + vme_state_message[4] = 0x01010101; + vme_state_message[5] = 0x10010101; + vme_state_message[6] = 0x0F0F0F0F; + vme_state_message[7] = 0x100F0F0F; + vme_state_message[8] = 0x01010101; + vme_state_message[9] = 0x10010101; + vme_state_message[10] = 0x0F0F0F0F; + vme_state_message[11] = 0x000F0F0F; + vme_state_message[12] = 0x00; + vme_state_message[13] = 0x00; + } else { + vme_state_message[0] = 0x10010101; + vme_state_message[1] = 0x100F0F0F; + vme_state_message[2] = 0x10010101; + vme_state_message[3] = 0x000F0F0F; + vme_state_message[4] = 0; + vme_state_message[5] = 0; + vme_state_message[6] = 0; + vme_state_message[7] = 0; + vme_state_message[8] = 0; + vme_state_message[9] = 0; + vme_state_message[10] = 0; + vme_state_message[11] = 0; + vme_state_message[12] = 0; + vme_state_message[13] = 0; + } + + vme_state_message[14] = 0x4a4a; + vme_state_message[15] = 0x0; + vme_state_message[16] = 0x4a4a4a4a; + vme_state_message[17] = 0x4a4a4a4a; + vme_state_message[18] = 0x21110100; + vme_state_message[19] = 0x61514131; - for(i = 14; i < 32; i++) { - vme_state_message[i] = 0x00000000; + for(i = 20; i < 32; i++) { + vme_state_message[i] = 0; } - //vme_state_message[16] = 0x42424242; //cost function LUT set 0 for Intra + gen6_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message); + dri_bo_unmap( vme_context->vme_state.bo); return VA_STATUS_SUCCESS; } -static void gen6_vme_pipeline_select(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - - BEGIN_BATCH(batch, 1); - OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); - ADVANCE_BATCH(batch); -} - -static void gen6_vme_state_base_address(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - - BEGIN_BATCH(batch, 10); - - OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 8); - - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //General State Base Address - OUT_RELOC(batch, vme_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //Dynamic State Base Address - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //Indirect Object Base Address - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //Instruction Base Address - - OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //General State Access Upper Bound - OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Dynamic State Access Upper Bound - OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Indirect Object Access Upper Bound - OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Instruction Access Upper Bound - - /* - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //LLC Coherent Base Address - OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY ); //LLC Coherent Upper Bound - */ - - ADVANCE_BATCH(batch); -} - -static void gen6_vme_vfe_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - - BEGIN_BATCH(batch, 8); - - OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | 6); /*Gen6 CMD_MEDIA_STATE_POINTERS = CMD_MEDIA_STATE */ - OUT_BATCH(batch, 0); /*Scratch Space Base Pointer and Space*/ - OUT_BATCH(batch, (vme_context->vfe_state.max_num_threads << 16) - | (vme_context->vfe_state.num_urb_entries << 8) - | (vme_context->vfe_state.gpgpu_mode << 2) ); /*Maximum Number of Threads , Number of URB Entries, MEDIA Mode*/ - OUT_BATCH(batch, 0); /*Debug: Object ID*/ - OUT_BATCH(batch, (vme_context->vfe_state.urb_entry_size << 16) - | vme_context->vfe_state.curbe_allocation_size); /*URB Entry Allocation Size , CURBE Allocation Size*/ - OUT_BATCH(batch, 0); /*Disable Scoreboard*/ - OUT_BATCH(batch, 0); /*Disable Scoreboard*/ - OUT_BATCH(batch, 0); /*Disable Scoreboard*/ - - ADVANCE_BATCH(batch); - -} - -static void gen6_vme_curbe_load(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - - BEGIN_BATCH(batch, 4); - - OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | 2); - OUT_BATCH(batch, 0); - - OUT_BATCH(batch, CURBE_TOTAL_DATA_LENGTH); - OUT_RELOC(batch, vme_context->curbe.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); - - ADVANCE_BATCH(batch); -} - -static void gen6_vme_idrt(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) -{ - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; - - BEGIN_BATCH(batch, 4); +static void +gen6_vme_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int number_mb_cmds; + int mb_x = 0, mb_y = 0; + int i, s; + unsigned int *command_ptr; + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + int slice_mb_begin = pSliceParameter->macroblock_address; + int slice_mb_number = pSliceParameter->num_macroblocks; + + for (i = 0; i < slice_mb_number; ) { + int mb_count = i + slice_mb_begin; + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + if( i == 0 ) { + number_mb_cmds = mb_width; // we must mark the slice edge. + } else if ( (i + 128 ) <= slice_mb_number) { + number_mb_cmds = 128; + } else { + number_mb_cmds = slice_mb_number - i; + } - OUT_BATCH(batch, CMD_MEDIA_INTERFACE_LOAD | 2); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, GEN6_VME_KERNEL_NUMBER * sizeof(struct gen6_interface_descriptor_data)); - OUT_RELOC(batch, vme_context->idrt.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + *command_ptr++ = (CMD_MEDIA_OBJECT | (9 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = (number_mb_cmds << 16 | transform_8x8_mode_flag | ((i==0) << 1)); + *command_ptr++ = encoder_context->quality_level; - ADVANCE_BATCH(batch); -} + i += number_mb_cmds; + } + } -static int gen6_vme_media_object(VADriverContextP ctx, - struct encode_state *encode_state, - int mb_x, int mb_y, - int kernel, - struct gen6_encoder_context *gen6_encoder_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - struct object_surface *obj_surface = SURFACE(encode_state->current_render_target); - int mb_width = ALIGN(obj_surface->orig_width, 16) / 16; - int len_in_dowrds = 6 + 1; + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; - BEGIN_BATCH(batch, len_in_dowrds); - - OUT_BATCH(batch, CMD_MEDIA_OBJECT | (len_in_dowrds - 2)); - OUT_BATCH(batch, kernel); /*Interface Descriptor Offset*/ - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - - /*inline data */ - OUT_BATCH(batch, mb_width << 16 | mb_y << 8 | mb_x); /*M0.0 Refrence0 X,Y, not used in Intra*/ - ADVANCE_BATCH(batch); - - return len_in_dowrds * 4; + dri_bo_unmap(vme_context->vme_batchbuffer.bo); } -static void gen6_vme_media_init(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context) +static void gen6_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; dri_bo *bo; - /* constant buffer */ - dri_bo_unreference(vme_context->curbe.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "Buffer", - CURBE_TOTAL_DATA_LENGTH, 64); - assert(bo); - vme_context->curbe.bo = bo; - - dri_bo_unreference(vme_context->surface_state_binding_table.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state & binding table", - (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6, - 4096); - assert(bo); - vme_context->surface_state_binding_table.bo = bo; - - /* interface descriptor remapping table */ - dri_bo_unreference(vme_context->idrt.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "Buffer", - MAX_INTERFACE_DESC_GEN6 * sizeof(struct gen6_interface_descriptor_data), 16); - assert(bo); - vme_context->idrt.bo = bo; + i965_gpe_context_init(ctx, &vme_context->gpe_context); /* VME output buffer */ dri_bo_unreference(vme_context->vme_output.bo); vme_context->vme_output.bo = NULL; + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + /* VME state */ dri_bo_unreference(vme_context->vme_state.bo); bo = dri_bo_alloc(i965->intel.bufmgr, @@ -834,94 +513,72 @@ 1024*16, 64); assert(bo); vme_context->vme_state.bo = bo; - - vme_context->vfe_state.max_num_threads = 60 - 1; - vme_context->vfe_state.num_urb_entries = 16; - vme_context->vfe_state.gpgpu_mode = 0; - vme_context->vfe_state.urb_entry_size = 59 - 1; - vme_context->vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; } static void gen6_vme_pipeline_programing(VADriverContextP ctx, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; - VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; - VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer; - int is_intra = pSliceParameter->slice_flags.bits.is_intra; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; int width_in_mbs = pSequenceParameter->picture_width_in_mbs; int height_in_mbs = pSequenceParameter->picture_height_in_mbs; - int emit_new_state = 1, object_len_in_bytes; - int x, y; - - intel_batchbuffer_start_atomic(batch, 0x1000); - - for(y = 0; y < height_in_mbs; y++){ - for(x = 0; x < width_in_mbs; x++){ - - if (emit_new_state) { - /*Step1: MI_FLUSH/PIPE_CONTROL*/ - intel_batchbuffer_emit_mi_flush(batch); - - /*Step2: State command PIPELINE_SELECT*/ - gen6_vme_pipeline_select(ctx, gen6_encoder_context); - - /*Step3: State commands configuring pipeline states*/ - gen6_vme_state_base_address(ctx, gen6_encoder_context); - gen6_vme_vfe_state(ctx, gen6_encoder_context); - gen6_vme_curbe_load(ctx, gen6_encoder_context); - gen6_vme_idrt(ctx, gen6_encoder_context); - - emit_new_state = 0; - } - /*Step4: Primitive commands*/ - object_len_in_bytes = gen6_vme_media_object(ctx, encode_state, x, y, is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER, gen6_encoder_context); + gen6_vme_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + is_intra ? AVC_VME_INTRA_SHADER : AVC_VME_INTER_SHADER, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); - if (intel_batchbuffer_check_free_space(batch, object_len_in_bytes) == 0) { - assert(0); - intel_batchbuffer_end_atomic(batch); - intel_batchbuffer_flush(batch); - emit_new_state = 1; - intel_batchbuffer_start_atomic(batch, 0x1000); - } - } - } + intel_batchbuffer_start_atomic(batch, 0x1000); + gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(batch); - intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_end_atomic(batch); } static VAStatus gen6_vme_prepare(VADriverContextP ctx, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); VAStatus vaStatus = VA_STATUS_SUCCESS; - VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer; - int is_intra = pSliceParameter->slice_flags.bits.is_intra; - + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if (!vme_context->h264_level || + (vme_context->h264_level != pSequenceParameter->level_idc)) { + vme_context->h264_level = pSequenceParameter->level_idc; + } /*Setup all the memory object*/ - if (IS_GEN7(i965->intel.device_id)) - gen7_vme_surface_setup(ctx, encode_state, is_intra, gen6_encoder_context); - else - gen6_vme_surface_setup(ctx, encode_state, is_intra, gen6_encoder_context); - - gen6_vme_interface_setup(ctx, encode_state, gen6_encoder_context); - gen6_vme_constant_setup(ctx, encode_state, gen6_encoder_context); - gen6_vme_vme_state_setup(ctx, encode_state, is_intra, gen6_encoder_context); + gen6_vme_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen6_vme_interface_setup(ctx, encode_state, encoder_context); + gen6_vme_constant_setup(ctx, encode_state, encoder_context); + gen6_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context); /*Programing media pipeline*/ - gen6_vme_pipeline_programing(ctx, encode_state, gen6_encoder_context); + gen6_vme_pipeline_programing(ctx, encode_state, encoder_context); return vaStatus; } static VAStatus gen6_vme_run(VADriverContextP ctx, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { - struct intel_batchbuffer *batch = gen6_encoder_context->base.batch; + struct intel_batchbuffer *batch = encoder_context->base.batch; intel_batchbuffer_flush(batch); @@ -930,75 +587,86 @@ static VAStatus gen6_vme_stop(VADriverContextP ctx, struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) + struct intel_encoder_context *encoder_context) { return VA_STATUS_SUCCESS; } -VAStatus gen6_vme_pipeline(VADriverContextP ctx, - VAProfile profile, - struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context) -{ - gen6_vme_media_init(ctx, gen6_encoder_context); - gen6_vme_prepare(ctx, encode_state, gen6_encoder_context); - gen6_vme_run(ctx, encode_state, gen6_encoder_context); - gen6_vme_stop(ctx, encode_state, gen6_encoder_context); +static VAStatus +gen6_vme_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen6_vme_media_init(ctx, encoder_context); + gen6_vme_prepare(ctx, encode_state, encoder_context); + gen6_vme_run(ctx, encode_state, encoder_context); + gen6_vme_stop(ctx, encode_state, encoder_context); return VA_STATUS_SUCCESS; } -Bool gen6_vme_context_init(VADriverContextP ctx, struct gen6_vme_context *vme_context) +static void +gen6_vme_context_destroy(void *context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - int i; + struct gen6_vme_context *vme_context = context; - if (IS_GEN7(i965->intel.device_id)) - memcpy(vme_context->vme_kernels, gen7_vme_kernels, sizeof(vme_context->vme_kernels)); - else - memcpy(vme_context->vme_kernels, gen6_vme_kernels, sizeof(vme_context->vme_kernels)); + i965_gpe_context_destroy(&vme_context->gpe_context); - for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) { - /*Load kernel into GPU memory*/ - struct i965_kernel *kernel = &vme_context->vme_kernels[i]; - - kernel->bo = dri_bo_alloc(i965->intel.bufmgr, - kernel->name, - kernel->size, - 0x1000); - assert(kernel->bo); - dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); - } - - return True; + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + free(vme_context); } -Bool gen6_vme_context_destroy(struct gen6_vme_context *vme_context) +Bool gen6_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) { - int i; + struct gen6_vme_context *vme_context = NULL; - dri_bo_unreference(vme_context->idrt.bo); - vme_context->idrt.bo = NULL; + if (encoder_context->codec != CODEC_H264) { + /* Never get here */ + assert(0); + return False; + } - dri_bo_unreference(vme_context->surface_state_binding_table.bo); - vme_context->surface_state_binding_table.bo = NULL; + vme_context = calloc(1, sizeof(struct gen6_vme_context)); - dri_bo_unreference(vme_context->curbe.bo); - vme_context->curbe.bo = NULL; + if (!vme_context) + return False; - dri_bo_unreference(vme_context->vme_output.bo); - vme_context->vme_output.bo = NULL; + vme_context->gpe_context.surface_state_binding_table.length = + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; - dri_bo_unreference(vme_context->vme_state.bo); - vme_context->vme_state.bo = NULL; + vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6; + vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH; - for (i = 0; i < GEN6_VME_KERNEL_NUMBER; i++) { - /*Load kernel into GPU memory*/ - struct i965_kernel *kernel = &vme_context->vme_kernels[i]; + vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + vme_context->gpe_context.vfe_state.num_urb_entries = 16; + vme_context->gpe_context.vfe_state.gpgpu_mode = 0; + vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1; + vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; - dri_bo_unreference(kernel->bo); - kernel->bo = NULL; - } + vme_context->video_coding_type = VIDEO_CODING_AVC; + vme_context->vme_kernel_sum = AVC_VME_KERNEL_SUM; + i965_gpe_load_kernels(ctx, + &vme_context->gpe_context, + gen6_vme_kernels, + vme_context->vme_kernel_sum); + + encoder_context->vme_pipeline = gen6_vme_pipeline; + vme_context->vme_surface2_setup = i965_gpe_surface2_setup; + vme_context->vme_media_rw_surface_setup = i965_gpe_media_rw_surface_setup; + vme_context->vme_buffer_suface_setup = i965_gpe_buffer_suface_setup; + + encoder_context->vme_context = vme_context; + encoder_context->vme_context_destroy = gen6_vme_context_destroy; return True; } diff -Nru intel-vaapi-driver-1.0.15/src/gen6_vme.h intel-vaapi-driver-1.7.1/src/gen6_vme.h --- intel-vaapi-driver-1.0.15/src/gen6_vme.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen6_vme.h 2016-06-17 01:56:44.000000000 +0000 @@ -34,56 +34,170 @@ #include #include +#include "i965_gpe_utils.h" -#define MAX_INTERFACE_DESC_GEN6 32 -#define MAX_MEDIA_SURFACES_GEN6 34 +#define INTRA_VME_OUTPUT_IN_BYTES 16 /* in bytes */ +#define INTRA_VME_OUTPUT_IN_DWS (INTRA_VME_OUTPUT_IN_BYTES / 4) +#define INTER_VME_OUTPUT_IN_BYTES 160 /* the first 128 bytes for MVs and the last 32 bytes for other info */ +#define INTER_VME_OUTPUT_IN_DWS (INTER_VME_OUTPUT_IN_BYTES / 4) -#define GEN6_VME_KERNEL_NUMBER 2 +#define MAX_INTERFACE_DESC_GEN6 MAX_GPE_KERNELS +#define MAX_MEDIA_SURFACES_GEN6 34 + +#define GEN6_VME_KERNEL_NUMBER 3 struct encode_state; -struct gen6_encoder_context; +struct intel_encoder_context; struct gen6_vme_context { - struct { - dri_bo *bo; - } surface_state_binding_table; + struct i965_gpe_context gpe_context; struct { dri_bo *bo; - } idrt; /* interface descriptor remap table */ + } vme_state; - struct { - dri_bo *bo; - } curbe; + struct i965_buffer_surface vme_output; + struct i965_buffer_surface vme_batchbuffer; - struct { - unsigned int gpgpu_mode:1; - unsigned int max_num_threads:16; - unsigned int num_urb_entries:8; - unsigned int urb_entry_size:16; - unsigned int curbe_allocation_size:16; - } vfe_state; - struct { - dri_bo *bo; - } vme_state; + void (*vme_surface2_setup)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); + void (*vme_media_rw_surface_setup)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); + void (*vme_buffer_suface_setup)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); + void (*vme_media_chroma_surface_setup)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); + void *vme_state_message; + unsigned int h264_level; + unsigned int hevc_level; + unsigned int video_coding_type; + unsigned int vme_kernel_sum; + unsigned int mpeg2_level; + + struct object_surface *used_reference_objects[2]; + void *used_references[2]; + unsigned int ref_index_in_mb[2]; +}; - struct { - dri_bo *bo; - unsigned int num_blocks; - unsigned int size_block; /* in bytes */ - unsigned int pitch; - } vme_output; +#define MPEG2_PIC_WIDTH_HEIGHT 30 +#define MPEG2_MV_RANGE 29 +#define MPEG2_LEVEL_MASK 0x0f +#define MPEG2_LEVEL_LOW 0x0a +#define MPEG2_LEVEL_MAIN 0x08 +#define MPEG2_LEVEL_HIGH 0x04 + + +Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +extern void intel_vme_update_mbmv_cost(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +void intel_vme_vp8_update_mbmv_cost(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +Bool gen7_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +#define MODE_INTRA_NONPRED 0 +#define MODE_INTRA_16X16 1 +#define MODE_INTRA_8X8 2 +#define MODE_INTRA_4X4 3 +#define MODE_INTER_16X8 4 +#define MODE_INTER_8X16 4 +#define MODE_INTER_8X8 5 +#define MODE_INTER_8X4 6 +#define MODE_INTER_4X8 6 +#define MODE_INTER_4X4 7 +#define MODE_INTER_16X16 8 +#define MODE_INTER_BWD 9 +#define MODE_REFID_COST 10 +#define MODE_CHROMA_INTRA 11 + +#define MODE_INTER_MV0 12 +#define MODE_INTER_MV1 13 +#define MODE_INTER_MV2 14 + +#define MODE_INTER_MV3 15 +#define MODE_INTER_MV4 16 +#define MODE_INTER_MV5 17 +#define MODE_INTER_MV6 18 +#define MODE_INTER_MV7 19 + +#define INTRA_PRED_AVAIL_FLAG_AE 0x60 +#define INTRA_PRED_AVAIL_FLAG_B 0x10 +#define INTRA_PRED_AVAIL_FLAG_C 0x8 +#define INTRA_PRED_AVAIL_FLAG_D 0x4 +#define INTRA_PRED_AVAIL_FLAG_BCD_MASK 0x1C + +extern void +gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context); + +extern void +gen7_vme_scoreboard_init(VADriverContextP ctx, struct gen6_vme_context *vme_context); + +extern void +intel_vme_mpeg2_state_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern void +gen7_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + struct intel_encoder_context *encoder_context); + +void +intel_avc_vme_reference_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int list_index, + int surface_index, + void (* vme_source_surface_state)( + VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context)); + +/* HEVC */ +void +intel_hevc_vme_reference_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int list_index, + int surface_index, + void (* vme_source_surface_state)( + VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context)); + +void intel_vme_hevc_update_mbmv_cost(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); - struct i965_kernel vme_kernels[GEN6_VME_KERNEL_NUMBER]; -}; -VAStatus gen6_vme_pipeline(VADriverContextP ctx, - VAProfile profile, - struct encode_state *encode_state, - struct gen6_encoder_context *gen6_encoder_context); -Bool gen6_vme_context_init(VADriverContextP ctx, struct gen6_vme_context *vme_context); -Bool gen6_vme_context_destroy(struct gen6_vme_context *vme_context); +extern Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); +extern Bool gen9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); #endif /* _GEN6_VME_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/gen75_mfc.c intel-vaapi-driver-1.7.1/src/gen75_mfc.c --- intel-vaapi-driver-1.0.15/src/gen75_mfc.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_mfc.c 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,2580 @@ +/* + * Copyright © 2010-2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + * + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "gen6_mfc.h" +#include "gen6_vme.h" +#include "intel_media.h" + +#define AVC_INTRA_RDO_OFFSET 4 +#define AVC_INTER_RDO_OFFSET 10 +#define AVC_INTER_MSG_OFFSET 8 +#define AVC_INTER_MV_OFFSET 48 +#define AVC_RDO_MASK 0xFFFF + +#define MFC_SOFTWARE_HASWELL 0 + +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define B0_STEP_REV 2 +#define IS_STEPPING_BPLUS(i965) ((i965->intel.revision) >= B0_STEP_REV) + +static const uint32_t gen75_mfc_batchbuffer_avc[][4] = { +#include "shaders/utils/mfc_batchbuffer_hsw.g75b" +}; + +static struct i965_kernel gen75_mfc_kernels[] = { + { + "MFC AVC INTRA BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTRA, + gen75_mfc_batchbuffer_avc, + sizeof(gen75_mfc_batchbuffer_avc), + NULL + }, +}; + +#define INTER_MODE_MASK 0x03 +#define INTER_8X8 0x03 +#define INTER_16X8 0x01 +#define INTER_8X16 0x02 +#define SUBMB_SHAPE_MASK 0x00FF00 + +#define INTER_MV8 (4 << 20) +#define INTER_MV32 (6 << 20) + + +static void +gen75_mfc_pipe_mode_select(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC); + + BEGIN_BCS_BATCH(batch, 5); + + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Must be long format for encoder */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* Stream-Out Enable */ + ((!!mfc_context->post_deblocking_output.bo) << 9) | /* Post Deblocking Output */ + ((!!mfc_context->pre_deblocking_output.bo) << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (1 << 4) | /* encoding mode */ + (standard_select << 0)); /* standard select: avc or mpeg2 */ + OUT_BCS_BATCH(batch, + (0 << 7) | /* expand NOA bus flag */ + (0 << 6) | /* disable slice-level clock gating */ + (0 << 5) | /* disable clock gating for NOA */ + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_surface_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((mfc_context->surface_state.height - 1) << 18) | + ((mfc_context->surface_state.width - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((mfc_context->surface_state.w_pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (mfc_context->surface_state.h_pitch)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_ind_obj_base_addr_state_bplus(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + BEGIN_BCS_BATCH(batch, 26); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (26 - 2)); + /* the DW1-3 is for the MFX indirect bistream offset */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* the DW4-5 is the MFX upper bound */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW6-10 is for MFX Indirect MV Object Base Address */ + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); + + /* the DW11-15 is for MFX IT-COFF. Not used on encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW16-20 is for MFX indirect DBLK. Not used on encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW21-25 is for MFC Indirect PAK-BSE Object Base Address for Encoder*/ + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.end_offset); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfc_ind_obj_base_addr_state_bplus(ctx, encoder_context); + return; + } + + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* MFX Indirect MV Object Base Address */ + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /*MFC Indirect PAK-BSE Object Base Address for Encoder*/ + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.end_offset); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_avc_img_state(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + + BEGIN_BCS_BATCH(batch, 16); + + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + /*DW1. MB setting of frame */ + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs - 1) & 0xFFFF)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + /* DW3 QP setting */ + OUT_BCS_BATCH(batch, + (0 << 24) | /* Second Chroma QP Offset */ + (0 << 16) | /* Chroma QP Offset */ + (0 << 14) | /* Max-bit conformance Intra flag */ + (0 << 13) | /* Max Macroblock size conformance Inter flag */ + (pPicParameter->pic_fields.bits.weighted_pred_flag << 12) | /*Weighted_Pred_Flag */ + (pPicParameter->pic_fields.bits.weighted_bipred_idc << 10) | /* Weighted_BiPred_Idc */ + (0 << 8) | /* FIXME: Image Structure */ + (0 << 0) ); /* Current Decoed Image Frame Store ID, reserved in Encode mode */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* Mininum Frame size */ + (0 << 15) | /* Disable reading of Macroblock Status Buffer */ + (0 << 14) | /* Load BitStream Pointer only once, 1 slic 1 frame */ + (0 << 13) | /* CABAC 0 word insertion test enable */ + (1 << 12) | /* MVUnpackedEnable,compliant to DXVA */ + (1 << 10) | /* Chroma Format IDC, 4:2:0 */ + (0 << 8) | /* FIXME: MbMvFormatFlag */ + (pPicParameter->pic_fields.bits.entropy_coding_mode_flag << 7) | /*0:CAVLC encoding mode,1:CABAC*/ + (0 << 6) | /* Only valid for VLD decoding mode */ + (0 << 5) | /* Constrained Intra Predition Flag, from PPS */ + (0 << 4) | /* Direct 8x8 inference flag */ + (pPicParameter->pic_fields.bits.transform_8x8_mode_flag << 3) | /*8x8 or 4x4 IDCT Transform Mode Flag*/ + (1 << 2) | /* Frame MB only flag */ + (0 << 1) | /* MBAFF mode is in active */ + (0 << 0)); /* Field picture flag */ + /* DW5 Trellis quantization */ + OUT_BCS_BATCH(batch, 0); /* Mainly about MB rate control and debug, just ignoring */ + OUT_BCS_BATCH(batch, /* Inter and Intra Conformance Max size limit */ + (0xBB8 << 16) | /* InterMbMaxSz */ + (0xEE8) ); /* IntraMbMaxSz */ + OUT_BCS_BATCH(batch, 0); /* Reserved */ + /* DW8. QP delta */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + /* DW10. Bit setting for MB */ + OUT_BCS_BATCH(batch, 0x8C000000); + OUT_BCS_BATCH(batch, 0x00010000); + /* DW12. */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0x02010100); + /* DW14. For short format */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_qm_state(VADriverContextP ctx, + int qm_type, + unsigned int *qm, + int qm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16); + assert(sizeof(*qm) == 4); + memcpy(qm_buffer, qm, qm_length * 4); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_avc_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[16] = { + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010 + }; + + gen75_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 12, encoder_context); + gen75_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 12, encoder_context); + gen75_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 16, encoder_context); + gen75_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 16, encoder_context); +} + +static void +gen75_mfc_fqm_state(VADriverContextP ctx, + int fqm_type, + unsigned int *fqm, + int fqm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int fqm_buffer[32]; + + assert(fqm_length <= 32); + assert(sizeof(*fqm) == 4); + memcpy(fqm_buffer, fqm, fqm_length * 4); + + BEGIN_BCS_BATCH(batch, 34); + OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2)); + OUT_BCS_BATCH(batch, fqm_type << 0); + intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_avc_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[32] = { + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000 + }; + + gen75_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 24, encoder_context); + gen75_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 24, encoder_context); + gen75_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 32, encoder_context); + gen75_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 32, encoder_context); +} + +static void +gen75_mfc_avc_insert_object(VADriverContextP ctx, struct intel_encoder_context *encoder_context, + unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag, + struct intel_batchbuffer *batch) +{ + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, lenght_in_dws + 2); + + OUT_BCS_BATCH(batch, MFX_INSERT_OBJECT | (lenght_in_dws + 2 - 2)); + OUT_BCS_BATCH(batch, + (0 << 16) | /* always start at offset 0 */ + (data_bits_in_last_dw << 8) | + (skip_emul_byte_count << 4) | + (!!emulation_flag << 3) | + ((!!is_last_header) << 2) | + ((!!is_end_of_slice) << 1) | + (0 << 0)); /* FIXME: ??? */ + intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4); + + ADVANCE_BCS_BATCH(batch); +} + + +static void gen75_mfc_init(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + dri_bo *bo; + int i; + int width_in_mbs = 0; + int height_in_mbs = 0; + int slice_batchbuffer_size; + + if (encoder_context->codec == CODEC_H264 || + encoder_context->codec == CODEC_H264_MVC) { + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + width_in_mbs = pSequenceParameter->picture_width_in_mbs; + height_in_mbs = pSequenceParameter->picture_height_in_mbs; + } else { + VAEncSequenceParameterBufferMPEG2 *pSequenceParameter = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + + assert(encoder_context->codec == CODEC_MPEG2); + + width_in_mbs = ALIGN(pSequenceParameter->picture_width, 16) / 16; + height_in_mbs = ALIGN(pSequenceParameter->picture_height, 16) / 16; + } + + slice_batchbuffer_size = 64 * width_in_mbs * height_in_mbs + 4096 + + (SLICE_HEADER + SLICE_TAIL) * encode_state->num_slice_params_ext; + + /*Encode common setup for MFC*/ + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + if (mfc_context->direct_mv_buffers[i].bo != NULL) + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + if (mfc_context->reference_surfaces[i].bo != NULL) + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * 64, + 64); + assert(bo); + mfc_context->intra_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * height_in_mbs * 16, + 64); + assert(bo); + mfc_context->macroblock_status_buffer.bo = bo; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 4 * width_in_mbs * 64, /* 4 * width_in_mbs * 64 */ + 64); + assert(bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 2 * width_in_mbs * 64, /* 2 * width_in_mbs * 64 */ + 0x1000); + assert(bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, + slice_batchbuffer_size); + mfc_context->aux_batchbuffer_surface.bo = mfc_context->aux_batchbuffer->buffer; + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.pitch = 16; + mfc_context->aux_batchbuffer_surface.num_blocks = mfc_context->aux_batchbuffer->size / 16; + mfc_context->aux_batchbuffer_surface.size_block = 16; + + i965_gpe_context_init(ctx, &mfc_context->gpe_context); +} + +static void +gen75_mfc_pipe_buf_addr_state_bplus(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int i; + + BEGIN_BCS_BATCH(batch, 61); + + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (61 - 2)); + + /* the DW1-3 is for pre_deblocking */ + if (mfc_context->pre_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); /* pre output addr */ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* the DW4-6 is for the post_deblocking */ + + if (mfc_context->post_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* post output addr */ + else + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW7-9 is for the uncompressed_picture */ + OUT_BCS_RELOC(batch, mfc_context->uncompressed_picture_source.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* uncompressed data */ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW10-12 is for the mb status */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* StreamOut data*/ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW13-15 is for the intra_row_store_scratch */ + OUT_BCS_RELOC(batch, mfc_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW16-18 is for the deblocking filter */ + OUT_BCS_RELOC(batch, mfc_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 19-50 is for Reference pictures*/ + for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + if ( mfc_context->reference_surfaces[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->reference_surfaces[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + OUT_BCS_BATCH(batch, 0); + } + OUT_BCS_BATCH(batch, 0); + + /* The DW 52-54 is for the MB status buffer */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* Macroblock status buffer*/ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 55-57 is the ILDB buffer */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 58-60 is the second ILDB buffer */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_pipe_buf_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfc_pipe_buf_addr_state_bplus(ctx, encoder_context); + return; + } + + BEGIN_BCS_BATCH(batch, 25); + + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (25 - 2)); + + if (mfc_context->pre_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); /* pre output addr */ + + if (mfc_context->post_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* post output addr */ + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_RELOC(batch, mfc_context->uncompressed_picture_source.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* uncompressed data */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* StreamOut data*/ + OUT_BCS_RELOC(batch, mfc_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_RELOC(batch, mfc_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + /* 7..22 Reference pictures*/ + for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + if ( mfc_context->reference_surfaces[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->reference_surfaces[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* Macroblock status buffer*/ + + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_avc_directmode_state_bplus(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + int i; + + BEGIN_BCS_BATCH(batch, 71); + + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (71 - 2)); + + /* Reference frames and Current frames */ + /* the DW1-32 is for the direct MV for reference */ + for(i = 0; i < NUM_MFC_DMV_BUFFERS - 2; i += 2) { + if ( mfc_context->direct_mv_buffers[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + OUT_BCS_BATCH(batch, 0); + + /* the DW34-36 is the MV for the current reference */ + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* POL list */ + for(i = 0; i < 32; i++) { + OUT_BCS_BATCH(batch, i/2); + } + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_avc_directmode_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfc_avc_directmode_state_bplus(ctx, encoder_context); + return; + } + + BEGIN_BCS_BATCH(batch, 69); + + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); + + /* Reference frames and Current frames */ + for(i = 0; i < NUM_MFC_DMV_BUFFERS; i++) { + if ( mfc_context->direct_mv_buffers[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + + /* POL list */ + for(i = 0; i < 32; i++) { + OUT_BCS_BATCH(batch, i/2); + } + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +static void +gen75_mfc_bsp_buf_base_addr_state_bplus(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 10); + + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + OUT_BCS_RELOC(batch, mfc_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW4-6 is for MPR Row Store Scratch Buffer Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW7-9 is for Bitplane Read Buffer Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfc_bsp_buf_base_addr_state_bplus(ctx, encoder_context); + return; + } + + BEGIN_BCS_BATCH(batch, 4); + + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2)); + OUT_BCS_RELOC(batch, mfc_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +static void gen75_mfc_avc_pipeline_picture_programing( VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_AVC, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen75_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen75_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + mfc_context->avc_img_state(ctx, encode_state, encoder_context); + mfc_context->avc_qm_state(ctx, encoder_context); + mfc_context->avc_fqm_state(ctx, encoder_context); + gen75_mfc_avc_directmode_state(ctx, encoder_context); + intel_mfc_avc_ref_idx_state(ctx, encode_state, encoder_context); +} + + +static VAStatus gen75_mfc_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); //run the pipeline + + return VA_STATUS_SUCCESS; +} + + +static VAStatus +gen75_mfc_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int *encoded_bits_size) +{ + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VACodedBufferSegment *coded_buffer_segment; + + vaStatus = i965_MapBuffer(ctx, pPicParameter->coded_buf, (void **)&coded_buffer_segment); + assert(vaStatus == VA_STATUS_SUCCESS); + *encoded_bits_size = coded_buffer_segment->size * 8; + i965_UnmapBuffer(ctx, pPicParameter->coded_buf); + + return VA_STATUS_SUCCESS; +} + + +static void +gen75_mfc_avc_slice_state(VADriverContextP ctx, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int rate_control_enable, + int qp, + struct intel_batchbuffer *batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int beginmb = slice_param->macroblock_address; + int endmb = beginmb + slice_param->num_macroblocks; + int beginx = beginmb % width_in_mbs; + int beginy = beginmb / width_in_mbs; + int nextx = endmb % width_in_mbs; + int nexty = endmb / width_in_mbs; + int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + int last_slice = (endmb == (width_in_mbs * height_in_mbs)); + int maxQpN, maxQpP; + unsigned char correct[6], grow, shrink; + int i; + int weighted_pred_idc = 0; + unsigned int luma_log2_weight_denom = slice_param->luma_log2_weight_denom; + unsigned int chroma_log2_weight_denom = slice_param->chroma_log2_weight_denom; + int num_ref_l0 = 0, num_ref_l1 = 0; + + if (batch == NULL) + batch = encoder_context->base.batch; + + if (slice_type == SLICE_TYPE_I) { + luma_log2_weight_denom = 0; + chroma_log2_weight_denom = 0; + } else if (slice_type == SLICE_TYPE_P) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + } else if (slice_type == SLICE_TYPE_B) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = pic_param->num_ref_idx_l1_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) { + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + if (weighted_pred_idc == 2) { + /* 8.4.3 - Derivation process for prediction weights (8-279) */ + luma_log2_weight_denom = 5; + chroma_log2_weight_denom = 5; + } + } + + maxQpN = mfc_context->bit_rate_control_context[slice_type].MaxQpNegModifier; + maxQpP = mfc_context->bit_rate_control_context[slice_type].MaxQpPosModifier; + + for (i = 0; i < 6; i++) + correct[i] = mfc_context->bit_rate_control_context[slice_type].Correct[i]; + + grow = mfc_context->bit_rate_control_context[slice_type].GrowInit + + (mfc_context->bit_rate_control_context[slice_type].GrowResistance << 4); + shrink = mfc_context->bit_rate_control_context[slice_type].ShrinkInit + + (mfc_context->bit_rate_control_context[slice_type].ShrinkResistance << 4); + + BEGIN_BCS_BATCH(batch, 11);; + + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2) ); + OUT_BCS_BATCH(batch, slice_type); /*Slice Type: I:P:B Slice*/ + + OUT_BCS_BATCH(batch, + (num_ref_l0 << 16) | + (num_ref_l1 << 24) | + (chroma_log2_weight_denom << 8) | + (luma_log2_weight_denom << 0)); + + OUT_BCS_BATCH(batch, + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag<<29) | /*Direct Prediction Type*/ + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + (qp<<16) | /*Slice Quantization Parameter*/ + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (beginy << 24) | /*First MB X&Y , the begin postion of current slice*/ + (beginx << 16) | + slice_param->macroblock_address ); + OUT_BCS_BATCH(batch, (nexty << 16) | nextx); /*Next slice first MB X&Y*/ + OUT_BCS_BATCH(batch, + (0/*rate_control_enable*/ << 31) | /*in CBR mode RateControlCounterEnable = enable*/ + (1 << 30) | /*ResetRateControlCounter*/ + (0 << 28) | /*RC Triggle Mode = Always Rate Control*/ + (4 << 24) | /*RC Stable Tolerance, middle level*/ + (0/*rate_control_enable*/ << 23) | /*RC Panic Enable*/ + (0 << 22) | /*QP mode, don't modfiy CBP*/ + (0 << 21) | /*MB Type Direct Conversion Enabled*/ + (0 << 20) | /*MB Type Skip Conversion Enabled*/ + (last_slice << 19) | /*IsLastSlice*/ + (0 << 18) | /*BitstreamOutputFlag Compressed BitStream Output Disable Flag 0:enable 1:disable*/ + (1 << 17) | /*HeaderPresentFlag*/ + (1 << 16) | /*SliceData PresentFlag*/ + (1 << 15) | /*TailPresentFlag*/ + (1 << 13) | /*RBSP NAL TYPE*/ + (0 << 12) ); /*CabacZeroWordInsertionEnable*/ + OUT_BCS_BATCH(batch, mfc_context->mfc_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, + (maxQpN << 24) | /*Target QP - 24 is lowest QP*/ + (maxQpP << 16) | /*Target QP + 20 is highest QP*/ + (shrink << 8) | + (grow << 0)); + OUT_BCS_BATCH(batch, + (correct[5] << 20) | + (correct[4] << 16) | + (correct[3] << 12) | + (correct[2] << 8) | + (correct[1] << 4) | + (correct[0] << 0)); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +#if MFC_SOFTWARE_HASWELL + +static int +gen75_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, + int qp,unsigned int *msg, + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size, unsigned char max_mb_size, + struct intel_batchbuffer *batch) +{ + int len_in_dwords = 12; + unsigned int intra_msg; +#define INTRA_MSG_FLAG (1 << 13) +#define INTRA_MBTYPE_MASK (0x1F0000) + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + intra_msg = msg[0] & 0xC0FF; + intra_msg |= INTRA_MSG_FLAG; + intra_msg |= ((msg[0] & INTRA_MBTYPE_MASK) >> 8); + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 24) | /* PackedMvNum, Debug*/ + (0 << 20) | /* No motion vector */ + (1 << 19) | /* CbpDcY */ + (1 << 18) | /* CbpDcU */ + (1 << 17) | /* CbpDcV */ + intra_msg); + + OUT_BCS_BATCH(batch, (0xFFFF << 16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ + OUT_BCS_BATCH(batch, (0 << 27) | (end_mb << 26) | qp); /* Last MB */ + + /*Stuff for Intra MB*/ + OUT_BCS_BATCH(batch, msg[1]); /* We using Intra16x16 no 4x4 predmode*/ + OUT_BCS_BATCH(batch, msg[2]); + OUT_BCS_BATCH(batch, msg[3]&0xFF); + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); + + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static int +gen75_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, + unsigned int *msg, unsigned int offset, + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size,unsigned char max_mb_size, int slice_type, + struct intel_batchbuffer *batch) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int len_in_dwords = 12; + unsigned int inter_msg = 0; + if (batch == NULL) + batch = encoder_context->base.batch; + { +#define MSG_MV_OFFSET 4 + unsigned int *mv_ptr; + mv_ptr = msg + MSG_MV_OFFSET; + /* MV of VME output is based on 16 sub-blocks. So it is necessary + * to convert them to be compatible with the format of AVC_PAK + * command. + */ + if ((msg[0] & INTER_MODE_MASK) == INTER_8X16) { + /* MV[0] and MV[2] are replicated */ + mv_ptr[4] = mv_ptr[0]; + mv_ptr[5] = mv_ptr[1]; + mv_ptr[2] = mv_ptr[8]; + mv_ptr[3] = mv_ptr[9]; + mv_ptr[6] = mv_ptr[8]; + mv_ptr[7] = mv_ptr[9]; + } else if ((msg[0] & INTER_MODE_MASK) == INTER_16X8) { + /* MV[0] and MV[1] are replicated */ + mv_ptr[2] = mv_ptr[0]; + mv_ptr[3] = mv_ptr[1]; + mv_ptr[4] = mv_ptr[16]; + mv_ptr[5] = mv_ptr[17]; + mv_ptr[6] = mv_ptr[24]; + mv_ptr[7] = mv_ptr[25]; + } else if (((msg[0] & INTER_MODE_MASK) == INTER_8X8) && + !(msg[1] & SUBMB_SHAPE_MASK)) { + /* Don't touch MV[0] or MV[1] */ + mv_ptr[2] = mv_ptr[8]; + mv_ptr[3] = mv_ptr[9]; + mv_ptr[4] = mv_ptr[16]; + mv_ptr[5] = mv_ptr[17]; + mv_ptr[6] = mv_ptr[24]; + mv_ptr[7] = mv_ptr[25]; + } + } + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + + inter_msg = 32; + /* MV quantity */ + if ((msg[0] & INTER_MODE_MASK) == INTER_8X8) { + if (msg[1] & SUBMB_SHAPE_MASK) + inter_msg = 128; + } + OUT_BCS_BATCH(batch, inter_msg); /* 32 MV*/ + OUT_BCS_BATCH(batch, offset); + inter_msg = msg[0] & (0x1F00FFFF); + inter_msg |= INTER_MV8; + inter_msg |= ((1 << 19) | (1 << 18) | (1 << 17)); + if (((msg[0] & INTER_MODE_MASK) == INTER_8X8) && + (msg[1] & SUBMB_SHAPE_MASK)) { + inter_msg |= INTER_MV32; + } + + OUT_BCS_BATCH(batch, inter_msg); + + OUT_BCS_BATCH(batch, (0xFFFF<<16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ +#if 0 + if ( slice_type == SLICE_TYPE_B) { + OUT_BCS_BATCH(batch, (0xF<<28) | (end_mb << 26) | qp); /* Last MB */ + } else { + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ + } +#else + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ +#endif + + inter_msg = msg[1] >> 8; + /*Stuff for Inter MB*/ + OUT_BCS_BATCH(batch, inter_msg); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[0]); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[1]); + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); + + OUT_BCS_BATCH(batch, 0x0); + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static void +gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + unsigned int *msg = NULL, offset = 0; + unsigned char *msg_ptr = NULL; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int i,x,y; + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int is_intra = slice_type == SLICE_TYPE_I; + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + qp_slice = qp; + } + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + gen75_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, encoder_context, + (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch); + + if ( slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + dri_bo_map(vme_context->vme_output.bo , 1); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + + if (is_intra) { + msg = (unsigned int *) (msg_ptr + pSliceParameter->macroblock_address * vme_context->vme_output.size_block); + } else { + msg = (unsigned int *) (msg_ptr + pSliceParameter->macroblock_address * vme_context->vme_output.size_block); + } + + for (i = pSliceParameter->macroblock_address; + i < pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks; i++) { + int last_mb = (i == (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks - 1) ); + x = i % width_in_mbs; + y = i / width_in_mbs; + msg = (unsigned int *) (msg_ptr + i * vme_context->vme_output.size_block); + + if (is_intra) { + assert(msg); + gen75_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + } else { + int inter_rdo, intra_rdo; + inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK; + intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK; + offset = i * vme_context->vme_output.size_block + AVC_INTER_MV_OFFSET; + if (intra_rdo < inter_rdo) { + gen75_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + } else { + msg += AVC_INTER_MSG_OFFSET; + gen75_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, msg, offset, encoder_context, 0, 0, slice_type, slice_batch); + } + } + } + + dri_bo_unmap(vme_context->vme_output.bo); + + if ( last_slice ) { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 2, 8, + 2, 1, 1, 0, slice_batch); + } else { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 1, 8, + 1, 1, 1, 0, slice_batch); + } +} + +static dri_bo * +gen75_mfc_avc_software_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + dri_bo *batch_bo; + int i; + int buffer_size; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + gen75_mfc_avc_pipeline_slice_programing(ctx, encode_state, encoder_context, i, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +#else + +static void +gen75_mfc_batchbuffer_surfaces_input(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(vme_context->vme_output.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(BIND_IDX_VME_OUTPUT), + SURFACE_STATE_OFFSET(BIND_IDX_VME_OUTPUT)); +} + +static void +gen75_mfc_batchbuffer_surfaces_output(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + assert(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &mfc_context->aux_batchbuffer_surface, + BINDING_TABLE_OFFSET(BIND_IDX_MFC_BATCHBUFFER), + SURFACE_STATE_OFFSET(BIND_IDX_MFC_BATCHBUFFER)); +} + +static void +gen75_mfc_batchbuffer_surfaces_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen75_mfc_batchbuffer_surfaces_input(ctx, encode_state, encoder_context); + gen75_mfc_batchbuffer_surfaces_output(ctx, encode_state, encoder_context); +} + +static void +gen75_mfc_batchbuffer_idrt_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_interface_descriptor_data *desc; + int i; + dri_bo *bo; + + bo = mfc_context->gpe_context.idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < mfc_context->gpe_context.num_kernels; i++) { + struct i965_kernel *kernel; + + kernel = &mfc_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 0; + desc->desc2.sampler_state_pointer = 0; + desc->desc3.binding_table_entry_count = 2; + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = 4; + + /*kernel start*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + desc++; + } + + dri_bo_unmap(bo); +} + +static void +gen75_mfc_batchbuffer_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + (void)mfc_context; +} + +#define AVC_PAK_LEN_IN_BYTE 48 +#define AVC_PAK_LEN_IN_OWORD 3 + +static void +gen75_mfc_batchbuffer_emit_object_command(struct intel_batchbuffer *batch, + uint32_t intra_flag, + int head_offset, + int number_mb_cmds, + int slice_end_x, + int slice_end_y, + int mb_x, + int mb_y, + int width_in_mbs, + int qp, + uint32_t fwd_ref, + uint32_t bwd_ref) +{ + uint32_t temp_value; + BEGIN_BATCH(batch, 14); + + OUT_BATCH(batch, CMD_MEDIA_OBJECT | (14 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /*inline data */ + OUT_BATCH(batch, head_offset / 16); + OUT_BATCH(batch, (intra_flag) | (qp << 16)); + temp_value = (mb_x | (mb_y << 8) | (width_in_mbs << 16)); + OUT_BATCH(batch, temp_value); + + OUT_BATCH(batch, number_mb_cmds); + + OUT_BATCH(batch, + ((slice_end_y << 8) | (slice_end_x))); + OUT_BATCH(batch, fwd_ref); + OUT_BATCH(batch, bwd_ref); + + OUT_BATCH(batch, MI_NOOP); + + ADVANCE_BATCH(batch); +} + +static void +gen75_mfc_avc_batchbuffer_slice_command(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncSliceParameterBufferH264 *slice_param, + int head_offset, + int qp, + int last_slice) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int total_mbs = slice_param->num_macroblocks; + int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + int number_mb_cmds = 128; + int starting_offset = 0; + int mb_x, mb_y; + int last_mb, slice_end_x, slice_end_y; + int remaining_mb = total_mbs; + uint32_t fwd_ref , bwd_ref, mb_flag; + + last_mb = slice_param->macroblock_address + total_mbs - 1; + slice_end_x = last_mb % width_in_mbs; + slice_end_y = last_mb / width_in_mbs; + + if (slice_type == SLICE_TYPE_I) { + fwd_ref = 0; + bwd_ref = 0; + mb_flag = 1; + } else { + fwd_ref = vme_context->ref_index_in_mb[0]; + bwd_ref = vme_context->ref_index_in_mb[1]; + mb_flag = 0; + } + + if (width_in_mbs >= 100) { + number_mb_cmds = width_in_mbs / 5; + } else if (width_in_mbs >= 80) { + number_mb_cmds = width_in_mbs / 4; + } else if (width_in_mbs >= 60) { + number_mb_cmds = width_in_mbs / 3; + } else if (width_in_mbs >= 40) { + number_mb_cmds = width_in_mbs / 2; + } else { + number_mb_cmds = width_in_mbs; + } + + do { + if (number_mb_cmds >= remaining_mb) { + number_mb_cmds = remaining_mb; + } + mb_x = (slice_param->macroblock_address + starting_offset) % width_in_mbs; + mb_y = (slice_param->macroblock_address + starting_offset) / width_in_mbs; + + gen75_mfc_batchbuffer_emit_object_command(batch, + mb_flag, + head_offset, + number_mb_cmds, + slice_end_x, + slice_end_y, + mb_x, + mb_y, + width_in_mbs, + qp, + fwd_ref, + bwd_ref); + + head_offset += (number_mb_cmds * AVC_PAK_LEN_IN_BYTE); + remaining_mb -= number_mb_cmds; + starting_offset += number_mb_cmds; + } while (remaining_mb > 0); +} + +/* + * return size in Owords (16bytes) + */ +static void +gen75_mfc_avc_batchbuffer_slice(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *slice_batch = mfc_context->aux_batchbuffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + long head_offset; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + qp_slice = qp; + } + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + gen75_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, + encoder_context, + (rate_control_mode == VA_RC_CBR), + qp_slice, + slice_batch); + + if (slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + head_offset = intel_batchbuffer_used_size(slice_batch); + + slice_batch->ptr += pSliceParameter->num_macroblocks * AVC_PAK_LEN_IN_BYTE; + + gen75_mfc_avc_batchbuffer_slice_command(ctx, + encoder_context, + pSliceParameter, + head_offset, + qp, + last_slice); + + + /* Aligned for tail */ + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + if (last_slice) { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 2, + 8, + 2, + 1, + 1, + 0, + slice_batch); + } else { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 1, + 8, + 1, + 1, + 1, + 0, + slice_batch); + } + + return; +} + +static void +gen75_mfc_avc_batchbuffer_pipeline(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + int i; + intel_batchbuffer_start_atomic(batch, 0x4000); + gen6_gpe_pipeline_setup(ctx, &mfc_context->gpe_context, batch); + + for ( i = 0; i < encode_state->num_slice_params_ext; i++) { + gen75_mfc_avc_batchbuffer_slice(ctx, encode_state, encoder_context, i); + } + { + struct intel_batchbuffer *slice_batch = mfc_context->aux_batchbuffer; + intel_batchbuffer_align(slice_batch, 8); + BEGIN_BCS_BATCH(slice_batch, 2); + OUT_BCS_BATCH(slice_batch, 0); + OUT_BCS_BATCH(slice_batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(slice_batch); + mfc_context->aux_batchbuffer = NULL; + intel_batchbuffer_free(slice_batch); + } + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen75_mfc_build_avc_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen75_mfc_batchbuffer_surfaces_setup(ctx, encode_state, encoder_context); + gen75_mfc_batchbuffer_idrt_setup(ctx, encode_state, encoder_context); + gen75_mfc_batchbuffer_constant_setup(ctx, encode_state, encoder_context); + gen75_mfc_avc_batchbuffer_pipeline(ctx, encode_state, encoder_context); +} + +static dri_bo * +gen75_mfc_avc_hardware_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); + gen75_mfc_build_avc_batchbuffer(ctx, encode_state, encoder_context); + + return mfc_context->aux_batchbuffer_surface.bo; +} + +#endif + +static void +gen75_mfc_avc_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + if ( intel_mfc_interlace_check(ctx, encode_state, encoder_context) ) { + fprintf(stderr, "Current VA driver don't support interlace mode!\n"); + assert(0); + return; + } + +#if MFC_SOFTWARE_HASWELL + slice_batch_bo = gen75_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); +#else + slice_batch_bo = gen75_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); +#endif + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen75_mfc_avc_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + + +static VAStatus +gen75_mfc_avc_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int current_frame_bits_size; + int sts; + + for (;;) { + gen75_mfc_init(ctx, encode_state, encoder_context); + intel_mfc_avc_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen75_mfc_avc_pipeline_programing(ctx, encode_state, encoder_context); //filling the pipeline + gen75_mfc_run(ctx, encode_state, encoder_context); + if (rate_control_mode == VA_RC_CBR /*|| rate_control_mode == VA_RC_VBR*/) { + gen75_mfc_stop(ctx, encode_state, encoder_context, ¤t_frame_bits_size); + sts = intel_mfc_brc_postpack(encode_state, mfc_context, current_frame_bits_size); + if (sts == BRC_NO_HRD_VIOLATION) { + intel_mfc_hrd_context_update(encode_state, mfc_context); + break; + } + else if (sts == BRC_OVERFLOW_WITH_MIN_QP || sts == BRC_UNDERFLOW_WITH_MAX_QP) { + if (!mfc_context->hrd.violation_noted) { + fprintf(stderr, "Unrepairable %s!\n", (sts == BRC_OVERFLOW_WITH_MIN_QP)? "overflow": "underflow"); + mfc_context->hrd.violation_noted = 1; + } + return VA_STATUS_SUCCESS; + } + } else { + break; + } + } + + return VA_STATUS_SUCCESS; +} + +/* + * MPEG-2 + */ + +static const int +va_to_gen75_mpeg2_picture_type[3] = { + 1, /* I */ + 2, /* P */ + 3 /* B */ +}; + +static void +gen75_mfc_mpeg2_pic_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct encode_state *encode_state) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferMPEG2 *pic_param; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + VAEncSliceParameterBufferMPEG2 *slice_param = NULL; + + assert(encode_state->pic_param_ext && encode_state->pic_param_ext->buffer); + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + (pic_param->f_code[1][1] & 0xf) << 28 | /* f_code[1][1] */ + (pic_param->f_code[1][0] & 0xf) << 24 | /* f_code[1][0] */ + (pic_param->f_code[0][1] & 0xf) << 20 | /* f_code[0][1] */ + (pic_param->f_code[0][0] & 0xf) << 16 | /* f_code[0][0] */ + pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | + pic_param->picture_coding_extension.bits.picture_structure << 12 | + pic_param->picture_coding_extension.bits.top_field_first << 11 | + pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | + pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | + pic_param->picture_coding_extension.bits.q_scale_type << 8 | + pic_param->picture_coding_extension.bits.intra_vlc_format << 7 | + pic_param->picture_coding_extension.bits.alternate_scan << 6); + OUT_BCS_BATCH(batch, + 0 << 14 | /* LoadSlicePointerFlag, 0 means only loading bitstream pointer once */ + va_to_gen75_mpeg2_picture_type[pic_param->picture_type] << 9 | + 0); + OUT_BCS_BATCH(batch, + 1 << 31 | /* slice concealment */ + (height_in_mbs - 1) << 16 | + (width_in_mbs - 1)); + if (slice_param && slice_param->quantiser_scale_code >= 14) + OUT_BCS_BATCH(batch, (3 << 1) | (1 << 4) | (5 << 8) | (1 << 12)); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + 0xFFF << 16 | /* InterMBMaxSize */ + 0xFFF << 0 | /* IntraMBMaxSize */ + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfc_mpeg2_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned char intra_qm[64] = { + 8, 16, 19, 22, 26, 27, 29, 34, + 16, 16, 22, 24, 27, 29, 34, 37, + 19, 22, 26, 27, 29, 34, 34, 38, + 22, 22, 26, 27, 29, 34, 37, 40, + 22, 26, 27, 29, 32, 35, 40, 48, + 26, 27, 29, 32, 35, 40, 48, 58, + 26, 27, 29, 34, 38, 46, 56, 69, + 27, 29, 35, 38, 46, 56, 69, 83 + }; + + unsigned char non_intra_qm[64] = { + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16 + }; + + gen75_mfc_qm_state(ctx, MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX, (unsigned int *)intra_qm, 16, encoder_context); + gen75_mfc_qm_state(ctx, MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX, (unsigned int *)non_intra_qm, 16,encoder_context); +} + +static void +gen75_mfc_mpeg2_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned short intra_fqm[64] = { + 65536/0x8, 65536/0x10, 65536/0x13, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, + 65536/0x10, 65536/0x10, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1b, 65536/0x1b, 65536/0x1d, + 65536/0x13, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, 65536/0x1d, 65536/0x1d, 65536/0x23, + 65536/0x16, 65536/0x18, 65536/0x1b, 65536/0x1b, 65536/0x13, 65536/0x20, 65536/0x22, 65536/0x26, + 65536/0x1a, 65536/0x1b, 65536/0x13, 65536/0x13, 65536/0x20, 65536/0x23, 65536/0x26, 65536/0x2e, + 65536/0x1b, 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x23, 65536/0x28, 65536/0x2e, 65536/0x38, + 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x25, 65536/0x28, 65536/0x30, 65536/0x38, 65536/0x45, + 65536/0x22, 65536/0x25, 65536/0x26, 65536/0x28, 65536/0x30, 65536/0x3a, 65536/0x45, 65536/0x53, + }; + + unsigned short non_intra_fqm[64] = { + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + }; + + gen75_mfc_fqm_state(ctx, MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX, (unsigned int *)intra_fqm, 32, encoder_context); + gen75_mfc_fqm_state(ctx, MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX, (unsigned int *)non_intra_fqm, 32, encoder_context); +} + +static void +gen75_mfc_mpeg2_slicegroup_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + int x, int y, + int next_x, int next_y, + int is_fisrt_slice_group, + int is_last_slice_group, + int intra_slice, + int qp, + struct intel_batchbuffer *batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 8); + + OUT_BCS_BATCH(batch, MFC_MPEG2_SLICEGROUP_STATE | (8 - 2)); + OUT_BCS_BATCH(batch, + 0 << 31 | /* MbRateCtrlFlag */ + !!is_last_slice_group << 19 | /* IsLastSliceGrp */ + 1 << 17 | /* Insert Header before the first slice group data */ + 1 << 16 | /* SliceData PresentFlag: always 1 */ + 1 << 15 | /* TailPresentFlag: always 1 */ + 0 << 14 | /* FirstSliceHdrDisabled: slice header for each slice */ + !!intra_slice << 13 | /* IntraSlice */ + !!intra_slice << 12 | /* IntraSliceFlag */ + 0); + OUT_BCS_BATCH(batch, + next_y << 24 | + next_x << 16 | + y << 8 | + x << 0 | + 0); + OUT_BCS_BATCH(batch, qp); /* FIXME: SliceGroupQp */ + /* bitstream pointer is only loaded once for the first slice of a frame when + * LoadSlicePointerFlag is 0 + */ + OUT_BCS_BATCH(batch, mfc_context->mfc_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, 0); /* FIXME: */ + OUT_BCS_BATCH(batch, 0); /* FIXME: CorrectPoints */ + OUT_BCS_BATCH(batch, 0); /* FIXME: CVxxx */ + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen75_mfc_mpeg2_pak_object_intra(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + int x, int y, + int first_mb_in_slice, + int last_mb_in_slice, + int first_mb_in_slice_group, + int last_mb_in_slice_group, + int mb_type, + int qp_scale_code, + int coded_block_pattern, + unsigned char target_size_in_word, + unsigned char max_size_in_word, + struct intel_batchbuffer *batch) +{ + int len_in_dwords = 9; + + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_MPEG2_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, + 0 << 24 | /* PackedMvNum */ + 0 << 20 | /* MvFormat */ + 7 << 17 | /* CbpDcY/CbpDcU/CbpDcV */ + 0 << 15 | /* TransformFlag: frame DCT */ + 0 << 14 | /* FieldMbFlag */ + 1 << 13 | /* IntraMbFlag */ + mb_type << 8 | /* MbType: Intra */ + 0 << 2 | /* SkipMbFlag */ + 0 << 0 | /* InterMbMode */ + 0); + OUT_BCS_BATCH(batch, y << 16 | x); + OUT_BCS_BATCH(batch, + max_size_in_word << 24 | + target_size_in_word << 16 | + coded_block_pattern << 6 | /* CBP */ + 0); + OUT_BCS_BATCH(batch, + last_mb_in_slice << 31 | + first_mb_in_slice << 30 | + 0 << 27 | /* EnableCoeffClamp */ + last_mb_in_slice_group << 26 | + 0 << 25 | /* MbSkipConvDisable */ + first_mb_in_slice_group << 24 | + 0 << 16 | /* MvFieldSelect */ + qp_scale_code << 0 | + 0); + OUT_BCS_BATCH(batch, 0); /* MV[0][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[0][1] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][1] */ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +#define MPEG2_INTER_MV_OFFSET 12 + +static struct _mv_ranges +{ + int low; /* in the unit of 1/2 pixel */ + int high; /* in the unit of 1/2 pixel */ +} mv_ranges[] = { + {0, 0}, + {-16, 15}, + {-32, 31}, + {-64, 63}, + {-128, 127}, + {-256, 255}, + {-512, 511}, + {-1024, 1023}, + {-2048, 2047}, + {-4096, 4095} +}; + +static int +mpeg2_motion_vector(int mv, int pos, int display_max, int f_code) +{ + if (mv + pos * 16 * 2 < 0 || + mv + (pos + 1) * 16 * 2 > display_max * 2) + mv = 0; + + if (f_code > 0 && f_code < 10) { + if (mv < mv_ranges[f_code].low) + mv = mv_ranges[f_code].low; + + if (mv > mv_ranges[f_code].high) + mv = mv_ranges[f_code].high; + } + + return mv; +} + +static int +gen75_mfc_mpeg2_pak_object_inter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + unsigned int *msg, + int width_in_mbs, int height_in_mbs, + int x, int y, + int first_mb_in_slice, + int last_mb_in_slice, + int first_mb_in_slice_group, + int last_mb_in_slice_group, + int qp_scale_code, + unsigned char target_size_in_word, + unsigned char max_size_in_word, + struct intel_batchbuffer *batch) +{ + VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + int len_in_dwords = 9; + short *mvptr, mvx0, mvy0, mvx1, mvy1; + + if (batch == NULL) + batch = encoder_context->base.batch; + + mvptr = (short *)(msg + MPEG2_INTER_MV_OFFSET); + mvx0 = mpeg2_motion_vector(mvptr[0] / 2, x, width_in_mbs * 16, pic_param->f_code[0][0]); + mvy0 = mpeg2_motion_vector(mvptr[1] / 2, y, height_in_mbs * 16, pic_param->f_code[0][0]); + mvx1 = mpeg2_motion_vector(mvptr[2] / 2, x, width_in_mbs * 16, pic_param->f_code[1][0]); + mvy1 = mpeg2_motion_vector(mvptr[3] / 2, y, height_in_mbs * 16, pic_param->f_code[1][0]); + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_MPEG2_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, + 2 << 24 | /* PackedMvNum */ + 7 << 20 | /* MvFormat */ + 7 << 17 | /* CbpDcY/CbpDcU/CbpDcV */ + 0 << 15 | /* TransformFlag: frame DCT */ + 0 << 14 | /* FieldMbFlag */ + 0 << 13 | /* IntraMbFlag */ + 1 << 8 | /* MbType: Frame-based */ + 0 << 2 | /* SkipMbFlag */ + 0 << 0 | /* InterMbMode */ + 0); + OUT_BCS_BATCH(batch, y << 16 | x); + OUT_BCS_BATCH(batch, + max_size_in_word << 24 | + target_size_in_word << 16 | + 0x3f << 6 | /* CBP */ + 0); + OUT_BCS_BATCH(batch, + last_mb_in_slice << 31 | + first_mb_in_slice << 30 | + 0 << 27 | /* EnableCoeffClamp */ + last_mb_in_slice_group << 26 | + 0 << 25 | /* MbSkipConvDisable */ + first_mb_in_slice_group << 24 | + 0 << 16 | /* MvFieldSelect */ + qp_scale_code << 0 | + 0); + + OUT_BCS_BATCH(batch, (mvx0 & 0xFFFF) | mvy0 << 16); /* MV[0][0] */ + OUT_BCS_BATCH(batch, (mvx1 & 0xFFFF) | mvy1 << 16); /* MV[1][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[0][1] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][1] */ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static void +intel_mfc_mpeg2_pipeline_header_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderMPEG2_SPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 5, /* FIXME: check it */ + 0, + 0, + 0, /* Needn't insert emulation bytes for MPEG-2 */ + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderMPEG2_PPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 5, /* FIXME: check it */ + 0, + 0, + 0, /* Needn't insert emulation bytes for MPEG-2 */ + slice_batch); + } +} + +static void +gen75_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + VAEncSliceParameterBufferMPEG2 *next_slice_group_param, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferMPEG2 *slice_param = NULL; + unsigned char tail_delimiter[] = {MPEG2_DELIMITER0, MPEG2_DELIMITER1, MPEG2_DELIMITER2, MPEG2_DELIMITER3, MPEG2_DELIMITER4, 0, 0, 0}; + unsigned char section_delimiter[] = {0x0, 0x0, 0x0, 0x0}; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + int i, j; + int h_start_pos, v_start_pos, h_next_start_pos, v_next_start_pos; + unsigned int *msg = NULL; + unsigned char *msg_ptr = NULL; + + slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[slice_index]->buffer; + h_start_pos = slice_param->macroblock_address % width_in_mbs; + v_start_pos = slice_param->macroblock_address / width_in_mbs; + assert(h_start_pos + slice_param->num_macroblocks <= width_in_mbs); + + dri_bo_map(vme_context->vme_output.bo , 0); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + + if (next_slice_group_param) { + h_next_start_pos = next_slice_group_param->macroblock_address % width_in_mbs; + v_next_start_pos = next_slice_group_param->macroblock_address / width_in_mbs; + } else { + h_next_start_pos = 0; + v_next_start_pos = height_in_mbs; + } + + gen75_mfc_mpeg2_slicegroup_state(ctx, + encoder_context, + h_start_pos, + v_start_pos, + h_next_start_pos, + v_next_start_pos, + slice_index == 0, + next_slice_group_param == NULL, + slice_param->is_intra_slice, + slice_param->quantiser_scale_code, + slice_batch); + + if (slice_index == 0) + intel_mfc_mpeg2_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + /* Insert '00' to make sure the header is valid */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int*)section_delimiter, + 1, + 8, /* 8bits in the last DWORD */ + 1, /* 1 byte */ + 1, + 0, + 0, + slice_batch); + + for (i = 0; i < encode_state->slice_params_ext[slice_index]->num_elements; i++) { + /* PAK for each macroblocks */ + for (j = 0; j < slice_param->num_macroblocks; j++) { + int h_pos = (slice_param->macroblock_address + j) % width_in_mbs; + int v_pos = (slice_param->macroblock_address + j) / width_in_mbs; + int first_mb_in_slice = (j == 0); + int last_mb_in_slice = (j == slice_param->num_macroblocks - 1); + int first_mb_in_slice_group = (i == 0 && j == 0); + int last_mb_in_slice_group = (i == encode_state->slice_params_ext[slice_index]->num_elements - 1 && + j == slice_param->num_macroblocks - 1); + + msg = (unsigned int *)(msg_ptr + (slice_param->macroblock_address + j) * vme_context->vme_output.size_block); + + if (slice_param->is_intra_slice) { + gen75_mfc_mpeg2_pak_object_intra(ctx, + encoder_context, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + 0x1a, + slice_param->quantiser_scale_code, + 0x3f, + 0, + 0xff, + slice_batch); + } else { + int inter_rdo, intra_rdo; + inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK; + intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK; + + if (intra_rdo < inter_rdo) + gen75_mfc_mpeg2_pak_object_intra(ctx, + encoder_context, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + 0x1a, + slice_param->quantiser_scale_code, + 0x3f, + 0, + 0xff, + slice_batch); + else + gen75_mfc_mpeg2_pak_object_inter(ctx, + encode_state, + encoder_context, + msg, + width_in_mbs, height_in_mbs, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + slice_param->quantiser_scale_code, + 0, + 0xff, + slice_batch); + } + } + + slice_param++; + } + + dri_bo_unmap(vme_context->vme_output.bo); + + /* tail data */ + if (next_slice_group_param == NULL) { /* end of a picture */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int *)tail_delimiter, + 2, + 8, /* 8bits in the last DWORD */ + 5, /* 5 bytes */ + 1, + 1, + 0, + slice_batch); + } else { /* end of a lsice group */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int *)section_delimiter, + 1, + 8, /* 8bits in the last DWORD */ + 1, /* 1 byte */ + 1, + 1, + 0, + slice_batch); + } +} + +/* + * A batch buffer for all slices, including slice state, + * slice insert object and slice pak object commands + * + */ +static dri_bo * +gen75_mfc_mpeg2_software_slice_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + VAEncSliceParameterBufferMPEG2 *next_slice_group_param = NULL; + dri_bo *batch_bo; + int i; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + if (i == encode_state->num_slice_params_ext - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[i + 1]->buffer; + + gen75_mfc_mpeg2_pipeline_slice_group(ctx, encode_state, encoder_context, i, next_slice_group_param, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +static void +gen75_mfc_mpeg2_pipeline_picture_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_MPEG2, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen75_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen75_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + gen75_mfc_mpeg2_pic_state(ctx, encoder_context, encode_state); + gen75_mfc_mpeg2_qm_state(ctx, encoder_context); + gen75_mfc_mpeg2_fqm_state(ctx, encoder_context); +} + +static void +gen75_mfc_mpeg2_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + slice_batch_bo = gen75_mfc_mpeg2_software_slice_batchbuffer(ctx, encode_state, encoder_context); + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen75_mfc_mpeg2_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + +static VAStatus +intel_mfc_mpeg2_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAStatus vaStatus = VA_STATUS_SUCCESS; + dri_bo *bo; + int i; + + /* reconstructed surface */ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + mfc_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->pre_deblocking_output.bo); + mfc_context->surface_state.width = obj_surface->orig_width; + mfc_context->surface_state.height = obj_surface->orig_height; + mfc_context->surface_state.w_pitch = obj_surface->width; + mfc_context->surface_state.h_pitch = obj_surface->height; + + /* forward reference */ + obj_surface = encode_state->reference_objects[0]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[0].bo = obj_surface->bo; + dri_bo_reference(mfc_context->reference_surfaces[0].bo); + } else + mfc_context->reference_surfaces[0].bo = NULL; + + /* backward reference */ + obj_surface = encode_state->reference_objects[1]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[1].bo = obj_surface->bo; + dri_bo_reference(mfc_context->reference_surfaces[1].bo); + } else { + mfc_context->reference_surfaces[1].bo = mfc_context->reference_surfaces[0].bo; + + if (mfc_context->reference_surfaces[1].bo) + dri_bo_reference(mfc_context->reference_surfaces[1].bo); + } + + for (i = 2; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + mfc_context->reference_surfaces[i].bo = mfc_context->reference_surfaces[i & 1].bo; + + if (mfc_context->reference_surfaces[i].bo) + dri_bo_reference(mfc_context->reference_surfaces[i].bo); + } + + /* input YUV surface */ + obj_surface = encode_state->input_yuv_object; + mfc_context->uncompressed_picture_source.bo = obj_surface->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + /* coded buffer */ + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + mfc_context->mfc_indirect_pak_bse_object.bo = bo; + mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); + + /* set the internal flag to 0 to indicate the coded size is unknown */ + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return vaStatus; +} + +static VAStatus +gen75_mfc_mpeg2_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen75_mfc_init(ctx, encode_state, encoder_context); + intel_mfc_mpeg2_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen75_mfc_mpeg2_pipeline_programing(ctx, encode_state, encoder_context); + gen75_mfc_run(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen75_mfc_context_destroy(void *context) +{ + struct gen6_mfc_context *mfc_context = context; + int i; + + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + mfc_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + mfc_context->macroblock_status_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + i965_gpe_context_destroy(&mfc_context->gpe_context); + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = NULL; + + free(mfc_context); +} + +static VAStatus gen75_mfc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus; + + switch (profile) { + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264MultiviewHigh: + case VAProfileH264StereoHigh: + vaStatus = gen75_mfc_avc_encode_picture(ctx, encode_state, encoder_context); + break; + + /* FIXME: add for other profile */ + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + vaStatus = gen75_mfc_mpeg2_encode_picture(ctx, encode_state, encoder_context); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + return vaStatus; +} + +Bool gen75_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = calloc(1, sizeof(struct gen6_mfc_context)); + + if (!mfc_context) + return False; + + mfc_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + mfc_context->gpe_context.idrt.max_entries = MAX_GPE_KERNELS; + mfc_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + + mfc_context->gpe_context.curbe.length = 32 * 4; + + mfc_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + mfc_context->gpe_context.vfe_state.num_urb_entries = 16; + mfc_context->gpe_context.vfe_state.gpgpu_mode = 0; + mfc_context->gpe_context.vfe_state.urb_entry_size = 59 - 1; + mfc_context->gpe_context.vfe_state.curbe_allocation_size = 37 - 1; + + i965_gpe_load_kernels(ctx, + &mfc_context->gpe_context, + gen75_mfc_kernels, + 1); + + mfc_context->pipe_mode_select = gen75_mfc_pipe_mode_select; + mfc_context->set_surface_state = gen75_mfc_surface_state; + mfc_context->ind_obj_base_addr_state = gen75_mfc_ind_obj_base_addr_state; + mfc_context->avc_img_state = gen75_mfc_avc_img_state; + mfc_context->avc_qm_state = gen75_mfc_avc_qm_state; + mfc_context->avc_fqm_state = gen75_mfc_avc_fqm_state; + mfc_context->insert_object = gen75_mfc_avc_insert_object; + mfc_context->buffer_suface_setup = gen7_gpe_buffer_suface_setup; + + encoder_context->mfc_context = mfc_context; + encoder_context->mfc_context_destroy = gen75_mfc_context_destroy; + encoder_context->mfc_pipeline = gen75_mfc_pipeline; + encoder_context->mfc_brc_prepare = intel_mfc_brc_prepare; + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen75_mfd.c intel-vaapi-driver-1.7.1/src/gen75_mfd.c --- intel-vaapi-driver-1.0.15/src/gen75_mfd.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_mfd.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3285 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * Zhao Yakui + * + */ +#include "sysdeps.h" + +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_decoder_utils.h" +#include "gen7_mfd.h" +#include "intel_media.h" + +#define B0_STEP_REV 2 +#define IS_STEPPING_BPLUS(i965) ((i965->intel.revision) >= B0_STEP_REV) + +static const uint32_t zigzag_direct[64] = { + 0, 1, 8, 16, 9, 2, 3, 10, + 17, 24, 32, 25, 18, 11, 4, 5, + 12, 19, 26, 33, 40, 48, 41, 34, + 27, 20, 13, 6, 7, 14, 21, 28, + 35, 42, 49, 56, 57, 50, 43, 36, + 29, 22, 15, 23, 30, 37, 44, 51, + 58, 59, 52, 45, 38, 31, 39, 46, + 53, 60, 61, 54, 47, 55, 62, 63 +}; + +static void +gen75_mfd_init_avc_surface(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + GenAvcSurface *gen7_avc_surface = obj_surface->private_data; + int width_in_mbs, height_in_mbs; + + obj_surface->free_private_data = gen_free_avc_surface; + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + + if (!gen7_avc_surface) { + gen7_avc_surface = calloc(sizeof(GenAvcSurface), 1); + assert(gen7_avc_surface); + gen7_avc_surface->base.frame_store_id = -1; + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen7_avc_surface; + } + + gen7_avc_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag && + !pic_param->seq_fields.bits.direct_8x8_inference_flag); + + if (gen7_avc_surface->dmv_top == NULL) { + gen7_avc_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + width_in_mbs * height_in_mbs * 128, + 0x1000); + assert(gen7_avc_surface->dmv_top); + } + + if (gen7_avc_surface->dmv_bottom_flag && + gen7_avc_surface->dmv_bottom == NULL) { + gen7_avc_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + width_in_mbs * height_in_mbs * 128, + 0x1000); + assert(gen7_avc_surface->dmv_bottom); + } +} + +static void +gen75_mfd_pipe_mode_select(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC || + standard_select == MFX_FORMAT_VC1 || + standard_select == MFX_FORMAT_JPEG); + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Currently only support long format */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (gen7_mfd_context->post_deblocking_output.valid << 9) | /* Post Deblocking Output */ + (gen7_mfd_context->pre_deblocking_output.valid << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (MFX_CODEC_DECODE << 4) | /* decoding mode */ + (standard_select << 0)); + OUT_BCS_BATCH(batch, + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); /* pic status/error report id */ + OUT_BCS_BATCH(batch, 0); /* reserved */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_surface_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface = decode_state->render_object; + unsigned int y_cb_offset; + unsigned int y_cr_offset; + unsigned int surface_format; + + assert(obj_surface); + + y_cb_offset = obj_surface->y_cb_offset; + y_cr_offset = obj_surface->y_cr_offset; + + surface_format = obj_surface->fourcc == VA_FOURCC_Y800 ? + MFX_SURFACE_MONOCHROME : MFX_SURFACE_PLANAR_420_8; + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_height - 1) << 18) | + ((obj_surface->orig_width - 1) << 4)); + OUT_BCS_BATCH(batch, + (surface_format << 28) | /* 420 planar YUV surface */ + ((standard_select != MFX_FORMAT_JPEG) << 27) | /* interleave chroma, set to 0 for JPEG */ + (0 << 22) | /* surface object control state, ignored */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, must be 1 */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for U(Cb), must be 0 */ + (y_cb_offset << 0)); /* Y offset for U(Cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for V(Cr), must be 0 */ + (y_cr_offset << 0)); /* Y offset for V(Cr), must be 0 for video codec, non-zoro for JPEG */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_pipe_buf_addr_state_bplus(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 61); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (61 - 2)); + /* Pre-deblock 1-3 */ + if (gen7_mfd_context->pre_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* Post-debloing 4-6 */ + if (gen7_mfd_context->post_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* uncompressed-video & stream out 7-12 */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* intra row-store scratch 13-15 */ + if (gen7_mfd_context->intra_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* deblocking-filter-row-store 16-18 */ + if (gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 19..50 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + struct object_surface *obj_surface; + + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->bo) { + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + + OUT_BCS_RELOC(batch, obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + OUT_BCS_BATCH(batch, 0); + } + /* reference property 51 */ + OUT_BCS_BATCH(batch, 0); + + /* Macroblock status & ILDB 52-57 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the second Macroblock status 58-60 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_pipe_buf_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfd_pipe_buf_addr_state_bplus(ctx, decode_state, + standard_select, gen7_mfd_context); + return; + } + + BEGIN_BCS_BATCH(batch, 25); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (25 - 2)); + if (gen7_mfd_context->pre_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->post_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + + if (gen7_mfd_context->intra_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + /* DW 7..22 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + struct object_surface *obj_surface; + + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->bo) { + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + + OUT_BCS_RELOC(batch, obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, 0); /* ignore DW23 for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore DW24 for decoding */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_ind_obj_base_addr_state_bplus(VADriverContextP ctx, + dri_bo *slice_data_bo, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 26); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (26 - 2)); + /* MFX In BS 1-5 */ + OUT_BCS_RELOC(batch, slice_data_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* MFX Indirect Bitstream Object Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* Upper bound 4-5 */ + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); + + /* MFX indirect MV 6-10 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* MFX IT_COFF 11-15 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* MFX IT_DBLK 16-20 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* MFX PAK_BSE object for encoder 21-25 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_ind_obj_base_addr_state(VADriverContextP ctx, + dri_bo *slice_data_bo, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfd_ind_obj_base_addr_state_bplus(ctx, slice_data_bo, + standard_select, gen7_mfd_context); + return; + } + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_RELOC(batch, slice_data_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* MFX Indirect Bitstream Object Base Address */ + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_bsp_buf_base_addr_state_bplus(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + + if (gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* MPR Row Store Scratch buffer 4-6 */ + if (gen7_mfd_context->mpr_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->mpr_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* Bitplane 7-9 */ + if (gen7_mfd_context->bitplane_read_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bitplane_read_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_bsp_buf_base_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfd_bsp_buf_base_addr_state_bplus(ctx, decode_state, + standard_select, gen7_mfd_context); + return; + } + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2)); + + if (gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->mpr_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->mpr_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (gen7_mfd_context->bitplane_read_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bitplane_read_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_qm_state(VADriverContextP ctx, + int qm_type, + unsigned char *qm, + int qm_length, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16 * 4); + memcpy(qm_buffer, qm, qm_length); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_avc_img_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int img_struct; + int mbaff_frame_flag; + unsigned int width_in_mbs, height_in_mbs; + VAPictureParameterBufferH264 *pic_param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); + + if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD) + img_struct = 1; + else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD) + img_struct = 3; + else + img_struct = 0; + + if ((img_struct & 0x1) == 0x1) { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x1); + } else { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x0); + } + + if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */ + assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0); + assert(pic_param->pic_fields.bits.field_pic_flag == 0); + } else { + assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */ + } + + mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && + !pic_param->pic_fields.bits.field_pic_flag); + + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + + /* MFX unit doesn't support 4:2:2 and 4:4:4 picture */ + assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */ + pic_param->seq_fields.bits.chroma_format_idc == 1); /* 4:2:0 */ + assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */ + + BEGIN_BCS_BATCH(batch, 17); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (17 - 2)); + OUT_BCS_BATCH(batch, + (width_in_mbs * height_in_mbs - 1)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + OUT_BCS_BATCH(batch, + ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) | + ((pic_param->chroma_qp_index_offset & 0x1f) << 16) | + (0 << 14) | /* Max-bit conformance Intra flag ??? FIXME */ + (0 << 13) | /* Max Macroblock size conformance Inter flag ??? FIXME */ + (pic_param->pic_fields.bits.weighted_pred_flag << 12) | /* differ from GEN6 */ + (pic_param->pic_fields.bits.weighted_bipred_idc << 10) | + (img_struct << 8)); + OUT_BCS_BATCH(batch, + (pic_param->seq_fields.bits.chroma_format_idc << 10) | + (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) | + ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) | + (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) | + (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) | + (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) | + (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) | + (mbaff_frame_flag << 1) | + (pic_param->pic_fields.bits.field_pic_flag << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_avc_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAIQMatrixBufferH264 *iq_matrix; + VAPictureParameterBufferH264 *pic_param; + + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) + iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer; + else + iq_matrix = &gen7_mfd_context->iq_matrix.h264; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + gen75_mfd_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, &iq_matrix->ScalingList4x4[0][0], 3 * 16, gen7_mfd_context); + gen75_mfd_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, &iq_matrix->ScalingList4x4[3][0], 3 * 16, gen7_mfd_context); + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) { + gen75_mfd_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, &iq_matrix->ScalingList8x8[0][0], 64, gen7_mfd_context); + gen75_mfd_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, &iq_matrix->ScalingList8x8[1][0], 64, gen7_mfd_context); + } +} + +static inline void +gen75_mfd_avc_picid_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen75_send_avc_picid_state(gen7_mfd_context->base.batch, + gen7_mfd_context->reference_surface); +} + +static void +gen75_mfd_avc_directmode_state_bplus(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface; + GenAvcSurface *gen7_avc_surface; + VAPictureH264 *va_pic; + int i; + + BEGIN_BCS_BATCH(batch, 71); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (71 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->private_data) { + + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + gen7_avc_surface = obj_surface->private_data; + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, 0); + + /* the current decoding frame/field */ + va_pic = &pic_param->CurrPic; + obj_surface = decode_state->render_object; + assert(obj_surface->bo && obj_surface->private_data); + gen7_avc_surface = obj_surface->private_data; + + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* POC List */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + + if (obj_surface) { + const VAPictureH264 * const va_pic = avc_find_picture( + obj_surface->base.id, pic_param->ReferenceFrames, + ARRAY_ELEMS(pic_param->ReferenceFrames)); + + assert(va_pic != NULL); + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + va_pic = &pic_param->CurrPic; + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_avc_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface; + GenAvcSurface *gen7_avc_surface; + VAPictureH264 *va_pic; + int i; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfd_avc_directmode_state_bplus(ctx, decode_state, pic_param, slice_param, + gen7_mfd_context); + + return; + } + + BEGIN_BCS_BATCH(batch, 69); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->private_data) { + + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + gen7_avc_surface = obj_surface->private_data; + + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + if (gen7_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + /* the current decoding frame/field */ + va_pic = &pic_param->CurrPic; + obj_surface = decode_state->render_object; + assert(obj_surface->bo && obj_surface->private_data); + gen7_avc_surface = obj_surface->private_data; + + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + if (gen7_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + /* POC List */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + + if (obj_surface) { + const VAPictureH264 * const va_pic = avc_find_picture( + obj_surface->base.id, pic_param->ReferenceFrames, + ARRAY_ELEMS(pic_param->ReferenceFrames)); + + assert(va_pic != NULL); + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + va_pic = &pic_param->CurrPic; + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_avc_phantom_slice_first(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen6_mfd_avc_phantom_slice(ctx, pic_param, next_slice_param, gen7_mfd_context->base.batch); +} + +static void +gen75_mfd_avc_slice_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; + int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos; + int num_ref_idx_l0, num_ref_idx_l1; + int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && + pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); + int first_mb_in_slice = 0, first_mb_in_next_slice = 0; + int slice_type; + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) { + slice_type = SLICE_TYPE_I; + } else if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) { + slice_type = SLICE_TYPE_P; + } else { + assert(slice_param->slice_type == SLICE_TYPE_B); + slice_type = SLICE_TYPE_B; + } + + if (slice_type == SLICE_TYPE_I) { + assert(slice_param->num_ref_idx_l0_active_minus1 == 0); + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = 0; + num_ref_idx_l1 = 0; + } else if (slice_type == SLICE_TYPE_P) { + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = 0; + } else { + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + first_mb_in_slice = slice_param->first_mb_in_slice; + slice_hor_pos = first_mb_in_slice % width_in_mbs; + slice_ver_pos = first_mb_in_slice / width_in_mbs; + + if (mbaff_picture) + slice_ver_pos = slice_ver_pos << 1; + + if (next_slice_param) { + first_mb_in_next_slice = next_slice_param->first_mb_in_slice; + next_slice_hor_pos = first_mb_in_next_slice % width_in_mbs; + next_slice_ver_pos = first_mb_in_next_slice / width_in_mbs; + + if (mbaff_picture) + next_slice_ver_pos = next_slice_ver_pos << 1; + } else { + next_slice_hor_pos = 0; + next_slice_ver_pos = height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag); + } + + BEGIN_BCS_BATCH(batch, 11); /* FIXME: is it 10??? */ + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (slice_param->chroma_log2_weight_denom << 8) | + (slice_param->luma_log2_weight_denom << 0)); + OUT_BCS_BATCH(batch, + (slice_param->direct_spatial_mv_pred_flag << 29) | + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) | + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (next_slice_ver_pos << 16) | + (next_slice_hor_pos << 0)); + OUT_BCS_BATCH(batch, + (next_slice_param == NULL) << 19); /* last slice flag */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static inline void +gen75_mfd_avc_ref_idx_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen6_send_avc_ref_idx_state( + gen7_mfd_context->base.batch, + slice_param, + gen7_mfd_context->reference_surface + ); +} + +static void +gen75_mfd_avc_weightoffset_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i, j, num_weight_offset_table = 0; + short weightoffsets[32 * 6]; + + if ((slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) && + (pic_param->pic_fields.bits.weighted_pred_flag == 1)) { + num_weight_offset_table = 1; + } + + if ((slice_param->slice_type == SLICE_TYPE_B) && + (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) { + num_weight_offset_table = 2; + } + + for (i = 0; i < num_weight_offset_table; i++) { + BEGIN_BCS_BATCH(batch, 98); + OUT_BCS_BATCH(batch, MFX_AVC_WEIGHTOFFSET_STATE | (98 - 2)); + OUT_BCS_BATCH(batch, i); + + if (i == 0) { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l0[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l0[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l0[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l0[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l0[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l0[j][1]; + } + } else { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l1[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l1[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l1[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l1[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l1[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l1[j][1]; + } + } + + intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets)); + ADVANCE_BCS_BATCH(batch); + } +} + +static void +gen75_mfd_avc_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + dri_bo *slice_data_bo, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int slice_data_bit_offset = avc_get_first_mb_bit_offset(slice_data_bo, + slice_param, + pic_param->pic_fields.bits.entropy_coding_mode_flag); + + /* the input bitsteam format on GEN7 differs from GEN6 */ + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, + (slice_param->slice_data_size - slice_param->slice_data_offset)); + OUT_BCS_BATCH(batch, slice_param->slice_data_offset); + OUT_BCS_BATCH(batch, + (0 << 31) | + (0 << 14) | + (0 << 12) | + (0 << 10) | + (0 << 8)); + OUT_BCS_BATCH(batch, + ((slice_data_bit_offset >> 3) << 16) | + (1 << 7) | + (0 << 5) | + (0 << 4) | + ((next_slice_param == NULL) << 3) | /* LastSlice Flag */ + (slice_data_bit_offset & 0x7)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static inline void +gen75_mfd_avc_context_init( + VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context +) +{ + /* Initialize flat scaling lists */ + avc_gen_default_iq_matrix(&gen7_mfd_context->iq_matrix.h264); +} + +static void +gen75_mfd_avc_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + int i, j, enable_avc_ildb = 0; + unsigned int width_in_mbs, height_in_mbs; + + for (j = 0; j < decode_state->num_slice_params && enable_avc_ildb == 0; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (slice_param->disable_deblocking_filter_idc != 1) { + enable_avc_ildb = 1; + break; + } + + slice_param++; + } + } + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen75_update_avc_frame_store_index(ctx, decode_state, pic_param, + gen7_mfd_context->reference_surface); + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; + assert(width_in_mbs > 0 && width_in_mbs <= 256); /* 4K */ + assert(height_in_mbs > 0 && height_in_mbs <= 256); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + if (pic_param->pic_fields.bits.reference_pic_flag) + obj_surface->flags |= SURFACE_REFERENCED; + else + obj_surface->flags &= ~SURFACE_REFERENCED; + + avc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param); + gen75_mfd_init_avc_surface(ctx, pic_param, obj_surface); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.valid = enable_avc_ildb; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = !enable_avc_ildb; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + width_in_mbs * 64, + 0x1000); + assert(bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + width_in_mbs * 64 * 4, + 0x1000); + assert(bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + width_in_mbs * 64 * 2, + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + width_in_mbs * 64 * 2, + 0x1000); + assert(bo); + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen75_mfd_avc_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen75_mfd_avc_decode_init(ctx, decode_state, gen7_mfd_context); + + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen75_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen75_mfd_surface_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen75_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen75_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen75_mfd_avc_qm_state(ctx, decode_state, gen7_mfd_context); + gen75_mfd_avc_picid_state(ctx, decode_state, gen7_mfd_context); + gen75_mfd_avc_img_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen75_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_AVC, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer; + + if (j == 0 && slice_param->first_mb_in_slice) + gen75_mfd_avc_phantom_slice_first(ctx, pic_param, slice_param, gen7_mfd_context); + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen75_mfd_avc_directmode_state(ctx, decode_state, pic_param, slice_param, gen7_mfd_context); + gen75_mfd_avc_ref_idx_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen75_mfd_avc_weightoffset_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen75_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); + gen75_mfd_avc_bsd_object(ctx, pic_param, slice_param, slice_data_bo, next_slice_param, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen75_mfd_mpeg2_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferMPEG2 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + unsigned int width_in_mbs; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; + + mpeg2_set_reference_surfaces( + ctx, + gen7_mfd_context->reference_surface, + decode_state, + pic_param + ); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + width_in_mbs * 96, + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->post_deblocking_output.valid = 0; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen75_mfd_mpeg2_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + unsigned int slice_concealment_disable_bit = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + slice_concealment_disable_bit = 1; + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + (pic_param->f_code & 0xf) << 28 | /* f_code[1][1] */ + ((pic_param->f_code >> 4) & 0xf) << 24 | /* f_code[1][0] */ + ((pic_param->f_code >> 8) & 0xf) << 20 | /* f_code[0][1] */ + ((pic_param->f_code >> 12) & 0xf) << 16 | /* f_code[0][0] */ + pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | + pic_param->picture_coding_extension.bits.picture_structure << 12 | + pic_param->picture_coding_extension.bits.top_field_first << 11 | + pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | + pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | + pic_param->picture_coding_extension.bits.q_scale_type << 8 | + pic_param->picture_coding_extension.bits.intra_vlc_format << 7 | + pic_param->picture_coding_extension.bits.alternate_scan << 6); + OUT_BCS_BATCH(batch, + pic_param->picture_coding_type << 9); + OUT_BCS_BATCH(batch, + (slice_concealment_disable_bit << 31) | + ((ALIGN(pic_param->vertical_size, 16) / 16) - 1) << 16 | + ((ALIGN(pic_param->horizontal_size, 16) / 16) - 1)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_mpeg2_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAIQMatrixBufferMPEG2 * const gen_iq_matrix = &gen7_mfd_context->iq_matrix.mpeg2; + int i, j; + + /* Update internal QM state */ + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) { + VAIQMatrixBufferMPEG2 * const iq_matrix = + (VAIQMatrixBufferMPEG2 *)decode_state->iq_matrix->buffer; + + if (gen_iq_matrix->load_intra_quantiser_matrix == -1 || + iq_matrix->load_intra_quantiser_matrix) { + gen_iq_matrix->load_intra_quantiser_matrix = + iq_matrix->load_intra_quantiser_matrix; + if (iq_matrix->load_intra_quantiser_matrix) { + for (j = 0; j < 64; j++) + gen_iq_matrix->intra_quantiser_matrix[zigzag_direct[j]] = + iq_matrix->intra_quantiser_matrix[j]; + } + } + + if (gen_iq_matrix->load_non_intra_quantiser_matrix == -1 || + iq_matrix->load_non_intra_quantiser_matrix) { + gen_iq_matrix->load_non_intra_quantiser_matrix = + iq_matrix->load_non_intra_quantiser_matrix; + if (iq_matrix->load_non_intra_quantiser_matrix) { + for (j = 0; j < 64; j++) + gen_iq_matrix->non_intra_quantiser_matrix[zigzag_direct[j]] = + iq_matrix->non_intra_quantiser_matrix[j]; + } + } + } + + /* Commit QM state to HW */ + for (i = 0; i < 2; i++) { + unsigned char *qm = NULL; + int qm_type; + + if (i == 0) { + if (gen_iq_matrix->load_intra_quantiser_matrix) { + qm = gen_iq_matrix->intra_quantiser_matrix; + qm_type = MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX; + } + } else { + if (gen_iq_matrix->load_non_intra_quantiser_matrix) { + qm = gen_iq_matrix->non_intra_quantiser_matrix; + qm_type = MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX; + } + } + + if (!qm) + continue; + + gen75_mfd_qm_state(ctx, qm_type, qm, 64, gen7_mfd_context); + } +} + +static void +gen75_mfd_mpeg2_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferMPEG2 *pic_param, + VASliceParameterBufferMPEG2 *slice_param, + VASliceParameterBufferMPEG2 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; + int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic_wa, is_field_pic = 0; + + if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || + pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) + is_field_pic = 1; + is_field_pic_wa = is_field_pic && + gen7_mfd_context->wa_mpeg2_slice_vertical_position > 0; + + vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic_wa); + hpos0 = slice_param->slice_horizontal_position; + + if (next_slice_param == NULL) { + vpos1 = ALIGN(pic_param->vertical_size, 16) / 16 / (1 + is_field_pic); + hpos1 = 0; + } else { + vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic_wa); + hpos1 = next_slice_param->slice_horizontal_position; + } + + mb_count = (vpos1 * width_in_mbs + hpos1) - (vpos0 * width_in_mbs + hpos0); + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFD_MPEG2_BSD_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + hpos0 << 24 | + vpos0 << 16 | + mb_count << 8 | + (next_slice_param == NULL) << 5 | + (next_slice_param == NULL) << 3 | + (slice_param->macroblock_offset & 0x7)); + OUT_BCS_BATCH(batch, + (slice_param->quantiser_scale_code << 24) | + (vpos1 << 8 | hpos1)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_mpeg2_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + VASliceParameterBufferMPEG2 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + gen75_mfd_mpeg2_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen75_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen75_mfd_surface_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen75_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen75_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen75_mfd_mpeg2_pic_state(ctx, decode_state, gen7_mfd_context); + gen75_mfd_mpeg2_qm_state(ctx, decode_state, gen7_mfd_context); + + if (gen7_mfd_context->wa_mpeg2_slice_vertical_position < 0) + gen7_mfd_context->wa_mpeg2_slice_vertical_position = + mpeg2_wa_slice_vertical_position(decode_state, pic_param); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen75_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen75_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static const int va_to_gen7_vc1_pic_type[5] = { + GEN7_VC1_I_PICTURE, + GEN7_VC1_P_PICTURE, + GEN7_VC1_B_PICTURE, + GEN7_VC1_BI_PICTURE, + GEN7_VC1_P_PICTURE, +}; + +static const int va_to_gen7_vc1_mv[4] = { + 1, /* 1-MV */ + 2, /* 1-MV half-pel */ + 3, /* 1-MV half-pef bilinear */ + 0, /* Mixed MV */ +}; + +static const int b_picture_scale_factor[21] = { + 128, 85, 170, 64, 192, + 51, 102, 153, 204, 43, + 215, 37, 74, 111, 148, + 185, 222, 32, 96, 160, + 224, +}; + +static const int va_to_gen7_vc1_condover[3] = { + 0, + 2, + 3 +}; + +static const int va_to_gen7_vc1_profile[4] = { + GEN7_VC1_SIMPLE_PROFILE, + GEN7_VC1_MAIN_PROFILE, + GEN7_VC1_RESERVED_PROFILE, + GEN7_VC1_ADVANCED_PROFILE +}; + +static void +gen75_mfd_free_vc1_surface(void **data) +{ + struct gen7_vc1_surface *gen7_vc1_surface = *data; + + if (!gen7_vc1_surface) + return; + + dri_bo_unreference(gen7_vc1_surface->dmv); + free(gen7_vc1_surface); + *data = NULL; +} + +static void +gen75_mfd_init_vc1_surface(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen7_vc1_surface *gen7_vc1_surface = obj_surface->private_data; + int width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; + + obj_surface->free_private_data = gen75_mfd_free_vc1_surface; + + if (!gen7_vc1_surface) { + gen7_vc1_surface = calloc(sizeof(struct gen7_vc1_surface), 1); + assert(gen7_vc1_surface); + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen7_vc1_surface; + } + + gen7_vc1_surface->picture_type = pic_param->picture_fields.bits.picture_type; + + if (gen7_vc1_surface->dmv == NULL) { + gen7_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + width_in_mbs * height_in_mbs * 64, + 0x1000); + } +} + +static void +gen75_mfd_vc1_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + int width_in_mbs; + int picture_type; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + picture_type = pic_param->picture_fields.bits.picture_type; + + intel_update_vc1_frame_store_index(ctx, + decode_state, + pic_param, + gen7_mfd_context->reference_surface); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + gen75_mfd_init_vc1_surface(ctx, pic_param, obj_surface); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.valid = pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = !pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + width_in_mbs * 64, + 0x1000); + assert(bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + width_in_mbs * 7 * 64, + 0x1000); + assert(bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + width_in_mbs * 96, + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bitplane_read_buffer.valid = !!pic_param->bitplane_present.value; + dri_bo_unreference(gen7_mfd_context->bitplane_read_buffer.bo); + + if (gen7_mfd_context->bitplane_read_buffer.valid) { + int width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; + int bitplane_width = ALIGN(width_in_mbs, 2) / 2; + int src_w, src_h; + uint8_t *src = NULL, *dst = NULL; + + assert(decode_state->bit_plane->buffer); + src = decode_state->bit_plane->buffer; + + bo = dri_bo_alloc(i965->intel.bufmgr, + "VC-1 Bitplane", + bitplane_width * height_in_mbs, + 0x1000); + assert(bo); + gen7_mfd_context->bitplane_read_buffer.bo = bo; + + dri_bo_map(bo, True); + assert(bo->virtual); + dst = bo->virtual; + + for (src_h = 0; src_h < height_in_mbs; src_h++) { + for(src_w = 0; src_w < width_in_mbs; src_w++) { + int src_index, dst_index; + int src_shift; + uint8_t src_value; + + src_index = (src_h * width_in_mbs + src_w) / 2; + src_shift = !((src_h * width_in_mbs + src_w) & 1) * 4; + src_value = ((src[src_index] >> src_shift) & 0xf); + + if (picture_type == GEN7_VC1_SKIPPED_PICTURE){ + src_value |= 0x2; + } + + dst_index = src_w / 2; + dst[dst_index] = ((dst[dst_index] >> 4) | (src_value << 4)); + } + + if (src_w & 1) + dst[src_w / 2] >>= 4; + + dst += bitplane_width; + } + + dri_bo_unmap(bo); + } else + gen7_mfd_context->bitplane_read_buffer.bo = NULL; +} + +static void +gen75_mfd_vc1_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + struct object_surface *obj_surface; + int alt_pquant_config = 0, alt_pquant_edge_mask = 0, alt_pq; + int dquant, dquantfrm, dqprofile, dqdbedge, dqsbedge, dqbilevel; + int unified_mv_mode; + int ref_field_pic_polarity = 0; + int scale_factor = 0; + int trans_ac_y = 0; + int dmv_surface_valid = 0; + int brfd = 0; + int fcm = 0; + int picture_type; + int profile; + int overlap; + int interpolation_mode = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + profile = va_to_gen7_vc1_profile[pic_param->sequence_fields.bits.profile]; + dquant = pic_param->pic_quantizer_fields.bits.dquant; + dquantfrm = pic_param->pic_quantizer_fields.bits.dq_frame; + dqprofile = pic_param->pic_quantizer_fields.bits.dq_profile; + dqdbedge = pic_param->pic_quantizer_fields.bits.dq_db_edge; + dqsbedge = pic_param->pic_quantizer_fields.bits.dq_sb_edge; + dqbilevel = pic_param->pic_quantizer_fields.bits.dq_binary_level; + alt_pq = pic_param->pic_quantizer_fields.bits.alt_pic_quantizer; + + if (dquant == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + } else if (dquant == 2) { + alt_pquant_config = 1; + alt_pquant_edge_mask = 0xf; + } else { + assert(dquant == 1); + if (dquantfrm == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + alt_pq = 0; + } else { + assert(dquantfrm == 1); + alt_pquant_config = 1; + + switch (dqprofile) { + case 3: + if (dqbilevel == 0) { + alt_pquant_config = 2; + alt_pquant_edge_mask = 0; + } else { + assert(dqbilevel == 1); + alt_pquant_config = 3; + alt_pquant_edge_mask = 0; + } + break; + + case 0: + alt_pquant_edge_mask = 0xf; + break; + + case 1: + if (dqdbedge == 3) + alt_pquant_edge_mask = 0x9; + else + alt_pquant_edge_mask = (0x3 << dqdbedge); + + break; + + case 2: + alt_pquant_edge_mask = (0x1 << dqsbedge); + break; + + default: + assert(0); + } + } + } + + if (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation) { + assert(pic_param->mv_fields.bits.mv_mode2 < 4); + unified_mv_mode = va_to_gen7_vc1_mv[pic_param->mv_fields.bits.mv_mode2]; + } else { + assert(pic_param->mv_fields.bits.mv_mode < 4); + unified_mv_mode = va_to_gen7_vc1_mv[pic_param->mv_fields.bits.mv_mode]; + } + + if (pic_param->sequence_fields.bits.interlace == 1 && + pic_param->picture_fields.bits.frame_coding_mode != 0) { /* frame-interlace or field-interlace */ + /* FIXME: calculate reference field picture polarity */ + assert(0); + ref_field_pic_polarity = 0; + } + + if (pic_param->b_picture_fraction < 21) + scale_factor = b_picture_scale_factor[pic_param->b_picture_fraction]; + + picture_type = va_to_gen7_vc1_pic_type[pic_param->picture_fields.bits.picture_type]; + + if (profile == GEN7_VC1_ADVANCED_PROFILE && + picture_type == GEN7_VC1_I_PICTURE) + picture_type = GEN7_VC1_BI_PICTURE; + + if (picture_type == GEN7_VC1_I_PICTURE || picture_type == GEN7_VC1_BI_PICTURE) /* I picture */ + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx2; + else { + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx1; + + /* + * 8.3.6.2.1 Transform Type Selection + * If variable-sized transform coding is not enabled, + * then the 8x8 transform shall be used for all blocks. + * it is also MFX_VC1_PIC_STATE requirement. + */ + if (pic_param->transform_fields.bits.variable_sized_transform_flag == 0) { + pic_param->transform_fields.bits.mb_level_transform_type_flag = 1; + pic_param->transform_fields.bits.frame_level_transform_type = 0; + } + } + + if (picture_type == GEN7_VC1_B_PICTURE) { + struct gen7_vc1_surface *gen7_vc1_surface = NULL; + + obj_surface = decode_state->reference_objects[1]; + + if (obj_surface) + gen7_vc1_surface = obj_surface->private_data; + + if (!gen7_vc1_surface || + (va_to_gen7_vc1_pic_type[gen7_vc1_surface->picture_type] == GEN7_VC1_I_PICTURE || + va_to_gen7_vc1_pic_type[gen7_vc1_surface->picture_type] == GEN7_VC1_BI_PICTURE)) + dmv_surface_valid = 0; + else + dmv_surface_valid = 1; + } + + assert(pic_param->picture_fields.bits.frame_coding_mode < 3); + + if (pic_param->picture_fields.bits.frame_coding_mode < 2) + fcm = pic_param->picture_fields.bits.frame_coding_mode; + else { + if (pic_param->picture_fields.bits.top_field_first) + fcm = 2; + else + fcm = 3; + } + + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_B_PICTURE) { /* B picture */ + brfd = pic_param->reference_fields.bits.reference_distance; + brfd = (scale_factor * brfd) >> 8; + brfd = pic_param->reference_fields.bits.reference_distance - brfd - 1; + + if (brfd < 0) + brfd = 0; + } + + overlap = pic_param->sequence_fields.bits.overlap; + + if (overlap) { + overlap = 0; + if (profile != GEN7_VC1_ADVANCED_PROFILE){ + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9 && + pic_param->picture_fields.bits.picture_type != GEN7_VC1_B_PICTURE) { + overlap = 1; + } + }else { + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_P_PICTURE && + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_I_PICTURE || + pic_param->picture_fields.bits.picture_type == GEN7_VC1_BI_PICTURE){ + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } else if (va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] == 2 || + va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] == 3) { + overlap = 1; + } + } + } + } + + assert(pic_param->conditional_overlap_flag < 3); + assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */ + + if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) + interpolation_mode = 9; /* Half-pel bilinear */ + else if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPel || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPel)) + interpolation_mode = 1; /* Half-pel bicubic */ + else + interpolation_mode = 0; /* Quarter-pel bicubic */ + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_VC1_LONG_PIC_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + (((ALIGN(pic_param->coded_height, 16) / 16) - 1) << 16) | + ((ALIGN(pic_param->coded_width, 16) / 16) - 1)); + OUT_BCS_BATCH(batch, + ((ALIGN(pic_param->coded_width, 16) / 16 + 1) / 2 - 1) << 24 | + dmv_surface_valid << 15 | + (pic_param->pic_quantizer_fields.bits.quantizer == 0) << 14 | /* implicit quantizer */ + pic_param->rounding_control << 13 | + pic_param->sequence_fields.bits.syncmarker << 12 | + interpolation_mode << 8 | + 0 << 7 | /* FIXME: scale up or down ??? */ + pic_param->range_reduction_frame << 6 | + pic_param->entrypoint_fields.bits.loopfilter << 5 | + overlap << 4 | + !pic_param->picture_fields.bits.is_first_field << 3 | + (pic_param->sequence_fields.bits.profile == 3) << 0); + OUT_BCS_BATCH(batch, + va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] << 29 | + picture_type << 26 | + fcm << 24 | + alt_pq << 16 | + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale << 8 | + scale_factor << 0); + OUT_BCS_BATCH(batch, + unified_mv_mode << 28 | + pic_param->mv_fields.bits.four_mv_switch << 27 | + pic_param->fast_uvmc_flag << 26 | + ref_field_pic_polarity << 25 | + pic_param->reference_fields.bits.num_reference_pictures << 24 | + pic_param->reference_fields.bits.reference_distance << 20 | + pic_param->reference_fields.bits.reference_distance << 16 | /* FIXME: ??? */ + pic_param->mv_fields.bits.extended_dmv_range << 10 | + pic_param->mv_fields.bits.extended_mv_range << 8 | + alt_pquant_edge_mask << 4 | + alt_pquant_config << 2 | + pic_param->pic_quantizer_fields.bits.half_qp << 1 | + pic_param->pic_quantizer_fields.bits.pic_quantizer_type << 0); + OUT_BCS_BATCH(batch, + !!pic_param->bitplane_present.value << 31 | + !pic_param->bitplane_present.flags.bp_forward_mb << 30 | + !pic_param->bitplane_present.flags.bp_mv_type_mb << 29 | + !pic_param->bitplane_present.flags.bp_skip_mb << 28 | + !pic_param->bitplane_present.flags.bp_direct_mb << 27 | + !pic_param->bitplane_present.flags.bp_overflags << 26 | + !pic_param->bitplane_present.flags.bp_ac_pred << 25 | + !pic_param->bitplane_present.flags.bp_field_tx << 24 | + pic_param->mv_fields.bits.mv_table << 20 | + pic_param->mv_fields.bits.four_mv_block_pattern_table << 18 | + pic_param->mv_fields.bits.two_mv_block_pattern_table << 16 | + pic_param->transform_fields.bits.frame_level_transform_type << 12 | + pic_param->transform_fields.bits.mb_level_transform_type_flag << 11 | + pic_param->mb_mode_table << 8 | + trans_ac_y << 6 | + pic_param->transform_fields.bits.transform_ac_codingset_idx1 << 4 | + pic_param->transform_fields.bits.intra_transform_dc_table << 3 | + pic_param->cbp_table << 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_vc1_pred_pipe_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + int intensitycomp_single; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation); + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_VC1_PRED_PIPE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + 0 << 14 | /* FIXME: double ??? */ + 0 << 12 | + intensitycomp_single << 10 | + intensitycomp_single << 8 | + 0 << 4 | /* FIXME: interlace mode */ + 0); + OUT_BCS_BATCH(batch, + pic_param->luma_shift << 16 | + pic_param->luma_scale << 0); /* FIXME: Luma Scaling */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_vc1_directmode_state_bplus(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface; + dri_bo *dmv_read_buffer = NULL, *dmv_write_buffer = NULL; + + obj_surface = decode_state->render_object; + + if (obj_surface && obj_surface->private_data) { + dmv_write_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + obj_surface = decode_state->reference_objects[1]; + + if (obj_surface && obj_surface->private_data) { + dmv_read_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + BEGIN_BCS_BATCH(batch, 7); + OUT_BCS_BATCH(batch, MFX_VC1_DIRECTMODE_STATE | (7 - 2)); + + if (dmv_write_buffer) + OUT_BCS_RELOC(batch, dmv_write_buffer, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + if (dmv_read_buffer) + OUT_BCS_RELOC(batch, dmv_read_buffer, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_vc1_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *dmv_read_buffer = NULL, *dmv_write_buffer = NULL; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_mfd_vc1_directmode_state_bplus(ctx, decode_state, gen7_mfd_context); + return; + } + + obj_surface = decode_state->render_object; + + if (obj_surface && obj_surface->private_data) { + dmv_write_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + obj_surface = decode_state->reference_objects[1]; + + if (obj_surface && obj_surface->private_data) { + dmv_read_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MFX_VC1_DIRECTMODE_STATE | (3 - 2)); + + if (dmv_write_buffer) + OUT_BCS_RELOC(batch, dmv_write_buffer, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + if (dmv_read_buffer) + OUT_BCS_RELOC(batch, dmv_read_buffer, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen75_mfd_vc1_get_macroblock_bit_offset(uint8_t *buf, int in_slice_data_bit_offset, int profile) +{ + int out_slice_data_bit_offset; + int slice_header_size = in_slice_data_bit_offset / 8; + int i, j; + + if (profile != 3) + out_slice_data_bit_offset = in_slice_data_bit_offset; + else { + for (i = 0, j = 0; i < slice_header_size; i++, j++) { + if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3 && buf[j + 3] < 4) { + i++, j += 2; + } + } + + out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; + } + + return out_slice_data_bit_offset; +} + +static void +gen75_mfd_vc1_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + VASliceParameterBufferVC1 *slice_param, + VASliceParameterBufferVC1 *next_slice_param, + dri_bo *slice_data_bo, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int next_slice_start_vert_pos; + int macroblock_offset; + uint8_t *slice_data = NULL; + + dri_bo_map(slice_data_bo, 0); + slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); + macroblock_offset = gen75_mfd_vc1_get_macroblock_bit_offset(slice_data, + slice_param->macroblock_offset, + pic_param->sequence_fields.bits.profile); + dri_bo_unmap(slice_data_bo); + + if (next_slice_param) + next_slice_start_vert_pos = next_slice_param->slice_vertical_position; + else + next_slice_start_vert_pos = ALIGN(pic_param->coded_height, 16) / 16; + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFD_VC1_BSD_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_vertical_position << 16 | + next_slice_start_vert_pos << 0); + OUT_BCS_BATCH(batch, + (macroblock_offset & 0x7)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_vc1_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + VASliceParameterBufferVC1 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + gen75_mfd_vc1_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen75_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen75_mfd_surface_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen75_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen75_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen75_mfd_vc1_pic_state(ctx, decode_state, gen7_mfd_context); + gen75_mfd_vc1_pred_pipe_state(ctx, decode_state, gen7_mfd_context); + gen75_mfd_vc1_directmode_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen75_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_VC1, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen75_mfd_vc1_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen75_mfd_jpeg_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct object_surface *obj_surface; + VAPictureParameterBufferJPEGBaseline *pic_param; + int subsampling = SUBSAMPLE_YUV420; + int fourcc = VA_FOURCC_IMC3; + + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + if (pic_param->num_components == 1) { + subsampling = SUBSAMPLE_YUV400; + fourcc = VA_FOURCC_Y800; + } else if (pic_param->num_components == 3) { + int h1 = pic_param->components[0].h_sampling_factor; + int h2 = pic_param->components[1].h_sampling_factor; + int h3 = pic_param->components[2].h_sampling_factor; + int v1 = pic_param->components[0].v_sampling_factor; + int v2 = pic_param->components[1].v_sampling_factor; + int v3 = pic_param->components[2].v_sampling_factor; + + if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV420; + fourcc = VA_FOURCC_IMC3; + } else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422H; + fourcc = VA_FOURCC_422H; + } else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV444; + fourcc = VA_FOURCC_444P; + } else if (h1 == 4 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV411; + fourcc = VA_FOURCC_411P; + } else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422V; + fourcc = VA_FOURCC_422V; + } else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 2 && v3 == 2) { + subsampling = SUBSAMPLE_YUV422H; + fourcc = VA_FOURCC_422H; + } else if (h1 == 2 && h2 == 2 && h3 == 2 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422V; + fourcc = VA_FOURCC_422V; + } else + assert(0); + } else { + assert(0); + } + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, fourcc, subsampling); + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = 1; + + gen7_mfd_context->post_deblocking_output.bo = NULL; + gen7_mfd_context->post_deblocking_output.valid = 0; + + gen7_mfd_context->intra_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bitplane_read_buffer.bo = NULL; + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static const int va_to_gen7_jpeg_rotation[4] = { + GEN7_JPEG_ROTATION_0, + GEN7_JPEG_ROTATION_90, + GEN7_JPEG_ROTATION_180, + GEN7_JPEG_ROTATION_270 +}; + +static void +gen75_mfd_jpeg_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferJPEGBaseline *pic_param; + int chroma_type = GEN7_YUV420; + int frame_width_in_blks; + int frame_height_in_blks; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + if (pic_param->num_components == 1) + chroma_type = GEN7_YUV400; + else if (pic_param->num_components == 3) { + int h1 = pic_param->components[0].h_sampling_factor; + int h2 = pic_param->components[1].h_sampling_factor; + int h3 = pic_param->components[2].h_sampling_factor; + int v1 = pic_param->components[0].v_sampling_factor; + int v2 = pic_param->components[1].v_sampling_factor; + int v3 = pic_param->components[2].v_sampling_factor; + + if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV420; + else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422H_2Y; + else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV444; + else if (h1 == 4 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV411; + else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422V_2Y; + else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 2 && v3 == 2) + chroma_type = GEN7_YUV422H_4Y; + else if (h2 == 2 && h2 == 2 && h3 == 2 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422V_4Y; + else + assert(0); + } + + if (chroma_type == GEN7_YUV400 || + chroma_type == GEN7_YUV444 || + chroma_type == GEN7_YUV422V_2Y) { + frame_width_in_blks = ((pic_param->picture_width + 7) / 8); + frame_height_in_blks = ((pic_param->picture_height + 7) / 8); + } else if (chroma_type == GEN7_YUV411) { + frame_width_in_blks = ((pic_param->picture_width + 31) / 32) * 4; + frame_height_in_blks = ((pic_param->picture_height + 31) / 32) * 4; + } else { + frame_width_in_blks = ((pic_param->picture_width + 15) / 16) * 2; + frame_height_in_blks = ((pic_param->picture_height + 15) / 16) * 2; + } + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MFX_JPEG_PIC_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (va_to_gen7_jpeg_rotation[0] << 4) | /* without rotation */ + (chroma_type << 0)); + OUT_BCS_BATCH(batch, + ((frame_height_in_blks - 1) << 16) | /* FrameHeightInBlks */ + ((frame_width_in_blks - 1) << 0)); /* FrameWidthInBlks */ + ADVANCE_BCS_BATCH(batch); +} + +static const int va_to_gen7_jpeg_hufftable[2] = { + MFX_HUFFTABLE_ID_Y, + MFX_HUFFTABLE_ID_UV +}; + +static void +gen75_mfd_jpeg_huff_table_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context, + int num_tables) +{ + VAHuffmanTableBufferJPEGBaseline *huffman_table; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int index; + + if (!decode_state->huffman_table || !decode_state->huffman_table->buffer) + return; + + huffman_table = (VAHuffmanTableBufferJPEGBaseline *)decode_state->huffman_table->buffer; + + for (index = 0; index < num_tables; index++) { + int id = va_to_gen7_jpeg_hufftable[index]; + + if (!huffman_table->load_huffman_table[index]) + continue; + + BEGIN_BCS_BATCH(batch, 53); + OUT_BCS_BATCH(batch, MFX_JPEG_HUFF_TABLE_STATE | (53 - 2)); + OUT_BCS_BATCH(batch, id); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].num_dc_codes, 12); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].dc_values, 12); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].num_ac_codes, 16); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].ac_values, 164); + ADVANCE_BCS_BATCH(batch); + } +} + +static const int va_to_gen7_jpeg_qm[5] = { + -1, + MFX_QM_JPEG_LUMA_Y_QUANTIZER_MATRIX, + MFX_QM_JPEG_CHROMA_CB_QUANTIZER_MATRIX, + MFX_QM_JPEG_CHROMA_CR_QUANTIZER_MATRIX, + MFX_QM_JPEG_ALPHA_QUANTIZER_MATRIX +}; + +static void +gen75_mfd_jpeg_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferJPEGBaseline *pic_param; + VAIQMatrixBufferJPEGBaseline *iq_matrix; + int index; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferJPEGBaseline *)decode_state->iq_matrix->buffer; + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + assert(pic_param->num_components <= 3); + + for (index = 0; index < pic_param->num_components; index++) { + int id = pic_param->components[index].component_id - pic_param->components[0].component_id + 1; + int qm_type; + unsigned char *qm = iq_matrix->quantiser_table[pic_param->components[index].quantiser_table_selector]; + unsigned char raster_qm[64]; + int j; + + if (id > 4 || id < 1) + continue; + + if (!iq_matrix->load_quantiser_table[pic_param->components[index].quantiser_table_selector]) + continue; + + qm_type = va_to_gen7_jpeg_qm[id]; + + for (j = 0; j < 64; j++) + raster_qm[zigzag_direct[j]] = qm[j]; + + gen75_mfd_qm_state(ctx, qm_type, raster_qm, 64, gen7_mfd_context); + } +} + +static void +gen75_mfd_jpeg_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferJPEGBaseline *pic_param, + VASliceParameterBufferJPEGBaseline *slice_param, + VASliceParameterBufferJPEGBaseline *next_slice_param, + dri_bo *slice_data_bo, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int scan_component_mask = 0; + int i; + + assert(slice_param->num_components > 0); + assert(slice_param->num_components < 4); + assert(slice_param->num_components <= pic_param->num_components); + + for (i = 0; i < slice_param->num_components; i++) { + switch (slice_param->components[i].component_selector - pic_param->components[0].component_id + 1) { + case 1: + scan_component_mask |= (1 << 0); + break; + case 2: + scan_component_mask |= (1 << 1); + break; + case 3: + scan_component_mask |= (1 << 2); + break; + default: + assert(0); + break; + } + } + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_JPEG_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset); + OUT_BCS_BATCH(batch, + slice_param->slice_horizontal_position << 16 | + slice_param->slice_vertical_position << 0); + OUT_BCS_BATCH(batch, + ((slice_param->num_components != 1) << 30) | /* interleaved */ + (scan_component_mask << 27) | /* scan components */ + (0 << 26) | /* disable interrupt allowed */ + (slice_param->num_mcus << 0)); /* MCU count */ + OUT_BCS_BATCH(batch, + (slice_param->restart_interval << 0)); /* RestartInterval */ + ADVANCE_BCS_BATCH(batch); +} + +/* Workaround for JPEG decoding on Ivybridge */ + +static struct { + int width; + int height; + unsigned char data[32]; + int data_size; + int data_bit_offset; + int qp; +} gen7_jpeg_wa_clip = { + 16, + 16, + { + 0x65, 0xb8, 0x40, 0x32, 0x13, 0xfd, 0x06, 0x6c, + 0xfc, 0x0a, 0x50, 0x71, 0x5c, 0x00 + }, + 14, + 40, + 28, +}; + +static void +gen75_jpeg_wa_init(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAStatus status; + struct object_surface *obj_surface; + + if (gen7_mfd_context->jpeg_wa_surface_id != VA_INVALID_SURFACE) + i965_DestroySurfaces(ctx, + &gen7_mfd_context->jpeg_wa_surface_id, + 1); + + status = i965_CreateSurfaces(ctx, + gen7_jpeg_wa_clip.width, + gen7_jpeg_wa_clip.height, + VA_RT_FORMAT_YUV420, + 1, + &gen7_mfd_context->jpeg_wa_surface_id); + assert(status == VA_STATUS_SUCCESS); + + obj_surface = SURFACE(gen7_mfd_context->jpeg_wa_surface_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + gen7_mfd_context->jpeg_wa_surface_object = obj_surface; + + if (!gen7_mfd_context->jpeg_wa_slice_data_bo) { + gen7_mfd_context->jpeg_wa_slice_data_bo = dri_bo_alloc(i965->intel.bufmgr, + "JPEG WA data", + 0x1000, + 0x1000); + dri_bo_subdata(gen7_mfd_context->jpeg_wa_slice_data_bo, + 0, + gen7_jpeg_wa_clip.data_size, + gen7_jpeg_wa_clip.data); + } +} + +static void +gen75_jpeg_wa_pipe_mode_select(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Currently only support long format */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (0 << 9) | /* Post Deblocking Output */ + (1 << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (MFX_CODEC_DECODE << 4) | /* decoding mode */ + (MFX_FORMAT_AVC << 0)); + OUT_BCS_BATCH(batch, + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); /* pic status/error report id */ + OUT_BCS_BATCH(batch, 0); /* reserved */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_surface_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct object_surface *obj_surface = gen7_mfd_context->jpeg_wa_surface_object; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_width - 1) << 18) | + ((obj_surface->orig_height - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* interleave chroma, set to 0 for JPEG */ + (0 << 22) | /* surface object control state, ignored */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, must be 1 */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for U(Cb), must be 0 */ + (obj_surface->y_cb_offset << 0)); /* Y offset for U(Cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for V(Cr), must be 0 */ + (0 << 0)); /* Y offset for V(Cr), must be 0 for video codec, non-zoro for JPEG */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_pipe_buf_addr_state_bplus(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = gen7_mfd_context->jpeg_wa_surface_object; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *intra_bo; + int i; + + intra_bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + + BEGIN_BCS_BATCH(batch, 61); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (61 - 2)); + OUT_BCS_RELOC(batch, + obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + + OUT_BCS_BATCH(batch, 0); /* post deblocking */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* uncompressed-video & stream out 7-12 */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 13-15 is for intra row store scratch */ + OUT_BCS_RELOC(batch, + intra_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 16-18 is for deblocking filter */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 19..50 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + OUT_BCS_BATCH(batch, 0); + + /* the DW52-54 is for mb status address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* the DW56-60 is for ILDB & second ILDB address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(intra_bo); +} + +static void +gen75_jpeg_wa_pipe_buf_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = gen7_mfd_context->jpeg_wa_surface_object; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *intra_bo; + int i; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_jpeg_wa_pipe_buf_addr_state_bplus(ctx, gen7_mfd_context); + return; + } + + intra_bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + + BEGIN_BCS_BATCH(batch, 25); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (25 - 2)); + OUT_BCS_RELOC(batch, + obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); /* post deblocking */ + + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + + OUT_BCS_RELOC(batch, + intra_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + + /* DW 7..22 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); /* ignore DW23 for decoding */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(intra_bo); +} + +static void +gen75_jpeg_wa_bsp_buf_base_addr_state_bplus(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *bsd_mpc_bo, *mpr_bo; + + bsd_mpc_bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + + mpr_bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + 7680, /* 1. 0 * 120 * 64 */ + 0x1000); + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + + OUT_BCS_RELOC(batch, + bsd_mpc_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_RELOC(batch, + mpr_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(bsd_mpc_bo); + dri_bo_unreference(mpr_bo); +} + +static void +gen75_jpeg_wa_bsp_buf_base_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *bsd_mpc_bo, *mpr_bo; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_jpeg_wa_bsp_buf_base_addr_state_bplus(ctx, gen7_mfd_context); + return; + } + + bsd_mpc_bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + + mpr_bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + 7680, /* 1. 0 * 120 * 64 */ + 0x1000); + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2)); + + OUT_BCS_RELOC(batch, + bsd_mpc_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_RELOC(batch, + mpr_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(bsd_mpc_bo); + dri_bo_unreference(mpr_bo); +} + +static void +gen75_jpeg_wa_avc_qm_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + +} + +static void +gen75_jpeg_wa_avc_img_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int img_struct = 0; + int mbaff_frame_flag = 0; + unsigned int width_in_mbs = 1, height_in_mbs = 1; + + BEGIN_BCS_BATCH(batch, 16); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + OUT_BCS_BATCH(batch, + (width_in_mbs * height_in_mbs - 1)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + OUT_BCS_BATCH(batch, + (0 << 24) | + (0 << 16) | + (0 << 14) | + (0 << 13) | + (0 << 12) | /* differ from GEN6 */ + (0 << 10) | + (img_struct << 8)); + OUT_BCS_BATCH(batch, + (1 << 10) | /* 4:2:0 */ + (1 << 7) | /* CABAC */ + (0 << 6) | + (0 << 5) | + (0 << 4) | + (0 << 3) | + (1 << 2) | + (mbaff_frame_flag << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_avc_directmode_state_bplus(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 71); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (71 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); /* bottom */ + } + + OUT_BCS_BATCH(batch, 0); + + /* the current decoding frame/field */ + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* POC List */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_avc_directmode_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_jpeg_wa_avc_directmode_state_bplus(ctx, gen7_mfd_context); + return; + } + + BEGIN_BCS_BATCH(batch, 69); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); /* bottom */ + } + + /* the current decoding frame/field */ + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); /* bottom */ + + /* POC List */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_ind_obj_base_addr_state_bplus(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_RELOC(batch, + gen7_mfd_context->jpeg_wa_slice_data_bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_ind_obj_base_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + if (IS_STEPPING_BPLUS(i965)) { + gen75_jpeg_wa_ind_obj_base_addr_state_bplus(ctx, gen7_mfd_context); + return; + } + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_RELOC(batch, + gen7_mfd_context->jpeg_wa_slice_data_bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_avc_bsd_object(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + /* the input bitsteam format on GEN7 differs from GEN6 */ + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, gen7_jpeg_wa_clip.data_size); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 31) | + (0 << 14) | + (0 << 12) | + (0 << 10) | + (0 << 8)); + OUT_BCS_BATCH(batch, + ((gen7_jpeg_wa_clip.data_bit_offset >> 3) << 16) | + (0 << 5) | + (0 << 4) | + (1 << 3) | /* LastSlice Flag */ + (gen7_jpeg_wa_clip.data_bit_offset & 0x7)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_jpeg_wa_avc_slice_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int slice_hor_pos = 0, slice_ver_pos = 0, next_slice_hor_pos = 0, next_slice_ver_pos = 1; + int num_ref_idx_l0 = 0, num_ref_idx_l1 = 0; + int first_mb_in_slice = 0; + int slice_type = SLICE_TYPE_I; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (0 << 8) | + (0 << 0)); + OUT_BCS_BATCH(batch, + (0 << 29) | + (1 << 27) | /* disable Deblocking */ + (0 << 24) | + (gen7_jpeg_wa_clip.qp << 16) | + (0 << 8) | + (0 << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (next_slice_ver_pos << 16) | + (next_slice_hor_pos << 0)); + OUT_BCS_BATCH(batch, (1 << 19)); /* last slice flag */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen75_mfd_jpeg_wa(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + gen75_jpeg_wa_init(ctx, gen7_mfd_context); + intel_batchbuffer_emit_mi_flush(batch); + gen75_jpeg_wa_pipe_mode_select(ctx, gen7_mfd_context); + gen75_jpeg_wa_surface_state(ctx, gen7_mfd_context); + gen75_jpeg_wa_pipe_buf_addr_state(ctx, gen7_mfd_context); + gen75_jpeg_wa_bsp_buf_base_addr_state(ctx, gen7_mfd_context); + gen75_jpeg_wa_avc_qm_state(ctx, gen7_mfd_context); + gen75_jpeg_wa_avc_img_state(ctx, gen7_mfd_context); + gen75_jpeg_wa_ind_obj_base_addr_state(ctx, gen7_mfd_context); + + gen75_jpeg_wa_avc_directmode_state(ctx, gen7_mfd_context); + gen75_jpeg_wa_avc_slice_state(ctx, gen7_mfd_context); + gen75_jpeg_wa_avc_bsd_object(ctx, gen7_mfd_context); +} + +void +gen75_mfd_jpeg_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferJPEGBaseline *pic_param; + VASliceParameterBufferJPEGBaseline *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j, max_selector = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + /* Currently only support Baseline DCT */ + gen75_mfd_jpeg_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + gen75_mfd_jpeg_wa(ctx, gen7_mfd_context); + intel_batchbuffer_emit_mi_flush(batch); + gen75_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen75_mfd_surface_state(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen75_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen75_mfd_jpeg_pic_state(ctx, decode_state, gen7_mfd_context); + gen75_mfd_jpeg_qm_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen75_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_JPEG, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + int component; + + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + for (component = 0; component < slice_param->num_components; component++) { + if (max_selector < slice_param->components[component].dc_table_selector) + max_selector = slice_param->components[component].dc_table_selector; + + if (max_selector < slice_param->components[component].ac_table_selector) + max_selector = slice_param->components[component].ac_table_selector; + } + + slice_param++; + } + } + + assert(max_selector < 2); + gen75_mfd_jpeg_huff_table_state(ctx, decode_state, gen7_mfd_context, max_selector + 1); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen75_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_JPEG, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen75_mfd_jpeg_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static VAStatus +gen75_mfd_decode_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) + +{ + struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + struct decode_state *decode_state = &codec_state->decode; + VAStatus vaStatus; + + assert(gen7_mfd_context); + + vaStatus = intel_decoder_sanity_check_input(ctx, profile, decode_state); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + + gen7_mfd_context->wa_mpeg2_slice_vertical_position = -1; + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen75_mfd_mpeg2_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264StereoHigh: + case VAProfileH264MultiviewHigh: + gen75_mfd_avc_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + gen75_mfd_vc1_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileJPEGBaseline: + gen75_mfd_jpeg_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + default: + assert(0); + break; + } + + vaStatus = VA_STATUS_SUCCESS; + +out: + return vaStatus; +} + +static void +gen75_mfd_context_destroy(void *hw_context) +{ + VADriverContextP ctx; + struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + + ctx = (VADriverContextP)(gen7_mfd_context->driver_context); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->bitplane_read_buffer.bo); + gen7_mfd_context->bitplane_read_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->jpeg_wa_slice_data_bo); + + if (gen7_mfd_context->jpeg_wa_surface_id != VA_INVALID_SURFACE) { + i965_DestroySurfaces(ctx, + &gen7_mfd_context->jpeg_wa_surface_id, + 1); + gen7_mfd_context->jpeg_wa_surface_object = NULL; + } + + intel_batchbuffer_free(gen7_mfd_context->base.batch); + free(gen7_mfd_context); +} + +static void gen75_mfd_mpeg2_context_init(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen7_mfd_context->iq_matrix.mpeg2.load_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_non_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_chroma_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_chroma_non_intra_quantiser_matrix = -1; +} + +struct hw_context * +gen75_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct gen7_mfd_context *gen7_mfd_context = calloc(1, sizeof(struct gen7_mfd_context)); + int i; + + assert(gen7_mfd_context); + gen7_mfd_context->base.destroy = gen75_mfd_context_destroy; + gen7_mfd_context->base.run = gen75_mfd_decode_picture; + gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); + + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; + gen7_mfd_context->reference_surface[i].frame_store_id = -1; + gen7_mfd_context->reference_surface[i].obj_surface = NULL; + } + + gen7_mfd_context->jpeg_wa_surface_id = VA_INVALID_SURFACE; + gen7_mfd_context->jpeg_wa_surface_object = NULL; + + switch (obj_config->profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen75_mfd_mpeg2_context_init(ctx, gen7_mfd_context); + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264StereoHigh: + case VAProfileH264MultiviewHigh: + gen75_mfd_avc_context_init(ctx, gen7_mfd_context); + break; + default: + break; + } + + gen7_mfd_context->driver_context = ctx; + return (struct hw_context *)gen7_mfd_context; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen75_picture_process.c intel-vaapi-driver-1.7.1/src/gen75_picture_process.c --- intel-vaapi-driver-1.0.15/src/gen75_picture_process.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_picture_process.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,443 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Li Xiaowei + */ + +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_structs.h" + +#include "i965_drv_video.h" +#include "i965_post_processing.h" +#include "gen75_picture_process.h" + +extern struct hw_context * +i965_proc_context_init(VADriverContextP ctx, + struct object_config *obj_config); + +static VAStatus +gen75_vpp_fmt_cvt(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + struct intel_video_process_context *proc_ctx = + (struct intel_video_process_context *)hw_context; + + /* implicity surface format coversion and scaling */ + if(proc_ctx->vpp_fmt_cvt_ctx == NULL){ + proc_ctx->vpp_fmt_cvt_ctx = i965_proc_context_init(ctx, NULL); + } + + va_status = i965_proc_picture(ctx, profile, codec_state, + proc_ctx->vpp_fmt_cvt_ctx); + + return va_status; +} + +static VAStatus +gen75_vpp_vebox(VADriverContextP ctx, + struct intel_video_process_context* proc_ctx) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + VAProcPipelineParameterBuffer* pipeline_param = proc_ctx->pipeline_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + + /* vpp features based on VEBox fixed function */ + if(proc_ctx->vpp_vebox_ctx == NULL) { + proc_ctx->vpp_vebox_ctx = gen75_vebox_context_init(ctx); + } + + proc_ctx->vpp_vebox_ctx->pipeline_param = pipeline_param; + proc_ctx->vpp_vebox_ctx->surface_input_object = proc_ctx->surface_pipeline_input_object; + proc_ctx->vpp_vebox_ctx->surface_output_object = proc_ctx->surface_render_output_object; + + if (IS_HASWELL(i965->intel.device_info)) + va_status = gen75_vebox_process_picture(ctx, proc_ctx->vpp_vebox_ctx); + else if (IS_GEN8(i965->intel.device_info)) + va_status = gen8_vebox_process_picture(ctx, proc_ctx->vpp_vebox_ctx); + else if (IS_GEN9(i965->intel.device_info)) + va_status = gen9_vebox_process_picture(ctx, proc_ctx->vpp_vebox_ctx); + + return va_status; +} + +static VAStatus +gen75_vpp_gpe(VADriverContextP ctx, + struct intel_video_process_context* proc_ctx) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + + if(proc_ctx->vpp_gpe_ctx == NULL){ + proc_ctx->vpp_gpe_ctx = vpp_gpe_context_init(ctx); + } + + proc_ctx->vpp_gpe_ctx->pipeline_param = proc_ctx->pipeline_param; + proc_ctx->vpp_gpe_ctx->surface_pipeline_input_object = proc_ctx->surface_pipeline_input_object; + proc_ctx->vpp_gpe_ctx->surface_output_object = proc_ctx->surface_render_output_object; + + va_status = vpp_gpe_process_picture(ctx, proc_ctx->vpp_gpe_ctx); + + return va_status; +} + +VAStatus +gen75_proc_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct proc_state* proc_st = &(codec_state->proc); + struct intel_video_process_context *proc_ctx = + (struct intel_video_process_context *)hw_context; + VAProcPipelineParameterBuffer *pipeline_param = + (VAProcPipelineParameterBuffer *)proc_st->pipeline_param->buffer; + struct object_surface *obj_dst_surf = NULL; + struct object_surface *obj_src_surf = NULL; + + VAProcPipelineParameterBuffer pipeline_param2; + struct object_surface *stage1_dst_surf = NULL; + struct object_surface *stage2_dst_surf = NULL; + VARectangle src_rect, dst_rect; + VASurfaceID tmp_surfaces[2]; + VASurfaceID out_surface_id1 = VA_INVALID_ID, out_surface_id2 = VA_INVALID_ID; + int num_tmp_surfaces = 0; + + VAStatus status; + + proc_ctx->pipeline_param = pipeline_param; + + if (proc_st->current_render_target == VA_INVALID_SURFACE || + pipeline_param->surface == VA_INVALID_SURFACE) { + status = VA_STATUS_ERROR_INVALID_SURFACE; + goto error; + } + + obj_dst_surf = SURFACE(proc_st->current_render_target); + + if (!obj_dst_surf) { + status = VA_STATUS_ERROR_INVALID_SURFACE; + goto error; + } + + obj_src_surf = SURFACE(proc_ctx->pipeline_param->surface); + + if (!obj_src_surf) { + status = VA_STATUS_ERROR_INVALID_SURFACE; + goto error; + } + + if (!obj_src_surf->bo) { + status = VA_STATUS_ERROR_INVALID_VALUE; /* The input surface is created without valid content */ + goto error; + } + + if (pipeline_param->num_filters && !pipeline_param->filters) { + status = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + if (!obj_dst_surf->bo) { + unsigned int is_tiled = 1; + unsigned int fourcc = VA_FOURCC_NV12; + int sampling = SUBSAMPLE_YUV420; + i965_check_alloc_surface_bo(ctx, obj_dst_surf, is_tiled, fourcc, sampling); + } + + proc_ctx->surface_render_output_object = obj_dst_surf; + proc_ctx->surface_pipeline_input_object = obj_src_surf; + assert(pipeline_param->num_filters <= 4); + + int vpp_stage1 = 0, vpp_stage2 = 1, vpp_stage3 = 0; + + if (pipeline_param->surface_region) { + src_rect.x = pipeline_param->surface_region->x; + src_rect.y = pipeline_param->surface_region->y; + src_rect.width = pipeline_param->surface_region->width; + src_rect.height = pipeline_param->surface_region->height; + } else { + src_rect.x = 0; + src_rect.y = 0; + src_rect.width = obj_src_surf->orig_width; + src_rect.height = obj_src_surf->orig_height; + } + + if (pipeline_param->output_region) { + dst_rect.x = pipeline_param->output_region->x; + dst_rect.y = pipeline_param->output_region->y; + dst_rect.width = pipeline_param->output_region->width; + dst_rect.height = pipeline_param->output_region->height; + } else { + dst_rect.x = 0; + dst_rect.y = 0; + dst_rect.width = obj_dst_surf->orig_width; + dst_rect.height = obj_dst_surf->orig_height; + } + + if(obj_src_surf->fourcc == VA_FOURCC_P010) { + vpp_stage1 = 1; + vpp_stage2 = 0; + vpp_stage3 = 0; + if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL) { + if(src_rect.x != dst_rect.x || + src_rect.y != dst_rect.y || + src_rect.width != dst_rect.width || + src_rect.height != dst_rect.height) + vpp_stage2 = 1; + + if(obj_dst_surf->fourcc != VA_FOURCC_NV12 && + obj_dst_surf->fourcc != VA_FOURCC_P010) + vpp_stage2 = 1; + } + else + vpp_stage2 = 1; + + if(vpp_stage2 == 1) { + if(obj_dst_surf->fourcc == VA_FOURCC_P010) + vpp_stage3 = 1; + } + } + else if(obj_dst_surf->fourcc == VA_FOURCC_P010) { + vpp_stage2 = 1; + vpp_stage3 = 1; + + if((obj_src_surf->fourcc == VA_FOURCC_NV12) && + (pipeline_param->num_filters == 0 || pipeline_param->filters == NULL)) { + if((src_rect.x == dst_rect.x) && + (src_rect.y == dst_rect.y) && + (src_rect.width == dst_rect.width) && + (src_rect.height == dst_rect.height)) + vpp_stage2 = 0; + } + } + + if(vpp_stage1 == 1){ + memset((void *)&pipeline_param2, 0, sizeof(pipeline_param2)); + pipeline_param2.surface = pipeline_param->surface; + pipeline_param2.surface_region = &src_rect; + pipeline_param2.output_region = &src_rect; + pipeline_param2.filter_flags = 0; + pipeline_param2.num_filters = 0; + + proc_ctx->pipeline_param = &pipeline_param2; + + if(vpp_stage2 == 1) { + status = i965_CreateSurfaces(ctx, + obj_src_surf->orig_width, + obj_src_surf->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id1); + assert(status == VA_STATUS_SUCCESS); + tmp_surfaces[num_tmp_surfaces++] = out_surface_id1; + stage1_dst_surf = SURFACE(out_surface_id1); + assert(stage1_dst_surf); + i965_check_alloc_surface_bo(ctx, stage1_dst_surf, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + proc_ctx->surface_render_output_object = stage1_dst_surf; + } + + gen75_vpp_vebox(ctx, proc_ctx); + } + + if((vpp_stage3 == 1) && (vpp_stage2 == 1)) { + status = i965_CreateSurfaces(ctx, + obj_dst_surf->orig_width, + obj_dst_surf->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id2); + assert(status == VA_STATUS_SUCCESS); + tmp_surfaces[num_tmp_surfaces++] = out_surface_id2; + stage2_dst_surf = SURFACE(out_surface_id2); + assert(stage2_dst_surf); + i965_check_alloc_surface_bo(ctx, stage2_dst_surf, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + } + + VABufferID *filter_id = (VABufferID*) pipeline_param->filters; + + if(vpp_stage2 == 1) { + if(stage1_dst_surf != NULL) { + proc_ctx->surface_pipeline_input_object = stage1_dst_surf; + proc_ctx->surface_render_output_object = obj_dst_surf; + + pipeline_param->surface = out_surface_id1; + } + + if(stage2_dst_surf != NULL) { + proc_ctx->surface_render_output_object = stage2_dst_surf; + + proc_st->current_render_target = out_surface_id2; + } + + proc_ctx->pipeline_param = pipeline_param; + + if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL ){ + /* implicity surface format coversion and scaling */ + + gen75_vpp_fmt_cvt(ctx, profile, codec_state, hw_context); + }else if(pipeline_param->num_filters == 1) { + struct object_buffer * obj_buf = BUFFER((*filter_id) + 0); + + assert(obj_buf && obj_buf->buffer_store && obj_buf->buffer_store->buffer); + + if (!obj_buf || + !obj_buf->buffer_store || + !obj_buf->buffer_store->buffer) { + status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN; + goto error; + } + + VAProcFilterParameterBuffer* filter = + (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; + + if (filter->type == VAProcFilterNoiseReduction || + filter->type == VAProcFilterDeinterlacing || + filter->type == VAProcFilterSkinToneEnhancement || + filter->type == VAProcFilterColorBalance){ + gen75_vpp_vebox(ctx, proc_ctx); + }else if(filter->type == VAProcFilterSharpening){ + if (proc_ctx->surface_pipeline_input_object->fourcc != VA_FOURCC_NV12 || + proc_ctx->surface_render_output_object->fourcc != VA_FOURCC_NV12) { + status = VA_STATUS_ERROR_UNIMPLEMENTED; + goto error; + } + + gen75_vpp_gpe(ctx, proc_ctx); + } + }else if (pipeline_param->num_filters >= 2) { + unsigned int i = 0; + for (i = 0; i < pipeline_param->num_filters; i++){ + struct object_buffer * obj_buf = BUFFER(pipeline_param->filters[i]); + + if (!obj_buf || + !obj_buf->buffer_store || + !obj_buf->buffer_store->buffer) { + status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN; + goto error; + } + + VAProcFilterParameterBuffer* filter = + (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; + + if (filter->type != VAProcFilterNoiseReduction && + filter->type != VAProcFilterDeinterlacing && + filter->type != VAProcFilterSkinToneEnhancement && + filter->type != VAProcFilterColorBalance) { + fprintf(stderr, "Do not support multiply filters outside vebox pipeline \n"); + assert(0); + } + } + gen75_vpp_vebox(ctx, proc_ctx); + } + } + + if(vpp_stage3 == 1) + { + if(vpp_stage2 == 1) { + memset(&pipeline_param2, 0, sizeof(pipeline_param2)); + pipeline_param2.surface = out_surface_id2; + pipeline_param2.surface_region = &dst_rect; + pipeline_param2.output_region = &dst_rect; + pipeline_param2.filter_flags = 0; + pipeline_param2.num_filters = 0; + + proc_ctx->pipeline_param = &pipeline_param2; + proc_ctx->surface_pipeline_input_object = proc_ctx->surface_render_output_object; + proc_ctx->surface_render_output_object = obj_dst_surf; + } + + gen75_vpp_vebox(ctx, proc_ctx); + } + + if (num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surfaces, + num_tmp_surfaces); + + return VA_STATUS_SUCCESS; + +error: + if (num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surfaces, + num_tmp_surfaces); + + return status; +} + +static void +gen75_proc_context_destroy(void *hw_context) +{ + struct intel_video_process_context *proc_ctx = + (struct intel_video_process_context *)hw_context; + VADriverContextP ctx = (VADriverContextP)(proc_ctx->driver_context); + + if(proc_ctx->vpp_fmt_cvt_ctx){ + proc_ctx->vpp_fmt_cvt_ctx->destroy(proc_ctx->vpp_fmt_cvt_ctx); + proc_ctx->vpp_fmt_cvt_ctx = NULL; + } + + if(proc_ctx->vpp_vebox_ctx){ + gen75_vebox_context_destroy(ctx,proc_ctx->vpp_vebox_ctx); + proc_ctx->vpp_vebox_ctx = NULL; + } + + if(proc_ctx->vpp_gpe_ctx){ + vpp_gpe_context_destroy(ctx,proc_ctx->vpp_gpe_ctx); + proc_ctx->vpp_gpe_ctx = NULL; + } + + free(proc_ctx); +} + +struct hw_context * +gen75_proc_context_init(VADriverContextP ctx, + struct object_config *obj_config) +{ + struct intel_video_process_context *proc_context + = calloc(1, sizeof(struct intel_video_process_context)); + + assert(proc_context); + proc_context->base.destroy = gen75_proc_context_destroy; + proc_context->base.run = gen75_proc_picture; + + proc_context->vpp_vebox_ctx = NULL; + proc_context->vpp_gpe_ctx = NULL; + proc_context->vpp_fmt_cvt_ctx = NULL; + + proc_context->driver_context = ctx; + + return (struct hw_context *)proc_context; +} + diff -Nru intel-vaapi-driver-1.0.15/src/gen75_picture_process.h intel-vaapi-driver-1.7.1/src/gen75_picture_process.h --- intel-vaapi-driver-1.0.15/src/gen75_picture_process.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_picture_process.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,55 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Li Xiaowei + * + */ +#ifndef _GEN75_PICTURE_PROCESS_H +#define _GEN75_PICTURE_PROCESS_H + +#include +#include "i965_drv_video.h" +#include "gen75_vpp_vebox.h" +#include "gen75_vpp_gpe.h" + +struct intel_video_process_context +{ + struct hw_context base; + void* driver_context; + + struct intel_vebox_context *vpp_vebox_ctx; + struct hw_context *vpp_fmt_cvt_ctx; + struct vpp_gpe_context *vpp_gpe_ctx; + + VAProcPipelineParameterBuffer* pipeline_param; + + struct object_surface *surface_render_output_object; + struct object_surface *surface_pipeline_input_object; +}; + +struct hw_context * +gen75_proc_context_init(VADriverContextP ctx, struct object_config *obj_config); + +#endif + diff -Nru intel-vaapi-driver-1.0.15/src/gen75_vme.c intel-vaapi-driver-1.7.1/src/gen75_vme.c --- intel-vaapi-driver-1.0.15/src/gen75_vme.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_vme.c 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,1073 @@ +/* + * Copyright © 2010-2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + * + */ + +#include "sysdeps.h" + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "gen6_vme.h" +#include "gen6_mfc.h" + +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define VME_INTRA_SHADER 0 +#define VME_INTER_SHADER 1 +#define VME_BINTER_SHADER 3 +#define VME_BATCHBUFFER 2 + +#define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */ +#define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */ +#define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */ + +#define VME_MSG_LENGTH 32 + +static const uint32_t gen75_vme_intra_frame[][4] = { +#include "shaders/vme/intra_frame_haswell.g75b" +}; + +static const uint32_t gen75_vme_inter_frame[][4] = { +#include "shaders/vme/inter_frame_haswell.g75b" +}; + +static const uint32_t gen75_vme_inter_bframe[][4] = { +#include "shaders/vme/inter_bframe_haswell.g75b" +}; + +static const uint32_t gen75_vme_batchbuffer[][4] = { +#include "shaders/vme/batchbuffer.g75b" +}; + +static struct i965_kernel gen75_vme_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen75_vme_intra_frame, + sizeof(gen75_vme_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen75_vme_inter_frame, + sizeof(gen75_vme_inter_frame), + NULL + }, + { + "VME BATCHBUFFER", + VME_BATCHBUFFER, + gen75_vme_batchbuffer, + sizeof(gen75_vme_batchbuffer), + NULL + }, + { + "VME inter BFrame", + VME_BINTER_SHADER, + gen75_vme_inter_bframe, + sizeof(gen75_vme_inter_bframe), + NULL + } +}; + +static const uint32_t gen75_vme_mpeg2_intra_frame[][4] = { +#include "shaders/vme/intra_frame_haswell.g75b" +}; + +static const uint32_t gen75_vme_mpeg2_inter_frame[][4] = { +#include "shaders/vme/mpeg2_inter_haswell.g75b" +}; + +static const uint32_t gen75_vme_mpeg2_batchbuffer[][4] = { +#include "shaders/vme/batchbuffer.g75b" +}; + +static struct i965_kernel gen75_vme_mpeg2_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen75_vme_mpeg2_intra_frame, + sizeof(gen75_vme_mpeg2_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen75_vme_mpeg2_inter_frame, + sizeof(gen75_vme_mpeg2_inter_frame), + NULL + }, + { + "VME BATCHBUFFER", + VME_BATCHBUFFER, + gen75_vme_mpeg2_batchbuffer, + sizeof(gen75_vme_mpeg2_batchbuffer), + NULL + }, +}; + +/* only used for VME source surface state */ +static void +gen75_vme_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_surface2_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen75_vme_media_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_media_rw_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen75_vme_media_chroma_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_media_chroma_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen75_vme_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2; + else + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24; + /* + * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref + * + 16 FBR Info + 128 FBR MV + 32 FBR Ref. + * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24. + */ + + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen75_vme_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_batchbuffer, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static VAStatus +gen75_vme_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int slice_type; + + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI); + + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen75_vme_source_surface_state); + + if (slice_type == SLICE_TYPE_B) + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen75_vme_source_surface_state); + } + + /* VME output */ + gen75_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context); + gen75_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen75_vme_interface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_interface_descriptor_data *desc; + int i; + dri_bo *bo; + + bo = vme_context->gpe_context.idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < vme_context->vme_kernel_sum; i++) { + struct i965_kernel *kernel; + kernel = &vme_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 0; /* FIXME: */ + desc->desc2.sampler_state_pointer = 0; + desc->desc3.binding_table_entry_count = 1; /* FIXME: */ + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH; + + /*kernel start*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + desc++; + } + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen75_vme_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned char *constant_buffer; + unsigned int *vme_state_message; + int mv_num = 32; + + vme_state_message = (unsigned int *)vme_context->vme_state_message; + + if (encoder_context->codec == CODEC_H264 || + encoder_context->codec == CODEC_H264_MVC) { + if (vme_context->h264_level >= 30) { + mv_num = 16; + + if (vme_context->h264_level >= 31) + mv_num = 8; + } + } else if (encoder_context->codec == CODEC_MPEG2) { + mv_num = 2; + } + + vme_state_message[31] = mv_num; + + dri_bo_map(vme_context->gpe_context.curbe.bo, 1); + assert(vme_context->gpe_context.curbe.bo->virtual); + constant_buffer = vme_context->gpe_context.curbe.bo->virtual; + + /* VME MV/Mb cost table is passed by using const buffer */ + /* Now it uses the fixed search path. So it is constructed directly + * in the GPU shader. + */ + memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128); + + dri_bo_unmap(vme_context->gpe_context.curbe.bo); + + return VA_STATUS_SUCCESS; +} + +static const unsigned int intra_mb_mode_cost_table[] = { + 0x31110001, // for qp0 + 0x09110001, // for qp1 + 0x15030001, // for qp2 + 0x0b030001, // for qp3 + 0x0d030011, // for qp4 + 0x17210011, // for qp5 + 0x41210011, // for qp6 + 0x19210011, // for qp7 + 0x25050003, // for qp8 + 0x1b130003, // for qp9 + 0x1d130003, // for qp10 + 0x27070021, // for qp11 + 0x51310021, // for qp12 + 0x29090021, // for qp13 + 0x35150005, // for qp14 + 0x2b0b0013, // for qp15 + 0x2d0d0013, // for qp16 + 0x37170007, // for qp17 + 0x61410031, // for qp18 + 0x39190009, // for qp19 + 0x45250015, // for qp20 + 0x3b1b000b, // for qp21 + 0x3d1d000d, // for qp22 + 0x47270017, // for qp23 + 0x71510041, // for qp24 ! center for qp=0..30 + 0x49290019, // for qp25 + 0x55350025, // for qp26 + 0x4b2b001b, // for qp27 + 0x4d2d001d, // for qp28 + 0x57370027, // for qp29 + 0x81610051, // for qp30 + 0x57270017, // for qp31 + 0x81510041, // for qp32 ! center for qp=31..51 + 0x59290019, // for qp33 + 0x65350025, // for qp34 + 0x5b2b001b, // for qp35 + 0x5d2d001d, // for qp36 + 0x67370027, // for qp37 + 0x91610051, // for qp38 + 0x69390029, // for qp39 + 0x75450035, // for qp40 + 0x6b3b002b, // for qp41 + 0x6d3d002d, // for qp42 + 0x77470037, // for qp43 + 0xa1710061, // for qp44 + 0x79490039, // for qp45 + 0x85550045, // for qp46 + 0x7b4b003b, // for qp47 + 0x7d4d003d, // for qp48 + 0x87570047, // for qp49 + 0xb1810071, // for qp50 + 0x89590049 // for qp51 +}; + +static void gen75_vme_state_setup_fixup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + unsigned int *vme_state_message) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + + if (slice_param->slice_type != SLICE_TYPE_I && + slice_param->slice_type != SLICE_TYPE_SI) + return; + if (encoder_context->rate_control_mode == VA_RC_CQP) + vme_state_message[0] = intra_mb_mode_cost_table[pic_param->pic_init_qp + slice_param->slice_qp_delta]; + else + vme_state_message[0] = intra_mb_mode_cost_table[mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY]; +} + +static VAStatus gen75_vme_vme_state_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned int *vme_state_message; + int i; + + //pass the MV/Mb cost into VME message on HASWell + assert(vme_context->vme_state_message); + vme_state_message = (unsigned int *)vme_context->vme_state_message; + + vme_state_message[0] = 0x4a4a4a4a; + vme_state_message[1] = 0x4a4a4a4a; + vme_state_message[2] = 0x4a4a4a4a; + vme_state_message[3] = 0x22120200; + vme_state_message[4] = 0x62524232; + + for (i=5; i < 8; i++) { + vme_state_message[i] = 0; + } + + switch (encoder_context->codec) { + case CODEC_H264: + case CODEC_H264_MVC: + gen75_vme_state_setup_fixup(ctx, encode_state, encoder_context, vme_state_message); + + break; + + default: + /* no fixup */ + break; + } + + return VA_STATUS_SUCCESS; +} + +static void +gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s; + unsigned int *command_ptr; + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + int slice_mb_begin = pSliceParameter->macroblock_address; + int slice_mb_number = pSliceParameter->num_macroblocks; + unsigned int mb_intra_ub; + int slice_mb_x = pSliceParameter->macroblock_address % mb_width; + for (i = 0; i < slice_mb_number; ) { + int mb_count = i + slice_mb_begin; + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + if (i < mb_width) { + if (i == 0) + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE); + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK); + if ((i == (mb_width - 1)) && slice_mb_x) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + } + + if ((i == mb_width) && slice_mb_x) { + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D); + } + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + i += 1; + } + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void gen75_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + i965_gpe_context_init(ctx, &vme_context->gpe_context); + + /* VME output buffer */ + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + /* VME state */ + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; +} + +static void gen75_vme_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + int kernel_shader; + bool allow_hwscore = true; + int s; + unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY); + + if (is_low_quality) + allow_hwscore = false; + else { + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + if ((pSliceParameter->macroblock_address % width_in_mbs)) { + allow_hwscore = false; + break; + } + } + } + + if ((pSliceParameter->slice_type == SLICE_TYPE_I) || + (pSliceParameter->slice_type == SLICE_TYPE_SI)) { + kernel_shader = VME_INTRA_SHADER; + } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) || + (pSliceParameter->slice_type == SLICE_TYPE_SP)) { + kernel_shader = VME_INTER_SHADER; + } else { + kernel_shader = VME_BINTER_SHADER; + if (!allow_hwscore) + kernel_shader = VME_INTER_SHADER; + } + if (allow_hwscore) + gen7_vme_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + else + gen75_vme_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen75_vme_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if (!vme_context->h264_level || + (vme_context->h264_level != pSequenceParameter->level_idc)) { + vme_context->h264_level = pSequenceParameter->level_idc; + } + + intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context); + + /*Setup all the memory object*/ + gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen75_vme_interface_setup(ctx, encode_state, encoder_context); + //gen75_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context); + gen75_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen75_vme_pipeline_programing(ctx, encode_state, encoder_context); + + return vaStatus; +} + +static VAStatus gen75_vme_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen75_vme_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_vme_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen75_vme_media_init(ctx, encoder_context); + gen75_vme_prepare(ctx, encode_state, encoder_context); + gen75_vme_run(ctx, encode_state, encoder_context); + gen75_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen75_vme_mpeg2_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + int is_intra, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2; + else + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24; + /* + * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref + * + 16 FBR Info + 128 FBR MV + 32 FBR Ref. + * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24. + */ + + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen75_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_batchbuffer, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static VAStatus +gen75_vme_mpeg2_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen75_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen75_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen75_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + /* reference 0 */ + obj_surface = encode_state->reference_objects[0]; + if (obj_surface->bo != NULL) + gen75_vme_source_surface_state(ctx, 1, obj_surface, encoder_context); + + /* reference 1 */ + obj_surface = encode_state->reference_objects[1]; + if (obj_surface && obj_surface->bo != NULL) + gen75_vme_source_surface_state(ctx, 2, obj_surface, encoder_context); + } + + /* VME output */ + gen75_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context); + gen75_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen75_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s, j; + unsigned int *command_ptr; + + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + int slice_mb_begin = slice_param->macroblock_address; + int slice_mb_number = slice_param->num_macroblocks; + unsigned int mb_intra_ub; + int slice_mb_x = slice_param->macroblock_address % mb_width; + + for (i = 0; i < slice_mb_number;) { + int mb_count = i + slice_mb_begin; + + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + + if (i < mb_width) { + if (i == 0) + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE); + + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK); + + if ((i == (mb_width - 1)) && slice_mb_x) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + } + + if ((i == mb_width) && slice_mb_x) { + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D); + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + i += 1; + } + + slice_param++; + } + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void +gen75_vme_mpeg2_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncPictureParameterBufferMPEG2 *pic_param = NULL; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + bool allow_hwscore = true; + int s; + int kernel_shader; + + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + int j; + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + if (slice_param->macroblock_address % width_in_mbs) { + allow_hwscore = false; + break; + } + } + } + + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + if (pic_param->picture_type == VAEncPictureTypeIntra) { + allow_hwscore = false; + kernel_shader = VME_INTRA_SHADER; + } else { + kernel_shader = VME_INTER_SHADER; + } + + if (allow_hwscore) + gen7_vme_mpeg2_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + encoder_context); + else + gen75_vme_mpeg2_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + 0, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus +gen75_vme_mpeg2_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if ((!vme_context->mpeg2_level) || + (vme_context->mpeg2_level != (seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK))) { + vme_context->mpeg2_level = seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK; + } + + /*Setup all the memory object*/ + gen75_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + gen75_vme_interface_setup(ctx, encode_state, encoder_context); + gen75_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + intel_vme_mpeg2_state_setup(ctx, encode_state, encoder_context); + gen75_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen75_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + + return vaStatus; +} + +static VAStatus +gen75_vme_mpeg2_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen75_vme_media_init(ctx, encoder_context); + gen75_vme_mpeg2_prepare(ctx, encode_state, encoder_context); + gen75_vme_run(ctx, encode_state, encoder_context); + gen75_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen75_vme_context_destroy(void *context) +{ + struct gen6_vme_context *vme_context = context; + + i965_gpe_context_destroy(&vme_context->gpe_context); + + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + if (vme_context->vme_state_message) { + free(vme_context->vme_state_message); + vme_context->vme_state_message = NULL; + } + + free(vme_context); +} + +Bool gen75_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context)); + struct i965_kernel *vme_kernel_list = NULL; + int i965_kernel_num; + + switch (encoder_context->codec) { + case CODEC_H264: + case CODEC_H264_MVC: + vme_kernel_list = gen75_vme_kernels; + encoder_context->vme_pipeline = gen75_vme_pipeline; + i965_kernel_num = sizeof(gen75_vme_kernels) / sizeof(struct i965_kernel); + break; + + case CODEC_MPEG2: + vme_kernel_list = gen75_vme_mpeg2_kernels; + encoder_context->vme_pipeline = gen75_vme_mpeg2_pipeline; + i965_kernel_num = sizeof(gen75_vme_mpeg2_kernels) / sizeof(struct i965_kernel); + + break; + + default: + /* never get here */ + assert(0); + + break; + } + + assert(vme_context); + vme_context->vme_kernel_sum = i965_kernel_num; + vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6; + vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + + vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH; + + vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + vme_context->gpe_context.vfe_state.num_urb_entries = 64; + vme_context->gpe_context.vfe_state.gpgpu_mode = 0; + vme_context->gpe_context.vfe_state.urb_entry_size = 16; + vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; + + gen7_vme_scoreboard_init(ctx, vme_context); + + i965_gpe_load_kernels(ctx, + &vme_context->gpe_context, + vme_kernel_list, + i965_kernel_num); + vme_context->vme_surface2_setup = gen7_gpe_surface2_setup; + vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup; + vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup; + vme_context->vme_media_chroma_surface_setup = gen75_gpe_media_chroma_surface_setup; + + encoder_context->vme_context = vme_context; + encoder_context->vme_context_destroy = gen75_vme_context_destroy; + + vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int)); + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen75_vpp_gpe.c intel-vaapi-driver-1.7.1/src/gen75_vpp_gpe.c --- intel-vaapi-driver-1.0.15/src/gen75_vpp_gpe.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_vpp_gpe.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,892 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Li Xiaowei + */ + +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_structs.h" +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "gen75_vpp_gpe.h" + +#define MAX_INTERFACE_DESC_GEN6 MAX_GPE_KERNELS +#define MAX_MEDIA_SURFACES_GEN6 34 + +#define SURFACE_STATE_OFFSET_GEN7(index) (SURFACE_STATE_PADDED_SIZE_GEN7 * (index)) +#define BINDING_TABLE_OFFSET_GEN7(index) (SURFACE_STATE_OFFSET_GEN7(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * (index)) + +#define SURFACE_STATE_OFFSET_GEN8(index) (SURFACE_STATE_PADDED_SIZE_GEN8 * (index)) +#define BINDING_TABLE_OFFSET_GEN8(index) (SURFACE_STATE_OFFSET_GEN8(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * (index)) + +#define CURBE_ALLOCATION_SIZE 37 +#define CURBE_TOTAL_DATA_LENGTH (4 * 32) +#define CURBE_URB_ENTRY_LENGTH 4 + +/* Shaders information for sharpening */ +static const unsigned int gen75_gpe_sharpening_h_blur[][4] = { + #include "shaders/post_processing/gen75/sharpening_h_blur.g75b" +}; +static const unsigned int gen75_gpe_sharpening_v_blur[][4] = { + #include "shaders/post_processing/gen75/sharpening_v_blur.g75b" +}; +static const unsigned int gen75_gpe_sharpening_unmask[][4] = { + #include "shaders/post_processing/gen75/sharpening_unmask.g75b" +}; +static struct i965_kernel gen75_vpp_sharpening_kernels[] = { + { + "vpp: sharpening(horizontal blur)", + VPP_GPE_SHARPENING, + gen75_gpe_sharpening_h_blur, + sizeof(gen75_gpe_sharpening_h_blur), + NULL + }, + { + "vpp: sharpening(vertical blur)", + VPP_GPE_SHARPENING, + gen75_gpe_sharpening_v_blur, + sizeof(gen75_gpe_sharpening_v_blur), + NULL + }, + { + "vpp: sharpening(unmask)", + VPP_GPE_SHARPENING, + gen75_gpe_sharpening_unmask, + sizeof(gen75_gpe_sharpening_unmask), + NULL + }, +}; + +/* sharpening kernels for Broadwell */ +static const unsigned int gen8_gpe_sharpening_h_blur[][4] = { + #include "shaders/post_processing/gen8/sharpening_h_blur.g8b" +}; +static const unsigned int gen8_gpe_sharpening_v_blur[][4] = { + #include "shaders/post_processing/gen8/sharpening_v_blur.g8b" +}; +static const unsigned int gen8_gpe_sharpening_unmask[][4] = { + #include "shaders/post_processing/gen8/sharpening_unmask.g8b" +}; + +static struct i965_kernel gen8_vpp_sharpening_kernels[] = { + { + "vpp: sharpening(horizontal blur)", + VPP_GPE_SHARPENING, + gen8_gpe_sharpening_h_blur, + sizeof(gen8_gpe_sharpening_h_blur), + NULL + }, + { + "vpp: sharpening(vertical blur)", + VPP_GPE_SHARPENING, + gen8_gpe_sharpening_v_blur, + sizeof(gen8_gpe_sharpening_v_blur), + NULL + }, + { + "vpp: sharpening(unmask)", + VPP_GPE_SHARPENING, + gen8_gpe_sharpening_unmask, + sizeof(gen8_gpe_sharpening_unmask), + NULL + }, +}; + +static VAStatus +gen75_gpe_process_surfaces_setup(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + struct object_surface *obj_surface; + unsigned int i = 0; + unsigned char input_surface_sum = (1 + vpp_gpe_ctx->forward_surf_sum + + vpp_gpe_ctx->backward_surf_sum) * 2; + + /* Binding input NV12 surfaces (Luma + Chroma)*/ + for( i = 0; i < input_surface_sum; i += 2){ + obj_surface = vpp_gpe_ctx->surface_input_object[i/2]; + assert(obj_surface); + gen7_gpe_media_rw_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN7(i), + SURFACE_STATE_OFFSET_GEN7(i)); + + gen75_gpe_media_chroma_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN7(i + 1), + SURFACE_STATE_OFFSET_GEN7(i + 1)); + } + + /* Binding output NV12 surface(Luma + Chroma) */ + obj_surface = vpp_gpe_ctx->surface_output_object; + assert(obj_surface); + gen7_gpe_media_rw_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN7(input_surface_sum), + SURFACE_STATE_OFFSET_GEN7(input_surface_sum)); + gen75_gpe_media_chroma_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN7(input_surface_sum + 1), + SURFACE_STATE_OFFSET_GEN7(input_surface_sum + 1)); + /* Bind kernel return buffer surface */ + gen7_gpe_buffer_suface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + &vpp_gpe_ctx->vpp_kernel_return, + BINDING_TABLE_OFFSET_GEN7((input_surface_sum + 2)), + SURFACE_STATE_OFFSET_GEN7(input_surface_sum + 2)); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_gpe_process_interface_setup(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + struct gen6_interface_descriptor_data *desc; + dri_bo *bo = vpp_gpe_ctx->gpe_ctx.idrt.bo; + int i; + + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + /*Setup the descritor table*/ + for(i = 0; i < vpp_gpe_ctx->sub_shader_sum; i++){ + struct i965_kernel *kernel = &vpp_gpe_ctx->gpe_ctx.kernels[i]; + assert(sizeof(*desc) == 32); + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 0; /* FIXME: */ + desc->desc2.sampler_state_pointer = 0; + desc->desc3.binding_table_entry_count = 6; /* FIXME: */ + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET_GEN7(0) >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = 0; + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i* sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + desc++; + } + + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_gpe_process_parameters_fill(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + unsigned int *command_ptr; + unsigned int i, size = vpp_gpe_ctx->thread_param_size; + unsigned char* position = NULL; + + /* Thread inline data setting*/ + dri_bo_map(vpp_gpe_ctx->vpp_batchbuffer.bo, 1); + command_ptr = vpp_gpe_ctx->vpp_batchbuffer.bo->virtual; + + for(i = 0; i < vpp_gpe_ctx->thread_num; i ++) + { + *command_ptr++ = (CMD_MEDIA_OBJECT | (size/sizeof(int) + 6 - 2)); + *command_ptr++ = vpp_gpe_ctx->sub_shader_index; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /* copy thread inline data */ + position =(unsigned char*)(vpp_gpe_ctx->thread_param + size * i); + memcpy(command_ptr, position, size); + command_ptr += size/sizeof(int); + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vpp_gpe_ctx->vpp_batchbuffer.bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_gpe_process_pipeline_setup(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + intel_batchbuffer_start_atomic(vpp_gpe_ctx->batch, 0x1000); + intel_batchbuffer_emit_mi_flush(vpp_gpe_ctx->batch); + + gen6_gpe_pipeline_setup(ctx, &vpp_gpe_ctx->gpe_ctx, vpp_gpe_ctx->batch); + + gen75_gpe_process_parameters_fill(ctx, vpp_gpe_ctx); + + BEGIN_BATCH(vpp_gpe_ctx->batch, 2); + OUT_BATCH(vpp_gpe_ctx->batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_RELOC(vpp_gpe_ctx->batch, + vpp_gpe_ctx->vpp_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(vpp_gpe_ctx->batch); + + intel_batchbuffer_end_atomic(vpp_gpe_ctx->batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_gpe_process_init(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + + unsigned int batch_buf_size = vpp_gpe_ctx->thread_num * + (vpp_gpe_ctx->thread_param_size + 6 * sizeof(int)) + 16; + + vpp_gpe_ctx->vpp_kernel_return.num_blocks = vpp_gpe_ctx->thread_num; + vpp_gpe_ctx->vpp_kernel_return.size_block = 16; + vpp_gpe_ctx->vpp_kernel_return.pitch = 1; + unsigned int kernel_return_size = vpp_gpe_ctx->vpp_kernel_return.num_blocks + * vpp_gpe_ctx->vpp_kernel_return.size_block; + + dri_bo_unreference(vpp_gpe_ctx->vpp_batchbuffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vpp batch buffer", + batch_buf_size, 0x1000); + vpp_gpe_ctx->vpp_batchbuffer.bo = bo; + + dri_bo_unreference(vpp_gpe_ctx->vpp_kernel_return.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vpp kernel return buffer", + kernel_return_size, 0x1000); + vpp_gpe_ctx->vpp_kernel_return.bo = bo; + + vpp_gpe_ctx->gpe_context_init(ctx, &vpp_gpe_ctx->gpe_ctx); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_gpe_process_prepare(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + /*Setup all the memory object*/ + gen75_gpe_process_surfaces_setup(ctx, vpp_gpe_ctx); + gen75_gpe_process_interface_setup(ctx, vpp_gpe_ctx); + //gen75_gpe_process_constant_setup(ctx, vpp_gpe_ctx); + + /*Programing media pipeline*/ + gen75_gpe_process_pipeline_setup(ctx, vpp_gpe_ctx); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_gpe_process_run(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + intel_batchbuffer_flush(vpp_gpe_ctx->batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_gpe_process(VADriverContextP ctx, + struct vpp_gpe_context * vpp_gpe_ctx) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + + va_status = gen75_gpe_process_init(ctx, vpp_gpe_ctx); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = gen75_gpe_process_prepare(ctx, vpp_gpe_ctx); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = gen75_gpe_process_run(ctx, vpp_gpe_ctx); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process_surfaces_setup(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + struct object_surface *obj_surface; + unsigned int i = 0; + unsigned char input_surface_sum = (1 + vpp_gpe_ctx->forward_surf_sum + + vpp_gpe_ctx->backward_surf_sum) * 2; + + /* Binding input NV12 surfaces (Luma + Chroma)*/ + for( i = 0; i < input_surface_sum; i += 2){ + obj_surface = vpp_gpe_ctx->surface_input_object[i/2]; + assert(obj_surface); + gen8_gpe_media_rw_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN8(i), + SURFACE_STATE_OFFSET_GEN8(i)); + + gen8_gpe_media_chroma_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN8(i + 1), + SURFACE_STATE_OFFSET_GEN8(i + 1)); + } + + /* Binding output NV12 surface(Luma + Chroma) */ + obj_surface = vpp_gpe_ctx->surface_output_object; + assert(obj_surface); + gen8_gpe_media_rw_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN8(input_surface_sum), + SURFACE_STATE_OFFSET_GEN8(input_surface_sum)); + gen8_gpe_media_chroma_surface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + obj_surface, + BINDING_TABLE_OFFSET_GEN8(input_surface_sum + 1), + SURFACE_STATE_OFFSET_GEN8(input_surface_sum + 1)); + /* Bind kernel return buffer surface */ + gen7_gpe_buffer_suface_setup(ctx, + &vpp_gpe_ctx->gpe_ctx, + &vpp_gpe_ctx->vpp_kernel_return, + BINDING_TABLE_OFFSET_GEN8((input_surface_sum + 2)), + SURFACE_STATE_OFFSET_GEN8(input_surface_sum + 2)); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process_interface_setup(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + struct gen8_interface_descriptor_data *desc; + dri_bo *bo = vpp_gpe_ctx->gpe_ctx.dynamic_state.bo; + int i; + + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = (struct gen8_interface_descriptor_data *)(bo->virtual + + vpp_gpe_ctx->gpe_ctx.idrt_offset); + + /*Setup the descritor table*/ + for (i = 0; i < vpp_gpe_ctx->sub_shader_sum; i++){ + struct i965_kernel *kernel; + kernel = &vpp_gpe_ctx->gpe_ctx.kernels[i]; + assert(sizeof(*desc) == 32); + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6; + desc->desc3.sampler_count = 0; /* FIXME: */ + desc->desc3.sampler_state_pointer = 0; + desc->desc4.binding_table_entry_count = 6; /* FIXME: */ + desc->desc4.binding_table_pointer = (BINDING_TABLE_OFFSET_GEN8(0) >> 5); + desc->desc5.constant_urb_entry_read_offset = 0; + desc->desc5.constant_urb_entry_read_length = 0; + + desc++; + } + + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process_parameters_fill(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + unsigned int *command_ptr; + unsigned int i, size = vpp_gpe_ctx->thread_param_size; + unsigned char* position = NULL; + + /* Thread inline data setting*/ + dri_bo_map(vpp_gpe_ctx->vpp_batchbuffer.bo, 1); + command_ptr = vpp_gpe_ctx->vpp_batchbuffer.bo->virtual; + + for(i = 0; i < vpp_gpe_ctx->thread_num; i ++) + { + *command_ptr++ = (CMD_MEDIA_OBJECT | (size/sizeof(int) + 6 - 2)); + *command_ptr++ = vpp_gpe_ctx->sub_shader_index; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /* copy thread inline data */ + position =(unsigned char*)(vpp_gpe_ctx->thread_param + size * i); + memcpy(command_ptr, position, size); + command_ptr += size/sizeof(int); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vpp_gpe_ctx->vpp_batchbuffer.bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process_pipeline_setup(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + intel_batchbuffer_start_atomic(vpp_gpe_ctx->batch, 0x1000); + intel_batchbuffer_emit_mi_flush(vpp_gpe_ctx->batch); + + gen8_gpe_pipeline_setup(ctx, &vpp_gpe_ctx->gpe_ctx, vpp_gpe_ctx->batch); + + gen8_gpe_process_parameters_fill(ctx, vpp_gpe_ctx); + + BEGIN_BATCH(vpp_gpe_ctx->batch, 3); + OUT_BATCH(vpp_gpe_ctx->batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(vpp_gpe_ctx->batch, + vpp_gpe_ctx->vpp_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(vpp_gpe_ctx->batch, 0); + + ADVANCE_BATCH(vpp_gpe_ctx->batch); + + intel_batchbuffer_end_atomic(vpp_gpe_ctx->batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process_init(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + + unsigned int batch_buf_size = vpp_gpe_ctx->thread_num * + (vpp_gpe_ctx->thread_param_size + 6 * sizeof(int)) + 16; + + vpp_gpe_ctx->vpp_kernel_return.num_blocks = vpp_gpe_ctx->thread_num; + vpp_gpe_ctx->vpp_kernel_return.size_block = 16; + vpp_gpe_ctx->vpp_kernel_return.pitch = 1; + + unsigned int kernel_return_size = vpp_gpe_ctx->vpp_kernel_return.num_blocks + * vpp_gpe_ctx->vpp_kernel_return.size_block; + + dri_bo_unreference(vpp_gpe_ctx->vpp_batchbuffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vpp batch buffer", + batch_buf_size, 0x1000); + vpp_gpe_ctx->vpp_batchbuffer.bo = bo; + + dri_bo_unreference(vpp_gpe_ctx->vpp_kernel_return.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vpp kernel return buffer", + kernel_return_size, 0x1000); + vpp_gpe_ctx->vpp_kernel_return.bo = bo; + + vpp_gpe_ctx->gpe_context_init(ctx, &vpp_gpe_ctx->gpe_ctx); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process_prepare(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + /*Setup all the memory object*/ + gen8_gpe_process_surfaces_setup(ctx, vpp_gpe_ctx); + gen8_gpe_process_interface_setup(ctx, vpp_gpe_ctx); + //gen8_gpe_process_constant_setup(ctx, vpp_gpe_ctx); + + /*Programing media pipeline*/ + gen8_gpe_process_pipeline_setup(ctx, vpp_gpe_ctx); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process_run(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + intel_batchbuffer_flush(vpp_gpe_ctx->batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_gpe_process(VADriverContextP ctx, + struct vpp_gpe_context * vpp_gpe_ctx) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + + va_status = gen8_gpe_process_init(ctx, vpp_gpe_ctx); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = gen8_gpe_process_prepare(ctx, vpp_gpe_ctx); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = gen8_gpe_process_run(ctx, vpp_gpe_ctx); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +vpp_gpe_process(VADriverContextP ctx, + struct vpp_gpe_context * vpp_gpe_ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + if (IS_HASWELL(i965->intel.device_info)) + return gen75_gpe_process(ctx, vpp_gpe_ctx); + else if (IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) + return gen8_gpe_process(ctx, vpp_gpe_ctx); + + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +static VAStatus +vpp_gpe_process_sharpening(VADriverContextP ctx, + struct vpp_gpe_context * vpp_gpe_ctx) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *origin_in_obj_surface = vpp_gpe_ctx->surface_input_object[0]; + struct object_surface *origin_out_obj_surface = vpp_gpe_ctx->surface_output_object; + + VAProcPipelineParameterBuffer* pipe = vpp_gpe_ctx->pipeline_param; + VABufferID *filter_ids = (VABufferID*)pipe->filters ; + struct object_buffer *obj_buf = BUFFER((*(filter_ids + 0))); + + assert(obj_buf && obj_buf->buffer_store && obj_buf->buffer_store->buffer); + + if (!obj_buf || + !obj_buf->buffer_store || + !obj_buf->buffer_store->buffer) + goto error; + + VAProcFilterParameterBuffer* filter = + (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; + float sharpening_intensity = filter->value; + + ThreadParameterSharpening thr_param; + unsigned int thr_param_size = sizeof(ThreadParameterSharpening); + unsigned int i; + unsigned char * pos; + + if(vpp_gpe_ctx->is_first_frame){ + vpp_gpe_ctx->sub_shader_sum = 3; + struct i965_kernel * vpp_kernels; + if (IS_HASWELL(i965->intel.device_info)) + vpp_kernels = gen75_vpp_sharpening_kernels; + else if (IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) // TODO: build the sharpening kernel for GEN9 + vpp_kernels = gen8_vpp_sharpening_kernels; + else + return VA_STATUS_ERROR_UNIMPLEMENTED; + + vpp_gpe_ctx->gpe_load_kernels(ctx, + &vpp_gpe_ctx->gpe_ctx, + vpp_kernels, + vpp_gpe_ctx->sub_shader_sum); + } + + if(vpp_gpe_ctx->surface_tmp == VA_INVALID_ID){ + va_status = i965_CreateSurfaces(ctx, + vpp_gpe_ctx->in_frame_w, + vpp_gpe_ctx->in_frame_h, + VA_RT_FORMAT_YUV420, + 1, + &vpp_gpe_ctx->surface_tmp); + assert(va_status == VA_STATUS_SUCCESS); + + struct object_surface * obj_surf = SURFACE(vpp_gpe_ctx->surface_tmp); + assert(obj_surf); + + if (obj_surf) { + i965_check_alloc_surface_bo(ctx, obj_surf, 1, VA_FOURCC_NV12, + SUBSAMPLE_YUV420); + vpp_gpe_ctx->surface_tmp_object = obj_surf; + } + } + + assert(sharpening_intensity >= 0.0 && sharpening_intensity <= 1.0); + thr_param.l_amount = (unsigned int)(sharpening_intensity * 128); + thr_param.d_amount = (unsigned int)(sharpening_intensity * 128); + + thr_param.base.pic_width = vpp_gpe_ctx->in_frame_w; + thr_param.base.pic_height = vpp_gpe_ctx->in_frame_h; + + /* Step 1: horizontal blur process */ + vpp_gpe_ctx->forward_surf_sum = 0; + vpp_gpe_ctx->backward_surf_sum = 0; + + vpp_gpe_ctx->thread_num = vpp_gpe_ctx->in_frame_h/16; + vpp_gpe_ctx->thread_param_size = thr_param_size; + vpp_gpe_ctx->thread_param = (unsigned char*) malloc(vpp_gpe_ctx->thread_param_size + *vpp_gpe_ctx->thread_num); + pos = vpp_gpe_ctx->thread_param; + + if (!pos) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + for( i = 0 ; i < vpp_gpe_ctx->thread_num; i++){ + thr_param.base.v_pos = 16 * i; + thr_param.base.h_pos = 0; + memcpy(pos, &thr_param, thr_param_size); + pos += thr_param_size; + } + + vpp_gpe_ctx->sub_shader_index = 0; + va_status = vpp_gpe_process(ctx, vpp_gpe_ctx); + free(vpp_gpe_ctx->thread_param); + + /* Step 2: vertical blur process */ + vpp_gpe_ctx->surface_input_object[0] = vpp_gpe_ctx->surface_output_object; + vpp_gpe_ctx->surface_output_object = vpp_gpe_ctx->surface_tmp_object; + vpp_gpe_ctx->forward_surf_sum = 0; + vpp_gpe_ctx->backward_surf_sum = 0; + + vpp_gpe_ctx->thread_num = vpp_gpe_ctx->in_frame_w/16; + vpp_gpe_ctx->thread_param_size = thr_param_size; + vpp_gpe_ctx->thread_param = (unsigned char*) malloc(vpp_gpe_ctx->thread_param_size + *vpp_gpe_ctx->thread_num); + pos = vpp_gpe_ctx->thread_param; + + if (!pos) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + for( i = 0 ; i < vpp_gpe_ctx->thread_num; i++){ + thr_param.base.v_pos = 0; + thr_param.base.h_pos = 16 * i; + memcpy(pos, &thr_param, thr_param_size); + pos += thr_param_size; + } + + vpp_gpe_ctx->sub_shader_index = 1; + vpp_gpe_process(ctx, vpp_gpe_ctx); + free(vpp_gpe_ctx->thread_param); + + /* Step 3: apply the blur to original surface */ + vpp_gpe_ctx->surface_input_object[0] = origin_in_obj_surface; + vpp_gpe_ctx->surface_input_object[1] = vpp_gpe_ctx->surface_tmp_object; + vpp_gpe_ctx->surface_output_object = origin_out_obj_surface; + vpp_gpe_ctx->forward_surf_sum = 1; + vpp_gpe_ctx->backward_surf_sum = 0; + + vpp_gpe_ctx->thread_num = vpp_gpe_ctx->in_frame_h/4; + vpp_gpe_ctx->thread_param_size = thr_param_size; + vpp_gpe_ctx->thread_param = (unsigned char*) malloc(vpp_gpe_ctx->thread_param_size + *vpp_gpe_ctx->thread_num); + pos = vpp_gpe_ctx->thread_param; + + if (!pos) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + for( i = 0 ; i < vpp_gpe_ctx->thread_num; i++){ + thr_param.base.v_pos = 4 * i; + thr_param.base.h_pos = 0; + memcpy(pos, &thr_param, thr_param_size); + pos += thr_param_size; + } + + vpp_gpe_ctx->sub_shader_index = 2; + va_status = vpp_gpe_process(ctx, vpp_gpe_ctx); + free(vpp_gpe_ctx->thread_param); + + return va_status; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +VAStatus vpp_gpe_process_picture(VADriverContextP ctx, + struct vpp_gpe_context * vpp_gpe_ctx) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAProcPipelineParameterBuffer* pipe = vpp_gpe_ctx->pipeline_param; + VAProcFilterParameterBuffer* filter = NULL; + unsigned int i; + struct object_surface *obj_surface = NULL; + + if (pipe->num_filters && !pipe->filters) + goto error; + + for(i = 0; i < pipe->num_filters; i++){ + struct object_buffer *obj_buf = BUFFER(pipe->filters[i]); + + assert(obj_buf && obj_buf->buffer_store && obj_buf->buffer_store->buffer); + + if (!obj_buf || + !obj_buf->buffer_store || + !obj_buf->buffer_store->buffer) + goto error; + + filter = (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; + if(filter->type == VAProcFilterSharpening){ + break; + } + } + + assert(pipe->num_forward_references + pipe->num_backward_references <= 4); + vpp_gpe_ctx->surface_input_object[0] = vpp_gpe_ctx->surface_pipeline_input_object; + + vpp_gpe_ctx->forward_surf_sum = 0; + vpp_gpe_ctx->backward_surf_sum = 0; + + for(i = 0; i < pipe->num_forward_references; i ++) + { + obj_surface = SURFACE(pipe->forward_references[i]); + + assert(obj_surface); + vpp_gpe_ctx->surface_input_object[i + 1] = obj_surface; + vpp_gpe_ctx->forward_surf_sum++; + } + + for(i = 0; i < pipe->num_backward_references; i ++) + { + obj_surface = SURFACE(pipe->backward_references[i]); + + assert(obj_surface); + vpp_gpe_ctx->surface_input_object[vpp_gpe_ctx->forward_surf_sum + 1 + i ] = obj_surface; + vpp_gpe_ctx->backward_surf_sum++; + } + + obj_surface = vpp_gpe_ctx->surface_input_object[0]; + vpp_gpe_ctx->in_frame_w = obj_surface->orig_width; + vpp_gpe_ctx->in_frame_h = obj_surface->orig_height; + + if(filter && filter->type == VAProcFilterSharpening) { + va_status = vpp_gpe_process_sharpening(ctx, vpp_gpe_ctx); + } else { + va_status = VA_STATUS_ERROR_ATTR_NOT_SUPPORTED; + } + + vpp_gpe_ctx->is_first_frame = 0; + + return va_status; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +void +vpp_gpe_context_destroy(VADriverContextP ctx, + struct vpp_gpe_context *vpp_gpe_ctx) +{ + dri_bo_unreference(vpp_gpe_ctx->vpp_batchbuffer.bo); + vpp_gpe_ctx->vpp_batchbuffer.bo = NULL; + + dri_bo_unreference(vpp_gpe_ctx->vpp_kernel_return.bo); + vpp_gpe_ctx->vpp_kernel_return.bo = NULL; + + vpp_gpe_ctx->gpe_context_destroy(&vpp_gpe_ctx->gpe_ctx); + + if(vpp_gpe_ctx->surface_tmp != VA_INVALID_ID){ + assert(vpp_gpe_ctx->surface_tmp_object != NULL); + i965_DestroySurfaces(ctx, &vpp_gpe_ctx->surface_tmp, 1); + vpp_gpe_ctx->surface_tmp = VA_INVALID_ID; + vpp_gpe_ctx->surface_tmp_object = NULL; + } + + if (vpp_gpe_ctx->batch) + intel_batchbuffer_free(vpp_gpe_ctx->batch); + + free(vpp_gpe_ctx); +} + +struct vpp_gpe_context * +vpp_gpe_context_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct vpp_gpe_context *vpp_gpe_ctx = calloc(1, sizeof(struct vpp_gpe_context)); + assert(vpp_gpe_ctx); + struct i965_gpe_context *gpe_ctx = &(vpp_gpe_ctx->gpe_ctx); + + assert(IS_HASWELL(i965->intel.device_info) || + IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)); + + vpp_gpe_ctx->surface_tmp = VA_INVALID_ID; + vpp_gpe_ctx->surface_tmp_object = NULL; + vpp_gpe_ctx->batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER, 0); + vpp_gpe_ctx->is_first_frame = 1; + + gpe_ctx->vfe_state.max_num_threads = 60 - 1; + gpe_ctx->vfe_state.num_urb_entries = 16; + gpe_ctx->vfe_state.gpgpu_mode = 0; + gpe_ctx->vfe_state.urb_entry_size = 59 - 1; + gpe_ctx->vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; + + if (IS_HASWELL(i965->intel.device_info)) { + vpp_gpe_ctx->gpe_context_init = i965_gpe_context_init; + vpp_gpe_ctx->gpe_context_destroy = i965_gpe_context_destroy; + vpp_gpe_ctx->gpe_load_kernels = i965_gpe_load_kernels; + gpe_ctx->surface_state_binding_table.length = + (SURFACE_STATE_PADDED_SIZE_GEN7 + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + gpe_ctx->curbe.length = CURBE_TOTAL_DATA_LENGTH; + gpe_ctx->idrt.max_entries = MAX_INTERFACE_DESC_GEN6; + gpe_ctx->idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + + } else if (IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) { + vpp_gpe_ctx->gpe_context_init = gen8_gpe_context_init; + vpp_gpe_ctx->gpe_context_destroy = gen8_gpe_context_destroy; + vpp_gpe_ctx->gpe_load_kernels = gen8_gpe_load_kernels; + gpe_ctx->surface_state_binding_table.length = + (SURFACE_STATE_PADDED_SIZE_GEN8 + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + gpe_ctx->curbe_size = CURBE_TOTAL_DATA_LENGTH; + gpe_ctx->idrt_size = sizeof(struct gen8_interface_descriptor_data) * MAX_INTERFACE_DESC_GEN6; + + } + + return vpp_gpe_ctx; +} + diff -Nru intel-vaapi-driver-1.0.15/src/gen75_vpp_gpe.h intel-vaapi-driver-1.7.1/src/gen75_vpp_gpe.h --- intel-vaapi-driver-1.0.15/src/gen75_vpp_gpe.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_vpp_gpe.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,121 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Li Xiaowei + * + */ + +#ifndef GEN75_VPP_GPE +#define GEN75_VPP_GPE + +#include +#include +#include +#include +#include "i965_gpe_utils.h" + +#define MAX_SURF_IN_SUM 5 + +enum VPP_GPE_TYPE{ + VPP_GPE_SHARPENING, + VPP_GPE_BLENDING, + VPP_GPE_SCENE_CHANGE_DETECTION, + VPP_GPE_FILTER_SUM, +}; + +typedef struct _KernelParameterBase{ + unsigned short pic_width; + unsigned short pic_height; +}KernelParameterBase; + +typedef struct _KernelParameterSharpening{ + KernelParameterBase base; +}KernelParameterSharpening; + +typedef struct _ThreadParameterBase{ + unsigned int pic_width; + unsigned int pic_height; + unsigned int v_pos; + unsigned int h_pos; +}ThreadParameterBase; + +typedef struct _ThreadParameterSharpenig{ + ThreadParameterBase base; + unsigned int l_amount; + unsigned int d_amount; +}ThreadParameterSharpening; + +struct vpp_gpe_context{ + struct intel_batchbuffer *batch; + struct i965_gpe_context gpe_ctx; + struct i965_buffer_surface vpp_batchbuffer; + struct i965_buffer_surface vpp_kernel_return; + + VAProcPipelineParameterBuffer *pipeline_param; + enum VPP_GPE_TYPE filter_type; + unsigned int sub_shader_index; + unsigned int sub_shader_sum; + + unsigned char * kernel_param; + unsigned int kernel_param_size; + + unsigned char * thread_param; + unsigned int thread_param_size; + unsigned int thread_num; + + struct object_surface *surface_pipeline_input_object; + struct object_surface *surface_output_object; + VASurfaceID surface_tmp; + struct object_surface *surface_tmp_object; + struct object_surface *surface_input_object[MAX_SURF_IN_SUM]; + unsigned int forward_surf_sum; + unsigned int backward_surf_sum; + + unsigned int in_frame_w; + unsigned int in_frame_h; + unsigned int is_first_frame; + + void (*gpe_context_init)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context); + + void (*gpe_context_destroy)(struct i965_gpe_context *gpe_context); + + void (*gpe_load_kernels)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_kernel *kernel_list, + unsigned int num_kernels); + +}; + +struct vpp_gpe_context * +vpp_gpe_context_init(VADriverContextP ctx); + +void +vpp_gpe_context_destroy(VADriverContextP ctx, + struct vpp_gpe_context* vpp_context); + +VAStatus +vpp_gpe_process_picture(VADriverContextP ctx, + struct vpp_gpe_context * vpp_context); +#endif diff -Nru intel-vaapi-driver-1.0.15/src/gen75_vpp_vebox.c intel-vaapi-driver-1.7.1/src/gen75_vpp_vebox.c --- intel-vaapi-driver-1.0.15/src/gen75_vpp_vebox.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_vpp_vebox.c 2016-06-21 01:35:12.000000000 +0000 @@ -0,0 +1,2418 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Li Xiaowei + * Li Zhong + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "gen75_vpp_vebox.h" +#include "intel_media.h" + +#define PI 3.1415926 + +extern VAStatus +i965_MapBuffer(VADriverContextP ctx, VABufferID buf_id, void **); + +extern VAStatus +i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id); + +extern VAStatus +i965_DeriveImage(VADriverContextP ctx, VABufferID surface, VAImage *out_image); + +extern VAStatus +i965_DestroyImage(VADriverContextP ctx, VAImageID image); + +VAStatus +vpp_surface_convert(VADriverContextP ctx, struct object_surface *src_obj_surf, + struct object_surface *dst_obj_surf) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + + assert(src_obj_surf->orig_width == dst_obj_surf->orig_width); + assert(src_obj_surf->orig_height == dst_obj_surf->orig_height); + + VARectangle src_rect, dst_rect; + src_rect.x = dst_rect.x = 0; + src_rect.y = dst_rect.y = 0; + src_rect.width = dst_rect.width = src_obj_surf->orig_width; + src_rect.height = dst_rect.height = dst_obj_surf->orig_height; + + struct i965_surface src_surface, dst_surface; + src_surface.base = (struct object_base *)src_obj_surf; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + + dst_surface.base = (struct object_base *)dst_obj_surf; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + va_status = i965_image_processing(ctx, + &src_surface, + &src_rect, + &dst_surface, + &dst_rect); + return va_status; +} + +static VAStatus +vpp_surface_scaling(VADriverContextP ctx, struct object_surface *src_obj_surf, + struct object_surface *dst_obj_surf, uint32_t flags) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + + assert(src_obj_surf->fourcc == VA_FOURCC_NV12); + assert(dst_obj_surf->fourcc == VA_FOURCC_NV12); + + VARectangle src_rect, dst_rect; + src_rect.x = 0; + src_rect.y = 0; + src_rect.width = src_obj_surf->orig_width; + src_rect.height = src_obj_surf->orig_height; + + dst_rect.x = 0; + dst_rect.y = 0; + dst_rect.width = dst_obj_surf->orig_width; + dst_rect.height = dst_obj_surf->orig_height; + + va_status = i965_scaling_processing(ctx, + src_obj_surf, + &src_rect, + dst_obj_surf, + &dst_rect, + flags); + + return va_status; +} + +void hsw_veb_dndi_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + unsigned int* p_table ; + unsigned int progressive_dn = 1; + unsigned int dndi_top_first = 0; + unsigned int is_mcdi_enabled = 0; + + if (proc_ctx->is_di_enabled) { + const VAProcFilterParameterBufferDeinterlacing * const deint_params = + proc_ctx->filter_di; + + progressive_dn = 0; + + /* If we are in "First Frame" mode, i.e. past frames are not + available for motion measure, then don't use the TFF flag */ + dndi_top_first = !(deint_params->flags & (proc_ctx->is_first_frame ? + VA_DEINTERLACING_BOTTOM_FIELD : + VA_DEINTERLACING_BOTTOM_FIELD_FIRST)); + + is_mcdi_enabled = + (deint_params->algorithm == VAProcDeinterlacingMotionCompensated); + } + + /* + VAProcFilterParameterBufferDeinterlacing *di_param = + (VAProcFilterParameterBufferDeinterlacing *) proc_ctx->filter_di; + + VAProcFilterParameterBuffer * dn_param = + (VAProcFilterParameterBuffer *) proc_ctx->filter_dn; + */ + p_table = (unsigned int *)proc_ctx->dndi_state_table.ptr; + + if (IS_HASWELL(i965->intel.device_info)) + *p_table ++ = 0; // reserved . w0 + + *p_table ++ = ( 140 << 24 | // denoise STAD threshold . w1 + 192 << 16 | // dnmh_history_max + 0 << 12 | // reserved + 7 << 8 | // dnmh_delta[3:0] + 38 ); // denoise ASD threshold + + *p_table ++ = ( 0 << 30 | // reserved . w2 + 0 << 24 | // temporal diff th + 0 << 22 | // reserved. + 0 << 16 | // low temporal diff th + 2 << 13 | // STMM C2 + 1 << 8 | // denoise moving pixel th + 38 ); // denoise th for sum of complexity measure + + *p_table ++ = ( 0 << 30 | // reserved . w3 + 12<< 24 | // good neighbor th[5:0] + 9 << 20 | // CAT slope minus 1 + 5 << 16 | // SAD Tight in + 0 << 14 | // smooth mv th + 0 << 12 | // reserved + 1 << 8 | // bne_edge_th[3:0] + 20 ); // block noise estimate noise th + + *p_table ++ = ( 0 << 31 | // STMM blending constant select. w4 + 64 << 24 | // STMM trc1 + 125<< 16 | // STMM trc2 + 0 << 14 | // reserved + 30 << 8 | // VECM_mul + 150 ); // maximum STMM + + *p_table ++ = ( 118<< 24 | // minumum STMM . W5 + 0 << 22 | // STMM shift down + 1 << 20 | // STMM shift up + 5 << 16 | // STMM output shift + 100 << 8 | // SDI threshold + 5 ); // SDI delta + + *p_table ++ = ( 50 << 24 | // SDI fallback mode 1 T1 constant . W6 + 100 << 16 | // SDI fallback mode 1 T2 constant + 37 << 8 | // SDI fallback mode 2 constant(angle2x1) + 175 ); // FMD temporal difference threshold + + *p_table ++ = ( 16 << 24 | // FMD #1 vertical difference th . w7 + 100<< 16 | // FMD #2 vertical difference th + 0 << 14 | // CAT th1 + 2 << 8 | // FMD tear threshold + is_mcdi_enabled << 7 | // MCDI Enable, use motion compensated deinterlace algorithm + progressive_dn << 6 | // progressive DN + 0 << 4 | // reserved + dndi_top_first << 3 | // DN/DI Top First + 0 ); // reserved + + *p_table ++ = ( 0 << 29 | // reserved . W8 + 32 << 23 | // dnmh_history_init[5:0] + 10 << 19 | // neighborPixel th + 0 << 18 | // reserved + 0 << 16 | // FMD for 2nd field of previous frame + 25 << 10 | // MC pixel consistency th + 0 << 8 | // FMD for 1st field for current frame + 10 << 4 | // SAD THB + 5 ); // SAD THA + + *p_table ++ = ( 0 << 24 | // reserved + 140<< 16 | // chr_dnmh_stad_th + 0 << 13 | // reserved + 1 << 12 | // chrome denoise enable + 13 << 6 | // chr temp diff th + 7 ); // chr temp diff low + + if (IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) + *p_table ++ = 0; // parameters for hot pixel, +} + +//Set default values for STDE +void set_std_table_default(struct intel_vebox_context *proc_ctx, unsigned int *p_table) { + + //DWord 15 + *p_table ++ = ( 0 << 31 | // Reserved + 0x3F8 << 21 | // SATB1 (10 bits, default 8, optimized value -8) + 31 << 14 | // SATP3 + 6 << 7 | // SATP2 + 0x7A ); // SATP1 (7 bits, default 6, optimized value -6) + + //DWord 16 + *p_table ++ = ( 0 << 31 | // Reserved + 297 << 20 | // SATS0 + 124 << 10 | // SATB3 + 8 ); // SATB2 + + //DWord 17 + *p_table ++ = ( 0 << 22 | // Reserved + 297 << 11 | // SATS2 + 85 ); // SATS1 + + //DWord 18 + *p_table ++ = ( 14 << 25 | // HUEP3 + 6 << 18 | // HUEP2 + 0x7A << 11 | // HUEP1 (7 bits, default value -6 = 7Ah) + 256 ); // SATS3 + + //DWord 19 + *p_table ++ = ( 0 << 30 | // Reserved + 256 << 20 | // HUEB3 + 8 << 10 | // HUEB2 + 0x3F8 ); // HUEB1 (10 bits, default value 8, optimized value -8) + + //DWord 20 + *p_table ++ = ( 0 << 22 | // Reserved + 85 << 11 | // HUES1 + 384 ); // HUES0 + + //DWord 21 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3 + 384 ); // HUES2 + + //DWord 22 + *p_table ++ = ( 0 << 31 | // Reserved + 0 << 21 | // SATB1_DARK + 31 << 14 | // SATP3_DARK + 31 << 7 | // SATP2_DARK + 0x7B ); // SATP1_DARK (7 bits, default value -11 = FF5h, optimized value -5) + + //DWord 23 + *p_table ++ = ( 0 << 31 | // Reserved + 305 << 20 | // SATS0_DARK + 124 << 10 | // SATB3_DARK + 124 ); // SATB2_DARK + + //DWord 24 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // SATS2_DARK + 220 ); // SATS1_DARK + + //DWord 25 + *p_table ++ = ( 14 << 25 | // HUEP3_DARK + 14 << 18 | // HUEP2_DARK + 14 << 11 | // HUEP1_DARK + 256 ); // SATS3_DARK + + //DWord 26 + *p_table ++ = ( 0 << 30 | // Reserved + 56 << 20 | // HUEB3_DARK + 56 << 10 | // HUEB2_DARK + 56 ); // HUEB1_DARK + + //DWord 27 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES1_DARK + 256 ); // HUES0_DARK + + //DWord 28 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3_DARK + 256 ); // HUES2_DARK +} + +//Set values for STDE factor 3 +void set_std_table_3(struct intel_vebox_context *proc_ctx, unsigned int *p_table) { + + //DWord 15 + *p_table ++ = ( 0 << 31 | // Reserved + 1016 << 21 | // SATB1 (10 bits, default 8, optimized value 1016) + 31 << 14 | // SATP3 + 6 << 7 | // SATP2 + 122 ); // SATP1 (7 bits, default 6, optimized value 122) + + //DWord 16 + *p_table ++ = ( 0 << 31 | // Reserved + 297 << 20 | // SATS0 + 124 << 10 | // SATB3 + 8 ); // SATB2 + + //DWord 17 + *p_table ++ = ( 0 << 22 | // Reserved + 297 << 11 | // SATS2 + 85 ); // SATS1 + + //DWord 18 + *p_table ++ = ( 14 << 25 | // HUEP3 + 6 << 18 | // HUEP2 + 122 << 11 | // HUEP1 (7 bits, default value -6 = 7Ah, optimized 122) + 256 ); // SATS3 + + //DWord 19 + *p_table ++ = ( 0 << 30 | // Reserved + 56 << 20 | // HUEB3 (default 256, optimized 56) + 8 << 10 | // HUEB2 + 1016 ); // HUEB1 (10 bits, default value 8, optimized value 1016) + + //DWord 20 + *p_table ++ = ( 0 << 22 | // Reserved + 85 << 11 | // HUES1 + 384 ); // HUES0 + + //DWord 21 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3 + 384 ); // HUES2 + + //DWord 22 + *p_table ++ = ( 0 << 31 | // Reserved + 0 << 21 | // SATB1_DARK + 31 << 14 | // SATP3_DARK + 31 << 7 | // SATP2_DARK + 123 ); // SATP1_DARK (7 bits, default value -11 = FF5h, optimized value 123) + + //DWord 23 + *p_table ++ = ( 0 << 31 | // Reserved + 305 << 20 | // SATS0_DARK + 124 << 10 | // SATB3_DARK + 124 ); // SATB2_DARK + + //DWord 24 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // SATS2_DARK + 220 ); // SATS1_DARK + + //DWord 25 + *p_table ++ = ( 14 << 25 | // HUEP3_DARK + 14 << 18 | // HUEP2_DARK + 14 << 11 | // HUEP1_DARK + 256 ); // SATS3_DARK + + //DWord 26 + *p_table ++ = ( 0 << 30 | // Reserved + 56 << 20 | // HUEB3_DARK + 56 << 10 | // HUEB2_DARK + 56 ); // HUEB1_DARK + + //DWord 27 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES1_DARK + 256 ); // HUES0_DARK + + //DWord 28 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3_DARK + 256 ); // HUES2_DARK +} + +//Set values for STDE factor 6 +void set_std_table_6(struct intel_vebox_context *proc_ctx, unsigned int *p_table) { + + //DWord 15 + *p_table ++ = ( 0 << 31 | // Reserved + 0 << 21 | // SATB1 (10 bits, default 8, optimized value 0) + 31 << 14 | // SATP3 + 31 << 7 | // SATP2 (default 6, optimized 31) + 114 ); // SATP1 (7 bits, default 6, optimized value 114) + + //DWord 16 + *p_table ++ = ( 0 << 31 | // Reserved + 467 << 20 | // SATS0 (default 297, optimized 467) + 124 << 10 | // SATB3 + 124 ); // SATB2 + + //DWord 17 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // SATS2 (default 297, optimized 256) + 176 ); // SATS1 + + //DWord 18 + *p_table ++ = ( 14 << 25 | // HUEP3 + 14 << 18 | // HUEP2 + 14 << 11 | // HUEP1 (7 bits, default value -6 = 7Ah, optimized value 14) + 256 ); // SATS3 + + //DWord 19 + *p_table ++ = ( 0 << 30 | // Reserved + 56 << 20 | // HUEB3 + 56 << 10 | // HUEB2 + 56 ); // HUEB1 (10 bits, default value 8, optimized value 56) + + //DWord 20 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES1 + 256 ); // HUES0 + + //DWord 21 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3 + 256 ); // HUES2 + + //DWord 22 + *p_table ++ = ( 0 << 31 | // Reserved + 0 << 21 | // SATB1_DARK + 31 << 14 | // SATP3_DARK + 31 << 7 | // SATP2_DARK + 123 ); // SATP1_DARK (7 bits, default value -11 = FF5h, optimized value 123) + + //DWord 23 + *p_table ++ = ( 0 << 31 | // Reserved + 305 << 20 | // SATS0_DARK + 124 << 10 | // SATB3_DARK + 124 ); // SATB2_DARK + + //DWord 24 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // SATS2_DARK + 220 ); // SATS1_DARK + + //DWord 25 + *p_table ++ = ( 14 << 25 | // HUEP3_DARK + 14 << 18 | // HUEP2_DARK + 14 << 11 | // HUEP1_DARK + 256 ); // SATS3_DARK + + //DWord 26 + *p_table ++ = ( 0 << 30 | // Reserved + 56 << 20 | // HUEB3_DARK + 56 << 10 | // HUEB2_DARK + 56 ); // HUEB1_DARK + + //DWord 27 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES1_DARK + 256 ); // HUES0_DARK + + //DWord 28 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3_DARK + 256 ); // HUES2_DARK +} + +//Set values for STDE factor 9 +void set_std_table_9(struct intel_vebox_context *proc_ctx, unsigned int *p_table) { + + //DWord 15 + *p_table ++ = ( 0 << 31 | // Reserved + 0 << 21 | // SATB1 (10 bits, default 8, optimized value 0) + 31 << 14 | // SATP3 + 31 << 7 | // SATP2 (default 6, optimized 31) + 108 ); // SATP1 (7 bits, default 6, optimized value 108) + + //DWord 16 + *p_table ++ = ( 0 << 31 | // Reserved + 721 << 20 | // SATS0 (default 297, optimized 721) + 124 << 10 | // SATB3 + 124 ); // SATB2 + + //DWord 17 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // SATS2 (default 297, optimized 256) + 156 ); // SATS1 (default 176, optimized 156) + + //DWord 18 + *p_table ++ = ( 14 << 25 | // HUEP3 + 14 << 18 | // HUEP2 + 14 << 11 | // HUEP1 (7 bits, default value -6 = 7Ah, optimized value 14) + 256 ); // SATS3 + + //DWord 19 + *p_table ++ = ( 0 << 30 | // Reserved + 56 << 20 | // HUEB3 + 56 << 10 | // HUEB2 + 56 ); // HUEB1 (10 bits, default value 8, optimized value 56) + + //DWord 20 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES1 + 256 ); // HUES0 + + //DWord 21 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3 + 256 ); // HUES2 + + //DWord 22 + *p_table ++ = ( 0 << 31 | // Reserved + 0 << 21 | // SATB1_DARK + 31 << 14 | // SATP3_DARK + 31 << 7 | // SATP2_DARK + 123 ); // SATP1_DARK (7 bits, default value -11 = FF5h, optimized value 123) + + //DWord 23 + *p_table ++ = ( 0 << 31 | // Reserved + 305 << 20 | // SATS0_DARK + 124 << 10 | // SATB3_DARK + 124 ); // SATB2_DARK + + //DWord 24 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // SATS2_DARK + 220 ); // SATS1_DARK + + //DWord 25 + *p_table ++ = ( 14 << 25 | // HUEP3_DARK + 14 << 18 | // HUEP2_DARK + 14 << 11 | // HUEP1_DARK + 256 ); // SATS3_DARK + + //DWord 26 + *p_table ++ = ( 0 << 30 | // Reserved + 56 << 20 | // HUEB3_DARK + 56 << 10 | // HUEB2_DARK + 56 ); // HUEB1_DARK + + //DWord 27 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES1_DARK + 256 ); // HUES0_DARK + + //DWord 28 + *p_table ++ = ( 0 << 22 | // Reserved + 256 << 11 | // HUES3_DARK + 256 ); // HUES2_DARK +} + + +void hsw_veb_iecp_std_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int *p_table = proc_ctx->iecp_state_table.ptr + 0 ; + + if(!(proc_ctx->filters_mask & VPP_IECP_STD_STE)){ + memset(p_table, 0, 29 * 4); + }else{ + int stde_factor = 0; //default value + VAProcFilterParameterBuffer * std_param = (VAProcFilterParameterBuffer *) proc_ctx->filter_iecp_std; + stde_factor = std_param->value; + + //DWord 0 + *p_table ++ = ( 154 << 24 | // V_Mid + 110 << 16 | // U_Mid + 14 << 10 | // Hue_Max + 31 << 4 | // Sat_Max + 0 << 3 | // Reserved + 0 << 2 | // Output Control is set to output the 1=STD score /0=Output Pixels + 1 << 1 | // Set STE Enable + 1 ); // Set STD Enable + + //DWord 1 + *p_table ++ = ( 0 << 31 | // Reserved + 4 << 28 | // Diamond Margin + 0 << 21 | // Diamond_du + 3 << 18 | // HS_Margin + 79 << 10 | // Cos(alpha) + 0 << 8 | // Reserved + 101 ); // Sin(alpha) + + //DWord 2 + *p_table ++ = ( 0 << 21 | // Reserved + 100 << 13 | // Diamond_alpha + 35 << 7 | // Diamond_Th + 0 ); + + //DWord 3 + *p_table ++ = ( 254 << 24 | // Y_point_3 + 47 << 16 | // Y_point_2 + 46 << 8 | // Y_point_1 + 1 << 7 | // VY_STD_Enable + 0 ); // Reserved + + //DWord 4 + *p_table ++ = ( 0 << 18 | // Reserved + 31 << 13 | // Y_slope_2 + 31 << 8 | // Y_slope_1 + 255 ); // Y_point_4 + + //DWord 5 + *p_table ++ = ( 400 << 16 | // INV_Skin_types_margin = 20* Skin_Type_margin => 20*20 + 3300 ); // INV_Margin_VYL => 1/Margin_VYL + + //DWord 6 + *p_table ++ = ( 216 << 24 | // P1L + 46 << 16 | // P0L + 1600 ); // INV_Margin_VYU + + //DWord 7 + *p_table ++ = ( 130 << 24 | // B1L + 133 << 16 | // B0L + 236 << 8 | // P3L + 236 ); // P2L + + //DWord 8 + *p_table ++ = ( 0 << 27 | // Reserved + 0x7FB << 16 | // S0L (11 bits, Default value: -5 = FBh, pad it with 1s to make it 11bits) + 130 << 8 | // B3L + 130 ); + + //DWord 9 + *p_table ++ = ( 0 << 22 | // Reserved + 0 << 11 | // S2L + 0); // S1L + + //DWord 10 + *p_table ++ = ( 0 << 27 | // Reserved + 66 << 19 | // P1U + 46 << 11 | // P0U + 0 ); // S3 + + //DWord 11 + *p_table ++ = ( 163 << 24 | // B1U + 143 << 16 | // B0U + 236 << 8 | // P3U + 150 ); // P2U + + //DWord 12 + *p_table ++ = ( 0 << 27 | // Reserved + 256 << 16 | // S0U + 200 << 8 | // B3U + 200 ); // B2U + + //DWord 13 + *p_table ++ = ( 0 << 22 | // Reserved + 0x74D << 11 | // S2U (11 bits, Default value -179 = F4Dh) + 113 ); // S1U + + //DWoord 14 + *p_table ++ = ( 0 << 28 | // Reserved + 20 << 20 | // Skin_types_margin + 120 << 12 | // Skin_types_thresh + 1 << 11 | // Skin_Types_Enable + 0 ); // S3U + + //Set DWord 15 through DWord 28 in their respective methods. + switch(stde_factor) { + case 3: + set_std_table_3(proc_ctx, p_table); + break; + + case 6: + set_std_table_6(proc_ctx, p_table); + break; + + case 9: + set_std_table_9(proc_ctx, p_table); + break; + + default: + set_std_table_default(proc_ctx, p_table); + break; + } + }//end of else +} + +void hsw_veb_iecp_ace_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int *p_table = (unsigned int*)(proc_ctx->iecp_state_table.ptr + 116); + + if(!(proc_ctx->filters_mask & VPP_IECP_ACE)){ + memset(p_table, 0, 13 * 4); + }else{ + *p_table ++ = 0x00000068; + *p_table ++ = 0x4c382410; + *p_table ++ = 0x9c887460; + *p_table ++ = 0xebd8c4b0; + *p_table ++ = 0x604c3824; + + *p_table ++ = 0xb09c8874; + *p_table ++ = 0x0000d8c4; + *p_table ++ = 0x00000000; + *p_table ++ = 0x00000000; + *p_table ++ = 0x00000000; + + *p_table ++ = 0x00000000; + *p_table ++ = 0x00000000; + *p_table ++ = 0x00000000; + } +} + +void hsw_veb_iecp_tcc_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int *p_table = (unsigned int*)(proc_ctx->iecp_state_table.ptr + 168); +// VAProcFilterParameterBuffer * tcc_param = +// (VAProcFilterParameterBuffer *) proc_ctx->filter_iecp_tcc; + + if(!(proc_ctx->filters_mask & VPP_IECP_TCC)){ + memset(p_table, 0, 11 * 4); + }else{ + *p_table ++ = 0x00000000; + *p_table ++ = 0x00000000; + *p_table ++ = 0x1e34cc91; + *p_table ++ = 0x3e3cce91; + *p_table ++ = 0x02e80195; + + *p_table ++ = 0x0197046b; + *p_table ++ = 0x01790174; + *p_table ++ = 0x00000000; + *p_table ++ = 0x00000000; + *p_table ++ = 0x03030000; + + *p_table ++ = 0x009201c0; + } +} + +void hsw_veb_iecp_pro_amp_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int contrast = 0x80; //default + int brightness = 0x00; //default + int cos_c_s = 256 ; //default + int sin_c_s = 0; //default + unsigned int *p_table = (unsigned int*)(proc_ctx->iecp_state_table.ptr + 212); + + if(!(proc_ctx->filters_mask & VPP_IECP_PRO_AMP)){ + memset(p_table, 0, 2 * 4); + }else { + float src_saturation = 1.0; + float src_hue = 0.0; + float src_contrast = 1.0; + float src_brightness = 0.0; + float tmp_value = 0.0; + unsigned int i = 0; + + VAProcFilterParameterBufferColorBalance * amp_params = + (VAProcFilterParameterBufferColorBalance *) proc_ctx->filter_iecp_amp; + + for (i = 0; i < proc_ctx->filter_iecp_amp_num_elements; i++){ + VAProcColorBalanceType attrib = amp_params[i].attrib; + + if(attrib == VAProcColorBalanceHue) { + src_hue = amp_params[i].value; //(-180.0, 180.0) + }else if(attrib == VAProcColorBalanceSaturation) { + src_saturation = amp_params[i].value; //(0.0, 10.0) + }else if(attrib == VAProcColorBalanceBrightness) { + src_brightness = amp_params[i].value; // (-100.0, 100.0) + brightness = intel_format_convert(src_brightness, 7, 4, 1); + }else if(attrib == VAProcColorBalanceContrast) { + src_contrast = amp_params[i].value; // (0.0, 10.0) + contrast = intel_format_convert(src_contrast, 4, 7, 0); + } + } + + tmp_value = cos(src_hue/180*PI) * src_contrast * src_saturation; + cos_c_s = intel_format_convert(tmp_value, 7, 8, 1); + + tmp_value = sin(src_hue/180*PI) * src_contrast * src_saturation; + sin_c_s = intel_format_convert(tmp_value, 7, 8, 1); + + *p_table ++ = ( 0 << 28 | //reserved + contrast << 17 | //contrast value (U4.7 format) + 0 << 13 | //reserved + brightness << 1| // S7.4 format + 1); + + *p_table ++ = ( cos_c_s << 16 | // cos(h) * contrast * saturation + sin_c_s); // sin(h) * contrast * saturation + + } +} + + +void hsw_veb_iecp_csc_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int *p_table = (unsigned int*)(proc_ctx->iecp_state_table.ptr + 220); + float tran_coef[9] = {1.0, 0.0, 0.0, 0.0, 1.0, 0.0, 0.0, 0.0, 1.0}; + float v_coef[3] = {0.0, 0.0, 0.0}; + float u_coef[3] = {0.0, 0.0, 0.0}; + int is_transform_enabled = 0; + + if(!(proc_ctx->filters_mask & VPP_IECP_CSC)){ + memset(p_table, 0, 8 * 4); + return; + } + + if(proc_ctx->fourcc_input == VA_FOURCC_RGBA && + (proc_ctx->fourcc_output == VA_FOURCC_NV12 || + proc_ctx->fourcc_output == VA_FOURCC_YV12 || + proc_ctx->fourcc_output == VA_FOURCC_YVY2 || + proc_ctx->fourcc_output == VA_FOURCC_AYUV)) { + + tran_coef[0] = 0.257; + tran_coef[1] = 0.504; + tran_coef[2] = 0.098; + tran_coef[3] = -0.148; + tran_coef[4] = -0.291; + tran_coef[5] = 0.439; + tran_coef[6] = 0.439; + tran_coef[7] = -0.368; + tran_coef[8] = -0.071; + + u_coef[0] = 16 * 4; + u_coef[1] = 128 * 4; + u_coef[2] = 128 * 4; + + is_transform_enabled = 1; + }else if((proc_ctx->fourcc_input == VA_FOURCC_NV12 || + proc_ctx->fourcc_input == VA_FOURCC_YV12 || + proc_ctx->fourcc_input == VA_FOURCC_YUY2 || + proc_ctx->fourcc_input == VA_FOURCC_AYUV) && + proc_ctx->fourcc_output == VA_FOURCC_RGBA) { + tran_coef[0] = 1.164; + tran_coef[1] = 0.000; + tran_coef[2] = 1.569; + tran_coef[3] = 1.164; + tran_coef[4] = -0.813; + tran_coef[5] = -0.392; + tran_coef[6] = 1.164; + tran_coef[7] = 2.017; + tran_coef[8] = 0.000; + + v_coef[0] = -16 * 4; + v_coef[1] = -128 * 4; + v_coef[2] = -128 * 4; + + is_transform_enabled = 1; + }else if(proc_ctx->fourcc_input != proc_ctx->fourcc_output){ + //enable when input and output format are different. + is_transform_enabled = 1; + } + + if(is_transform_enabled == 0){ + memset(p_table, 0, 8 * 4); + }else{ + *p_table ++ = ( 0 << 29 | //reserved + intel_format_convert(tran_coef[1], 2, 10, 1) << 16 | //c1, s2.10 format + intel_format_convert(tran_coef[0], 2, 10, 1) << 3 | //c0, s2.10 format + 0 << 2 | //reserved + 0 << 1 | // yuv_channel swap + is_transform_enabled); + + *p_table ++ = ( 0 << 26 | //reserved + intel_format_convert(tran_coef[3], 2, 10, 1) << 13 | + intel_format_convert(tran_coef[2], 2, 10, 1)); + + *p_table ++ = ( 0 << 26 | //reserved + intel_format_convert(tran_coef[5], 2, 10, 1) << 13 | + intel_format_convert(tran_coef[4], 2, 10, 1)); + + *p_table ++ = ( 0 << 26 | //reserved + intel_format_convert(tran_coef[7], 2, 10, 1) << 13 | + intel_format_convert(tran_coef[6], 2, 10, 1)); + + *p_table ++ = ( 0 << 13 | //reserved + intel_format_convert(tran_coef[8], 2, 10, 1)); + + *p_table ++ = ( 0 << 22 | //reserved + intel_format_convert(u_coef[0], 10, 0, 1) << 11 | + intel_format_convert(v_coef[0], 10, 0, 1)); + + *p_table ++ = ( 0 << 22 | //reserved + intel_format_convert(u_coef[1], 10, 0, 1) << 11 | + intel_format_convert(v_coef[1], 10, 0, 1)); + + *p_table ++ = ( 0 << 22 | //reserved + intel_format_convert(u_coef[2], 10, 0, 1) << 11 | + intel_format_convert(v_coef[2], 10, 0, 1)); + } +} + +void hsw_veb_iecp_aoi_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int *p_table = (unsigned int*)(proc_ctx->iecp_state_table.ptr + 252); + // VAProcFilterParameterBuffer * tcc_param = + // (VAProcFilterParameterBuffer *) proc_ctx->filter_iecp_tcc; + + if(!(proc_ctx->filters_mask & VPP_IECP_AOI)){ + memset(p_table, 0, 3 * 4); + }else{ + *p_table ++ = 0x00000000; + *p_table ++ = 0x00030000; + *p_table ++ = 0x00030000; + } +} + +void hsw_veb_state_table_setup(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + if(proc_ctx->filters_mask & VPP_DNDI_MASK) { + dri_bo *dndi_bo = proc_ctx->dndi_state_table.bo; + dri_bo_map(dndi_bo, 1); + proc_ctx->dndi_state_table.ptr = dndi_bo->virtual; + + hsw_veb_dndi_table(ctx, proc_ctx); + + dri_bo_unmap(dndi_bo); + } + + if(proc_ctx->filters_mask & VPP_IECP_MASK) { + dri_bo *iecp_bo = proc_ctx->iecp_state_table.bo; + dri_bo_map(iecp_bo, 1); + proc_ctx->iecp_state_table.ptr = iecp_bo->virtual; + + hsw_veb_iecp_std_table(ctx, proc_ctx); + hsw_veb_iecp_ace_table(ctx, proc_ctx); + hsw_veb_iecp_tcc_table(ctx, proc_ctx); + hsw_veb_iecp_pro_amp_table(ctx, proc_ctx); + hsw_veb_iecp_csc_table(ctx, proc_ctx); + hsw_veb_iecp_aoi_table(ctx, proc_ctx); + + dri_bo_unmap(iecp_bo); + } +} + +void hsw_veb_state_command(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + struct intel_batchbuffer *batch = proc_ctx->batch; + + BEGIN_VEB_BATCH(batch, 6); + OUT_VEB_BATCH(batch, VEB_STATE | (6 - 2)); + OUT_VEB_BATCH(batch, + 0 << 26 | // state surface control bits + 0 << 11 | // reserved. + 0 << 10 | // pipe sync disable + proc_ctx->current_output_type << 8 | // DI output frame + 1 << 7 | // 444->422 downsample method + 1 << 6 | // 422->420 downsample method + proc_ctx->is_first_frame << 5 | // DN/DI first frame + proc_ctx->is_di_enabled << 4 | // DI enable + proc_ctx->is_dn_enabled << 3 | // DN enable + proc_ctx->is_iecp_enabled << 2 | // global IECP enabled + 0 << 1 | // ColorGamutCompressionEnable + 0 ) ; // ColorGamutExpansionEnable. + + OUT_RELOC(batch, + proc_ctx->dndi_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_RELOC(batch, + proc_ctx->iecp_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_RELOC(batch, + proc_ctx->gamut_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_RELOC(batch, + proc_ctx->vertex_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + ADVANCE_VEB_BATCH(batch); +} + +void hsw_veb_surface_state(VADriverContextP ctx, struct intel_vebox_context *proc_ctx, unsigned int is_output) +{ + struct intel_batchbuffer *batch = proc_ctx->batch; + unsigned int u_offset_y = 0, v_offset_y = 0; + unsigned int is_uv_interleaved = 0, tiling = 0, swizzle = 0; + unsigned int surface_format = PLANAR_420_8; + struct object_surface* obj_surf = NULL; + unsigned int surface_pitch = 0; + unsigned int half_pitch_chroma = 0; + + if(is_output){ + obj_surf = proc_ctx->frame_store[FRAME_OUT_CURRENT].obj_surface; + }else { + obj_surf = proc_ctx->frame_store[FRAME_IN_CURRENT].obj_surface; + } + + assert(obj_surf->fourcc == VA_FOURCC_NV12 || + obj_surf->fourcc == VA_FOURCC_YUY2 || + obj_surf->fourcc == VA_FOURCC_AYUV || + obj_surf->fourcc == VA_FOURCC_RGBA); + + if (obj_surf->fourcc == VA_FOURCC_NV12) { + surface_format = PLANAR_420_8; + surface_pitch = obj_surf->width; + is_uv_interleaved = 1; + half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_YUY2) { + surface_format = YCRCB_NORMAL; + surface_pitch = obj_surf->width * 2; + is_uv_interleaved = 0; + half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_AYUV) { + surface_format = PACKED_444A_8; + surface_pitch = obj_surf->width * 4; + is_uv_interleaved = 0; + half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_RGBA) { + surface_format = R8G8B8A8_UNORM_SRGB; + surface_pitch = obj_surf->width * 4; + is_uv_interleaved = 0; + half_pitch_chroma = 0; + } + + u_offset_y = obj_surf->y_cb_offset; + v_offset_y = obj_surf->y_cr_offset; + + dri_bo_get_tiling(obj_surf->bo, &tiling, &swizzle); + + BEGIN_VEB_BATCH(batch, 6); + OUT_VEB_BATCH(batch, VEB_SURFACE_STATE | (6 - 2)); + OUT_VEB_BATCH(batch, + 0 << 1 | // reserved + is_output); // surface indentification. + + OUT_VEB_BATCH(batch, + (obj_surf->height - 1) << 18 | // height . w3 + (obj_surf->width -1 ) << 4 | // width + 0); // reserve + + OUT_VEB_BATCH(batch, + surface_format << 28 | // surface format, YCbCr420. w4 + is_uv_interleaved << 27 | // interleave chrome , two seperate palar + 0 << 20 | // reserved + (surface_pitch - 1) << 3 | // surface pitch, 64 align + half_pitch_chroma << 2 | // half pitch for chrome + !!tiling << 1 | // tiled surface, linear surface used + (tiling == I915_TILING_Y)); // tiled walk, ignored when liner surface + + OUT_VEB_BATCH(batch, + 0 << 29 | // reserved . w5 + 0 << 16 | // X offset for V(Cb) + 0 << 15 | // reserved + u_offset_y); // Y offset for V(Cb) + + OUT_VEB_BATCH(batch, + 0 << 29 | // reserved . w6 + 0 << 16 | // X offset for V(Cr) + 0 << 15 | // reserved + v_offset_y ); // Y offset for V(Cr) + + ADVANCE_VEB_BATCH(batch); +} + +void hsw_veb_dndi_iecp_command(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + struct intel_batchbuffer *batch = proc_ctx->batch; + unsigned char frame_ctrl_bits = 0; + const unsigned int width64 = ALIGN(proc_ctx->width_input, 64); + + /* s1:update the previous and current input */ +/* tempFrame = proc_ctx->frame_store[FRAME_IN_PREVIOUS]; + proc_ctx->frame_store[FRAME_IN_PREVIOUS] = proc_ctx->frame_store[FRAME_IN_CURRENT]; ; + proc_ctx->frame_store[FRAME_IN_CURRENT] = tempFrame; + + if(proc_ctx->surface_input_vebox != -1){ + vpp_surface_copy(ctx, proc_ctx->frame_store[FRAME_IN_CURRENT].surface_id, + proc_ctx->surface_input_vebox); + } else { + vpp_surface_copy(ctx, proc_ctx->frame_store[FRAME_IN_CURRENT].surface_id, + proc_ctx->surface_input); + } +*/ + /*s2: update the STMM input and output */ +/* tempFrame = proc_ctx->frame_store[FRAME_IN_STMM]; + proc_ctx->frame_store[FRAME_IN_STMM] = proc_ctx->frame_store[FRAME_OUT_STMM]; ; + proc_ctx->frame_store[FRAME_OUT_STMM] = tempFrame; +*/ + /*s3:set reloc buffer address */ + BEGIN_VEB_BATCH(batch, 10); + OUT_VEB_BATCH(batch, VEB_DNDI_IECP_STATE | (10 - 2)); + OUT_VEB_BATCH(batch, (width64 - 1)); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_IN_CURRENT].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, 0, frame_ctrl_bits); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_IN_PREVIOUS].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, 0, frame_ctrl_bits); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_IN_STMM].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, 0, frame_ctrl_bits); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_STMM].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_CURRENT_DN].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_CURRENT].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_PREVIOUS].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits); + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_STATISTIC].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits); + + ADVANCE_VEB_BATCH(batch); +} + +static void +frame_store_reset(VEBFrameStore *fs) +{ + fs->obj_surface = NULL; + fs->surface_id = VA_INVALID_ID; + fs->is_internal_surface = 0; + fs->is_scratch_surface = 0; +} + +static void +frame_store_clear(VEBFrameStore *fs, VADriverContextP ctx) +{ + if (fs->obj_surface && fs->is_scratch_surface) { + VASurfaceID surface_id = fs->obj_surface->base.id; + i965_DestroySurfaces(ctx, &surface_id, 1); + } + frame_store_reset(fs); +} + +static VAStatus +gen75_vebox_ensure_surfaces_storage(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_surface *input_obj_surface, *output_obj_surface; + unsigned int input_fourcc, output_fourcc; + unsigned int input_sampling, output_sampling; + unsigned int input_tiling, output_tiling; + unsigned int i, swizzle; + drm_intel_bo *bo; + VAStatus status; + + /* Determine input surface info. Use native VEBOX format whenever + possible. i.e. when the input surface format is not supported + by the VEBOX engine, then allocate a temporary surface (live + during the whole VPP pipeline lifetime) + + XXX: derive an actual surface format compatible with the input + surface chroma format */ + input_obj_surface = proc_ctx->surface_input_vebox_object ? + proc_ctx->surface_input_vebox_object : proc_ctx->surface_input_object; + if (input_obj_surface->bo) { + input_fourcc = input_obj_surface->fourcc; + input_sampling = input_obj_surface->subsampling; + dri_bo_get_tiling(input_obj_surface->bo, &input_tiling, &swizzle); + input_tiling = !!input_tiling; + } + else { + input_fourcc = VA_FOURCC_NV12; + input_sampling = SUBSAMPLE_YUV420; + input_tiling = 1; + status = i965_check_alloc_surface_bo(ctx, input_obj_surface, + input_tiling, input_fourcc, input_sampling); + if (status != VA_STATUS_SUCCESS) + return status; + } + + /* Determine output surface info. + + XXX: derive an actual surface format compatible with the input + surface chroma format */ + output_obj_surface = proc_ctx->surface_output_vebox_object ? + proc_ctx->surface_output_vebox_object : proc_ctx->surface_output_object; + if (output_obj_surface->bo) { + output_fourcc = output_obj_surface->fourcc; + output_sampling = output_obj_surface->subsampling; + dri_bo_get_tiling(output_obj_surface->bo, &output_tiling, &swizzle); + output_tiling = !!output_tiling; + } + else { + output_fourcc = VA_FOURCC_NV12; + output_sampling = SUBSAMPLE_YUV420; + output_tiling = 1; + status = i965_check_alloc_surface_bo(ctx, output_obj_surface, + output_tiling, output_fourcc, output_sampling); + if (status != VA_STATUS_SUCCESS) + return status; + } + + /* Update VEBOX pipeline formats */ + proc_ctx->fourcc_input = input_fourcc; + proc_ctx->fourcc_output = output_fourcc; + if (input_fourcc != output_fourcc) + proc_ctx->is_iecp_enabled = 1; // IECP needed for format conversion + + /* Create pipeline surfaces */ + for (i = 0; i < ARRAY_ELEMS(proc_ctx->frame_store); i ++) { + struct object_surface *obj_surface; + VASurfaceID new_surface; + + if (proc_ctx->frame_store[i].obj_surface) + continue; // user allocated surface, not VEBOX internal + + status = i965_CreateSurfaces(ctx, proc_ctx->width_input, + proc_ctx->height_input, VA_RT_FORMAT_YUV420, 1, &new_surface); + if (status != VA_STATUS_SUCCESS) + return status; + + obj_surface = SURFACE(new_surface); + assert(obj_surface != NULL); + + if (i <= FRAME_IN_PREVIOUS || i == FRAME_OUT_CURRENT_DN) { + status = i965_check_alloc_surface_bo(ctx, obj_surface, + input_tiling, input_fourcc, input_sampling); + } + else if (i == FRAME_IN_STMM || i == FRAME_OUT_STMM) { + status = i965_check_alloc_surface_bo(ctx, obj_surface, + 1, input_fourcc, input_sampling); + } + else if (i >= FRAME_OUT_CURRENT) { + status = i965_check_alloc_surface_bo(ctx, obj_surface, + output_tiling, output_fourcc, output_sampling); + } + if (status != VA_STATUS_SUCCESS) + return status; + + proc_ctx->frame_store[i].obj_surface = obj_surface; + proc_ctx->frame_store[i].is_internal_surface = 1; + proc_ctx->frame_store[i].is_scratch_surface = 1; + } + + /* Allocate DNDI state table */ + drm_intel_bo_unreference(proc_ctx->dndi_state_table.bo); + bo = drm_intel_bo_alloc(i965->intel.bufmgr, "vebox: dndi state Buffer", + 0x1000, 0x1000); + proc_ctx->dndi_state_table.bo = bo; + if (!bo) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + /* Allocate IECP state table */ + drm_intel_bo_unreference(proc_ctx->iecp_state_table.bo); + bo = drm_intel_bo_alloc(i965->intel.bufmgr, "vebox: iecp state Buffer", + 0x1000, 0x1000); + proc_ctx->iecp_state_table.bo = bo; + if (!bo) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + /* Allocate Gamut state table */ + drm_intel_bo_unreference(proc_ctx->gamut_state_table.bo); + bo = drm_intel_bo_alloc(i965->intel.bufmgr, "vebox: gamut state Buffer", + 0x1000, 0x1000); + proc_ctx->gamut_state_table.bo = bo; + if (!bo) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + /* Allocate vertex state table */ + drm_intel_bo_unreference(proc_ctx->vertex_state_table.bo); + bo = drm_intel_bo_alloc(i965->intel.bufmgr, "vebox: vertex state Buffer", + 0x1000, 0x1000); + proc_ctx->vertex_state_table.bo = bo; + if (!bo) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_vebox_ensure_surfaces(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + VEBFrameStore *ifs, *ofs; + bool is_new_frame = 0; + int i; + + /* Update the previous input surface */ + obj_surface = proc_ctx->surface_input_object; + + is_new_frame = proc_ctx->frame_store[FRAME_IN_CURRENT].surface_id != + obj_surface->base.id; + if (is_new_frame) { + ifs = &proc_ctx->frame_store[FRAME_IN_PREVIOUS]; + ofs = &proc_ctx->frame_store[proc_ctx->is_dn_enabled ? + FRAME_OUT_CURRENT_DN : FRAME_IN_CURRENT]; + do { + const VAProcPipelineParameterBuffer * const pipe = + proc_ctx->pipeline_param; + + if (pipe->num_forward_references < 1) + break; + if (pipe->forward_references[0] == VA_INVALID_ID) + break; + + obj_surface = SURFACE(pipe->forward_references[0]); + if (!obj_surface || obj_surface->base.id == ifs->surface_id) + break; + + frame_store_clear(ifs, ctx); + if (obj_surface->base.id == ofs->surface_id) { + *ifs = *ofs; + frame_store_reset(ofs); + } + else { + ifs->obj_surface = obj_surface; + ifs->surface_id = obj_surface->base.id; + ifs->is_internal_surface = 0; + ifs->is_scratch_surface = 0; + } + } while (0); + } + + /* Update the input surface */ + obj_surface = proc_ctx->surface_input_vebox_object ? + proc_ctx->surface_input_vebox_object : proc_ctx->surface_input_object; + + ifs = &proc_ctx->frame_store[FRAME_IN_CURRENT]; + frame_store_clear(ifs, ctx); + ifs->obj_surface = obj_surface; + ifs->surface_id = proc_ctx->surface_input_object->base.id; + ifs->is_internal_surface = proc_ctx->surface_input_vebox_object != NULL; + ifs->is_scratch_surface = 0; + + /* Update the Spatial Temporal Motion Measure (STMM) surfaces */ + if (is_new_frame) { + const VEBFrameStore tmpfs = proc_ctx->frame_store[FRAME_IN_STMM]; + proc_ctx->frame_store[FRAME_IN_STMM] = + proc_ctx->frame_store[FRAME_OUT_STMM]; + proc_ctx->frame_store[FRAME_OUT_STMM] = tmpfs; + } + + /* Reset the output surfaces to defaults. i.e. clean from user surfaces */ + for (i = FRAME_OUT_CURRENT_DN; i <= FRAME_OUT_PREVIOUS; i++) { + ofs = &proc_ctx->frame_store[i]; + if (!ofs->is_scratch_surface) + ofs->obj_surface = NULL; + ofs->surface_id = proc_ctx->surface_input_object->base.id; + } + + /* Update the output surfaces */ + obj_surface = proc_ctx->surface_output_vebox_object ? + proc_ctx->surface_output_vebox_object : proc_ctx->surface_output_object; + + proc_ctx->current_output_type = 2; + if (proc_ctx->filters_mask == VPP_DNDI_DN && !proc_ctx->is_iecp_enabled) + proc_ctx->current_output = FRAME_OUT_CURRENT_DN; + else if (proc_ctx->is_di_adv_enabled && !proc_ctx->is_first_frame) { + proc_ctx->current_output_type = 0; + proc_ctx->current_output = proc_ctx->is_second_field ? + FRAME_OUT_CURRENT : FRAME_OUT_PREVIOUS; + } + else + proc_ctx->current_output = FRAME_OUT_CURRENT; + ofs = &proc_ctx->frame_store[proc_ctx->current_output]; + frame_store_clear(ofs, ctx); + ofs->obj_surface = obj_surface; + ofs->surface_id = proc_ctx->surface_input_object->base.id; + ofs->is_internal_surface = proc_ctx->surface_output_vebox_object != NULL; + ofs->is_scratch_surface = 0; + + return VA_STATUS_SUCCESS; +} + +int hsw_veb_pre_format_convert(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + VAStatus va_status; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface* obj_surf_input = proc_ctx->surface_input_object; + struct object_surface* obj_surf_output = proc_ctx->surface_output_object; + struct object_surface* obj_surf_input_vebox; + struct object_surface* obj_surf_output_vebox; + + proc_ctx->format_convert_flags = 0; + + proc_ctx->width_input = obj_surf_input->orig_width; + proc_ctx->height_input = obj_surf_input->orig_height; + proc_ctx->width_output = obj_surf_output->orig_width; + proc_ctx->height_output = obj_surf_output->orig_height; + + /* only partial frame is not supported to be processed */ + /* + assert(proc_ctx->width_input == proc_ctx->pipeline_param->surface_region->width); + assert(proc_ctx->height_input == proc_ctx->pipeline_param->surface_region->height); + assert(proc_ctx->width_output == proc_ctx->pipeline_param->output_region->width); + assert(proc_ctx->height_output == proc_ctx->pipeline_param->output_region->height); + */ + + if(proc_ctx->width_output != proc_ctx->width_input || + proc_ctx->height_output != proc_ctx->height_input){ + proc_ctx->format_convert_flags |= POST_SCALING_CONVERT; + } + + /* convert the following format to NV12 format */ + if(obj_surf_input->fourcc == VA_FOURCC_YV12 || + obj_surf_input->fourcc == VA_FOURCC_I420 || + obj_surf_input->fourcc == VA_FOURCC_IMC1 || + obj_surf_input->fourcc == VA_FOURCC_IMC3 || + obj_surf_input->fourcc == VA_FOURCC_RGBA || + obj_surf_input->fourcc == VA_FOURCC_BGRA){ + + proc_ctx->format_convert_flags |= PRE_FORMAT_CONVERT; + + } else if(obj_surf_input->fourcc == VA_FOURCC_AYUV || + obj_surf_input->fourcc == VA_FOURCC_YUY2 || + obj_surf_input->fourcc == VA_FOURCC_NV12 || + obj_surf_input->fourcc == VA_FOURCC_P010){ + + // nothing to do here + } else { + /* not support other format as input */ + assert(0); + } + + if (proc_ctx->format_convert_flags & PRE_FORMAT_CONVERT) { + if(proc_ctx->surface_input_vebox_object == NULL){ + va_status = i965_CreateSurfaces(ctx, + proc_ctx->width_input, + proc_ctx->height_input, + VA_RT_FORMAT_YUV420, + 1, + &(proc_ctx->surface_input_vebox)); + assert(va_status == VA_STATUS_SUCCESS); + obj_surf_input_vebox = SURFACE(proc_ctx->surface_input_vebox); + assert(obj_surf_input_vebox); + + if (obj_surf_input_vebox) { + proc_ctx->surface_input_vebox_object = obj_surf_input_vebox; + i965_check_alloc_surface_bo(ctx, obj_surf_input_vebox, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + } + } + + vpp_surface_convert(ctx, proc_ctx->surface_input_object, proc_ctx->surface_input_vebox_object); + } + + /* create one temporary NV12 surfaces for conversion*/ + if(obj_surf_output->fourcc == VA_FOURCC_YV12 || + obj_surf_output->fourcc == VA_FOURCC_I420 || + obj_surf_output->fourcc == VA_FOURCC_IMC1 || + obj_surf_output->fourcc == VA_FOURCC_IMC3 || + obj_surf_output->fourcc == VA_FOURCC_RGBA || + obj_surf_output->fourcc == VA_FOURCC_BGRA) { + + proc_ctx->format_convert_flags |= POST_FORMAT_CONVERT; + } else if(obj_surf_output->fourcc == VA_FOURCC_AYUV || + obj_surf_output->fourcc == VA_FOURCC_YUY2 || + obj_surf_input->fourcc == VA_FOURCC_NV12 || + obj_surf_input->fourcc == VA_FOURCC_P010){ + + /* Nothing to do here */ + } else { + /* not support other format as input */ + assert(0); + } + + if(proc_ctx->format_convert_flags & POST_FORMAT_CONVERT || + proc_ctx->format_convert_flags & POST_SCALING_CONVERT){ + if(proc_ctx->surface_output_vebox_object == NULL){ + va_status = i965_CreateSurfaces(ctx, + proc_ctx->width_input, + proc_ctx->height_input, + VA_RT_FORMAT_YUV420, + 1, + &(proc_ctx->surface_output_vebox)); + assert(va_status == VA_STATUS_SUCCESS); + obj_surf_output_vebox = SURFACE(proc_ctx->surface_output_vebox); + assert(obj_surf_output_vebox); + + if (obj_surf_output_vebox) { + proc_ctx->surface_output_vebox_object = obj_surf_output_vebox; + i965_check_alloc_surface_bo(ctx, obj_surf_output_vebox, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + } + } + } + + if(proc_ctx->format_convert_flags & POST_SCALING_CONVERT){ + if(proc_ctx->surface_output_scaled_object == NULL){ + va_status = i965_CreateSurfaces(ctx, + proc_ctx->width_output, + proc_ctx->height_output, + VA_RT_FORMAT_YUV420, + 1, + &(proc_ctx->surface_output_scaled)); + assert(va_status == VA_STATUS_SUCCESS); + obj_surf_output_vebox = SURFACE(proc_ctx->surface_output_scaled); + assert(obj_surf_output_vebox); + + if (obj_surf_output_vebox) { + proc_ctx->surface_output_scaled_object = obj_surf_output_vebox; + i965_check_alloc_surface_bo(ctx, obj_surf_output_vebox, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + } + } + } + + return 0; +} + +int hsw_veb_post_format_convert(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + struct object_surface *obj_surface = NULL; + + obj_surface = proc_ctx->frame_store[proc_ctx->current_output].obj_surface; + + if (proc_ctx->format_convert_flags & POST_COPY_CONVERT) { + /* copy the saved frame in the second call */ + vpp_surface_convert(ctx, obj_surface, proc_ctx->surface_output_object); + } else if(!(proc_ctx->format_convert_flags & POST_FORMAT_CONVERT) && + !(proc_ctx->format_convert_flags & POST_SCALING_CONVERT)){ + /* Output surface format is covered by vebox pipeline and + * processed picture is already store in output surface + * so nothing will be done here */ + } else if ((proc_ctx->format_convert_flags & POST_FORMAT_CONVERT) && + !(proc_ctx->format_convert_flags & POST_SCALING_CONVERT)){ + /* convert and copy NV12 to YV12/IMC3/IMC2/RGBA output*/ + vpp_surface_convert(ctx, obj_surface, proc_ctx->surface_output_object); + + } else if(proc_ctx->format_convert_flags & POST_SCALING_CONVERT) { + VAProcPipelineParameterBuffer * const pipe = proc_ctx->pipeline_param; + /* scaling, convert and copy NV12 to YV12/IMC3/IMC2/RGBA output*/ + assert(obj_surface->fourcc == VA_FOURCC_NV12); + + /* first step :surface scaling */ + vpp_surface_scaling(ctx, obj_surface, + proc_ctx->surface_output_scaled_object, pipe->filter_flags); + + /* second step: color format convert and copy to output */ + obj_surface = proc_ctx->surface_output_object; + + if(obj_surface->fourcc == VA_FOURCC_NV12 || + obj_surface->fourcc == VA_FOURCC_YV12 || + obj_surface->fourcc == VA_FOURCC_I420 || + obj_surface->fourcc == VA_FOURCC_YUY2 || + obj_surface->fourcc == VA_FOURCC_IMC1 || + obj_surface->fourcc == VA_FOURCC_IMC3 || + obj_surface->fourcc == VA_FOURCC_RGBA) { + vpp_surface_convert(ctx, proc_ctx->surface_output_scaled_object, obj_surface); + }else { + assert(0); + } + } + + return 0; +} + +static VAStatus +gen75_vebox_init_pipe_params(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + const VAProcPipelineParameterBuffer * const pipe = proc_ctx->pipeline_param; + VAProcFilterParameterBuffer *filter; + unsigned int i; + + proc_ctx->filters_mask = 0; + for (i = 0; i < pipe->num_filters; i++) { + struct object_buffer * const obj_buffer = BUFFER(pipe->filters[i]); + + assert(obj_buffer && obj_buffer->buffer_store); + if (!obj_buffer || !obj_buffer->buffer_store) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + filter = (VAProcFilterParameterBuffer *) + obj_buffer->buffer_store->buffer; + switch (filter->type) { + case VAProcFilterNoiseReduction: + proc_ctx->filters_mask |= VPP_DNDI_DN; + proc_ctx->filter_dn = filter; + break; + case VAProcFilterDeinterlacing: + proc_ctx->filters_mask |= VPP_DNDI_DI; + proc_ctx->filter_di = filter; + break; + case VAProcFilterColorBalance: + proc_ctx->filters_mask |= VPP_IECP_PRO_AMP; + proc_ctx->filter_iecp_amp = filter; + proc_ctx->filter_iecp_amp_num_elements = obj_buffer->num_elements; + break; + case VAProcFilterSkinToneEnhancement: + proc_ctx->filters_mask |= VPP_IECP_STD_STE; + proc_ctx->filter_iecp_std = filter; + break; + default: + WARN_ONCE("unsupported filter (type: %d)\n", filter->type); + return VA_STATUS_ERROR_UNSUPPORTED_FILTER; + } + } + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen75_vebox_init_filter_params(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + proc_ctx->format_convert_flags = 0; /* initialized in hsw_veb_pre_format_convert() */ + + proc_ctx->is_iecp_enabled = (proc_ctx->filters_mask & VPP_IECP_MASK) != 0; + proc_ctx->is_dn_enabled = (proc_ctx->filters_mask & VPP_DNDI_DN) != 0; + proc_ctx->is_di_enabled = (proc_ctx->filters_mask & VPP_DNDI_DI) != 0; + proc_ctx->is_di_adv_enabled = 0; + proc_ctx->is_first_frame = 0; + proc_ctx->is_second_field = 0; + + if(!proc_ctx->is_di_enabled && !proc_ctx->is_dn_enabled) { + // MUST enable IECP if all DI&DN are disabled + proc_ctx->is_iecp_enabled = 1; + } + + /* Check whether we are deinterlacing the second field */ + if (proc_ctx->is_di_enabled) { + const VAProcFilterParameterBufferDeinterlacing * const deint_params = + proc_ctx->filter_di; + + const unsigned int tff = + !(deint_params->flags & VA_DEINTERLACING_BOTTOM_FIELD_FIRST); + const unsigned int is_top_field = + !(deint_params->flags & VA_DEINTERLACING_BOTTOM_FIELD); + + if ((tff ^ is_top_field) != 0) { + struct object_surface * const obj_surface = + proc_ctx->surface_input_object; + + if (proc_ctx->frame_store[FRAME_IN_CURRENT].surface_id != obj_surface->base.id) { + WARN_ONCE("invalid surface provided for second field\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + proc_ctx->is_second_field = 1; + } + } + + /* Check whether we are deinterlacing the first frame */ + if (proc_ctx->is_di_enabled) { + const VAProcFilterParameterBufferDeinterlacing * const deint_params = + proc_ctx->filter_di; + + switch (deint_params->algorithm) { + case VAProcDeinterlacingBob: + proc_ctx->is_first_frame = 1; + break; + case VAProcDeinterlacingMotionAdaptive: + case VAProcDeinterlacingMotionCompensated: + if (proc_ctx->frame_store[FRAME_IN_CURRENT].surface_id == VA_INVALID_ID) + proc_ctx->is_first_frame = 1; + else if (proc_ctx->is_second_field) { + /* At this stage, we have already deinterlaced the + first field successfully. So, the first frame flag + is trigerred if the previous field was deinterlaced + without reference frame */ + if (proc_ctx->frame_store[FRAME_IN_PREVIOUS].surface_id == VA_INVALID_ID) + proc_ctx->is_first_frame = 1; + } + else { + const VAProcPipelineParameterBuffer * const pipe = + proc_ctx->pipeline_param; + + if (pipe->num_forward_references < 1 || + pipe->forward_references[0] == VA_INVALID_ID) { + WARN_ONCE("A forward temporal reference is needed for Motion adaptive/compensated deinterlacing !!!\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + } + proc_ctx->is_di_adv_enabled = 1; + break; + default: + WARN_ONCE("unsupported deinterlacing algorithm (%d)\n", + deint_params->algorithm); + return VA_STATUS_ERROR_UNSUPPORTED_FILTER; + } + } + return VA_STATUS_SUCCESS; +} + +VAStatus +gen75_vebox_process_picture(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + VAStatus status; + + status = gen75_vebox_init_pipe_params(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + status = gen75_vebox_init_filter_params(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + hsw_veb_pre_format_convert(ctx, proc_ctx); + + status = gen75_vebox_ensure_surfaces(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + status = gen75_vebox_ensure_surfaces_storage(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + if (proc_ctx->format_convert_flags & POST_COPY_CONVERT) { + assert(proc_ctx->is_second_field); + /* directly copy the saved frame in the second call */ + } else { + intel_batchbuffer_start_atomic_veb(proc_ctx->batch, 0x1000); + intel_batchbuffer_emit_mi_flush(proc_ctx->batch); + hsw_veb_state_table_setup(ctx, proc_ctx); + hsw_veb_state_command(ctx, proc_ctx); + hsw_veb_surface_state(ctx, proc_ctx, INPUT_SURFACE); + hsw_veb_surface_state(ctx, proc_ctx, OUTPUT_SURFACE); + hsw_veb_dndi_iecp_command(ctx, proc_ctx); + intel_batchbuffer_end_atomic(proc_ctx->batch); + intel_batchbuffer_flush(proc_ctx->batch); + } + + hsw_veb_post_format_convert(ctx, proc_ctx); + + return VA_STATUS_SUCCESS; +} + +void gen75_vebox_context_destroy(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + int i; + + if(proc_ctx->surface_input_vebox != VA_INVALID_ID){ + i965_DestroySurfaces(ctx, &proc_ctx->surface_input_vebox, 1); + proc_ctx->surface_input_vebox = VA_INVALID_ID; + proc_ctx->surface_input_vebox_object = NULL; + } + + if(proc_ctx->surface_output_vebox != VA_INVALID_ID){ + i965_DestroySurfaces(ctx, &proc_ctx->surface_output_vebox, 1); + proc_ctx->surface_output_vebox = VA_INVALID_ID; + proc_ctx->surface_output_vebox_object = NULL; + } + + if(proc_ctx->surface_output_scaled != VA_INVALID_ID){ + i965_DestroySurfaces(ctx, &proc_ctx->surface_output_scaled, 1); + proc_ctx->surface_output_scaled = VA_INVALID_ID; + proc_ctx->surface_output_scaled_object = NULL; + } + + for (i = 0; i < ARRAY_ELEMS(proc_ctx->frame_store); i++) + frame_store_clear(&proc_ctx->frame_store[i], ctx); + + /* dndi state table */ + drm_intel_bo_unreference(proc_ctx->dndi_state_table.bo); + proc_ctx->dndi_state_table.bo = NULL; + + /* iecp state table */ + drm_intel_bo_unreference(proc_ctx->iecp_state_table.bo); + proc_ctx->iecp_state_table.bo = NULL; + + /* gamut statu table */ + drm_intel_bo_unreference(proc_ctx->gamut_state_table.bo); + proc_ctx->gamut_state_table.bo = NULL; + + /* vertex state table */ + drm_intel_bo_unreference(proc_ctx->vertex_state_table.bo); + proc_ctx->vertex_state_table.bo = NULL; + + intel_batchbuffer_free(proc_ctx->batch); + + free(proc_ctx); +} + +struct intel_vebox_context * gen75_vebox_context_init(VADriverContextP ctx) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct intel_vebox_context *proc_context = calloc(1, sizeof(struct intel_vebox_context)); + int i; + + assert(proc_context); + proc_context->batch = intel_batchbuffer_new(intel, I915_EXEC_VEBOX, 0); + + for (i = 0; i < ARRAY_ELEMS(proc_context->frame_store); i++) + proc_context->frame_store[i].surface_id = VA_INVALID_ID; + + proc_context->filters_mask = 0; + proc_context->surface_output_object = NULL; + proc_context->surface_input_object = NULL; + proc_context->surface_input_vebox = VA_INVALID_ID; + proc_context->surface_input_vebox_object = NULL; + proc_context->surface_output_vebox = VA_INVALID_ID; + proc_context->surface_output_vebox_object = NULL; + proc_context->surface_output_scaled = VA_INVALID_ID; + proc_context->surface_output_scaled_object = NULL; + proc_context->filters_mask = 0; + proc_context->format_convert_flags = 0; + + return proc_context; +} + +void bdw_veb_state_command(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + struct intel_batchbuffer *batch = proc_ctx->batch; + + BEGIN_VEB_BATCH(batch, 0xc); + OUT_VEB_BATCH(batch, VEB_STATE | (0xc - 2)); + OUT_VEB_BATCH(batch, + 0 << 25 | // state surface control bits + 0 << 23 | // reserved. + 0 << 22 | // gamut expansion position + 0 << 15 | // reserved. + 0 << 14 | // single slice vebox enable + 0 << 13 | // hot pixel filter enable + 0 << 12 | // alpha plane enable + 0 << 11 | // vignette enable + 0 << 10 | // demosaic enable + proc_ctx->current_output_type << 8 | // DI output frame + 1 << 7 | // 444->422 downsample method + 1 << 6 | // 422->420 downsample method + proc_ctx->is_first_frame << 5 | // DN/DI first frame + proc_ctx->is_di_enabled << 4 | // DI enable + proc_ctx->is_dn_enabled << 3 | // DN enable + proc_ctx->is_iecp_enabled << 2 | // global IECP enabled + 0 << 1 | // ColorGamutCompressionEnable + 0 ) ; // ColorGamutExpansionEnable. + + OUT_RELOC(batch, + proc_ctx->dndi_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_RELOC(batch, + proc_ctx->iecp_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_RELOC(batch, + proc_ctx->gamut_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_RELOC(batch, + proc_ctx->vertex_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_VEB_BATCH(batch, 0);/*caputre pipe state pointer*/ + OUT_VEB_BATCH(batch, 0); + + ADVANCE_VEB_BATCH(batch); +} + +void bdw_veb_dndi_iecp_command(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + struct intel_batchbuffer *batch = proc_ctx->batch; + unsigned char frame_ctrl_bits = 0; + const unsigned int width64 = ALIGN(proc_ctx->width_input, 64); + + BEGIN_VEB_BATCH(batch, 0x14); + OUT_VEB_BATCH(batch, VEB_DNDI_IECP_STATE | (0x14 - 2));//DWord 0 + OUT_VEB_BATCH(batch, (width64 - 1)); + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_IN_CURRENT].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, 0, frame_ctrl_bits);//DWord 2 + OUT_VEB_BATCH(batch,0);//DWord 3 + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_IN_PREVIOUS].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, 0, frame_ctrl_bits);//DWord 4 + OUT_VEB_BATCH(batch,0);//DWord 5 + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_IN_STMM].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, 0, frame_ctrl_bits);//DWord 6 + OUT_VEB_BATCH(batch,0);//DWord 7 + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_STMM].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits);//DWord 8 + OUT_VEB_BATCH(batch,0);//DWord 9 + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_CURRENT_DN].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits);//DWord 10 + OUT_VEB_BATCH(batch,0);//DWord 11 + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_CURRENT].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits);//DWord 12 + OUT_VEB_BATCH(batch,0);//DWord 13 + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_PREVIOUS].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits);//DWord 14 + OUT_VEB_BATCH(batch,0);//DWord 15 + + OUT_RELOC(batch, + proc_ctx->frame_store[FRAME_OUT_STATISTIC].obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, frame_ctrl_bits);//DWord 16 + OUT_VEB_BATCH(batch,0);//DWord 17 + + OUT_VEB_BATCH(batch,0);//DWord 18 + OUT_VEB_BATCH(batch,0);//DWord 19 + + ADVANCE_VEB_BATCH(batch); +} + +VAStatus +gen8_vebox_process_picture(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + VAStatus status; + + status = gen75_vebox_init_pipe_params(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + status = gen75_vebox_init_filter_params(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + hsw_veb_pre_format_convert(ctx, proc_ctx); + + status = gen75_vebox_ensure_surfaces(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + status = gen75_vebox_ensure_surfaces_storage(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + if (proc_ctx->format_convert_flags & POST_COPY_CONVERT) { + assert(proc_ctx->is_second_field); + /* directly copy the saved frame in the second call */ + } else { + intel_batchbuffer_start_atomic_veb(proc_ctx->batch, 0x1000); + intel_batchbuffer_emit_mi_flush(proc_ctx->batch); + hsw_veb_state_table_setup(ctx, proc_ctx); + bdw_veb_state_command(ctx, proc_ctx); + hsw_veb_surface_state(ctx, proc_ctx, INPUT_SURFACE); + hsw_veb_surface_state(ctx, proc_ctx, OUTPUT_SURFACE); + bdw_veb_dndi_iecp_command(ctx, proc_ctx); + intel_batchbuffer_end_atomic(proc_ctx->batch); + intel_batchbuffer_flush(proc_ctx->batch); + } + + hsw_veb_post_format_convert(ctx, proc_ctx); + + return VA_STATUS_SUCCESS; +} + + +void +skl_veb_dndi_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int* p_table ; + unsigned int progressive_dn = 1; + unsigned int dndi_top_first = 0; + unsigned int is_mcdi_enabled = 0; + + if (proc_ctx->is_di_enabled) { + const VAProcFilterParameterBufferDeinterlacing * const deint_params = + proc_ctx->filter_di; + + progressive_dn = 0; + + /* If we are in "First Frame" mode, i.e. past frames are not + available for motion measure, then don't use the TFF flag */ + dndi_top_first = !(deint_params->flags & (proc_ctx->is_first_frame ? + VA_DEINTERLACING_BOTTOM_FIELD : + VA_DEINTERLACING_BOTTOM_FIELD_FIRST)); + + is_mcdi_enabled = + (deint_params->algorithm == VAProcDeinterlacingMotionCompensated); + } + + /* + VAProcFilterParameterBufferDeinterlacing *di_param = + (VAProcFilterParameterBufferDeinterlacing *) proc_ctx->filter_di; + + VAProcFilterParameterBuffer * dn_param = + (VAProcFilterParameterBuffer *) proc_ctx->filter_dn; + */ + p_table = (unsigned int *)proc_ctx->dndi_state_table.ptr; + + *p_table ++ = ( 140 << 20 | // denoise stad threshold . w1 + 192 << 12 | // dnmh_history_max + 7 << 8 | // dnmh_delta[3:0] + 1 ); // denoise moving pixel threshold + + *p_table ++ = ( 38 << 20 | // denoise asd threshold + 0 << 10 | // temporal diff th + 0 ); // low temporal diff th + + *p_table ++ = ( progressive_dn << 28 | // progressive dn + 38 << 16 | // denoise th for sum of complexity measure + 32 << 10 | // dnmh_history_init[5:0] + 0 ); // reserved + + *p_table ++ = ( 0 << 28 | // hot pixel count + 0 << 20 | // hot pixel threshold + 1 << 12 | // block noise estimate edge threshold + 20 ); // block noise estimate noise threshold + + *p_table ++ = ( 140<< 16 | // chroma denoise stad threshold + 0 << 13 | // reserved + 1 << 12 | // chrome denoise enable + 13 << 6 | // chr temp diff th + 7 ); // chr temp diff low + + *p_table ++ = 0; // weight + + *p_table ++ = ( 0 << 16 | // dn_thmax + 0 ); // dn_thmin + + *p_table ++ = ( 0 << 16 | // dn_prt5 + 0 ); // dn_dyn_thmin + + *p_table ++ = ( 0 << 16 | // dn_prt4 + 0 ); // dn_prt3 + + *p_table ++ = ( 0 << 16 | // dn_prt2 + 0 ); // dn_prt1 + + *p_table ++ = ( 0 << 16 | // dn_prt0 + 0 << 10 | // dn_wd22 + 0 << 5 | // dh_wd21 + 0 ); // dh_wd20 + + *p_table ++ = ( 0 << 25 | // dn_wd12 + 0 << 20 | // dn_wd11 + 0 << 15 | // dn_wd10 + 0 << 10 | // dn_wd02 + 0 << 5 | // dn_wd01 + 0 ); // dn_wd00 + + *p_table ++ = ( 2 << 10 | // stmm c2 + 9 << 6 | // cat slope minus 1 + 5 << 2 | // sad tight threshold + 0 ); // smooth mv th + + *p_table ++ = ( 0 << 31 | // stmm blending constant select + 64 << 24 | // stmm trc1 + 125<< 16 | // stmm trc2 + 0 << 14 | // reserved + 30 << 8 | // multiplier for vecm + 150 ); // maximum stmm + + *p_table ++ = ( 118<< 24 | // minumum stmm + 0 << 22 | // stmm shift down + 1 << 20 | // stmm shift up + 5 << 16 | // stmm output shift + 100 << 8 | // sdi threshold + 5 ); // sdi delta + + *p_table ++ = ( 50 << 24 | // sdi fallback mode 1 t1 constant + 100 << 16 | // sdi fallback mode 1 t2 constant + 37 << 8 | // sdi fallback mode 2 constant(angle2x1) + 175 ); // fmd temporal difference threshold + + *p_table ++ = ( 16 << 24 | // fmd #1 vertical difference th . w7 + 100<< 16 | // fmd #2 vertical difference th + 0 << 14 | // cat threshold + 2 << 8 | // fmd tear threshold + is_mcdi_enabled << 7 | // mcdi enable, use motion compensated deinterlace algorithm + dndi_top_first << 3 | // dn/di top first + 0 ); // reserved + + *p_table ++ = ( 10 << 19 | // neighbor pixel threshold + 0 << 16 | // fmd for 2nd field of previous frame + 25 << 10 | // mc pixel consistency threshold + 0 << 8 | // fmd for 1st field for current frame + 10 << 4 | // sad thb + 5 ); // sad tha +} + +void skl_veb_iecp_csc_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int *p_table = (unsigned int*)(proc_ctx->iecp_state_table.ptr + 220); + float tran_coef[9] = {1.0, 0.0, 0.0, 0.0, 1.0, 0.0, 0.0, 0.0, 1.0}; + float v_coef[3] = {0.0, 0.0, 0.0}; + float u_coef[3] = {0.0, 0.0, 0.0}; + int is_transform_enabled = 0; + + if(!(proc_ctx->filters_mask & VPP_IECP_CSC)){ + memset(p_table, 0, 12 * 4); + return; + } + + if(proc_ctx->fourcc_input == VA_FOURCC_RGBA && + (proc_ctx->fourcc_output == VA_FOURCC_NV12 || + proc_ctx->fourcc_output == VA_FOURCC_YV12 || + proc_ctx->fourcc_output == VA_FOURCC_YVY2 || + proc_ctx->fourcc_output == VA_FOURCC_AYUV)) { + + tran_coef[0] = 0.257; + tran_coef[1] = 0.504; + tran_coef[2] = 0.098; + tran_coef[3] = -0.148; + tran_coef[4] = -0.291; + tran_coef[5] = 0.439; + tran_coef[6] = 0.439; + tran_coef[7] = -0.368; + tran_coef[8] = -0.071; + + u_coef[0] = 16 * 4; + u_coef[1] = 128 * 4; + u_coef[2] = 128 * 4; + + is_transform_enabled = 1; + }else if((proc_ctx->fourcc_input == VA_FOURCC_NV12 || + proc_ctx->fourcc_input == VA_FOURCC_YV12 || + proc_ctx->fourcc_input == VA_FOURCC_YUY2 || + proc_ctx->fourcc_input == VA_FOURCC_AYUV) && + proc_ctx->fourcc_output == VA_FOURCC_RGBA) { + tran_coef[0] = 1.164; + tran_coef[1] = 0.000; + tran_coef[2] = 1.569; + tran_coef[3] = 1.164; + tran_coef[4] = -0.813; + tran_coef[5] = -0.392; + tran_coef[6] = 1.164; + tran_coef[7] = 2.017; + tran_coef[8] = 0.000; + + v_coef[0] = -16 * 4; + v_coef[1] = -128 * 4; + v_coef[2] = -128 * 4; + + is_transform_enabled = 1; + }else if(proc_ctx->fourcc_input != proc_ctx->fourcc_output){ + //enable when input and output format are different. + is_transform_enabled = 1; + } + + if(is_transform_enabled == 0){ + memset(p_table, 0, 12 * 4); + }else{ + *p_table ++ = ( is_transform_enabled << 31 | + 0 << 29 | // yuv_channel swap + intel_format_convert(tran_coef[0], 2, 16, 1)); //c0, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[1], 2, 16, 1)); //c1, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[2], 2, 16, 1)); //c2, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[3], 2, 16, 1)); //c3, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[4], 2, 16, 1)); //c4, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[5], 2, 16, 1)); //c5, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[6], 2, 16, 1)); //c6, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[7], 2, 16, 1)); //c7, s2.16 format + + *p_table ++ = ( 0 << 19 | //reserved + intel_format_convert(tran_coef[8], 2, 16, 1)); //c8, s2.16 format + + *p_table ++ = ( intel_format_convert(u_coef[0], 16, 0, 1) << 16 | + intel_format_convert(v_coef[0], 16, 0, 1)); + + *p_table ++ = ( intel_format_convert(u_coef[1], 16, 0, 1) << 16 | + intel_format_convert(v_coef[1], 16, 0, 1)); + + *p_table ++ = ( intel_format_convert(u_coef[2], 16, 0, 1) << 16 | + intel_format_convert(v_coef[2], 16, 0, 1)); + } +} + +void skl_veb_iecp_aoi_table(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + unsigned int *p_table = (unsigned int*)(proc_ctx->iecp_state_table.ptr + 27 * sizeof(unsigned int)); + + if (!(proc_ctx->filters_mask & VPP_IECP_AOI)) { + memset(p_table, 0, 3 * 4); + } else { + *p_table ++ = 0x00000000; + *p_table ++ = 0x00030000; + *p_table ++ = 0x00030000; + } +} + +void skl_veb_state_table_setup(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + if(proc_ctx->filters_mask & VPP_DNDI_MASK) { + dri_bo *dndi_bo = proc_ctx->dndi_state_table.bo; + dri_bo_map(dndi_bo, 1); + proc_ctx->dndi_state_table.ptr = dndi_bo->virtual; + + skl_veb_dndi_table(ctx, proc_ctx); + + dri_bo_unmap(dndi_bo); + } + + if(proc_ctx->filters_mask & VPP_IECP_MASK) { + dri_bo *iecp_bo = proc_ctx->iecp_state_table.bo; + dri_bo_map(iecp_bo, 1); + proc_ctx->iecp_state_table.ptr = iecp_bo->virtual; + + hsw_veb_iecp_std_table(ctx, proc_ctx); + hsw_veb_iecp_ace_table(ctx, proc_ctx); + hsw_veb_iecp_tcc_table(ctx, proc_ctx); + hsw_veb_iecp_pro_amp_table(ctx, proc_ctx); + skl_veb_iecp_csc_table(ctx, proc_ctx); + skl_veb_iecp_aoi_table(ctx, proc_ctx); + + dri_bo_unmap(iecp_bo); + } +} + +void +skl_veb_state_command(VADriverContextP ctx, struct intel_vebox_context *proc_ctx) +{ + struct intel_batchbuffer *batch = proc_ctx->batch; + + BEGIN_VEB_BATCH(batch, 0x10); + OUT_VEB_BATCH(batch, VEB_STATE | (0x10 - 2)); + OUT_VEB_BATCH(batch, + 0 << 25 | // state surface control bits + 0 << 23 | // reserved. + 0 << 22 | // gamut expansion position + 0 << 15 | // reserved. + 0 << 14 | // single slice vebox enable + 0 << 13 | // hot pixel filter enable + 0 << 12 | // alpha plane enable + 0 << 11 | // vignette enable + 0 << 10 | // demosaic enable + proc_ctx->current_output_type << 8 | // DI output frame + 1 << 7 | // 444->422 downsample method + 1 << 6 | // 422->420 downsample method + proc_ctx->is_first_frame << 5 | // DN/DI first frame + proc_ctx->is_di_enabled << 4 | // DI enable + proc_ctx->is_dn_enabled << 3 | // DN enable + proc_ctx->is_iecp_enabled << 2 | // global IECP enabled + 0 << 1 | // ColorGamutCompressionEnable + 0 ) ; // ColorGamutExpansionEnable. + + OUT_RELOC(batch, + proc_ctx->dndi_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_RELOC(batch, + proc_ctx->iecp_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_RELOC(batch, + proc_ctx->gamut_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_RELOC(batch, + proc_ctx->vertex_state_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + OUT_VEB_BATCH(batch, 0); + + OUT_VEB_BATCH(batch, 0);/*caputre pipe state pointer*/ + OUT_VEB_BATCH(batch, 0); + + OUT_VEB_BATCH(batch, 0);/*lace lut table state pointer*/ + OUT_VEB_BATCH(batch, 0); + + OUT_VEB_BATCH(batch, 0);/*gamma correction values address*/ + OUT_VEB_BATCH(batch, 0); + + ADVANCE_VEB_BATCH(batch); +} + +void skl_veb_surface_state(VADriverContextP ctx, struct intel_vebox_context *proc_ctx, unsigned int is_output) +{ + struct intel_batchbuffer *batch = proc_ctx->batch; + unsigned int u_offset_y = 0, v_offset_y = 0; + unsigned int is_uv_interleaved = 0, tiling = 0, swizzle = 0; + unsigned int surface_format = PLANAR_420_8; + struct object_surface* obj_surf = NULL; + unsigned int surface_pitch = 0; + unsigned int half_pitch_chroma = 0; + unsigned int derived_pitch; + + if (is_output) { + obj_surf = proc_ctx->frame_store[FRAME_OUT_CURRENT].obj_surface; + } else { + obj_surf = proc_ctx->frame_store[FRAME_IN_CURRENT].obj_surface; + } + + assert(obj_surf->fourcc == VA_FOURCC_NV12 || + obj_surf->fourcc == VA_FOURCC_YUY2 || + obj_surf->fourcc == VA_FOURCC_AYUV || + obj_surf->fourcc == VA_FOURCC_RGBA || + obj_surf->fourcc == VA_FOURCC_P010); + + if (obj_surf->fourcc == VA_FOURCC_NV12) { + surface_format = PLANAR_420_8; + surface_pitch = obj_surf->width; + is_uv_interleaved = 1; + half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_YUY2) { + surface_format = YCRCB_NORMAL; + surface_pitch = obj_surf->width * 2; + is_uv_interleaved = 0; + half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_AYUV) { + surface_format = PACKED_444A_8; + surface_pitch = obj_surf->width * 4; + is_uv_interleaved = 0; + half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_RGBA) { + surface_format = R8G8B8A8_UNORM_SRGB; + surface_pitch = obj_surf->width * 4; + is_uv_interleaved = 0; + half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_P010) { + surface_format = PLANAR_420_16; + surface_pitch = obj_surf->width; + is_uv_interleaved = 1; + half_pitch_chroma = 0; + } + + derived_pitch = surface_pitch; + + u_offset_y = obj_surf->y_cb_offset; + v_offset_y = obj_surf->y_cr_offset; + + dri_bo_get_tiling(obj_surf->bo, &tiling, &swizzle); + + BEGIN_VEB_BATCH(batch, 9); + OUT_VEB_BATCH(batch, VEB_SURFACE_STATE | (9 - 2)); + OUT_VEB_BATCH(batch, + 0 << 1 | // reserved + is_output); // surface indentification. + + OUT_VEB_BATCH(batch, + (obj_surf->height - 1) << 18 | // height . w3 + (obj_surf->width -1 ) << 4 | // width + 0); // reserve + + OUT_VEB_BATCH(batch, + surface_format << 28 | // surface format, YCbCr420. w4 + is_uv_interleaved << 27 | // interleave chrome , two seperate palar + 0 << 20 | // reserved + (surface_pitch - 1) << 3 | // surface pitch, 64 align + half_pitch_chroma << 2 | // half pitch for chrome + !!tiling << 1 | // tiled surface, linear surface used + (tiling == I915_TILING_Y)); // tiled walk, ignored when liner surface + + OUT_VEB_BATCH(batch, + 0 << 16 | // X offset for V(Cb) + u_offset_y); // Y offset for V(Cb) + + OUT_VEB_BATCH(batch, + 0 << 16 | // X offset for V(Cr) + v_offset_y ); // Y offset for V(Cr) + + OUT_VEB_BATCH(batch, 0); + + OUT_VEB_BATCH(batch, derived_pitch - 1); + + OUT_VEB_BATCH(batch, 0); + + ADVANCE_VEB_BATCH(batch); +} + +VAStatus +gen9_vebox_process_picture(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx) +{ + VAStatus status; + + status = gen75_vebox_init_pipe_params(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + status = gen75_vebox_init_filter_params(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + hsw_veb_pre_format_convert(ctx, proc_ctx); + + status = gen75_vebox_ensure_surfaces(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + status = gen75_vebox_ensure_surfaces_storage(ctx, proc_ctx); + if (status != VA_STATUS_SUCCESS) + return status; + + if (proc_ctx->format_convert_flags & POST_COPY_CONVERT) { + assert(proc_ctx->is_second_field); + /* directly copy the saved frame in the second call */ + } else { + intel_batchbuffer_start_atomic_veb(proc_ctx->batch, 0x1000); + intel_batchbuffer_emit_mi_flush(proc_ctx->batch); + skl_veb_state_table_setup(ctx, proc_ctx); + skl_veb_state_command(ctx, proc_ctx); + skl_veb_surface_state(ctx, proc_ctx, INPUT_SURFACE); + skl_veb_surface_state(ctx, proc_ctx, OUTPUT_SURFACE); + bdw_veb_dndi_iecp_command(ctx, proc_ctx); + intel_batchbuffer_end_atomic(proc_ctx->batch); + intel_batchbuffer_flush(proc_ctx->batch); + } + + hsw_veb_post_format_convert(ctx, proc_ctx); + + return VA_STATUS_SUCCESS; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen75_vpp_vebox.h intel-vaapi-driver-1.7.1/src/gen75_vpp_vebox.h --- intel-vaapi-driver-1.0.15/src/gen75_vpp_vebox.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen75_vpp_vebox.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,170 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Li Xiaowei + * + */ + +#ifndef _GEN75_VPP_VEBOX_H +#define _GEN75_VPP_VEBOX_H + +#include +#include +#include +#include +#include +#include "i965_drv_video.h" + +#include "i965_post_processing.h" + +#define INPUT_SURFACE 0 +#define OUTPUT_SURFACE 1 + +#define VPP_DNDI_DN 0x00000001 +#define VPP_DNDI_DI 0x00000002 +#define VPP_DNDI_MASK 0x000000ff +#define VPP_IECP_STD_STE 0x00000100 +#define VPP_IECP_ACE 0x00000200 +#define VPP_IECP_TCC 0x00000400 +#define VPP_IECP_PRO_AMP 0x00000800 +#define VPP_IECP_CSC 0x00001000 +#define VPP_IECP_AOI 0x00002000 +#define VPP_IECP_MASK 0x0000ff00 +#define MAX_FILTER_SUM 8 + +#define PRE_FORMAT_CONVERT 0x01 +#define POST_FORMAT_CONVERT 0x02 +#define POST_SCALING_CONVERT 0x04 +#define POST_COPY_CONVERT 0x08 + +enum { + FRAME_IN_CURRENT = 0, + FRAME_IN_PREVIOUS, + FRAME_IN_STMM, + FRAME_OUT_STMM, + FRAME_OUT_CURRENT_DN, + FRAME_OUT_CURRENT, + FRAME_OUT_PREVIOUS, + FRAME_OUT_STATISTIC, + FRAME_STORE_COUNT, +}; + +enum SURFACE_FORMAT{ + YCRCB_NORMAL = 0, + YCRCB_SWAPUVY, + YCRCB_SWAPUV, + YCRCB_SWAPY, + PLANAR_420_8, //NV12 + PACKED_444A_8, + PACKED_422_16, + R10G10B10A2_UNORM_SRGB, + R8G8B8A8_UNORM_SRGB, + PACKED_444_16, + PLANAR_422_16, + Y8_UNORM, + PLANAR_420_16, + R16G16B16A16, + SURFACE_FORMAT_SUM +}; + +typedef struct veb_frame_store { + struct object_surface *obj_surface; + VASurfaceID surface_id; /* always relative to the input surface */ + unsigned int is_internal_surface : 1; + unsigned int is_scratch_surface : 1; +} VEBFrameStore; + +typedef struct veb_buffer { + dri_bo *bo; + void * ptr; + unsigned char valid; +} VEBBuffer; + +struct intel_vebox_context +{ + struct intel_batchbuffer *batch; + + struct object_surface *surface_input_object; + struct object_surface *surface_output_object; + VASurfaceID surface_input_vebox; + struct object_surface *surface_input_vebox_object; + VASurfaceID surface_output_vebox; + struct object_surface *surface_output_vebox_object; + VASurfaceID surface_output_scaled; + struct object_surface *surface_output_scaled_object; + + unsigned int fourcc_input; + unsigned int fourcc_output; + + int width_input; + int height_input; + int width_output; + int height_output; + + VEBFrameStore frame_store[FRAME_STORE_COUNT]; + + VEBBuffer dndi_state_table; + VEBBuffer iecp_state_table; + VEBBuffer gamut_state_table; + VEBBuffer vertex_state_table; + + unsigned int filters_mask; + int current_output; + int current_output_type; /* 0:Both, 1:Previous, 2:Current */ + + VAProcPipelineParameterBuffer * pipeline_param; + void * filter_dn; + void * filter_di; + void * filter_iecp_std; + void * filter_iecp_ace; + void * filter_iecp_tcc; + void * filter_iecp_amp; + + unsigned int filter_iecp_amp_num_elements; + unsigned char format_convert_flags; + + /* Temporary flags live until the current picture is processed */ + unsigned int is_iecp_enabled : 1; + unsigned int is_dn_enabled : 1; + unsigned int is_di_enabled : 1; + unsigned int is_di_adv_enabled : 1; + unsigned int is_first_frame : 1; + unsigned int is_second_field : 1; +}; + +VAStatus gen75_vebox_process_picture(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx); + +void gen75_vebox_context_destroy(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx); + +struct intel_vebox_context * gen75_vebox_context_init(VADriverContextP ctx); + +VAStatus gen8_vebox_process_picture(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx); + +VAStatus gen9_vebox_process_picture(VADriverContextP ctx, + struct intel_vebox_context *proc_ctx); + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/gen7_mfc.c intel-vaapi-driver-1.7.1/src/gen7_mfc.c --- intel-vaapi-driver-1.0.15/src/gen7_mfc.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen7_mfc.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,1169 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhou Chang + * Xiang, Haihao + * + */ + +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "gen6_mfc.h" +#include "gen6_vme.h" + +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +extern void +gen6_mfc_pipe_buf_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); +extern void +gen6_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); +extern void +gen6_mfc_init(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern VAStatus +gen6_mfc_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern VAStatus +gen6_mfc_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int *encoded_bits_size); + +extern VAStatus +gen6_mfc_avc_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +static const uint32_t gen7_mfc_batchbuffer_avc_intra[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_intra.g7b" +}; + +static const uint32_t gen7_mfc_batchbuffer_avc_inter[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_inter.g7b" +}; + +static struct i965_kernel gen7_mfc_kernels[] = { + { + "MFC AVC INTRA BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTRA, + gen7_mfc_batchbuffer_avc_intra, + sizeof(gen7_mfc_batchbuffer_avc_intra), + NULL + }, + + { + "MFC AVC INTER BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTER, + gen7_mfc_batchbuffer_avc_inter, + sizeof(gen7_mfc_batchbuffer_avc_inter), + NULL + }, +}; + +static void +gen7_mfc_pipe_mode_select(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC); + + BEGIN_BCS_BATCH(batch, 5); + + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Must be long format for encoder */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (1 << 10) | /* Stream-Out Enable */ + ((!!mfc_context->post_deblocking_output.bo) << 9) | /* Post Deblocking Output */ + ((!!mfc_context->pre_deblocking_output.bo) << 8) | /* Pre Deblocking Output */ + (0 << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (1 << 4) | /* encoding mode */ + (standard_select << 0)); /* standard select: avc or mpeg2 */ + OUT_BCS_BATCH(batch, + (0 << 7) | /* expand NOA bus flag */ + (0 << 6) | /* disable slice-level clock gating */ + (0 << 5) | /* disable clock gating for NOA */ + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_surface_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((mfc_context->surface_state.height - 1) << 18) | + ((mfc_context->surface_state.width - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((mfc_context->surface_state.w_pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (mfc_context->surface_state.h_pitch)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* MFX Indirect MV Object Base Address */ + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /*MFC Indirect PAK-BSE Object Base Address for Encoder*/ + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.end_offset); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_avc_img_state(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + + BEGIN_BCS_BATCH(batch, 16); + + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + /*DW1 frame size */ + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs - 1) & 0xFFFF)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + /*DW3 Qp setting */ + OUT_BCS_BATCH(batch, + (0 << 24) | /* Second Chroma QP Offset */ + (0 << 16) | /* Chroma QP Offset */ + (0 << 14) | /* Max-bit conformance Intra flag */ + (0 << 13) | /* Max Macroblock size conformance Inter flag */ + (pPicParameter->pic_fields.bits.weighted_pred_flag << 12) | /*Weighted_Pred_Flag */ + (pPicParameter->pic_fields.bits.weighted_bipred_idc << 10) | /* Weighted_BiPred_Idc */ + (0 << 8) | /* FIXME: Image Structure */ + (0 << 0) ); /* Current Decoed Image Frame Store ID, reserved in Encode mode */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* Mininum Frame size */ + (0 << 15) | /* Disable reading of Macroblock Status Buffer */ + (0 << 14) | /* Load BitStream Pointer only once, 1 slic 1 frame */ + (0 << 13) | /* CABAC 0 word insertion test enable */ + (1 << 12) | /* MVUnpackedEnable,compliant to DXVA */ + (1 << 10) | /* Chroma Format IDC, 4:2:0 */ + (0 << 9) | /* FIXME: MbMvFormatFlag */ + (pPicParameter->pic_fields.bits.entropy_coding_mode_flag << 7) | /*0:CAVLC encoding mode,1:CABAC*/ + (0 << 6) | /* Only valid for VLD decoding mode */ + (0 << 5) | /* Constrained Intra Predition Flag, from PPS */ + (0 << 4) | /* Direct 8x8 inference flag */ + (pPicParameter->pic_fields.bits.transform_8x8_mode_flag << 3) | /*8x8 or 4x4 IDCT Transform Mode Flag*/ + (1 << 2) | /* Frame MB only flag */ + (0 << 1) | /* MBAFF mode is in active */ + (0 << 0)); /* Field picture flag */ + /*DW5 trequllis quantization */ + OUT_BCS_BATCH(batch, 0); /* Mainly about MB rate control and debug, just ignoring */ + OUT_BCS_BATCH(batch, /* Inter and Intra Conformance Max size limit */ + (0xBB8 << 16) | /* InterMbMaxSz */ + (0xEE8) ); /* IntraMbMaxSz */ + /* DW7 */ + OUT_BCS_BATCH(batch, 0); /* Reserved */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + /* DW10 frame bit setting */ + OUT_BCS_BATCH(batch, 0x8C000000); + OUT_BCS_BATCH(batch, 0x00010000); + OUT_BCS_BATCH(batch, 0); + /* DW13 Ref setting */ + OUT_BCS_BATCH(batch, 0x02010100); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_qm_state(VADriverContextP ctx, + int qm_type, + unsigned int *qm, + int qm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16); + assert(sizeof(*qm) == 4); + memcpy(qm_buffer, qm, qm_length * 4); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_avc_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[16] = { + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010 + }; + + gen7_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 12, encoder_context); + gen7_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 12, encoder_context); + gen7_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 16, encoder_context); + gen7_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 16, encoder_context); +} + +static void +gen7_mfc_fqm_state(VADriverContextP ctx, + int fqm_type, + unsigned int *fqm, + int fqm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int fqm_buffer[32]; + + assert(fqm_length <= 32); + assert(sizeof(*fqm) == 4); + memcpy(fqm_buffer, fqm, fqm_length * 4); + + BEGIN_BCS_BATCH(batch, 34); + OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2)); + OUT_BCS_BATCH(batch, fqm_type << 0); + intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_avc_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[32] = { + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000 + }; + + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 24, encoder_context); + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 24, encoder_context); + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 32, encoder_context); + gen7_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 32, encoder_context); +} + +static void +gen7_mfc_avc_insert_object(VADriverContextP ctx, struct intel_encoder_context *encoder_context, + unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag, + struct intel_batchbuffer *batch) +{ + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, lenght_in_dws + 2); + + OUT_BCS_BATCH(batch, MFX_INSERT_OBJECT | (lenght_in_dws + 2 - 2)); + OUT_BCS_BATCH(batch, + (0 << 16) | /* always start at offset 0 */ + (data_bits_in_last_dw << 8) | + (skip_emul_byte_count << 4) | + (!!emulation_flag << 3) | + ((!!is_last_header) << 2) | + ((!!is_end_of_slice) << 1) | + (0 << 0)); /* FIXME: ??? */ + intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4); + + ADVANCE_BCS_BATCH(batch); +} + +static const int +va_to_gen7_mpeg2_picture_type[3] = { + 1, /* I */ + 2, /* P */ + 3 /* B */ +}; + +static void +gen7_mfc_mpeg2_pic_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct encode_state *encode_state) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferMPEG2 *pic_param; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + VAEncSliceParameterBufferMPEG2 *slice_param = NULL; + + assert(encode_state->pic_param_ext && encode_state->pic_param_ext->buffer); + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + (pic_param->f_code[1][1] & 0xf) << 28 | /* f_code[1][1] */ + (pic_param->f_code[1][0] & 0xf) << 24 | /* f_code[1][0] */ + (pic_param->f_code[0][1] & 0xf) << 20 | /* f_code[0][1] */ + (pic_param->f_code[0][0] & 0xf) << 16 | /* f_code[0][0] */ + pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | + pic_param->picture_coding_extension.bits.picture_structure << 12 | + pic_param->picture_coding_extension.bits.top_field_first << 11 | + pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | + pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | + pic_param->picture_coding_extension.bits.q_scale_type << 8 | + pic_param->picture_coding_extension.bits.intra_vlc_format << 7 | + pic_param->picture_coding_extension.bits.alternate_scan << 6); + OUT_BCS_BATCH(batch, + 0 << 14 | /* LoadSlicePointerFlag, 0 means only loading bitstream pointer once */ + va_to_gen7_mpeg2_picture_type[pic_param->picture_type] << 9 | + 0); + OUT_BCS_BATCH(batch, + 1 << 31 | /* slice concealment */ + (height_in_mbs - 1) << 16 | + (width_in_mbs - 1)); + + if (slice_param && slice_param->quantiser_scale_code >= 14) + OUT_BCS_BATCH(batch, (3 << 1) | (1 << 4) | (5 << 8) | (1 << 12)); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + 0xFFF << 16 | /* InterMBMaxSize */ + 0xFFF << 0 | /* IntraMBMaxSize */ + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfc_mpeg2_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned char intra_qm[64] = { + 8, 16, 19, 22, 26, 27, 29, 34, + 16, 16, 22, 24, 27, 29, 34, 37, + 19, 22, 26, 27, 29, 34, 34, 38, + 22, 22, 26, 27, 29, 34, 37, 40, + 22, 26, 27, 29, 32, 35, 40, 48, + 26, 27, 29, 32, 35, 40, 48, 58, + 26, 27, 29, 34, 38, 46, 56, 69, + 27, 29, 35, 38, 46, 56, 69, 83 + }; + + unsigned char non_intra_qm[64] = { + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16 + }; + + gen7_mfc_qm_state(ctx, MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX, (unsigned int *)intra_qm, 16, encoder_context); + gen7_mfc_qm_state(ctx, MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX, (unsigned int *)non_intra_qm, 16,encoder_context); +} + +static void +gen7_mfc_mpeg2_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned short intra_fqm[64] = { + 65536/0x8, 65536/0x10, 65536/0x13, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, + 65536/0x10, 65536/0x10, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1b, 65536/0x1b, 65536/0x1d, + 65536/0x13, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, 65536/0x1d, 65536/0x1d, 65536/0x23, + 65536/0x16, 65536/0x18, 65536/0x1b, 65536/0x1b, 65536/0x13, 65536/0x20, 65536/0x22, 65536/0x26, + 65536/0x1a, 65536/0x1b, 65536/0x13, 65536/0x13, 65536/0x20, 65536/0x23, 65536/0x26, 65536/0x2e, + 65536/0x1b, 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x23, 65536/0x28, 65536/0x2e, 65536/0x38, + 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x25, 65536/0x28, 65536/0x30, 65536/0x38, 65536/0x45, + 65536/0x22, 65536/0x25, 65536/0x26, 65536/0x28, 65536/0x30, 65536/0x3a, 65536/0x45, 65536/0x53, + }; + + unsigned short non_intra_fqm[64] = { + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + }; + + gen7_mfc_fqm_state(ctx, MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX, (unsigned int *)intra_fqm, 32, encoder_context); + gen7_mfc_fqm_state(ctx, MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX, (unsigned int *)non_intra_fqm, 32, encoder_context); +} + +static void +gen7_mfc_mpeg2_slicegroup_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + int x, int y, + int next_x, int next_y, + int is_fisrt_slice_group, + int is_last_slice_group, + int intra_slice, + int qp, + struct intel_batchbuffer *batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 8); + + OUT_BCS_BATCH(batch, MFC_MPEG2_SLICEGROUP_STATE | (8 - 2)); + OUT_BCS_BATCH(batch, + 0 << 31 | /* MbRateCtrlFlag */ + !!is_last_slice_group << 19 | /* IsLastSliceGrp */ + 1 << 17 | /* Insert Header before the first slice group data */ + 1 << 16 | /* SliceData PresentFlag: always 1 */ + 1 << 15 | /* TailPresentFlag: always 1 */ + 0 << 14 | /* FirstSliceHdrDisabled: slice header for each slice */ + !!intra_slice << 13 | /* IntraSlice */ + !!intra_slice << 12 | /* IntraSliceFlag */ + 0); + OUT_BCS_BATCH(batch, + next_y << 24 | + next_x << 16 | + y << 8 | + x << 0 | + 0); + OUT_BCS_BATCH(batch, qp); /* FIXME: SliceGroupQp */ + /* bitstream pointer is only loaded once for the first slice of a frame when + * LoadSlicePointerFlag is 0 + */ + OUT_BCS_BATCH(batch, mfc_context->mfc_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, 0); /* FIXME: */ + OUT_BCS_BATCH(batch, 0); /* FIXME: CorrectPoints */ + OUT_BCS_BATCH(batch, 0); /* FIXME: CVxxx */ + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen7_mfc_mpeg2_pak_object_intra(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + int x, int y, + int first_mb_in_slice, + int last_mb_in_slice, + int first_mb_in_slice_group, + int last_mb_in_slice_group, + int mb_type, + int qp_scale_code, + int coded_block_pattern, + unsigned char target_size_in_word, + unsigned char max_size_in_word, + struct intel_batchbuffer *batch) +{ + int len_in_dwords = 9; + + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_MPEG2_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, + 0 << 24 | /* PackedMvNum */ + 0 << 20 | /* MvFormat */ + 7 << 17 | /* CbpDcY/CbpDcU/CbpDcV */ + 0 << 15 | /* TransformFlag: frame DCT */ + 0 << 14 | /* FieldMbFlag */ + 1 << 13 | /* IntraMbFlag */ + mb_type << 8 | /* MbType: Intra */ + 0 << 2 | /* SkipMbFlag */ + 0 << 0 | /* InterMbMode */ + 0); + OUT_BCS_BATCH(batch, y << 16 | x); + OUT_BCS_BATCH(batch, + max_size_in_word << 24 | + target_size_in_word << 16 | + coded_block_pattern << 6 | /* CBP */ + 0); + OUT_BCS_BATCH(batch, + last_mb_in_slice << 31 | + first_mb_in_slice << 30 | + 0 << 27 | /* EnableCoeffClamp */ + last_mb_in_slice_group << 26 | + 0 << 25 | /* MbSkipConvDisable */ + first_mb_in_slice_group << 24 | + 0 << 16 | /* MvFieldSelect */ + qp_scale_code << 0 | + 0); + OUT_BCS_BATCH(batch, 0); /* MV[0][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[0][1] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][1] */ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +#define MV_OFFSET_IN_WORD 112 + +static struct _mv_ranges +{ + int low; /* in the unit of 1/2 pixel */ + int high; /* in the unit of 1/2 pixel */ +} mv_ranges[] = { + {0, 0}, + {-16, 15}, + {-32, 31}, + {-64, 63}, + {-128, 127}, + {-256, 255}, + {-512, 511}, + {-1024, 1023}, + {-2048, 2047}, + {-4096, 4095} +}; + +static int +mpeg2_motion_vector(int mv, int pos, int display_max, int f_code) +{ + if (mv + pos * 16 * 2 < 0 || + mv + (pos + 1) * 16 * 2 > display_max * 2) + mv = 0; + + if (f_code > 0 && f_code < 10) { + if (mv < mv_ranges[f_code].low) + mv = mv_ranges[f_code].low; + + if (mv > mv_ranges[f_code].high) + mv = mv_ranges[f_code].high; + } + + return mv; +} + +static int +gen7_mfc_mpeg2_pak_object_inter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + unsigned int *msg, + int width_in_mbs, int height_in_mbs, + int x, int y, + int first_mb_in_slice, + int last_mb_in_slice, + int first_mb_in_slice_group, + int last_mb_in_slice_group, + int qp_scale_code, + unsigned char target_size_in_word, + unsigned char max_size_in_word, + struct intel_batchbuffer *batch) +{ + VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + int len_in_dwords = 9; + short *mvptr, mvx0, mvy0, mvx1, mvy1; + + if (batch == NULL) + batch = encoder_context->base.batch; + + mvptr = (short *)msg; + mvx0 = mpeg2_motion_vector(mvptr[0] / 2, x, width_in_mbs * 16, pic_param->f_code[0][0]); + mvy0 = mpeg2_motion_vector(mvptr[1] / 2, y, height_in_mbs * 16, pic_param->f_code[0][0]); + mvx1 = mpeg2_motion_vector(mvptr[2] / 2, x, width_in_mbs * 16, pic_param->f_code[1][0]); + mvy1 = mpeg2_motion_vector(mvptr[3] / 2, y, height_in_mbs * 16, pic_param->f_code[1][0]); + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_MPEG2_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, + 2 << 24 | /* PackedMvNum */ + 7 << 20 | /* MvFormat */ + 7 << 17 | /* CbpDcY/CbpDcU/CbpDcV */ + 0 << 15 | /* TransformFlag: frame DCT */ + 0 << 14 | /* FieldMbFlag */ + 0 << 13 | /* IntraMbFlag */ + 1 << 8 | /* MbType: Frame-based */ + 0 << 2 | /* SkipMbFlag */ + 0 << 0 | /* InterMbMode */ + 0); + OUT_BCS_BATCH(batch, y << 16 | x); + OUT_BCS_BATCH(batch, + max_size_in_word << 24 | + target_size_in_word << 16 | + 0x3f << 6 | /* CBP */ + 0); + OUT_BCS_BATCH(batch, + last_mb_in_slice << 31 | + first_mb_in_slice << 30 | + 0 << 27 | /* EnableCoeffClamp */ + last_mb_in_slice_group << 26 | + 0 << 25 | /* MbSkipConvDisable */ + first_mb_in_slice_group << 24 | + 0 << 16 | /* MvFieldSelect */ + qp_scale_code << 0 | + 0); + + OUT_BCS_BATCH(batch, (mvx0 & 0xFFFF) | mvy0 << 16); /* MV[0][0] */ + OUT_BCS_BATCH(batch, (mvx1 & 0xFFFF) | mvy1 << 16); /* MV[1][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[0][1] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][1] */ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static void +gen7_mfc_mpeg2_pipeline_header_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderMPEG2_SPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 5, /* FIXME: check it */ + 0, + 0, + 0, /* Needn't insert emulation bytes for MPEG-2 */ + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderMPEG2_PPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 5, /* FIXME: check it */ + 0, + 0, + 0, /* Needn't insert emulation bytes for MPEG-2 */ + slice_batch); + } +} + +static void +gen7_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + VAEncSliceParameterBufferMPEG2 *next_slice_group_param, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferMPEG2 *slice_param = NULL; + unsigned char tail_delimiter[] = {MPEG2_DELIMITER0, MPEG2_DELIMITER1, MPEG2_DELIMITER2, MPEG2_DELIMITER3, MPEG2_DELIMITER4, 0, 0, 0}; + unsigned char section_delimiter[] = {0x0, 0x0, 0x0, 0x0}; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + int i, j; + int h_start_pos, v_start_pos, h_next_start_pos, v_next_start_pos; + unsigned int *msg = NULL; + unsigned char *msg_ptr = NULL; + + slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[slice_index]->buffer; + h_start_pos = slice_param->macroblock_address % width_in_mbs; + v_start_pos = slice_param->macroblock_address / width_in_mbs; + assert(h_start_pos + slice_param->num_macroblocks <= width_in_mbs); + + dri_bo_map(vme_context->vme_output.bo , 0); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + + if (next_slice_group_param) { + h_next_start_pos = next_slice_group_param->macroblock_address % width_in_mbs; + v_next_start_pos = next_slice_group_param->macroblock_address / width_in_mbs; + } else { + h_next_start_pos = 0; + v_next_start_pos = height_in_mbs; + } + + gen7_mfc_mpeg2_slicegroup_state(ctx, + encoder_context, + h_start_pos, + v_start_pos, + h_next_start_pos, + v_next_start_pos, + slice_index == 0, + next_slice_group_param == NULL, + slice_param->is_intra_slice, + slice_param->quantiser_scale_code, + slice_batch); + + if (slice_index == 0) + gen7_mfc_mpeg2_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + /* Insert '00' to make sure the header is valid */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int*)section_delimiter, + 1, + 8, /* 8bits in the last DWORD */ + 1, /* 1 byte */ + 1, + 0, + 0, + slice_batch); + + for (i = 0; i < encode_state->slice_params_ext[slice_index]->num_elements; i++) { + /* PAK for each macroblocks */ + for (j = 0; j < slice_param->num_macroblocks; j++) { + int h_pos = (slice_param->macroblock_address + j) % width_in_mbs; + int v_pos = (slice_param->macroblock_address + j) / width_in_mbs; + int first_mb_in_slice = (j == 0); + int last_mb_in_slice = (j == slice_param->num_macroblocks - 1); + int first_mb_in_slice_group = (i == 0 && j == 0); + int last_mb_in_slice_group = (i == encode_state->slice_params_ext[slice_index]->num_elements - 1 && + j == slice_param->num_macroblocks - 1); + + if (slice_param->is_intra_slice) { + gen7_mfc_mpeg2_pak_object_intra(ctx, + encoder_context, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + 0x1a, + slice_param->quantiser_scale_code, + 0x3f, + 0, + 0xff, + slice_batch); + } else { + msg = (unsigned int *)(msg_ptr + (slice_param->macroblock_address + j) * vme_context->vme_output.size_block); + + if(msg[32] & INTRA_MB_FLAG_MASK) { + gen7_mfc_mpeg2_pak_object_intra(ctx, + encoder_context, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + 0x1a, + slice_param->quantiser_scale_code, + 0x3f, + 0, + 0xff, + slice_batch); + } else { + + gen7_mfc_mpeg2_pak_object_inter(ctx, + encode_state, + encoder_context, + msg, + width_in_mbs, height_in_mbs, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + slice_param->quantiser_scale_code, + 0, + 0xff, + slice_batch); + } + } + } + + slice_param++; + } + + dri_bo_unmap(vme_context->vme_output.bo); + + /* tail data */ + if (next_slice_group_param == NULL) { /* end of a picture */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int *)tail_delimiter, + 2, + 8, /* 8bits in the last DWORD */ + 5, /* 5 bytes */ + 1, + 1, + 0, + slice_batch); + } else { /* end of a lsice group */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int *)section_delimiter, + 1, + 8, /* 8bits in the last DWORD */ + 1, /* 1 byte */ + 1, + 1, + 0, + slice_batch); + } +} + +/* + * A batch buffer for all slices, including slice state, + * slice insert object and slice pak object commands + * + */ +static dri_bo * +gen7_mfc_mpeg2_software_slice_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + VAEncSliceParameterBufferMPEG2 *next_slice_group_param = NULL; + dri_bo *batch_bo; + int i; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + if (i == encode_state->num_slice_params_ext - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[i + 1]->buffer; + + gen7_mfc_mpeg2_pipeline_slice_group(ctx, encode_state, encoder_context, i, next_slice_group_param, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +static void +gen7_mfc_mpeg2_pipeline_picture_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_MPEG2, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen6_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen6_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + gen7_mfc_mpeg2_pic_state(ctx, encoder_context, encode_state); + gen7_mfc_mpeg2_qm_state(ctx, encoder_context); + gen7_mfc_mpeg2_fqm_state(ctx, encoder_context); +} + +static void +gen7_mfc_mpeg2_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + slice_batch_bo = gen7_mfc_mpeg2_software_slice_batchbuffer(ctx, encode_state, encoder_context); + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen7_mfc_mpeg2_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + +static VAStatus +gen7_mfc_mpeg2_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAStatus vaStatus = VA_STATUS_SUCCESS; + dri_bo *bo; + int i; + + /* reconstructed surface */ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + mfc_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->pre_deblocking_output.bo); + mfc_context->surface_state.width = obj_surface->orig_width; + mfc_context->surface_state.height = obj_surface->orig_height; + mfc_context->surface_state.w_pitch = obj_surface->width; + mfc_context->surface_state.h_pitch = obj_surface->height; + + /* forward reference */ + obj_surface = encode_state->reference_objects[0]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[0].bo = obj_surface->bo; + dri_bo_reference(mfc_context->reference_surfaces[0].bo); + } else + mfc_context->reference_surfaces[0].bo = NULL; + + /* backward reference */ + obj_surface = encode_state->reference_objects[1]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[1].bo = obj_surface->bo; + dri_bo_reference(mfc_context->reference_surfaces[1].bo); + } else { + mfc_context->reference_surfaces[1].bo = mfc_context->reference_surfaces[0].bo; + + if (mfc_context->reference_surfaces[1].bo) + dri_bo_reference(mfc_context->reference_surfaces[1].bo); + } + + for (i = 2; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + mfc_context->reference_surfaces[i].bo = mfc_context->reference_surfaces[i & 1].bo; + + if (mfc_context->reference_surfaces[i].bo) + dri_bo_reference(mfc_context->reference_surfaces[i].bo); + } + + /* input YUV surface */ + obj_surface = encode_state->input_yuv_object; + mfc_context->uncompressed_picture_source.bo = obj_surface->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + /* coded buffer */ + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + mfc_context->mfc_indirect_pak_bse_object.bo = bo; + mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); + + /* set the internal flag to 0 to indicate the coded size is unknown */ + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return vaStatus; +} + +static VAStatus +gen7_mfc_mpeg2_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen6_mfc_init(ctx, encode_state, encoder_context); + gen7_mfc_mpeg2_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen7_mfc_mpeg2_pipeline_programing(ctx, encode_state, encoder_context); + gen6_mfc_run(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +VAStatus +gen7_mfc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus; + + switch (profile) { + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + vaStatus = gen6_mfc_avc_encode_picture(ctx, encode_state, encoder_context); + break; + + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + vaStatus = gen7_mfc_mpeg2_encode_picture(ctx, encode_state, encoder_context); + break; + + /* FIXME: add for other profile */ + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + return vaStatus; +} + +Bool +gen7_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = calloc(1, sizeof(struct gen6_mfc_context)); + + if (!mfc_context) + return False; + + mfc_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + mfc_context->gpe_context.idrt.max_entries = MAX_GPE_KERNELS; + mfc_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + + mfc_context->gpe_context.curbe.length = 32 * 4; + + mfc_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + mfc_context->gpe_context.vfe_state.num_urb_entries = 16; + mfc_context->gpe_context.vfe_state.gpgpu_mode = 0; + mfc_context->gpe_context.vfe_state.urb_entry_size = 59 - 1; + mfc_context->gpe_context.vfe_state.curbe_allocation_size = 37 - 1; + + i965_gpe_load_kernels(ctx, + &mfc_context->gpe_context, + gen7_mfc_kernels, + NUM_MFC_KERNEL); + + mfc_context->pipe_mode_select = gen7_mfc_pipe_mode_select; + mfc_context->set_surface_state = gen7_mfc_surface_state; + mfc_context->ind_obj_base_addr_state = gen7_mfc_ind_obj_base_addr_state; + mfc_context->avc_img_state = gen7_mfc_avc_img_state; + mfc_context->avc_qm_state = gen7_mfc_avc_qm_state; + mfc_context->avc_fqm_state = gen7_mfc_avc_fqm_state; + mfc_context->insert_object = gen7_mfc_avc_insert_object; + mfc_context->buffer_suface_setup = gen7_gpe_buffer_suface_setup; + + encoder_context->mfc_context = mfc_context; + encoder_context->mfc_context_destroy = gen6_mfc_context_destroy; + encoder_context->mfc_pipeline = gen7_mfc_pipeline; + encoder_context->mfc_brc_prepare = intel_mfc_brc_prepare; + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen7_mfd.c intel-vaapi-driver-1.7.1/src/gen7_mfd.c --- intel-vaapi-driver-1.0.15/src/gen7_mfd.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen7_mfd.c 2016-06-03 06:05:58.000000000 +0000 @@ -26,22 +26,18 @@ * */ -#include -#include -#include -#include +#include "sysdeps.h" -#include +#include #include "intel_batchbuffer.h" #include "intel_driver.h" - #include "i965_defines.h" #include "i965_drv_video.h" +#include "i965_decoder_utils.h" #include "gen7_mfd.h" - -#define DMV_SIZE 0x88000 /* 557056 bytes for a frame */ +#include "intel_media.h" static const uint32_t zigzag_direct[64] = { 0, 1, 8, 16, 9, 2, 3, 10, @@ -55,150 +51,22 @@ }; static void -gen7_mfd_avc_frame_store_index(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - struct gen7_mfd_context *gen7_mfd_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - int i, j; - - assert(ARRAY_ELEMS(gen7_mfd_context->reference_surface) == ARRAY_ELEMS(pic_param->ReferenceFrames)); - - for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { - int found = 0; - - if (gen7_mfd_context->reference_surface[i].surface_id == VA_INVALID_ID) - continue; - - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j]; - if (ref_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - if (gen7_mfd_context->reference_surface[i].surface_id == ref_pic->picture_id) { - found = 1; - break; - } - } - - if (!found) { - struct object_surface *obj_surface = SURFACE(gen7_mfd_context->reference_surface[i].surface_id); - obj_surface->flags &= ~SURFACE_REFERENCED; - - if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { - dri_bo_unreference(obj_surface->bo); - obj_surface->bo = NULL; - obj_surface->flags &= ~SURFACE_REF_DIS_MASK; - } - - if (obj_surface->free_private_data) - obj_surface->free_private_data(&obj_surface->private_data); - - gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; - gen7_mfd_context->reference_surface[i].frame_store_id = -1; - } - } - - for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { - VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i]; - int found = 0; - - if (ref_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { - if (gen7_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) - continue; - - if (gen7_mfd_context->reference_surface[j].surface_id == ref_pic->picture_id) { - found = 1; - break; - } - } - - if (!found) { - int frame_idx; - struct object_surface *obj_surface = SURFACE(ref_pic->picture_id); - - assert(obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); - - for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface); frame_idx++) { - for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { - if (gen7_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) - continue; - - if (gen7_mfd_context->reference_surface[j].frame_store_id == frame_idx) - break; - } - - if (j == ARRAY_ELEMS(gen7_mfd_context->reference_surface)) - break; - } - - assert(frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface)); - - for (j = 0; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { - if (gen7_mfd_context->reference_surface[j].surface_id == VA_INVALID_ID) { - gen7_mfd_context->reference_surface[j].surface_id = ref_pic->picture_id; - gen7_mfd_context->reference_surface[j].frame_store_id = frame_idx; - break; - } - } - } - } - - /* sort */ - for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface) - 1; i++) { - if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && - gen7_mfd_context->reference_surface[i].frame_store_id == i) - continue; - - for (j = i + 1; j < ARRAY_ELEMS(gen7_mfd_context->reference_surface); j++) { - if (gen7_mfd_context->reference_surface[j].surface_id != VA_INVALID_ID && - gen7_mfd_context->reference_surface[j].frame_store_id == i) { - VASurfaceID id = gen7_mfd_context->reference_surface[i].surface_id; - int frame_idx = gen7_mfd_context->reference_surface[i].frame_store_id; - - gen7_mfd_context->reference_surface[i].surface_id = gen7_mfd_context->reference_surface[j].surface_id; - gen7_mfd_context->reference_surface[i].frame_store_id = gen7_mfd_context->reference_surface[j].frame_store_id; - gen7_mfd_context->reference_surface[j].surface_id = id; - gen7_mfd_context->reference_surface[j].frame_store_id = frame_idx; - break; - } - } - } -} - -static void -gen7_mfd_free_avc_surface(void **data) -{ - struct gen7_avc_surface *gen7_avc_surface = *data; - - if (!gen7_avc_surface) - return; - - dri_bo_unreference(gen7_avc_surface->dmv_top); - gen7_avc_surface->dmv_top = NULL; - dri_bo_unreference(gen7_avc_surface->dmv_bottom); - gen7_avc_surface->dmv_bottom = NULL; - - free(gen7_avc_surface); - *data = NULL; -} - -static void gen7_mfd_init_avc_surface(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param, struct object_surface *obj_surface) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct gen7_avc_surface *gen7_avc_surface = obj_surface->private_data; + GenAvcSurface *gen7_avc_surface = obj_surface->private_data; + int width_in_mbs, height_in_mbs; - obj_surface->free_private_data = gen7_mfd_free_avc_surface; + obj_surface->free_private_data = gen_free_avc_surface; + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ if (!gen7_avc_surface) { - gen7_avc_surface = calloc(sizeof(struct gen7_avc_surface), 1); + gen7_avc_surface = calloc(sizeof(GenAvcSurface), 1); + assert(gen7_avc_surface); + gen7_avc_surface->base.frame_store_id = -1; assert((obj_surface->size & 0x3f) == 0); obj_surface->private_data = gen7_avc_surface; } @@ -209,16 +77,18 @@ if (gen7_avc_surface->dmv_top == NULL) { gen7_avc_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr, "direct mv w/r buffer", - DMV_SIZE, + width_in_mbs * (height_in_mbs + 1) * 64, 0x1000); + assert(gen7_avc_surface->dmv_top); } if (gen7_avc_surface->dmv_bottom_flag && gen7_avc_surface->dmv_bottom == NULL) { gen7_avc_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr, "direct mv w/r buffer", - DMV_SIZE, + width_in_mbs * (height_in_mbs + 1) * 64, 0x1000); + assert(gen7_avc_surface->dmv_bottom); } } @@ -235,7 +105,7 @@ standard_select == MFX_FORMAT_VC1 || standard_select == MFX_FORMAT_JPEG); - BEGIN_BCS_BATCH(batch, 5); /* FIXME: 5 ??? */ + BEGIN_BCS_BATCH(batch, 5); OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); OUT_BCS_BATCH(batch, (MFX_LONG_MODE << 17) | /* Currently only support long format */ @@ -264,10 +134,19 @@ struct gen7_mfd_context *gen7_mfd_context) { struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct object_surface *obj_surface = SURFACE(decode_state->current_render_target); + struct object_surface *obj_surface = decode_state->render_object; + unsigned int y_cb_offset; + unsigned int y_cr_offset; + unsigned int surface_format; + assert(obj_surface); - + + y_cb_offset = obj_surface->y_cb_offset; + y_cr_offset = obj_surface->y_cr_offset; + + surface_format = obj_surface->fourcc == VA_FOURCC_Y800 ? + MFX_SURFACE_MONOCHROME : MFX_SURFACE_PLANAR_420_8; + BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); OUT_BCS_BATCH(batch, 0); @@ -275,17 +154,19 @@ ((obj_surface->orig_height - 1) << 18) | ((obj_surface->orig_width - 1) << 4)); OUT_BCS_BATCH(batch, - (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ - (1 << 27) | /* FIXME: set to 0 for JPEG */ - (0 << 22) | /* surface object control state, FIXME??? */ + (surface_format << 28) | /* 420 planar YUV surface */ + ((standard_select != MFX_FORMAT_JPEG) << 27) | /* interleave chroma, set to 0 for JPEG */ + (0 << 22) | /* surface object control state, ignored */ ((obj_surface->width - 1) << 3) | /* pitch */ - (0 << 2) | /* must be 0 for interleave U/V */ + (0 << 2) | /* must be 0 */ (1 << 1) | /* must be tiled */ (I965_TILEWALK_YMAJOR << 0)); /* tile walk, must be 1 */ OUT_BCS_BATCH(batch, - (0 << 16) | /* FIXME: fix it for JPEG */ - (obj_surface->height)); /* FIXME: fix it for JPEG */ - OUT_BCS_BATCH(batch, 0); /* FIXME: fix it for JPEG */ + (0 << 16) | /* X offset for U(Cb), must be 0 */ + (y_cb_offset << 0)); /* Y offset for U(Cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for V(Cr), must be 0 */ + (y_cr_offset << 0)); /* Y offset for V(Cr), must be 0 for video codec, non-zoro for JPEG */ ADVANCE_BCS_BATCH(batch); } @@ -296,7 +177,6 @@ struct gen7_mfd_context *gen7_mfd_context) { struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; - struct i965_driver_data *i965 = i965_driver_data(ctx); int i; BEGIN_BCS_BATCH(batch, 24); @@ -336,9 +216,10 @@ for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { struct object_surface *obj_surface; - if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { - obj_surface = SURFACE(gen7_mfd_context->reference_surface[i].surface_id); - assert(obj_surface && obj_surface->bo); + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->bo) { + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; OUT_BCS_RELOC(batch, obj_surface->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, @@ -411,14 +292,6 @@ } static void -gen7_mfd_aes_state(VADriverContextP ctx, - struct decode_state *decode_state, - int standard_select) -{ - /* FIXME */ -} - -static void gen7_mfd_qm_state(VADriverContextP ctx, int qm_type, unsigned char *qm, @@ -437,18 +310,6 @@ intel_batchbuffer_data(batch, qm_buffer, 16 * 4); ADVANCE_BCS_BATCH(batch); } -static void -gen7_mfd_wait(VADriverContextP ctx, - struct decode_state *decode_state, - int standard_select, - struct gen7_mfd_context *gen7_mfd_context) -{ - struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; - - BEGIN_BCS_BATCH(batch, 1); - OUT_BCS_BATCH(batch, MFX_WAIT | (1 << 8)); - ADVANCE_BCS_BATCH(batch); -} static void gen7_mfd_avc_img_state(VADriverContextP ctx, @@ -456,7 +317,6 @@ struct gen7_mfd_context *gen7_mfd_context) { struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; - int qm_present_flag; int img_struct; int mbaff_frame_flag; unsigned int width_in_mbs, height_in_mbs; @@ -464,12 +324,6 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; - assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); - - if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) - qm_present_flag = 1; - else - qm_present_flag = 0; /* built-in QM matrices */ if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD) img_struct = 1; @@ -494,8 +348,8 @@ mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && !pic_param->pic_fields.bits.field_pic_flag); - width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff); - height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */ + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ /* MFX unit doesn't support 4:2:2 and 4:4:4 picture */ assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */ @@ -505,7 +359,7 @@ BEGIN_BCS_BATCH(batch, 16); OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); OUT_BCS_BATCH(batch, - width_in_mbs * height_in_mbs); + (width_in_mbs * height_in_mbs - 1)); OUT_BCS_BATCH(batch, ((height_in_mbs - 1) << 16) | ((width_in_mbs - 1) << 0)); @@ -549,10 +403,10 @@ VAIQMatrixBufferH264 *iq_matrix; VAPictureParameterBufferH264 *pic_param; - if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) - return; - - iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer; + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) + iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer; + else + iq_matrix = &gen7_mfd_context->iq_matrix.h264; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; @@ -568,44 +422,40 @@ static void gen7_mfd_avc_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, VAPictureParameterBufferH264 *pic_param, VASliceParameterBufferH264 *slice_param, struct gen7_mfd_context *gen7_mfd_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; struct object_surface *obj_surface; - struct gen7_avc_surface *gen7_avc_surface; + GenAvcSurface *gen7_avc_surface; VAPictureH264 *va_pic; - int i, j; + int i; BEGIN_BCS_BATCH(batch, 69); OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); /* reference surfaces 0..15 */ for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { - if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { - obj_surface = SURFACE(gen7_mfd_context->reference_surface[i].surface_id); - assert(obj_surface); + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->private_data) { + + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; gen7_avc_surface = obj_surface->private_data; + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); - if (gen7_avc_surface == NULL) { - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - } else { + if (gen7_avc_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); - - if (gen7_avc_surface->dmv_bottom_flag == 1) - OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_bottom, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - else - OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - } } else { OUT_BCS_BATCH(batch, 0); OUT_BCS_BATCH(batch, 0); @@ -614,9 +464,8 @@ /* the current decoding frame/field */ va_pic = &pic_param->CurrPic; - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface && obj_surface->bo && obj_surface->private_data); + obj_surface = decode_state->render_object; + assert(obj_surface->bo && obj_surface->private_data); gen7_avc_surface = obj_surface->private_data; OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, @@ -634,23 +483,14 @@ /* POC List */ for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { - if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID) { - int found = 0; - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - va_pic = &pic_param->ReferenceFrames[j]; - - if (va_pic->flags & VA_PICTURE_H264_INVALID) - continue; + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; - if (va_pic->picture_id == gen7_mfd_context->reference_surface[i].surface_id) { - found = 1; - break; - } - } + if (obj_surface) { + const VAPictureH264 * const va_pic = avc_find_picture( + obj_surface->base.id, pic_param->ReferenceFrames, + ARRAY_ELEMS(pic_param->ReferenceFrames)); - assert(found == 1); - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - + assert(va_pic != NULL); OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); } else { @@ -667,6 +507,15 @@ } static void +gen7_mfd_avc_phantom_slice_first(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen6_mfd_avc_phantom_slice(ctx, pic_param, next_slice_param, gen7_mfd_context->base.batch); +} + +static void gen7_mfd_avc_slice_state(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param, VASliceParameterBufferH264 *slice_param, @@ -708,14 +557,20 @@ num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; } - first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture; + first_mb_in_slice = slice_param->first_mb_in_slice; slice_hor_pos = first_mb_in_slice % width_in_mbs; slice_ver_pos = first_mb_in_slice / width_in_mbs; + if (mbaff_picture) + slice_ver_pos = slice_ver_pos << 1; + if (next_slice_param) { - first_mb_in_next_slice = next_slice_param->first_mb_in_slice << mbaff_picture; + first_mb_in_next_slice = next_slice_param->first_mb_in_slice; next_slice_hor_pos = first_mb_in_next_slice % width_in_mbs; next_slice_ver_pos = first_mb_in_next_slice / width_in_mbs; + + if (mbaff_picture) + next_slice_ver_pos = next_slice_ver_pos << 1; } else { next_slice_hor_pos = 0; next_slice_ver_pos = height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag); @@ -752,81 +607,17 @@ ADVANCE_BCS_BATCH(batch); } -static void +static inline void gen7_mfd_avc_ref_idx_state(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param, VASliceParameterBufferH264 *slice_param, struct gen7_mfd_context *gen7_mfd_context) { - struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; - int i, j, num_ref_list; - struct { - unsigned char bottom_idc:1; - unsigned char frame_store_index:4; - unsigned char field_picture:1; - unsigned char long_term:1; - unsigned char non_exist:1; - } refs[32]; - - if (slice_param->slice_type == SLICE_TYPE_I || - slice_param->slice_type == SLICE_TYPE_SI) - return; - - if (slice_param->slice_type == SLICE_TYPE_P || - slice_param->slice_type == SLICE_TYPE_SP) { - num_ref_list = 1; - } else { - num_ref_list = 2; - } - - for (i = 0; i < num_ref_list; i++) { - VAPictureH264 *va_pic; - - if (i == 0) { - va_pic = slice_param->RefPicList0; - } else { - va_pic = slice_param->RefPicList1; - } - - BEGIN_BCS_BATCH(batch, 10); - OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); - OUT_BCS_BATCH(batch, i); - - for (j = 0; j < 32; j++) { - if (va_pic->flags & VA_PICTURE_H264_INVALID) { - refs[j].non_exist = 1; - refs[j].long_term = 1; - refs[j].field_picture = 1; - refs[j].frame_store_index = 0xf; - refs[j].bottom_idc = 1; - } else { - int frame_idx; - - for (frame_idx = 0; frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface); frame_idx++) { - if (gen7_mfd_context->reference_surface[frame_idx].surface_id != VA_INVALID_ID && - va_pic->picture_id == gen7_mfd_context->reference_surface[frame_idx].surface_id) { - assert(frame_idx == gen7_mfd_context->reference_surface[frame_idx].frame_store_id); - break; - } - } - - assert(frame_idx < ARRAY_ELEMS(gen7_mfd_context->reference_surface)); - - refs[j].non_exist = 0; - refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); - refs[j].field_picture = !!(va_pic->flags & - (VA_PICTURE_H264_TOP_FIELD | - VA_PICTURE_H264_BOTTOM_FIELD)); - refs[j].frame_store_index = frame_idx; - refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); - } - - va_pic++; - } - - intel_batchbuffer_data(batch, refs, sizeof(refs)); - ADVANCE_BCS_BATCH(batch); - } + gen6_send_avc_ref_idx_state( + gen7_mfd_context->base.batch, + slice_param, + gen7_mfd_context->reference_surface + ); } static void @@ -880,27 +671,6 @@ } } -static int -gen7_mfd_avc_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset) -{ - int out_slice_data_bit_offset; - int slice_header_size = in_slice_data_bit_offset / 8; - int i, j; - - for (i = 0, j = 0; i < slice_header_size; i++, j++) { - if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) { - i++, j += 2; - } - } - - out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; - - if (mode_flag == ENTROPY_CABAC) - out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8); - - return out_slice_data_bit_offset; -} - static void gen7_mfd_avc_bsd_object(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param, @@ -910,21 +680,19 @@ struct gen7_mfd_context *gen7_mfd_context) { struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; - int slice_data_bit_offset; - uint8_t *slice_data = NULL; + unsigned int slice_data_bit_offset; - dri_bo_map(slice_data_bo, 0); - slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); - slice_data_bit_offset = gen7_mfd_avc_get_slice_bit_offset(slice_data, - pic_param->pic_fields.bits.entropy_coding_mode_flag, - slice_param->slice_data_bit_offset); - dri_bo_unmap(slice_data_bo); + slice_data_bit_offset = avc_get_first_mb_bit_offset( + slice_data_bo, + slice_param, + pic_param->pic_fields.bits.entropy_coding_mode_flag + ); /* the input bitsteam format on GEN7 differs from GEN6 */ BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); OUT_BCS_BATCH(batch, - (slice_param->slice_data_size)); + (slice_param->slice_data_size - slice_param->slice_data_offset)); OUT_BCS_BATCH(batch, slice_param->slice_data_offset); OUT_BCS_BATCH(batch, (0 << 31) | @@ -934,6 +702,7 @@ (0 << 8)); OUT_BCS_BATCH(batch, ((slice_data_bit_offset >> 3) << 16) | + (1 << 7) | (0 << 5) | (0 << 4) | ((next_slice_param == NULL) << 3) | /* LastSlice Flag */ @@ -942,6 +711,16 @@ ADVANCE_BCS_BATCH(batch); } +static inline void +gen7_mfd_avc_context_init( + VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context +) +{ + /* Initialize flat scaling lists */ + avc_gen_default_iq_matrix(&gen7_mfd_context->iq_matrix.h264); +} + static void gen7_mfd_avc_decode_init(VADriverContextP ctx, struct decode_state *decode_state, @@ -949,11 +728,11 @@ { VAPictureParameterBufferH264 *pic_param; VASliceParameterBufferH264 *slice_param; - VAPictureH264 *va_pic; struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; dri_bo *bo; int i, j, enable_avc_ildb = 0; + unsigned int width_in_mbs, height_in_mbs; for (j = 0; j < decode_state->num_slice_params && enable_avc_ildb == 0; j++) { assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); @@ -978,17 +757,22 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; - gen7_mfd_avc_frame_store_index(ctx, pic_param, gen7_mfd_context); + intel_update_avc_frame_store_index(ctx, decode_state, pic_param, + gen7_mfd_context->reference_surface, &gen7_mfd_context->fs_ctx); + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; + assert(width_in_mbs > 0 && width_in_mbs <= 256); /* 4K */ + assert(height_in_mbs > 0 && height_in_mbs <= 256); /* Current decoded picture */ - va_pic = &pic_param->CurrPic; - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface); - obj_surface->flags &= ~SURFACE_REF_DIS_MASK; - obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0); + obj_surface = decode_state->render_object; + if (pic_param->pic_fields.bits.reference_pic_flag) + obj_surface->flags |= SURFACE_REFERENCED; + else + obj_surface->flags &= ~SURFACE_REFERENCED; + + avc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param); gen7_mfd_init_avc_surface(ctx, pic_param, obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; @@ -1003,7 +787,7 @@ dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "intra row store", - 128 * 64, + width_in_mbs * 64, 0x1000); assert(bo); gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; @@ -1012,7 +796,7 @@ dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "deblocking filter row store", - 30720, /* 4 * 120 * 64 */ + width_in_mbs * 64 * 4, 0x1000); assert(bo); gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; @@ -1021,7 +805,7 @@ dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "bsd mpc row store", - 11520, /* 1.5 * 120 * 64 */ + width_in_mbs * 64 * 2, 0x1000); assert(bo); gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; @@ -1030,7 +814,7 @@ dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "mpr row store", - 7680, /* 1. 0 * 120 * 64 */ + width_in_mbs * 64 * 2, 0x1000); assert(bo); gen7_mfd_context->mpr_row_store_scratch_buffer.bo = bo; @@ -1074,6 +858,9 @@ else next_slice_group_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer; + if (j == 0 && slice_param->first_mb_in_slice) + gen7_mfd_avc_phantom_slice_first(ctx, pic_param, slice_param, gen7_mfd_context); + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); assert((slice_param->slice_type == SLICE_TYPE_I) || @@ -1087,7 +874,7 @@ else next_slice_param = next_slice_group_param; - gen7_mfd_avc_directmode_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen7_mfd_avc_directmode_state(ctx, decode_state, pic_param, slice_param, gen7_mfd_context); gen7_mfd_avc_ref_idx_state(ctx, pic_param, slice_param, gen7_mfd_context); gen7_mfd_avc_weightoffset_state(ctx, pic_param, slice_param, gen7_mfd_context); gen7_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); @@ -1108,35 +895,23 @@ VAPictureParameterBufferMPEG2 *pic_param; struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; - int i; dri_bo *bo; + unsigned int width_in_mbs; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; - /* reference picture */ - obj_surface = SURFACE(pic_param->forward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen7_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; - else - gen7_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; - - obj_surface = SURFACE(pic_param->backward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen7_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; - else - gen7_mfd_context->reference_surface[1].surface_id = pic_param->forward_reference_picture; - - /* must do so !!! */ - for (i = 2; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) - gen7_mfd_context->reference_surface[i].surface_id = gen7_mfd_context->reference_surface[i % 2].surface_id; + mpeg2_set_reference_surfaces( + ctx, + gen7_mfd_context->reference_surface, + decode_state, + pic_param + ); /* Current decoded picture */ - obj_surface = SURFACE(decode_state->current_render_target); - assert(obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; @@ -1146,7 +921,7 @@ dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "bsd mpc row store", - 11520, /* 1.5 * 120 * 64 */ + width_in_mbs * 96, 0x1000); assert(bo); gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; @@ -1164,12 +939,19 @@ struct decode_state *decode_state, struct gen7_mfd_context *gen7_mfd_context) { + struct i965_driver_data * const i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; VAPictureParameterBufferMPEG2 *pic_param; + unsigned int slice_concealment_disable_bit = 0; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + if (IS_HASWELL(i965->intel.device_info)) { + /* XXX: disable concealment for now */ + slice_concealment_disable_bit = 1; + } + BEGIN_BCS_BATCH(batch, 13); OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2)); OUT_BCS_BATCH(batch, @@ -1188,6 +970,7 @@ OUT_BCS_BATCH(batch, pic_param->picture_coding_type << 9); OUT_BCS_BATCH(batch, + (slice_concealment_disable_bit << 31) | ((ALIGN(pic_param->vertical_size, 16) / 16) - 1) << 16 | ((ALIGN(pic_param->horizontal_size, 16) / 16) - 1)); OUT_BCS_BATCH(batch, 0); @@ -1215,20 +998,26 @@ VAIQMatrixBufferMPEG2 * const iq_matrix = (VAIQMatrixBufferMPEG2 *)decode_state->iq_matrix->buffer; - gen_iq_matrix->load_intra_quantiser_matrix = - iq_matrix->load_intra_quantiser_matrix; - if (iq_matrix->load_intra_quantiser_matrix) { - for (j = 0; j < 64; j++) - gen_iq_matrix->intra_quantiser_matrix[zigzag_direct[j]] = - iq_matrix->intra_quantiser_matrix[j]; + if (gen_iq_matrix->load_intra_quantiser_matrix == -1 || + iq_matrix->load_intra_quantiser_matrix) { + gen_iq_matrix->load_intra_quantiser_matrix = + iq_matrix->load_intra_quantiser_matrix; + if (iq_matrix->load_intra_quantiser_matrix) { + for (j = 0; j < 64; j++) + gen_iq_matrix->intra_quantiser_matrix[zigzag_direct[j]] = + iq_matrix->intra_quantiser_matrix[j]; + } } - gen_iq_matrix->load_non_intra_quantiser_matrix = - iq_matrix->load_non_intra_quantiser_matrix; - if (iq_matrix->load_non_intra_quantiser_matrix) { - for (j = 0; j < 64; j++) - gen_iq_matrix->non_intra_quantiser_matrix[zigzag_direct[j]] = - iq_matrix->non_intra_quantiser_matrix[j]; + if (gen_iq_matrix->load_non_intra_quantiser_matrix == -1 || + iq_matrix->load_non_intra_quantiser_matrix) { + gen_iq_matrix->load_non_intra_quantiser_matrix = + iq_matrix->load_non_intra_quantiser_matrix; + if (iq_matrix->load_non_intra_quantiser_matrix) { + for (j = 0; j < 64; j++) + gen_iq_matrix->non_intra_quantiser_matrix[zigzag_direct[j]] = + iq_matrix->non_intra_quantiser_matrix[j]; + } } } @@ -1256,29 +1045,65 @@ } } +uint32_t mpeg2_get_slice_data_length(dri_bo *slice_data_bo, VASliceParameterBufferMPEG2 *slice_param) +{ + uint8_t *buf; + uint32_t buf_offset = slice_param->slice_data_offset + (slice_param->macroblock_offset >> 3); + uint32_t buf_size = slice_param->slice_data_size - (slice_param->macroblock_offset >> 3); + uint32_t i = 0; + + dri_bo_map(slice_data_bo, 0); + buf = (uint8_t *)slice_data_bo->virtual + buf_offset; + + if (buf_size < 4) + return buf_size; + + while (i <= (buf_size - 4)) { + if (buf[i + 2] > 1) { + i += 3; + } else if (buf[i + 1]) { + i += 2; + } else if (buf[i] || buf[i + 2] != 1) { + i++; + } else { + break; + } + } + + if (i <= (buf_size - 4)) + buf_size = i; + + dri_bo_unmap(slice_data_bo); + return buf_size; +} + static void gen7_mfd_mpeg2_bsd_object(VADriverContextP ctx, VAPictureParameterBufferMPEG2 *pic_param, VASliceParameterBufferMPEG2 *slice_param, + dri_bo *slice_data_bo, VASliceParameterBufferMPEG2 *next_slice_param, struct gen7_mfd_context *gen7_mfd_context) { + struct i965_driver_data * const i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; - int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic = 0; + int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic_wa, is_field_pic = 0; if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) is_field_pic = 1; + is_field_pic_wa = is_field_pic && + gen7_mfd_context->wa_mpeg2_slice_vertical_position > 0; - vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic); + vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic_wa); hpos0 = slice_param->slice_horizontal_position; if (next_slice_param == NULL) { vpos1 = ALIGN(pic_param->vertical_size, 16) / 16 / (1 + is_field_pic); hpos1 = 0; } else { - vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic); + vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic_wa); hpos1 = next_slice_param->slice_horizontal_position; } @@ -1287,7 +1112,7 @@ BEGIN_BCS_BATCH(batch, 5); OUT_BCS_BATCH(batch, MFD_MPEG2_BSD_OBJECT | (5 - 2)); OUT_BCS_BATCH(batch, - slice_param->slice_data_size - (slice_param->macroblock_offset >> 3)); + mpeg2_get_slice_data_length(slice_data_bo, slice_param)); OUT_BCS_BATCH(batch, slice_param->slice_data_offset + (slice_param->macroblock_offset >> 3)); OUT_BCS_BATCH(batch, @@ -1298,7 +1123,8 @@ (next_slice_param == NULL) << 3 | (slice_param->macroblock_offset & 0x7)); OUT_BCS_BATCH(batch, - slice_param->quantiser_scale_code << 24); + (slice_param->quantiser_scale_code << 24) | + (IS_HASWELL(i965->intel.device_info) ? (vpos1 << 8 | hpos1) : 0)); ADVANCE_BCS_BATCH(batch); } @@ -1326,6 +1152,10 @@ gen7_mfd_mpeg2_pic_state(ctx, decode_state, gen7_mfd_context); gen7_mfd_mpeg2_qm_state(ctx, decode_state, gen7_mfd_context); + if (gen7_mfd_context->wa_mpeg2_slice_vertical_position < 0) + gen7_mfd_context->wa_mpeg2_slice_vertical_position = + mpeg2_wa_slice_vertical_position(decode_state, pic_param); + for (j = 0; j < decode_state->num_slice_params; j++) { assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer; @@ -1345,7 +1175,7 @@ else next_slice_param = next_slice_group_param; - gen7_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); + gen7_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, slice_data_bo, next_slice_param, gen7_mfd_context); slice_param++; } } @@ -1410,11 +1240,14 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct gen7_vc1_surface *gen7_vc1_surface = obj_surface->private_data; + int width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; obj_surface->free_private_data = gen7_mfd_free_vc1_surface; if (!gen7_vc1_surface) { gen7_vc1_surface = calloc(sizeof(struct gen7_vc1_surface), 1); + assert(gen7_vc1_surface); assert((obj_surface->size & 0x3f) == 0); obj_surface->private_data = gen7_vc1_surface; } @@ -1424,7 +1257,7 @@ if (gen7_vc1_surface->dmv == NULL) { gen7_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr, "direct mv w/r buffer", - 557056, /* 64 * 128 * 64 */ + width_in_mbs * height_in_mbs * 64, 0x1000); } } @@ -1437,36 +1270,24 @@ VAPictureParameterBufferVC1 *pic_param; struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; - int i; dri_bo *bo; - + int width_in_mbs; + int picture_type; + assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; - - /* reference picture */ - obj_surface = SURFACE(pic_param->forward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen7_mfd_context->reference_surface[0].surface_id = pic_param->forward_reference_picture; - else - gen7_mfd_context->reference_surface[0].surface_id = VA_INVALID_ID; - - obj_surface = SURFACE(pic_param->backward_reference_picture); - - if (obj_surface && obj_surface->bo) - gen7_mfd_context->reference_surface[1].surface_id = pic_param->backward_reference_picture; - else - gen7_mfd_context->reference_surface[1].surface_id = pic_param->forward_reference_picture; - - /* must do so !!! */ - for (i = 2; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) - gen7_mfd_context->reference_surface[i].surface_id = gen7_mfd_context->reference_surface[i % 2].surface_id; + width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + picture_type = pic_param->picture_fields.bits.picture_type; + + intel_update_vc1_frame_store_index(ctx, + decode_state, + pic_param, + gen7_mfd_context->reference_surface); /* Current decoded picture */ - obj_surface = SURFACE(decode_state->current_render_target); - assert(obj_surface); + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); gen7_mfd_init_vc1_surface(ctx, pic_param, obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2')); dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; @@ -1481,7 +1302,7 @@ dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "intra row store", - 128 * 64, + width_in_mbs * 64, 0x1000); assert(bo); gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; @@ -1490,7 +1311,7 @@ dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "deblocking filter row store", - 46080, /* 6 * 120 * 64 */ + width_in_mbs * 7 * 64, 0x1000); assert(bo); gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; @@ -1499,7 +1320,7 @@ dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); bo = dri_bo_alloc(i965->intel.bufmgr, "bsd mpc row store", - 11520, /* 1.5 * 120 * 64 */ + width_in_mbs * 96, 0x1000); assert(bo); gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; @@ -1522,7 +1343,7 @@ bo = dri_bo_alloc(i965->intel.bufmgr, "VC-1 Bitplane", - bitplane_width * bitplane_width, + bitplane_width * height_in_mbs, 0x1000); assert(bo); gen7_mfd_context->bitplane_read_buffer.bo = bo; @@ -1541,6 +1362,10 @@ src_shift = !((src_h * width_in_mbs + src_w) & 1) * 4; src_value = ((src[src_index] >> src_shift) & 0xf); + if (picture_type == GEN7_VC1_SKIPPED_PICTURE){ + src_value |= 0x2; + } + dst_index = src_w / 2; dst[dst_index] = ((dst[dst_index] >> 4) | (src_value << 4)); } @@ -1563,7 +1388,6 @@ { struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; VAPictureParameterBufferVC1 *pic_param; - struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; int alt_pquant_config = 0, alt_pquant_edge_mask = 0, alt_pq; int dquant, dquantfrm, dqprofile, dqdbedge, dqsbedge, dqbilevel; @@ -1667,16 +1491,28 @@ if (picture_type == GEN7_VC1_I_PICTURE || picture_type == GEN7_VC1_BI_PICTURE) /* I picture */ trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx2; - else + else { trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx1; + /* + * 8.3.6.2.1 Transform Type Selection + * If variable-sized transform coding is not enabled, + * then the 8x8 transform shall be used for all blocks. + * it is also MFX_VC1_PIC_STATE requirement. + */ + if (pic_param->transform_fields.bits.variable_sized_transform_flag == 0) { + pic_param->transform_fields.bits.mb_level_transform_type_flag = 1; + pic_param->transform_fields.bits.frame_level_transform_type = 0; + } + } if (picture_type == GEN7_VC1_B_PICTURE) { struct gen7_vc1_surface *gen7_vc1_surface = NULL; - obj_surface = SURFACE(pic_param->backward_reference_picture); - assert(obj_surface); - gen7_vc1_surface = obj_surface->private_data; + obj_surface = decode_state->reference_objects[1]; + + if (obj_surface) + gen7_vc1_surface = obj_surface->private_data; if (!gen7_vc1_surface || (va_to_gen7_vc1_pic_type[gen7_vc1_surface->picture_type] == GEN7_VC1_I_PICTURE || @@ -1707,8 +1543,30 @@ } overlap = pic_param->sequence_fields.bits.overlap; - if (profile != GEN7_VC1_ADVANCED_PROFILE && pic_param->pic_quantizer_fields.bits.pic_quantizer_scale < 9) + + if (overlap) { overlap = 0; + if (profile != GEN7_VC1_ADVANCED_PROFILE) { + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9 && + pic_param->picture_fields.bits.picture_type != GEN7_VC1_B_PICTURE) { + overlap = 1; + } + }else { + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_P_PICTURE && + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_I_PICTURE || + pic_param->picture_fields.bits.picture_type == GEN7_VC1_BI_PICTURE){ + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } else if (va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] == 2 || + va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] == 3) { + overlap = 1; + } + } + } + } assert(pic_param->conditional_overlap_flag < 3); assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */ @@ -1716,13 +1574,13 @@ if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) - interpolation_mode = 8; /* Half-pel bilinear */ + interpolation_mode = 9; /* Half-pel bilinear */ else if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPel || (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPel)) - interpolation_mode = 0; /* Half-pel bicubic */ + interpolation_mode = 1; /* Half-pel bicubic */ else - interpolation_mode = 1; /* Quarter-pel bicubic */ + interpolation_mode = 0; /* Quarter-pel bicubic */ BEGIN_BCS_BATCH(batch, 6); OUT_BCS_BATCH(batch, MFD_VC1_LONG_PIC_STATE | (6 - 2)); @@ -1796,9 +1654,6 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; - - assert(decode_state->pic_param && decode_state->pic_param->buffer); - pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation); BEGIN_BCS_BATCH(batch, 6); @@ -1826,21 +1681,16 @@ struct gen7_mfd_context *gen7_mfd_context) { struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; - VAPictureParameterBufferVC1 *pic_param; - struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; dri_bo *dmv_read_buffer = NULL, *dmv_write_buffer = NULL; - assert(decode_state->pic_param && decode_state->pic_param->buffer); - pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; - - obj_surface = SURFACE(decode_state->current_render_target); + obj_surface = decode_state->render_object; if (obj_surface && obj_surface->private_data) { dmv_write_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; } - obj_surface = SURFACE(pic_param->backward_reference_picture); + obj_surface = decode_state->reference_objects[1]; if (obj_surface && obj_surface->private_data) { dmv_read_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; @@ -1980,47 +1830,854 @@ intel_batchbuffer_flush(batch); } -static void -gen7_mfd_decode_picture(VADriverContextP ctx, - VAProfile profile, - union codec_state *codec_state, - struct hw_context *hw_context) - +static void +gen7_mfd_jpeg_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) { - struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; - struct decode_state *decode_state = &codec_state->dec; + struct object_surface *obj_surface; + VAPictureParameterBufferJPEGBaseline *pic_param; + int subsampling = SUBSAMPLE_YUV420; + int fourcc = VA_FOURCC_IMC3; + + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + if (pic_param->num_components == 1) { + subsampling = SUBSAMPLE_YUV400; + fourcc = VA_FOURCC_Y800; + } else if (pic_param->num_components == 3) { + int h1 = pic_param->components[0].h_sampling_factor; + int h2 = pic_param->components[1].h_sampling_factor; + int h3 = pic_param->components[2].h_sampling_factor; + int v1 = pic_param->components[0].v_sampling_factor; + int v2 = pic_param->components[1].v_sampling_factor; + int v3 = pic_param->components[2].v_sampling_factor; + + if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV420; + fourcc = VA_FOURCC_IMC3; + } else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422H; + fourcc = VA_FOURCC_422H; + } else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV444; + fourcc = VA_FOURCC_444P; + } else if (h1 == 4 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV411; + fourcc = VA_FOURCC_411P; + } else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422V; + fourcc = VA_FOURCC_422V; + } else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 2 && v3 == 2) { + subsampling = SUBSAMPLE_YUV422H; + fourcc = VA_FOURCC_422H; + } else if (h1 == 2 && h2 == 2 && h3 == 2 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422V; + fourcc = VA_FOURCC_422V; + } else + assert(0); + } else { + assert(0); + } - assert(gen7_mfd_context); + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, fourcc, subsampling); - switch (profile) { - case VAProfileMPEG2Simple: - case VAProfileMPEG2Main: - gen7_mfd_mpeg2_decode_picture(ctx, decode_state, gen7_mfd_context); - break; - - case VAProfileH264Baseline: - case VAProfileH264Main: - case VAProfileH264High: - gen7_mfd_avc_decode_picture(ctx, decode_state, gen7_mfd_context); - break; + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = 1; - case VAProfileVC1Simple: - case VAProfileVC1Main: + gen7_mfd_context->post_deblocking_output.bo = NULL; + gen7_mfd_context->post_deblocking_output.valid = 0; + + gen7_mfd_context->intra_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bitplane_read_buffer.bo = NULL; + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static const int va_to_gen7_jpeg_rotation[4] = { + GEN7_JPEG_ROTATION_0, + GEN7_JPEG_ROTATION_90, + GEN7_JPEG_ROTATION_180, + GEN7_JPEG_ROTATION_270 +}; + +static void +gen7_mfd_jpeg_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferJPEGBaseline *pic_param; + int chroma_type = GEN7_YUV420; + int frame_width_in_blks; + int frame_height_in_blks; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + if (pic_param->num_components == 1) + chroma_type = GEN7_YUV400; + else if (pic_param->num_components == 3) { + int h1 = pic_param->components[0].h_sampling_factor; + int h2 = pic_param->components[1].h_sampling_factor; + int h3 = pic_param->components[2].h_sampling_factor; + int v1 = pic_param->components[0].v_sampling_factor; + int v2 = pic_param->components[1].v_sampling_factor; + int v3 = pic_param->components[2].v_sampling_factor; + + if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV420; + else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422H_2Y; + else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV444; + else if (h1 == 4 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV411; + else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422V_2Y; + else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 2 && v3 == 2) + chroma_type = GEN7_YUV422H_4Y; + else if (h2 == 2 && h2 == 2 && h3 == 2 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422V_4Y; + else + assert(0); + } + + if (chroma_type == GEN7_YUV400 || + chroma_type == GEN7_YUV444 || + chroma_type == GEN7_YUV422V_2Y) { + frame_width_in_blks = ((pic_param->picture_width + 7) / 8); + frame_height_in_blks = ((pic_param->picture_height + 7) / 8); + } else if (chroma_type == GEN7_YUV411) { + frame_width_in_blks = ((pic_param->picture_width + 31) / 32) * 4; + frame_height_in_blks = ((pic_param->picture_height + 31) / 32) * 4; + } else { + frame_width_in_blks = ((pic_param->picture_width + 15) / 16) * 2; + frame_height_in_blks = ((pic_param->picture_height + 15) / 16) * 2; + } + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MFX_JPEG_PIC_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (va_to_gen7_jpeg_rotation[0] << 4) | /* without rotation */ + (chroma_type << 0)); + OUT_BCS_BATCH(batch, + ((frame_height_in_blks - 1) << 16) | /* FrameHeightInBlks */ + ((frame_width_in_blks - 1) << 0)); /* FrameWidthInBlks */ + ADVANCE_BCS_BATCH(batch); +} + +static const int va_to_gen7_jpeg_hufftable[2] = { + MFX_HUFFTABLE_ID_Y, + MFX_HUFFTABLE_ID_UV +}; + +static void +gen7_mfd_jpeg_huff_table_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context, + int num_tables) +{ + VAHuffmanTableBufferJPEGBaseline *huffman_table; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int index; + + if (!decode_state->huffman_table || !decode_state->huffman_table->buffer) + return; + + huffman_table = (VAHuffmanTableBufferJPEGBaseline *)decode_state->huffman_table->buffer; + + for (index = 0; index < num_tables; index++) { + int id = va_to_gen7_jpeg_hufftable[index]; + if (!huffman_table->load_huffman_table[index]) + continue; + BEGIN_BCS_BATCH(batch, 53); + OUT_BCS_BATCH(batch, MFX_JPEG_HUFF_TABLE_STATE | (53 - 2)); + OUT_BCS_BATCH(batch, id); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].num_dc_codes, 12); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].dc_values, 12); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].num_ac_codes, 16); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].ac_values, 164); + ADVANCE_BCS_BATCH(batch); + } +} + +static const int va_to_gen7_jpeg_qm[5] = { + -1, + MFX_QM_JPEG_LUMA_Y_QUANTIZER_MATRIX, + MFX_QM_JPEG_CHROMA_CB_QUANTIZER_MATRIX, + MFX_QM_JPEG_CHROMA_CR_QUANTIZER_MATRIX, + MFX_QM_JPEG_ALPHA_QUANTIZER_MATRIX +}; + +static void +gen7_mfd_jpeg_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferJPEGBaseline *pic_param; + VAIQMatrixBufferJPEGBaseline *iq_matrix; + int index; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferJPEGBaseline *)decode_state->iq_matrix->buffer; + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + assert(pic_param->num_components <= 3); + + for (index = 0; index < pic_param->num_components; index++) { + int id = pic_param->components[index].component_id - pic_param->components[0].component_id + 1; + int qm_type; + unsigned char *qm = iq_matrix->quantiser_table[pic_param->components[index].quantiser_table_selector]; + unsigned char raster_qm[64]; + int j; + + if (id > 4 || id < 1) + continue; + + if (!iq_matrix->load_quantiser_table[pic_param->components[index].quantiser_table_selector]) + continue; + + qm_type = va_to_gen7_jpeg_qm[id]; + + for (j = 0; j < 64; j++) + raster_qm[zigzag_direct[j]] = qm[j]; + + gen7_mfd_qm_state(ctx, qm_type, raster_qm, 64, gen7_mfd_context); + } +} + +static void +gen7_mfd_jpeg_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferJPEGBaseline *pic_param, + VASliceParameterBufferJPEGBaseline *slice_param, + VASliceParameterBufferJPEGBaseline *next_slice_param, + dri_bo *slice_data_bo, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int scan_component_mask = 0; + int i; + + assert(slice_param->num_components > 0); + assert(slice_param->num_components < 4); + assert(slice_param->num_components <= pic_param->num_components); + + for (i = 0; i < slice_param->num_components; i++) { + switch (slice_param->components[i].component_selector - pic_param->components[0].component_id + 1) { + case 1: + scan_component_mask |= (1 << 0); + break; + case 2: + scan_component_mask |= (1 << 1); + break; + case 3: + scan_component_mask |= (1 << 2); + break; + default: + assert(0); + break; + } + } + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_JPEG_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset); + OUT_BCS_BATCH(batch, + slice_param->slice_horizontal_position << 16 | + slice_param->slice_vertical_position << 0); + OUT_BCS_BATCH(batch, + ((slice_param->num_components != 1) << 30) | /* interleaved */ + (scan_component_mask << 27) | /* scan components */ + (0 << 26) | /* disable interrupt allowed */ + (slice_param->num_mcus << 0)); /* MCU count */ + OUT_BCS_BATCH(batch, + (slice_param->restart_interval << 0)); /* RestartInterval */ + ADVANCE_BCS_BATCH(batch); +} + +/* Workaround for JPEG decoding on Ivybridge */ + +static struct { + int width; + int height; + unsigned char data[32]; + int data_size; + int data_bit_offset; + int qp; +} gen7_jpeg_wa_clip = { + 16, + 16, + { + 0x65, 0xb8, 0x40, 0x32, 0x13, 0xfd, 0x06, 0x6c, + 0xfc, 0x0a, 0x50, 0x71, 0x5c, 0x00 + }, + 14, + 40, + 28, +}; + +static void +gen7_jpeg_wa_init(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAStatus status; + struct object_surface *obj_surface; + + if (gen7_mfd_context->jpeg_wa_surface_id != VA_INVALID_SURFACE) + i965_DestroySurfaces(ctx, + &gen7_mfd_context->jpeg_wa_surface_id, + 1); + + status = i965_CreateSurfaces(ctx, + gen7_jpeg_wa_clip.width, + gen7_jpeg_wa_clip.height, + VA_RT_FORMAT_YUV420, + 1, + &gen7_mfd_context->jpeg_wa_surface_id); + assert(status == VA_STATUS_SUCCESS); + + obj_surface = SURFACE(gen7_mfd_context->jpeg_wa_surface_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + gen7_mfd_context->jpeg_wa_surface_object = obj_surface; + + if (!gen7_mfd_context->jpeg_wa_slice_data_bo) { + gen7_mfd_context->jpeg_wa_slice_data_bo = dri_bo_alloc(i965->intel.bufmgr, + "JPEG WA data", + 0x1000, + 0x1000); + dri_bo_subdata(gen7_mfd_context->jpeg_wa_slice_data_bo, + 0, + gen7_jpeg_wa_clip.data_size, + gen7_jpeg_wa_clip.data); + } +} + +static void +gen7_jpeg_wa_pipe_mode_select(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Currently only support long format */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (0 << 9) | /* Post Deblocking Output */ + (1 << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (MFX_CODEC_DECODE << 4) | /* decoding mode */ + (MFX_FORMAT_AVC << 0)); + OUT_BCS_BATCH(batch, + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); /* pic status/error report id */ + OUT_BCS_BATCH(batch, 0); /* reserved */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_jpeg_wa_surface_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct object_surface *obj_surface = gen7_mfd_context->jpeg_wa_surface_object; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_width - 1) << 18) | + ((obj_surface->orig_height - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* interleave chroma, set to 0 for JPEG */ + (0 << 22) | /* surface object control state, ignored */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, must be 1 */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for U(Cb), must be 0 */ + (obj_surface->y_cb_offset << 0)); /* Y offset for U(Cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for V(Cr), must be 0 */ + (0 << 0)); /* Y offset for V(Cr), must be 0 for video codec, non-zoro for JPEG */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_jpeg_wa_pipe_buf_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = gen7_mfd_context->jpeg_wa_surface_object; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *intra_bo; + int i; + + intra_bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + + BEGIN_BCS_BATCH(batch, 24); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (24 - 2)); + OUT_BCS_RELOC(batch, + obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); /* post deblocking */ + + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + + OUT_BCS_RELOC(batch, + intra_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + + /* DW 7..22 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); /* ignore DW23 for decoding */ + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(intra_bo); +} + +static void +gen7_jpeg_wa_bsp_buf_base_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *bsd_mpc_bo, *mpr_bo; + + bsd_mpc_bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + + mpr_bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + 7680, /* 1. 0 * 120 * 64 */ + 0x1000); + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2)); + + OUT_BCS_RELOC(batch, + bsd_mpc_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_RELOC(batch, + mpr_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(bsd_mpc_bo); + dri_bo_unreference(mpr_bo); +} + +static void +gen7_jpeg_wa_avc_qm_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + +} + +static void +gen7_jpeg_wa_avc_img_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int img_struct = 0; + int mbaff_frame_flag = 0; + unsigned int width_in_mbs = 1, height_in_mbs = 1; + + BEGIN_BCS_BATCH(batch, 16); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + OUT_BCS_BATCH(batch, + (width_in_mbs * height_in_mbs - 1)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + OUT_BCS_BATCH(batch, + (0 << 24) | + (0 << 16) | + (0 << 14) | + (0 << 13) | + (0 << 12) | /* differ from GEN6 */ + (0 << 10) | + (img_struct << 8)); + OUT_BCS_BATCH(batch, + (1 << 10) | /* 4:2:0 */ + (1 << 7) | /* CABAC */ + (0 << 6) | + (0 << 5) | + (0 << 4) | + (0 << 3) | + (1 << 2) | + (mbaff_frame_flag << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_jpeg_wa_avc_directmode_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 69); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (69 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); /* bottom */ + } + + /* the current decoding frame/field */ + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); /* bottom */ + + /* POC List */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_jpeg_wa_ind_obj_base_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_RELOC(batch, + gen7_mfd_context->jpeg_wa_slice_data_bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0x80000000); /* must set, up to 2G */ + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_jpeg_wa_avc_bsd_object(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + /* the input bitsteam format on GEN7 differs from GEN6 */ + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, gen7_jpeg_wa_clip.data_size); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 31) | + (0 << 14) | + (0 << 12) | + (0 << 10) | + (0 << 8)); + OUT_BCS_BATCH(batch, + ((gen7_jpeg_wa_clip.data_bit_offset >> 3) << 16) | + (0 << 5) | + (0 << 4) | + (1 << 3) | /* LastSlice Flag */ + (gen7_jpeg_wa_clip.data_bit_offset & 0x7)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_jpeg_wa_avc_slice_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int slice_hor_pos = 0, slice_ver_pos = 0, next_slice_hor_pos = 0, next_slice_ver_pos = 1; + int num_ref_idx_l0 = 0, num_ref_idx_l1 = 0; + int first_mb_in_slice = 0; + int slice_type = SLICE_TYPE_I; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (0 << 8) | + (0 << 0)); + OUT_BCS_BATCH(batch, + (0 << 29) | + (1 << 27) | /* disable Deblocking */ + (0 << 24) | + (gen7_jpeg_wa_clip.qp << 16) | + (0 << 8) | + (0 << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (next_slice_ver_pos << 16) | + (next_slice_hor_pos << 0)); + OUT_BCS_BATCH(batch, (1 << 19)); /* last slice flag */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen7_mfd_jpeg_wa(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + gen7_jpeg_wa_init(ctx, gen7_mfd_context); + intel_batchbuffer_emit_mi_flush(batch); + gen7_jpeg_wa_pipe_mode_select(ctx, gen7_mfd_context); + gen7_jpeg_wa_surface_state(ctx, gen7_mfd_context); + gen7_jpeg_wa_pipe_buf_addr_state(ctx, gen7_mfd_context); + gen7_jpeg_wa_bsp_buf_base_addr_state(ctx, gen7_mfd_context); + gen7_jpeg_wa_avc_qm_state(ctx, gen7_mfd_context); + gen7_jpeg_wa_avc_img_state(ctx, gen7_mfd_context); + gen7_jpeg_wa_ind_obj_base_addr_state(ctx, gen7_mfd_context); + + gen7_jpeg_wa_avc_directmode_state(ctx, gen7_mfd_context); + gen7_jpeg_wa_avc_slice_state(ctx, gen7_mfd_context); + gen7_jpeg_wa_avc_bsd_object(ctx, gen7_mfd_context); +} + +void +gen7_mfd_jpeg_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferJPEGBaseline *pic_param; + VASliceParameterBufferJPEGBaseline *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j, max_selector = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + /* Currently only support Baseline DCT */ + gen7_mfd_jpeg_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + gen7_mfd_jpeg_wa(ctx, gen7_mfd_context); + intel_batchbuffer_emit_mi_flush(batch); + gen7_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen7_mfd_surface_state(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen7_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen7_mfd_jpeg_pic_state(ctx, decode_state, gen7_mfd_context); + gen7_mfd_jpeg_qm_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen7_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_JPEG, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + int component; + + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + for (component = 0; component < slice_param->num_components; component++) { + if (max_selector < slice_param->components[component].dc_table_selector) + max_selector = slice_param->components[component].dc_table_selector; + + if (max_selector < slice_param->components[component].ac_table_selector) + max_selector = slice_param->components[component].ac_table_selector; + } + + slice_param++; + } + } + + assert(max_selector < 2); + gen7_mfd_jpeg_huff_table_state(ctx, decode_state, gen7_mfd_context, max_selector + 1); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen7_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_JPEG, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen7_mfd_jpeg_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static VAStatus +gen7_mfd_decode_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) + +{ + struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + struct decode_state *decode_state = &codec_state->decode; + VAStatus vaStatus; + + assert(gen7_mfd_context); + + vaStatus = intel_decoder_sanity_check_input(ctx, profile, decode_state); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + + gen7_mfd_context->wa_mpeg2_slice_vertical_position = -1; + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen7_mfd_mpeg2_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264StereoHigh: + gen7_mfd_avc_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: case VAProfileVC1Advanced: gen7_mfd_vc1_decode_picture(ctx, decode_state, gen7_mfd_context); break; + case VAProfileJPEGBaseline: + gen7_mfd_jpeg_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + default: assert(0); break; } + + vaStatus = VA_STATUS_SUCCESS; + +out: + return vaStatus; } static void gen7_mfd_context_destroy(void *hw_context) { + VADriverContextP ctx; struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + ctx = (VADriverContextP)(gen7_mfd_context->driver_context); + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); gen7_mfd_context->post_deblocking_output.bo = NULL; @@ -2042,25 +2699,65 @@ dri_bo_unreference(gen7_mfd_context->bitplane_read_buffer.bo); gen7_mfd_context->bitplane_read_buffer.bo = NULL; + dri_bo_unreference(gen7_mfd_context->jpeg_wa_slice_data_bo); + + if (gen7_mfd_context->jpeg_wa_surface_id != VA_INVALID_SURFACE) { + i965_DestroySurfaces(ctx, + &gen7_mfd_context->jpeg_wa_surface_id, + 1); + gen7_mfd_context->jpeg_wa_surface_object = NULL; + } + intel_batchbuffer_free(gen7_mfd_context->base.batch); free(gen7_mfd_context); } +static void gen7_mfd_mpeg2_context_init(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen7_mfd_context->iq_matrix.mpeg2.load_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_non_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_chroma_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_chroma_non_intra_quantiser_matrix = -1; +} + struct hw_context * -gen7_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +gen7_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) { struct intel_driver_data *intel = intel_driver_data(ctx); struct gen7_mfd_context *gen7_mfd_context = calloc(1, sizeof(struct gen7_mfd_context)); int i; + assert(gen7_mfd_context); gen7_mfd_context->base.destroy = gen7_mfd_context_destroy; gen7_mfd_context->base.run = gen7_mfd_decode_picture; - gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; gen7_mfd_context->reference_surface[i].frame_store_id = -1; + gen7_mfd_context->reference_surface[i].obj_surface = NULL; + } + + gen7_mfd_context->jpeg_wa_surface_id = VA_INVALID_SURFACE; + gen7_mfd_context->jpeg_wa_surface_object = NULL; + + switch (obj_config->profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen7_mfd_mpeg2_context_init(ctx, gen7_mfd_context); + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264StereoHigh: + gen7_mfd_avc_context_init(ctx, gen7_mfd_context); + break; + default: + break; } + gen7_mfd_context->driver_context = ctx; return (struct hw_context *)gen7_mfd_context; } diff -Nru intel-vaapi-driver-1.0.15/src/gen7_mfd.h intel-vaapi-driver-1.7.1/src/gen7_mfd.h --- intel-vaapi-driver-1.0.15/src/gen7_mfd.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen7_mfd.h 2016-06-03 06:05:58.000000000 +0000 @@ -33,13 +33,7 @@ #include #include #include - -struct gen7_avc_surface -{ - dri_bo *dmv_top; - dri_bo *dmv_bottom; - int dmv_bottom_flag; -}; +#include "i965_decoder.h" #define GEN7_VC1_I_PICTURE 0 #define GEN7_VC1_P_PICTURE 1 @@ -52,13 +46,26 @@ #define GEN7_VC1_ADVANCED_PROFILE 2 #define GEN7_VC1_RESERVED_PROFILE 3 +#define GEN7_JPEG_ROTATION_0 0 +#define GEN7_JPEG_ROTATION_90 1 +#define GEN7_JPEG_ROTATION_270 2 +#define GEN7_JPEG_ROTATION_180 3 + +#define GEN7_YUV400 0 +#define GEN7_YUV420 1 +#define GEN7_YUV422H_2Y 2 +#define GEN7_YUV444 3 +#define GEN7_YUV411 4 +#define GEN7_YUV422V_2Y 5 +#define GEN7_YUV422H_4Y 6 +#define GEN7_YUV422V_4Y 7 + struct gen7_vc1_surface { dri_bo *dmv; int picture_type; }; -#define MAX_MFX_REFERENCE_SURFACES 16 struct hw_context; struct gen7_mfd_context @@ -67,47 +74,27 @@ union { VAIQMatrixBufferMPEG2 mpeg2; + VAIQMatrixBufferH264 h264; /* flat scaling lists (default) */ } iq_matrix; - struct { - VASurfaceID surface_id; - int frame_store_id; - } reference_surface[MAX_MFX_REFERENCE_SURFACES]; - - struct { - dri_bo *bo; - int valid; - } post_deblocking_output; - - struct { - dri_bo *bo; - int valid; - } pre_deblocking_output; - - struct { - dri_bo *bo; - int valid; - } intra_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } deblocking_filter_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } bsd_mpc_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } mpr_row_store_scratch_buffer; - - struct { - dri_bo *bo; - int valid; - } bitplane_read_buffer; + GenFrameStoreContext fs_ctx; + GenFrameStore reference_surface[MAX_GEN_REFERENCE_FRAMES]; + GenBuffer post_deblocking_output; + GenBuffer pre_deblocking_output; + GenBuffer intra_row_store_scratch_buffer; + GenBuffer deblocking_filter_row_store_scratch_buffer; + GenBuffer bsd_mpc_row_store_scratch_buffer; + GenBuffer mpr_row_store_scratch_buffer; + GenBuffer bitplane_read_buffer; + GenBuffer segmentation_buffer; + + VASurfaceID jpeg_wa_surface_id; + struct object_surface *jpeg_wa_surface_object; + dri_bo *jpeg_wa_slice_data_bo; + + int wa_mpeg2_slice_vertical_position; + + void *driver_context; }; #endif /* _GEN7_MFD_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/gen7_vme.c intel-vaapi-driver-1.7.1/src/gen7_vme.c --- intel-vaapi-driver-1.0.15/src/gen7_vme.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen7_vme.c 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,1079 @@ +/* + * Copyright © 2010-2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "gen6_vme.h" +#include "gen6_mfc.h" +#ifdef SURFACE_STATE_PADDED_SIZE +#undef SURFACE_STATE_PADDED_SIZE +#endif + +#define VME_MSG_LENGTH 32 + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN7 +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */ +#define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */ +#define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */ + +enum VIDEO_CODING_TYPE{ + VIDEO_CODING_AVC = 0, + VIDEO_CODING_MPEG2, + VIDEO_CODING_SUM +}; + +enum AVC_VME_KERNEL_TYPE{ + AVC_VME_INTRA_SHADER = 0, + AVC_VME_INTER_SHADER, + AVC_VME_BATCHBUFFER, + AVC_VME_BINTER_SHADER, + AVC_VME_KERNEL_SUM +}; + +enum MPEG2_VME_KERNEL_TYPE{ + MPEG2_VME_INTER_SHADER = 0, + MPEG2_VME_BATCHBUFFER, + MPEG2_VME_KERNEL_SUM +}; + + +static const uint32_t gen7_vme_intra_frame[][4] = { +#include "shaders/vme/intra_frame_ivb.g7b" +}; + +static const uint32_t gen7_vme_inter_frame[][4] = { +#include "shaders/vme/inter_frame_ivb.g7b" +}; + +static const uint32_t gen7_vme_batchbuffer[][4] = { +#include "shaders/vme/batchbuffer.g7b" +}; + +static const uint32_t gen7_vme_binter_frame[][4] = { +#include "shaders/vme/inter_bframe_ivb.g7b" +}; + +static struct i965_kernel gen7_vme_kernels[] = { + { + "AVC VME Intra Frame", + AVC_VME_INTRA_SHADER, /*index*/ + gen7_vme_intra_frame, + sizeof(gen7_vme_intra_frame), + NULL + }, + { + "AVC VME inter Frame", + AVC_VME_INTER_SHADER, + gen7_vme_inter_frame, + sizeof(gen7_vme_inter_frame), + NULL + }, + { + "AVC VME BATCHBUFFER", + AVC_VME_BATCHBUFFER, + gen7_vme_batchbuffer, + sizeof(gen7_vme_batchbuffer), + NULL + }, + { + "AVC VME binter Frame", + AVC_VME_BINTER_SHADER, + gen7_vme_binter_frame, + sizeof(gen7_vme_binter_frame), + NULL + } +}; + +static const uint32_t gen7_vme_mpeg2_inter_frame[][4] = { +#include "shaders/vme/mpeg2_inter_ivb.g7b" +}; + +static const uint32_t gen7_vme_mpeg2_batchbuffer[][4] = { +#include "shaders/vme/batchbuffer.g7b" +}; + +static struct i965_kernel gen7_vme_mpeg2_kernels[] = { + { + "MPEG2 VME inter Frame", + MPEG2_VME_INTER_SHADER, + gen7_vme_mpeg2_inter_frame, + sizeof(gen7_vme_mpeg2_inter_frame), + NULL + }, + { + "MPEG2 VME BATCHBUFFER", + MPEG2_VME_BATCHBUFFER, + gen7_vme_mpeg2_batchbuffer, + sizeof(gen7_vme_mpeg2_batchbuffer), + NULL + }, +}; + +/* only used for VME source surface state */ +static void +gen7_vme_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_surface2_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen7_vme_media_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_media_rw_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen7_vme_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES; + else + vme_context->vme_output.size_block = INTER_VME_OUTPUT_IN_BYTES; + + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen7_vme_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 32; /* 2 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_batchbuffer, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static VAStatus +gen7_vme_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen7_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen7_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + + if (!is_intra) { + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int slice_type; + + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI); + + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen7_vme_source_surface_state); + + if (slice_type == SLICE_TYPE_B) + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen7_vme_source_surface_state); + } + + /* VME output */ + gen7_vme_output_buffer_setup(ctx, encode_state, 3, encoder_context); + gen7_vme_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen7_vme_interface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_interface_descriptor_data *desc; + int i; + dri_bo *bo; + + bo = vme_context->gpe_context.idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < vme_context->vme_kernel_sum; i++) { + struct i965_kernel *kernel; + kernel = &vme_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 1; /* FIXME: */ + desc->desc2.sampler_state_pointer = (vme_context->vme_state.bo->offset >> 5); + desc->desc3.binding_table_entry_count = 1; /* FIXME: */ + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH; + + /*kernel start*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + /*Sampler State(VME state pointer)*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + (1 << 2), // + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc2), + vme_context->vme_state.bo); + desc++; + } + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen7_vme_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned char *constant_buffer; + unsigned int *vme_state_message; + int mv_num; + + vme_state_message = (unsigned int *)vme_context->vme_state_message; + mv_num = 32; + + if (encoder_context->codec == CODEC_H264) { + if (vme_context->h264_level >= 30) { + mv_num = 16; + + if (vme_context->h264_level >= 31) + mv_num = 8; + } + } else if (encoder_context->codec == CODEC_MPEG2) { + mv_num = 2; + } + + + vme_state_message[31] = mv_num; + + dri_bo_map(vme_context->gpe_context.curbe.bo, 1); + assert(vme_context->gpe_context.curbe.bo->virtual); + constant_buffer = vme_context->gpe_context.curbe.bo->virtual; + + /* Pass the required constant info into the constant buffer */ + memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128); + + dri_bo_unmap( vme_context->gpe_context.curbe.bo); + + return VA_STATUS_SUCCESS; +} + + +static VAStatus gen7_vme_avc_state_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned int *vme_state_message; + unsigned int *mb_cost_table; + int i; + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY); + + mb_cost_table = (unsigned int *)vme_context->vme_state_message; + //building VME state message + dri_bo_map(vme_context->vme_state.bo, 1); + assert(vme_context->vme_state.bo->virtual); + vme_state_message = (unsigned int *)vme_context->vme_state.bo->virtual; + + if (((slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP)) && + !is_low_quality) { + vme_state_message[0] = 0x01010101; + vme_state_message[1] = 0x10010101; + vme_state_message[2] = 0x0F0F0F0F; + vme_state_message[3] = 0x100F0F0F; + vme_state_message[4] = 0x01010101; + vme_state_message[5] = 0x10010101; + vme_state_message[6] = 0x0F0F0F0F; + vme_state_message[7] = 0x100F0F0F; + vme_state_message[8] = 0x01010101; + vme_state_message[9] = 0x10010101; + vme_state_message[10] = 0x0F0F0F0F; + vme_state_message[11] = 0x000F0F0F; + vme_state_message[12] = 0x00; + vme_state_message[13] = 0x00; + } else { + vme_state_message[0] = 0x10010101; + vme_state_message[1] = 0x100F0F0F; + vme_state_message[2] = 0x10010101; + vme_state_message[3] = 0x000F0F0F; + vme_state_message[4] = 0; + vme_state_message[5] = 0; + vme_state_message[6] = 0; + vme_state_message[7] = 0; + vme_state_message[8] = 0; + vme_state_message[9] = 0; + vme_state_message[10] = 0; + vme_state_message[11] = 0; + vme_state_message[12] = 0; + vme_state_message[13] = 0; + } + + vme_state_message[14] = (mb_cost_table[2] & 0xFFFF); + vme_state_message[15] = 0; + vme_state_message[16] = mb_cost_table[0]; + vme_state_message[17] = mb_cost_table[1]; + vme_state_message[18] = mb_cost_table[3]; + vme_state_message[19] = mb_cost_table[4]; + + for(i = 20; i < 32; i++) { + vme_state_message[i] = 0; + } + + dri_bo_unmap( vme_context->vme_state.bo); + return VA_STATUS_SUCCESS; +} + +static VAStatus gen7_vme_mpeg2_state_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned int *vme_state_message; + int i; + unsigned int *mb_cost_table; + + mb_cost_table = (unsigned int *)vme_context->vme_state_message; + + //building VME state message + dri_bo_map(vme_context->vme_state.bo, 1); + assert(vme_context->vme_state.bo->virtual); + vme_state_message = (unsigned int *)vme_context->vme_state.bo->virtual; + + vme_state_message[0] = 0x01010101; + vme_state_message[1] = 0x10010101; + vme_state_message[2] = 0x0F0F0F0F; + vme_state_message[3] = 0x100F0F0F; + vme_state_message[4] = 0x01010101; + vme_state_message[5] = 0x10010101; + vme_state_message[6] = 0x0F0F0F0F; + vme_state_message[7] = 0x100F0F0F; + vme_state_message[8] = 0x01010101; + vme_state_message[9] = 0x10010101; + vme_state_message[10] = 0x0F0F0F0F; + vme_state_message[11] = 0x000F0F0F; + vme_state_message[12] = 0x00; + vme_state_message[13] = 0x00; + + vme_state_message[14] = (mb_cost_table[2] & 0xFFFF); + vme_state_message[15] = 0; + vme_state_message[16] = mb_cost_table[0]; + vme_state_message[17] = 0; + vme_state_message[18] = mb_cost_table[3]; + vme_state_message[19] = mb_cost_table[4]; + + for(i = 20; i < 32; i++) { + vme_state_message[i] = 0; + } + //vme_state_message[16] = 0x42424242; //cost function LUT set 0 for Intra + + dri_bo_unmap( vme_context->vme_state.bo); + return VA_STATUS_SUCCESS; +} + +static void +gen7_vme_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s, j; + unsigned int *command_ptr; + + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + int slice_mb_begin = slice_param->macroblock_address; + int slice_mb_number = slice_param->num_macroblocks; + unsigned int mb_intra_ub; + int slice_mb_x = slice_param->macroblock_address % mb_width; + + for (i = 0; i < slice_mb_number;) { + int mb_count = i + slice_mb_begin; + + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + + if (i < mb_width) { + if (i == 0) + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE); + + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK); + + if ((i == (mb_width - 1)) && slice_mb_x) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + } + + if ((i == mb_width) && slice_mb_x) { + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D); + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + i += 1; + } + + slice_param++; + } + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + + +static void gen7_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + dri_bo *bo; + + i965_gpe_context_init(ctx, &vme_context->gpe_context); + + /* VME output buffer */ + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + /* VME state */ + dri_bo_unreference(vme_context->vme_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 1024*16, 64); + assert(bo); + vme_context->vme_state.bo = bo; +} + +static void gen7_vme_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + int s; + bool allow_hwscore = true; + int kernel_shader; + unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY); + + if (is_low_quality) + allow_hwscore = false; + else { + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + if ((pSliceParameter->macroblock_address % width_in_mbs)) { + allow_hwscore = false; + break; + } + } + } + + if ((pSliceParameter->slice_type == SLICE_TYPE_I) || + (pSliceParameter->slice_type == SLICE_TYPE_SI)) { + kernel_shader = AVC_VME_INTRA_SHADER; + } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) || + (pSliceParameter->slice_type == SLICE_TYPE_SP)) { + kernel_shader = AVC_VME_INTER_SHADER; + } else { + kernel_shader = AVC_VME_BINTER_SHADER; + if (!allow_hwscore) + kernel_shader = AVC_VME_INTER_SHADER; + } + + if (allow_hwscore) + gen7_vme_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + + else + gen7_vme_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen7_vme_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if (!vme_context->h264_level || + (vme_context->h264_level != pSequenceParameter->level_idc)) { + vme_context->h264_level = pSequenceParameter->level_idc; + } + + intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context); + /*Setup all the memory object*/ + gen7_vme_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen7_vme_interface_setup(ctx, encode_state, encoder_context); + gen7_vme_constant_setup(ctx, encode_state, encoder_context); + gen7_vme_avc_state_setup(ctx, encode_state, is_intra, encoder_context); + + /*Programing media pipeline*/ + gen7_vme_pipeline_programing(ctx, encode_state, encoder_context); + + return vaStatus; +} + +static VAStatus gen7_vme_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen7_vme_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen7_vme_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen7_vme_media_init(ctx, encoder_context); + gen7_vme_prepare(ctx, encode_state, encoder_context); + gen7_vme_run(ctx, encode_state, encoder_context); + gen7_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen7_vme_mpeg2_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + int is_intra, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES; + else + vme_context->vme_output.size_block = INTER_VME_OUTPUT_IN_BYTES; + + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen7_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 32; /* 4 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_batchbuffer, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static VAStatus +gen7_vme_mpeg2_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen7_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen7_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + + if (!is_intra) { + /* reference 0 */ + obj_surface = encode_state->reference_objects[0]; + if (obj_surface->bo != NULL) + gen7_vme_source_surface_state(ctx, 1, obj_surface, encoder_context); + + /* reference 1 */ + obj_surface = encode_state->reference_objects[1]; + if (obj_surface && obj_surface->bo != NULL) + gen7_vme_source_surface_state(ctx, 2, obj_surface, encoder_context); + } + + /* VME output */ + gen7_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context); + gen7_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen7_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s, j; + unsigned int *command_ptr; + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + int slice_mb_begin = slice_param->macroblock_address; + int slice_mb_number = slice_param->num_macroblocks; + unsigned int mb_intra_ub; + + for (i = 0; i < slice_mb_number;) { + int mb_count = i + slice_mb_begin; + + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + + + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + i += 1; + } + + slice_param++; + } + } + + *command_ptr++ = 0; + *command_ptr++ = MI_BATCH_BUFFER_END; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void +gen7_vme_mpeg2_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + bool allow_hwscore = true; + int s; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + int j; + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + if (slice_param->macroblock_address % width_in_mbs) { + allow_hwscore = false; + break; + } + } + } + + if (allow_hwscore) + gen7_vme_mpeg2_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + MPEG2_VME_INTER_SHADER, + encoder_context); + else + gen7_vme_mpeg2_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + MPEG2_VME_INTER_SHADER, + 0, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen6_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus +gen7_vme_mpeg2_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if ((!vme_context->mpeg2_level) || + (vme_context->mpeg2_level != (seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK))) { + vme_context->mpeg2_level = seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK; + } + + /*Setup all the memory object*/ + + intel_vme_mpeg2_state_setup(ctx, encode_state, encoder_context); + gen7_vme_mpeg2_surface_setup(ctx, encode_state, 0, encoder_context); + gen7_vme_interface_setup(ctx, encode_state, encoder_context); + gen7_vme_constant_setup(ctx, encode_state, encoder_context); + gen7_vme_mpeg2_state_setup(ctx, encode_state, 0, encoder_context); + + /*Programing media pipeline*/ + gen7_vme_mpeg2_pipeline_programing(ctx, encode_state, 0, encoder_context); + + return vaStatus; +} + +static VAStatus +gen7_vme_mpeg2_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSliceParameterBufferMPEG2 *slice_param = + (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferMPEG2 *seq_param = + (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + + /*No need of to exec VME for Intra slice */ + if (slice_param->is_intra_slice) { + if(!vme_context->vme_output.bo) { + int w_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int h_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + vme_context->vme_output.num_blocks = w_in_mbs * h_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES; + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "MPEG2 VME output buffer", + vme_context->vme_output.num_blocks + * vme_context->vme_output.size_block, + 0x1000); + } + + return VA_STATUS_SUCCESS; + } + + gen7_vme_media_init(ctx, encoder_context); + gen7_vme_mpeg2_prepare(ctx, encode_state, encoder_context); + gen7_vme_run(ctx, encode_state, encoder_context); + gen7_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen7_vme_context_destroy(void *context) +{ + struct gen6_vme_context *vme_context = context; + + i965_gpe_context_destroy(&vme_context->gpe_context); + + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + if (vme_context->vme_state_message) { + free(vme_context->vme_state_message); + vme_context->vme_state_message = NULL; + } + + free(vme_context); +} + +Bool gen7_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context)); + struct i965_kernel *vme_kernel_list = NULL; + + assert(vme_context); + vme_context->gpe_context.surface_state_binding_table.length = + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + vme_context->gpe_context.idrt.max_entries = MAX_INTERFACE_DESC_GEN6; + vme_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + vme_context->gpe_context.curbe.length = CURBE_TOTAL_DATA_LENGTH; + + vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + vme_context->gpe_context.vfe_state.num_urb_entries = 16; + vme_context->gpe_context.vfe_state.gpgpu_mode = 0; + vme_context->gpe_context.vfe_state.urb_entry_size = 59 - 1; + vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; + + gen7_vme_scoreboard_init(ctx, vme_context); + + if (encoder_context->codec == CODEC_H264) { + vme_kernel_list = gen7_vme_kernels; + vme_context->video_coding_type = VIDEO_CODING_AVC; + vme_context->vme_kernel_sum = AVC_VME_KERNEL_SUM; + encoder_context->vme_pipeline = gen7_vme_pipeline; + } else if (encoder_context->codec == CODEC_MPEG2) { + vme_kernel_list = gen7_vme_mpeg2_kernels; + vme_context->video_coding_type = VIDEO_CODING_MPEG2; + vme_context->vme_kernel_sum = MPEG2_VME_KERNEL_SUM; + encoder_context->vme_pipeline = gen7_vme_mpeg2_pipeline; + } else { + /* Unsupported codec */ + assert(0); + } + + i965_gpe_load_kernels(ctx, + &vme_context->gpe_context, + vme_kernel_list, + vme_context->vme_kernel_sum); + + vme_context->vme_surface2_setup = gen7_gpe_surface2_setup; + vme_context->vme_media_rw_surface_setup = gen7_gpe_media_rw_surface_setup; + vme_context->vme_buffer_suface_setup = gen7_gpe_buffer_suface_setup; + + encoder_context->vme_context = vme_context; + encoder_context->vme_context_destroy = gen7_vme_context_destroy; + vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int)); + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen8_mfc.c intel-vaapi-driver-1.7.1/src/gen8_mfc.c --- intel-vaapi-driver-1.0.15/src/gen8_mfc.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen8_mfc.c 2016-06-21 01:35:12.000000000 +0000 @@ -0,0 +1,4609 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + * + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "gen6_mfc.h" +#include "gen6_vme.h" +#include "intel_media.h" +#include +#include "vp8_probs.h" + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define MFC_SOFTWARE_HASWELL 1 + +#define B0_STEP_REV 2 +#define IS_STEPPING_BPLUS(i965) ((i965->intel.revision) >= B0_STEP_REV) + +//Zigzag scan order of the the Luma and Chroma components +//Note: Jpeg Spec ISO/IEC 10918-1, Figure A.6 shows the zigzag order differently. +//The Spec is trying to show the zigzag pattern with number positions. The below +//table will use the pattern shown by A.6 and map the position of the elements in the array +static const uint32_t zigzag_direct[64] = { + 0, 1, 8, 16, 9, 2, 3, 10, + 17, 24, 32, 25, 18, 11, 4, 5, + 12, 19, 26, 33, 40, 48, 41, 34, + 27, 20, 13, 6, 7, 14, 21, 28, + 35, 42, 49, 56, 57, 50, 43, 36, + 29, 22, 15, 23, 30, 37, 44, 51, + 58, 59, 52, 45, 38, 31, 39, 46, + 53, 60, 61, 54, 47, 55, 62, 63 +}; + +//Default Luminance quantization table +//Source: Jpeg Spec ISO/IEC 10918-1, Annex K, Table K.1 +static const uint8_t jpeg_luma_quant[64] = { + 16, 11, 10, 16, 24, 40, 51, 61, + 12, 12, 14, 19, 26, 58, 60, 55, + 14, 13, 16, 24, 40, 57, 69, 56, + 14, 17, 22, 29, 51, 87, 80, 62, + 18, 22, 37, 56, 68, 109, 103, 77, + 24, 35, 55, 64, 81, 104, 113, 92, + 49, 64, 78, 87, 103, 121, 120, 101, + 72, 92, 95, 98, 112, 100, 103, 99 +}; + +//Default Chroma quantization table +//Source: Jpeg Spec ISO/IEC 10918-1, Annex K, Table K.2 +static const uint8_t jpeg_chroma_quant[64] = { + 17, 18, 24, 47, 99, 99, 99, 99, + 18, 21, 26, 66, 99, 99, 99, 99, + 24, 26, 56, 99, 99, 99, 99, 99, + 47, 66, 99, 99, 99, 99, 99, 99, + 99, 99, 99, 99, 99, 99, 99, 99, + 99, 99, 99, 99, 99, 99, 99, 99, + 99, 99, 99, 99, 99, 99, 99, 99, + 99, 99, 99, 99, 99, 99, 99, 99 +}; + + +static const int va_to_gen7_jpeg_hufftable[2] = { + MFX_HUFFTABLE_ID_Y, + MFX_HUFFTABLE_ID_UV +}; + +static const uint32_t gen8_mfc_batchbuffer_avc_intra[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_intra.g7b" +}; + +static const uint32_t gen8_mfc_batchbuffer_avc_inter[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_inter.g7b" +}; + +static struct i965_kernel gen8_mfc_kernels[] = { + { + "MFC AVC INTRA BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTRA, + gen8_mfc_batchbuffer_avc_intra, + sizeof(gen8_mfc_batchbuffer_avc_intra), + NULL + }, + + { + "MFC AVC INTER BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTER, + gen8_mfc_batchbuffer_avc_inter, + sizeof(gen8_mfc_batchbuffer_avc_inter), + NULL + }, +}; + +#define INTER_MODE_MASK 0x03 +#define INTER_8X8 0x03 +#define INTER_16X8 0x01 +#define INTER_8X16 0x02 +#define SUBMB_SHAPE_MASK 0x00FF00 +#define INTER_16X16 0x00 + +#define INTER_MV8 (4 << 20) +#define INTER_MV32 (6 << 20) + + +static void +gen8_mfc_pipe_mode_select(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC || + standard_select == MFX_FORMAT_JPEG || + standard_select == MFX_FORMAT_VP8); + + BEGIN_BCS_BATCH(batch, 5); + + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Must be long format for encoder */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* Stream-Out Enable */ + ((!!mfc_context->post_deblocking_output.bo) << 9) | /* Post Deblocking Output */ + ((!!mfc_context->pre_deblocking_output.bo) << 8) | /* Pre Deblocking Output */ + (0 << 6) | /* frame statistics stream-out enable*/ + (0 << 5) | /* not in stitch mode */ + (1 << 4) | /* encoding mode */ + (standard_select << 0)); /* standard select: avc or mpeg2 or jpeg*/ + OUT_BCS_BATCH(batch, + (0 << 7) | /* expand NOA bus flag */ + (0 << 6) | /* disable slice-level clock gating */ + (0 << 5) | /* disable clock gating for NOA */ + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_surface_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((mfc_context->surface_state.height - 1) << 18) | + ((mfc_context->surface_state.width - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((mfc_context->surface_state.w_pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (mfc_context->surface_state.h_pitch)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_ind_obj_base_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int vme_size; + unsigned int bse_offset; + + BEGIN_BCS_BATCH(batch, 26); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (26 - 2)); + /* the DW1-3 is for the MFX indirect bistream offset */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW4-5 is the MFX upper bound */ + if (encoder_context->codec == CODEC_VP8) { + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.end_offset); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + if(encoder_context->codec != CODEC_JPEG) { + vme_size = vme_context->vme_output.size_block * vme_context->vme_output.num_blocks; + /* the DW6-10 is for MFX Indirect MV Object Base Address */ + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, vme_size); + OUT_BCS_BATCH(batch, 0); + } else { + /* No VME for JPEG */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + /* the DW11-15 is for MFX IT-COFF. Not used on encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW16-20 is for MFX indirect DBLK. Not used on encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW21-25 is for MFC Indirect PAK-BSE Object Base Address for Encoder*/ + bse_offset = (encoder_context->codec == CODEC_JPEG) ? (mfc_context->mfc_indirect_pak_bse_object.offset) : 0; + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + bse_offset); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.end_offset); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_avc_img_state(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + + BEGIN_BCS_BATCH(batch, 16); + + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + /*DW1. MB setting of frame */ + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs - 1) & 0xFFFF)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + /* DW3 QP setting */ + OUT_BCS_BATCH(batch, + (0 << 24) | /* Second Chroma QP Offset */ + (0 << 16) | /* Chroma QP Offset */ + (0 << 14) | /* Max-bit conformance Intra flag */ + (0 << 13) | /* Max Macroblock size conformance Inter flag */ + (pPicParameter->pic_fields.bits.weighted_pred_flag << 12) | /*Weighted_Pred_Flag */ + (pPicParameter->pic_fields.bits.weighted_bipred_idc << 10) | /* Weighted_BiPred_Idc */ + (0 << 8) | /* FIXME: Image Structure */ + (0 << 0) ); /* Current Decoed Image Frame Store ID, reserved in Encode mode */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* Mininum Frame size */ + (0 << 15) | /* Disable reading of Macroblock Status Buffer */ + (0 << 14) | /* Load BitStream Pointer only once, 1 slic 1 frame */ + (0 << 13) | /* CABAC 0 word insertion test enable */ + (1 << 12) | /* MVUnpackedEnable,compliant to DXVA */ + (1 << 10) | /* Chroma Format IDC, 4:2:0 */ + (0 << 8) | /* FIXME: MbMvFormatFlag */ + (pPicParameter->pic_fields.bits.entropy_coding_mode_flag << 7) | /*0:CAVLC encoding mode,1:CABAC*/ + (0 << 6) | /* Only valid for VLD decoding mode */ + (0 << 5) | /* Constrained Intra Predition Flag, from PPS */ + (0 << 4) | /* Direct 8x8 inference flag */ + (pPicParameter->pic_fields.bits.transform_8x8_mode_flag << 3) | /*8x8 or 4x4 IDCT Transform Mode Flag*/ + (1 << 2) | /* Frame MB only flag */ + (0 << 1) | /* MBAFF mode is in active */ + (0 << 0)); /* Field picture flag */ + /* DW5 Trellis quantization */ + OUT_BCS_BATCH(batch, 0); /* Mainly about MB rate control and debug, just ignoring */ + OUT_BCS_BATCH(batch, /* Inter and Intra Conformance Max size limit */ + (0xBB8 << 16) | /* InterMbMaxSz */ + (0xEE8) ); /* IntraMbMaxSz */ + OUT_BCS_BATCH(batch, 0); /* Reserved */ + /* DW8. QP delta */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + /* DW10. Bit setting for MB */ + OUT_BCS_BATCH(batch, 0x8C000000); + OUT_BCS_BATCH(batch, 0x00010000); + /* DW12. */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0x02010100); + /* DW14. For short format */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_qm_state(VADriverContextP ctx, + int qm_type, + unsigned int *qm, + int qm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16); + assert(sizeof(*qm) == 4); + memcpy(qm_buffer, qm, qm_length * 4); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_avc_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[16] = { + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010 + }; + + gen8_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 12, encoder_context); + gen8_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 12, encoder_context); + gen8_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 16, encoder_context); + gen8_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 16, encoder_context); +} + +static void +gen8_mfc_fqm_state(VADriverContextP ctx, + int fqm_type, + unsigned int *fqm, + int fqm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int fqm_buffer[32]; + + assert(fqm_length <= 32); + assert(sizeof(*fqm) == 4); + memcpy(fqm_buffer, fqm, fqm_length * 4); + + BEGIN_BCS_BATCH(batch, 34); + OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2)); + OUT_BCS_BATCH(batch, fqm_type << 0); + intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_avc_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[32] = { + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000 + }; + + gen8_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 24, encoder_context); + gen8_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 24, encoder_context); + gen8_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 32, encoder_context); + gen8_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 32, encoder_context); +} + +static void +gen8_mfc_avc_insert_object(VADriverContextP ctx, struct intel_encoder_context *encoder_context, + unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag, + struct intel_batchbuffer *batch) +{ + if (batch == NULL) + batch = encoder_context->base.batch; + + if (data_bits_in_last_dw == 0) + data_bits_in_last_dw = 32; + + BEGIN_BCS_BATCH(batch, lenght_in_dws + 2); + + OUT_BCS_BATCH(batch, MFX_INSERT_OBJECT | (lenght_in_dws + 2 - 2)); + OUT_BCS_BATCH(batch, + (0 << 16) | /* always start at offset 0 */ + (data_bits_in_last_dw << 8) | + (skip_emul_byte_count << 4) | + (!!emulation_flag << 3) | + ((!!is_last_header) << 2) | + ((!!is_end_of_slice) << 1) | + (0 << 0)); /* FIXME: ??? */ + intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4); + + ADVANCE_BCS_BATCH(batch); +} + + +static void gen8_mfc_init(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + dri_bo *bo; + int i; + int width_in_mbs = 0; + int height_in_mbs = 0; + int slice_batchbuffer_size; + + if (encoder_context->codec == CODEC_H264 || + encoder_context->codec == CODEC_H264_MVC) { + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + width_in_mbs = pSequenceParameter->picture_width_in_mbs; + height_in_mbs = pSequenceParameter->picture_height_in_mbs; + } else if (encoder_context->codec == CODEC_MPEG2) { + VAEncSequenceParameterBufferMPEG2 *pSequenceParameter = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + + assert(encoder_context->codec == CODEC_MPEG2); + + width_in_mbs = ALIGN(pSequenceParameter->picture_width, 16) / 16; + height_in_mbs = ALIGN(pSequenceParameter->picture_height, 16) / 16; + } else { + assert(encoder_context->codec == CODEC_JPEG); + VAEncPictureParameterBufferJPEG *pic_param = (VAEncPictureParameterBufferJPEG *)encode_state->pic_param_ext->buffer; + + width_in_mbs = ALIGN(pic_param->picture_width, 16) / 16; + height_in_mbs = ALIGN(pic_param->picture_height, 16) / 16; + } + + slice_batchbuffer_size = 64 * width_in_mbs * height_in_mbs + 4096 + + (SLICE_HEADER + SLICE_TAIL) * encode_state->num_slice_params_ext; + + /*Encode common setup for MFC*/ + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + if (mfc_context->direct_mv_buffers[i].bo != NULL) + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + if (mfc_context->reference_surfaces[i].bo != NULL) + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * 64, + 64); + assert(bo); + mfc_context->intra_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * height_in_mbs * 16, + 64); + assert(bo); + mfc_context->macroblock_status_buffer.bo = bo; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 4 * width_in_mbs * 64, /* 4 * width_in_mbs * 64 */ + 64); + assert(bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 2 * width_in_mbs * 64, /* 2 * width_in_mbs * 64 */ + 0x1000); + assert(bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, slice_batchbuffer_size); + mfc_context->aux_batchbuffer_surface.bo = mfc_context->aux_batchbuffer->buffer; + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.pitch = 16; + mfc_context->aux_batchbuffer_surface.num_blocks = mfc_context->aux_batchbuffer->size / 16; + mfc_context->aux_batchbuffer_surface.size_block = 16; + + i965_gpe_context_init(ctx, &mfc_context->gpe_context); +} + +static void +gen8_mfc_pipe_buf_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int i; + + BEGIN_BCS_BATCH(batch, 61); + + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (61 - 2)); + + /* the DW1-3 is for pre_deblocking */ + if (mfc_context->pre_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); /* pre output addr */ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* the DW4-6 is for the post_deblocking */ + + if (mfc_context->post_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* post output addr */ + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW7-9 is for the uncompressed_picture */ + OUT_BCS_RELOC(batch, mfc_context->uncompressed_picture_source.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* uncompressed data */ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW10-12 is for the mb status */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* StreamOut data*/ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW13-15 is for the intra_row_store_scratch */ + OUT_BCS_RELOC(batch, mfc_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW16-18 is for the deblocking filter */ + OUT_BCS_RELOC(batch, mfc_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 19-50 is for Reference pictures*/ + for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + if ( mfc_context->reference_surfaces[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->reference_surfaces[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + + /* The DW 52-54 is for the MB status buffer */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* Macroblock status buffer*/ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 55-57 is the ILDB buffer */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 58-60 is the second ILDB buffer */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_avc_directmode_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + int i; + + BEGIN_BCS_BATCH(batch, 71); + + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (71 - 2)); + + /* Reference frames and Current frames */ + /* the DW1-32 is for the direct MV for reference */ + for(i = 0; i < NUM_MFC_DMV_BUFFERS - 2; i += 2) { + if ( mfc_context->direct_mv_buffers[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, 0); + + /* the DW34-36 is the MV for the current reference */ + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* POL list */ + for(i = 0; i < 32; i++) { + OUT_BCS_BATCH(batch, i/2); + } + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +static void +gen8_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 10); + + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + OUT_BCS_RELOC(batch, mfc_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW4-6 is for MPR Row Store Scratch Buffer Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW7-9 is for Bitplane Read Buffer Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +static void gen8_mfc_avc_pipeline_picture_programing( VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_AVC, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen8_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen8_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + mfc_context->avc_img_state(ctx, encode_state, encoder_context); + mfc_context->avc_qm_state(ctx, encoder_context); + mfc_context->avc_fqm_state(ctx, encoder_context); + gen8_mfc_avc_directmode_state(ctx, encoder_context); + intel_mfc_avc_ref_idx_state(ctx, encode_state, encoder_context); +} + + +static VAStatus gen8_mfc_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); //run the pipeline + + return VA_STATUS_SUCCESS; +} + + +static VAStatus +gen8_mfc_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int *encoded_bits_size) +{ + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VACodedBufferSegment *coded_buffer_segment; + + vaStatus = i965_MapBuffer(ctx, pPicParameter->coded_buf, (void **)&coded_buffer_segment); + assert(vaStatus == VA_STATUS_SUCCESS); + *encoded_bits_size = coded_buffer_segment->size * 8; + i965_UnmapBuffer(ctx, pPicParameter->coded_buf); + + return VA_STATUS_SUCCESS; +} + + +static void +gen8_mfc_avc_slice_state(VADriverContextP ctx, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int rate_control_enable, + int qp, + struct intel_batchbuffer *batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int beginmb = slice_param->macroblock_address; + int endmb = beginmb + slice_param->num_macroblocks; + int beginx = beginmb % width_in_mbs; + int beginy = beginmb / width_in_mbs; + int nextx = endmb % width_in_mbs; + int nexty = endmb / width_in_mbs; + int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + int last_slice = (endmb == (width_in_mbs * height_in_mbs)); + int maxQpN, maxQpP; + unsigned char correct[6], grow, shrink; + int i; + int weighted_pred_idc = 0; + unsigned int luma_log2_weight_denom = slice_param->luma_log2_weight_denom; + unsigned int chroma_log2_weight_denom = slice_param->chroma_log2_weight_denom; + int num_ref_l0 = 0, num_ref_l1 = 0; + + if (batch == NULL) + batch = encoder_context->base.batch; + + if (slice_type == SLICE_TYPE_I) { + luma_log2_weight_denom = 0; + chroma_log2_weight_denom = 0; + } else if (slice_type == SLICE_TYPE_P) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + } else if (slice_type == SLICE_TYPE_B) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = pic_param->num_ref_idx_l1_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) { + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + if (weighted_pred_idc == 2) { + /* 8.4.3 - Derivation process for prediction weights (8-279) */ + luma_log2_weight_denom = 5; + chroma_log2_weight_denom = 5; + } + } + + maxQpN = mfc_context->bit_rate_control_context[slice_type].MaxQpNegModifier; + maxQpP = mfc_context->bit_rate_control_context[slice_type].MaxQpPosModifier; + + for (i = 0; i < 6; i++) + correct[i] = mfc_context->bit_rate_control_context[slice_type].Correct[i]; + + grow = mfc_context->bit_rate_control_context[slice_type].GrowInit + + (mfc_context->bit_rate_control_context[slice_type].GrowResistance << 4); + shrink = mfc_context->bit_rate_control_context[slice_type].ShrinkInit + + (mfc_context->bit_rate_control_context[slice_type].ShrinkResistance << 4); + + BEGIN_BCS_BATCH(batch, 11);; + + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2) ); + OUT_BCS_BATCH(batch, slice_type); /*Slice Type: I:P:B Slice*/ + + OUT_BCS_BATCH(batch, + (num_ref_l0 << 16) | + (num_ref_l1 << 24) | + (chroma_log2_weight_denom << 8) | + (luma_log2_weight_denom << 0)); + + OUT_BCS_BATCH(batch, + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag<<29) | /*Direct Prediction Type*/ + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + (qp<<16) | /*Slice Quantization Parameter*/ + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (beginy << 24) | /*First MB X&Y , the begin postion of current slice*/ + (beginx << 16) | + slice_param->macroblock_address ); + OUT_BCS_BATCH(batch, (nexty << 16) | nextx); /*Next slice first MB X&Y*/ + OUT_BCS_BATCH(batch, + (0/*rate_control_enable*/ << 31) | /*in CBR mode RateControlCounterEnable = enable*/ + (1 << 30) | /*ResetRateControlCounter*/ + (0 << 28) | /*RC Triggle Mode = Always Rate Control*/ + (4 << 24) | /*RC Stable Tolerance, middle level*/ + (0/*rate_control_enable*/ << 23) | /*RC Panic Enable*/ + (0 << 22) | /*QP mode, don't modfiy CBP*/ + (0 << 21) | /*MB Type Direct Conversion Enabled*/ + (0 << 20) | /*MB Type Skip Conversion Enabled*/ + (last_slice << 19) | /*IsLastSlice*/ + (0 << 18) | /*BitstreamOutputFlag Compressed BitStream Output Disable Flag 0:enable 1:disable*/ + (1 << 17) | /*HeaderPresentFlag*/ + (1 << 16) | /*SliceData PresentFlag*/ + (1 << 15) | /*TailPresentFlag*/ + (1 << 13) | /*RBSP NAL TYPE*/ + (0 << 12) ); /*CabacZeroWordInsertionEnable*/ + OUT_BCS_BATCH(batch, mfc_context->mfc_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, + (maxQpN << 24) | /*Target QP - 24 is lowest QP*/ + (maxQpP << 16) | /*Target QP + 20 is highest QP*/ + (shrink << 8) | + (grow << 0)); + OUT_BCS_BATCH(batch, + (correct[5] << 20) | + (correct[4] << 16) | + (correct[3] << 12) | + (correct[2] << 8) | + (correct[1] << 4) | + (correct[0] << 0)); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +#ifdef MFC_SOFTWARE_HASWELL + +static int +gen8_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, + int qp,unsigned int *msg, + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size, unsigned char max_mb_size, + struct intel_batchbuffer *batch) +{ + int len_in_dwords = 12; + unsigned int intra_msg; +#define INTRA_MSG_FLAG (1 << 13) +#define INTRA_MBTYPE_MASK (0x1F0000) + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + intra_msg = msg[0] & 0xC0FF; + intra_msg |= INTRA_MSG_FLAG; + intra_msg |= ((msg[0] & INTRA_MBTYPE_MASK) >> 8); + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 24) | /* PackedMvNum, Debug*/ + (0 << 20) | /* No motion vector */ + (1 << 19) | /* CbpDcY */ + (1 << 18) | /* CbpDcU */ + (1 << 17) | /* CbpDcV */ + intra_msg); + + OUT_BCS_BATCH(batch, (0xFFFF << 16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ + OUT_BCS_BATCH(batch, (0 << 27) | (end_mb << 26) | qp); /* Last MB */ + + /*Stuff for Intra MB*/ + OUT_BCS_BATCH(batch, msg[1]); /* We using Intra16x16 no 4x4 predmode*/ + OUT_BCS_BATCH(batch, msg[2]); + OUT_BCS_BATCH(batch, msg[3]&0xFF); + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); + + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static int +gen8_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, + unsigned int *msg, unsigned int offset, + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size,unsigned char max_mb_size, int slice_type, + struct intel_batchbuffer *batch) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int len_in_dwords = 12; + unsigned int inter_msg = 0; + if (batch == NULL) + batch = encoder_context->base.batch; + { +#define MSG_MV_OFFSET 4 + unsigned int *mv_ptr; + mv_ptr = msg + MSG_MV_OFFSET; + /* MV of VME output is based on 16 sub-blocks. So it is necessary + * to convert them to be compatible with the format of AVC_PAK + * command. + */ + if ((msg[0] & INTER_MODE_MASK) == INTER_8X16) { + /* MV[0] and MV[2] are replicated */ + mv_ptr[4] = mv_ptr[0]; + mv_ptr[5] = mv_ptr[1]; + mv_ptr[2] = mv_ptr[8]; + mv_ptr[3] = mv_ptr[9]; + mv_ptr[6] = mv_ptr[8]; + mv_ptr[7] = mv_ptr[9]; + } else if ((msg[0] & INTER_MODE_MASK) == INTER_16X8) { + /* MV[0] and MV[1] are replicated */ + mv_ptr[2] = mv_ptr[0]; + mv_ptr[3] = mv_ptr[1]; + mv_ptr[4] = mv_ptr[16]; + mv_ptr[5] = mv_ptr[17]; + mv_ptr[6] = mv_ptr[24]; + mv_ptr[7] = mv_ptr[25]; + } else if (((msg[0] & INTER_MODE_MASK) == INTER_8X8) && + !(msg[1] & SUBMB_SHAPE_MASK)) { + /* Don't touch MV[0] or MV[1] */ + mv_ptr[2] = mv_ptr[8]; + mv_ptr[3] = mv_ptr[9]; + mv_ptr[4] = mv_ptr[16]; + mv_ptr[5] = mv_ptr[17]; + mv_ptr[6] = mv_ptr[24]; + mv_ptr[7] = mv_ptr[25]; + } + } + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + + inter_msg = 32; + /* MV quantity */ + if ((msg[0] & INTER_MODE_MASK) == INTER_8X8) { + if (msg[1] & SUBMB_SHAPE_MASK) + inter_msg = 128; + } + OUT_BCS_BATCH(batch, inter_msg); /* 32 MV*/ + OUT_BCS_BATCH(batch, offset); + inter_msg = msg[0] & (0x1F00FFFF); + inter_msg |= INTER_MV8; + inter_msg |= ((1 << 19) | (1 << 18) | (1 << 17)); + if (((msg[0] & INTER_MODE_MASK) == INTER_8X8) && + (msg[1] & SUBMB_SHAPE_MASK)) { + inter_msg |= INTER_MV32; + } + + OUT_BCS_BATCH(batch, inter_msg); + + OUT_BCS_BATCH(batch, (0xFFFF<<16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ +#if 0 + if ( slice_type == SLICE_TYPE_B) { + OUT_BCS_BATCH(batch, (0xF<<28) | (end_mb << 26) | qp); /* Last MB */ + } else { + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ + } +#else + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ +#endif + + inter_msg = msg[1] >> 8; + /*Stuff for Inter MB*/ + OUT_BCS_BATCH(batch, inter_msg); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[0]); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[1]); + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); + + OUT_BCS_BATCH(batch, 0x0); + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +#define AVC_INTRA_RDO_OFFSET 4 +#define AVC_INTER_RDO_OFFSET 10 +#define AVC_INTER_MSG_OFFSET 8 +#define AVC_INTER_MV_OFFSET 48 +#define AVC_RDO_MASK 0xFFFF + +static void +gen8_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + unsigned int *msg = NULL, offset = 0; + unsigned char *msg_ptr = NULL; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int i,x,y; + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int is_intra = slice_type == SLICE_TYPE_I; + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + qp_slice = qp; + } + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + gen8_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, encoder_context, + (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch); + + if ( slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + dri_bo_map(vme_context->vme_output.bo , 1); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + + if (is_intra) { + msg = (unsigned int *) (msg_ptr + pSliceParameter->macroblock_address * vme_context->vme_output.size_block); + } else { + msg = (unsigned int *) (msg_ptr + pSliceParameter->macroblock_address * vme_context->vme_output.size_block); + } + + for (i = pSliceParameter->macroblock_address; + i < pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks; i++) { + int last_mb = (i == (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks - 1) ); + x = i % width_in_mbs; + y = i / width_in_mbs; + msg = (unsigned int *) (msg_ptr + i * vme_context->vme_output.size_block); + + if (is_intra) { + assert(msg); + gen8_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + } else { + int inter_rdo, intra_rdo; + inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK; + intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK; + offset = i * vme_context->vme_output.size_block + AVC_INTER_MV_OFFSET; + if (intra_rdo < inter_rdo) { + gen8_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + } else { + msg += AVC_INTER_MSG_OFFSET; + gen8_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, msg, offset, encoder_context, 0, 0, pSliceParameter->slice_type, slice_batch); + } + } + } + + dri_bo_unmap(vme_context->vme_output.bo); + + if ( last_slice ) { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 2, 8, + 2, 1, 1, 0, slice_batch); + } else { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 1, 8, + 1, 1, 1, 0, slice_batch); + } +} + +static dri_bo * +gen8_mfc_avc_software_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + dri_bo *batch_bo; + int i; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + gen8_mfc_avc_pipeline_slice_programing(ctx, encode_state, encoder_context, i, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +#else + +static void +gen8_mfc_batchbuffer_surfaces_input(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(vme_context->vme_output.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(BIND_IDX_VME_OUTPUT), + SURFACE_STATE_OFFSET(BIND_IDX_VME_OUTPUT)); + assert(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &mfc_context->aux_batchbuffer_surface, + BINDING_TABLE_OFFSET(BIND_IDX_MFC_SLICE_HEADER), + SURFACE_STATE_OFFSET(BIND_IDX_MFC_SLICE_HEADER)); +} + +static void +gen8_mfc_batchbuffer_surfaces_output(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + mfc_context->mfc_batchbuffer_surface.num_blocks = width_in_mbs * height_in_mbs + encode_state->num_slice_params_ext * 8 + 1; + mfc_context->mfc_batchbuffer_surface.size_block = 16 * CMD_LEN_IN_OWORD; /* 3 OWORDs */ + mfc_context->mfc_batchbuffer_surface.pitch = 16; + mfc_context->mfc_batchbuffer_surface.bo = dri_bo_alloc(i965->intel.bufmgr, + "MFC batchbuffer", + mfc_context->mfc_batchbuffer_surface.num_blocks * mfc_context->mfc_batchbuffer_surface.size_block, + 0x1000); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &mfc_context->mfc_batchbuffer_surface, + BINDING_TABLE_OFFSET(BIND_IDX_MFC_BATCHBUFFER), + SURFACE_STATE_OFFSET(BIND_IDX_MFC_BATCHBUFFER)); +} + +static void +gen8_mfc_batchbuffer_surfaces_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen8_mfc_batchbuffer_surfaces_input(ctx, encode_state, encoder_context); + gen8_mfc_batchbuffer_surfaces_output(ctx, encode_state, encoder_context); +} + +static void +gen8_mfc_batchbuffer_idrt_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_interface_descriptor_data *desc; + int i; + dri_bo *bo; + + bo = mfc_context->gpe_context.idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < mfc_context->gpe_context.num_kernels; i++) { + struct i965_kernel *kernel; + + kernel = &mfc_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 0; + desc->desc2.sampler_state_pointer = 0; + desc->desc3.binding_table_entry_count = 2; + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = 4; + + /*kernel start*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + desc++; + } + + dri_bo_unmap(bo); +} + +static void +gen8_mfc_batchbuffer_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + (void)mfc_context; +} + +static void +gen8_mfc_batchbuffer_emit_object_command(struct intel_batchbuffer *batch, + int index, + int head_offset, + int batchbuffer_offset, + int head_size, + int tail_size, + int number_mb_cmds, + int first_object, + int last_object, + int last_slice, + int mb_x, + int mb_y, + int width_in_mbs, + int qp) +{ + BEGIN_BATCH(batch, 12); + + OUT_BATCH(batch, CMD_MEDIA_OBJECT | (12 - 2)); + OUT_BATCH(batch, index); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /*inline data */ + OUT_BATCH(batch, head_offset); + OUT_BATCH(batch, batchbuffer_offset); + OUT_BATCH(batch, + head_size << 16 | + tail_size); + OUT_BATCH(batch, + number_mb_cmds << 16 | + first_object << 2 | + last_object << 1 | + last_slice); + OUT_BATCH(batch, + mb_y << 8 | + mb_x); + OUT_BATCH(batch, + qp << 16 | + width_in_mbs); + + ADVANCE_BATCH(batch); +} + +static void +gen8_mfc_avc_batchbuffer_slice_command(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncSliceParameterBufferH264 *slice_param, + int head_offset, + unsigned short head_size, + unsigned short tail_size, + int batchbuffer_offset, + int qp, + int last_slice) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int total_mbs = slice_param->num_macroblocks; + int number_mb_cmds = 128; + int starting_mb = 0; + int last_object = 0; + int first_object = 1; + int i; + int mb_x, mb_y; + int index = (slice_param->slice_type == SLICE_TYPE_I) ? MFC_BATCHBUFFER_AVC_INTRA : MFC_BATCHBUFFER_AVC_INTER; + + for (i = 0; i < total_mbs / number_mb_cmds; i++) { + last_object = (total_mbs - starting_mb) == number_mb_cmds; + mb_x = (slice_param->macroblock_address + starting_mb) % width_in_mbs; + mb_y = (slice_param->macroblock_address + starting_mb) / width_in_mbs; + assert(mb_x <= 255 && mb_y <= 255); + + starting_mb += number_mb_cmds; + + gen8_mfc_batchbuffer_emit_object_command(batch, + index, + head_offset, + batchbuffer_offset, + head_size, + tail_size, + number_mb_cmds, + first_object, + last_object, + last_slice, + mb_x, + mb_y, + width_in_mbs, + qp); + + if (first_object) { + head_offset += head_size; + batchbuffer_offset += head_size; + } + + if (last_object) { + head_offset += tail_size; + batchbuffer_offset += tail_size; + } + + batchbuffer_offset += number_mb_cmds * CMD_LEN_IN_OWORD; + + first_object = 0; + } + + if (!last_object) { + last_object = 1; + number_mb_cmds = total_mbs % number_mb_cmds; + mb_x = (slice_param->macroblock_address + starting_mb) % width_in_mbs; + mb_y = (slice_param->macroblock_address + starting_mb) / width_in_mbs; + assert(mb_x <= 255 && mb_y <= 255); + starting_mb += number_mb_cmds; + + gen8_mfc_batchbuffer_emit_object_command(batch, + index, + head_offset, + batchbuffer_offset, + head_size, + tail_size, + number_mb_cmds, + first_object, + last_object, + last_slice, + mb_x, + mb_y, + width_in_mbs, + qp); + } +} + +/* + * return size in Owords (16bytes) + */ +static int +gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + int batchbuffer_offset) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *slice_batch = mfc_context->aux_batchbuffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + long head_offset; + int old_used = intel_batchbuffer_used_size(slice_batch), used; + unsigned short head_size, tail_size; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + qp_slice = qp; + } + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + head_offset = old_used / 16; + gen8_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, + encoder_context, + (rate_control_mode == VA_RC_CBR), + qp_slice, + slice_batch); + + if (slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + used = intel_batchbuffer_used_size(slice_batch); + head_size = (used - old_used) / 16; + old_used = used; + + /* tail */ + if (last_slice) { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 2, + 8, + 2, + 1, + 1, + 0, + slice_batch); + } else { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 1, + 8, + 1, + 1, + 1, + 0, + slice_batch); + } + + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + used = intel_batchbuffer_used_size(slice_batch); + tail_size = (used - old_used) / 16; + + + gen8_mfc_avc_batchbuffer_slice_command(ctx, + encoder_context, + pSliceParameter, + head_offset, + head_size, + tail_size, + batchbuffer_offset, + qp, + last_slice); + + return head_size + tail_size + pSliceParameter->num_macroblocks * CMD_LEN_IN_OWORD; +} + +static void +gen8_mfc_avc_batchbuffer_pipeline(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + int i, size, offset = 0; + intel_batchbuffer_start_atomic(batch, 0x4000); + gen6_gpe_pipeline_setup(ctx, &mfc_context->gpe_context, batch); + + for ( i = 0; i < encode_state->num_slice_params_ext; i++) { + size = gen8_mfc_avc_batchbuffer_slice(ctx, encode_state, encoder_context, i, offset); + offset += size; + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen8_mfc_build_avc_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen8_mfc_batchbuffer_surfaces_setup(ctx, encode_state, encoder_context); + gen8_mfc_batchbuffer_idrt_setup(ctx, encode_state, encoder_context); + gen8_mfc_batchbuffer_constant_setup(ctx, encode_state, encoder_context); + gen8_mfc_avc_batchbuffer_pipeline(ctx, encode_state, encoder_context); +} + +static dri_bo * +gen8_mfc_avc_hardware_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + gen8_mfc_build_avc_batchbuffer(ctx, encode_state, encoder_context); + dri_bo_reference(mfc_context->mfc_batchbuffer_surface.bo); + + return mfc_context->mfc_batchbuffer_surface.bo; +} + +#endif + +static void +gen8_mfc_avc_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + if ( intel_mfc_interlace_check(ctx, encode_state, encoder_context) ) { + fprintf(stderr, "Current VA driver don't support interlace mode!\n"); + assert(0); + return; + } + +#ifdef MFC_SOFTWARE_HASWELL + slice_batch_bo = gen8_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); +#else + slice_batch_bo = gen8_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); +#endif + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen8_mfc_avc_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + + +static VAStatus +gen8_mfc_avc_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int current_frame_bits_size; + int sts; + + for (;;) { + gen8_mfc_init(ctx, encode_state, encoder_context); + intel_mfc_avc_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen8_mfc_avc_pipeline_programing(ctx, encode_state, encoder_context); //filling the pipeline + gen8_mfc_run(ctx, encode_state, encoder_context); + if (rate_control_mode == VA_RC_CBR /*|| rate_control_mode == VA_RC_VBR*/) { + gen8_mfc_stop(ctx, encode_state, encoder_context, ¤t_frame_bits_size); + sts = intel_mfc_brc_postpack(encode_state, mfc_context, current_frame_bits_size); + if (sts == BRC_NO_HRD_VIOLATION) { + intel_mfc_hrd_context_update(encode_state, mfc_context); + break; + } + else if (sts == BRC_OVERFLOW_WITH_MIN_QP || sts == BRC_UNDERFLOW_WITH_MAX_QP) { + if (!mfc_context->hrd.violation_noted) { + fprintf(stderr, "Unrepairable %s!\n", (sts == BRC_OVERFLOW_WITH_MIN_QP)? "overflow": "underflow"); + mfc_context->hrd.violation_noted = 1; + } + return VA_STATUS_SUCCESS; + } + } else { + break; + } + } + + return VA_STATUS_SUCCESS; +} + +/* + * MPEG-2 + */ + +static const int +va_to_gen8_mpeg2_picture_type[3] = { + 1, /* I */ + 2, /* P */ + 3 /* B */ +}; + +static void +gen8_mfc_mpeg2_pic_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct encode_state *encode_state) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferMPEG2 *pic_param; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + VAEncSliceParameterBufferMPEG2 *slice_param = NULL; + + assert(encode_state->pic_param_ext && encode_state->pic_param_ext->buffer); + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + (pic_param->f_code[1][1] & 0xf) << 28 | /* f_code[1][1] */ + (pic_param->f_code[1][0] & 0xf) << 24 | /* f_code[1][0] */ + (pic_param->f_code[0][1] & 0xf) << 20 | /* f_code[0][1] */ + (pic_param->f_code[0][0] & 0xf) << 16 | /* f_code[0][0] */ + pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | + pic_param->picture_coding_extension.bits.picture_structure << 12 | + pic_param->picture_coding_extension.bits.top_field_first << 11 | + pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | + pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | + pic_param->picture_coding_extension.bits.q_scale_type << 8 | + pic_param->picture_coding_extension.bits.intra_vlc_format << 7 | + pic_param->picture_coding_extension.bits.alternate_scan << 6); + OUT_BCS_BATCH(batch, + 0 << 14 | /* LoadSlicePointerFlag, 0 means only loading bitstream pointer once */ + va_to_gen8_mpeg2_picture_type[pic_param->picture_type] << 9 | + 0); + OUT_BCS_BATCH(batch, + 1 << 31 | /* slice concealment */ + (height_in_mbs - 1) << 16 | + (width_in_mbs - 1)); + + if (slice_param && slice_param->quantiser_scale_code >= 14) + OUT_BCS_BATCH(batch, (3 << 1) | (1 << 4) | (5 << 8) | (1 << 12)); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + 0xFFF << 16 | /* InterMBMaxSize */ + 0xFFF << 0 | /* IntraMBMaxSize */ + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_mpeg2_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned char intra_qm[64] = { + 8, 16, 19, 22, 26, 27, 29, 34, + 16, 16, 22, 24, 27, 29, 34, 37, + 19, 22, 26, 27, 29, 34, 34, 38, + 22, 22, 26, 27, 29, 34, 37, 40, + 22, 26, 27, 29, 32, 35, 40, 48, + 26, 27, 29, 32, 35, 40, 48, 58, + 26, 27, 29, 34, 38, 46, 56, 69, + 27, 29, 35, 38, 46, 56, 69, 83 + }; + + unsigned char non_intra_qm[64] = { + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16, + 16, 16, 16, 16, 16, 16, 16, 16 + }; + + gen8_mfc_qm_state(ctx, MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX, (unsigned int *)intra_qm, 16, encoder_context); + gen8_mfc_qm_state(ctx, MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX, (unsigned int *)non_intra_qm, 16,encoder_context); +} + +static void +gen8_mfc_mpeg2_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned short intra_fqm[64] = { + 65536/0x8, 65536/0x10, 65536/0x13, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, + 65536/0x10, 65536/0x10, 65536/0x16, 65536/0x16, 65536/0x1a, 65536/0x1b, 65536/0x1b, 65536/0x1d, + 65536/0x13, 65536/0x16, 65536/0x1a, 65536/0x1a, 65536/0x1b, 65536/0x1d, 65536/0x1d, 65536/0x23, + 65536/0x16, 65536/0x18, 65536/0x1b, 65536/0x1b, 65536/0x13, 65536/0x20, 65536/0x22, 65536/0x26, + 65536/0x1a, 65536/0x1b, 65536/0x13, 65536/0x13, 65536/0x20, 65536/0x23, 65536/0x26, 65536/0x2e, + 65536/0x1b, 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x23, 65536/0x28, 65536/0x2e, 65536/0x38, + 65536/0x1d, 65536/0x22, 65536/0x22, 65536/0x25, 65536/0x28, 65536/0x30, 65536/0x38, 65536/0x45, + 65536/0x22, 65536/0x25, 65536/0x26, 65536/0x28, 65536/0x30, 65536/0x3a, 65536/0x45, 65536/0x53, + }; + + unsigned short non_intra_fqm[64] = { + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, 0x1000, + }; + + gen8_mfc_fqm_state(ctx, MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX, (unsigned int *)intra_fqm, 32, encoder_context); + gen8_mfc_fqm_state(ctx, MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX, (unsigned int *)non_intra_fqm, 32, encoder_context); +} + +static void +gen8_mfc_mpeg2_slicegroup_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + int x, int y, + int next_x, int next_y, + int is_fisrt_slice_group, + int is_last_slice_group, + int intra_slice, + int qp, + struct intel_batchbuffer *batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 8); + + OUT_BCS_BATCH(batch, MFC_MPEG2_SLICEGROUP_STATE | (8 - 2)); + OUT_BCS_BATCH(batch, + 0 << 31 | /* MbRateCtrlFlag */ + !!is_last_slice_group << 19 | /* IsLastSliceGrp */ + 1 << 17 | /* Insert Header before the first slice group data */ + 1 << 16 | /* SliceData PresentFlag: always 1 */ + 1 << 15 | /* TailPresentFlag: always 1 */ + 0 << 14 | /* FirstSliceHdrDisabled: slice header for each slice */ + !!intra_slice << 13 | /* IntraSlice */ + !!intra_slice << 12 | /* IntraSliceFlag */ + 0); + OUT_BCS_BATCH(batch, + next_y << 24 | + next_x << 16 | + y << 8 | + x << 0 | + 0); + OUT_BCS_BATCH(batch, qp); /* FIXME: SliceGroupQp */ + /* bitstream pointer is only loaded once for the first slice of a frame when + * LoadSlicePointerFlag is 0 + */ + OUT_BCS_BATCH(batch, mfc_context->mfc_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, 0); /* FIXME: */ + OUT_BCS_BATCH(batch, 0); /* FIXME: CorrectPoints */ + OUT_BCS_BATCH(batch, 0); /* FIXME: CVxxx */ + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen8_mfc_mpeg2_pak_object_intra(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + int x, int y, + int first_mb_in_slice, + int last_mb_in_slice, + int first_mb_in_slice_group, + int last_mb_in_slice_group, + int mb_type, + int qp_scale_code, + int coded_block_pattern, + unsigned char target_size_in_word, + unsigned char max_size_in_word, + struct intel_batchbuffer *batch) +{ + int len_in_dwords = 9; + + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_MPEG2_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, + 0 << 24 | /* PackedMvNum */ + 0 << 20 | /* MvFormat */ + 7 << 17 | /* CbpDcY/CbpDcU/CbpDcV */ + 0 << 15 | /* TransformFlag: frame DCT */ + 0 << 14 | /* FieldMbFlag */ + 1 << 13 | /* IntraMbFlag */ + mb_type << 8 | /* MbType: Intra */ + 0 << 2 | /* SkipMbFlag */ + 0 << 0 | /* InterMbMode */ + 0); + OUT_BCS_BATCH(batch, y << 16 | x); + OUT_BCS_BATCH(batch, + max_size_in_word << 24 | + target_size_in_word << 16 | + coded_block_pattern << 6 | /* CBP */ + 0); + OUT_BCS_BATCH(batch, + last_mb_in_slice << 31 | + first_mb_in_slice << 30 | + 0 << 27 | /* EnableCoeffClamp */ + last_mb_in_slice_group << 26 | + 0 << 25 | /* MbSkipConvDisable */ + first_mb_in_slice_group << 24 | + 0 << 16 | /* MvFieldSelect */ + qp_scale_code << 0 | + 0); + OUT_BCS_BATCH(batch, 0); /* MV[0][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[0][1] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][1] */ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +/* Byte offset */ +#define MPEG2_INTER_MV_OFFSET 48 + +static struct _mv_ranges +{ + int low; /* in the unit of 1/2 pixel */ + int high; /* in the unit of 1/2 pixel */ +} mv_ranges[] = { + {0, 0}, + {-16, 15}, + {-32, 31}, + {-64, 63}, + {-128, 127}, + {-256, 255}, + {-512, 511}, + {-1024, 1023}, + {-2048, 2047}, + {-4096, 4095} +}; + +static int +mpeg2_motion_vector(int mv, int pos, int display_max, int f_code) +{ + if (mv + pos * 16 * 2 < 0 || + mv + (pos + 1) * 16 * 2 > display_max * 2) + mv = 0; + + if (f_code > 0 && f_code < 10) { + if (mv < mv_ranges[f_code].low) + mv = mv_ranges[f_code].low; + + if (mv > mv_ranges[f_code].high) + mv = mv_ranges[f_code].high; + } + + return mv; +} + +static int +gen8_mfc_mpeg2_pak_object_inter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + unsigned int *msg, + int width_in_mbs, int height_in_mbs, + int x, int y, + int first_mb_in_slice, + int last_mb_in_slice, + int first_mb_in_slice_group, + int last_mb_in_slice_group, + int qp_scale_code, + unsigned char target_size_in_word, + unsigned char max_size_in_word, + struct intel_batchbuffer *batch) +{ + VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + int len_in_dwords = 9; + short *mvptr, mvx0, mvy0, mvx1, mvy1; + + if (batch == NULL) + batch = encoder_context->base.batch; + + mvptr = (short *)((unsigned char *)msg + MPEG2_INTER_MV_OFFSET);; + mvx0 = mpeg2_motion_vector(mvptr[0] / 2, x, width_in_mbs * 16, pic_param->f_code[0][0]); + mvy0 = mpeg2_motion_vector(mvptr[1] / 2, y, height_in_mbs * 16, pic_param->f_code[0][0]); + mvx1 = mpeg2_motion_vector(mvptr[2] / 2, x, width_in_mbs * 16, pic_param->f_code[1][0]); + mvy1 = mpeg2_motion_vector(mvptr[3] / 2, y, height_in_mbs * 16, pic_param->f_code[1][0]); + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_MPEG2_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, + 2 << 24 | /* PackedMvNum */ + 7 << 20 | /* MvFormat */ + 7 << 17 | /* CbpDcY/CbpDcU/CbpDcV */ + 0 << 15 | /* TransformFlag: frame DCT */ + 0 << 14 | /* FieldMbFlag */ + 0 << 13 | /* IntraMbFlag */ + 1 << 8 | /* MbType: Frame-based */ + 0 << 2 | /* SkipMbFlag */ + 0 << 0 | /* InterMbMode */ + 0); + OUT_BCS_BATCH(batch, y << 16 | x); + OUT_BCS_BATCH(batch, + max_size_in_word << 24 | + target_size_in_word << 16 | + 0x3f << 6 | /* CBP */ + 0); + OUT_BCS_BATCH(batch, + last_mb_in_slice << 31 | + first_mb_in_slice << 30 | + 0 << 27 | /* EnableCoeffClamp */ + last_mb_in_slice_group << 26 | + 0 << 25 | /* MbSkipConvDisable */ + first_mb_in_slice_group << 24 | + 0 << 16 | /* MvFieldSelect */ + qp_scale_code << 0 | + 0); + + OUT_BCS_BATCH(batch, (mvx0 & 0xFFFF) | mvy0 << 16); /* MV[0][0] */ + OUT_BCS_BATCH(batch, (mvx1 & 0xFFFF) | mvy1 << 16); /* MV[1][0] */ + OUT_BCS_BATCH(batch, 0); /* MV[0][1] */ + OUT_BCS_BATCH(batch, 0); /* MV[1][1] */ + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static void +intel_mfc_mpeg2_pipeline_header_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderMPEG2_SPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 5, /* FIXME: check it */ + 0, + 0, + 0, /* Needn't insert emulation bytes for MPEG-2 */ + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderMPEG2_PPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 5, /* FIXME: check it */ + 0, + 0, + 0, /* Needn't insert emulation bytes for MPEG-2 */ + slice_batch); + } +} + +static void +gen8_mfc_mpeg2_pipeline_slice_group(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + VAEncSliceParameterBufferMPEG2 *next_slice_group_param, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferMPEG2 *slice_param = NULL; + unsigned char tail_delimiter[] = {MPEG2_DELIMITER0, MPEG2_DELIMITER1, MPEG2_DELIMITER2, MPEG2_DELIMITER3, MPEG2_DELIMITER4, 0, 0, 0}; + unsigned char section_delimiter[] = {0x0, 0x0, 0x0, 0x0}; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + int i, j; + int h_start_pos, v_start_pos, h_next_start_pos, v_next_start_pos; + unsigned int *msg = NULL; + unsigned char *msg_ptr = NULL; + + slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[slice_index]->buffer; + h_start_pos = slice_param->macroblock_address % width_in_mbs; + v_start_pos = slice_param->macroblock_address / width_in_mbs; + assert(h_start_pos + slice_param->num_macroblocks <= width_in_mbs); + + dri_bo_map(vme_context->vme_output.bo , 0); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + + if (next_slice_group_param) { + h_next_start_pos = next_slice_group_param->macroblock_address % width_in_mbs; + v_next_start_pos = next_slice_group_param->macroblock_address / width_in_mbs; + } else { + h_next_start_pos = 0; + v_next_start_pos = height_in_mbs; + } + + gen8_mfc_mpeg2_slicegroup_state(ctx, + encoder_context, + h_start_pos, + v_start_pos, + h_next_start_pos, + v_next_start_pos, + slice_index == 0, + next_slice_group_param == NULL, + slice_param->is_intra_slice, + slice_param->quantiser_scale_code, + slice_batch); + + if (slice_index == 0) + intel_mfc_mpeg2_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + /* Insert '00' to make sure the header is valid */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int*)section_delimiter, + 1, + 8, /* 8bits in the last DWORD */ + 1, /* 1 byte */ + 1, + 0, + 0, + slice_batch); + + for (i = 0; i < encode_state->slice_params_ext[slice_index]->num_elements; i++) { + /* PAK for each macroblocks */ + for (j = 0; j < slice_param->num_macroblocks; j++) { + int h_pos = (slice_param->macroblock_address + j) % width_in_mbs; + int v_pos = (slice_param->macroblock_address + j) / width_in_mbs; + int first_mb_in_slice = (j == 0); + int last_mb_in_slice = (j == slice_param->num_macroblocks - 1); + int first_mb_in_slice_group = (i == 0 && j == 0); + int last_mb_in_slice_group = (i == encode_state->slice_params_ext[slice_index]->num_elements - 1 && + j == slice_param->num_macroblocks - 1); + + msg = (unsigned int *)(msg_ptr + (slice_param->macroblock_address + j) * vme_context->vme_output.size_block); + + if (slice_param->is_intra_slice) { + gen8_mfc_mpeg2_pak_object_intra(ctx, + encoder_context, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + 0x1a, + slice_param->quantiser_scale_code, + 0x3f, + 0, + 0xff, + slice_batch); + } else { + int inter_rdo, intra_rdo; + inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK; + intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK; + + if (intra_rdo < inter_rdo) + gen8_mfc_mpeg2_pak_object_intra(ctx, + encoder_context, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + 0x1a, + slice_param->quantiser_scale_code, + 0x3f, + 0, + 0xff, + slice_batch); + else + gen8_mfc_mpeg2_pak_object_inter(ctx, + encode_state, + encoder_context, + msg, + width_in_mbs, height_in_mbs, + h_pos, v_pos, + first_mb_in_slice, + last_mb_in_slice, + first_mb_in_slice_group, + last_mb_in_slice_group, + slice_param->quantiser_scale_code, + 0, + 0xff, + slice_batch); + } + } + + slice_param++; + } + + dri_bo_unmap(vme_context->vme_output.bo); + + /* tail data */ + if (next_slice_group_param == NULL) { /* end of a picture */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int *)tail_delimiter, + 2, + 8, /* 8bits in the last DWORD */ + 5, /* 5 bytes */ + 1, + 1, + 0, + slice_batch); + } else { /* end of a lsice group */ + mfc_context->insert_object(ctx, + encoder_context, + (unsigned int *)section_delimiter, + 1, + 8, /* 8bits in the last DWORD */ + 1, /* 1 byte */ + 1, + 1, + 0, + slice_batch); + } +} + +/* + * A batch buffer for all slices, including slice state, + * slice insert object and slice pak object commands + * + */ +static dri_bo * +gen8_mfc_mpeg2_software_slice_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + VAEncSliceParameterBufferMPEG2 *next_slice_group_param = NULL; + dri_bo *batch_bo; + int i; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + if (i == encode_state->num_slice_params_ext - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[i + 1]->buffer; + + gen8_mfc_mpeg2_pipeline_slice_group(ctx, encode_state, encoder_context, i, next_slice_group_param, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +static void +gen8_mfc_mpeg2_pipeline_picture_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_MPEG2, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen8_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen8_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + gen8_mfc_mpeg2_pic_state(ctx, encoder_context, encode_state); + gen8_mfc_mpeg2_qm_state(ctx, encoder_context); + gen8_mfc_mpeg2_fqm_state(ctx, encoder_context); +} + +static void +gen8_mfc_mpeg2_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + slice_batch_bo = gen8_mfc_mpeg2_software_slice_batchbuffer(ctx, encode_state, encoder_context); + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen8_mfc_mpeg2_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + +static VAStatus +intel_mfc_mpeg2_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAStatus vaStatus = VA_STATUS_SUCCESS; + dri_bo *bo; + int i; + + /* reconstructed surface */ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + mfc_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->pre_deblocking_output.bo); + mfc_context->surface_state.width = obj_surface->orig_width; + mfc_context->surface_state.height = obj_surface->orig_height; + mfc_context->surface_state.w_pitch = obj_surface->width; + mfc_context->surface_state.h_pitch = obj_surface->height; + + /* forward reference */ + obj_surface = encode_state->reference_objects[0]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[0].bo = obj_surface->bo; + dri_bo_reference(mfc_context->reference_surfaces[0].bo); + } else + mfc_context->reference_surfaces[0].bo = NULL; + + /* backward reference */ + obj_surface = encode_state->reference_objects[1]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[1].bo = obj_surface->bo; + dri_bo_reference(mfc_context->reference_surfaces[1].bo); + } else { + mfc_context->reference_surfaces[1].bo = mfc_context->reference_surfaces[0].bo; + + if (mfc_context->reference_surfaces[1].bo) + dri_bo_reference(mfc_context->reference_surfaces[1].bo); + } + + for (i = 2; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + mfc_context->reference_surfaces[i].bo = mfc_context->reference_surfaces[i & 1].bo; + + if (mfc_context->reference_surfaces[i].bo) + dri_bo_reference(mfc_context->reference_surfaces[i].bo); + } + + /* input YUV surface */ + obj_surface = encode_state->input_yuv_object; + mfc_context->uncompressed_picture_source.bo = obj_surface->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + /* coded buffer */ + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + mfc_context->mfc_indirect_pak_bse_object.bo = bo; + mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); + + /* set the internal flag to 0 to indicate the coded size is unknown */ + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return vaStatus; +} + +static VAStatus +gen8_mfc_mpeg2_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen8_mfc_init(ctx, encode_state, encoder_context); + intel_mfc_mpeg2_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen8_mfc_mpeg2_pipeline_programing(ctx, encode_state, encoder_context); + gen8_mfc_run(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +/* JPEG encode methods */ + +static VAStatus +intel_mfc_jpeg_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAStatus vaStatus = VA_STATUS_SUCCESS; + dri_bo *bo; + + /* input YUV surface */ + obj_surface = encode_state->input_yuv_object; + mfc_context->uncompressed_picture_source.bo = obj_surface->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + /* coded buffer */ + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + mfc_context->mfc_indirect_pak_bse_object.bo = bo; + mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); + + /* set the internal flag to 0 to indicate the coded size is unknown */ + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return vaStatus; +} + + +static void +gen8_mfc_jpeg_set_surface_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct encode_state *encode_state) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct object_surface *obj_surface = encode_state->input_yuv_object; + unsigned int input_fourcc; + unsigned int y_cb_offset; + unsigned int y_cr_offset; + unsigned int surface_format; + + assert(obj_surface); + + y_cb_offset = obj_surface->y_cb_offset; + y_cr_offset = obj_surface->y_cr_offset; + input_fourcc = obj_surface->fourcc; + + surface_format = (obj_surface->fourcc == VA_FOURCC_Y800) ? + MFX_SURFACE_MONOCHROME : MFX_SURFACE_PLANAR_420_8; + + + switch (input_fourcc) { + case VA_FOURCC_Y800: { + surface_format = MFX_SURFACE_MONOCHROME; + break; + } + case VA_FOURCC_NV12: { + surface_format = MFX_SURFACE_PLANAR_420_8; + break; + } + case VA_FOURCC_UYVY: { + surface_format = MFX_SURFACE_YCRCB_SWAPY; + break; + } + case VA_FOURCC_YUY2: { + surface_format = MFX_SURFACE_YCRCB_NORMAL; + break; + } + case VA_FOURCC_RGBA: + case VA_FOURCC_444P: { + surface_format = MFX_SURFACE_R8G8B8A8_UNORM; + break; + } + } + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_height - 1) << 18) | + ((obj_surface->orig_width - 1) << 4)); + OUT_BCS_BATCH(batch, + (surface_format << 28) | /* Surface Format */ + (0 << 27) | /* must be 1 for interleave U/V, hardware requirement for AVC/VC1/MPEG and 0 for JPEG */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for U(Cb), must be 0 */ + (y_cb_offset << 0)); /* Y offset for U(Cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for V(Cr), must be 0 */ + (y_cr_offset << 0)); /* Y offset for V(Cr), must be 0 for video codec, non-zoeo for JPEG */ + + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_jpeg_pic_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct encode_state *encode_state) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct object_surface *obj_surface = encode_state->input_yuv_object; + VAEncPictureParameterBufferJPEG *pic_param; + unsigned int surface_format; + unsigned int frame_width_in_blks; + unsigned int frame_height_in_blks; + unsigned int pixels_in_horizontal_lastMCU; + unsigned int pixels_in_vertical_lastMCU; + unsigned int input_surface_format; + unsigned int output_mcu_format; + unsigned int picture_width; + unsigned int picture_height; + + assert(encode_state->pic_param_ext && encode_state->pic_param_ext->buffer); + assert(obj_surface); + pic_param = (VAEncPictureParameterBufferJPEG *)encode_state->pic_param_ext->buffer; + surface_format = obj_surface->fourcc; + picture_width = pic_param->picture_width; + picture_height = pic_param->picture_height; + + switch (surface_format) { + case VA_FOURCC_Y800: { + input_surface_format = JPEG_ENC_SURFACE_Y8; + output_mcu_format = JPEG_ENC_MCU_YUV400; + break; + } + case VA_FOURCC_NV12: { + input_surface_format = JPEG_ENC_SURFACE_NV12; + output_mcu_format = JPEG_ENC_MCU_YUV420; + break; + } + case VA_FOURCC_UYVY: { + input_surface_format = JPEG_ENC_SURFACE_UYVY; + output_mcu_format = JPEG_ENC_MCU_YUV422H_2Y; + break; + } + case VA_FOURCC_YUY2: { + input_surface_format = JPEG_ENC_SURFACE_YUY2; + output_mcu_format = JPEG_ENC_MCU_YUV422H_2Y; + break; + } + + case VA_FOURCC_RGBA: + case VA_FOURCC_444P: { + input_surface_format = JPEG_ENC_SURFACE_RGB; + output_mcu_format = JPEG_ENC_MCU_RGB; + break; + } + default : { + input_surface_format = JPEG_ENC_SURFACE_NV12; + output_mcu_format = JPEG_ENC_MCU_YUV420; + break; + } + } + + + switch (output_mcu_format) { + + case JPEG_ENC_MCU_YUV400: + case JPEG_ENC_MCU_RGB: { + pixels_in_horizontal_lastMCU = (picture_width % 8); + pixels_in_vertical_lastMCU = (picture_height % 8); + + //H1=1,V1=1 for YUV400 and YUV444. So, compute these values accordingly + frame_width_in_blks = ((picture_width + 7) / 8); + frame_height_in_blks = ((picture_height + 7) / 8); + break; + } + + case JPEG_ENC_MCU_YUV420: { + if((picture_width % 2) == 0) + pixels_in_horizontal_lastMCU = picture_width % 16; + else + pixels_in_horizontal_lastMCU = ((picture_width % 16) + 1) % 16; + + if((picture_height % 2) == 0) + pixels_in_vertical_lastMCU = picture_height % 16; + else + pixels_in_vertical_lastMCU = ((picture_height % 16) + 1) % 16; + + //H1=2,V1=2 for YUV420. So, compute these values accordingly + frame_width_in_blks = ((picture_width + 15) / 16) * 2; + frame_height_in_blks = ((picture_height + 15) / 16) * 2; + break; + } + + case JPEG_ENC_MCU_YUV422H_2Y: { + if(picture_width % 2 == 0) + pixels_in_horizontal_lastMCU = picture_width % 16; + else + pixels_in_horizontal_lastMCU = ((picture_width % 16) + 1) % 16; + + pixels_in_vertical_lastMCU = picture_height % 8; + + //H1=2,V1=1 for YUV422H_2Y. So, compute these values accordingly + frame_width_in_blks = ((picture_width + 15) / 16) * 2; + frame_height_in_blks = ((picture_height + 7) / 8); + break; + } + } //end of switch + + BEGIN_BCS_BATCH(batch, 3); + /* DWORD 0 */ + OUT_BCS_BATCH(batch, MFX_JPEG_PIC_STATE | (3 - 2)); + /* DWORD 1 */ + OUT_BCS_BATCH(batch, + ( pixels_in_horizontal_lastMCU << 26) | /* Pixels In Horizontal Last MCU */ + ( pixels_in_vertical_lastMCU << 21) | /* Pixels In Vertical Last MCU */ + ( input_surface_format << 8) | /* Input Surface format */ + ( output_mcu_format << 0)); /* Output MCU Structure */ + /* DWORD 2 */ + OUT_BCS_BATCH(batch, + ((frame_height_in_blks - 1) << 16) | /* Frame Height In Blks Minus 1 */ + (JPEG_ENC_ROUND_QUANT_DEFAULT << 13) | /* Rounding Quant set to default value 0 */ + ((frame_width_in_blks - 1) << 0)); /* Frame Width In Blks Minus 1 */ + ADVANCE_BCS_BATCH(batch); +} + +static void +get_reciprocal_dword_qm(unsigned char *raster_qm, uint32_t *dword_qm) +{ + int i = 0, j = 0; + short reciprocal_qm[64]; + + for(i=0; i<64; i++) { + reciprocal_qm[i] = 65535/(raster_qm[i]); + } + + for(i=0; i<64; i++) { + dword_qm[j] = ((reciprocal_qm[i+1] <<16) | (reciprocal_qm[i])); + j++; + i++; + } + +} + + +static void +gen8_mfc_jpeg_fqm_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct encode_state *encode_state) +{ + unsigned int quality = 0; + uint32_t temp, i = 0, j = 0, dword_qm[32]; + VAEncPictureParameterBufferJPEG *pic_param; + VAQMatrixBufferJPEG *qmatrix; + unsigned char raster_qm[64], column_raster_qm[64]; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(encode_state->pic_param_ext && encode_state->pic_param_ext->buffer); + pic_param = (VAEncPictureParameterBufferJPEG *)encode_state->pic_param_ext->buffer; + quality = pic_param->quality; + + //If the app sends the qmatrix, use it, buffer it for using it with the next frames + //The app can send qmatrix for the first frame and not send for the subsequent frames + if(encode_state->q_matrix && encode_state->q_matrix->buffer) { + qmatrix = (VAQMatrixBufferJPEG *)encode_state->q_matrix->buffer; + + mfc_context->buffered_qmatrix.load_lum_quantiser_matrix = 1; + memcpy(mfc_context->buffered_qmatrix.lum_quantiser_matrix, qmatrix->lum_quantiser_matrix, 64 * (sizeof(unsigned char))); + + if(pic_param->num_components > 1) { + mfc_context->buffered_qmatrix.load_chroma_quantiser_matrix = 1; + memcpy(mfc_context->buffered_qmatrix.chroma_quantiser_matrix, qmatrix->chroma_quantiser_matrix, 64 * (sizeof(unsigned char))); + } else { + mfc_context->buffered_qmatrix.load_chroma_quantiser_matrix = 0; + } + + } else { + //If the app doesnt send the qmatrix, use the buffered/default qmatrix + qmatrix = &mfc_context->buffered_qmatrix; + qmatrix->load_lum_quantiser_matrix = 1; + qmatrix->load_chroma_quantiser_matrix = (pic_param->num_components > 1) ? 1 : 0; + } + + + //As per the design, normalization of the quality factor and scaling of the Quantization tables + //based on the quality factor needs to be done in the driver before sending the values to the HW. + //But note, the driver expects the scaled quantization tables (as per below logic) to be sent as + //packed header information. The packed header is written as the header of the jpeg file. This + //header information is used to decode the jpeg file. So, it is the app's responsibility to send + //the correct header information (See build_packed_jpeg_header_buffer() in jpegenc.c in LibVa on + //how to do this). QTables can be different for different applications. If no tables are provided, + //the default tables in the driver are used. + + //Normalization of the quality factor + if (quality > 100) quality=100; + if (quality == 0) quality=1; + quality = (quality < 50) ? (5000/quality) : (200 - (quality*2)); + + //Step 1. Apply Quality factor and clip to range [1, 255] for luma and chroma Quantization matrices + //Step 2. HW expects the 1/Q[i] values in the qm sent, so get reciprocals + //Step 3. HW also expects 32 dwords, hence combine 2 (1/Q) values into 1 dword + //Step 4. Send the Quantization matrix to the HW, use gen8_mfc_fqm_state + + //For luma (Y or R) + if(qmatrix->load_lum_quantiser_matrix) { + //apply quality to lum_quantiser_matrix + for(i=0; i < 64; i++) { + temp = (qmatrix->lum_quantiser_matrix[i] * quality)/100; + //clamp to range [1,255] + temp = (temp > 255) ? 255 : temp; + temp = (temp < 1) ? 1 : temp; + qmatrix->lum_quantiser_matrix[i] = (unsigned char)temp; + } + + //For VAAPI, the VAQMatrixBuffer needs to be in zigzag order. + //The App should send it in zigzag. Now, the driver has to extract the raster from it. + for (j = 0; j < 64; j++) + raster_qm[zigzag_direct[j]] = qmatrix->lum_quantiser_matrix[j]; + + //Convert the raster order(row-ordered) to the column-raster (column by column). + //To be consistent with the other encoders, send it in column order. + //Need to double check if our HW expects col or row raster. + for (j = 0; j < 64; j++) { + int row = j / 8, col = j % 8; + column_raster_qm[col * 8 + row] = raster_qm[j]; + } + + //Convert to raster QM to reciprocal. HW expects values in reciprocal. + get_reciprocal_dword_qm(column_raster_qm, dword_qm); + + //send the luma qm to the command buffer + gen8_mfc_fqm_state(ctx, MFX_QM_JPEG_LUMA_Y_QUANTIZER_MATRIX, dword_qm, 32, encoder_context); + } + + //For Chroma, if chroma exists (Cb, Cr or G, B) + if(qmatrix->load_chroma_quantiser_matrix) { + //apply quality to chroma_quantiser_matrix + for(i=0; i < 64; i++) { + temp = (qmatrix->chroma_quantiser_matrix[i] * quality)/100; + //clamp to range [1,255] + temp = (temp > 255) ? 255 : temp; + temp = (temp < 1) ? 1 : temp; + qmatrix->chroma_quantiser_matrix[i] = (unsigned char)temp; + } + + //For VAAPI, the VAQMatrixBuffer needs to be in zigzag order. + //The App should send it in zigzag. Now, the driver has to extract the raster from it. + for (j = 0; j < 64; j++) + raster_qm[zigzag_direct[j]] = qmatrix->chroma_quantiser_matrix[j]; + + //Convert the raster order(row-ordered) to the column-raster (column by column). + //To be consistent with the other encoders, send it in column order. + //Need to double check if our HW expects col or row raster. + for (j = 0; j < 64; j++) { + int row = j / 8, col = j % 8; + column_raster_qm[col * 8 + row] = raster_qm[j]; + } + + + //Convert to raster QM to reciprocal. HW expects values in reciprocal. + get_reciprocal_dword_qm(column_raster_qm, dword_qm); + + //send the same chroma qm to the command buffer (for both U,V or G,B) + gen8_mfc_fqm_state(ctx, MFX_QM_JPEG_CHROMA_CB_QUANTIZER_MATRIX, dword_qm, 32, encoder_context); + gen8_mfc_fqm_state(ctx, MFX_QM_JPEG_CHROMA_CR_QUANTIZER_MATRIX, dword_qm, 32, encoder_context); + } +} + + +//Translation of Table K.5 into code: This method takes the huffval from the +//Huffmantable buffer and converts into index for the coefficients and size tables +uint8_t map_huffval_to_index(uint8_t huff_val) +{ + uint8_t index = 0; + + if(huff_val < 0xF0) { + index = (((huff_val >> 4) & 0x0F) * 0xA) + (huff_val & 0x0F); + } else { + index = 1 + (((huff_val >> 4) & 0x0F) * 0xA) + (huff_val & 0x0F); + } + + return index; +} + + +//Implementation of Flow chart Annex C - Figure C.1 +static void +generate_huffman_codesizes_table(uint8_t *bits, uint8_t *huff_size_table, uint8_t *lastK) +{ + uint8_t i=1, j=1, k=0; + + while(i <= 16) { + while(j <= (uint8_t)bits[i-1]) { + huff_size_table[k] = i; + k = k+1; + j = j+1; + } + + i = i+1; + j = 1; + } + huff_size_table[k] = 0; + (*lastK) = k; +} + +//Implementation of Flow chart Annex C - Figure C.2 +static void +generate_huffman_codes_table(uint8_t *huff_size_table, uint16_t *huff_code_table) +{ + uint8_t k=0; + uint16_t code=0; + uint8_t si=huff_size_table[k]; + + while(huff_size_table[k] != 0) { + + while(huff_size_table[k] == si) { + + // An huffman code can never be 0xFFFF. Replace it with 0 if 0xFFFF + if(code == 0xFFFF) { + code = 0x0000; + } + + huff_code_table[k] = code; + code = code+1; + k = k+1; + } + + code <<= 1; + si = si+1; + } + +} + +//Implementation of Flow chat Annex C - Figure C.3 +static void +generate_ordered_codes_table(uint8_t *huff_vals, uint8_t *huff_size_table, uint16_t *huff_code_table, uint8_t type, uint8_t lastK) +{ + uint8_t huff_val_size=0, i=0, k=0; + + huff_val_size = (type == 0) ? 12 : 162; + uint8_t huff_si_table[huff_val_size]; + uint16_t huff_co_table[huff_val_size]; + + memset(huff_si_table, 0, sizeof(huff_si_table)); + memset(huff_co_table, 0, sizeof(huff_co_table)); + + do { + i = map_huffval_to_index(huff_vals[k]); + huff_co_table[i] = huff_code_table[k]; + huff_si_table[i] = huff_size_table[k]; + k++; + } while(k < lastK); + + memcpy(huff_size_table, huff_si_table, sizeof(uint8_t)*huff_val_size); + memcpy(huff_code_table, huff_co_table, sizeof(uint16_t)*huff_val_size); +} + + +//This method converts the huffman table to code words which is needed by the HW +//Flowcharts from Jpeg Spec Annex C - Figure C.1, Figure C.2, Figure C.3 are used here +static void +convert_hufftable_to_codes(VAHuffmanTableBufferJPEGBaseline *huff_buffer, uint32_t *table, uint8_t type, uint8_t index) +{ + uint8_t lastK = 0, i=0; + uint8_t huff_val_size = 0; + uint8_t *huff_bits, *huff_vals; + + huff_val_size = (type == 0) ? 12 : 162; + uint8_t huff_size_table[huff_val_size+1]; //The +1 for adding 0 at the end of huff_val_size + uint16_t huff_code_table[huff_val_size]; + + memset(huff_size_table, 0, sizeof(huff_size_table)); + memset(huff_code_table, 0, sizeof(huff_code_table)); + + huff_bits = (type == 0) ? (huff_buffer->huffman_table[index].num_dc_codes) : (huff_buffer->huffman_table[index].num_ac_codes); + huff_vals = (type == 0) ? (huff_buffer->huffman_table[index].dc_values) : (huff_buffer->huffman_table[index].ac_values); + + + //Generation of table of Huffman code sizes + generate_huffman_codesizes_table(huff_bits, huff_size_table, &lastK); + + //Generation of table of Huffman codes + generate_huffman_codes_table(huff_size_table, huff_code_table); + + //Ordering procedure for encoding procedure code tables + generate_ordered_codes_table(huff_vals, huff_size_table, huff_code_table, type, lastK); + + //HW expects Byte0: Code length; Byte1,Byte2: Code Word, Byte3: Dummy + //Since IA is littlended, &, | and << accordingly to store the values in the DWord. + for(i=0; ibase.batch; + uint8_t index; + uint32_t dc_table[12], ac_table[162]; + + assert(encode_state->huffman_table && encode_state->huffman_table->buffer); + huff_buffer = (VAHuffmanTableBufferJPEGBaseline *)encode_state->huffman_table->buffer; + + memset(dc_table, 0, 12); + memset(ac_table, 0, 162); + + for (index = 0; index < num_tables; index++) { + int id = va_to_gen7_jpeg_hufftable[index]; + + if (!huff_buffer->load_huffman_table[index]) + continue; + + //load DC table with 12 DWords + convert_hufftable_to_codes(huff_buffer, dc_table, 0, index); //0 for Dc + + //load AC table with 162 DWords + convert_hufftable_to_codes(huff_buffer, ac_table, 1, index); //1 for AC + + BEGIN_BCS_BATCH(batch, 176); + OUT_BCS_BATCH(batch, MFC_JPEG_HUFF_TABLE_STATE | (176 - 2)); + OUT_BCS_BATCH(batch, id); //Huff table id + + //DWord 2 - 13 has DC_TABLE + intel_batchbuffer_data(batch, dc_table, 12*4); + + //Dword 14 -175 has AC_TABLE + intel_batchbuffer_data(batch, ac_table, 162*4); + ADVANCE_BCS_BATCH(batch); + } +} + + +//This method is used to compute the MCU count used for setting MFC_JPEG_SCAN_OBJECT +static void get_Y_sampling_factors(uint32_t surface_format, uint8_t *h_factor, uint8_t *v_factor) +{ + switch (surface_format) { + case VA_FOURCC_Y800: { + (* h_factor) = 1; + (* v_factor) = 1; + break; + } + case VA_FOURCC_NV12: { + (* h_factor) = 2; + (* v_factor) = 2; + break; + } + case VA_FOURCC_UYVY: { + (* h_factor) = 2; + (* v_factor) = 1; + break; + } + case VA_FOURCC_YUY2: { + (* h_factor) = 2; + (* v_factor) = 1; + break; + } + case VA_FOURCC_RGBA: + case VA_FOURCC_444P: { + (* h_factor) = 1; + (* v_factor) = 1; + break; + } + default : { //May be have to insert error handling here. For now just use as below + (* h_factor) = 1; + (* v_factor) = 1; + break; + } + } +} + +//set MFC_JPEG_SCAN_OBJECT +static void +gen8_mfc_jpeg_scan_object(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + uint32_t mcu_count, surface_format, Mx, My; + uint8_t i, horizontal_sampling_factor, vertical_sampling_factor, huff_ac_table=0, huff_dc_table=0; + uint8_t is_last_scan = 1; //Jpeg has only 1 scan per frame. When last scan, HW inserts EOI code. + uint8_t head_present_flag=1; //Header has tables and app data + uint16_t num_components, restart_interval; //Specifies number of MCUs in an ECS. + VAEncSliceParameterBufferJPEG *slice_param; + VAEncPictureParameterBufferJPEG *pic_param; + + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct object_surface *obj_surface = encode_state->input_yuv_object; + + assert(encode_state->slice_params_ext[0] && encode_state->slice_params_ext[0]->buffer); + assert(encode_state->pic_param_ext && encode_state->pic_param_ext->buffer); + assert(obj_surface); + pic_param = (VAEncPictureParameterBufferJPEG *)encode_state->pic_param_ext->buffer; + slice_param = (VAEncSliceParameterBufferJPEG *)encode_state->slice_params_ext[0]->buffer; + surface_format = obj_surface->fourcc; + + get_Y_sampling_factors(surface_format, &horizontal_sampling_factor, &vertical_sampling_factor); + + // Mx = #MCUs in a row, My = #MCUs in a column + Mx = (pic_param->picture_width + (horizontal_sampling_factor*8 -1))/(horizontal_sampling_factor*8); + My = (pic_param->picture_height + (vertical_sampling_factor*8 -1))/(vertical_sampling_factor*8); + mcu_count = (Mx * My); + + num_components = pic_param->num_components; + restart_interval = slice_param->restart_interval; + + //Depending on number of components and values set for table selectors, + //only those bits are set in 24:22 for AC table, 20:18 for DC table + for(i=0; icomponents[i].ac_table_selector)<components[i].dc_table_selector)<base.batch; + assert(batch); + + if (data_bits_in_last_dw == 0) + data_bits_in_last_dw = 32; + + BEGIN_BCS_BATCH(batch, length_in_dws + 2); + + OUT_BCS_BATCH(batch, MFX_INSERT_OBJECT | (length_in_dws + 2 - 2)); + //DWord 1 + OUT_BCS_BATCH(batch, + (0 << 16) | //DataByteOffset 0 for JPEG Encoder + (0 << 15) | //HeaderLengthExcludeFrmSize 0 for JPEG Encoder + (data_bits_in_last_dw << 8) | //DataBitsInLastDW + (0 << 4) | //SkipEmulByteCount 0 for JPEG Encoder + (0 << 3) | //EmulationFlag 0 for JPEG Encoder + ((!!is_last_header) << 2) | //LastHeaderFlag + ((!!is_end_of_slice) << 1) | //EndOfSliceFlag + (1 << 0)); //BitstreamStartReset 1 for JPEG Encoder + //Data Paylaod + intel_batchbuffer_data(batch, insert_data, length_in_dws*4); + + ADVANCE_BCS_BATCH(batch); +} + + +//send the jpeg headers to HW using MFX_PAK_INSERT_OBJECT +static void +gen8_mfc_jpeg_add_headers(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + if (encode_state->packed_header_data_ext) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)(*encode_state->packed_header_data_ext)->buffer; + unsigned int length_in_bits; + + param = (VAEncPackedHeaderParameterBuffer *)(*encode_state->packed_header_params_ext)->buffer; + length_in_bits = param->bit_length; + + gen8_mfc_jpeg_pak_insert_object(encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + 1, + 1); + } +} + +//Initialize the buffered_qmatrix with the default qmatrix in the driver. +//If the app sends the qmatrix, this will be replaced with the one app sends. +static void +jpeg_init_default_qmatrix(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + int i=0; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + //Load the the QM in zigzag order. If app sends QM, it is always in zigzag order. + for(i=0; i<64; i++) + mfc_context->buffered_qmatrix.lum_quantiser_matrix[i] = jpeg_luma_quant[zigzag_direct[i]]; + + for(i=0; i<64; i++) + mfc_context->buffered_qmatrix.chroma_quantiser_matrix[i] = jpeg_chroma_quant[zigzag_direct[i]]; +} + +/* This is at the picture level */ +static void +gen8_mfc_jpeg_pipeline_picture_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + int i, j, component, max_selector = 0; + VAEncSliceParameterBufferJPEG *slice_param; + + gen8_mfc_pipe_mode_select(ctx, MFX_FORMAT_JPEG, encoder_context); + gen8_mfc_jpeg_set_surface_state(ctx, encoder_context, encode_state); + gen8_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen8_mfc_ind_obj_base_addr_state(ctx, encoder_context); + gen8_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + gen8_mfc_jpeg_pic_state(ctx, encoder_context, encode_state); + + //do the slice level encoding here + gen8_mfc_jpeg_fqm_state(ctx, encoder_context, encode_state); + + //I dont think I need this for loop. Just to be consistent with other encoding logic... + for(i = 0; i < encode_state->num_slice_params_ext; i++) { + assert(encode_state->slice_params && encode_state->slice_params_ext[i]->buffer); + slice_param = (VAEncSliceParameterBufferJPEG *)encode_state->slice_params_ext[i]->buffer; + + for(j = 0; j < encode_state->slice_params_ext[i]->num_elements; j++) { + + for(component = 0; component < slice_param->num_components; component++) { + if(max_selector < slice_param->components[component].dc_table_selector) + max_selector = slice_param->components[component].dc_table_selector; + + if (max_selector < slice_param->components[component].ac_table_selector) + max_selector = slice_param->components[component].ac_table_selector; + } + + slice_param++; + } + } + + assert(max_selector < 2); + //send the huffman table using MFC_JPEG_HUFF_TABLE + gen8_mfc_jpeg_huff_table_state(ctx, encode_state, encoder_context, max_selector+1); + //set MFC_JPEG_SCAN_OBJECT + gen8_mfc_jpeg_scan_object(ctx, encode_state, encoder_context); + //add headers using MFX_PAK_INSERT_OBJECT (it is refered as MFX_INSERT_OBJECT in this driver code) + gen8_mfc_jpeg_add_headers(ctx, encode_state, encoder_context); + +} + +static void +gen8_mfc_jpeg_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen8_mfc_jpeg_pipeline_picture_programing(ctx, encode_state, encoder_context); + + // end programing + intel_batchbuffer_end_atomic(batch); + +} + + +static VAStatus +gen8_mfc_jpeg_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen8_mfc_init(ctx, encode_state, encoder_context); + intel_mfc_jpeg_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen8_mfc_jpeg_pipeline_programing(ctx, encode_state, encoder_context); + gen8_mfc_run(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static int gen8_mfc_vp8_qindex_estimate(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context, + int target_frame_size, + int is_key_frame) +{ + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + unsigned int max_qindex = pic_param->clamp_qindex_high; + unsigned int min_qindex = pic_param->clamp_qindex_low; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + int target_mb_size; + int last_size_gap = -1; + int per_mb_size_at_qindex; + int target_qindex = min_qindex, i; + + /* make sure would not overflow*/ + if (target_frame_size >= (0x7fffffff >> 9)) + target_mb_size = (target_frame_size / width_in_mbs / height_in_mbs) << 9; + else + target_mb_size = (target_frame_size << 9) / width_in_mbs / height_in_mbs; + + for (i = min_qindex; i <= max_qindex; i++) { + per_mb_size_at_qindex = vp8_bits_per_mb[!is_key_frame][i]; + target_qindex = i; + if (per_mb_size_at_qindex <= target_mb_size) { + if (target_mb_size - per_mb_size_at_qindex < last_size_gap) + target_qindex--; + break; + } + else + last_size_gap = per_mb_size_at_qindex - target_mb_size; + } + + return target_qindex; +} + +static void +gen8_mfc_vp8_bit_rate_control_context_init(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context) +{ + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncMiscParameterBuffer *misc_param_frame_rate_buffer = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeFrameRate]->buffer; + VAEncMiscParameterFrameRate* param_frame_rate = (VAEncMiscParameterFrameRate*)misc_param_frame_rate_buffer->data; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + float fps = param_frame_rate->framerate; + int inter_mb_size = seq_param->bits_per_second * 1.0 / (fps+4.0) / width_in_mbs / height_in_mbs; + int intra_mb_size = inter_mb_size * 5.0; + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_mb_size = intra_mb_size; + mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_frame_size = intra_mb_size * width_in_mbs * height_in_mbs; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_mb_size = inter_mb_size; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs; + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord = (intra_mb_size + 16)/ 16; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord = (inter_mb_size + 16)/ 16; + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_I].TargetSizeInWord * 1.5; + mfc_context->bit_rate_control_context[SLICE_TYPE_P].MaxSizeInWord = mfc_context->bit_rate_control_context[SLICE_TYPE_P].TargetSizeInWord * 1.5; +} + +static void gen8_mfc_vp8_brc_init(struct encode_state *encode_state, + struct intel_encoder_context* encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncMiscParameterBuffer* misc_param_hrd = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer; + VAEncMiscParameterHRD* param_hrd = (VAEncMiscParameterHRD*)misc_param_hrd->data; + VAEncMiscParameterBuffer* misc_param_frame_rate_buffer = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeFrameRate]->buffer; + VAEncMiscParameterFrameRate* param_frame_rate = (VAEncMiscParameterFrameRate*)misc_param_frame_rate_buffer->data; + double bitrate = seq_param->bits_per_second; + unsigned int frame_rate = param_frame_rate->framerate; + int inum = 1, pnum = 0; + int intra_period = seq_param->intra_period; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + int max_frame_size = (vp8_bits_per_mb[0][0] >> 9) * width_in_mbs * height_in_mbs;/* vp8_bits_per_mb table mutilpled 512 */ + + pnum = intra_period - 1; + + mfc_context->brc.mode = encoder_context->rate_control_mode; + + mfc_context->brc.target_frame_size[SLICE_TYPE_I] = (int)((double)((bitrate * intra_period)/frame_rate) / + (double)(inum + BRC_PWEIGHT * pnum )); + mfc_context->brc.target_frame_size[SLICE_TYPE_P] = BRC_PWEIGHT * mfc_context->brc.target_frame_size[SLICE_TYPE_I]; + + mfc_context->brc.gop_nums[SLICE_TYPE_I] = inum; + mfc_context->brc.gop_nums[SLICE_TYPE_P] = pnum; + + mfc_context->brc.bits_per_frame = bitrate/frame_rate; + + mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY = gen8_mfc_vp8_qindex_estimate(encode_state, + mfc_context, + mfc_context->brc.target_frame_size[SLICE_TYPE_I], + 1); + mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY = gen8_mfc_vp8_qindex_estimate(encode_state, + mfc_context, + mfc_context->brc.target_frame_size[SLICE_TYPE_P], + 0); + + mfc_context->hrd.buffer_size = (double)param_hrd->buffer_size; + mfc_context->hrd.current_buffer_fullness = + (double)(param_hrd->initial_buffer_fullness < mfc_context->hrd.buffer_size)? + param_hrd->initial_buffer_fullness: mfc_context->hrd.buffer_size/2.; + mfc_context->hrd.target_buffer_fullness = (double)mfc_context->hrd.buffer_size/2.; + mfc_context->hrd.buffer_capacity = (double)mfc_context->hrd.buffer_size/max_frame_size; + mfc_context->hrd.violation_noted = 0; +} + +static int gen8_mfc_vp8_brc_postpack(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context, + int frame_bits) +{ + gen6_brc_status sts = BRC_NO_HRD_VIOLATION; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + int is_key_frame = !pic_param->pic_flags.bits.frame_type; + int slicetype = (is_key_frame ? SLICE_TYPE_I : SLICE_TYPE_P); + int qpi = mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY; + int qpp = mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY; + int qp; // quantizer of previously encoded slice of current type + int qpn; // predicted quantizer for next frame of current type in integer format + double qpf; // predicted quantizer for next frame of current type in float format + double delta_qp; // QP correction + int target_frame_size, frame_size_next; + /* Notes: + * x - how far we are from HRD buffer borders + * y - how far we are from target HRD buffer fullness + */ + double x, y; + double frame_size_alpha; + unsigned int max_qindex = pic_param->clamp_qindex_high; + unsigned int min_qindex = pic_param->clamp_qindex_low; + + qp = mfc_context->bit_rate_control_context[slicetype].QpPrimeY; + + target_frame_size = mfc_context->brc.target_frame_size[slicetype]; + if (mfc_context->hrd.buffer_capacity < 5) + frame_size_alpha = 0; + else + frame_size_alpha = (double)mfc_context->brc.gop_nums[slicetype]; + if (frame_size_alpha > 30) frame_size_alpha = 30; + frame_size_next = target_frame_size + (double)(target_frame_size - frame_bits) / + (double)(frame_size_alpha + 1.); + + /* frame_size_next: avoiding negative number and too small value */ + if ((double)frame_size_next < (double)(target_frame_size * 0.25)) + frame_size_next = (int)((double)target_frame_size * 0.25); + + qpf = (double)qp * target_frame_size / frame_size_next; + qpn = (int)(qpf + 0.5); + + if (qpn == qp) { + /* setting qpn we round qpf making mistakes: now we are trying to compensate this */ + mfc_context->brc.qpf_rounding_accumulator += qpf - qpn; + if (mfc_context->brc.qpf_rounding_accumulator > 1.0) { + qpn++; + mfc_context->brc.qpf_rounding_accumulator = 0.; + } else if (mfc_context->brc.qpf_rounding_accumulator < -1.0) { + qpn--; + mfc_context->brc.qpf_rounding_accumulator = 0.; + } + } + + /* making sure that QP is not changing too fast */ + if ((qpn - qp) > BRC_QP_MAX_CHANGE) qpn = qp + BRC_QP_MAX_CHANGE; + else if ((qpn - qp) < -BRC_QP_MAX_CHANGE) qpn = qp - BRC_QP_MAX_CHANGE; + /* making sure that with QP predictions we did do not leave QPs range */ + BRC_CLIP(qpn, min_qindex, max_qindex); + + /* checking wthether HRD compliance is still met */ + sts = intel_mfc_update_hrd(encode_state, mfc_context, frame_bits); + + /* calculating QP delta as some function*/ + x = mfc_context->hrd.target_buffer_fullness - mfc_context->hrd.current_buffer_fullness; + if (x > 0) { + x /= mfc_context->hrd.target_buffer_fullness; + y = mfc_context->hrd.current_buffer_fullness; + } + else { + x /= (mfc_context->hrd.buffer_size - mfc_context->hrd.target_buffer_fullness); + y = mfc_context->hrd.buffer_size - mfc_context->hrd.current_buffer_fullness; + } + if (y < 0.01) y = 0.01; + if (x > 1) x = 1; + else if (x < -1) x = -1; + + delta_qp = BRC_QP_MAX_CHANGE*exp(-1/y)*sin(BRC_PI_0_5 * x); + qpn = (int)(qpn + delta_qp + 0.5); + + /* making sure that with QP predictions we did do not leave QPs range */ + BRC_CLIP(qpn, min_qindex, max_qindex); + + if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation + /* correcting QPs of slices of other types */ + if (!is_key_frame) { + if (abs(qpn - BRC_I_P_QP_DIFF - qpi) > 4) + mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_P_QP_DIFF - qpi) >> 2; + } else { + if (abs(qpn + BRC_I_P_QP_DIFF - qpp) > 4) + mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn + BRC_I_P_QP_DIFF - qpp) >> 2; + } + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, min_qindex, max_qindex); + BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, min_qindex, max_qindex); + } else if (sts == BRC_UNDERFLOW) { // underflow + if (qpn <= qp) qpn = qp + 2; + if (qpn > max_qindex) { + qpn = max_qindex; + sts = BRC_UNDERFLOW_WITH_MAX_QP; //underflow with maxQP + } + } else if (sts == BRC_OVERFLOW) { + if (qpn >= qp) qpn = qp - 2; + if (qpn < min_qindex) { // < 0 (?) overflow with minQP + qpn = min_qindex; + sts = BRC_OVERFLOW_WITH_MIN_QP; // bit stuffing to be done + } + } + + mfc_context->bit_rate_control_context[slicetype].QpPrimeY = qpn; + + return sts; +} + +static void gen8_mfc_vp8_hrd_context_init(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int target_bit_rate = seq_param->bits_per_second; + + // current we only support CBR mode. + if (rate_control_mode == VA_RC_CBR) { + mfc_context->vui_hrd.i_bit_rate_value = target_bit_rate >> 10; + mfc_context->vui_hrd.i_cpb_size_value = (target_bit_rate * 8) >> 10; + mfc_context->vui_hrd.i_initial_cpb_removal_delay = mfc_context->vui_hrd.i_cpb_size_value * 0.5 * 1024 / target_bit_rate * 90000; + mfc_context->vui_hrd.i_cpb_removal_delay = 2; + mfc_context->vui_hrd.i_frame_number = 0; + + mfc_context->vui_hrd.i_initial_cpb_removal_delay_length = 24; + mfc_context->vui_hrd.i_cpb_removal_delay_length = 24; + mfc_context->vui_hrd.i_dpb_output_delay_length = 24; + } + +} + +static void gen8_mfc_vp8_hrd_context_update(struct encode_state *encode_state, + struct gen6_mfc_context *mfc_context) +{ + mfc_context->vui_hrd.i_frame_number++; +} + +/* + * Check whether the parameters related with CBR are updated and decide whether + * it needs to reinitialize the configuration related with CBR. + * Currently it will check the following parameters: + * bits_per_second + * frame_rate + * gop_configuration(intra_period, ip_period, intra_idr_period) + */ +static bool gen8_mfc_vp8_brc_updated_check(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + unsigned int rate_control_mode = encoder_context->rate_control_mode; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + double cur_fps, cur_bitrate; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncMiscParameterBuffer *misc_param_frame_rate_buf = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeFrameRate]->buffer; + VAEncMiscParameterFrameRate *param_frame_rate = (VAEncMiscParameterFrameRate*)misc_param_frame_rate_buf->data; + unsigned int frame_rate = param_frame_rate->framerate; + + if (rate_control_mode != VA_RC_CBR) { + return false; + } + + cur_bitrate = seq_param->bits_per_second; + cur_fps = frame_rate; + + if ((cur_bitrate == mfc_context->brc.saved_bps) && + (cur_fps == mfc_context->brc.saved_fps) && + (seq_param->intra_period == mfc_context->brc.saved_intra_period)) { + /* the parameters related with CBR are not updaetd */ + return false; + } + + mfc_context->brc.saved_intra_period = seq_param->intra_period; + mfc_context->brc.saved_fps = cur_fps; + mfc_context->brc.saved_bps = cur_bitrate; + return true; +} + +static void gen8_mfc_vp8_brc_prepare(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + unsigned int rate_control_mode = encoder_context->rate_control_mode; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + if (rate_control_mode == VA_RC_CBR) { + bool brc_updated; + assert(encoder_context->codec != CODEC_MPEG2); + + brc_updated = gen8_mfc_vp8_brc_updated_check(encode_state, encoder_context); + + /*Programing bit rate control */ + if ((mfc_context->bit_rate_control_context[SLICE_TYPE_I].MaxSizeInWord == 0) || + brc_updated) { + gen8_mfc_vp8_bit_rate_control_context_init(encode_state, mfc_context); + gen8_mfc_vp8_brc_init(encode_state, encoder_context); + } + + /*Programing HRD control */ + if ((mfc_context->vui_hrd.i_cpb_size_value == 0) || brc_updated ) + gen8_mfc_vp8_hrd_context_init(encode_state, encoder_context); + } +} + +static void vp8_enc_state_init(struct gen6_mfc_context *mfc_context, + VAEncPictureParameterBufferVP8 *pic_param, + VAQMatrixBufferVP8 *q_matrix) +{ + + int is_key_frame = !pic_param->pic_flags.bits.frame_type; + unsigned char *coeff_probs_stream_in_buffer; + + mfc_context->vp8_state.frame_header_lf_update_pos = 0; + mfc_context->vp8_state.frame_header_qindex_update_pos = 0; + mfc_context->vp8_state.frame_header_token_update_pos = 0; + mfc_context->vp8_state.frame_header_bin_mv_upate_pos = 0; + + mfc_context->vp8_state.prob_skip_false = 255; + memset(mfc_context->vp8_state.mb_segment_tree_probs, 0, sizeof(mfc_context->vp8_state.mb_segment_tree_probs)); + memcpy(mfc_context->vp8_state.mv_probs, vp8_default_mv_context, sizeof(mfc_context->vp8_state.mv_probs)); + + if (is_key_frame) { + memcpy(mfc_context->vp8_state.y_mode_probs, vp8_kf_ymode_prob, sizeof(mfc_context->vp8_state.y_mode_probs)); + memcpy(mfc_context->vp8_state.uv_mode_probs, vp8_kf_uv_mode_prob, sizeof(mfc_context->vp8_state.uv_mode_probs)); + + mfc_context->vp8_state.prob_intra = 255; + mfc_context->vp8_state.prob_last = 128; + mfc_context->vp8_state.prob_gf = 128; + } else { + memcpy(mfc_context->vp8_state.y_mode_probs, vp8_ymode_prob, sizeof(mfc_context->vp8_state.y_mode_probs)); + memcpy(mfc_context->vp8_state.uv_mode_probs, vp8_uv_mode_prob, sizeof(mfc_context->vp8_state.uv_mode_probs)); + + mfc_context->vp8_state.prob_intra = 63; + mfc_context->vp8_state.prob_last = 128; + mfc_context->vp8_state.prob_gf = 128; + } + + mfc_context->vp8_state.prob_skip_false = vp8_base_skip_false_prob[q_matrix->quantization_index[0]]; + + dri_bo_map(mfc_context->vp8_state.coeff_probs_stream_in_bo, 1); + coeff_probs_stream_in_buffer = (unsigned char *)mfc_context->vp8_state.coeff_probs_stream_in_bo->virtual; + assert(coeff_probs_stream_in_buffer); + memcpy(coeff_probs_stream_in_buffer, vp8_default_coef_probs, sizeof(vp8_default_coef_probs)); + dri_bo_unmap(mfc_context->vp8_state.coeff_probs_stream_in_bo); +} + +static void vp8_enc_state_update(struct gen6_mfc_context *mfc_context, + VAQMatrixBufferVP8 *q_matrix) +{ + + /*some other probabilities need to be updated*/ +} + +extern void binarize_vp8_frame_header(VAEncSequenceParameterBufferVP8 *seq_param, + VAEncPictureParameterBufferVP8 *pic_param, + VAQMatrixBufferVP8 *q_matrix, + struct gen6_mfc_context *mfc_context, + struct intel_encoder_context *encoder_context); + +static void vp8_enc_frame_header_binarize(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct gen6_mfc_context *mfc_context) +{ + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + VAQMatrixBufferVP8 *q_matrix = (VAQMatrixBufferVP8 *)encode_state->q_matrix->buffer; + unsigned char *frame_header_buffer; + + binarize_vp8_frame_header(seq_param, pic_param, q_matrix, mfc_context, encoder_context); + + dri_bo_map(mfc_context->vp8_state.frame_header_bo, 1); + frame_header_buffer = (unsigned char *)mfc_context->vp8_state.frame_header_bo->virtual; + assert(frame_header_buffer); + memcpy(frame_header_buffer, mfc_context->vp8_state.vp8_frame_header, (mfc_context->vp8_state.frame_header_bit_count + 7) / 8); + dri_bo_unmap(mfc_context->vp8_state.frame_header_bo); +} + +#define MAX_VP8_FRAME_HEADER_SIZE 0x2000 +#define VP8_TOKEN_STATISTICS_BUFFER_SIZE 0x2000 + +static void gen8_mfc_vp8_init(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + dri_bo *bo; + int i; + int width_in_mbs = 0; + int height_in_mbs = 0; + int slice_batchbuffer_size; + int is_key_frame, slice_type, rate_control_mode; + + VAEncSequenceParameterBufferVP8 *pSequenceParameter = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + VAQMatrixBufferVP8 *q_matrix = (VAQMatrixBufferVP8 *)encode_state->q_matrix->buffer; + + width_in_mbs = ALIGN(pSequenceParameter->frame_height, 16) / 16; + height_in_mbs = ALIGN(pSequenceParameter->frame_height, 16) / 16; + + is_key_frame = !pic_param->pic_flags.bits.frame_type; + slice_type = (is_key_frame ? SLICE_TYPE_I : SLICE_TYPE_P); + rate_control_mode = encoder_context->rate_control_mode; + + if (rate_control_mode == VA_RC_CBR) { + q_matrix->quantization_index[0] = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + for (i = 1; i < 4; i++) + q_matrix->quantization_index[i] = q_matrix->quantization_index[0]; + for (i = 0; i < 5; i++) + q_matrix->quantization_index_delta[i] = 0; + } + + slice_batchbuffer_size = 64 * width_in_mbs * height_in_mbs + 4096 + + (SLICE_HEADER + SLICE_TAIL); + + /*Encode common setup for MFC*/ + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + if ( mfc_context->direct_mv_buffers[i].bo != NULL) + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + if (mfc_context->reference_surfaces[i].bo != NULL) + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * 64 * 16, + 64); + assert(bo); + mfc_context->intra_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * height_in_mbs * 16, + 64); + assert(bo); + mfc_context->macroblock_status_buffer.bo = bo; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 16 * width_in_mbs * 64, /* 16 * width_in_mbs * 64 */ + 64); + assert(bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 16 * width_in_mbs * 64, /* 16 * width_in_mbs * 64 */ + 0x1000); + assert(bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, slice_batchbuffer_size); + mfc_context->aux_batchbuffer_surface.bo = mfc_context->aux_batchbuffer->buffer; + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.pitch = 16; + mfc_context->aux_batchbuffer_surface.num_blocks = mfc_context->aux_batchbuffer->size / 16; + mfc_context->aux_batchbuffer_surface.size_block = 16; + + i965_gpe_context_init(ctx, &mfc_context->gpe_context); + + /* alloc vp8 encoding buffers*/ + dri_bo_unreference(mfc_context->vp8_state.frame_header_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + MAX_VP8_FRAME_HEADER_SIZE, + 0x1000); + assert(bo); + mfc_context->vp8_state.frame_header_bo = bo; + + mfc_context->vp8_state.intermediate_buffer_max_size = width_in_mbs * height_in_mbs * 384 * 9; + for(i = 0; i < 8; i++) { + mfc_context->vp8_state.intermediate_partition_offset[i] = width_in_mbs * height_in_mbs * 384 * (i + 1); + } + dri_bo_unreference(mfc_context->vp8_state.intermediate_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + mfc_context->vp8_state.intermediate_buffer_max_size, + 0x1000); + assert(bo); + mfc_context->vp8_state.intermediate_bo = bo; + + dri_bo_unreference(mfc_context->vp8_state.stream_out_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * height_in_mbs * 16, + 0x1000); + assert(bo); + mfc_context->vp8_state.stream_out_bo = bo; + + dri_bo_unreference(mfc_context->vp8_state.coeff_probs_stream_in_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + sizeof(vp8_default_coef_probs), + 0x1000); + assert(bo); + mfc_context->vp8_state.coeff_probs_stream_in_bo = bo; + + dri_bo_unreference(mfc_context->vp8_state.token_statistics_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + VP8_TOKEN_STATISTICS_BUFFER_SIZE, + 0x1000); + assert(bo); + mfc_context->vp8_state.token_statistics_bo = bo; + + dri_bo_unreference(mfc_context->vp8_state.mpc_row_store_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * 16 * 64, + 0x1000); + assert(bo); + mfc_context->vp8_state.mpc_row_store_bo = bo; + + vp8_enc_state_init(mfc_context, pic_param, q_matrix); + vp8_enc_frame_header_binarize(encode_state, encoder_context, mfc_context); +} + +static VAStatus +intel_mfc_vp8_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + VAStatus vaStatus = VA_STATUS_SUCCESS; + dri_bo *bo; + int i; + + /* reconstructed surface */ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('N','V','1','2'), SUBSAMPLE_YUV420); + if (pic_param->loop_filter_level[0] == 0) { + mfc_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->pre_deblocking_output.bo); + } else { + mfc_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(mfc_context->post_deblocking_output.bo); + } + + mfc_context->surface_state.width = obj_surface->orig_width; + mfc_context->surface_state.height = obj_surface->orig_height; + mfc_context->surface_state.w_pitch = obj_surface->width; + mfc_context->surface_state.h_pitch = obj_surface->height; + + /* set vp8 reference frames */ + for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + obj_surface = encode_state->reference_objects[i]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[i].bo = obj_surface->bo; + dri_bo_reference(mfc_context->reference_surfaces[i].bo); + } else { + mfc_context->reference_surfaces[i].bo = NULL; + } + } + + /* input YUV surface */ + obj_surface = encode_state->input_yuv_object; + mfc_context->uncompressed_picture_source.bo = obj_surface->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + /* coded buffer */ + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + mfc_context->mfc_indirect_pak_bse_object.bo = bo; + mfc_context->mfc_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + mfc_context->mfc_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + dri_bo_reference(mfc_context->mfc_indirect_pak_bse_object.bo); + + dri_bo_unreference(mfc_context->vp8_state.final_frame_bo); + mfc_context->vp8_state.final_frame_bo = mfc_context->mfc_indirect_pak_bse_object.bo; + mfc_context->vp8_state.final_frame_byte_offset = I965_CODEDBUFFER_HEADER_SIZE; + dri_bo_reference(mfc_context->vp8_state.final_frame_bo); + + /* set the internal flag to 0 to indicate the coded size is unknown */ + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return vaStatus; +} + +static void +gen8_mfc_vp8_encoder_cfg(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + + BEGIN_BCS_BATCH(batch, 30); + OUT_BCS_BATCH(batch, MFX_VP8_ENCODER_CFG | (30 - 2)); /* SKL should be 31-2 ? */ + + OUT_BCS_BATCH(batch, + 0 << 9 | /* compressed bitstream output disable */ + 1 << 7 | /* disable per-segment delta qindex and loop filter in RC */ + 1 << 6 | /* RC initial pass */ + 0 << 4 | /* upate segment feature date flag */ + 1 << 3 | /* bitstream statistics output enable */ + 1 << 2 | /* token statistics output enable */ + 0 << 1 | /* final bitstream output disable */ + 0 << 0); /*DW1*/ + + OUT_BCS_BATCH(batch, 0); /*DW2*/ + + OUT_BCS_BATCH(batch, + 0xfff << 16 | /* max intra mb bit count limit */ + 0xfff << 0 /* max inter mb bit count limit */ + ); /*DW3*/ + + OUT_BCS_BATCH(batch, 0); /*DW4*/ + OUT_BCS_BATCH(batch, 0); /*DW5*/ + OUT_BCS_BATCH(batch, 0); /*DW6*/ + OUT_BCS_BATCH(batch, 0); /*DW7*/ + OUT_BCS_BATCH(batch, 0); /*DW8*/ + OUT_BCS_BATCH(batch, 0); /*DW9*/ + OUT_BCS_BATCH(batch, 0); /*DW10*/ + OUT_BCS_BATCH(batch, 0); /*DW11*/ + OUT_BCS_BATCH(batch, 0); /*DW12*/ + OUT_BCS_BATCH(batch, 0); /*DW13*/ + OUT_BCS_BATCH(batch, 0); /*DW14*/ + OUT_BCS_BATCH(batch, 0); /*DW15*/ + OUT_BCS_BATCH(batch, 0); /*DW16*/ + OUT_BCS_BATCH(batch, 0); /*DW17*/ + OUT_BCS_BATCH(batch, 0); /*DW18*/ + OUT_BCS_BATCH(batch, 0); /*DW19*/ + OUT_BCS_BATCH(batch, 0); /*DW20*/ + OUT_BCS_BATCH(batch, 0); /*DW21*/ + + OUT_BCS_BATCH(batch, + pic_param->pic_flags.bits.show_frame << 23 | + pic_param->pic_flags.bits.version << 20 + ); /*DW22*/ + + OUT_BCS_BATCH(batch, + (seq_param->frame_height_scale << 14 | seq_param->frame_height) << 16 | + (seq_param->frame_width_scale << 14 | seq_param->frame_width) << 0 + ); + + /*DW24*/ + OUT_BCS_BATCH(batch, mfc_context->vp8_state.frame_header_bit_count); /* frame header bit count */ + + /*DW25*/ + OUT_BCS_BATCH(batch, mfc_context->vp8_state.frame_header_qindex_update_pos); /* frame header bin buffer qindex update pointer */ + + /*DW26*/ + OUT_BCS_BATCH(batch, mfc_context->vp8_state.frame_header_lf_update_pos); /* frame header bin buffer loop filter update pointer*/ + + /*DW27*/ + OUT_BCS_BATCH(batch, mfc_context->vp8_state.frame_header_token_update_pos); /* frame header bin buffer token update pointer */ + + /*DW28*/ + OUT_BCS_BATCH(batch, mfc_context->vp8_state.frame_header_bin_mv_upate_pos); /*frame header bin buffer mv update pointer */ + + /*DW29*/ + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_vp8_pic_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + VAQMatrixBufferVP8 *q_matrix = (VAQMatrixBufferVP8 *)encode_state->q_matrix->buffer; + int i, j, log2num; + + log2num = pic_param->pic_flags.bits.num_token_partitions; + + /*update mode and token probs*/ + vp8_enc_state_update(mfc_context, q_matrix); + + BEGIN_BCS_BATCH(batch, 38); + OUT_BCS_BATCH(batch, MFX_VP8_PIC_STATE | (38 - 2)); + OUT_BCS_BATCH(batch, + (ALIGN(seq_param->frame_height, 16) / 16 - 1) << 16 | + (ALIGN(seq_param->frame_width, 16) / 16 - 1) << 0); + + OUT_BCS_BATCH(batch, + log2num << 24 | + pic_param->sharpness_level << 16 | + pic_param->pic_flags.bits.sign_bias_alternate << 13 | + pic_param->pic_flags.bits.sign_bias_golden << 12 | + pic_param->pic_flags.bits.loop_filter_adj_enable << 11 | + pic_param->pic_flags.bits.mb_no_coeff_skip << 10 | + pic_param->pic_flags.bits.update_mb_segmentation_map << 9 | + pic_param->pic_flags.bits.segmentation_enabled << 8 | + !pic_param->pic_flags.bits.frame_type << 5 | /* 0 indicate an intra frame in VP8 stream/spec($9.1)*/ + (pic_param->pic_flags.bits.version / 2) << 4 | + (pic_param->pic_flags.bits.version == 3) << 1 | /* full pixel mode for version 3 */ + !!pic_param->pic_flags.bits.version << 0); /* version 0: 6 tap */ + + OUT_BCS_BATCH(batch, + pic_param->loop_filter_level[3] << 24 | + pic_param->loop_filter_level[2] << 16 | + pic_param->loop_filter_level[1] << 8 | + pic_param->loop_filter_level[0] << 0); + + OUT_BCS_BATCH(batch, + q_matrix->quantization_index[3] << 24 | + q_matrix->quantization_index[2] << 16 | + q_matrix->quantization_index[1] << 8 | + q_matrix->quantization_index[0] << 0); + + OUT_BCS_BATCH(batch, + ((unsigned short)(q_matrix->quantization_index_delta[4]) >> 15) << 28 | + abs(q_matrix->quantization_index_delta[4]) << 24 | + ((unsigned short)(q_matrix->quantization_index_delta[3]) >> 15) << 20 | + abs(q_matrix->quantization_index_delta[3]) << 16 | + ((unsigned short)(q_matrix->quantization_index_delta[2]) >> 15) << 12 | + abs(q_matrix->quantization_index_delta[2]) << 8 | + ((unsigned short)(q_matrix->quantization_index_delta[1]) >> 15) << 4 | + abs(q_matrix->quantization_index_delta[1]) << 0); + + OUT_BCS_BATCH(batch, + ((unsigned short)(q_matrix->quantization_index_delta[0]) >> 15) << 4 | + abs(q_matrix->quantization_index_delta[0]) << 0); + + OUT_BCS_BATCH(batch, + pic_param->clamp_qindex_high << 8 | + pic_param->clamp_qindex_low << 0); + + for (i = 8; i < 19; i++) { + OUT_BCS_BATCH(batch, 0xffffffff); + } + + OUT_BCS_BATCH(batch, + mfc_context->vp8_state.mb_segment_tree_probs[2] << 16 | + mfc_context->vp8_state.mb_segment_tree_probs[1] << 8 | + mfc_context->vp8_state.mb_segment_tree_probs[0] << 0); + + OUT_BCS_BATCH(batch, + mfc_context->vp8_state.prob_skip_false << 24 | + mfc_context->vp8_state.prob_intra << 16 | + mfc_context->vp8_state.prob_last << 8 | + mfc_context->vp8_state.prob_gf << 0); + + OUT_BCS_BATCH(batch, + mfc_context->vp8_state.y_mode_probs[3] << 24 | + mfc_context->vp8_state.y_mode_probs[2] << 16 | + mfc_context->vp8_state.y_mode_probs[1] << 8 | + mfc_context->vp8_state.y_mode_probs[0] << 0); + + OUT_BCS_BATCH(batch, + mfc_context->vp8_state.uv_mode_probs[2] << 16 | + mfc_context->vp8_state.uv_mode_probs[1] << 8 | + mfc_context->vp8_state.uv_mode_probs[0] << 0); + + /* MV update value, DW23-DW32 */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 20; j += 4) { + OUT_BCS_BATCH(batch, + (j + 3 == 19 ? 0 : mfc_context->vp8_state.mv_probs[i][j + 3]) << 24 | + mfc_context->vp8_state.mv_probs[i][j + 2] << 16 | + mfc_context->vp8_state.mv_probs[i][j + 1] << 8 | + mfc_context->vp8_state.mv_probs[i][j + 0] << 0); + } + } + + OUT_BCS_BATCH(batch, + (pic_param->ref_lf_delta[3] & 0x7f) << 24 | + (pic_param->ref_lf_delta[2] & 0x7f) << 16 | + (pic_param->ref_lf_delta[1] & 0x7f) << 8 | + (pic_param->ref_lf_delta[0] & 0x7f) << 0); + + OUT_BCS_BATCH(batch, + (pic_param->mode_lf_delta[3] & 0x7f) << 24 | + (pic_param->mode_lf_delta[2] & 0x7f) << 16 | + (pic_param->mode_lf_delta[1] & 0x7f) << 8 | + (pic_param->mode_lf_delta[0] & 0x7f) << 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +#define OUT_VP8_BUFFER(bo, offset) \ + if (bo) \ + OUT_BCS_RELOC(batch, \ + bo, \ + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, \ + offset); \ + else \ + OUT_BCS_BATCH(batch, 0); \ + OUT_BCS_BATCH(batch, 0); \ + OUT_BCS_BATCH(batch, 0); + +static void +gen8_mfc_vp8_bsp_buf_base_addr_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 32); + OUT_BCS_BATCH(batch, MFX_VP8_BSP_BUF_BASE_ADDR_STATE | (32 - 2)); + + OUT_VP8_BUFFER(mfc_context->vp8_state.frame_header_bo, 0); + + OUT_VP8_BUFFER(mfc_context->vp8_state.intermediate_bo, 0); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[0]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[1]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[2]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[3]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[4]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[5]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[6]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_partition_offset[7]); + OUT_BCS_BATCH(batch, mfc_context->vp8_state.intermediate_buffer_max_size); + + OUT_VP8_BUFFER(mfc_context->vp8_state.final_frame_bo, I965_CODEDBUFFER_HEADER_SIZE); + OUT_BCS_BATCH(batch, 0); + + OUT_VP8_BUFFER(mfc_context->vp8_state.stream_out_bo, 0); + OUT_VP8_BUFFER(mfc_context->vp8_state.coeff_probs_stream_in_bo, 0); + OUT_VP8_BUFFER(mfc_context->vp8_state.token_statistics_bo, 0); + OUT_VP8_BUFFER(mfc_context->vp8_state.mpc_row_store_bo, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_vp8_pipeline_picture_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_VP8, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen8_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen8_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + gen8_mfc_vp8_bsp_buf_base_addr_state(ctx, encode_state, encoder_context); + gen8_mfc_vp8_pic_state(ctx, encode_state,encoder_context); + gen8_mfc_vp8_encoder_cfg(ctx, encode_state, encoder_context); +} + +static const unsigned char +vp8_intra_mb_mode_map[VME_MB_INTRA_MODE_COUNT] = { + PAK_V_PRED, + PAK_H_PRED, + PAK_DC_PRED, + PAK_TM_PRED +}; + +static const unsigned char +vp8_intra_block_mode_map[VME_B_INTRA_MODE_COUNT] = { + PAK_B_VE_PRED, + PAK_B_HE_PRED, + PAK_B_DC_PRED, + PAK_B_LD_PRED, + PAK_B_RD_PRED, + PAK_B_VR_PRED, + PAK_B_HD_PRED, + PAK_B_VL_PRED, + PAK_B_HU_PRED +}; + +static int inline gen8_mfc_vp8_intra_mb_mode_map(unsigned int vme_pred_mode, int is_luma_4x4) +{ + unsigned int i, pak_pred_mode = 0; + unsigned int vme_sub_blocks_pred_mode[8], pak_sub_blocks_pred_mode[8]; /* 8 blocks's intra mode */ + + if (!is_luma_4x4) { + pak_pred_mode = vp8_intra_mb_mode_map[vme_pred_mode & 0x3]; + } else { + for (i = 0; i < 8; i++) { + vme_sub_blocks_pred_mode[i] = ((vme_pred_mode >> (4 * i)) & 0xf); + assert(vme_sub_blocks_pred_mode[i] < VME_B_INTRA_MODE_COUNT); + pak_sub_blocks_pred_mode[i] = vp8_intra_block_mode_map[vme_sub_blocks_pred_mode[i]]; + pak_pred_mode |= (pak_sub_blocks_pred_mode[i] << (4 * i)); + } + } + + return pak_pred_mode; +} +static void +gen8_mfc_vp8_pak_object_intra(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + unsigned int *msg, + int x, int y, + struct intel_batchbuffer *batch) +{ + unsigned int vme_intra_mb_mode, vme_chroma_pred_mode; + unsigned int pak_intra_mb_mode, pak_chroma_pred_mode; + unsigned int vme_luma_pred_mode[2], pak_luma_pred_mode[2]; + + if (batch == NULL) + batch = encoder_context->base.batch; + + vme_intra_mb_mode = ((msg[0] & 0x30) >> 4); + assert((vme_intra_mb_mode == 0) || (vme_intra_mb_mode == 2)); //vp8 only support intra_16x16 and intra_4x4 + pak_intra_mb_mode = (vme_intra_mb_mode >> 1); + + vme_luma_pred_mode[0] = msg[1]; + vme_luma_pred_mode[1] = msg[2]; + vme_chroma_pred_mode = msg[3] & 0x3; + + pak_luma_pred_mode[0] = gen8_mfc_vp8_intra_mb_mode_map(vme_luma_pred_mode[0], pak_intra_mb_mode); + pak_luma_pred_mode[1] = gen8_mfc_vp8_intra_mb_mode_map(vme_luma_pred_mode[1], pak_intra_mb_mode); + pak_chroma_pred_mode = gen8_mfc_vp8_intra_mb_mode_map(vme_chroma_pred_mode, 0); + + BEGIN_BCS_BATCH(batch, 7); + + OUT_BCS_BATCH(batch, MFX_VP8_PAK_OBJECT | (7 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 20) | /* mv format: intra mb */ + (0 << 18) | /* Segment ID */ + (0 << 17) | /* disable coeff clamp */ + (1 << 13) | /* intra mb flag */ + (0 << 11) | /* refer picture select: last frame */ + (pak_intra_mb_mode << 8) | /* mb type */ + (pak_chroma_pred_mode << 4) | /* mb uv mode */ + (0 << 2) | /* skip mb flag: disable */ + 0); + + OUT_BCS_BATCH(batch, (y << 16) | x); + OUT_BCS_BATCH(batch, pak_luma_pred_mode[0]); + OUT_BCS_BATCH(batch, pak_luma_pred_mode[1]); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_vp8_pak_object_inter(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + unsigned int *msg, + int offset, + int x, int y, + struct intel_batchbuffer *batch) +{ + int i; + + if (batch == NULL) + batch = encoder_context->base.batch; + + /* only support inter_16x16 now */ + assert((msg[AVC_INTER_MSG_OFFSET] & INTER_MODE_MASK) == INTER_16X16); + /* for inter_16x16, all 16 MVs should be same, + * and move mv to the vme mb start address to make sure offset is 64 bytes aligned + * as vp8 spec, all vp8 luma motion vectors are doulbled stored + */ + msg[0] = (((msg[AVC_INTER_MV_OFFSET/4] & 0xffff0000) << 1) | ((msg[AVC_INTER_MV_OFFSET/4] << 1) & 0xffff)); + + for (i = 1; i < 16; i++) { + msg[i] = msg[0]; + } + + BEGIN_BCS_BATCH(batch, 7); + + OUT_BCS_BATCH(batch, MFX_VP8_PAK_OBJECT | (7 - 2)); + OUT_BCS_BATCH(batch, + (0 << 29) | /* enable inline mv data: disable */ + 64); + OUT_BCS_BATCH(batch, + offset); + OUT_BCS_BATCH(batch, + (4 << 20) | /* mv format: inter */ + (0 << 18) | /* Segment ID */ + (0 << 17) | /* coeff clamp: disable */ + (0 << 13) | /* intra mb flag: inter mb */ + (0 << 11) | /* refer picture select: last frame */ + (0 << 8) | /* mb type: 16x16 */ + (0 << 4) | /* mb uv mode: dc_pred */ + (0 << 2) | /* skip mb flag: disable */ + 0); + + OUT_BCS_BATCH(batch, (y << 16) | x); + + /*new mv*/ + OUT_BCS_BATCH(batch, 0x8); + OUT_BCS_BATCH(batch, 0x8); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfc_vp8_pak_pipeline(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + unsigned int *msg = NULL; + unsigned char *msg_ptr = NULL; + unsigned int i, offset, is_intra_frame; + + is_intra_frame = !pic_param->pic_flags.bits.frame_type; + + dri_bo_map(vme_context->vme_output.bo , 1); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + + for( i = 0; i < width_in_mbs * height_in_mbs; i++) { + int h_pos = i % width_in_mbs; + int v_pos = i / width_in_mbs; + msg = (unsigned int *) (msg_ptr + i * vme_context->vme_output.size_block); + + if (is_intra_frame) { + gen8_mfc_vp8_pak_object_intra(ctx, + encoder_context, + msg, + h_pos, v_pos, + slice_batch); + } else { + int inter_rdo, intra_rdo; + inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK; + intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK; + + if (intra_rdo < inter_rdo) { + gen8_mfc_vp8_pak_object_intra(ctx, + encoder_context, + msg, + h_pos, v_pos, + slice_batch); + } else { + offset = i * vme_context->vme_output.size_block; + gen8_mfc_vp8_pak_object_inter(ctx, + encoder_context, + msg, + offset, + h_pos, v_pos, + slice_batch); + } + } + } + + dri_bo_unmap(vme_context->vme_output.bo); +} + +/* + * A batch buffer for vp8 pak object commands + */ +static dri_bo * +gen8_mfc_vp8_software_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + dri_bo *batch_bo; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + + gen8_mfc_vp8_pak_pipeline(ctx, encode_state, encoder_context, batch); + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +static void +gen8_mfc_vp8_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + slice_batch_bo = gen8_mfc_vp8_software_batchbuffer(ctx, encode_state, encoder_context); + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen8_mfc_vp8_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 4); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + +static int gen8_mfc_calc_vp8_coded_buffer_size(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + unsigned char is_intra_frame = !pic_param->pic_flags.bits.frame_type; + unsigned int *vp8_encoding_status, i, first_partition_bytes, token_partition_bytes, vp8_coded_bytes; + + int partition_num = 1 << pic_param->pic_flags.bits.num_token_partitions; + + first_partition_bytes = token_partition_bytes = vp8_coded_bytes = 0; + + dri_bo_map(mfc_context->vp8_state.token_statistics_bo, 0); + + vp8_encoding_status = (unsigned int *)mfc_context->vp8_state.token_statistics_bo->virtual; + first_partition_bytes = (vp8_encoding_status[0] + 7) / 8; + + for (i = 1; i <= partition_num; i++) + token_partition_bytes += (vp8_encoding_status[i] + 7) / 8; + + /*coded_bytes includes P0~P8 partitions bytes + uncompresse date bytes + partion_size bytes in bitstream + 3 extra bytes */ + /*it seems the last partition size in vp8 status buffer is smaller than reality. so add 3 extra bytes */ + vp8_coded_bytes = first_partition_bytes + token_partition_bytes + (3 + 7 * !!is_intra_frame) + (partition_num - 1) * 3 + 3; + + dri_bo_unmap(mfc_context->vp8_state.token_statistics_bo); + + dri_bo_map(mfc_context->vp8_state.final_frame_bo, 0); + struct i965_coded_buffer_segment *coded_buffer_segment = (struct i965_coded_buffer_segment *)(mfc_context->vp8_state.final_frame_bo->virtual); + coded_buffer_segment->base.size = vp8_coded_bytes; + dri_bo_unmap(mfc_context->vp8_state.final_frame_bo); + + return vp8_coded_bytes; +} + +static VAStatus +gen8_mfc_vp8_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int current_frame_bits_size; + int sts; + + gen8_mfc_vp8_init(ctx, encode_state, encoder_context); + intel_mfc_vp8_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen8_mfc_vp8_pipeline_programing(ctx, encode_state, encoder_context); + gen8_mfc_run(ctx, encode_state, encoder_context); + current_frame_bits_size = 8 * gen8_mfc_calc_vp8_coded_buffer_size(ctx, encode_state, encoder_context); + + if (rate_control_mode == VA_RC_CBR /*|| rate_control_mode == VA_RC_VBR*/) { + sts = gen8_mfc_vp8_brc_postpack(encode_state, mfc_context, current_frame_bits_size); + if (sts == BRC_NO_HRD_VIOLATION) { + gen8_mfc_vp8_hrd_context_update(encode_state, mfc_context); + } + else if (sts == BRC_OVERFLOW_WITH_MIN_QP || sts == BRC_UNDERFLOW_WITH_MAX_QP) { + if (!mfc_context->hrd.violation_noted) { + fprintf(stderr, "Unrepairable %s!\n", (sts == BRC_OVERFLOW_WITH_MIN_QP)? "overflow": "underflow"); + mfc_context->hrd.violation_noted = 1; + } + return VA_STATUS_SUCCESS; + } + } + + return VA_STATUS_SUCCESS; +} + +static void +gen8_mfc_context_destroy(void *context) +{ + struct gen6_mfc_context *mfc_context = context; + int i; + + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + mfc_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + mfc_context->macroblock_status_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + i965_gpe_context_destroy(&mfc_context->gpe_context); + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = NULL; + + dri_bo_unreference(mfc_context->vp8_state.coeff_probs_stream_in_bo); + mfc_context->vp8_state.coeff_probs_stream_in_bo = NULL; + + dri_bo_unreference(mfc_context->vp8_state.final_frame_bo); + mfc_context->vp8_state.final_frame_bo = NULL; + + dri_bo_unreference(mfc_context->vp8_state.frame_header_bo); + mfc_context->vp8_state.frame_header_bo = NULL; + + dri_bo_unreference(mfc_context->vp8_state.intermediate_bo); + mfc_context->vp8_state.intermediate_bo = NULL; + + dri_bo_unreference(mfc_context->vp8_state.mpc_row_store_bo); + mfc_context->vp8_state.mpc_row_store_bo = NULL; + + dri_bo_unreference(mfc_context->vp8_state.stream_out_bo); + mfc_context->vp8_state.stream_out_bo = NULL; + + dri_bo_unreference(mfc_context->vp8_state.token_statistics_bo); + mfc_context->vp8_state.token_statistics_bo = NULL; + + free(mfc_context); +} + +static VAStatus gen8_mfc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus; + + switch (profile) { + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264MultiviewHigh: + case VAProfileH264StereoHigh: + vaStatus = gen8_mfc_avc_encode_picture(ctx, encode_state, encoder_context); + break; + + /* FIXME: add for other profile */ + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + vaStatus = gen8_mfc_mpeg2_encode_picture(ctx, encode_state, encoder_context); + break; + + case VAProfileJPEGBaseline: + jpeg_init_default_qmatrix(ctx, encoder_context); + vaStatus = gen8_mfc_jpeg_encode_picture(ctx, encode_state, encoder_context); + break; + + case VAProfileVP8Version0_3: + vaStatus = gen8_mfc_vp8_encode_picture(ctx, encode_state, encoder_context); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + return vaStatus; +} + +Bool gen8_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = calloc(1, sizeof(struct gen6_mfc_context)); + assert(mfc_context); + mfc_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + mfc_context->gpe_context.idrt.max_entries = MAX_GPE_KERNELS; + mfc_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + + mfc_context->gpe_context.curbe.length = 32 * 4; + + mfc_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + mfc_context->gpe_context.vfe_state.num_urb_entries = 16; + mfc_context->gpe_context.vfe_state.gpgpu_mode = 0; + mfc_context->gpe_context.vfe_state.urb_entry_size = 59 - 1; + mfc_context->gpe_context.vfe_state.curbe_allocation_size = 37 - 1; + + i965_gpe_load_kernels(ctx, + &mfc_context->gpe_context, + gen8_mfc_kernels, + NUM_MFC_KERNEL); + + mfc_context->pipe_mode_select = gen8_mfc_pipe_mode_select; + mfc_context->set_surface_state = gen8_mfc_surface_state; + mfc_context->ind_obj_base_addr_state = gen8_mfc_ind_obj_base_addr_state; + mfc_context->avc_img_state = gen8_mfc_avc_img_state; + mfc_context->avc_qm_state = gen8_mfc_avc_qm_state; + mfc_context->avc_fqm_state = gen8_mfc_avc_fqm_state; + mfc_context->insert_object = gen8_mfc_avc_insert_object; + mfc_context->buffer_suface_setup = gen8_gpe_buffer_suface_setup; + + encoder_context->mfc_context = mfc_context; + encoder_context->mfc_context_destroy = gen8_mfc_context_destroy; + encoder_context->mfc_pipeline = gen8_mfc_pipeline; + + if (encoder_context->codec == CODEC_VP8) + encoder_context->mfc_brc_prepare = gen8_mfc_vp8_brc_prepare; + else + encoder_context->mfc_brc_prepare = intel_mfc_brc_prepare; + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen8_mfd.c intel-vaapi-driver-1.7.1/src/gen8_mfd.c --- intel-vaapi-driver-1.0.15/src/gen8_mfd.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen8_mfd.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3218 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * Zhao Yakui + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_decoder_utils.h" + +#include "gen7_mfd.h" +#include "intel_media.h" + +#define B0_STEP_REV 2 +#define IS_STEPPING_BPLUS(i965) ((i965->intel.revision) >= B0_STEP_REV) + +static const uint32_t zigzag_direct[64] = { + 0, 1, 8, 16, 9, 2, 3, 10, + 17, 24, 32, 25, 18, 11, 4, 5, + 12, 19, 26, 33, 40, 48, 41, 34, + 27, 20, 13, 6, 7, 14, 21, 28, + 35, 42, 49, 56, 57, 50, 43, 36, + 29, 22, 15, 23, 30, 37, 44, 51, + 58, 59, 52, 45, 38, 31, 39, 46, + 53, 60, 61, 54, 47, 55, 62, 63 +}; + +static void +gen8_mfd_init_avc_surface(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + GenAvcSurface *gen7_avc_surface = obj_surface->private_data; + int width_in_mbs, height_in_mbs; + + obj_surface->free_private_data = gen_free_avc_surface; + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + + if (!gen7_avc_surface) { + gen7_avc_surface = calloc(sizeof(GenAvcSurface), 1); + + if (!gen7_avc_surface) + return; + + gen7_avc_surface->base.frame_store_id = -1; + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen7_avc_surface; + } + + /* DMV buffers now relate to the whole frame, irrespective of + field coding modes */ + if (gen7_avc_surface->dmv_top == NULL) { + gen7_avc_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + width_in_mbs * height_in_mbs * 128, + 0x1000); + assert(gen7_avc_surface->dmv_top); + } +} + +static void +gen8_mfd_pipe_mode_select(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC || + standard_select == MFX_FORMAT_VC1 || + standard_select == MFX_FORMAT_JPEG || + standard_select == MFX_FORMAT_VP8); + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Currently only support long format */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (gen7_mfd_context->post_deblocking_output.valid << 9) | /* Post Deblocking Output */ + (gen7_mfd_context->pre_deblocking_output.valid << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (MFX_CODEC_DECODE << 4) | /* decoding mode */ + (standard_select << 0)); + OUT_BCS_BATCH(batch, + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); /* pic status/error report id */ + OUT_BCS_BATCH(batch, 0); /* reserved */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_surface_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface = decode_state->render_object; + unsigned int y_cb_offset; + unsigned int y_cr_offset; + unsigned int surface_format; + + assert(obj_surface); + + y_cb_offset = obj_surface->y_cb_offset; + y_cr_offset = obj_surface->y_cr_offset; + + surface_format = obj_surface->fourcc == VA_FOURCC_Y800 ? + MFX_SURFACE_MONOCHROME : MFX_SURFACE_PLANAR_420_8; + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_height - 1) << 18) | + ((obj_surface->orig_width - 1) << 4)); + OUT_BCS_BATCH(batch, + (surface_format << 28) | /* 420 planar YUV surface */ + ((standard_select != MFX_FORMAT_JPEG) << 27) | /* interleave chroma, set to 0 for JPEG */ + (0 << 22) | /* surface object control state, ignored */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, must be 1 */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for U(Cb), must be 0 */ + (y_cb_offset << 0)); /* Y offset for U(Cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for V(Cr), must be 0 */ + (y_cr_offset << 0)); /* Y offset for V(Cr), must be 0 for video codec, non-zoro for JPEG */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_pipe_buf_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 61); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (61 - 2)); + /* Pre-deblock 1-3 */ + if (gen7_mfd_context->pre_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* Post-debloing 4-6 */ + if (gen7_mfd_context->post_deblocking_output.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* uncompressed-video & stream out 7-12 */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* intra row-store scratch 13-15 */ + if (gen7_mfd_context->intra_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* deblocking-filter-row-store 16-18 */ + if (gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 19..50 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + struct object_surface *obj_surface; + + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->bo) { + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + + OUT_BCS_RELOC(batch, obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + } + + /* reference property 51 */ + OUT_BCS_BATCH(batch, 0); + + /* Macroblock status & ILDB 52-57 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the second Macroblock status 58-60 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_ind_obj_base_addr_state(VADriverContextP ctx, + dri_bo *slice_data_bo, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 26); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (26 - 2)); + /* MFX In BS 1-5 */ + OUT_BCS_RELOC(batch, slice_data_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* MFX Indirect Bitstream Object Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* Upper bound 4-5 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* MFX indirect MV 6-10 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* MFX IT_COFF 11-15 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* MFX IT_DBLK 16-20 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* MFX PAK_BSE object for encoder 21-25 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_bsp_buf_base_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + int standard_select, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + + if (gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* MPR Row Store Scratch buffer 4-6 */ + if (gen7_mfd_context->mpr_row_store_scratch_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->mpr_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* Bitplane 7-9 */ + if (gen7_mfd_context->bitplane_read_buffer.valid) + OUT_BCS_RELOC(batch, gen7_mfd_context->bitplane_read_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_qm_state(VADriverContextP ctx, + int qm_type, + unsigned char *qm, + int qm_length, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16 * 4); + memcpy(qm_buffer, qm, qm_length); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_avc_img_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int img_struct; + int mbaff_frame_flag; + unsigned int width_in_mbs, height_in_mbs; + VAPictureParameterBufferH264 *pic_param; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); + + if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD) + img_struct = 1; + else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD) + img_struct = 3; + else + img_struct = 0; + + if ((img_struct & 0x1) == 0x1) { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x1); + } else { + assert(pic_param->pic_fields.bits.field_pic_flag == 0x0); + } + + if (pic_param->seq_fields.bits.frame_mbs_only_flag) { /* a frame containing only frame macroblocks */ + assert(pic_param->seq_fields.bits.mb_adaptive_frame_field_flag == 0); + assert(pic_param->pic_fields.bits.field_pic_flag == 0); + } else { + assert(pic_param->seq_fields.bits.direct_8x8_inference_flag == 1); /* see H.264 spec */ + } + + mbaff_frame_flag = (pic_param->seq_fields.bits.mb_adaptive_frame_field_flag && + !pic_param->pic_fields.bits.field_pic_flag); + + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + + /* MFX unit doesn't support 4:2:2 and 4:4:4 picture */ + assert(pic_param->seq_fields.bits.chroma_format_idc == 0 || /* monochrome picture */ + pic_param->seq_fields.bits.chroma_format_idc == 1); /* 4:2:0 */ + assert(pic_param->seq_fields.bits.residual_colour_transform_flag == 0); /* only available for 4:4:4 */ + + BEGIN_BCS_BATCH(batch, 17); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (17 - 2)); + OUT_BCS_BATCH(batch, + (width_in_mbs * height_in_mbs - 1)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + OUT_BCS_BATCH(batch, + ((pic_param->second_chroma_qp_index_offset & 0x1f) << 24) | + ((pic_param->chroma_qp_index_offset & 0x1f) << 16) | + (0 << 14) | /* Max-bit conformance Intra flag ??? FIXME */ + (0 << 13) | /* Max Macroblock size conformance Inter flag ??? FIXME */ + (pic_param->pic_fields.bits.weighted_pred_flag << 12) | /* differ from GEN6 */ + (pic_param->pic_fields.bits.weighted_bipred_idc << 10) | + (img_struct << 8)); + OUT_BCS_BATCH(batch, + (pic_param->seq_fields.bits.chroma_format_idc << 10) | + (pic_param->pic_fields.bits.entropy_coding_mode_flag << 7) | + ((!pic_param->pic_fields.bits.reference_pic_flag) << 6) | + (pic_param->pic_fields.bits.constrained_intra_pred_flag << 5) | + (pic_param->seq_fields.bits.direct_8x8_inference_flag << 4) | + (pic_param->pic_fields.bits.transform_8x8_mode_flag << 3) | + (pic_param->seq_fields.bits.frame_mbs_only_flag << 2) | + (mbaff_frame_flag << 1) | + (pic_param->pic_fields.bits.field_pic_flag << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_avc_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAIQMatrixBufferH264 *iq_matrix; + VAPictureParameterBufferH264 *pic_param; + + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) + iq_matrix = (VAIQMatrixBufferH264 *)decode_state->iq_matrix->buffer; + else + iq_matrix = &gen7_mfd_context->iq_matrix.h264; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + + gen8_mfd_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, &iq_matrix->ScalingList4x4[0][0], 3 * 16, gen7_mfd_context); + gen8_mfd_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, &iq_matrix->ScalingList4x4[3][0], 3 * 16, gen7_mfd_context); + + if (pic_param->pic_fields.bits.transform_8x8_mode_flag) { + gen8_mfd_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, &iq_matrix->ScalingList8x8[0][0], 64, gen7_mfd_context); + gen8_mfd_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, &iq_matrix->ScalingList8x8[1][0], 64, gen7_mfd_context); + } +} + +static inline void +gen8_mfd_avc_picid_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen75_send_avc_picid_state(gen7_mfd_context->base.batch, + gen7_mfd_context->reference_surface); +} + +static void +gen8_mfd_avc_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface; + GenAvcSurface *gen7_avc_surface; + VAPictureH264 *va_pic; + int i; + + BEGIN_BCS_BATCH(batch, 71); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (71 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + if (gen7_mfd_context->reference_surface[i].surface_id != VA_INVALID_ID && + gen7_mfd_context->reference_surface[i].obj_surface && + gen7_mfd_context->reference_surface[i].obj_surface->private_data) { + + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + gen7_avc_surface = obj_surface->private_data; + + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, 0); + + /* the current decoding frame/field */ + va_pic = &pic_param->CurrPic; + obj_surface = decode_state->render_object; + assert(obj_surface->bo && obj_surface->private_data); + gen7_avc_surface = obj_surface->private_data; + + OUT_BCS_RELOC(batch, gen7_avc_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* POC List */ + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + obj_surface = gen7_mfd_context->reference_surface[i].obj_surface; + + if (obj_surface) { + const VAPictureH264 * const va_pic = avc_find_picture( + obj_surface->base.id, pic_param->ReferenceFrames, + ARRAY_ELEMS(pic_param->ReferenceFrames)); + + assert(va_pic != NULL); + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + va_pic = &pic_param->CurrPic; + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_avc_phantom_slice_first(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen6_mfd_avc_phantom_slice(ctx, pic_param, next_slice_param, gen7_mfd_context->base.batch); +} + +static void +gen8_mfd_avc_slice_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; + int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos; + int num_ref_idx_l0, num_ref_idx_l1; + int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && + pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); + int first_mb_in_slice = 0, first_mb_in_next_slice = 0; + int slice_type; + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) { + slice_type = SLICE_TYPE_I; + } else if (slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) { + slice_type = SLICE_TYPE_P; + } else { + assert(slice_param->slice_type == SLICE_TYPE_B); + slice_type = SLICE_TYPE_B; + } + + if (slice_type == SLICE_TYPE_I) { + assert(slice_param->num_ref_idx_l0_active_minus1 == 0); + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = 0; + num_ref_idx_l1 = 0; + } else if (slice_type == SLICE_TYPE_P) { + assert(slice_param->num_ref_idx_l1_active_minus1 == 0); + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = 0; + } else { + num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + first_mb_in_slice = slice_param->first_mb_in_slice; + slice_hor_pos = first_mb_in_slice % width_in_mbs; + slice_ver_pos = first_mb_in_slice / width_in_mbs; + + if (mbaff_picture) + slice_ver_pos = slice_ver_pos << 1; + if (next_slice_param) { + first_mb_in_next_slice = next_slice_param->first_mb_in_slice; + next_slice_hor_pos = first_mb_in_next_slice % width_in_mbs; + next_slice_ver_pos = first_mb_in_next_slice / width_in_mbs; + + if (mbaff_picture) + next_slice_ver_pos = next_slice_ver_pos << 1; + } else { + next_slice_hor_pos = 0; + next_slice_ver_pos = height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag); + } + + BEGIN_BCS_BATCH(batch, 11); /* FIXME: is it 10??? */ + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (slice_param->chroma_log2_weight_denom << 8) | + (slice_param->luma_log2_weight_denom << 0)); + OUT_BCS_BATCH(batch, + (slice_param->direct_spatial_mv_pred_flag << 29) | + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + ((pic_param->pic_init_qp_minus26 + 26 + slice_param->slice_qp_delta) << 16) | + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (next_slice_ver_pos << 16) | + (next_slice_hor_pos << 0)); + OUT_BCS_BATCH(batch, + (next_slice_param == NULL) << 19); /* last slice flag */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static inline void +gen8_mfd_avc_ref_idx_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen6_send_avc_ref_idx_state( + gen7_mfd_context->base.batch, + slice_param, + gen7_mfd_context->reference_surface + ); +} + +static void +gen8_mfd_avc_weightoffset_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i, j, num_weight_offset_table = 0; + short weightoffsets[32 * 6]; + + if ((slice_param->slice_type == SLICE_TYPE_P || + slice_param->slice_type == SLICE_TYPE_SP) && + (pic_param->pic_fields.bits.weighted_pred_flag == 1)) { + num_weight_offset_table = 1; + } + + if ((slice_param->slice_type == SLICE_TYPE_B) && + (pic_param->pic_fields.bits.weighted_bipred_idc == 1)) { + num_weight_offset_table = 2; + } + + for (i = 0; i < num_weight_offset_table; i++) { + BEGIN_BCS_BATCH(batch, 98); + OUT_BCS_BATCH(batch, MFX_AVC_WEIGHTOFFSET_STATE | (98 - 2)); + OUT_BCS_BATCH(batch, i); + + if (i == 0) { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l0[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l0[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l0[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l0[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l0[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l0[j][1]; + } + } else { + for (j = 0; j < 32; j++) { + weightoffsets[j * 6 + 0] = slice_param->luma_weight_l1[j]; + weightoffsets[j * 6 + 1] = slice_param->luma_offset_l1[j]; + weightoffsets[j * 6 + 2] = slice_param->chroma_weight_l1[j][0]; + weightoffsets[j * 6 + 3] = slice_param->chroma_offset_l1[j][0]; + weightoffsets[j * 6 + 4] = slice_param->chroma_weight_l1[j][1]; + weightoffsets[j * 6 + 5] = slice_param->chroma_offset_l1[j][1]; + } + } + + intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets)); + ADVANCE_BCS_BATCH(batch); + } +} + +static void +gen8_mfd_avc_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *slice_param, + dri_bo *slice_data_bo, + VASliceParameterBufferH264 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int slice_data_bit_offset = avc_get_first_mb_bit_offset(slice_data_bo, + slice_param, + pic_param->pic_fields.bits.entropy_coding_mode_flag); + + /* the input bitsteam format on GEN7 differs from GEN6 */ + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, + (slice_param->slice_data_size)); + OUT_BCS_BATCH(batch, slice_param->slice_data_offset); + OUT_BCS_BATCH(batch, + (0 << 31) | + (0 << 14) | + (0 << 12) | + (0 << 10) | + (0 << 8)); + OUT_BCS_BATCH(batch, + ((slice_data_bit_offset >> 3) << 16) | + (1 << 7) | + (0 << 5) | + (0 << 4) | + ((next_slice_param == NULL) << 3) | /* LastSlice Flag */ + (slice_data_bit_offset & 0x7)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static inline void +gen8_mfd_avc_context_init( + VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context +) +{ + /* Initialize flat scaling lists */ + avc_gen_default_iq_matrix(&gen7_mfd_context->iq_matrix.h264); +} + +static void +gen8_mfd_avc_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + int i, j, enable_avc_ildb = 0; + unsigned int width_in_mbs, height_in_mbs; + + for (j = 0; j < decode_state->num_slice_params && enable_avc_ildb == 0; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (slice_param->disable_deblocking_filter_idc != 1) { + enable_avc_ildb = 1; + break; + } + + slice_param++; + } + } + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen75_update_avc_frame_store_index(ctx, decode_state, pic_param, + gen7_mfd_context->reference_surface); + width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; + assert(width_in_mbs > 0 && width_in_mbs <= 256); /* 4K */ + assert(height_in_mbs > 0 && height_in_mbs <= 256); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + if (pic_param->pic_fields.bits.reference_pic_flag) + obj_surface->flags |= SURFACE_REFERENCED; + else + obj_surface->flags &= ~SURFACE_REFERENCED; + + avc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param); + gen8_mfd_init_avc_surface(ctx, pic_param, obj_surface); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.valid = enable_avc_ildb; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = !enable_avc_ildb; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + width_in_mbs * 64, + 0x1000); + assert(bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + width_in_mbs * 64 * 4, + 0x1000); + assert(bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + width_in_mbs * 64 * 2, + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + width_in_mbs * 64 * 2, + 0x1000); + assert(bo); + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen8_mfd_avc_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferH264 *pic_param; + VASliceParameterBufferH264 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + gen8_mfd_avc_decode_init(ctx, decode_state, gen7_mfd_context); + + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen8_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen8_mfd_surface_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen8_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen8_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen7_mfd_context); + gen8_mfd_avc_qm_state(ctx, decode_state, gen7_mfd_context); + gen8_mfd_avc_picid_state(ctx, decode_state, gen7_mfd_context); + gen8_mfd_avc_img_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen8_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_AVC, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer; + + if (j == 0 && slice_param->first_mb_in_slice) + gen8_mfd_avc_phantom_slice_first(ctx, pic_param, slice_param, gen7_mfd_context); + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen8_mfd_avc_directmode_state(ctx, decode_state, pic_param, slice_param, gen7_mfd_context); + gen8_mfd_avc_ref_idx_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen8_mfd_avc_weightoffset_state(ctx, pic_param, slice_param, gen7_mfd_context); + gen8_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); + gen8_mfd_avc_bsd_object(ctx, pic_param, slice_param, slice_data_bo, next_slice_param, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen8_mfd_mpeg2_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferMPEG2 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + unsigned int width_in_mbs; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; + + mpeg2_set_reference_surfaces( + ctx, + gen7_mfd_context->reference_surface, + decode_state, + pic_param + ); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + width_in_mbs * 96, + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->post_deblocking_output.valid = 0; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen8_mfd_mpeg2_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + unsigned int slice_concealment_disable_bit = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + slice_concealment_disable_bit = 1; + + BEGIN_BCS_BATCH(batch, 13); + OUT_BCS_BATCH(batch, MFX_MPEG2_PIC_STATE | (13 - 2)); + OUT_BCS_BATCH(batch, + (pic_param->f_code & 0xf) << 28 | /* f_code[1][1] */ + ((pic_param->f_code >> 4) & 0xf) << 24 | /* f_code[1][0] */ + ((pic_param->f_code >> 8) & 0xf) << 20 | /* f_code[0][1] */ + ((pic_param->f_code >> 12) & 0xf) << 16 | /* f_code[0][0] */ + pic_param->picture_coding_extension.bits.intra_dc_precision << 14 | + pic_param->picture_coding_extension.bits.picture_structure << 12 | + pic_param->picture_coding_extension.bits.top_field_first << 11 | + pic_param->picture_coding_extension.bits.frame_pred_frame_dct << 10 | + pic_param->picture_coding_extension.bits.concealment_motion_vectors << 9 | + pic_param->picture_coding_extension.bits.q_scale_type << 8 | + pic_param->picture_coding_extension.bits.intra_vlc_format << 7 | + pic_param->picture_coding_extension.bits.alternate_scan << 6); + OUT_BCS_BATCH(batch, + pic_param->picture_coding_type << 9); + OUT_BCS_BATCH(batch, + (slice_concealment_disable_bit << 31) | + ((ALIGN(pic_param->vertical_size, 16) / 16) - 1) << 16 | + ((ALIGN(pic_param->horizontal_size, 16) / 16) - 1)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_mpeg2_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAIQMatrixBufferMPEG2 * const gen_iq_matrix = &gen7_mfd_context->iq_matrix.mpeg2; + int i, j; + + /* Update internal QM state */ + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) { + VAIQMatrixBufferMPEG2 * const iq_matrix = + (VAIQMatrixBufferMPEG2 *)decode_state->iq_matrix->buffer; + + if (gen_iq_matrix->load_intra_quantiser_matrix == -1 || + iq_matrix->load_intra_quantiser_matrix) { + gen_iq_matrix->load_intra_quantiser_matrix = + iq_matrix->load_intra_quantiser_matrix; + if (iq_matrix->load_intra_quantiser_matrix) { + for (j = 0; j < 64; j++) + gen_iq_matrix->intra_quantiser_matrix[zigzag_direct[j]] = + iq_matrix->intra_quantiser_matrix[j]; + } + } + + if (gen_iq_matrix->load_non_intra_quantiser_matrix == -1 || + iq_matrix->load_non_intra_quantiser_matrix) { + gen_iq_matrix->load_non_intra_quantiser_matrix = + iq_matrix->load_non_intra_quantiser_matrix; + if (iq_matrix->load_non_intra_quantiser_matrix) { + for (j = 0; j < 64; j++) + gen_iq_matrix->non_intra_quantiser_matrix[zigzag_direct[j]] = + iq_matrix->non_intra_quantiser_matrix[j]; + } + } + } + + /* Commit QM state to HW */ + for (i = 0; i < 2; i++) { + unsigned char *qm = NULL; + int qm_type; + + if (i == 0) { + if (gen_iq_matrix->load_intra_quantiser_matrix) { + qm = gen_iq_matrix->intra_quantiser_matrix; + qm_type = MFX_QM_MPEG_INTRA_QUANTIZER_MATRIX; + } + } else { + if (gen_iq_matrix->load_non_intra_quantiser_matrix) { + qm = gen_iq_matrix->non_intra_quantiser_matrix; + qm_type = MFX_QM_MPEG_NON_INTRA_QUANTIZER_MATRIX; + } + } + + if (!qm) + continue; + + gen8_mfd_qm_state(ctx, qm_type, qm, 64, gen7_mfd_context); + } +} + +static void +gen8_mfd_mpeg2_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferMPEG2 *pic_param, + VASliceParameterBufferMPEG2 *slice_param, + VASliceParameterBufferMPEG2 *next_slice_param, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; + int mb_count, vpos0, hpos0, vpos1, hpos1, is_field_pic_wa, is_field_pic = 0; + + if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || + pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) + is_field_pic = 1; + is_field_pic_wa = is_field_pic && + gen7_mfd_context->wa_mpeg2_slice_vertical_position > 0; + + vpos0 = slice_param->slice_vertical_position / (1 + is_field_pic_wa); + hpos0 = slice_param->slice_horizontal_position; + + if (next_slice_param == NULL) { + vpos1 = ALIGN(pic_param->vertical_size, 16) / 16 / (1 + is_field_pic); + hpos1 = 0; + } else { + vpos1 = next_slice_param->slice_vertical_position / (1 + is_field_pic_wa); + hpos1 = next_slice_param->slice_horizontal_position; + } + + mb_count = (vpos1 * width_in_mbs + hpos1) - (vpos0 * width_in_mbs + hpos0); + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFD_MPEG2_BSD_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (slice_param->macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + hpos0 << 24 | + vpos0 << 16 | + mb_count << 8 | + (next_slice_param == NULL) << 5 | + (next_slice_param == NULL) << 3 | + (slice_param->macroblock_offset & 0x7)); + OUT_BCS_BATCH(batch, + (slice_param->quantiser_scale_code << 24) | + (vpos1 << 8 | hpos1)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_mpeg2_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferMPEG2 *pic_param; + VASliceParameterBufferMPEG2 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + + gen8_mfd_mpeg2_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen8_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen8_mfd_surface_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen8_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen8_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen7_mfd_context); + gen8_mfd_mpeg2_pic_state(ctx, decode_state, gen7_mfd_context); + gen8_mfd_mpeg2_qm_state(ctx, decode_state, gen7_mfd_context); + + if (gen7_mfd_context->wa_mpeg2_slice_vertical_position < 0) + gen7_mfd_context->wa_mpeg2_slice_vertical_position = + mpeg2_wa_slice_vertical_position(decode_state, pic_param); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen8_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen8_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static const int va_to_gen7_vc1_pic_type[5] = { + GEN7_VC1_I_PICTURE, + GEN7_VC1_P_PICTURE, + GEN7_VC1_B_PICTURE, + GEN7_VC1_BI_PICTURE, + GEN7_VC1_P_PICTURE, +}; + +static const int va_to_gen7_vc1_mv[4] = { + 1, /* 1-MV */ + 2, /* 1-MV half-pel */ + 3, /* 1-MV half-pef bilinear */ + 0, /* Mixed MV */ +}; + +static const int b_picture_scale_factor[21] = { + 128, 85, 170, 64, 192, + 51, 102, 153, 204, 43, + 215, 37, 74, 111, 148, + 185, 222, 32, 96, 160, + 224, +}; + +static const int va_to_gen7_vc1_condover[3] = { + 0, + 2, + 3 +}; + +static const int va_to_gen7_vc1_profile[4] = { + GEN7_VC1_SIMPLE_PROFILE, + GEN7_VC1_MAIN_PROFILE, + GEN7_VC1_RESERVED_PROFILE, + GEN7_VC1_ADVANCED_PROFILE +}; + +static void +gen8_mfd_free_vc1_surface(void **data) +{ + struct gen7_vc1_surface *gen7_vc1_surface = *data; + + if (!gen7_vc1_surface) + return; + + dri_bo_unreference(gen7_vc1_surface->dmv); + free(gen7_vc1_surface); + *data = NULL; +} + +static void +gen8_mfd_init_vc1_surface(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen7_vc1_surface *gen7_vc1_surface = obj_surface->private_data; + int width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; + + obj_surface->free_private_data = gen8_mfd_free_vc1_surface; + + if (!gen7_vc1_surface) { + gen7_vc1_surface = calloc(sizeof(struct gen7_vc1_surface), 1); + + if (!gen7_vc1_surface) + return; + + assert((obj_surface->size & 0x3f) == 0); + obj_surface->private_data = gen7_vc1_surface; + } + + gen7_vc1_surface->picture_type = pic_param->picture_fields.bits.picture_type; + + if (gen7_vc1_surface->dmv == NULL) { + gen7_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr, + "direct mv w/r buffer", + width_in_mbs * height_in_mbs * 64, + 0x1000); + } +} + +static void +gen8_mfd_vc1_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferVC1 *pic_param; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + dri_bo *bo; + int width_in_mbs; + int picture_type; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + picture_type = pic_param->picture_fields.bits.picture_type; + + intel_update_vc1_frame_store_index(ctx, + decode_state, + pic_param, + gen7_mfd_context->reference_surface); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + gen8_mfd_init_vc1_surface(ctx, pic_param, obj_surface); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.valid = pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = !pic_param->entrypoint_fields.bits.loopfilter; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + width_in_mbs * 64, + 0x1000); + assert(bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + width_in_mbs * 7 * 64, + 0x1000); + assert(bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + width_in_mbs * 96, + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bitplane_read_buffer.valid = !!pic_param->bitplane_present.value; + dri_bo_unreference(gen7_mfd_context->bitplane_read_buffer.bo); + + if (gen7_mfd_context->bitplane_read_buffer.valid) { + int width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16; + int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16; + int bitplane_width = ALIGN(width_in_mbs, 2) / 2; + int src_w, src_h; + uint8_t *src = NULL, *dst = NULL; + + assert(decode_state->bit_plane->buffer); + src = decode_state->bit_plane->buffer; + + bo = dri_bo_alloc(i965->intel.bufmgr, + "VC-1 Bitplane", + bitplane_width * height_in_mbs, + 0x1000); + assert(bo); + gen7_mfd_context->bitplane_read_buffer.bo = bo; + + dri_bo_map(bo, True); + assert(bo->virtual); + dst = bo->virtual; + + for (src_h = 0; src_h < height_in_mbs; src_h++) { + for(src_w = 0; src_w < width_in_mbs; src_w++) { + int src_index, dst_index; + int src_shift; + uint8_t src_value; + + src_index = (src_h * width_in_mbs + src_w) / 2; + src_shift = !((src_h * width_in_mbs + src_w) & 1) * 4; + src_value = ((src[src_index] >> src_shift) & 0xf); + + if (picture_type == GEN7_VC1_SKIPPED_PICTURE){ + src_value |= 0x2; + } + + dst_index = src_w / 2; + dst[dst_index] = ((dst[dst_index] >> 4) | (src_value << 4)); + } + + if (src_w & 1) + dst[src_w / 2] >>= 4; + + dst += bitplane_width; + } + + dri_bo_unmap(bo); + } else + gen7_mfd_context->bitplane_read_buffer.bo = NULL; +} + +static void +gen8_mfd_vc1_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + struct object_surface *obj_surface; + int alt_pquant_config = 0, alt_pquant_edge_mask = 0, alt_pq; + int dquant, dquantfrm, dqprofile, dqdbedge, dqsbedge, dqbilevel; + int unified_mv_mode; + int ref_field_pic_polarity = 0; + int scale_factor = 0; + int trans_ac_y = 0; + int dmv_surface_valid = 0; + int brfd = 0; + int fcm = 0; + int picture_type; + int profile; + int overlap; + int interpolation_mode = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + profile = va_to_gen7_vc1_profile[pic_param->sequence_fields.bits.profile]; + dquant = pic_param->pic_quantizer_fields.bits.dquant; + dquantfrm = pic_param->pic_quantizer_fields.bits.dq_frame; + dqprofile = pic_param->pic_quantizer_fields.bits.dq_profile; + dqdbedge = pic_param->pic_quantizer_fields.bits.dq_db_edge; + dqsbedge = pic_param->pic_quantizer_fields.bits.dq_sb_edge; + dqbilevel = pic_param->pic_quantizer_fields.bits.dq_binary_level; + alt_pq = pic_param->pic_quantizer_fields.bits.alt_pic_quantizer; + + if (dquant == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + } else if (dquant == 2) { + alt_pquant_config = 1; + alt_pquant_edge_mask = 0xf; + } else { + assert(dquant == 1); + if (dquantfrm == 0) { + alt_pquant_config = 0; + alt_pquant_edge_mask = 0; + alt_pq = 0; + } else { + assert(dquantfrm == 1); + alt_pquant_config = 1; + + switch (dqprofile) { + case 3: + if (dqbilevel == 0) { + alt_pquant_config = 2; + alt_pquant_edge_mask = 0; + } else { + assert(dqbilevel == 1); + alt_pquant_config = 3; + alt_pquant_edge_mask = 0; + } + break; + + case 0: + alt_pquant_edge_mask = 0xf; + break; + + case 1: + if (dqdbedge == 3) + alt_pquant_edge_mask = 0x9; + else + alt_pquant_edge_mask = (0x3 << dqdbedge); + + break; + + case 2: + alt_pquant_edge_mask = (0x1 << dqsbedge); + break; + + default: + assert(0); + } + } + } + + if (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation) { + assert(pic_param->mv_fields.bits.mv_mode2 < 4); + unified_mv_mode = va_to_gen7_vc1_mv[pic_param->mv_fields.bits.mv_mode2]; + } else { + assert(pic_param->mv_fields.bits.mv_mode < 4); + unified_mv_mode = va_to_gen7_vc1_mv[pic_param->mv_fields.bits.mv_mode]; + } + + if (pic_param->sequence_fields.bits.interlace == 1 && + pic_param->picture_fields.bits.frame_coding_mode != 0) { /* frame-interlace or field-interlace */ + /* FIXME: calculate reference field picture polarity */ + assert(0); + ref_field_pic_polarity = 0; + } + + if (pic_param->b_picture_fraction < 21) + scale_factor = b_picture_scale_factor[pic_param->b_picture_fraction]; + + picture_type = va_to_gen7_vc1_pic_type[pic_param->picture_fields.bits.picture_type]; + + if (profile == GEN7_VC1_ADVANCED_PROFILE && + picture_type == GEN7_VC1_I_PICTURE) + picture_type = GEN7_VC1_BI_PICTURE; + + if (picture_type == GEN7_VC1_I_PICTURE || picture_type == GEN7_VC1_BI_PICTURE) /* I picture */ + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx2; + else { + trans_ac_y = pic_param->transform_fields.bits.transform_ac_codingset_idx1; + + /* + * 8.3.6.2.1 Transform Type Selection + * If variable-sized transform coding is not enabled, + * then the 8x8 transform shall be used for all blocks. + * it is also MFX_VC1_PIC_STATE requirement. + */ + if (pic_param->transform_fields.bits.variable_sized_transform_flag == 0) { + pic_param->transform_fields.bits.mb_level_transform_type_flag = 1; + pic_param->transform_fields.bits.frame_level_transform_type = 0; + } + } + + if (picture_type == GEN7_VC1_B_PICTURE) { + struct gen7_vc1_surface *gen7_vc1_surface = NULL; + + obj_surface = decode_state->reference_objects[1]; + + if (obj_surface) + gen7_vc1_surface = obj_surface->private_data; + + if (!gen7_vc1_surface || + (va_to_gen7_vc1_pic_type[gen7_vc1_surface->picture_type] == GEN7_VC1_I_PICTURE || + va_to_gen7_vc1_pic_type[gen7_vc1_surface->picture_type] == GEN7_VC1_BI_PICTURE)) + dmv_surface_valid = 0; + else + dmv_surface_valid = 1; + } + + assert(pic_param->picture_fields.bits.frame_coding_mode < 3); + + if (pic_param->picture_fields.bits.frame_coding_mode < 2) + fcm = pic_param->picture_fields.bits.frame_coding_mode; + else { + if (pic_param->picture_fields.bits.top_field_first) + fcm = 2; + else + fcm = 3; + } + + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_B_PICTURE) { /* B picture */ + brfd = pic_param->reference_fields.bits.reference_distance; + brfd = (scale_factor * brfd) >> 8; + brfd = pic_param->reference_fields.bits.reference_distance - brfd - 1; + + if (brfd < 0) + brfd = 0; + } + + overlap = pic_param->sequence_fields.bits.overlap; + + if (overlap) { + overlap = 0; + if (profile != GEN7_VC1_ADVANCED_PROFILE){ + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9 && + pic_param->picture_fields.bits.picture_type != GEN7_VC1_B_PICTURE) { + overlap = 1; + } + }else { + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_P_PICTURE && + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } + if (pic_param->picture_fields.bits.picture_type == GEN7_VC1_I_PICTURE || + pic_param->picture_fields.bits.picture_type == GEN7_VC1_BI_PICTURE){ + if (pic_param->pic_quantizer_fields.bits.pic_quantizer_scale >= 9){ + overlap = 1; + } else if (va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] == 2 || + va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] == 3) { + overlap = 1; + } + } + } + } + + assert(pic_param->conditional_overlap_flag < 3); + assert(pic_param->mv_fields.bits.mv_table < 4); /* FIXME: interlace mode */ + + if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPelBilinear || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPelBilinear)) + interpolation_mode = 9; /* Half-pel bilinear */ + else if (pic_param->mv_fields.bits.mv_mode == VAMvMode1MvHalfPel || + (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation && + pic_param->mv_fields.bits.mv_mode2 == VAMvMode1MvHalfPel)) + interpolation_mode = 1; /* Half-pel bicubic */ + else + interpolation_mode = 0; /* Quarter-pel bicubic */ + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_VC1_LONG_PIC_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + (((ALIGN(pic_param->coded_height, 16) / 16) - 1) << 16) | + ((ALIGN(pic_param->coded_width, 16) / 16) - 1)); + OUT_BCS_BATCH(batch, + ((ALIGN(pic_param->coded_width, 16) / 16 + 1) / 2 - 1) << 24 | + dmv_surface_valid << 15 | + (pic_param->pic_quantizer_fields.bits.quantizer == 0) << 14 | /* implicit quantizer */ + pic_param->rounding_control << 13 | + pic_param->sequence_fields.bits.syncmarker << 12 | + interpolation_mode << 8 | + 0 << 7 | /* FIXME: scale up or down ??? */ + pic_param->range_reduction_frame << 6 | + pic_param->entrypoint_fields.bits.loopfilter << 5 | + overlap << 4 | + !pic_param->picture_fields.bits.is_first_field << 3 | + (pic_param->sequence_fields.bits.profile == 3) << 0); + OUT_BCS_BATCH(batch, + va_to_gen7_vc1_condover[pic_param->conditional_overlap_flag] << 29 | + picture_type << 26 | + fcm << 24 | + alt_pq << 16 | + pic_param->pic_quantizer_fields.bits.pic_quantizer_scale << 8 | + scale_factor << 0); + OUT_BCS_BATCH(batch, + unified_mv_mode << 28 | + pic_param->mv_fields.bits.four_mv_switch << 27 | + pic_param->fast_uvmc_flag << 26 | + ref_field_pic_polarity << 25 | + pic_param->reference_fields.bits.num_reference_pictures << 24 | + pic_param->reference_fields.bits.reference_distance << 20 | + pic_param->reference_fields.bits.reference_distance << 16 | /* FIXME: ??? */ + pic_param->mv_fields.bits.extended_dmv_range << 10 | + pic_param->mv_fields.bits.extended_mv_range << 8 | + alt_pquant_edge_mask << 4 | + alt_pquant_config << 2 | + pic_param->pic_quantizer_fields.bits.half_qp << 1 | + pic_param->pic_quantizer_fields.bits.pic_quantizer_type << 0); + OUT_BCS_BATCH(batch, + !!pic_param->bitplane_present.value << 31 | + !pic_param->bitplane_present.flags.bp_forward_mb << 30 | + !pic_param->bitplane_present.flags.bp_mv_type_mb << 29 | + !pic_param->bitplane_present.flags.bp_skip_mb << 28 | + !pic_param->bitplane_present.flags.bp_direct_mb << 27 | + !pic_param->bitplane_present.flags.bp_overflags << 26 | + !pic_param->bitplane_present.flags.bp_ac_pred << 25 | + !pic_param->bitplane_present.flags.bp_field_tx << 24 | + pic_param->mv_fields.bits.mv_table << 20 | + pic_param->mv_fields.bits.four_mv_block_pattern_table << 18 | + pic_param->mv_fields.bits.two_mv_block_pattern_table << 16 | + pic_param->transform_fields.bits.frame_level_transform_type << 12 | + pic_param->transform_fields.bits.mb_level_transform_type_flag << 11 | + pic_param->mb_mode_table << 8 | + trans_ac_y << 6 | + pic_param->transform_fields.bits.transform_ac_codingset_idx1 << 4 | + pic_param->transform_fields.bits.intra_transform_dc_table << 3 | + pic_param->cbp_table << 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_vc1_pred_pipe_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + int intensitycomp_single; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + intensitycomp_single = (pic_param->mv_fields.bits.mv_mode == VAMvModeIntensityCompensation); + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_VC1_PRED_PIPE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, + 0 << 14 | /* FIXME: double ??? */ + 0 << 12 | + intensitycomp_single << 10 | + intensitycomp_single << 8 | + 0 << 4 | /* FIXME: interlace mode */ + 0); + OUT_BCS_BATCH(batch, + pic_param->luma_shift << 16 | + pic_param->luma_scale << 0); /* FIXME: Luma Scaling */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_vc1_directmode_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + struct object_surface *obj_surface; + dri_bo *dmv_read_buffer = NULL, *dmv_write_buffer = NULL; + + obj_surface = decode_state->render_object; + + if (obj_surface && obj_surface->private_data) { + dmv_write_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + obj_surface = decode_state->reference_objects[1]; + + if (obj_surface && obj_surface->private_data) { + dmv_read_buffer = ((struct gen7_vc1_surface *)(obj_surface->private_data))->dmv; + } + + BEGIN_BCS_BATCH(batch, 7); + OUT_BCS_BATCH(batch, MFX_VC1_DIRECTMODE_STATE | (7 - 2)); + + if (dmv_write_buffer) + OUT_BCS_RELOC(batch, dmv_write_buffer, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + if (dmv_read_buffer) + OUT_BCS_RELOC(batch, dmv_read_buffer, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen8_mfd_vc1_get_macroblock_bit_offset(uint8_t *buf, int in_slice_data_bit_offset, int profile) +{ + int out_slice_data_bit_offset; + int slice_header_size = in_slice_data_bit_offset / 8; + int i, j; + + if (profile != 3) + out_slice_data_bit_offset = in_slice_data_bit_offset; + else { + for (i = 0, j = 0; i < slice_header_size; i++, j++) { + if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3 && buf[j + 3] < 4) { + i++, j += 2; + } + } + + out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; + } + + return out_slice_data_bit_offset; +} + +static void +gen8_mfd_vc1_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferVC1 *pic_param, + VASliceParameterBufferVC1 *slice_param, + VASliceParameterBufferVC1 *next_slice_param, + dri_bo *slice_data_bo, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int next_slice_start_vert_pos; + int macroblock_offset; + uint8_t *slice_data = NULL; + + dri_bo_map(slice_data_bo, 0); + slice_data = (uint8_t *)(slice_data_bo->virtual + slice_param->slice_data_offset); + macroblock_offset = gen8_mfd_vc1_get_macroblock_bit_offset(slice_data, + slice_param->macroblock_offset, + pic_param->sequence_fields.bits.profile); + dri_bo_unmap(slice_data_bo); + + if (next_slice_param) + next_slice_start_vert_pos = next_slice_param->slice_vertical_position; + else + next_slice_start_vert_pos = ALIGN(pic_param->coded_height, 16) / 16; + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFD_VC1_BSD_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size - (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset + (macroblock_offset >> 3)); + OUT_BCS_BATCH(batch, + slice_param->slice_vertical_position << 16 | + next_slice_start_vert_pos << 0); + OUT_BCS_BATCH(batch, + (macroblock_offset & 0x7)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_vc1_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVC1 *pic_param; + VASliceParameterBufferVC1 *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + + gen8_mfd_vc1_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen8_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen8_mfd_surface_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen8_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen8_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen7_mfd_context); + gen8_mfd_vc1_pic_state(ctx, decode_state, gen7_mfd_context); + gen8_mfd_vc1_pred_pipe_state(ctx, decode_state, gen7_mfd_context); + gen8_mfd_vc1_directmode_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen8_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_VC1, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen8_mfd_vc1_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen8_mfd_jpeg_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct object_surface *obj_surface; + VAPictureParameterBufferJPEGBaseline *pic_param; + int subsampling = SUBSAMPLE_YUV420; + int fourcc = VA_FOURCC_IMC3; + + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + if (pic_param->num_components == 1) + subsampling = SUBSAMPLE_YUV400; + else if (pic_param->num_components == 3) { + int h1 = pic_param->components[0].h_sampling_factor; + int h2 = pic_param->components[1].h_sampling_factor; + int h3 = pic_param->components[2].h_sampling_factor; + int v1 = pic_param->components[0].v_sampling_factor; + int v2 = pic_param->components[1].v_sampling_factor; + int v3 = pic_param->components[2].v_sampling_factor; + + if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV420; + fourcc = VA_FOURCC_IMC3; + } else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422H; + fourcc = VA_FOURCC_422H; + } else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV444; + fourcc = VA_FOURCC_444P; + } else if (h1 == 4 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV411; + fourcc = VA_FOURCC_411P; + } else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422V; + fourcc = VA_FOURCC_422V; + } else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 2 && v3 == 2) { + subsampling = SUBSAMPLE_YUV422H; + fourcc = VA_FOURCC_422H; + } else if (h1 == 2 && h2 == 2 && h3 == 2 && + v1 == 2 && v2 == 1 && v3 == 1) { + subsampling = SUBSAMPLE_YUV422V; + fourcc = VA_FOURCC_422V; + } else + assert(0); + } + else { + assert(0); + } + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, fourcc, subsampling); + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = 1; + + gen7_mfd_context->post_deblocking_output.bo = NULL; + gen7_mfd_context->post_deblocking_output.valid = 0; + + gen7_mfd_context->intra_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = NULL; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 0; + + gen7_mfd_context->bitplane_read_buffer.bo = NULL; + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static const int va_to_gen7_jpeg_rotation[4] = { + GEN7_JPEG_ROTATION_0, + GEN7_JPEG_ROTATION_90, + GEN7_JPEG_ROTATION_180, + GEN7_JPEG_ROTATION_270 +}; + +static void +gen8_mfd_jpeg_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferJPEGBaseline *pic_param; + int chroma_type = GEN7_YUV420; + int frame_width_in_blks; + int frame_height_in_blks; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + if (pic_param->num_components == 1) + chroma_type = GEN7_YUV400; + else if (pic_param->num_components == 3) { + int h1 = pic_param->components[0].h_sampling_factor; + int h2 = pic_param->components[1].h_sampling_factor; + int h3 = pic_param->components[2].h_sampling_factor; + int v1 = pic_param->components[0].v_sampling_factor; + int v2 = pic_param->components[1].v_sampling_factor; + int v3 = pic_param->components[2].v_sampling_factor; + + if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV420; + else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422H_2Y; + else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV444; + else if (h1 == 4 && h2 == 1 && h3 == 1 && + v1 == 1 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV411; + else if (h1 == 1 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422V_2Y; + else if (h1 == 2 && h2 == 1 && h3 == 1 && + v1 == 2 && v2 == 2 && v3 == 2) + chroma_type = GEN7_YUV422H_4Y; + else if (h2 == 2 && h2 == 2 && h3 == 2 && + v1 == 2 && v2 == 1 && v3 == 1) + chroma_type = GEN7_YUV422V_4Y; + else + assert(0); + } + + if (chroma_type == GEN7_YUV400 || + chroma_type == GEN7_YUV444 || + chroma_type == GEN7_YUV422V_2Y) { + frame_width_in_blks = ((pic_param->picture_width + 7) / 8); + frame_height_in_blks = ((pic_param->picture_height + 7) / 8); + } else if (chroma_type == GEN7_YUV411) { + frame_width_in_blks = ((pic_param->picture_width + 31) / 32) * 4; + frame_height_in_blks = ((pic_param->picture_height + 31) / 32) * 4; + } else { + frame_width_in_blks = ((pic_param->picture_width + 15) / 16) * 2; + frame_height_in_blks = ((pic_param->picture_height + 15) / 16) * 2; + } + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MFX_JPEG_PIC_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (va_to_gen7_jpeg_rotation[0] << 4) | /* without rotation */ + (chroma_type << 0)); + OUT_BCS_BATCH(batch, + ((frame_height_in_blks - 1) << 16) | /* FrameHeightInBlks */ + ((frame_width_in_blks - 1) << 0)); /* FrameWidthInBlks */ + ADVANCE_BCS_BATCH(batch); +} + +static const int va_to_gen7_jpeg_hufftable[2] = { + MFX_HUFFTABLE_ID_Y, + MFX_HUFFTABLE_ID_UV +}; + +static void +gen8_mfd_jpeg_huff_table_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context, + int num_tables) +{ + VAHuffmanTableBufferJPEGBaseline *huffman_table; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int index; + + if (!decode_state->huffman_table || !decode_state->huffman_table->buffer) + return; + + huffman_table = (VAHuffmanTableBufferJPEGBaseline *)decode_state->huffman_table->buffer; + + for (index = 0; index < num_tables; index++) { + int id = va_to_gen7_jpeg_hufftable[index]; + if (!huffman_table->load_huffman_table[index]) + continue; + BEGIN_BCS_BATCH(batch, 53); + OUT_BCS_BATCH(batch, MFX_JPEG_HUFF_TABLE_STATE | (53 - 2)); + OUT_BCS_BATCH(batch, id); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].num_dc_codes, 12); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].dc_values, 12); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].num_ac_codes, 16); + intel_batchbuffer_data(batch, huffman_table->huffman_table[index].ac_values, 164); + ADVANCE_BCS_BATCH(batch); + } +} + +static const int va_to_gen7_jpeg_qm[5] = { + -1, + MFX_QM_JPEG_LUMA_Y_QUANTIZER_MATRIX, + MFX_QM_JPEG_CHROMA_CB_QUANTIZER_MATRIX, + MFX_QM_JPEG_CHROMA_CR_QUANTIZER_MATRIX, + MFX_QM_JPEG_ALPHA_QUANTIZER_MATRIX +}; + +static void +gen8_mfd_jpeg_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + VAPictureParameterBufferJPEGBaseline *pic_param; + VAIQMatrixBufferJPEGBaseline *iq_matrix; + int index; + + if (!decode_state->iq_matrix || !decode_state->iq_matrix->buffer) + return; + + iq_matrix = (VAIQMatrixBufferJPEGBaseline *)decode_state->iq_matrix->buffer; + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + assert(pic_param->num_components <= 3); + + for (index = 0; index < pic_param->num_components; index++) { + int id = pic_param->components[index].component_id - pic_param->components[0].component_id + 1; + int qm_type; + unsigned char *qm = iq_matrix->quantiser_table[pic_param->components[index].quantiser_table_selector]; + unsigned char raster_qm[64]; + int j; + + if (id > 4 || id < 1) + continue; + + if (!iq_matrix->load_quantiser_table[pic_param->components[index].quantiser_table_selector]) + continue; + + qm_type = va_to_gen7_jpeg_qm[id]; + + for (j = 0; j < 64; j++) + raster_qm[zigzag_direct[j]] = qm[j]; + + gen8_mfd_qm_state(ctx, qm_type, raster_qm, 64, gen7_mfd_context); + } +} + +static void +gen8_mfd_jpeg_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferJPEGBaseline *pic_param, + VASliceParameterBufferJPEGBaseline *slice_param, + VASliceParameterBufferJPEGBaseline *next_slice_param, + dri_bo *slice_data_bo, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int scan_component_mask = 0; + int i; + + assert(slice_param->num_components > 0); + assert(slice_param->num_components < 4); + assert(slice_param->num_components <= pic_param->num_components); + + for (i = 0; i < slice_param->num_components; i++) { + switch (slice_param->components[i].component_selector - pic_param->components[0].component_id + 1) { + case 1: + scan_component_mask |= (1 << 0); + break; + case 2: + scan_component_mask |= (1 << 1); + break; + case 3: + scan_component_mask |= (1 << 2); + break; + default: + assert(0); + break; + } + } + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_JPEG_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, + slice_param->slice_data_size); + OUT_BCS_BATCH(batch, + slice_param->slice_data_offset); + OUT_BCS_BATCH(batch, + slice_param->slice_horizontal_position << 16 | + slice_param->slice_vertical_position << 0); + OUT_BCS_BATCH(batch, + ((slice_param->num_components != 1) << 30) | /* interleaved */ + (scan_component_mask << 27) | /* scan components */ + (0 << 26) | /* disable interrupt allowed */ + (slice_param->num_mcus << 0)); /* MCU count */ + OUT_BCS_BATCH(batch, + (slice_param->restart_interval << 0)); /* RestartInterval */ + ADVANCE_BCS_BATCH(batch); +} + +/* Workaround for JPEG decoding on Ivybridge */ +#ifdef JPEG_WA + +static struct { + int width; + int height; + unsigned char data[32]; + int data_size; + int data_bit_offset; + int qp; +} gen7_jpeg_wa_clip = { + 16, + 16, + { + 0x65, 0xb8, 0x40, 0x32, 0x13, 0xfd, 0x06, 0x6c, + 0xfc, 0x0a, 0x50, 0x71, 0x5c, 0x00 + }, + 14, + 40, + 28, +}; + +static void +gen8_jpeg_wa_init(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAStatus status; + struct object_surface *obj_surface; + + if (gen7_mfd_context->jpeg_wa_surface_id != VA_INVALID_SURFACE) + i965_DestroySurfaces(ctx, + &gen7_mfd_context->jpeg_wa_surface_id, + 1); + + status = i965_CreateSurfaces(ctx, + gen7_jpeg_wa_clip.width, + gen7_jpeg_wa_clip.height, + VA_RT_FORMAT_YUV420, + 1, + &gen7_mfd_context->jpeg_wa_surface_id); + assert(status == VA_STATUS_SUCCESS); + + obj_surface = SURFACE(gen7_mfd_context->jpeg_wa_surface_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + gen7_mfd_context->jpeg_wa_surface_object = obj_surface; + + if (!gen7_mfd_context->jpeg_wa_slice_data_bo) { + gen7_mfd_context->jpeg_wa_slice_data_bo = dri_bo_alloc(i965->intel.bufmgr, + "JPEG WA data", + 0x1000, + 0x1000); + dri_bo_subdata(gen7_mfd_context->jpeg_wa_slice_data_bo, + 0, + gen7_jpeg_wa_clip.data_size, + gen7_jpeg_wa_clip.data); + } +} + +static void +gen8_jpeg_wa_pipe_mode_select(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 5); + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Currently only support long format */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* disable Stream-Out */ + (0 << 9) | /* Post Deblocking Output */ + (1 << 8) | /* Pre Deblocking Output */ + (0 << 5) | /* not in stitch mode */ + (MFX_CODEC_DECODE << 4) | /* decoding mode */ + (MFX_FORMAT_AVC << 0)); + OUT_BCS_BATCH(batch, + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); /* pic status/error report id */ + OUT_BCS_BATCH(batch, 0); /* reserved */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_jpeg_wa_surface_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct object_surface *obj_surface = gen7_mfd_context->jpeg_wa_surface_object; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((obj_surface->orig_width - 1) << 18) | + ((obj_surface->orig_height - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* interleave chroma, set to 0 for JPEG */ + (0 << 22) | /* surface object control state, ignored */ + ((obj_surface->width - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, must be 1 */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for U(Cb), must be 0 */ + (obj_surface->y_cb_offset << 0)); /* Y offset for U(Cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* X offset for V(Cr), must be 0 */ + (0 << 0)); /* Y offset for V(Cr), must be 0 for video codec, non-zoro for JPEG */ + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_jpeg_wa_pipe_buf_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = gen7_mfd_context->jpeg_wa_surface_object; + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *intra_bo; + int i; + + intra_bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + 128 * 64, + 0x1000); + + BEGIN_BCS_BATCH(batch, 61); + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (61 - 2)); + OUT_BCS_RELOC(batch, + obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + + OUT_BCS_BATCH(batch, 0); /* post deblocking */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* uncompressed-video & stream out 7-12 */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); /* ignore for decoding */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 13-15 is for intra row store scratch */ + OUT_BCS_RELOC(batch, + intra_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 16-18 is for deblocking filter */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 19..50 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + OUT_BCS_BATCH(batch, 0); + + /* the DW52-54 is for mb status address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* the DW56-60 is for ILDB & second ILDB address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(intra_bo); +} + +static void +gen8_jpeg_wa_bsp_buf_base_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + dri_bo *bsd_mpc_bo, *mpr_bo; + + bsd_mpc_bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + 11520, /* 1.5 * 120 * 64 */ + 0x1000); + + mpr_bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + 7680, /* 1. 0 * 120 * 64 */ + 0x1000); + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + + OUT_BCS_RELOC(batch, + bsd_mpc_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_RELOC(batch, + mpr_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + dri_bo_unreference(bsd_mpc_bo); + dri_bo_unreference(mpr_bo); +} + +static void +gen8_jpeg_wa_avc_qm_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + +} + +static void +gen8_jpeg_wa_avc_img_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int img_struct = 0; + int mbaff_frame_flag = 0; + unsigned int width_in_mbs = 1, height_in_mbs = 1; + + BEGIN_BCS_BATCH(batch, 16); + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + OUT_BCS_BATCH(batch, + width_in_mbs * height_in_mbs); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + OUT_BCS_BATCH(batch, + (0 << 24) | + (0 << 16) | + (0 << 14) | + (0 << 13) | + (0 << 12) | /* differ from GEN6 */ + (0 << 10) | + (img_struct << 8)); + OUT_BCS_BATCH(batch, + (1 << 10) | /* 4:2:0 */ + (1 << 7) | /* CABAC */ + (0 << 6) | + (0 << 5) | + (0 << 4) | + (0 << 3) | + (1 << 2) | + (mbaff_frame_flag << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_jpeg_wa_avc_directmode_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 71); + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (71 - 2)); + + /* reference surfaces 0..15 */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); /* bottom */ + } + + OUT_BCS_BATCH(batch, 0); + + /* the current decoding frame/field */ + OUT_BCS_BATCH(batch, 0); /* top */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* POC List */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_jpeg_wa_ind_obj_base_addr_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + OUT_BCS_RELOC(batch, + gen7_mfd_context->jpeg_wa_slice_data_bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* ignore for VLD mode */ + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_jpeg_wa_avc_bsd_object(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + + /* the input bitsteam format on GEN7 differs from GEN6 */ + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, gen7_jpeg_wa_clip.data_size); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 31) | + (0 << 14) | + (0 << 12) | + (0 << 10) | + (0 << 8)); + OUT_BCS_BATCH(batch, + ((gen7_jpeg_wa_clip.data_bit_offset >> 3) << 16) | + (0 << 5) | + (0 << 4) | + (1 << 3) | /* LastSlice Flag */ + (gen7_jpeg_wa_clip.data_bit_offset & 0x7)); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_jpeg_wa_avc_slice_state(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int slice_hor_pos = 0, slice_ver_pos = 0, next_slice_hor_pos = 0, next_slice_ver_pos = 1; + int num_ref_idx_l0 = 0, num_ref_idx_l1 = 0; + int first_mb_in_slice = 0; + int slice_type = SLICE_TYPE_I; + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_idx_l1 << 24) | + (num_ref_idx_l0 << 16) | + (0 << 8) | + (0 << 0)); + OUT_BCS_BATCH(batch, + (0 << 29) | + (1 << 27) | /* disable Deblocking */ + (0 << 24) | + (gen7_jpeg_wa_clip.qp << 16) | + (0 << 8) | + (0 << 0)); + OUT_BCS_BATCH(batch, + (slice_ver_pos << 24) | + (slice_hor_pos << 16) | + (first_mb_in_slice << 0)); + OUT_BCS_BATCH(batch, + (next_slice_ver_pos << 16) | + (next_slice_hor_pos << 0)); + OUT_BCS_BATCH(batch, (1 << 19)); /* last slice flag */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_jpeg_wa(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + gen8_jpeg_wa_init(ctx, gen7_mfd_context); + intel_batchbuffer_emit_mi_flush(batch); + gen8_jpeg_wa_pipe_mode_select(ctx, gen7_mfd_context); + gen8_jpeg_wa_surface_state(ctx, gen7_mfd_context); + gen8_jpeg_wa_pipe_buf_addr_state(ctx, gen7_mfd_context); + gen8_jpeg_wa_bsp_buf_base_addr_state(ctx, gen7_mfd_context); + gen8_jpeg_wa_avc_qm_state(ctx, gen7_mfd_context); + gen8_jpeg_wa_avc_img_state(ctx, gen7_mfd_context); + gen8_jpeg_wa_ind_obj_base_addr_state(ctx, gen7_mfd_context); + + gen8_jpeg_wa_avc_directmode_state(ctx, gen7_mfd_context); + gen8_jpeg_wa_avc_slice_state(ctx, gen7_mfd_context); + gen8_jpeg_wa_avc_bsd_object(ctx, gen7_mfd_context); +} + +#endif + +void +gen8_mfd_jpeg_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferJPEGBaseline *pic_param; + VASliceParameterBufferJPEGBaseline *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j, max_selector = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferJPEGBaseline *)decode_state->pic_param->buffer; + + /* Currently only support Baseline DCT */ + gen8_mfd_jpeg_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); +#ifdef JPEG_WA + gen8_mfd_jpeg_wa(ctx, gen7_mfd_context); +#endif + intel_batchbuffer_emit_mi_flush(batch); + gen8_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen8_mfd_surface_state(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen8_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_JPEG, gen7_mfd_context); + gen8_mfd_jpeg_pic_state(ctx, decode_state, gen7_mfd_context); + gen8_mfd_jpeg_qm_state(ctx, decode_state, gen7_mfd_context); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen8_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_JPEG, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + int component; + + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + for (component = 0; component < slice_param->num_components; component++) { + if (max_selector < slice_param->components[component].dc_table_selector) + max_selector = slice_param->components[component].dc_table_selector; + + if (max_selector < slice_param->components[component].ac_table_selector) + max_selector = slice_param->components[component].ac_table_selector; + } + + slice_param++; + } + } + + assert(max_selector < 2); + gen8_mfd_jpeg_huff_table_state(ctx, decode_state, gen7_mfd_context, max_selector + 1); + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + gen8_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_JPEG, gen7_mfd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferJPEGBaseline *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen8_mfd_jpeg_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen7_mfd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static const int vp8_dc_qlookup[128] = +{ + 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 17, + 18, 19, 20, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 28, + 29, 30, 31, 32, 33, 34, 35, 36, 37, 37, 38, 39, 40, 41, 42, 43, + 44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, + 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, + 75, 76, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, + 91, 93, 95, 96, 98, 100, 101, 102, 104, 106, 108, 110, 112, 114, 116, 118, + 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 143, 145, 148, 151, 154, 157, +}; + +static const int vp8_ac_qlookup[128] = +{ + 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, + 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, + 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, + 52, 53, 54, 55, 56, 57, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, + 78, 80, 82, 84, 86, 88, 90, 92, 94, 96, 98, 100, 102, 104, 106, 108, + 110, 112, 114, 116, 119, 122, 125, 128, 131, 134, 137, 140, 143, 146, 149, 152, + 155, 158, 161, 164, 167, 170, 173, 177, 181, 185, 189, 193, 197, 201, 205, 209, + 213, 217, 221, 225, 229, 234, 239, 245, 249, 254, 259, 264, 269, 274, 279, 284, +}; + +static inline unsigned int vp8_clip_quantization_index(int index) +{ + if(index > 127) + return 127; + else if(index <0) + return 0; + + return index; +} + +static void +gen8_mfd_vp8_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct object_surface *obj_surface; + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + VAPictureParameterBufferVP8 *pic_param = (VAPictureParameterBufferVP8 *)decode_state->pic_param->buffer; + int width_in_mbs = (pic_param->frame_width + 15) / 16; + int height_in_mbs = (pic_param->frame_height + 15) / 16; + + assert(width_in_mbs > 0 && width_in_mbs <= 256); /* 4K */ + assert(height_in_mbs > 0 && height_in_mbs <= 256); + + intel_update_vp8_frame_store_index(ctx, + decode_state, + pic_param, + gen7_mfd_context->reference_surface); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.valid = !pic_param->pic_fields.bits.loop_filter_disable; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = obj_surface->bo; + dri_bo_reference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.valid = pic_param->pic_fields.bits.loop_filter_disable; + + intel_ensure_vp8_segmentation_buffer(ctx, + &gen7_mfd_context->segmentation_buffer, width_in_mbs, height_in_mbs); + + /* The same as AVC */ + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "intra row store", + width_in_mbs * 64, + 0x1000); + assert(bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->intra_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "deblocking filter row store", + width_in_mbs * 64 * 4, + 0x1000); + assert(bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "bsd mpc row store", + width_in_mbs * 64 * 2, + 0x1000); + assert(bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.valid = 1; + + dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "mpr row store", + width_in_mbs * 64 * 2, + 0x1000); + assert(bo); + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = bo; + gen7_mfd_context->mpr_row_store_scratch_buffer.valid = 1; + + gen7_mfd_context->bitplane_read_buffer.valid = 0; +} + +static void +gen8_mfd_vp8_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVP8 *pic_param = (VAPictureParameterBufferVP8 *)decode_state->pic_param->buffer; + VAIQMatrixBufferVP8 *iq_matrix = (VAIQMatrixBufferVP8 *)decode_state->iq_matrix->buffer; + VASliceParameterBufferVP8 *slice_param = (VASliceParameterBufferVP8 *)decode_state->slice_params[0]->buffer; /* one slice per frame */ + dri_bo *probs_bo = decode_state->probability_data->bo; + int i, j,log2num; + unsigned int quantization_value[4][6]; + + /* There is no safe way to error out if the segmentation buffer + could not be allocated. So, instead of aborting, simply decode + something even if the result may look totally inacurate */ + const unsigned int enable_segmentation = + pic_param->pic_fields.bits.segmentation_enabled && + gen7_mfd_context->segmentation_buffer.valid; + + log2num = (int)log2(slice_param->num_of_partitions - 1); + + BEGIN_BCS_BATCH(batch, 38); + OUT_BCS_BATCH(batch, MFX_VP8_PIC_STATE | (38 - 2)); + OUT_BCS_BATCH(batch, + (ALIGN(pic_param->frame_height, 16) / 16 - 1) << 16 | + (ALIGN(pic_param->frame_width, 16) / 16 - 1) << 0); + OUT_BCS_BATCH(batch, + log2num << 24 | + pic_param->pic_fields.bits.sharpness_level << 16 | + pic_param->pic_fields.bits.sign_bias_alternate << 13 | + pic_param->pic_fields.bits.sign_bias_golden << 12 | + pic_param->pic_fields.bits.loop_filter_adj_enable << 11 | + pic_param->pic_fields.bits.mb_no_coeff_skip << 10 | + (enable_segmentation && + pic_param->pic_fields.bits.update_mb_segmentation_map) << 9 | + pic_param->pic_fields.bits.segmentation_enabled << 8 | + (enable_segmentation && + !pic_param->pic_fields.bits.update_mb_segmentation_map) << 7 | + (enable_segmentation && + pic_param->pic_fields.bits.update_mb_segmentation_map) << 6 | + (pic_param->pic_fields.bits.key_frame == 0 ? 1 : 0) << 5 | /* 0 indicate an intra frame in VP8 stream/spec($9.1)*/ + pic_param->pic_fields.bits.filter_type << 4 | + (pic_param->pic_fields.bits.version == 3) << 1 | /* full pixel mode for version 3 */ + !!pic_param->pic_fields.bits.version << 0); /* version 0: 6 tap */ + + OUT_BCS_BATCH(batch, + pic_param->loop_filter_level[3] << 24 | + pic_param->loop_filter_level[2] << 16 | + pic_param->loop_filter_level[1] << 8 | + pic_param->loop_filter_level[0] << 0); + + /* Quantizer Value for 4 segmetns, DW4-DW15 */ + for (i = 0; i < 4; i++) { + quantization_value[i][0] = vp8_ac_qlookup[vp8_clip_quantization_index(iq_matrix->quantization_index[i][0])];/*yac*/ + quantization_value[i][1] = vp8_dc_qlookup[vp8_clip_quantization_index(iq_matrix->quantization_index[i][1])];/*ydc*/ + quantization_value[i][2] = 2*vp8_dc_qlookup[vp8_clip_quantization_index(iq_matrix->quantization_index[i][2])];/*y2dc*/ + /* 101581>>16 is equivalent to 155/100 */ + quantization_value[i][3] = (101581*vp8_ac_qlookup[vp8_clip_quantization_index(iq_matrix->quantization_index[i][3])]) >> 16;/*y2ac*/ + quantization_value[i][4] = vp8_dc_qlookup[vp8_clip_quantization_index(iq_matrix->quantization_index[i][4])];/*uvdc*/ + quantization_value[i][5] = vp8_ac_qlookup[vp8_clip_quantization_index(iq_matrix->quantization_index[i][5])];/*uvac*/ + + quantization_value[i][3] = (quantization_value[i][3] > 8 ? quantization_value[i][3] : 8); + quantization_value[i][4] = (quantization_value[i][4] < 132 ? quantization_value[i][4] : 132); + + OUT_BCS_BATCH(batch, + quantization_value[i][0] << 16 | /* Y1AC */ + quantization_value[i][1] << 0); /* Y1DC */ + OUT_BCS_BATCH(batch, + quantization_value[i][5] << 16 | /* UVAC */ + quantization_value[i][4] << 0); /* UVDC */ + OUT_BCS_BATCH(batch, + quantization_value[i][3] << 16 | /* Y2AC */ + quantization_value[i][2] << 0); /* Y2DC */ + } + + /* CoeffProbability table for non-key frame, DW16-DW18 */ + if (probs_bo) { + OUT_BCS_RELOC(batch, probs_bo, + 0, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, + pic_param->mb_segment_tree_probs[2] << 16 | + pic_param->mb_segment_tree_probs[1] << 8 | + pic_param->mb_segment_tree_probs[0] << 0); + + OUT_BCS_BATCH(batch, + pic_param->prob_skip_false << 24 | + pic_param->prob_intra << 16 | + pic_param->prob_last << 8 | + pic_param->prob_gf << 0); + + OUT_BCS_BATCH(batch, + pic_param->y_mode_probs[3] << 24 | + pic_param->y_mode_probs[2] << 16 | + pic_param->y_mode_probs[1] << 8 | + pic_param->y_mode_probs[0] << 0); + + OUT_BCS_BATCH(batch, + pic_param->uv_mode_probs[2] << 16 | + pic_param->uv_mode_probs[1] << 8 | + pic_param->uv_mode_probs[0] << 0); + + /* MV update value, DW23-DW32 */ + for (i = 0; i < 2; i++) { + for (j = 0; j < 20; j += 4) { + OUT_BCS_BATCH(batch, + (j + 3 == 19 ? 0 : pic_param->mv_probs[i][j + 3]) << 24 | + pic_param->mv_probs[i][j + 2] << 16 | + pic_param->mv_probs[i][j + 1] << 8 | + pic_param->mv_probs[i][j + 0] << 0); + } + } + + OUT_BCS_BATCH(batch, + (pic_param->loop_filter_deltas_ref_frame[3] & 0x7f) << 24 | + (pic_param->loop_filter_deltas_ref_frame[2] & 0x7f) << 16 | + (pic_param->loop_filter_deltas_ref_frame[1] & 0x7f) << 8 | + (pic_param->loop_filter_deltas_ref_frame[0] & 0x7f) << 0); + + OUT_BCS_BATCH(batch, + (pic_param->loop_filter_deltas_mode[3] & 0x7f) << 24 | + (pic_param->loop_filter_deltas_mode[2] & 0x7f) << 16 | + (pic_param->loop_filter_deltas_mode[1] & 0x7f) << 8 | + (pic_param->loop_filter_deltas_mode[0] & 0x7f) << 0); + + /* segmentation id stream base address, DW35-DW37 */ + if (enable_segmentation) { + OUT_BCS_RELOC(batch, gen7_mfd_context->segmentation_buffer.bo, + 0, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + ADVANCE_BCS_BATCH(batch); +} + +static void +gen8_mfd_vp8_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferVP8 *pic_param, + VASliceParameterBufferVP8 *slice_param, + dri_bo *slice_data_bo, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + int i, log2num; + unsigned int offset = slice_param->slice_data_offset + ((slice_param->macroblock_offset + 7 ) >> 3); + unsigned int used_bits = 8-pic_param->bool_coder_ctx.count; + unsigned int partition_size_0 = slice_param->partition_size[0]; + + assert(pic_param->bool_coder_ctx.count >= 0 && pic_param->bool_coder_ctx.count <= 7); + if (used_bits == 8) { + used_bits = 0; + offset += 1; + partition_size_0 -= 1; + } + + assert(slice_param->num_of_partitions >= 2); + assert(slice_param->num_of_partitions <= 9); + + log2num = (int)log2(slice_param->num_of_partitions - 1); + + BEGIN_BCS_BATCH(batch, 22); + OUT_BCS_BATCH(batch, MFD_VP8_BSD_OBJECT | (22 - 2)); + OUT_BCS_BATCH(batch, + used_bits << 16 | /* Partition 0 CPBAC Entropy Count */ + pic_param->bool_coder_ctx.range << 8 | /* Partition 0 Count Entropy Range */ + log2num << 4 | + (slice_param->macroblock_offset & 0x7)); + OUT_BCS_BATCH(batch, + pic_param->bool_coder_ctx.value << 24 | /* Partition 0 Count Entropy Value */ + 0); + + OUT_BCS_BATCH(batch, partition_size_0 + 1); + OUT_BCS_BATCH(batch, offset); + //partion sizes in bytes are present after the above first partition when there are more than one token partition + offset += (partition_size_0 + 3 * (slice_param->num_of_partitions - 2)); + for (i = 1; i < 9; i++) { + if (i < slice_param->num_of_partitions) { + OUT_BCS_BATCH(batch, slice_param->partition_size[i] + 1); + OUT_BCS_BATCH(batch, offset); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + offset += slice_param->partition_size[i]; + } + + OUT_BCS_BATCH(batch, 0); /* concealment method */ + + ADVANCE_BCS_BATCH(batch); +} + +void +gen8_mfd_vp8_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen7_mfd_context *gen7_mfd_context) +{ + struct intel_batchbuffer *batch = gen7_mfd_context->base.batch; + VAPictureParameterBufferVP8 *pic_param; + VASliceParameterBufferVP8 *slice_param; + dri_bo *slice_data_bo; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferVP8 *)decode_state->pic_param->buffer; + + /* one slice per frame */ + if (decode_state->num_slice_params != 1 || + (!decode_state->slice_params || + !decode_state->slice_params[0] || + (decode_state->slice_params[0]->num_elements != 1 || decode_state->slice_params[0]->buffer == NULL)) || + (!decode_state->slice_datas || + !decode_state->slice_datas[0] || + !decode_state->slice_datas[0]->bo) || + !decode_state->probability_data) { + WARN_ONCE("Wrong parameters for VP8 decoding\n"); + + return; + } + + slice_param = (VASliceParameterBufferVP8 *)decode_state->slice_params[0]->buffer; + slice_data_bo = decode_state->slice_datas[0]->bo; + + gen8_mfd_vp8_decode_init(ctx, decode_state, gen7_mfd_context); + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen8_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_VP8, gen7_mfd_context); + gen8_mfd_surface_state(ctx, decode_state, MFX_FORMAT_VP8, gen7_mfd_context); + gen8_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_VP8, gen7_mfd_context); + gen8_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_VP8, gen7_mfd_context); + gen8_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_VP8, gen7_mfd_context); + gen8_mfd_vp8_pic_state(ctx, decode_state, gen7_mfd_context); + gen8_mfd_vp8_bsd_object(ctx, pic_param, slice_param, slice_data_bo, gen7_mfd_context); + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static VAStatus +gen8_mfd_decode_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) + +{ + struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + struct decode_state *decode_state = &codec_state->decode; + VAStatus vaStatus; + + assert(gen7_mfd_context); + + vaStatus = intel_decoder_sanity_check_input(ctx, profile, decode_state); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + + gen7_mfd_context->wa_mpeg2_slice_vertical_position = -1; + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen8_mfd_mpeg2_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264StereoHigh: + case VAProfileH264MultiviewHigh: + gen8_mfd_avc_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + gen8_mfd_vc1_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileJPEGBaseline: + gen8_mfd_jpeg_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + case VAProfileVP8Version0_3: + gen8_mfd_vp8_decode_picture(ctx, decode_state, gen7_mfd_context); + break; + + default: + assert(0); + break; + } + + vaStatus = VA_STATUS_SUCCESS; + +out: + return vaStatus; +} + +static void +gen8_mfd_context_destroy(void *hw_context) +{ + VADriverContextP ctx; + struct gen7_mfd_context *gen7_mfd_context = (struct gen7_mfd_context *)hw_context; + + ctx = (VADriverContextP)(gen7_mfd_context->driver_context); + + dri_bo_unreference(gen7_mfd_context->post_deblocking_output.bo); + gen7_mfd_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->pre_deblocking_output.bo); + gen7_mfd_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->intra_row_store_scratch_buffer.bo); + gen7_mfd_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo); + gen7_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo); + gen7_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->mpr_row_store_scratch_buffer.bo); + gen7_mfd_context->mpr_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->bitplane_read_buffer.bo); + gen7_mfd_context->bitplane_read_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->segmentation_buffer.bo); + gen7_mfd_context->segmentation_buffer.bo = NULL; + + dri_bo_unreference(gen7_mfd_context->jpeg_wa_slice_data_bo); + + if (gen7_mfd_context->jpeg_wa_surface_id != VA_INVALID_SURFACE) { + i965_DestroySurfaces(ctx, + &gen7_mfd_context->jpeg_wa_surface_id, + 1); + gen7_mfd_context->jpeg_wa_surface_object = NULL; + } + + intel_batchbuffer_free(gen7_mfd_context->base.batch); + free(gen7_mfd_context); +} + +static void gen8_mfd_mpeg2_context_init(VADriverContextP ctx, + struct gen7_mfd_context *gen7_mfd_context) +{ + gen7_mfd_context->iq_matrix.mpeg2.load_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_non_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_chroma_intra_quantiser_matrix = -1; + gen7_mfd_context->iq_matrix.mpeg2.load_chroma_non_intra_quantiser_matrix = -1; +} + +struct hw_context * +gen8_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct gen7_mfd_context *gen7_mfd_context = calloc(1, sizeof(struct gen7_mfd_context)); + int i; + + if (!gen7_mfd_context) + return NULL; + + gen7_mfd_context->base.destroy = gen8_mfd_context_destroy; + gen7_mfd_context->base.run = gen8_mfd_decode_picture; + gen7_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); + + for (i = 0; i < ARRAY_ELEMS(gen7_mfd_context->reference_surface); i++) { + gen7_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID; + gen7_mfd_context->reference_surface[i].frame_store_id = -1; + } + + gen7_mfd_context->jpeg_wa_surface_id = VA_INVALID_SURFACE; + gen7_mfd_context->segmentation_buffer.valid = 0; + + switch (obj_config->profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + gen8_mfd_mpeg2_context_init(ctx, gen7_mfd_context); + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264StereoHigh: + case VAProfileH264MultiviewHigh: + gen8_mfd_avc_context_init(ctx, gen7_mfd_context); + break; + default: + break; + } + + gen7_mfd_context->driver_context = ctx; + return (struct hw_context *)gen7_mfd_context; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen8_post_processing.c intel-vaapi-driver-1.7.1/src/gen8_post_processing.c --- intel-vaapi-driver-1.0.15/src/gen8_post_processing.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen8_post_processing.c 2016-06-21 01:35:12.000000000 +0000 @@ -0,0 +1,1605 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * Zhao Yakui + * + */ + +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_post_processing.h" +#include "i965_render.h" +#include "i965_yuv_coefs.h" +#include "intel_media.h" + +#include "gen75_picture_process.h" + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 + +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_PP_SURFACES) + +#define GPU_ASM_BLOCK_WIDTH 16 +#define GPU_ASM_BLOCK_HEIGHT 8 +#define GPU_ASM_X_OFFSET_ALIGNMENT 4 + +#define VA_STATUS_SUCCESS_1 0xFFFFFFFE + +VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); + +VAStatus gen8_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); + +/* TODO: Modify the shader and then compile it again. + * Currently it is derived from Haswell*/ +static const uint32_t pp_null_gen8[][4] = { +}; + +static const uint32_t pp_nv12_load_save_nv12_gen8[][4] = { +#include "shaders/post_processing/gen8/pl2_to_pl2.g8b" +}; + +static const uint32_t pp_nv12_load_save_pl3_gen8[][4] = { +#include "shaders/post_processing/gen8/pl2_to_pl3.g8b" +}; + +static const uint32_t pp_pl3_load_save_nv12_gen8[][4] = { +#include "shaders/post_processing/gen8/pl3_to_pl2.g8b" +}; + +static const uint32_t pp_pl3_load_save_pl3_gen8[][4] = { +#include "shaders/post_processing/gen8/pl3_to_pl3.g8b" +}; + +static const uint32_t pp_nv12_scaling_gen8[][4] = { +#include "shaders/post_processing/gen8/pl2_to_pl2.g8b" +}; + +static const uint32_t pp_nv12_avs_gen8[][4] = { +#include "shaders/post_processing/gen8/pl2_to_pl2.g8b" +}; + +static const uint32_t pp_nv12_dndi_gen8[][4] = { +// #include "shaders/post_processing/gen7/dndi.g75b" +}; + +static const uint32_t pp_nv12_dn_gen8[][4] = { +// #include "shaders/post_processing/gen7/nv12_dn_nv12.g75b" +}; +static const uint32_t pp_nv12_load_save_pa_gen8[][4] = { +#include "shaders/post_processing/gen8/pl2_to_pa.g8b" +}; +static const uint32_t pp_pl3_load_save_pa_gen8[][4] = { +#include "shaders/post_processing/gen8/pl3_to_pa.g8b" +}; +static const uint32_t pp_pa_load_save_nv12_gen8[][4] = { +#include "shaders/post_processing/gen8/pa_to_pl2.g8b" +}; +static const uint32_t pp_pa_load_save_pl3_gen8[][4] = { +#include "shaders/post_processing/gen8/pa_to_pl3.g8b" +}; +static const uint32_t pp_pa_load_save_pa_gen8[][4] = { +#include "shaders/post_processing/gen8/pa_to_pa.g8b" +}; +static const uint32_t pp_rgbx_load_save_nv12_gen8[][4] = { +#include "shaders/post_processing/gen8/rgbx_to_nv12.g8b" +}; +static const uint32_t pp_nv12_load_save_rgbx_gen8[][4] = { +#include "shaders/post_processing/gen8/pl2_to_rgbx.g8b" +}; + +static struct pp_module pp_modules_gen8[] = { + { + { + "NULL module (for testing)", + PP_NULL, + pp_null_gen8, + sizeof(pp_null_gen8), + NULL, + }, + + pp_null_initialize, + }, + + { + { + "NV12_NV12", + PP_NV12_LOAD_SAVE_N12, + pp_nv12_load_save_nv12_gen8, + sizeof(pp_nv12_load_save_nv12_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12_PL3", + PP_NV12_LOAD_SAVE_PL3, + pp_nv12_load_save_pl3_gen8, + sizeof(pp_nv12_load_save_pl3_gen8), + NULL, + }, + gen8_pp_plx_avs_initialize, + }, + + { + { + "PL3_NV12", + PP_PL3_LOAD_SAVE_N12, + pp_pl3_load_save_nv12_gen8, + sizeof(pp_pl3_load_save_nv12_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PL3_PL3", + PP_PL3_LOAD_SAVE_PL3, + pp_pl3_load_save_pl3_gen8, + sizeof(pp_pl3_load_save_pl3_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12 Scaling module", + PP_NV12_SCALING, + pp_nv12_scaling_gen8, + sizeof(pp_nv12_scaling_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12 AVS module", + PP_NV12_AVS, + pp_nv12_avs_gen8, + sizeof(pp_nv12_avs_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12 DNDI module", + PP_NV12_DNDI, + pp_nv12_dndi_gen8, + sizeof(pp_nv12_dndi_gen8), + NULL, + }, + + pp_null_initialize, + }, + + { + { + "NV12 DN module", + PP_NV12_DN, + pp_nv12_dn_gen8, + sizeof(pp_nv12_dn_gen8), + NULL, + }, + + pp_null_initialize, + }, + { + { + "NV12_PA module", + PP_NV12_LOAD_SAVE_PA, + pp_nv12_load_save_pa_gen8, + sizeof(pp_nv12_load_save_pa_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PL3_PA module", + PP_PL3_LOAD_SAVE_PA, + pp_pl3_load_save_pa_gen8, + sizeof(pp_pl3_load_save_pa_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PA_NV12 module", + PP_PA_LOAD_SAVE_NV12, + pp_pa_load_save_nv12_gen8, + sizeof(pp_pa_load_save_nv12_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PA_PL3 module", + PP_PA_LOAD_SAVE_PL3, + pp_pa_load_save_pl3_gen8, + sizeof(pp_pa_load_save_pl3_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PA_PA module", + PP_PA_LOAD_SAVE_PA, + pp_pa_load_save_pa_gen8, + sizeof(pp_pa_load_save_pa_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "RGBX_NV12 module", + PP_RGBX_LOAD_SAVE_NV12, + pp_rgbx_load_save_nv12_gen8, + sizeof(pp_rgbx_load_save_nv12_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12_RGBX module", + PP_NV12_LOAD_SAVE_RGBX, + pp_nv12_load_save_rgbx_gen8, + sizeof(pp_nv12_load_save_rgbx_gen8), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, +}; + +static int +pp_get_surface_fourcc(VADriverContextP ctx, const struct i965_surface *surface) +{ + int fourcc; + + if (surface->type == I965_SURFACE_TYPE_IMAGE) { + struct object_image *obj_image = (struct object_image *)surface->base; + fourcc = obj_image->image.format.fourcc; + } else { + struct object_surface *obj_surface = (struct object_surface *)surface->base; + fourcc = obj_surface->fourcc; + } + + return fourcc; +} + +static void +gen8_pp_set_surface_tiling(struct gen8_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen8_pp_set_surface2_tiling(struct gen8_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + + +static void +gen8_pp_set_surface_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + dri_bo *surf_bo, unsigned long surf_bo_offset, + int width, int height, int pitch, int format, + int index, int is_target) +{ + struct gen8_surface_state *ss; + dri_bo *ss_bo; + unsigned int tiling; + unsigned int swizzle; + + dri_bo_get_tiling(surf_bo, &tiling, &swizzle); + ss_bo = pp_context->surface_state_binding_table.bo; + assert(ss_bo); + + dri_bo_map(ss_bo, True); + assert(ss_bo->virtual); + ss = (struct gen8_surface_state *)((char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss, 0, sizeof(*ss)); + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = format; + ss->ss8.base_addr = surf_bo->offset + surf_bo_offset; + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + ss->ss3.pitch = pitch - 1; + + /* Always set 1(align 4 mode) per B-spec */ + ss->ss0.vertical_alignment = 1; + ss->ss0.horizontal_alignment = 1; + + gen8_pp_set_surface_tiling(ss, tiling); + gen8_render_set_surface_scs(ss); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_RENDER, is_target ? I915_GEM_DOMAIN_RENDER : 0, + surf_bo_offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen8_surface_state, ss8), + surf_bo); + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); +} + + +static void +gen8_pp_set_surface2_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + dri_bo *surf_bo, unsigned long surf_bo_offset, + int width, int height, int wpitch, + int xoffset, int yoffset, + int format, int interleave_chroma, + int index) +{ + struct gen8_surface_state2 *ss2; + dri_bo *ss2_bo; + unsigned int tiling; + unsigned int swizzle; + + dri_bo_get_tiling(surf_bo, &tiling, &swizzle); + ss2_bo = pp_context->surface_state_binding_table.bo; + assert(ss2_bo); + + dri_bo_map(ss2_bo, True); + assert(ss2_bo->virtual); + ss2 = (struct gen8_surface_state2 *)((char *)ss2_bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss2, 0, sizeof(*ss2)); + ss2->ss6.base_addr = surf_bo->offset + surf_bo_offset; + ss2->ss1.cbcr_pixel_offset_v_direction = 0; + ss2->ss1.width = width - 1; + ss2->ss1.height = height - 1; + ss2->ss2.pitch = wpitch - 1; + ss2->ss2.interleave_chroma = interleave_chroma; + ss2->ss2.surface_format = format; + ss2->ss3.x_offset_for_cb = xoffset; + ss2->ss3.y_offset_for_cb = yoffset; + gen8_pp_set_surface2_tiling(ss2, tiling); + dri_bo_emit_reloc(ss2_bo, + I915_GEM_DOMAIN_RENDER, 0, + surf_bo_offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen8_surface_state2, ss6), + surf_bo); + ((unsigned int *)((char *)ss2_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss2_bo); +} + +static void +gen8_pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *surface, + int base_index, int is_target, + const VARectangle *rect, + int *width, int *height, int *pitch, int *offset) +{ + struct object_surface *obj_surface; + struct object_image *obj_image; + dri_bo *bo; + int fourcc = pp_get_surface_fourcc(ctx, surface); + const i965_fourcc_info *fourcc_info = get_fourcc_info(fourcc); + + if (fourcc_info == NULL) + return; + + if (surface->type == I965_SURFACE_TYPE_SURFACE) { + obj_surface = (struct object_surface *)surface->base; + bo = obj_surface->bo; + width[0] = MIN(rect->x + rect->width, obj_surface->orig_width); + height[0] = MIN(rect->y + rect->height, obj_surface->orig_height); + pitch[0] = obj_surface->width; + offset[0] = 0; + + if (fourcc_info->num_planes == 1 && is_target) + width[0] = width[0] * (fourcc_info->bpp[0] / 8); /* surface format is R8 */ + + width[1] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_surface->cb_cr_width); + height[1] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_surface->cb_cr_height); + pitch[1] = obj_surface->cb_cr_pitch; + offset[1] = obj_surface->y_cb_offset * obj_surface->width; + + width[2] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_surface->cb_cr_width); + height[2] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_surface->cb_cr_height); + pitch[2] = obj_surface->cb_cr_pitch; + offset[2] = obj_surface->y_cr_offset * obj_surface->width; + } else { + int U = 0, V = 0; + + /* FIXME: add support for ARGB/ABGR image */ + obj_image = (struct object_image *)surface->base; + bo = obj_image->bo; + width[0] = MIN(rect->x + rect->width, obj_image->image.width); + height[0] = MIN(rect->y + rect->height, obj_image->image.height); + pitch[0] = obj_image->image.pitches[0]; + offset[0] = obj_image->image.offsets[0]; + + if (fourcc_info->num_planes == 1) { + if (is_target) + width[0] = width[0] * (fourcc_info->bpp[0] / 8); /* surface format is R8 */ + } else if (fourcc_info->num_planes == 2) { + U = 1, V = 1; + } else { + assert(fourcc_info->num_components == 3); + + U = fourcc_info->components[1].plane; + V = fourcc_info->components[2].plane; + assert((U == 1 && V == 2) || + (U == 2 && V == 1)); + } + + /* Always set width/height although they aren't used for fourcc_info->num_planes == 1 */ + width[1] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_image->image.width / fourcc_info->hfactor); + height[1] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_image->image.height / fourcc_info->vfactor); + pitch[1] = obj_image->image.pitches[U]; + offset[1] = obj_image->image.offsets[U]; + + width[2] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_image->image.width / fourcc_info->hfactor); + height[2] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_image->image.height / fourcc_info->vfactor); + pitch[2] = obj_image->image.pitches[V]; + offset[2] = obj_image->image.offsets[V]; + } + + if (is_target) { + gen8_pp_set_surface_state(ctx, pp_context, + bo, 0, + ALIGN(width[0], 4) / 4, height[0], pitch[0], + I965_SURFACEFORMAT_R8_UINT, + base_index, 1); + + if (fourcc_info->num_planes == 2) { + gen8_pp_set_surface_state(ctx, pp_context, + bo, offset[1], + ALIGN(width[1], 2) / 2, height[1], pitch[1], + I965_SURFACEFORMAT_R8G8_SINT, + base_index + 1, 1); + } else if (fourcc_info->num_planes == 3) { + gen8_pp_set_surface_state(ctx, pp_context, + bo, offset[1], + ALIGN(width[1], 4) / 4, height[1], pitch[1], + I965_SURFACEFORMAT_R8_SINT, + base_index + 1, 1); + gen8_pp_set_surface_state(ctx, pp_context, + bo, offset[2], + ALIGN(width[2], 4) / 4, height[2], pitch[2], + I965_SURFACEFORMAT_R8_SINT, + base_index + 2, 1); + } + + if (fourcc_info->format == I965_COLOR_RGB) { + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + /* the format is MSB: X-B-G-R */ + pp_static_parameter->grf2.save_avs_rgb_swap = 0; + if ((fourcc == VA_FOURCC_BGRA) || + (fourcc == VA_FOURCC_BGRX)) { + /* It is stored as MSB: X-R-G-B */ + pp_static_parameter->grf2.save_avs_rgb_swap = 1; + } + } + } else { + int format0 = SURFACE_FORMAT_Y8_UNORM; + + switch (fourcc) { + case VA_FOURCC_YUY2: + format0 = SURFACE_FORMAT_YCRCB_NORMAL; + break; + + case VA_FOURCC_UYVY: + format0 = SURFACE_FORMAT_YCRCB_SWAPY; + break; + + default: + break; + } + + if (fourcc_info->format == I965_COLOR_RGB) { + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + /* Only R8G8B8A8_UNORM is supported for BGRX or RGBX */ + format0 = SURFACE_FORMAT_R8G8B8A8_UNORM; + pp_static_parameter->grf2.src_avs_rgb_swap = 0; + if ((fourcc == VA_FOURCC_BGRA) || + (fourcc == VA_FOURCC_BGRX)) { + pp_static_parameter->grf2.src_avs_rgb_swap = 1; + } + } + + gen8_pp_set_surface2_state(ctx, pp_context, + bo, offset[0], + width[0], height[0], pitch[0], + 0, 0, + format0, 0, + base_index); + + if (fourcc_info->num_planes == 2) { + gen8_pp_set_surface2_state(ctx, pp_context, + bo, offset[1], + width[1], height[1], pitch[1], + 0, 0, + SURFACE_FORMAT_R8B8_UNORM, 0, + base_index + 1); + } else if (fourcc_info->num_planes == 3) { + gen8_pp_set_surface2_state(ctx, pp_context, + bo, offset[1], + width[1], height[1], pitch[1], + 0, 0, + SURFACE_FORMAT_R8_UNORM, 0, + base_index + 1); + gen8_pp_set_surface2_state(ctx, pp_context, + bo, offset[2], + width[2], height[2], pitch[2], + 0, 0, + SURFACE_FORMAT_R8_UNORM, 0, + base_index + 2); + } + } +} + +static int +pp_null_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_null_y_steps(void *private_context) +{ + return 1; +} + +static int +pp_null_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + return 0; +} + +VAStatus +pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + /* private function & data */ + pp_context->pp_x_steps = pp_null_x_steps; + pp_context->pp_y_steps = pp_null_y_steps; + pp_context->private_context = NULL; + pp_context->pp_set_block_parameter = pp_null_set_block_parameter; + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static void calculate_boundary_block_mask(struct i965_post_processing_context *pp_context, const VARectangle *dst_rect) +{ + int i, dst_width_adjust; + /* x offset of dest surface must be dword aligned. + * so we have to extend dst surface on left edge, and mask out pixels not interested + */ + if (dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT) { + pp_context->block_horizontal_mask_left = 0; + for (i=dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; iblock_horizontal_mask_left |= 1<block_horizontal_mask_left = 0xffff; + } + + dst_width_adjust = dst_rect->width + dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + if (dst_width_adjust%GPU_ASM_BLOCK_WIDTH){ + pp_context->block_horizontal_mask_right = (1 << (dst_width_adjust%GPU_ASM_BLOCK_WIDTH)) - 1; + } + else { + pp_context->block_horizontal_mask_right = 0xffff; + } + + if (dst_rect->height%GPU_ASM_BLOCK_HEIGHT){ + pp_context->block_vertical_mask_bottom = (1 << (dst_rect->height%GPU_ASM_BLOCK_HEIGHT)) - 1; + } + else { + pp_context->block_vertical_mask_bottom = 0xff; + } + +} + +static int +gen7_pp_avs_x_steps(void *private_context) +{ + struct pp_avs_context *pp_avs_context = private_context; + + return pp_avs_context->dest_w / 16; +} + +static int +gen7_pp_avs_y_steps(void *private_context) +{ + struct pp_avs_context *pp_avs_context = private_context; + + return pp_avs_context->dest_h / 16; +} + +static int +gen7_pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)pp_context->private_context; + struct gen7_pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + + pp_inline_parameter->grf9.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x; + pp_inline_parameter->grf9.destination_block_vertical_origin = y * 16 + pp_avs_context->dest_y; + pp_inline_parameter->grf9.constant_0 = 0xffffffff; + pp_inline_parameter->grf9.sampler_load_main_video_x_scaling_step = pp_avs_context->horiz_range / pp_avs_context->src_w; + + return 0; +} + +static void gen7_update_src_surface_uv_offset(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *surface) +{ + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + int fourcc = pp_get_surface_fourcc(ctx, surface); + + if (fourcc == VA_FOURCC_YUY2) { + pp_static_parameter->grf2.di_destination_packed_y_component_offset = 0; + pp_static_parameter->grf2.di_destination_packed_u_component_offset = 1; + pp_static_parameter->grf2.di_destination_packed_v_component_offset = 3; + } else if (fourcc == VA_FOURCC_UYVY) { + pp_static_parameter->grf2.di_destination_packed_y_component_offset = 1; + pp_static_parameter->grf2.di_destination_packed_u_component_offset = 0; + pp_static_parameter->grf2.di_destination_packed_v_component_offset = 2; + } +} + +static const AVSConfig gen8_avs_config = { + .coeff_frac_bits = 6, + .coeff_epsilon = 1.0f / (1U << 6), + .num_phases = 16, + .num_luma_coeffs = 8, + .num_chroma_coeffs = 4, + + .coeff_range = { + .lower_bound = { + .y_k_h = { -2, -2, -2, -2, -2, -2, -2, -2 }, + .y_k_v = { -2, -2, -2, -2, -2, -2, -2, -2 }, + .uv_k_h = { -1, -2, -2, -1 }, + .uv_k_v = { -1, -2, -2, -1 }, + }, + .upper_bound = { + .y_k_h = { 2, 2, 2, 2, 2, 2, 2, 2 }, + .y_k_v = { 2, 2, 2, 2, 2, 2, 2, 2 }, + .uv_k_h = { 1, 2, 2, 1 }, + .uv_k_v = { 1, 2, 2, 1 }, + }, + }, +}; + +static int +gen8_pp_get_8tap_filter_mode(VADriverContextP ctx, + const struct i965_surface *surface) +{ + int fourcc = pp_get_surface_fourcc(ctx, surface); + + if (fourcc == VA_FOURCC_YUY2 || + fourcc == VA_FOURCC_UYVY) + return 1; + else + return 3; +} + +VAStatus +gen8_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ +/* TODO: Add the sampler_8x8 state */ + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->pp_avs_context; + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + struct gen8_sampler_8x8_avs *sampler_8x8; + int i; + int width[3], height[3], pitch[3], offset[3]; + int src_width, src_height; + unsigned char *cc_ptr; + AVSState * const avs = &pp_avs_context->state; + float sx, sy; + const float * yuv_to_rgb_coefs; + size_t yuv_to_rgb_coefs_size; + + memset(pp_static_parameter, 0, sizeof(struct gen7_pp_static_parameter)); + + /* source surface */ + gen8_pp_set_media_rw_message_surface(ctx, pp_context, src_surface, 0, 0, + src_rect, + width, height, pitch, offset); + src_height = height[0]; + src_width = width[0]; + + /* destination surface */ + gen8_pp_set_media_rw_message_surface(ctx, pp_context, dst_surface, 24, 1, + dst_rect, + width, height, pitch, offset); + + /* sampler 8x8 state */ + dri_bo_map(pp_context->dynamic_state.bo, True); + assert(pp_context->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) pp_context->dynamic_state.bo->virtual + + pp_context->sampler_offset; + /* Currently only one gen8 sampler_8x8 is initialized */ + sampler_8x8 = (struct gen8_sampler_8x8_avs *) cc_ptr; + memset(sampler_8x8, 0, sizeof(*sampler_8x8)); + + sampler_8x8->dw0.gain_factor = 44; + sampler_8x8->dw0.weak_edge_threshold = 1; + sampler_8x8->dw0.strong_edge_threshold = 8; + /* Use the value like that on Ivy instead of default + * sampler_8x8->dw0.r3x_coefficient = 5; + */ + sampler_8x8->dw0.r3x_coefficient = 27; + sampler_8x8->dw0.r3c_coefficient = 5; + + sampler_8x8->dw2.global_noise_estimation = 255; + sampler_8x8->dw2.non_edge_weight = 1; + sampler_8x8->dw2.regular_weight = 2; + sampler_8x8->dw2.strong_edge_weight = 7; + /* Use the value like that on Ivy instead of default + * sampler_8x8->dw2.r5x_coefficient = 7; + * sampler_8x8->dw2.r5cx_coefficient = 7; + * sampler_8x8->dw2.r5c_coefficient = 7; + */ + sampler_8x8->dw2.r5x_coefficient = 9; + sampler_8x8->dw2.r5cx_coefficient = 8; + sampler_8x8->dw2.r5c_coefficient = 3; + + sampler_8x8->dw3.sin_alpha = 101; /* sin_alpha = 0 */ + sampler_8x8->dw3.cos_alpha = 79; /* cos_alpha = 0 */ + sampler_8x8->dw3.sat_max = 0x1f; + sampler_8x8->dw3.hue_max = 14; + /* The 8tap filter will determine whether the adaptive Filter is + * applied for all channels(dw153). + * If the 8tap filter is disabled, the adaptive filter should be disabled. + * Only when 8tap filter is enabled, it can be enabled or not. + */ + sampler_8x8->dw3.enable_8tap_filter = gen8_pp_get_8tap_filter_mode(ctx, src_surface); + sampler_8x8->dw3.ief4_smooth_enable = 0; + + sampler_8x8->dw4.s3u = 0; + sampler_8x8->dw4.diamond_margin = 4; + sampler_8x8->dw4.vy_std_enable = 0; + sampler_8x8->dw4.umid = 110; + sampler_8x8->dw4.vmid = 154; + + sampler_8x8->dw5.diamond_dv = 0; + sampler_8x8->dw5.diamond_th = 35; + sampler_8x8->dw5.diamond_alpha = 100; /* diamond_alpha = 0 */ + sampler_8x8->dw5.hs_margin = 3; + sampler_8x8->dw5.diamond_du = 2; + + sampler_8x8->dw6.y_point1 = 46; + sampler_8x8->dw6.y_point2 = 47; + sampler_8x8->dw6.y_point3 = 254; + sampler_8x8->dw6.y_point4 = 255; + + sampler_8x8->dw7.inv_margin_vyl = 3300; /* inv_margin_vyl = 0 */ + + sampler_8x8->dw8.inv_margin_vyu = 1600; /* inv_margin_vyu = 0 */ + sampler_8x8->dw8.p0l = 46; + sampler_8x8->dw8.p1l = 216; + + sampler_8x8->dw9.p2l = 236; + sampler_8x8->dw9.p3l = 236; + sampler_8x8->dw9.b0l = 133; + sampler_8x8->dw9.b1l = 130; + + sampler_8x8->dw10.b2l = 130; + sampler_8x8->dw10.b3l = 130; + /* s0l = -5 / 256. s2.8 */ + sampler_8x8->dw10.s0l = 1029; /* s0l = 0 */ + sampler_8x8->dw10.y_slope2 = 31; /* y_slop2 = 0 */ + + sampler_8x8->dw11.s1l = 0; + sampler_8x8->dw11.s2l = 0; + + sampler_8x8->dw12.s3l = 0; + sampler_8x8->dw12.p0u = 46; + sampler_8x8->dw12.p1u = 66; + sampler_8x8->dw12.y_slope1 = 31; /* y_slope1 = 0 */ + + sampler_8x8->dw13.p2u = 130; + sampler_8x8->dw13.p3u = 236; + sampler_8x8->dw13.b0u = 143; + sampler_8x8->dw13.b1u = 163; + + sampler_8x8->dw14.b2u = 200; + sampler_8x8->dw14.b3u = 140; + sampler_8x8->dw14.s0u = 256; /* s0u = 0 */ + + sampler_8x8->dw15.s1u = 113; /* s1u = 0 */ + sampler_8x8->dw15.s2u = 1203; /* s2u = 0 */ + + sx = (float)dst_rect->width / src_rect->width; + sy = (float)dst_rect->height / src_rect->height; + avs_update_coefficients(avs, sx, sy, pp_context->filter_flags); + + assert(avs->config->num_phases >= 16); + for (i = 0; i <= 16; i++) { + struct gen8_sampler_8x8_avs_coefficients * const sampler_8x8_state = + &sampler_8x8->coefficients[i]; + const AVSCoeffs * const coeffs = &avs->coeffs[i]; + + sampler_8x8_state->dw0.table_0x_filter_c0 = + intel_format_convert(coeffs->y_k_h[0], 1, 6, 1); + sampler_8x8_state->dw0.table_0y_filter_c0 = + intel_format_convert(coeffs->y_k_v[0], 1, 6, 1); + sampler_8x8_state->dw0.table_0x_filter_c1 = + intel_format_convert(coeffs->y_k_h[1], 1, 6, 1); + sampler_8x8_state->dw0.table_0y_filter_c1 = + intel_format_convert(coeffs->y_k_v[1], 1, 6, 1); + + sampler_8x8_state->dw1.table_0x_filter_c2 = + intel_format_convert(coeffs->y_k_h[2], 1, 6, 1); + sampler_8x8_state->dw1.table_0y_filter_c2 = + intel_format_convert(coeffs->y_k_v[2], 1, 6, 1); + sampler_8x8_state->dw1.table_0x_filter_c3 = + intel_format_convert(coeffs->y_k_h[3], 1, 6, 1); + sampler_8x8_state->dw1.table_0y_filter_c3 = + intel_format_convert(coeffs->y_k_v[3], 1, 6, 1); + + sampler_8x8_state->dw2.table_0x_filter_c4 = + intel_format_convert(coeffs->y_k_h[4], 1, 6, 1); + sampler_8x8_state->dw2.table_0y_filter_c4 = + intel_format_convert(coeffs->y_k_v[4], 1, 6, 1); + sampler_8x8_state->dw2.table_0x_filter_c5 = + intel_format_convert(coeffs->y_k_h[5], 1, 6, 1); + sampler_8x8_state->dw2.table_0y_filter_c5 = + intel_format_convert(coeffs->y_k_v[5], 1, 6, 1); + + sampler_8x8_state->dw3.table_0x_filter_c6 = + intel_format_convert(coeffs->y_k_h[6], 1, 6, 1); + sampler_8x8_state->dw3.table_0y_filter_c6 = + intel_format_convert(coeffs->y_k_v[6], 1, 6, 1); + sampler_8x8_state->dw3.table_0x_filter_c7 = + intel_format_convert(coeffs->y_k_h[7], 1, 6, 1); + sampler_8x8_state->dw3.table_0y_filter_c7 = + intel_format_convert(coeffs->y_k_v[7], 1, 6, 1); + + sampler_8x8_state->dw4.pad0 = 0; + sampler_8x8_state->dw5.pad0 = 0; + sampler_8x8_state->dw4.table_1x_filter_c2 = + intel_format_convert(coeffs->uv_k_h[0], 1, 6, 1); + sampler_8x8_state->dw4.table_1x_filter_c3 = + intel_format_convert(coeffs->uv_k_h[1], 1, 6, 1); + sampler_8x8_state->dw5.table_1x_filter_c4 = + intel_format_convert(coeffs->uv_k_h[2], 1, 6, 1); + sampler_8x8_state->dw5.table_1x_filter_c5 = + intel_format_convert(coeffs->uv_k_h[3], 1, 6, 1); + + sampler_8x8_state->dw6.pad0 = + sampler_8x8_state->dw7.pad0 = + sampler_8x8_state->dw6.table_1y_filter_c2 = + intel_format_convert(coeffs->uv_k_v[0], 1, 6, 1); + sampler_8x8_state->dw6.table_1y_filter_c3 = + intel_format_convert(coeffs->uv_k_v[1], 1, 6, 1); + sampler_8x8_state->dw7.table_1y_filter_c4 = + intel_format_convert(coeffs->uv_k_v[2], 1, 6, 1); + sampler_8x8_state->dw7.table_1y_filter_c5 = + intel_format_convert(coeffs->uv_k_v[3], 1, 6, 1); + } + + sampler_8x8->dw152.default_sharpness_level = + -avs_is_needed(pp_context->filter_flags); + sampler_8x8->dw153.adaptive_filter_for_all_channel = 1; + sampler_8x8->dw153.bypass_y_adaptive_filtering = 1; + sampler_8x8->dw153.bypass_x_adaptive_filtering = 1; + + for ( ; i <= avs->config->num_phases; i++) { + struct gen8_sampler_8x8_avs_coefficients * const sampler_8x8_state = + &sampler_8x8->coefficients1[i - 17]; + const AVSCoeffs * const coeffs = &avs->coeffs[i]; + + sampler_8x8_state->dw0.table_0x_filter_c0 = + intel_format_convert(coeffs->y_k_h[0], 1, 6, 1); + sampler_8x8_state->dw0.table_0y_filter_c0 = + intel_format_convert(coeffs->y_k_v[0], 1, 6, 1); + sampler_8x8_state->dw0.table_0x_filter_c1 = + intel_format_convert(coeffs->y_k_h[1], 1, 6, 1); + sampler_8x8_state->dw0.table_0y_filter_c1 = + intel_format_convert(coeffs->y_k_v[1], 1, 6, 1); + + sampler_8x8_state->dw1.table_0x_filter_c2 = + intel_format_convert(coeffs->y_k_h[2], 1, 6, 1); + sampler_8x8_state->dw1.table_0y_filter_c2 = + intel_format_convert(coeffs->y_k_v[2], 1, 6, 1); + sampler_8x8_state->dw1.table_0x_filter_c3 = + intel_format_convert(coeffs->y_k_h[3], 1, 6, 1); + sampler_8x8_state->dw1.table_0y_filter_c3 = + intel_format_convert(coeffs->y_k_v[3], 1, 6, 1); + + sampler_8x8_state->dw2.table_0x_filter_c4 = + intel_format_convert(coeffs->y_k_h[4], 1, 6, 1); + sampler_8x8_state->dw2.table_0y_filter_c4 = + intel_format_convert(coeffs->y_k_v[4], 1, 6, 1); + sampler_8x8_state->dw2.table_0x_filter_c5 = + intel_format_convert(coeffs->y_k_h[5], 1, 6, 1); + sampler_8x8_state->dw2.table_0y_filter_c5 = + intel_format_convert(coeffs->y_k_v[5], 1, 6, 1); + + sampler_8x8_state->dw3.table_0x_filter_c6 = + intel_format_convert(coeffs->y_k_h[6], 1, 6, 1); + sampler_8x8_state->dw3.table_0y_filter_c6 = + intel_format_convert(coeffs->y_k_v[6], 1, 6, 1); + sampler_8x8_state->dw3.table_0x_filter_c7 = + intel_format_convert(coeffs->y_k_h[7], 1, 6, 1); + sampler_8x8_state->dw3.table_0y_filter_c7 = + intel_format_convert(coeffs->y_k_v[7], 1, 6, 1); + + sampler_8x8_state->dw4.pad0 = 0; + sampler_8x8_state->dw5.pad0 = 0; + sampler_8x8_state->dw4.table_1x_filter_c2 = + intel_format_convert(coeffs->uv_k_h[0], 1, 6, 1); + sampler_8x8_state->dw4.table_1x_filter_c3 = + intel_format_convert(coeffs->uv_k_h[1], 1, 6, 1); + sampler_8x8_state->dw5.table_1x_filter_c4 = + intel_format_convert(coeffs->uv_k_h[2], 1, 6, 1); + sampler_8x8_state->dw5.table_1x_filter_c5 = + intel_format_convert(coeffs->uv_k_h[3], 1, 6, 1); + + sampler_8x8_state->dw6.pad0 = + sampler_8x8_state->dw7.pad0 = + sampler_8x8_state->dw6.table_1y_filter_c2 = + intel_format_convert(coeffs->uv_k_v[0], 1, 6, 1); + sampler_8x8_state->dw6.table_1y_filter_c3 = + intel_format_convert(coeffs->uv_k_v[1], 1, 6, 1); + sampler_8x8_state->dw7.table_1y_filter_c4 = + intel_format_convert(coeffs->uv_k_v[2], 1, 6, 1); + sampler_8x8_state->dw7.table_1y_filter_c5 = + intel_format_convert(coeffs->uv_k_v[3], 1, 6, 1); + } + + dri_bo_unmap(pp_context->dynamic_state.bo); + + + /* private function & data */ + pp_context->pp_x_steps = gen7_pp_avs_x_steps; + pp_context->pp_y_steps = gen7_pp_avs_y_steps; + pp_context->private_context = &pp_context->pp_avs_context; + pp_context->pp_set_block_parameter = gen7_pp_avs_set_block_parameter; + + int dst_left_edge_extend = dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + pp_avs_context->dest_x = dst_rect->x - dst_left_edge_extend; + pp_avs_context->dest_y = dst_rect->y; + pp_avs_context->dest_w = ALIGN(dst_rect->width + dst_left_edge_extend, 16); + pp_avs_context->dest_h = ALIGN(dst_rect->height, 16); + pp_avs_context->src_w = src_rect->width; + pp_avs_context->src_h = src_rect->height; + pp_avs_context->horiz_range = (float)src_rect->width / src_width; + + int dw = (pp_avs_context->src_w - 1) / 16 + 1; + dw = MAX(dw, dst_rect->width + dst_left_edge_extend); + + pp_static_parameter->grf1.pointer_to_inline_parameter = 7; + pp_static_parameter->grf2.avs_wa_enable = 0; /* It is not required on GEN8+ */ + pp_static_parameter->grf2.alpha = 255; + + pp_static_parameter->grf3.sampler_load_horizontal_scaling_step_ratio = (float) pp_avs_context->src_w / dw; + pp_static_parameter->grf4.sampler_load_vertical_scaling_step = (float) src_rect->height / src_height / dst_rect->height; + pp_static_parameter->grf5.sampler_load_vertical_frame_origin = (float) src_rect->y / src_height - + (float) pp_avs_context->dest_y * pp_static_parameter->grf4.sampler_load_vertical_scaling_step; + pp_static_parameter->grf6.sampler_load_horizontal_frame_origin = (float) src_rect->x / src_width - + (float) pp_avs_context->dest_x * pp_avs_context->horiz_range / dw; + + gen7_update_src_surface_uv_offset(ctx, pp_context, dst_surface); + + yuv_to_rgb_coefs = i915_color_standard_to_coefs (i915_filter_to_color_standard (src_surface->flags & + VA_SRC_COLOR_MASK), + &yuv_to_rgb_coefs_size); + memcpy(&pp_static_parameter->grf7, yuv_to_rgb_coefs, yuv_to_rgb_coefs_size); + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +VAStatus +gen8_pp_initialize( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void * filter_param +) +{ + VAStatus va_status; + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + int bo_size; + unsigned int end_offset; + struct pp_module *pp_module; + int static_param_size, inline_param_size; + + dri_bo_unreference(pp_context->surface_state_binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_PP_SURFACES, + 4096); + assert(bo); + pp_context->surface_state_binding_table.bo = bo; + + pp_context->idrt.num_interface_descriptors = 0; + + pp_context->sampler_size = 4 * 4096; + + bo_size = 4096 + pp_context->curbe_size + pp_context->sampler_size + + pp_context->idrt_size; + + dri_bo_unreference(pp_context->dynamic_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "dynamic_state", + bo_size, + 4096); + + assert(bo); + pp_context->dynamic_state.bo = bo; + pp_context->dynamic_state.bo_size = bo_size; + + end_offset = 0; + pp_context->dynamic_state.end_offset = 0; + + /* Constant buffer offset */ + pp_context->curbe_offset = ALIGN(end_offset, 64); + end_offset = pp_context->curbe_offset + pp_context->curbe_size; + + /* Interface descriptor offset */ + pp_context->idrt_offset = ALIGN(end_offset, 64); + end_offset = pp_context->idrt_offset + pp_context->idrt_size; + + /* Sampler state offset */ + pp_context->sampler_offset = ALIGN(end_offset, 64); + end_offset = pp_context->sampler_offset + pp_context->sampler_size; + + /* update the end offset of dynamic_state */ + pp_context->dynamic_state.end_offset = ALIGN(end_offset, 64); + + static_param_size = sizeof(struct gen7_pp_static_parameter); + inline_param_size = sizeof(struct gen7_pp_inline_parameter); + + memset(pp_context->pp_static_parameter, 0, static_param_size); + memset(pp_context->pp_inline_parameter, 0, inline_param_size); + + assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); + pp_context->current_pp = pp_index; + pp_module = &pp_context->pp_modules[pp_index]; + + if (pp_module->initialize) + va_status = pp_module->initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + filter_param); + else + va_status = VA_STATUS_ERROR_UNIMPLEMENTED; + + calculate_boundary_block_mask(pp_context, dst_rect); + + return va_status; +} + +static void +gen8_pp_interface_descriptor_table(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct gen8_interface_descriptor_data *desc; + dri_bo *bo; + int pp_index = pp_context->current_pp; + unsigned char *cc_ptr; + + bo = pp_context->dynamic_state.bo; + + dri_bo_map(bo, 1); + assert(bo->virtual); + cc_ptr = (unsigned char *)bo->virtual + pp_context->idrt_offset; + + desc = (struct gen8_interface_descriptor_data *) cc_ptr + + pp_context->idrt.num_interface_descriptors; + + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = + pp_context->pp_modules[pp_index].kernel.kernel_offset >> 6; /* reloc */ + desc->desc2.single_program_flow = 1; + desc->desc2.floating_point_mode = FLOATING_POINT_IEEE_754; + desc->desc3.sampler_count = 0; /* 1 - 4 samplers used */ + desc->desc3.sampler_state_pointer = pp_context->sampler_offset >> 5; + desc->desc4.binding_table_entry_count = 0; + desc->desc4.binding_table_pointer = (BINDING_TABLE_OFFSET >> 5); + desc->desc5.constant_urb_entry_read_offset = 0; + + desc->desc5.constant_urb_entry_read_length = 8; /* grf 1-8 */ + + dri_bo_unmap(bo); + pp_context->idrt.num_interface_descriptors++; +} + + +static void +gen8_pp_upload_constants(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + unsigned char *constant_buffer; + int param_size; + + assert(sizeof(struct gen7_pp_static_parameter) == 256); + + param_size = sizeof(struct gen7_pp_static_parameter); + + dri_bo_map(pp_context->dynamic_state.bo, 1); + assert(pp_context->dynamic_state.bo->virtual); + constant_buffer = (unsigned char *) pp_context->dynamic_state.bo->virtual + + pp_context->curbe_offset; + + memcpy(constant_buffer, pp_context->pp_static_parameter, param_size); + dri_bo_unmap(pp_context->dynamic_state.bo); + return; +} + +void +gen8_pp_states_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + gen8_pp_interface_descriptor_table(ctx, pp_context); + gen8_pp_upload_constants(ctx, pp_context); +} + +static void +gen6_pp_pipeline_select(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void +gen8_pp_state_base_address(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 16); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (16 - 2)); + /* DW1 Generate state address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /* DW4-5. Surface state address */ + OUT_RELOC64(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + + /* DW6-7. Dynamic state address */ + OUT_RELOC64(batch, pp_context->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, + 0, 0 | BASE_ADDRESS_MODIFY); + + /* DW8. Indirect object address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + + /* DW10-11. Instruction base address */ + OUT_RELOC64(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); + + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); +} + +void +gen8_pp_vfe_state(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | (9 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (pp_context->vfe_gpu_state.max_num_threads - 1) << 16 | + pp_context->vfe_gpu_state.num_urb_entries << 8); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (pp_context->vfe_gpu_state.urb_entry_size) << 16 | + /* URB Entry Allocation Size, in 256 bits unit */ + (pp_context->vfe_gpu_state.curbe_allocation_size)); + /* CURBE Allocation Size, in 256 bits unit */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +void +gen8_interface_descriptor_load(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 6); + + OUT_BATCH(batch, CMD_MEDIA_STATE_FLUSH); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, CMD_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + pp_context->idrt.num_interface_descriptors * sizeof(struct gen8_interface_descriptor_data)); + OUT_BATCH(batch, pp_context->idrt_offset); + ADVANCE_BATCH(batch); +} + +void +gen8_pp_curbe_load(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + int param_size = 64; + + param_size = sizeof(struct gen7_pp_static_parameter); + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + param_size); + OUT_BATCH(batch, pp_context->curbe_offset); + ADVANCE_BATCH(batch); +} + +void +gen8_pp_object_walker(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = pp_context->batch; + int x, x_steps, y, y_steps; + int param_size, command_length_in_dws, extra_cmd_in_dws; + dri_bo *command_buffer; + unsigned int *command_ptr; + + param_size = sizeof(struct gen7_pp_inline_parameter); + + x_steps = pp_context->pp_x_steps(pp_context->private_context); + y_steps = pp_context->pp_y_steps(pp_context->private_context); + command_length_in_dws = 6 + (param_size >> 2); + extra_cmd_in_dws = 2; + command_buffer = dri_bo_alloc(i965->intel.bufmgr, + "command objects buffer", + (command_length_in_dws + extra_cmd_in_dws) * 4 * x_steps * y_steps + 64, + 4096); + + dri_bo_map(command_buffer, 1); + command_ptr = command_buffer->virtual; + + for (y = 0; y < y_steps; y++) { + for (x = 0; x < x_steps; x++) { + if (!pp_context->pp_set_block_parameter(pp_context, x, y)) { + + *command_ptr++ = (CMD_MEDIA_OBJECT | (command_length_in_dws - 2)); + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + memcpy(command_ptr, pp_context->pp_inline_parameter, param_size); + command_ptr += (param_size >> 2); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + } + } + } + + if ((command_length_in_dws + extra_cmd_in_dws) * x_steps * y_steps % 2 == 0) + *command_ptr++ = 0; + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(command_buffer); + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, command_buffer, + I915_GEM_DOMAIN_COMMAND, 0, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + dri_bo_unreference(command_buffer); + + /* Have to execute the batch buffer here becuase MI_BATCH_BUFFER_END + * will cause control to pass back to ring buffer + */ + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + intel_batchbuffer_start_atomic(batch, 0x1000); +} + +static void +gen8_pp_pipeline_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen6_pp_pipeline_select(ctx, pp_context); + gen8_pp_state_base_address(ctx, pp_context); + gen8_pp_vfe_state(ctx, pp_context); + gen8_pp_curbe_load(ctx, pp_context); + gen8_interface_descriptor_load(ctx, pp_context); + gen8_pp_vfe_state(ctx, pp_context); + gen8_pp_object_walker(ctx, pp_context); + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus +gen8_post_processing( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void * filter_param +) +{ + VAStatus va_status; + + va_status = gen8_pp_initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + pp_index, + filter_param); + + if (va_status == VA_STATUS_SUCCESS) { + gen8_pp_states_setup(ctx, pp_context); + gen8_pp_pipeline_setup(ctx, pp_context); + } + + return va_status; +} + +static void +gen8_post_processing_context_finalize(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + if(pp_context->vebox_proc_ctx){ + gen75_vebox_context_destroy(ctx,pp_context->vebox_proc_ctx); + pp_context->vebox_proc_ctx = NULL; + } + + dri_bo_unreference(pp_context->surface_state_binding_table.bo); + pp_context->surface_state_binding_table.bo = NULL; + + dri_bo_unreference(pp_context->pp_dn_context.stmm_bo); + pp_context->pp_dn_context.stmm_bo = NULL; + + if (pp_context->instruction_state.bo) { + dri_bo_unreference(pp_context->instruction_state.bo); + pp_context->instruction_state.bo = NULL; + } + + if (pp_context->indirect_state.bo) { + dri_bo_unreference(pp_context->indirect_state.bo); + pp_context->indirect_state.bo = NULL; + } + + if (pp_context->dynamic_state.bo) { + dri_bo_unreference(pp_context->dynamic_state.bo); + pp_context->dynamic_state.bo = NULL; + } + + free(pp_context->pp_static_parameter); + free(pp_context->pp_inline_parameter); + pp_context->pp_static_parameter = NULL; + pp_context->pp_inline_parameter = NULL; +} + +#define VPP_CURBE_ALLOCATION_SIZE 32 + +void +gen8_post_processing_context_common_init(VADriverContextP ctx, + void *data, + struct pp_module *pp_modules, + int num_pp_modules, + struct intel_batchbuffer *batch) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i, kernel_size; + unsigned int kernel_offset, end_offset; + unsigned char *kernel_ptr; + struct pp_module *pp_module; + struct i965_post_processing_context *pp_context = data; + + pp_context->vfe_gpu_state.max_num_threads = 60; + pp_context->vfe_gpu_state.num_urb_entries = 59; + pp_context->vfe_gpu_state.gpgpu_mode = 0; + pp_context->vfe_gpu_state.urb_entry_size = 16 - 1; + pp_context->vfe_gpu_state.curbe_allocation_size = VPP_CURBE_ALLOCATION_SIZE; + + pp_context->intel_post_processing = gen8_post_processing; + pp_context->finalize = gen8_post_processing_context_finalize; + + assert(ARRAY_ELEMS(pp_context->pp_modules) == num_pp_modules); + + memcpy(pp_context->pp_modules, pp_modules, sizeof(pp_context->pp_modules)); + + kernel_size = 4096 ; + + for (i = 0; i < NUM_PP_MODULES; i++) { + pp_module = &pp_context->pp_modules[i]; + + if (pp_module->kernel.bin && pp_module->kernel.size) { + kernel_size += pp_module->kernel.size; + } + } + + pp_context->instruction_state.bo = dri_bo_alloc(i965->intel.bufmgr, + "kernel shader", + kernel_size, + 0x1000); + if (pp_context->instruction_state.bo == NULL) { + WARN_ONCE("failure to allocate the buffer space for kernel shader in VPP\n"); + return; + } + + assert(pp_context->instruction_state.bo); + + + pp_context->instruction_state.bo_size = kernel_size; + pp_context->instruction_state.end_offset = 0; + end_offset = 0; + + dri_bo_map(pp_context->instruction_state.bo, 1); + kernel_ptr = (unsigned char *)(pp_context->instruction_state.bo->virtual); + + for (i = 0; i < NUM_PP_MODULES; i++) { + pp_module = &pp_context->pp_modules[i]; + + kernel_offset = ALIGN(end_offset, 64); + pp_module->kernel.kernel_offset = kernel_offset; + + if (pp_module->kernel.bin && pp_module->kernel.size) { + + memcpy(kernel_ptr + kernel_offset, pp_module->kernel.bin, pp_module->kernel.size); + end_offset = kernel_offset + pp_module->kernel.size; + } + } + + pp_context->instruction_state.end_offset = ALIGN(end_offset, 64); + + dri_bo_unmap(pp_context->instruction_state.bo); + + /* static & inline parameters */ + pp_context->pp_static_parameter = calloc(sizeof(struct gen7_pp_static_parameter), 1); + pp_context->pp_inline_parameter = calloc(sizeof(struct gen7_pp_inline_parameter), 1); + + pp_context->batch = batch; + + pp_context->idrt_size = 5 * sizeof(struct gen8_interface_descriptor_data); + pp_context->curbe_size = 256; + +} + +void +gen8_post_processing_context_init(VADriverContextP ctx, + void *data, + struct intel_batchbuffer *batch) +{ + struct i965_post_processing_context *pp_context = data; + + gen8_post_processing_context_common_init(ctx, data, pp_modules_gen8, ARRAY_ELEMS(pp_modules_gen8), batch); + avs_init_state(&pp_context->pp_avs_context.state, &gen8_avs_config); +} diff -Nru intel-vaapi-driver-1.0.15/src/gen8_post_processing.h intel-vaapi-driver-1.7.1/src/gen8_post_processing.h --- intel-vaapi-driver-1.0.15/src/gen8_post_processing.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen8_post_processing.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,88 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#ifndef _GEN8_POST_PROCESSING_H_ +#define _GEN8_POST_PROCESSING_H_ + +VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); + +VAStatus +gen8_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); + +VAStatus +gen8_pp_nv12_blending_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); + +void +gen8_pp_vfe_state(VADriverContextP ctx, + struct i965_post_processing_context *pp_context); + +void +gen8_interface_descriptor_load(VADriverContextP ctx, + struct i965_post_processing_context *pp_context); + +void +gen8_pp_curbe_load(VADriverContextP ctx, + struct i965_post_processing_context *pp_context); + +void +gen8_pp_object_walker(VADriverContextP ctx, + struct i965_post_processing_context *pp_context); + +void +gen8_pp_states_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context); + +VAStatus +gen8_pp_initialize(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void *filter_param); + +void +gen8_post_processing_context_common_init(VADriverContextP ctx, + void *data, + struct pp_module *pp_modules, + int num_pp_modules, + struct intel_batchbuffer *batch); +#endif diff -Nru intel-vaapi-driver-1.0.15/src/gen8_render.c intel-vaapi-driver-1.7.1/src/gen8_render.c --- intel-vaapi-driver-1.0.15/src/gen8_render.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen8_render.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,1819 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * Keith Packard + * Xiang Haihao + * Zhao Yakui + * + */ + +/* + * Most of rendering codes are ported from xf86-video-intel/src/i965_video.c + */ + +#include +#include +#include +#include +#include + +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_structs.h" +#include "i965_yuv_coefs.h" + +#include "i965_render.h" + +#define SF_KERNEL_NUM_GRF 16 +#define SF_MAX_THREADS 1 + +#define PS_KERNEL_NUM_GRF 48 +#define PS_MAX_THREADS 32 + +/* Programs for Gen8 */ +static const uint32_t sf_kernel_static_gen8[][4] ={ + +}; +static const uint32_t ps_kernel_static_gen8[][4] = { +#include "shaders/render/exa_wm_src_affine.g8b" +#include "shaders/render/exa_wm_src_sample_planar.g8b" +#include "shaders/render/exa_wm_yuv_color_balance.g8b" +#include "shaders/render/exa_wm_yuv_rgb.g8b" +#include "shaders/render/exa_wm_write.g8b" +}; + +static const uint32_t ps_subpic_kernel_static_gen8[][4] = { +#include "shaders/render/exa_wm_src_affine.g8b" +#include "shaders/render/exa_wm_src_sample_argb.g8b" +#include "shaders/render/exa_wm_write.g8b" +}; + + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 + +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_RENDER_SURFACES) + +enum { + SF_KERNEL = 0, + PS_KERNEL, + PS_SUBPIC_KERNEL +}; + +static struct i965_kernel render_kernels_gen8[] = { + { + "SF", + SF_KERNEL, + sf_kernel_static_gen8, + sizeof(sf_kernel_static_gen8), + NULL + }, + { + "PS", + PS_KERNEL, + ps_kernel_static_gen8, + sizeof(ps_kernel_static_gen8), + NULL + }, + + { + "PS_SUBPIC", + PS_SUBPIC_KERNEL, + ps_subpic_kernel_static_gen8, + sizeof(ps_subpic_kernel_static_gen8), + NULL + } +}; + +#define URB_VS_ENTRIES 8 +#define URB_VS_ENTRY_SIZE 1 + +#define URB_GS_ENTRIES 0 +#define URB_GS_ENTRY_SIZE 0 + +#define URB_CLIP_ENTRIES 0 +#define URB_CLIP_ENTRY_SIZE 0 + +#define URB_SF_ENTRIES 1 +#define URB_SF_ENTRY_SIZE 2 + +#define URB_CS_ENTRIES 4 +#define URB_CS_ENTRY_SIZE 4 + +static void +gen8_render_set_surface_tiling(struct gen8_surface_state *ss, uint32_t tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +/* Set "Shader Channel Select" for GEN8+ */ +void +gen8_render_set_surface_scs(struct gen8_surface_state *ss) +{ + ss->ss7.shader_chanel_select_r = HSW_SCS_RED; + ss->ss7.shader_chanel_select_g = HSW_SCS_GREEN; + ss->ss7.shader_chanel_select_b = HSW_SCS_BLUE; + ss->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; +} + +static void +gen8_render_set_surface_state( + struct gen8_surface_state *ss, + dri_bo *bo, + unsigned long offset, + int width, + int height, + int pitch, + int format, + unsigned int flags +) +{ + unsigned int tiling; + unsigned int swizzle; + + memset(ss, 0, sizeof(*ss)); + + switch (flags & (VA_TOP_FIELD|VA_BOTTOM_FIELD)) { + case VA_BOTTOM_FIELD: + ss->ss0.vert_line_stride_ofs = 1; + /* fall-through */ + case VA_TOP_FIELD: + ss->ss0.vert_line_stride = 1; + height /= 2; + break; + } + + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = format; + + ss->ss8.base_addr = bo->offset + offset; + + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + + ss->ss3.pitch = pitch - 1; + + /* Always set 1(align 4 mode) per B-spec */ + ss->ss0.vertical_alignment = 1; + ss->ss0.horizontal_alignment = 1; + + dri_bo_get_tiling(bo, &tiling, &swizzle); + gen8_render_set_surface_tiling(ss, tiling); +} + +static void +gen8_render_src_surface_state( + VADriverContextP ctx, + int index, + dri_bo *region, + unsigned long offset, + int w, + int h, + int pitch, + int format, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + void *ss; + dri_bo *ss_bo = render_state->wm.surface_state_binding_table_bo; + + assert(index < MAX_RENDER_SURFACES); + + dri_bo_map(ss_bo, 1); + assert(ss_bo->virtual); + ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); + + gen8_render_set_surface_state(ss, + region, offset, + w, h, + pitch, format, flags); + gen8_render_set_surface_scs(ss); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_SAMPLER, 0, + offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen8_surface_state, ss8), + region); + + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); + render_state->wm.sampler_count++; +} + +static void +gen8_render_src_surfaces_state( + VADriverContextP ctx, + struct object_surface *obj_surface, + unsigned int flags +) +{ + int region_pitch; + int rw, rh; + dri_bo *region; + + region_pitch = obj_surface->width; + rw = obj_surface->orig_width; + rh = obj_surface->orig_height; + region = obj_surface->bo; + + gen8_render_src_surface_state(ctx, 1, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags); /* Y */ + gen8_render_src_surface_state(ctx, 2, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags); + + if (obj_surface->fourcc == VA_FOURCC_Y800) /* single plane for grayscale */ + return; + + if (obj_surface->fourcc == VA_FOURCC_NV12) { + gen8_render_src_surface_state(ctx, 3, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8G8_UNORM, flags); /* UV */ + gen8_render_src_surface_state(ctx, 4, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8G8_UNORM, flags); + } else { + gen8_render_src_surface_state(ctx, 3, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); /* U */ + gen8_render_src_surface_state(ctx, 4, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); + gen8_render_src_surface_state(ctx, 5, region, + region_pitch * obj_surface->y_cr_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); /* V */ + gen8_render_src_surface_state(ctx, 6, region, + region_pitch * obj_surface->y_cr_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); + } +} + +static void +gen8_subpic_render_src_surfaces_state(VADriverContextP ctx, + struct object_surface *obj_surface) +{ + dri_bo *subpic_region; + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + struct object_image *obj_image = obj_subpic->obj_image; + + assert(obj_surface); + assert(obj_surface->bo); + subpic_region = obj_image->bo; + /*subpicture surface*/ + gen8_render_src_surface_state(ctx, 1, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format, 0); + gen8_render_src_surface_state(ctx, 2, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format, 0); +} + +static void +gen8_render_dest_surface_state(VADriverContextP ctx, int index) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + void *ss; + dri_bo *ss_bo = render_state->wm.surface_state_binding_table_bo; + int format; + assert(index < MAX_RENDER_SURFACES); + + if (dest_region->cpp == 2) { + format = I965_SURFACEFORMAT_B5G6R5_UNORM; + } else { + format = I965_SURFACEFORMAT_B8G8R8A8_UNORM; + } + + dri_bo_map(ss_bo, 1); + assert(ss_bo->virtual); + ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); + + gen8_render_set_surface_state(ss, + dest_region->bo, 0, + dest_region->width, dest_region->height, + dest_region->pitch, format, 0); + gen8_render_set_surface_scs(ss); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen8_surface_state, ss8), + dest_region->bo); + + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); +} + +static void +i965_fill_vertex_buffer( + VADriverContextP ctx, + float tex_coords[4], /* [(u1,v1);(u2,v2)] */ + float vid_coords[4] /* [(x1,y1);(x2,y2)] */ +) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + float vb[12]; + + enum { X1, Y1, X2, Y2 }; + + static const unsigned int g_rotation_indices[][6] = { + [VA_ROTATION_NONE] = { X2, Y2, X1, Y2, X1, Y1 }, + [VA_ROTATION_90] = { X2, Y1, X2, Y2, X1, Y2 }, + [VA_ROTATION_180] = { X1, Y1, X2, Y1, X2, Y2 }, + [VA_ROTATION_270] = { X1, Y2, X1, Y1, X2, Y1 }, + }; + + const unsigned int * const rotation_indices = + g_rotation_indices[i965->rotation_attrib->value]; + + vb[0] = tex_coords[rotation_indices[0]]; /* bottom-right corner */ + vb[1] = tex_coords[rotation_indices[1]]; + vb[2] = vid_coords[X2]; + vb[3] = vid_coords[Y2]; + + vb[4] = tex_coords[rotation_indices[2]]; /* bottom-left corner */ + vb[5] = tex_coords[rotation_indices[3]]; + vb[6] = vid_coords[X1]; + vb[7] = vid_coords[Y2]; + + vb[8] = tex_coords[rotation_indices[4]]; /* top-left corner */ + vb[9] = tex_coords[rotation_indices[5]]; + vb[10] = vid_coords[X1]; + vb[11] = vid_coords[Y1]; + + dri_bo_subdata(i965->render_state.vb.vertex_buffer, 0, sizeof(vb), vb); +} + +static void +i965_subpic_render_upload_vertex(VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *output_rect) +{ + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + float tex_coords[4], vid_coords[4]; + VARectangle dst_rect; + + if (obj_subpic->flags & VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD) + dst_rect = obj_subpic->dst_rect; + else { + const float sx = (float)output_rect->width / obj_surface->orig_width; + const float sy = (float)output_rect->height / obj_surface->orig_height; + dst_rect.x = output_rect->x + sx * obj_subpic->dst_rect.x; + dst_rect.y = output_rect->y + sy * obj_subpic->dst_rect.y; + dst_rect.width = sx * obj_subpic->dst_rect.width; + dst_rect.height = sy * obj_subpic->dst_rect.height; + } + + tex_coords[0] = (float)obj_subpic->src_rect.x / obj_subpic->width; + tex_coords[1] = (float)obj_subpic->src_rect.y / obj_subpic->height; + tex_coords[2] = (float)(obj_subpic->src_rect.x + obj_subpic->src_rect.width) / obj_subpic->width; + tex_coords[3] = (float)(obj_subpic->src_rect.y + obj_subpic->src_rect.height) / obj_subpic->height; + + vid_coords[0] = dst_rect.x; + vid_coords[1] = dst_rect.y; + vid_coords[2] = (float)(dst_rect.x + dst_rect.width); + vid_coords[3] = (float)(dst_rect.y + dst_rect.height); + + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); +} + +static void +i965_render_upload_vertex( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + float tex_coords[4], vid_coords[4]; + int width, height; + + width = obj_surface->orig_width; + height = obj_surface->orig_height; + + tex_coords[0] = (float)src_rect->x / width; + tex_coords[1] = (float)src_rect->y / height; + tex_coords[2] = (float)(src_rect->x + src_rect->width) / width; + tex_coords[3] = (float)(src_rect->y + src_rect->height) / height; + + vid_coords[0] = dest_region->x + dst_rect->x; + vid_coords[1] = dest_region->y + dst_rect->y; + vid_coords[2] = vid_coords[0] + dst_rect->width; + vid_coords[3] = vid_coords[1] + dst_rect->height; + + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); +} + +static void +i965_render_drawing_rectangle(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_DRAWING_RECTANGLE | 2); + OUT_BATCH(batch, 0x00000000); + OUT_BATCH(batch, (dest_region->width - 1) | (dest_region->height - 1) << 16); + OUT_BATCH(batch, 0x00000000); + ADVANCE_BATCH(batch); +} + +static void +i965_render_upload_image_palette( + VADriverContextP ctx, + struct object_image *obj_image, + unsigned int alpha +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int i; + + assert(obj_image); + + if (!obj_image) + return; + + if (obj_image->image.num_palette_entries == 0) + return; + + BEGIN_BATCH(batch, 1 + obj_image->image.num_palette_entries); + OUT_BATCH(batch, CMD_SAMPLER_PALETTE_LOAD | (obj_image->image.num_palette_entries - 1)); + /*fill palette*/ + //int32_t out[16]; //0-23:color 23-31:alpha + for (i = 0; i < obj_image->image.num_palette_entries; i++) + OUT_BATCH(batch, (alpha << 24) | obj_image->palette[i]); + ADVANCE_BATCH(batch); +} + +static void +gen8_clear_dest_region(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + unsigned int blt_cmd, br13; + int pitch; + + blt_cmd = GEN8_XY_COLOR_BLT_CMD; + br13 = 0xf0 << 16; + pitch = dest_region->pitch; + + if (dest_region->cpp == 4) { + br13 |= BR13_8888; + blt_cmd |= (XY_COLOR_BLT_WRITE_RGB | XY_COLOR_BLT_WRITE_ALPHA); + } else { + assert(dest_region->cpp == 2); + br13 |= BR13_565; + } + + if (dest_region->tiling != I915_TILING_NONE) { + blt_cmd |= XY_COLOR_BLT_DST_TILED; + pitch /= 4; + } + + br13 |= pitch; + + intel_batchbuffer_start_atomic_blt(batch, 24); + BEGIN_BLT_BATCH(batch, 7); + + OUT_BATCH(batch, blt_cmd); + OUT_BATCH(batch, br13); + OUT_BATCH(batch, (dest_region->y << 16) | (dest_region->x)); + OUT_BATCH(batch, ((dest_region->y + dest_region->height) << 16) | + (dest_region->x + dest_region->width)); + OUT_RELOC(batch, dest_region->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0); + OUT_BATCH(batch, 0x0); + OUT_BATCH(batch, 0x0); + ADVANCE_BATCH(batch); + intel_batchbuffer_end_atomic(batch); +} + + +/* + * for GEN8 + */ +#define ALIGNMENT 64 + +static void +gen8_render_initialize(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + dri_bo *bo; + int size; + unsigned int end_offset; + + /* VERTEX BUFFER */ + dri_bo_unreference(render_state->vb.vertex_buffer); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vertex buffer", + 4096, + 4096); + assert(bo); + render_state->vb.vertex_buffer = bo; + + /* WM */ + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_RENDER_SURFACES, + 4096); + assert(bo); + render_state->wm.surface_state_binding_table_bo = bo; + + render_state->curbe_size = 256; + + render_state->wm.sampler_count = 0; + + render_state->sampler_size = MAX_SAMPLERS * sizeof(struct gen8_sampler_state); + + render_state->cc_state_size = sizeof(struct gen6_color_calc_state); + + render_state->cc_viewport_size = sizeof(struct i965_cc_viewport); + + render_state->blend_state_size = sizeof(struct gen8_global_blend_state) + + 16 * sizeof(struct gen8_blend_state_rt); + + render_state->sf_clip_size = 1024; + + render_state->scissor_size = 1024; + + size = ALIGN(render_state->curbe_size, ALIGNMENT) + + ALIGN(render_state->sampler_size, ALIGNMENT) + + ALIGN(render_state->cc_viewport_size, ALIGNMENT) + + ALIGN(render_state->cc_state_size, ALIGNMENT) + + ALIGN(render_state->blend_state_size, ALIGNMENT) + + ALIGN(render_state->sf_clip_size, ALIGNMENT) + + ALIGN(render_state->scissor_size, ALIGNMENT); + + dri_bo_unreference(render_state->dynamic_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "dynamic_state", + size, + 4096); + + render_state->dynamic_state.bo = bo; + + end_offset = 0; + render_state->dynamic_state.end_offset = 0; + + /* Constant buffer offset */ + render_state->curbe_offset = end_offset; + end_offset += ALIGN(render_state->curbe_size, ALIGNMENT); + + /* Sampler_state */ + render_state->sampler_offset = end_offset; + end_offset += ALIGN(render_state->sampler_size, ALIGNMENT); + + /* CC_VIEWPORT_state */ + render_state->cc_viewport_offset = end_offset; + end_offset += ALIGN(render_state->cc_viewport_size, ALIGNMENT); + + /* CC_STATE_state */ + render_state->cc_state_offset = end_offset; + end_offset += ALIGN(render_state->cc_state_size, ALIGNMENT); + + /* Blend_state */ + render_state->blend_state_offset = end_offset; + end_offset += ALIGN(render_state->blend_state_size, ALIGNMENT); + + /* SF_CLIP_state */ + render_state->sf_clip_offset = end_offset; + end_offset += ALIGN(render_state->sf_clip_size, ALIGNMENT); + + /* SCISSOR_state */ + render_state->scissor_offset = end_offset; + end_offset += ALIGN(render_state->scissor_size, ALIGNMENT); + + /* update the end offset of dynamic_state */ + render_state->dynamic_state.end_offset = end_offset; + +} + +static void +gen8_render_sampler(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen8_sampler_state *sampler_state; + int i; + unsigned char *cc_ptr; + + assert(render_state->wm.sampler_count > 0); + assert(render_state->wm.sampler_count <= MAX_SAMPLERS); + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->sampler_offset; + + sampler_state = (struct gen8_sampler_state *) cc_ptr; + + for (i = 0; i < render_state->wm.sampler_count; i++) { + memset(sampler_state, 0, sizeof(*sampler_state)); + sampler_state->ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss3.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss3.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss3.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state++; + } + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen8_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen8_global_blend_state *global_blend_state; + struct gen8_blend_state_rt *blend_state; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->blend_state_offset; + + global_blend_state = (struct gen8_global_blend_state*) cc_ptr; + + memset(global_blend_state, 0, render_state->blend_state_size); + /* Global blend state + blend_state for Render Target */ + blend_state = (struct gen8_blend_state_rt *)(global_blend_state + 1); + blend_state->blend1.logic_op_enable = 1; + blend_state->blend1.logic_op_func = 0xc; + blend_state->blend1.pre_blend_clamp_enable = 1; + + dri_bo_unmap(render_state->dynamic_state.bo); +} + + +static void +gen8_render_cc_viewport(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_cc_viewport *cc_viewport; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->cc_viewport_offset; + + cc_viewport = (struct i965_cc_viewport *) cc_ptr; + + memset(cc_viewport, 0, sizeof(*cc_viewport)); + + cc_viewport->min_depth = -1.e35; + cc_viewport->max_depth = 1.e35; + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen8_render_color_calc_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_color_calc_state *color_calc_state; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->cc_state_offset; + + color_calc_state = (struct gen6_color_calc_state *) cc_ptr; + + memset(color_calc_state, 0, sizeof(*color_calc_state)); + color_calc_state->constant_r = 1.0; + color_calc_state->constant_g = 0.0; + color_calc_state->constant_b = 1.0; + color_calc_state->constant_a = 1.0; + dri_bo_unmap(render_state->dynamic_state.bo); +} + +#define PI 3.1415926 + +static void +gen8_render_upload_constants(VADriverContextP ctx, + struct object_surface *obj_surface, + unsigned int flags) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + unsigned short *constant_buffer; + unsigned char *cc_ptr; + float *color_balance_base; + float contrast = (float)i965->contrast_attrib->value / DEFAULT_CONTRAST; + float brightness = (float)i965->brightness_attrib->value / 255; /* YUV is float in the shader */ + float hue = (float)i965->hue_attrib->value / 180 * PI; + float saturation = (float)i965->saturation_attrib->value / DEFAULT_SATURATION; + float *yuv_to_rgb; + unsigned int color_flag; + const float* yuv_coefs; + size_t coefs_length; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->curbe_offset; + + constant_buffer = (unsigned short *) cc_ptr; + + if (obj_surface->subsampling == SUBSAMPLE_YUV400) { + assert(obj_surface->fourcc == VA_FOURCC_Y800); + + *constant_buffer = 2; + } else { + if (obj_surface->fourcc == VA_FOURCC_NV12) + *constant_buffer = 1; + else + *constant_buffer = 0; + } + + if (i965->contrast_attrib->value == DEFAULT_CONTRAST && + i965->brightness_attrib->value == DEFAULT_BRIGHTNESS && + i965->hue_attrib->value == DEFAULT_HUE && + i965->saturation_attrib->value == DEFAULT_SATURATION) + constant_buffer[1] = 1; /* skip color balance transformation */ + else + constant_buffer[1] = 0; + + color_balance_base = (float *)constant_buffer + 4; + *color_balance_base++ = contrast; + *color_balance_base++ = brightness; + *color_balance_base++ = cos(hue) * contrast * saturation; + *color_balance_base++ = sin(hue) * contrast * saturation; + + color_flag = flags & VA_SRC_COLOR_MASK; + yuv_to_rgb = (float *)constant_buffer + 8; + + yuv_coefs = i915_color_standard_to_coefs(i915_filter_to_color_standard(color_flag), + &coefs_length); + memcpy(yuv_to_rgb, yuv_coefs, coefs_length); + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen8_render_setup_states( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + gen8_render_dest_surface_state(ctx, 0); + gen8_render_src_surfaces_state(ctx, obj_surface, flags); + gen8_render_sampler(ctx); + gen8_render_cc_viewport(ctx); + gen8_render_color_calc_state(ctx); + gen8_render_blend_state(ctx); + gen8_render_upload_constants(ctx, obj_surface, flags); + i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect); +} + +static void +gen8_emit_state_base_address(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 16); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (16 - 2)); + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /*DW4 */ + OUT_RELOC(batch, render_state->wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_BATCH(batch, 0); + + /*DW6*/ + /* Dynamic state base address */ + OUT_RELOC(batch, render_state->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, + 0, BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + + /*DW8*/ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ + OUT_BATCH(batch, 0); + + /*DW10 */ + /* Instruction base address */ + OUT_RELOC(batch, render_state->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + + /*DW12 */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* General state upper bound */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_cc_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_CC_STATE_POINTERS | (2 - 2)); + OUT_BATCH(batch, (render_state->cc_state_offset + 1)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); + OUT_BATCH(batch, (render_state->blend_state_offset + 1)); + ADVANCE_BATCH(batch); + +} + +static void +gen8_emit_vertices(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, CMD_VERTEX_BUFFERS | (5 - 2)); + OUT_BATCH(batch, + (0 << GEN8_VB0_BUFFER_INDEX_SHIFT) | + (0 << GEN8_VB0_MOCS_SHIFT) | + GEN7_VB0_ADDRESS_MODIFYENABLE | + ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 12 * 4); + ADVANCE_BATCH(batch); + + /* Topology in 3D primitive is overrided by VF_TOPOLOGY command */ + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_VF_TOPOLOGY | (2 - 2)); + OUT_BATCH(batch, + _3DPRIM_RECTLIST); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, CMD_3DPRIMITIVE | (7 - 2)); + OUT_BATCH(batch, + GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL); + OUT_BATCH(batch, 3); /* vertex count per instance */ + OUT_BATCH(batch, 0); /* start vertex offset */ + OUT_BATCH(batch, 1); /* single instance */ + OUT_BATCH(batch, 0); /* start instance location */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_vertex_element_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + int i; + + /* + * The VUE layout + * dword 0-3: pad (0, 0, 0. 0) + * dword 4-7: position (x, y, 1.0, 1.0), + * dword 8-11: texture coordinate 0 (u0, v0, 1.0, 1.0) + */ + + /* Set up our vertex elements, sourced from the single vertex buffer. */ + OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | (7 - 2)); + + /* Element state 0. These are 4 dwords of 0 required for the VUE format. + * We don't really know or care what they do. + */ + + OUT_BATCH(batch, (0 << GEN8_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN8_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT)); + + /* offset 8: X, Y -> {x, y, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN8_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN8_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (8 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + + /* offset 0: u,v -> {U, V, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN8_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN8_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + + /* Disable instancing for all vertex elements. */ + for (i = 0; i < 3; i++) { + OUT_BATCH(batch, GEN8_3DSTATE_VF_INSTANCING | (3 - 2)); + OUT_BATCH(batch, i); + OUT_BATCH(batch, 0); + } + + /* Disable system-generated values. */ + OUT_BATCH(batch, GEN8_3DSTATE_VF_SGVS | (2 - 2)); + OUT_BATCH(batch, 0); +} + +static void +gen8_emit_vs_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* disable VS constant buffer */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_VS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 0 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 1 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 2 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 3 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, GEN6_3DSTATE_VS | (9 - 2)); + OUT_BATCH(batch, 0); /* without VS kernel */ + OUT_BATCH(batch, 0); + /* VS shader dispatch flag */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW6. VS shader GRF and URB buffer definition */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + +} + +/* + * URB layout on GEN8 + * ---------------------------------------- + * | PS Push Constants (8KB) | VS entries | + * ---------------------------------------- + */ +static void +gen8_emit_urb(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int num_urb_entries = 64; + + /* The minimum urb entries is 64 */ + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Size is 8Kbs and base address is 0Kb */ + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); + /* Size is 8Kbs and base address is 0Kb */ + OUT_BATCH(batch, + (0 << GEN8_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT) | + (8 << GEN8_PUSH_CONSTANT_BUFFER_SIZE_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_VS | (2 - 2)); + OUT_BATCH(batch, + (num_urb_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) | + (4 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | + (4 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_GS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (5 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_HS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (6 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_DS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (7 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_bypass_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* bypass GS */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_GS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 10); + OUT_BATCH(batch, GEN6_3DSTATE_GS | (10 - 2)); + /* GS shader address */ + OUT_BATCH(batch, 0); /* without GS kernel */ + OUT_BATCH(batch, 0); + /* DW3. GS shader dispatch flag */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW6. GS shader GRF and URB offset/length */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* disable HS */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN7_3DSTATE_CONSTANT_HS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, GEN7_3DSTATE_HS | (9 - 2)); + OUT_BATCH(batch, 0); + /*DW2. HS pass-through */ + OUT_BATCH(batch, 0); + /*DW3. HS shader address */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /*DW5. HS shader flag. URB offset/length and so on */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable TE */ + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, GEN7_3DSTATE_TE | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable DS */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN7_3DSTATE_CONSTANT_DS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, GEN7_3DSTATE_DS | (9 - 2)); + /* DW1. DS shader pointer */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW3-5. DS shader dispatch flag.*/ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW6-7. DS shader pass-through, GRF,URB offset/Length,Thread Number*/ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW8. DS shader output URB */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable STREAMOUT */ + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN7_3DSTATE_STREAMOUT | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_invarient_states(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_3D); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_MULTISAMPLE | (2 - 2)); + OUT_BATCH(batch, GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | + GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ + ADVANCE_BATCH(batch); + + /* Update 3D Multisample pattern */ + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, GEN8_3DSTATE_SAMPLE_PATTERN | (9 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); + OUT_BATCH(batch, 1); + ADVANCE_BATCH(batch); + + /* Set system instruction pointer */ + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_STATE_SIP | 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_clip_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, GEN6_3DSTATE_CLIP | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); +} + +static void +gen8_emit_sf_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN8_3DSTATE_RASTER | (5 - 2)); + OUT_BATCH(batch, GEN8_3DSTATE_RASTER_CULL_NONE); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, GEN7_3DSTATE_SBE | (4 - 2)); + OUT_BATCH(batch, + (GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH) | + (GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET) | + (1 << GEN7_SBE_NUM_OUTPUTS_SHIFT) | + (1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT) | + (1 << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* SBE for backend setup */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN8_3DSTATE_SBE_SWIZ | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, GEN6_3DSTATE_SF | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_wm_state(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + unsigned int num_samples = 0; + unsigned int max_threads; + + max_threads = i965->intel.device_info->max_wm_threads - 2; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_PSEXTRA | (2 - 2)); + OUT_BATCH(batch, + (GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE)); + ADVANCE_BATCH(batch); + + if (kernel == PS_KERNEL) { + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_PSBLEND | (2 - 2)); + OUT_BATCH(batch, + GEN8_PS_BLEND_HAS_WRITEABLE_RT); + ADVANCE_BATCH(batch); + } else if (kernel == PS_SUBPIC_KERNEL) { + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_PSBLEND | (2 - 2)); + OUT_BATCH(batch, + (GEN8_PS_BLEND_HAS_WRITEABLE_RT | + GEN8_PS_BLEND_COLOR_BUFFER_BLEND_ENABLE | + (I965_BLENDFACTOR_SRC_ALPHA << GEN8_PS_BLEND_SRC_ALPHA_BLEND_FACTOR_SHIFT) | + (I965_BLENDFACTOR_INV_SRC_ALPHA << GEN8_PS_BLEND_DST_ALPHA_BLEND_FACTOR_SHIFT) | + (I965_BLENDFACTOR_SRC_ALPHA << GEN8_PS_BLEND_SRC_BLEND_FACTOR_SHIFT) | + (I965_BLENDFACTOR_INV_SRC_ALPHA << GEN8_PS_BLEND_DST_BLEND_FACTOR_SHIFT))); + ADVANCE_BATCH(batch); + } + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_WM | (2 - 2)); + OUT_BATCH(batch, + GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS | (11 - 2)); + OUT_BATCH(batch, URB_CS_ENTRY_SIZE); + OUT_BATCH(batch, 0); + /*DW3-4. Constant buffer 0 */ + OUT_BATCH(batch, render_state->curbe_offset); + OUT_BATCH(batch, 0); + + /*DW5-10. Constant buffer 1-3 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 12); + OUT_BATCH(batch, GEN7_3DSTATE_PS | (12 - 2)); + /* PS shader address */ + OUT_BATCH(batch, render_state->render_kernels[kernel].kernel_offset); + + OUT_BATCH(batch, 0); + /* DW3. PS shader flag .Binding table cnt/sample cnt */ + OUT_BATCH(batch, + (1 << GEN7_PS_SAMPLER_COUNT_SHIFT) | + (5 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT) | + GEN7_PS_VECTOR_MASK_ENABLE); + /* DW4-5. Scatch space */ + OUT_BATCH(batch, 0); /* scratch space base offset */ + OUT_BATCH(batch, 0); + /* DW6. PS shader threads. */ + OUT_BATCH(batch, + ((max_threads - 1) << GEN8_PS_MAX_THREADS_SHIFT) | num_samples | + GEN7_PS_PUSH_CONSTANT_ENABLE | + GEN7_PS_16_DISPATCH_ENABLE); + /* DW7. PS shader GRF */ + OUT_BATCH(batch, + (6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0)); + OUT_BATCH(batch, 0); /* kernel 1 pointer */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* kernel 2 pointer */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); + OUT_BATCH(batch, BINDING_TABLE_OFFSET); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_depth_buffer_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, GEN7_3DSTATE_DEPTH_BUFFER | (8 - 2)); + OUT_BATCH(batch, + (I965_DEPTHFORMAT_D32_FLOAT << 18) | + (I965_SURFACE_NULL << 29)); + /* DW2-3. Depth Buffer Address */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW4-7. Surface structure */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Update the Hier Depth buffer */ + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Update the stencil buffer */ + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN7_3DSTATE_STENCIL_BUFFER | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_depth_stencil_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, GEN8_3DSTATE_WM_DEPTH_STENCIL | (3 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_wm_hz_op(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN8_3DSTATE_WM_HZ_OP | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_viewport_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); + OUT_BATCH(batch, render_state->cc_viewport_offset); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen8_emit_sampler_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); + OUT_BATCH(batch, render_state->sampler_offset); + ADVANCE_BATCH(batch); +} + + +static void +gen7_emit_drawing_rectangle(VADriverContextP ctx) +{ + i965_render_drawing_rectangle(ctx); +} + +static void +gen8_render_emit_states(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen8_emit_invarient_states(ctx); + gen8_emit_state_base_address(ctx); + gen8_emit_viewport_state_pointers(ctx); + gen8_emit_urb(ctx); + gen8_emit_cc_state_pointers(ctx); + gen8_emit_sampler_state_pointers(ctx); + gen8_emit_wm_hz_op(ctx); + gen8_emit_bypass_state(ctx); + gen8_emit_vs_state(ctx); + gen8_emit_clip_state(ctx); + gen8_emit_sf_state(ctx); + gen8_emit_depth_stencil_state(ctx); + gen8_emit_wm_state(ctx, kernel); + gen8_emit_depth_buffer_state(ctx); + gen7_emit_drawing_rectangle(ctx); + gen8_emit_vertex_element_state(ctx); + gen8_emit_vertices(ctx); + intel_batchbuffer_end_atomic(batch); +} + +static void +gen8_render_put_surface( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + gen8_render_initialize(ctx); + gen8_render_setup_states(ctx, obj_surface, src_rect, dst_rect, flags); + gen8_clear_dest_region(ctx); + gen8_render_emit_states(ctx, PS_KERNEL); + intel_batchbuffer_flush(batch); +} + +static void +gen8_subpicture_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen8_global_blend_state *global_blend_state; + struct gen8_blend_state_rt *blend_state; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->blend_state_offset; + + global_blend_state = (struct gen8_global_blend_state*) cc_ptr; + + memset(global_blend_state, 0, render_state->blend_state_size); + /* Global blend state + blend_state for Render Target */ + blend_state = (struct gen8_blend_state_rt *)(global_blend_state + 1); + blend_state->blend0.color_blend_func = I965_BLENDFUNCTION_ADD; + blend_state->blend0.dest_blend_factor = I965_BLENDFACTOR_INV_SRC_ALPHA; + blend_state->blend0.src_blend_factor = I965_BLENDFACTOR_SRC_ALPHA; + blend_state->blend0.alpha_blend_func = I965_BLENDFUNCTION_ADD; + blend_state->blend0.ia_dest_blend_factor = I965_BLENDFACTOR_INV_SRC_ALPHA; + blend_state->blend0.ia_src_blend_factor = I965_BLENDFACTOR_SRC_ALPHA; + blend_state->blend0.colorbuf_blend = 1; + blend_state->blend1.post_blend_clamp_enable = 1; + blend_state->blend1.pre_blend_clamp_enable = 1; + blend_state->blend1.clamp_range = 0; /* clamp range [0, 1] */ + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen8_subpic_render_upload_constants(VADriverContextP ctx, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + float *constant_buffer; + float global_alpha = 1.0; + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + unsigned char *cc_ptr; + + if (obj_subpic->flags & VA_SUBPICTURE_GLOBAL_ALPHA) { + global_alpha = obj_subpic->global_alpha; + } + + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->curbe_offset; + + constant_buffer = (float *) cc_ptr; + *constant_buffer = global_alpha; + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen8_subpicture_render_setup_states( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + gen8_render_dest_surface_state(ctx, 0); + gen8_subpic_render_src_surfaces_state(ctx, obj_surface); + gen8_render_sampler(ctx); + gen8_render_cc_viewport(ctx); + gen8_render_color_calc_state(ctx); + gen8_subpicture_render_blend_state(ctx); + gen8_subpic_render_upload_constants(ctx, obj_surface); + i965_subpic_render_upload_vertex(ctx, obj_surface, dst_rect); +} + +static void +gen8_render_put_subpicture( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + + assert(obj_subpic); + gen8_render_initialize(ctx); + gen8_subpicture_render_setup_states(ctx, obj_surface, src_rect, dst_rect); + gen8_render_emit_states(ctx, PS_SUBPIC_KERNEL); + i965_render_upload_image_palette(ctx, obj_subpic->obj_image, 0xff); + intel_batchbuffer_flush(batch); +} + +static void +gen8_render_terminate(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + + dri_bo_unreference(render_state->vb.vertex_buffer); + render_state->vb.vertex_buffer = NULL; + + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + render_state->wm.surface_state_binding_table_bo = NULL; + + if (render_state->instruction_state.bo) { + dri_bo_unreference(render_state->instruction_state.bo); + render_state->instruction_state.bo = NULL; + } + + if (render_state->dynamic_state.bo) { + dri_bo_unreference(render_state->dynamic_state.bo); + render_state->dynamic_state.bo = NULL; + } + + if (render_state->indirect_state.bo) { + dri_bo_unreference(render_state->indirect_state.bo); + render_state->indirect_state.bo = NULL; + } + + if (render_state->draw_region) { + dri_bo_unreference(render_state->draw_region->bo); + free(render_state->draw_region); + render_state->draw_region = NULL; + } +} + +bool +gen8_render_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + int i, kernel_size; + unsigned int kernel_offset, end_offset; + unsigned char *kernel_ptr; + struct i965_kernel *kernel; + + render_state->render_put_surface = gen8_render_put_surface; + render_state->render_put_subpicture = gen8_render_put_subpicture; + render_state->render_terminate = gen8_render_terminate; + + memcpy(render_state->render_kernels, render_kernels_gen8, + sizeof(render_state->render_kernels)); + + kernel_size = 4096; + + for (i = 0; i < NUM_RENDER_KERNEL; i++) { + kernel = &render_state->render_kernels[i]; + + if (!kernel->size) + continue; + + kernel_size += kernel->size; + } + + render_state->instruction_state.bo = dri_bo_alloc(i965->intel.bufmgr, + "kernel shader", + kernel_size, + 0x1000); + if (render_state->instruction_state.bo == NULL) { + WARN_ONCE("failure to allocate the buffer space for kernel shader\n"); + return false; + } + + assert(render_state->instruction_state.bo); + + render_state->instruction_state.bo_size = kernel_size; + render_state->instruction_state.end_offset = 0; + end_offset = 0; + + dri_bo_map(render_state->instruction_state.bo, 1); + kernel_ptr = (unsigned char *)(render_state->instruction_state.bo->virtual); + for (i = 0; i < NUM_RENDER_KERNEL; i++) { + kernel = &render_state->render_kernels[i]; + kernel_offset = end_offset; + kernel->kernel_offset = kernel_offset; + + if (!kernel->size) + continue; + + memcpy(kernel_ptr + kernel_offset, kernel->bin, kernel->size); + + end_offset += ALIGN(kernel->size, ALIGNMENT); + } + + render_state->instruction_state.end_offset = end_offset; + + dri_bo_unmap(render_state->instruction_state.bo); + + return true; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen8_vme.c intel-vaapi-driver-1.7.1/src/gen8_vme.c --- intel-vaapi-driver-1.0.15/src/gen8_vme.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen8_vme.c 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,1374 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "gen6_vme.h" +#include "gen6_mfc.h" + +#ifdef SURFACE_STATE_PADDED_SIZE +#undef SURFACE_STATE_PADDED_SIZE +#endif + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define VME_INTRA_SHADER 0 +#define VME_INTER_SHADER 1 +#define VME_BINTER_SHADER 2 + +#define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */ +#define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */ +#define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */ + +#define VME_MSG_LENGTH 32 + +static const uint32_t gen8_vme_intra_frame[][4] = { +#include "shaders/vme/intra_frame_gen8.g8b" +}; + +static const uint32_t gen8_vme_inter_frame[][4] = { +#include "shaders/vme/inter_frame_gen8.g8b" +}; + +static const uint32_t gen8_vme_inter_bframe[][4] = { +#include "shaders/vme/inter_bframe_gen8.g8b" +}; + +static struct i965_kernel gen8_vme_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen8_vme_intra_frame, + sizeof(gen8_vme_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen8_vme_inter_frame, + sizeof(gen8_vme_inter_frame), + NULL + }, + { + "VME inter BFrame", + VME_BINTER_SHADER, + gen8_vme_inter_bframe, + sizeof(gen8_vme_inter_bframe), + NULL + } +}; + +static const uint32_t gen8_vme_mpeg2_intra_frame[][4] = { +#include "shaders/vme/intra_frame_gen8.g8b" +}; + +static const uint32_t gen8_vme_mpeg2_inter_frame[][4] = { +#include "shaders/vme/mpeg2_inter_gen8.g8b" +}; + +static struct i965_kernel gen8_vme_mpeg2_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen8_vme_mpeg2_intra_frame, + sizeof(gen8_vme_mpeg2_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen8_vme_mpeg2_inter_frame, + sizeof(gen8_vme_mpeg2_inter_frame), + NULL + }, +}; + +static const uint32_t gen8_vme_vp8_intra_frame[][4] = { +#include "shaders/vme/vp8_intra_frame_gen8.g8b" +}; + +static const uint32_t gen8_vme_vp8_inter_frame[][4] = { +#include "shaders/vme/vp8_inter_frame_gen8.g8b" +}; + +static struct i965_kernel gen8_vme_vp8_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen8_vme_vp8_intra_frame, + sizeof(gen8_vme_vp8_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen8_vme_vp8_inter_frame, + sizeof(gen8_vme_vp8_inter_frame), + NULL + }, +}; + +/* only used for VME source surface state */ +static void +gen8_vme_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_surface2_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen8_vme_media_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_media_rw_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen8_vme_media_chroma_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_media_chroma_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen8_vme_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context, + int is_intra, + int width_in_mbs, + int height_in_mbs) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2; + else + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24; + /* + * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref + * + 16 FBR Info + 128 FBR MV + 32 FBR Ref. + * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24. + */ + + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen8_vme_avc_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + gen8_vme_output_buffer_setup(ctx, encode_state, index, encoder_context, is_intra, width_in_mbs, height_in_mbs); + +} + +static void +gen8_vme_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context, + int width_in_mbs, + int height_in_mbs) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_batchbuffer, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen8_vme_avc_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + gen8_vme_output_vme_batchbuffer_setup(ctx, encode_state, index, encoder_context, width_in_mbs, height_in_mbs); +} + +static VAStatus +gen8_vme_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int slice_type; + + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI); + + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen8_vme_source_surface_state); + + if (slice_type == SLICE_TYPE_B) + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen8_vme_source_surface_state); + } + + /* VME output */ + gen8_vme_avc_output_buffer_setup(ctx, encode_state, 3, encoder_context); + gen8_vme_avc_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen8_vme_interface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen8_interface_descriptor_data *desc; + int i; + dri_bo *bo; + unsigned char *desc_ptr; + + bo = vme_context->gpe_context.dynamic_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc_ptr = (unsigned char *)bo->virtual + vme_context->gpe_context.idrt_offset; + + desc = (struct gen8_interface_descriptor_data *)desc_ptr; + + for (i = 0; i < vme_context->vme_kernel_sum; i++) { + struct i965_kernel *kernel; + kernel = &vme_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6; + desc->desc3.sampler_count = 0; /* FIXME: */ + desc->desc3.sampler_state_pointer = 0; + desc->desc4.binding_table_entry_count = 1; /* FIXME: */ + desc->desc4.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc5.constant_urb_entry_read_offset = 0; + desc->desc5.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH; + + + desc++; + } + + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen8_vme_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned char *constant_buffer; + unsigned int *vme_state_message; + int mv_num = 32; + + vme_state_message = (unsigned int *)vme_context->vme_state_message; + + if (encoder_context->codec == CODEC_H264 || + encoder_context->codec == CODEC_H264_MVC) { + if (vme_context->h264_level >= 30) { + mv_num = 16; + + if (vme_context->h264_level >= 31) + mv_num = 8; + } + } else if (encoder_context->codec == CODEC_MPEG2) { + mv_num = 2; + } + + vme_state_message[31] = mv_num; + + dri_bo_map(vme_context->gpe_context.dynamic_state.bo, 1); + assert(vme_context->gpe_context.dynamic_state.bo->virtual); + constant_buffer = (unsigned char *)vme_context->gpe_context.dynamic_state.bo->virtual + + vme_context->gpe_context.curbe_offset; + + /* VME MV/Mb cost table is passed by using const buffer */ + /* Now it uses the fixed search path. So it is constructed directly + * in the GPU shader. + */ + memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128); + + dri_bo_unmap(vme_context->gpe_context.dynamic_state.bo); + + return VA_STATUS_SUCCESS; +} + +#define MB_SCOREBOARD_A (1 << 0) +#define MB_SCOREBOARD_B (1 << 1) +#define MB_SCOREBOARD_C (1 << 2) + +/* check whether the mb of (x_index, y_index) is out of bound */ +static inline int loop_in_bounds(int x_index, int y_index, int first_mb, int num_mb, int mb_width, int mb_height) +{ + int mb_index; + if (x_index < 0 || x_index >= mb_width) + return -1; + if (y_index < 0 || y_index >= mb_height) + return -1; + + mb_index = y_index * mb_width + x_index; + if (mb_index < first_mb || mb_index > (first_mb + num_mb)) + return -1; + return 0; +} + +static void +gen8wa_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_row; + int s; + unsigned int *command_ptr; + +#define USE_SCOREBOARD (1 << 21) + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + int first_mb = pSliceParameter->macroblock_address; + int num_mb = pSliceParameter->num_macroblocks; + unsigned int mb_intra_ub, score_dep; + int x_outer, y_outer, x_inner, y_inner; + int xtemp_outer = 0; + + x_outer = first_mb % mb_width; + y_outer = first_mb / mb_width; + mb_row = y_outer; + + for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + x_inner = x_outer; + y_inner = y_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + + x_inner -= 2; + y_inner += 1; + } + x_outer += 1; + } + + xtemp_outer = mb_width - 2; + if (xtemp_outer < 0) + xtemp_outer = 0; + x_outer = xtemp_outer; + y_outer = first_mb / mb_width; + for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + y_inner = y_outer; + x_inner = x_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + x_inner -= 2; + y_inner += 1; + } + x_outer++; + if (x_outer >= mb_width) { + y_outer += 1; + x_outer = xtemp_outer; + } + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void +gen8_vme_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s; + unsigned int *command_ptr; + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + int slice_mb_begin = pSliceParameter->macroblock_address; + int slice_mb_number = pSliceParameter->num_macroblocks; + unsigned int mb_intra_ub; + int slice_mb_x = pSliceParameter->macroblock_address % mb_width; + for (i = 0; i < slice_mb_number; ) { + int mb_count = i + slice_mb_begin; + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + if (i < mb_width) { + if (i == 0) + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE); + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK); + if ((i == (mb_width - 1)) && slice_mb_x) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + } + + if ((i == mb_width) && slice_mb_x) { + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D); + } + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + i += 1; + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void gen8_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + gen8_gpe_context_init(ctx, &vme_context->gpe_context); + + /* VME output buffer */ + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + /* VME state */ + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; +} + +static void gen8_vme_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + int kernel_shader; + bool allow_hwscore = true; + int s; + unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY); + + if (is_low_quality) + allow_hwscore = false; + else { + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + if ((pSliceParameter->macroblock_address % width_in_mbs)) { + allow_hwscore = false; + break; + } + } + } + + if ((pSliceParameter->slice_type == SLICE_TYPE_I) || + (pSliceParameter->slice_type == SLICE_TYPE_SI)) { + kernel_shader = VME_INTRA_SHADER; + } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) || + (pSliceParameter->slice_type == SLICE_TYPE_SP)) { + kernel_shader = VME_INTER_SHADER; + } else { + kernel_shader = VME_BINTER_SHADER; + if (!allow_hwscore) + kernel_shader = VME_INTER_SHADER; + } + if (allow_hwscore) + gen8wa_vme_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + else + gen8_vme_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen8_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen8_vme_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if (!vme_context->h264_level || + (vme_context->h264_level != pSequenceParameter->level_idc)) { + vme_context->h264_level = pSequenceParameter->level_idc; + } + + intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context); + + /*Setup all the memory object*/ + gen8_vme_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen8_vme_interface_setup(ctx, encode_state, encoder_context); + //gen8_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context); + gen8_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen8_vme_pipeline_programing(ctx, encode_state, encoder_context); + + return vaStatus; +} + +static VAStatus gen8_vme_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen8_vme_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen8_vme_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen8_vme_media_init(ctx, encoder_context); + gen8_vme_prepare(ctx, encode_state, encoder_context); + gen8_vme_run(ctx, encode_state, encoder_context); + gen8_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen8_vme_mpeg2_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + gen8_vme_output_buffer_setup(ctx, encode_state, index, encoder_context, is_intra, width_in_mbs, height_in_mbs); +} + +static void +gen8_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + gen8_vme_output_vme_batchbuffer_setup(ctx, encode_state, index, encoder_context, width_in_mbs, height_in_mbs); +} + +static VAStatus +gen8_vme_mpeg2_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + /* reference 0 */ + obj_surface = encode_state->reference_objects[0]; + + if (obj_surface->bo != NULL) + gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context); + + /* reference 1 */ + obj_surface = encode_state->reference_objects[1]; + + if (obj_surface && obj_surface->bo != NULL) + gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context); + } + + /* VME output */ + gen8_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context); + gen8_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen8wa_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned int *command_ptr; + +#define MPEG2_SCOREBOARD (1 << 21) + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + { + unsigned int mb_intra_ub, score_dep; + int x_outer, y_outer, x_inner, y_inner; + int xtemp_outer = 0; + int first_mb = 0; + int num_mb = mb_width * mb_height; + + x_outer = 0; + y_outer = 0; + + + for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + x_inner = x_outer; + y_inner = y_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = MPEG2_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8)); + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + + x_inner -= 2; + y_inner += 1; + } + x_outer += 1; + } + + xtemp_outer = mb_width - 2; + if (xtemp_outer < 0) + xtemp_outer = 0; + x_outer = xtemp_outer; + y_outer = 0; + for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + y_inner = y_outer; + x_inner = x_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = MPEG2_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + x_inner -= 2; + y_inner += 1; + } + x_outer++; + if (x_outer >= mb_width) { + y_outer += 1; + x_outer = xtemp_outer; + } + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); + return; +} + +static void +gen8_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s, j; + unsigned int *command_ptr; + + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + int slice_mb_begin = slice_param->macroblock_address; + int slice_mb_number = slice_param->num_macroblocks; + unsigned int mb_intra_ub; + + for (i = 0; i < slice_mb_number;) { + int mb_count = i + slice_mb_begin; + + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + i += 1; + } + + slice_param++; + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void +gen8_vme_mpeg2_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + bool allow_hwscore = true; + int s; + int kernel_shader; + VAEncPictureParameterBufferMPEG2 *pic_param = NULL; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + int j; + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + if (slice_param->macroblock_address % width_in_mbs) { + allow_hwscore = false; + break; + } + } + } + + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + if (pic_param->picture_type == VAEncPictureTypeIntra) { + allow_hwscore = false; + kernel_shader = VME_INTRA_SHADER; + } else { + kernel_shader = VME_INTER_SHADER; + } + + if (allow_hwscore) + gen8wa_vme_mpeg2_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + encoder_context); + else + gen8_vme_mpeg2_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER, + 0, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen8_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus +gen8_vme_mpeg2_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if ((!vme_context->mpeg2_level) || + (vme_context->mpeg2_level != (seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK))) { + vme_context->mpeg2_level = seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK; + } + + + /*Setup all the memory object*/ + gen8_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + gen8_vme_interface_setup(ctx, encode_state, encoder_context); + //gen8_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + intel_vme_mpeg2_state_setup(ctx, encode_state, encoder_context); + gen8_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen8_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + + return vaStatus; +} + +static VAStatus +gen8_vme_mpeg2_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen8_vme_media_init(ctx, encoder_context); + gen8_vme_mpeg2_prepare(ctx, encode_state, encoder_context); + gen8_vme_run(ctx, encode_state, encoder_context); + gen8_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen8_vme_vp8_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + + gen8_vme_output_buffer_setup(ctx, encode_state, index, encoder_context, is_intra, width_in_mbs, height_in_mbs); +} + +static void +gen8_vme_vp8_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + + gen8_vme_output_vme_batchbuffer_setup(ctx, encode_state, index, encoder_context, width_in_mbs, height_in_mbs); +} + +static VAStatus +gen8_vme_vp8_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen8_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen8_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen8_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + /* reference 0 */ + obj_surface = encode_state->reference_objects[0]; + + if (obj_surface->bo != NULL) + gen8_vme_source_surface_state(ctx, 1, obj_surface, encoder_context); + + /* reference 1 */ + obj_surface = encode_state->reference_objects[1]; + + if (obj_surface && obj_surface->bo != NULL) + gen8_vme_source_surface_state(ctx, 2, obj_surface, encoder_context); + } + + /* VME output */ + gen8_vme_vp8_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context); + gen8_vme_vp8_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen8_vme_vp8_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + int kernel_shader = (is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER); + + gen8wa_vme_mpeg2_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen8_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen8_vme_vp8_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncPictureParameterBufferVP8 *pPicParameter = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + int is_intra = !pPicParameter->pic_flags.bits.frame_type; + + /* update vp8 mbmv cost */ + intel_vme_vp8_update_mbmv_cost(ctx, encode_state, encoder_context); + + /*Setup all the memory object*/ + gen8_vme_vp8_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen8_vme_interface_setup(ctx, encode_state, encoder_context); + gen8_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen8_vme_vp8_pipeline_programing(ctx, encode_state, is_intra, encoder_context); + + return vaStatus; +} + +static VAStatus +gen8_vme_vp8_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen8_vme_media_init(ctx, encoder_context); + gen8_vme_vp8_prepare(ctx, encode_state, encoder_context); + gen8_vme_run(ctx, encode_state, encoder_context); + gen8_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen8_vme_context_destroy(void *context) +{ + struct gen6_vme_context *vme_context = context; + + gen8_gpe_context_destroy(&vme_context->gpe_context); + + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + if (vme_context->vme_state_message) { + free(vme_context->vme_state_message); + vme_context->vme_state_message = NULL; + } + + free(vme_context); +} + +Bool gen8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = NULL; + struct i965_kernel *vme_kernel_list = NULL; + int i965_kernel_num; + + switch (encoder_context->codec) { + case CODEC_H264: + case CODEC_H264_MVC: + vme_kernel_list = gen8_vme_kernels; + encoder_context->vme_pipeline = gen8_vme_pipeline; + i965_kernel_num = sizeof(gen8_vme_kernels) / sizeof(struct i965_kernel); + break; + + case CODEC_MPEG2: + vme_kernel_list = gen8_vme_mpeg2_kernels; + encoder_context->vme_pipeline = gen8_vme_mpeg2_pipeline; + i965_kernel_num = sizeof(gen8_vme_mpeg2_kernels) / sizeof(struct i965_kernel); + break; + + case CODEC_JPEG: + //JPEG encode doesnt have vme. So, set the corresponding fields to NULL. + encoder_context->vme_context = NULL; + encoder_context->vme_pipeline = NULL; + encoder_context->vme_context_destroy = NULL; + break; + + case CODEC_VP8: + vme_kernel_list = gen8_vme_vp8_kernels; + encoder_context->vme_pipeline = gen8_vme_vp8_pipeline; + i965_kernel_num = sizeof(gen8_vme_vp8_kernels) / sizeof(struct i965_kernel); + break; + + default: + /* never get here */ + assert(0); + + break; + } + + //If the codec is JPEG, bypass VME + if(encoder_context->codec != CODEC_JPEG) { + vme_context = calloc(1, sizeof(struct gen6_vme_context)); + assert(vme_context); + vme_context->vme_kernel_sum = i965_kernel_num; + vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + vme_context->gpe_context.idrt_size = sizeof(struct gen8_interface_descriptor_data) * MAX_INTERFACE_DESC_GEN6; + vme_context->gpe_context.curbe_size = CURBE_TOTAL_DATA_LENGTH; + vme_context->gpe_context.sampler_size = 0; + + + vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + vme_context->gpe_context.vfe_state.num_urb_entries = 64; + vme_context->gpe_context.vfe_state.gpgpu_mode = 0; + vme_context->gpe_context.vfe_state.urb_entry_size = 16; + vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; + + gen7_vme_scoreboard_init(ctx, vme_context); + + gen8_gpe_load_kernels(ctx, + &vme_context->gpe_context, + vme_kernel_list, + i965_kernel_num); + vme_context->vme_surface2_setup = gen8_gpe_surface2_setup; + vme_context->vme_media_rw_surface_setup = gen8_gpe_media_rw_surface_setup; + vme_context->vme_buffer_suface_setup = gen8_gpe_buffer_suface_setup; + vme_context->vme_media_chroma_surface_setup = gen8_gpe_media_chroma_surface_setup; + + encoder_context->vme_context = vme_context; + encoder_context->vme_context_destroy = gen8_vme_context_destroy; + + vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int)); + } + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_mfc.c intel-vaapi-driver-1.7.1/src/gen9_mfc.c --- intel-vaapi-driver-1.0.15/src/gen9_mfc.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_mfc.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,1754 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + * + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "gen6_mfc.h" +#include "gen6_vme.h" +#include "intel_media.h" + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define MFC_SOFTWARE_HASWELL 1 + +#define B0_STEP_REV 2 +#define IS_STEPPING_BPLUS(i965) ((i965->intel.revision) >= B0_STEP_REV) + +static const uint32_t gen9_mfc_batchbuffer_avc_intra[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_intra.g9b" +}; + +static const uint32_t gen9_mfc_batchbuffer_avc_inter[][4] = { +#include "shaders/utils/mfc_batchbuffer_avc_inter.g9b" +}; + +static struct i965_kernel gen9_mfc_kernels[] = { + { + "MFC AVC INTRA BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTRA, + gen9_mfc_batchbuffer_avc_intra, + sizeof(gen9_mfc_batchbuffer_avc_intra), + NULL + }, + + { + "MFC AVC INTER BATCHBUFFER ", + MFC_BATCHBUFFER_AVC_INTER, + gen9_mfc_batchbuffer_avc_inter, + sizeof(gen9_mfc_batchbuffer_avc_inter), + NULL + }, +}; + +#define INTER_MODE_MASK 0x03 +#define INTER_8X8 0x03 +#define INTER_16X8 0x01 +#define INTER_8X16 0x02 +#define SUBMB_SHAPE_MASK 0x00FF00 +#define INTER_16X16 0x00 + +#define INTER_MV8 (4 << 20) +#define INTER_MV32 (6 << 20) + +static void +gen9_mfc_pipe_mode_select(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(standard_select == MFX_FORMAT_MPEG2 || + standard_select == MFX_FORMAT_AVC || + standard_select == MFX_FORMAT_VP8); + + BEGIN_BCS_BATCH(batch, 5); + + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (MFX_LONG_MODE << 17) | /* Must be long format for encoder */ + (MFD_MODE_VLD << 15) | /* VLD mode */ + (0 << 10) | /* Stream-Out Enable */ + ((!!mfc_context->post_deblocking_output.bo) << 9) | /* Post Deblocking Output */ + ((!!mfc_context->pre_deblocking_output.bo) << 8) | /* Pre Deblocking Output */ + (0 << 6) | /* frame statistics stream-out enable*/ + (0 << 5) | /* not in stitch mode */ + (1 << 4) | /* encoding mode */ + (standard_select << 0)); /* standard select: avc or mpeg2 */ + OUT_BCS_BATCH(batch, + (0 << 7) | /* expand NOA bus flag */ + (0 << 6) | /* disable slice-level clock gating */ + (0 << 5) | /* disable clock gating for NOA */ + (0 << 4) | /* terminate if AVC motion and POC table error occurs */ + (0 << 3) | /* terminate if AVC mbdata error occurs */ + (0 << 2) | /* terminate if AVC CABAC/CAVLC decode error occurs */ + (0 << 1) | + (0 << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_mfc_surface_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((mfc_context->surface_state.height - 1) << 18) | + ((mfc_context->surface_state.width - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + (0 << 22) | /* surface object control state, FIXME??? */ + ((mfc_context->surface_state.w_pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (mfc_context->surface_state.h_pitch)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_mfc_ind_obj_base_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int vme_size; + + BEGIN_BCS_BATCH(batch, 26); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (26 - 2)); + /* the DW1-3 is for the MFX indirect bistream offset */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + vme_size = vme_context->vme_output.size_block * vme_context->vme_output.num_blocks; + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW6-10 is for MFX Indirect MV Object Base Address */ + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, vme_size); + OUT_BCS_BATCH(batch, 0); + + /* the DW11-15 is for MFX IT-COFF. Not used on encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW16-20 is for MFX indirect DBLK. Not used on encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW21-25 is for MFC Indirect PAK-BSE Object Base Address for Encoder*/ + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_RELOC(batch, + mfc_context->mfc_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->mfc_indirect_pak_bse_object.end_offset); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_mfc_avc_img_state(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + + BEGIN_BCS_BATCH(batch, 16); + + OUT_BCS_BATCH(batch, MFX_AVC_IMG_STATE | (16 - 2)); + /*DW1. MB setting of frame */ + OUT_BCS_BATCH(batch, + ((width_in_mbs * height_in_mbs - 1) & 0xFFFF)); + OUT_BCS_BATCH(batch, + ((height_in_mbs - 1) << 16) | + ((width_in_mbs - 1) << 0)); + /* DW3 QP setting */ + OUT_BCS_BATCH(batch, + (0 << 24) | /* Second Chroma QP Offset */ + (0 << 16) | /* Chroma QP Offset */ + (0 << 14) | /* Max-bit conformance Intra flag */ + (0 << 13) | /* Max Macroblock size conformance Inter flag */ + (pPicParameter->pic_fields.bits.weighted_pred_flag << 12) | /*Weighted_Pred_Flag */ + (pPicParameter->pic_fields.bits.weighted_bipred_idc << 10) | /* Weighted_BiPred_Idc */ + (0 << 8) | /* FIXME: Image Structure */ + (0 << 0) ); /* Current Decoed Image Frame Store ID, reserved in Encode mode */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* Mininum Frame size */ + (0 << 15) | /* Disable reading of Macroblock Status Buffer */ + (0 << 14) | /* Load BitStream Pointer only once, 1 slic 1 frame */ + (0 << 13) | /* CABAC 0 word insertion test enable */ + (1 << 12) | /* MVUnpackedEnable,compliant to DXVA */ + (1 << 10) | /* Chroma Format IDC, 4:2:0 */ + (0 << 8) | /* FIXME: MbMvFormatFlag */ + (pPicParameter->pic_fields.bits.entropy_coding_mode_flag << 7) | /*0:CAVLC encoding mode,1:CABAC*/ + (0 << 6) | /* Only valid for VLD decoding mode */ + (0 << 5) | /* Constrained Intra Predition Flag, from PPS */ + (0 << 4) | /* Direct 8x8 inference flag */ + (pPicParameter->pic_fields.bits.transform_8x8_mode_flag << 3) | /*8x8 or 4x4 IDCT Transform Mode Flag*/ + (1 << 2) | /* Frame MB only flag */ + (0 << 1) | /* MBAFF mode is in active */ + (0 << 0)); /* Field picture flag */ + /* DW5 Trellis quantization */ + OUT_BCS_BATCH(batch, 0); /* Mainly about MB rate control and debug, just ignoring */ + OUT_BCS_BATCH(batch, /* Inter and Intra Conformance Max size limit */ + (0xBB8 << 16) | /* InterMbMaxSz */ + (0xEE8) ); /* IntraMbMaxSz */ + OUT_BCS_BATCH(batch, 0); /* Reserved */ + /* DW8. QP delta */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + OUT_BCS_BATCH(batch, 0); /* Slice QP Delta for bitrate control */ + /* DW10. Bit setting for MB */ + OUT_BCS_BATCH(batch, 0x8C000000); + OUT_BCS_BATCH(batch, 0x00010000); + /* DW12. */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0x02010100); + /* DW14. For short format */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_mfc_qm_state(VADriverContextP ctx, + int qm_type, + unsigned int *qm, + int qm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16); + assert(sizeof(*qm) == 4); + memcpy(qm_buffer, qm, qm_length * 4); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_mfc_avc_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[16] = { + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010 + }; + + gen9_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 12, encoder_context); + gen9_mfc_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 12, encoder_context); + gen9_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 16, encoder_context); + gen9_mfc_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 16, encoder_context); +} + +static void +gen9_mfc_fqm_state(VADriverContextP ctx, + int fqm_type, + unsigned int *fqm, + int fqm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int fqm_buffer[32]; + + assert(fqm_length <= 32); + assert(sizeof(*fqm) == 4); + memcpy(fqm_buffer, fqm, fqm_length * 4); + + BEGIN_BCS_BATCH(batch, 34); + OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2)); + OUT_BCS_BATCH(batch, fqm_type << 0); + intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_mfc_avc_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[32] = { + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000 + }; + + gen9_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 24, encoder_context); + gen9_mfc_fqm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 24, encoder_context); + gen9_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 32, encoder_context); + gen9_mfc_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 32, encoder_context); +} + +static void +gen9_mfc_avc_insert_object(VADriverContextP ctx, struct intel_encoder_context *encoder_context, + unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag, + struct intel_batchbuffer *batch) +{ + if (batch == NULL) + batch = encoder_context->base.batch; + + if (data_bits_in_last_dw == 0) + data_bits_in_last_dw = 32; + + BEGIN_BCS_BATCH(batch, lenght_in_dws + 2); + + OUT_BCS_BATCH(batch, MFX_INSERT_OBJECT | (lenght_in_dws + 2 - 2)); + OUT_BCS_BATCH(batch, + (0 << 16) | /* always start at offset 0 */ + (data_bits_in_last_dw << 8) | + (skip_emul_byte_count << 4) | + (!!emulation_flag << 3) | + ((!!is_last_header) << 2) | + ((!!is_end_of_slice) << 1) | + (0 << 0)); /* FIXME: ??? */ + intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4); + + ADVANCE_BCS_BATCH(batch); +} + + +static void gen9_mfc_init(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + dri_bo *bo; + int i; + int width_in_mbs = 0; + int height_in_mbs = 0; + int slice_batchbuffer_size; + + if (encoder_context->codec == CODEC_H264 || + encoder_context->codec == CODEC_H264_MVC) { + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + width_in_mbs = pSequenceParameter->picture_width_in_mbs; + height_in_mbs = pSequenceParameter->picture_height_in_mbs; + } else { + VAEncSequenceParameterBufferMPEG2 *pSequenceParameter = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + + assert(encoder_context->codec == CODEC_MPEG2); + + width_in_mbs = ALIGN(pSequenceParameter->picture_width, 16) / 16; + height_in_mbs = ALIGN(pSequenceParameter->picture_height, 16) / 16; + } + + slice_batchbuffer_size = 64 * width_in_mbs * height_in_mbs + 4096 + + (SLICE_HEADER + SLICE_TAIL) * encode_state->num_slice_params_ext; + + /*Encode common setup for MFC*/ + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + if (mfc_context->direct_mv_buffers[i].bo != NULL) + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + if (mfc_context->reference_surfaces[i].bo != NULL) + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * 64, + 64); + assert(bo); + mfc_context->intra_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + width_in_mbs * height_in_mbs * 16, + 64); + assert(bo); + mfc_context->macroblock_status_buffer.bo = bo; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 4 * width_in_mbs * 64, /* 4 * width_in_mbs * 64 */ + 64); + assert(bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + 2 * width_in_mbs * 64, /* 2 * width_in_mbs * 64 */ + 0x1000); + assert(bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = bo; + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, slice_batchbuffer_size); + mfc_context->aux_batchbuffer_surface.bo = mfc_context->aux_batchbuffer->buffer; + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.pitch = 16; + mfc_context->aux_batchbuffer_surface.num_blocks = mfc_context->aux_batchbuffer->size / 16; + mfc_context->aux_batchbuffer_surface.size_block = 16; + + i965_gpe_context_init(ctx, &mfc_context->gpe_context); +} + +static void +gen9_mfc_pipe_buf_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int i; + + BEGIN_BCS_BATCH(batch, 61); + + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (61 - 2)); + + /* the DW1-3 is for pre_deblocking */ + if (mfc_context->pre_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->pre_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); /* pre output addr */ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* the DW4-6 is for the post_deblocking */ + + /* post output addr */ + if (mfc_context->post_deblocking_output.bo) + OUT_BCS_RELOC(batch, mfc_context->post_deblocking_output.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW7-9 is for the uncompressed_picture */ + OUT_BCS_RELOC(batch, mfc_context->uncompressed_picture_source.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* uncompressed data */ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW10-12 is for the mb status */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); /* StreamOut data*/ + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW13-15 is for the intra_row_store_scratch */ + OUT_BCS_RELOC(batch, mfc_context->intra_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW16-18 is for the deblocking filter */ + OUT_BCS_RELOC(batch, mfc_context->deblocking_filter_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 19-50 is for Reference pictures*/ + for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + if ( mfc_context->reference_surfaces[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->reference_surfaces[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + + /* The DW 52-54 is for the MB status buffer */ + OUT_BCS_RELOC(batch, mfc_context->macroblock_status_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 55-57 is the ILDB buffer */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW 58-60 is the second ILDB buffer */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_mfc_avc_directmode_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + int i; + + BEGIN_BCS_BATCH(batch, 71); + + OUT_BCS_BATCH(batch, MFX_AVC_DIRECTMODE_STATE | (71 - 2)); + + /* Reference frames and Current frames */ + /* the DW1-32 is for the direct MV for reference */ + for(i = 0; i < NUM_MFC_DMV_BUFFERS - 2; i += 2) { + if ( mfc_context->direct_mv_buffers[i].bo != NULL) { + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, 0); + + /* the DW34-36 is the MV for the current reference */ + OUT_BCS_RELOC(batch, mfc_context->direct_mv_buffers[NUM_MFC_DMV_BUFFERS - 2].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* POL list */ + for(i = 0; i < 32; i++) { + OUT_BCS_BATCH(batch, i/2); + } + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +static void +gen9_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + BEGIN_BCS_BATCH(batch, 10); + + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + OUT_BCS_RELOC(batch, mfc_context->bsd_mpc_row_store_scratch_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW4-6 is for MPR Row Store Scratch Buffer Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* the DW7-9 is for Bitplane Read Buffer Base Address */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +static void gen9_mfc_avc_pipeline_picture_programing( VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, MFX_FORMAT_AVC, encoder_context); + mfc_context->set_surface_state(ctx, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + gen9_mfc_pipe_buf_addr_state(ctx, encoder_context); + gen9_mfc_bsp_buf_base_addr_state(ctx, encoder_context); + mfc_context->avc_img_state(ctx, encode_state, encoder_context); + mfc_context->avc_qm_state(ctx, encoder_context); + mfc_context->avc_fqm_state(ctx, encoder_context); + gen9_mfc_avc_directmode_state(ctx, encoder_context); + intel_mfc_avc_ref_idx_state(ctx, encode_state, encoder_context); +} + + +static VAStatus gen9_mfc_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); //run the pipeline + + return VA_STATUS_SUCCESS; +} + + +static VAStatus +gen9_mfc_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int *encoded_bits_size) +{ + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VACodedBufferSegment *coded_buffer_segment; + + vaStatus = i965_MapBuffer(ctx, pPicParameter->coded_buf, (void **)&coded_buffer_segment); + assert(vaStatus == VA_STATUS_SUCCESS); + *encoded_bits_size = coded_buffer_segment->size * 8; + i965_UnmapBuffer(ctx, pPicParameter->coded_buf); + + return VA_STATUS_SUCCESS; +} + + +static void +gen9_mfc_avc_slice_state(VADriverContextP ctx, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int rate_control_enable, + int qp, + struct intel_batchbuffer *batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int beginmb = slice_param->macroblock_address; + int endmb = beginmb + slice_param->num_macroblocks; + int beginx = beginmb % width_in_mbs; + int beginy = beginmb / width_in_mbs; + int nextx = endmb % width_in_mbs; + int nexty = endmb / width_in_mbs; + int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + int last_slice = (endmb == (width_in_mbs * height_in_mbs)); + int maxQpN, maxQpP; + unsigned char correct[6], grow, shrink; + int i; + int weighted_pred_idc = 0; + unsigned int luma_log2_weight_denom = slice_param->luma_log2_weight_denom; + unsigned int chroma_log2_weight_denom = slice_param->chroma_log2_weight_denom; + int num_ref_l0 = 0, num_ref_l1 = 0; + + if (batch == NULL) + batch = encoder_context->base.batch; + + if (slice_type == SLICE_TYPE_I) { + luma_log2_weight_denom = 0; + chroma_log2_weight_denom = 0; + } else if (slice_type == SLICE_TYPE_P) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + } else if (slice_type == SLICE_TYPE_B) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = pic_param->num_ref_idx_l1_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) { + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + if (weighted_pred_idc == 2) { + /* 8.4.3 - Derivation process for prediction weights (8-279) */ + luma_log2_weight_denom = 5; + chroma_log2_weight_denom = 5; + } + } + + maxQpN = mfc_context->bit_rate_control_context[slice_type].MaxQpNegModifier; + maxQpP = mfc_context->bit_rate_control_context[slice_type].MaxQpPosModifier; + + for (i = 0; i < 6; i++) + correct[i] = mfc_context->bit_rate_control_context[slice_type].Correct[i]; + + grow = mfc_context->bit_rate_control_context[slice_type].GrowInit + + (mfc_context->bit_rate_control_context[slice_type].GrowResistance << 4); + shrink = mfc_context->bit_rate_control_context[slice_type].ShrinkInit + + (mfc_context->bit_rate_control_context[slice_type].ShrinkResistance << 4); + + BEGIN_BCS_BATCH(batch, 11);; + + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2) ); + OUT_BCS_BATCH(batch, slice_type); /*Slice Type: I:P:B Slice*/ + + OUT_BCS_BATCH(batch, + (num_ref_l0 << 16) | + (num_ref_l1 << 24) | + (chroma_log2_weight_denom << 8) | + (luma_log2_weight_denom << 0)); + + OUT_BCS_BATCH(batch, + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag<<29) | /*Direct Prediction Type*/ + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + (qp<<16) | /*Slice Quantization Parameter*/ + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + OUT_BCS_BATCH(batch, + (beginy << 24) | /*First MB X&Y , the begin postion of current slice*/ + (beginx << 16) | + slice_param->macroblock_address ); + OUT_BCS_BATCH(batch, (nexty << 16) | nextx); /*Next slice first MB X&Y*/ + OUT_BCS_BATCH(batch, + (0/*rate_control_enable*/ << 31) | /*in CBR mode RateControlCounterEnable = enable*/ + (1 << 30) | /*ResetRateControlCounter*/ + (0 << 28) | /*RC Triggle Mode = Always Rate Control*/ + (4 << 24) | /*RC Stable Tolerance, middle level*/ + (0/*rate_control_enable*/ << 23) | /*RC Panic Enable*/ + (0 << 22) | /*QP mode, don't modfiy CBP*/ + (0 << 21) | /*MB Type Direct Conversion Enabled*/ + (0 << 20) | /*MB Type Skip Conversion Enabled*/ + (last_slice << 19) | /*IsLastSlice*/ + (0 << 18) | /*BitstreamOutputFlag Compressed BitStream Output Disable Flag 0:enable 1:disable*/ + (1 << 17) | /*HeaderPresentFlag*/ + (1 << 16) | /*SliceData PresentFlag*/ + (1 << 15) | /*TailPresentFlag*/ + (1 << 13) | /*RBSP NAL TYPE*/ + (0 << 12) ); /*CabacZeroWordInsertionEnable*/ + OUT_BCS_BATCH(batch, mfc_context->mfc_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, + (maxQpN << 24) | /*Target QP - 24 is lowest QP*/ + (maxQpP << 16) | /*Target QP + 20 is highest QP*/ + (shrink << 8) | + (grow << 0)); + OUT_BCS_BATCH(batch, + (correct[5] << 20) | + (correct[4] << 16) | + (correct[3] << 12) | + (correct[2] << 8) | + (correct[1] << 4) | + (correct[0] << 0)); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + + +#ifdef MFC_SOFTWARE_HASWELL + +static int +gen9_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, + int qp,unsigned int *msg, + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size, unsigned char max_mb_size, + struct intel_batchbuffer *batch) +{ + int len_in_dwords = 12; + unsigned int intra_msg; +#define INTRA_MSG_FLAG (1 << 13) +#define INTRA_MBTYPE_MASK (0x1F0000) + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + intra_msg = msg[0] & 0xC0FF; + intra_msg |= INTRA_MSG_FLAG; + intra_msg |= ((msg[0] & INTRA_MBTYPE_MASK) >> 8); + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + (0 << 24) | /* PackedMvNum, Debug*/ + (0 << 20) | /* No motion vector */ + (1 << 19) | /* CbpDcY */ + (1 << 18) | /* CbpDcU */ + (1 << 17) | /* CbpDcV */ + intra_msg); + + OUT_BCS_BATCH(batch, (0xFFFF << 16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ + + OUT_BCS_BATCH(batch, (0 << 27) | (end_mb << 26) | qp); /* Last MB */ + + /*Stuff for Intra MB*/ + OUT_BCS_BATCH(batch, msg[1]); /* We using Intra16x16 no 4x4 predmode*/ + OUT_BCS_BATCH(batch, msg[2]); + OUT_BCS_BATCH(batch, msg[3]&0xFF); + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); + + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +static int +gen9_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, + unsigned int *msg, unsigned int offset, + struct intel_encoder_context *encoder_context, + unsigned char target_mb_size,unsigned char max_mb_size, int slice_type, + struct intel_batchbuffer *batch) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int len_in_dwords = 12; + unsigned int inter_msg = 0; + if (batch == NULL) + batch = encoder_context->base.batch; + { +#define MSG_MV_OFFSET 4 + unsigned int *mv_ptr; + mv_ptr = msg + MSG_MV_OFFSET; + /* MV of VME output is based on 16 sub-blocks. So it is necessary + * to convert them to be compatible with the format of AVC_PAK + * command. + */ + if ((msg[0] & INTER_MODE_MASK) == INTER_8X16) { + /* MV[0] and MV[2] are replicated */ + mv_ptr[4] = mv_ptr[0]; + mv_ptr[5] = mv_ptr[1]; + mv_ptr[2] = mv_ptr[8]; + mv_ptr[3] = mv_ptr[9]; + mv_ptr[6] = mv_ptr[8]; + mv_ptr[7] = mv_ptr[9]; + } else if ((msg[0] & INTER_MODE_MASK) == INTER_16X8) { + /* MV[0] and MV[1] are replicated */ + mv_ptr[2] = mv_ptr[0]; + mv_ptr[3] = mv_ptr[1]; + mv_ptr[4] = mv_ptr[16]; + mv_ptr[5] = mv_ptr[17]; + mv_ptr[6] = mv_ptr[24]; + mv_ptr[7] = mv_ptr[25]; + } else if (((msg[0] & INTER_MODE_MASK) == INTER_8X8) && + !(msg[1] & SUBMB_SHAPE_MASK)) { + /* Don't touch MV[0] or MV[1] */ + mv_ptr[2] = mv_ptr[8]; + mv_ptr[3] = mv_ptr[9]; + mv_ptr[4] = mv_ptr[16]; + mv_ptr[5] = mv_ptr[17]; + mv_ptr[6] = mv_ptr[24]; + mv_ptr[7] = mv_ptr[25]; + } + } + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, MFC_AVC_PAK_OBJECT | (len_in_dwords - 2)); + + inter_msg = 32; + /* MV quantity */ + if ((msg[0] & INTER_MODE_MASK) == INTER_8X8) { + if (msg[1] & SUBMB_SHAPE_MASK) + inter_msg = 128; + } + OUT_BCS_BATCH(batch, inter_msg); /* 32 MV*/ + OUT_BCS_BATCH(batch, offset); + inter_msg = msg[0] & (0x1F00FFFF); + inter_msg |= INTER_MV8; + inter_msg |= ((1 << 19) | (1 << 18) | (1 << 17)); + if (((msg[0] & INTER_MODE_MASK) == INTER_8X8) && + (msg[1] & SUBMB_SHAPE_MASK)) { + inter_msg |= INTER_MV32; + } + + OUT_BCS_BATCH(batch, inter_msg); + + OUT_BCS_BATCH(batch, (0xFFFF<<16) | (y << 8) | x); /* Code Block Pattern for Y*/ + OUT_BCS_BATCH(batch, 0x000F000F); /* Code Block Pattern */ +#if 0 + if ( slice_type == SLICE_TYPE_B) { + OUT_BCS_BATCH(batch, (0xF<<28) | (end_mb << 26) | qp); /* Last MB */ + } else { + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ + } +#else + OUT_BCS_BATCH(batch, (end_mb << 26) | qp); /* Last MB */ +#endif + + inter_msg = msg[1] >> 8; + /*Stuff for Inter MB*/ + OUT_BCS_BATCH(batch, inter_msg); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[0]); + OUT_BCS_BATCH(batch, vme_context->ref_index_in_mb[1]); + + /*MaxSizeInWord and TargetSzieInWord*/ + OUT_BCS_BATCH(batch, (max_mb_size << 24) | + (target_mb_size << 16) ); + + OUT_BCS_BATCH(batch, 0x0); + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +#define AVC_INTRA_RDO_OFFSET 4 +#define AVC_INTER_RDO_OFFSET 10 +#define AVC_INTER_MSG_OFFSET 8 +#define AVC_INTER_MV_OFFSET 48 +#define AVC_RDO_MASK 0xFFFF + +static void +gen9_mfc_avc_pipeline_slice_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + unsigned int *msg = NULL, offset = 0; + unsigned char *msg_ptr = NULL; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int i,x,y; + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int is_intra = slice_type == SLICE_TYPE_I; + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + qp_slice = qp; + } + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + gen9_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, encoder_context, + (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch); + + if ( slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + dri_bo_map(vme_context->vme_output.bo , 1); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + + if (is_intra) { + msg = (unsigned int *) (msg_ptr + pSliceParameter->macroblock_address * vme_context->vme_output.size_block); + } else { + msg = (unsigned int *) (msg_ptr + pSliceParameter->macroblock_address * vme_context->vme_output.size_block); + } + + for (i = pSliceParameter->macroblock_address; + i < pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks; i++) { + int last_mb = (i == (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks - 1) ); + x = i % width_in_mbs; + y = i / width_in_mbs; + msg = (unsigned int *) (msg_ptr + i * vme_context->vme_output.size_block); + + if (is_intra) { + assert(msg); + gen9_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + } else { + int inter_rdo, intra_rdo; + inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK; + intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK; + offset = i * vme_context->vme_output.size_block + AVC_INTER_MV_OFFSET; + if (intra_rdo < inter_rdo) { + gen9_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch); + } else { + msg += AVC_INTER_MSG_OFFSET; + gen9_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, msg, offset, encoder_context, 0, 0, pSliceParameter->slice_type, slice_batch); + } + } + } + + dri_bo_unmap(vme_context->vme_output.bo); + + if ( last_slice ) { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 2, 8, + 2, 1, 1, 0, slice_batch); + } else { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 1, 8, + 1, 1, 1, 0, slice_batch); + } + + +} + +static dri_bo * +gen9_mfc_avc_software_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + dri_bo *batch_bo; + int i; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + gen9_mfc_avc_pipeline_slice_programing(ctx, encode_state, encoder_context, i, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +#else + +static void +gen9_mfc_batchbuffer_surfaces_input(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + assert(vme_context->vme_output.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(BIND_IDX_VME_OUTPUT), + SURFACE_STATE_OFFSET(BIND_IDX_VME_OUTPUT)); + assert(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &mfc_context->aux_batchbuffer_surface, + BINDING_TABLE_OFFSET(BIND_IDX_MFC_SLICE_HEADER), + SURFACE_STATE_OFFSET(BIND_IDX_MFC_SLICE_HEADER)); +} + +static void +gen9_mfc_batchbuffer_surfaces_output(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + mfc_context->mfc_batchbuffer_surface.num_blocks = width_in_mbs * height_in_mbs + encode_state->num_slice_params_ext * 8 + 1; + mfc_context->mfc_batchbuffer_surface.size_block = 16 * CMD_LEN_IN_OWORD; /* 3 OWORDs */ + mfc_context->mfc_batchbuffer_surface.pitch = 16; + mfc_context->mfc_batchbuffer_surface.bo = dri_bo_alloc(i965->intel.bufmgr, + "MFC batchbuffer", + mfc_context->mfc_batchbuffer_surface.num_blocks * mfc_context->mfc_batchbuffer_surface.size_block, + 0x1000); + mfc_context->buffer_suface_setup(ctx, + &mfc_context->gpe_context, + &mfc_context->mfc_batchbuffer_surface, + BINDING_TABLE_OFFSET(BIND_IDX_MFC_BATCHBUFFER), + SURFACE_STATE_OFFSET(BIND_IDX_MFC_BATCHBUFFER)); +} + +static void +gen9_mfc_batchbuffer_surfaces_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen9_mfc_batchbuffer_surfaces_input(ctx, encode_state, encoder_context); + gen9_mfc_batchbuffer_surfaces_output(ctx, encode_state, encoder_context); +} + +static void +gen9_mfc_batchbuffer_idrt_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct gen6_interface_descriptor_data *desc; + int i; + dri_bo *bo; + + bo = mfc_context->gpe_context.idrt.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc = bo->virtual; + + for (i = 0; i < mfc_context->gpe_context.num_kernels; i++) { + struct i965_kernel *kernel; + + kernel = &mfc_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = (kernel->bo->offset >> 6); + desc->desc2.sampler_count = 0; + desc->desc2.sampler_state_pointer = 0; + desc->desc3.binding_table_entry_count = 2; + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + desc->desc4.constant_urb_entry_read_length = 4; + + /*kernel start*/ + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0, + i * sizeof(*desc) + offsetof(struct gen6_interface_descriptor_data, desc0), + kernel->bo); + desc++; + } + + dri_bo_unmap(bo); +} + +static void +gen9_mfc_batchbuffer_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + (void)mfc_context; +} + +static void +gen9_mfc_batchbuffer_emit_object_command(struct intel_batchbuffer *batch, + int index, + int head_offset, + int batchbuffer_offset, + int head_size, + int tail_size, + int number_mb_cmds, + int first_object, + int last_object, + int last_slice, + int mb_x, + int mb_y, + int width_in_mbs, + int qp) +{ + BEGIN_BATCH(batch, 12); + + OUT_BATCH(batch, CMD_MEDIA_OBJECT | (12 - 2)); + OUT_BATCH(batch, index); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /*inline data */ + OUT_BATCH(batch, head_offset); + OUT_BATCH(batch, batchbuffer_offset); + OUT_BATCH(batch, + head_size << 16 | + tail_size); + OUT_BATCH(batch, + number_mb_cmds << 16 | + first_object << 2 | + last_object << 1 | + last_slice); + OUT_BATCH(batch, + mb_y << 8 | + mb_x); + OUT_BATCH(batch, + qp << 16 | + width_in_mbs); + + ADVANCE_BATCH(batch); +} + +static void +gen9_mfc_avc_batchbuffer_slice_command(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncSliceParameterBufferH264 *slice_param, + int head_offset, + unsigned short head_size, + unsigned short tail_size, + int batchbuffer_offset, + int qp, + int last_slice) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int total_mbs = slice_param->num_macroblocks; + int number_mb_cmds = 128; + int starting_mb = 0; + int last_object = 0; + int first_object = 1; + int i; + int mb_x, mb_y; + int index = (slice_param->slice_type == SLICE_TYPE_I) ? MFC_BATCHBUFFER_AVC_INTRA : MFC_BATCHBUFFER_AVC_INTER; + + for (i = 0; i < total_mbs / number_mb_cmds; i++) { + last_object = (total_mbs - starting_mb) == number_mb_cmds; + mb_x = (slice_param->macroblock_address + starting_mb) % width_in_mbs; + mb_y = (slice_param->macroblock_address + starting_mb) / width_in_mbs; + assert(mb_x <= 255 && mb_y <= 255); + + starting_mb += number_mb_cmds; + + gen9_mfc_batchbuffer_emit_object_command(batch, + index, + head_offset, + batchbuffer_offset, + head_size, + tail_size, + number_mb_cmds, + first_object, + last_object, + last_slice, + mb_x, + mb_y, + width_in_mbs, + qp); + + if (first_object) { + head_offset += head_size; + batchbuffer_offset += head_size; + } + + if (last_object) { + head_offset += tail_size; + batchbuffer_offset += tail_size; + } + + batchbuffer_offset += number_mb_cmds * CMD_LEN_IN_OWORD; + + first_object = 0; + } + + if (!last_object) { + last_object = 1; + number_mb_cmds = total_mbs % number_mb_cmds; + mb_x = (slice_param->macroblock_address + starting_mb) % width_in_mbs; + mb_y = (slice_param->macroblock_address + starting_mb) / width_in_mbs; + assert(mb_x <= 255 && mb_y <= 255); + starting_mb += number_mb_cmds; + + gen9_mfc_batchbuffer_emit_object_command(batch, + index, + head_offset, + batchbuffer_offset, + head_size, + tail_size, + number_mb_cmds, + first_object, + last_object, + last_slice, + mb_x, + mb_y, + width_in_mbs, + qp); + } +} + +/* + * return size in Owords (16bytes) + */ +static int +gen9_mfc_avc_batchbuffer_slice(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + int batchbuffer_offset) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *slice_batch = mfc_context->aux_batchbuffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + int width_in_mbs = (mfc_context->surface_state.width + 15) / 16; + int height_in_mbs = (mfc_context->surface_state.height + 15) / 16; + int last_slice = (pSliceParameter->macroblock_address + pSliceParameter->num_macroblocks) == (width_in_mbs * height_in_mbs); + int qp = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + unsigned int tail_data[] = { 0x0, 0x0 }; + long head_offset; + int old_used = intel_batchbuffer_used_size(slice_batch), used; + unsigned short head_size, tail_size; + int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type); + int qp_slice; + + qp_slice = qp; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + qp_slice = qp; + } + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + head_offset = old_used / 16; + gen9_mfc_avc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, + encoder_context, + (rate_control_mode == VA_RC_CBR), + qp_slice, + slice_batch); + + if (slice_index == 0) + intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + + intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + used = intel_batchbuffer_used_size(slice_batch); + head_size = (used - old_used) / 16; + old_used = used; + + /* tail */ + if (last_slice) { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 2, + 8, + 2, + 1, + 1, + 0, + slice_batch); + } else { + mfc_context->insert_object(ctx, + encoder_context, + tail_data, + 1, + 8, + 1, + 1, + 1, + 0, + slice_batch); + } + + intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */ + used = intel_batchbuffer_used_size(slice_batch); + tail_size = (used - old_used) / 16; + + gen9_mfc_avc_batchbuffer_slice_command(ctx, + encoder_context, + pSliceParameter, + head_offset, + head_size, + tail_size, + batchbuffer_offset, + qp, + last_slice); + + return head_size + tail_size + pSliceParameter->num_macroblocks * CMD_LEN_IN_OWORD; +} + +static void +gen9_mfc_avc_batchbuffer_pipeline(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + int i, size, offset = 0; + + intel_batchbuffer_start_atomic(batch, 0x4000); + gen6_gpe_pipeline_setup(ctx, &mfc_context->gpe_context, batch); + + for ( i = 0; i < encode_state->num_slice_params_ext; i++) { + size = gen9_mfc_avc_batchbuffer_slice(ctx, encode_state, encoder_context, i, offset); + offset += size; + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); +} + +static void +gen9_mfc_build_avc_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen9_mfc_batchbuffer_surfaces_setup(ctx, encode_state, encoder_context); + gen9_mfc_batchbuffer_idrt_setup(ctx, encode_state, encoder_context); + gen9_mfc_batchbuffer_constant_setup(ctx, encode_state, encoder_context); + gen9_mfc_avc_batchbuffer_pipeline(ctx, encode_state, encoder_context); +} + +static dri_bo * +gen9_mfc_avc_hardware_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + + gen9_mfc_build_avc_batchbuffer(ctx, encode_state, encoder_context); + dri_bo_reference(mfc_context->mfc_batchbuffer_surface.bo); + + return mfc_context->mfc_batchbuffer_surface.bo; +} + +#endif + +static void +gen9_mfc_avc_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + + if ( intel_mfc_interlace_check(ctx, encode_state, encoder_context) ) { + fprintf(stderr, "Current VA driver don't support interlace mode!\n"); + assert(0); + return; + } + +#ifdef MFC_SOFTWARE_HASWELL + slice_batch_bo = gen9_mfc_avc_software_batchbuffer(ctx, encode_state, encoder_context); +#else + slice_batch_bo = gen9_mfc_avc_hardware_batchbuffer(ctx, encode_state, encoder_context); +#endif + + // begin programing + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen9_mfc_avc_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + + +static VAStatus +gen9_mfc_avc_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = encoder_context->mfc_context; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int current_frame_bits_size; + int sts; + + for (;;) { + gen9_mfc_init(ctx, encode_state, encoder_context); + intel_mfc_avc_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen9_mfc_avc_pipeline_programing(ctx, encode_state, encoder_context); //filling the pipeline + gen9_mfc_run(ctx, encode_state, encoder_context); + if (rate_control_mode == VA_RC_CBR /*|| rate_control_mode == VA_RC_VBR*/) { + gen9_mfc_stop(ctx, encode_state, encoder_context, ¤t_frame_bits_size); + sts = intel_mfc_brc_postpack(encode_state, mfc_context, current_frame_bits_size); + if (sts == BRC_NO_HRD_VIOLATION) { + intel_mfc_hrd_context_update(encode_state, mfc_context); + break; + } + else if (sts == BRC_OVERFLOW_WITH_MIN_QP || sts == BRC_UNDERFLOW_WITH_MAX_QP) { + if (!mfc_context->hrd.violation_noted) { + fprintf(stderr, "Unrepairable %s!\n", (sts == BRC_OVERFLOW_WITH_MIN_QP)? "overflow": "underflow"); + mfc_context->hrd.violation_noted = 1; + } + return VA_STATUS_SUCCESS; + } + } else { + break; + } + } + + return VA_STATUS_SUCCESS; +} + +static void +gen9_mfc_context_destroy(void *context) +{ + struct gen6_mfc_context *mfc_context = context; + int i; + + dri_bo_unreference(mfc_context->post_deblocking_output.bo); + mfc_context->post_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->pre_deblocking_output.bo); + mfc_context->pre_deblocking_output.bo = NULL; + + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(mfc_context->mfc_indirect_pak_bse_object.bo); + mfc_context->mfc_indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < NUM_MFC_DMV_BUFFERS; i++){ + dri_bo_unreference(mfc_context->direct_mv_buffers[i].bo); + mfc_context->direct_mv_buffers[i].bo = NULL; + } + + dri_bo_unreference(mfc_context->intra_row_store_scratch_buffer.bo); + mfc_context->intra_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->macroblock_status_buffer.bo); + mfc_context->macroblock_status_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->deblocking_filter_row_store_scratch_buffer.bo); + mfc_context->deblocking_filter_row_store_scratch_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->bsd_mpc_row_store_scratch_buffer.bo); + mfc_context->bsd_mpc_row_store_scratch_buffer.bo = NULL; + + + for (i = 0; i < MAX_MFC_REFERENCE_SURFACES; i++){ + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + i965_gpe_context_destroy(&mfc_context->gpe_context); + + dri_bo_unreference(mfc_context->mfc_batchbuffer_surface.bo); + mfc_context->mfc_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = NULL; + + free(mfc_context); +} + +static VAStatus gen9_mfc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus; + + switch (profile) { + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264MultiviewHigh: + case VAProfileH264StereoHigh: + vaStatus = gen9_mfc_avc_encode_picture(ctx, encode_state, encoder_context); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + return vaStatus; +} + +Bool gen9_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_mfc_context *mfc_context = NULL; + +#if MFC_SOFTWARE_HASWELL + if ((encoder_context->codec == CODEC_H264) || + (encoder_context->codec == CODEC_H264_MVC)) { + return gen8_mfc_context_init(ctx, encoder_context); + } +#endif + + if ((encoder_context->codec == CODEC_VP8) || + (encoder_context->codec == CODEC_MPEG2)) + return gen8_mfc_context_init(ctx, encoder_context); + + mfc_context = calloc(1, sizeof(struct gen6_mfc_context)); + assert(mfc_context); + mfc_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + mfc_context->gpe_context.idrt.max_entries = MAX_GPE_KERNELS; + mfc_context->gpe_context.idrt.entry_size = sizeof(struct gen6_interface_descriptor_data); + + mfc_context->gpe_context.curbe.length = 32 * 4; + + mfc_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + mfc_context->gpe_context.vfe_state.num_urb_entries = 16; + mfc_context->gpe_context.vfe_state.gpgpu_mode = 0; + mfc_context->gpe_context.vfe_state.urb_entry_size = 59 - 1; + mfc_context->gpe_context.vfe_state.curbe_allocation_size = 37 - 1; + + i965_gpe_load_kernels(ctx, + &mfc_context->gpe_context, + gen9_mfc_kernels, + NUM_MFC_KERNEL); + + mfc_context->pipe_mode_select = gen9_mfc_pipe_mode_select; + mfc_context->set_surface_state = gen9_mfc_surface_state; + mfc_context->ind_obj_base_addr_state = gen9_mfc_ind_obj_base_addr_state; + mfc_context->avc_img_state = gen9_mfc_avc_img_state; + mfc_context->avc_qm_state = gen9_mfc_avc_qm_state; + mfc_context->avc_fqm_state = gen9_mfc_avc_fqm_state; + mfc_context->insert_object = gen9_mfc_avc_insert_object; + mfc_context->buffer_suface_setup = gen8_gpe_buffer_suface_setup; + + encoder_context->mfc_context = mfc_context; + encoder_context->mfc_context_destroy = gen9_mfc_context_destroy; + encoder_context->mfc_pipeline = gen9_mfc_pipeline; + encoder_context->mfc_brc_prepare = intel_mfc_brc_prepare; + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_mfc.h intel-vaapi-driver-1.7.1/src/gen9_mfc.h --- intel-vaapi-driver-1.0.15/src/gen9_mfc.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_mfc.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,288 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Qu Pengfei + * + */ + +#ifndef GEN9_MFC_H +#define GEN9_MFC_H + +#include +#include +#include + +#include "i965_gpe_utils.h" + +struct encode_state; + +#define MAX_HCP_REFERENCE_SURFACES 8 +#define NUM_HCP_CURRENT_COLLOCATED_MV_TEMPORAL_BUFFERS 9 + +#define INTRA_MB_FLAG_MASK 0x00002000 + +/* The space required for slice header SLICE_STATE + header. + * Is it enough? */ +#define SLICE_HEADER 80 + +/* the space required for slice tail. */ +#define SLICE_TAIL 16 + +#define __SOFTWARE__ 0 + +#define HCP_BATCHBUFFER_HEVC_INTRA 0 +#define HCP_BATCHBUFFER_HEVC_INTER 1 +#define NUM_HCP_KERNEL 2 + +#define BIND_IDX_VME_OUTPUT 0 +#define BIND_IDX_HCP_SLICE_HEADER 1 +#define BIND_IDX_HCP_BATCHBUFFER 2 + +#define CMD_LEN_IN_OWORD 4 + +struct gen9_hcpe_context { + struct { + unsigned int width; + unsigned int height; + unsigned int w_pitch; + unsigned int h_pitch; + } surface_state; + + //HCP_PIPE_BUF_ADDR_STATE + + struct { + dri_bo *bo; + } deblocking_filter_line_buffer; //OUTPUT: reconstructed picture with deblocked + + struct { + dri_bo *bo; + } deblocking_filter_tile_line_buffer; //OUTPUT: reconstructed picture with deblocked + + struct { + dri_bo *bo; + } deblocking_filter_tile_column_buffer; //OUTPUT: reconstructed picture with deblocked + + struct { + dri_bo *bo; + } uncompressed_picture_source; //INPUT: original compressed image + + struct { + dri_bo *bo; + } metadata_line_buffer; //INTERNAL:metadata + + struct { + dri_bo *bo; + } metadata_tile_line_buffer; //INTERNAL:metadata + + struct { + dri_bo *bo; + } metadata_tile_column_buffer; //INTERNAL:metadata + + struct { + dri_bo *bo; + } sao_line_buffer; //INTERNAL:SAO not used in skylake + + struct { + dri_bo *bo; + } sao_tile_line_buffer; //INTERNAL:SAO not used in skylake + + struct { + dri_bo *bo; + } sao_tile_column_buffer; //INTERNAL:SAO not used in skylake + + struct { + dri_bo *bo; + } current_collocated_mv_temporal_buffer[NUM_HCP_CURRENT_COLLOCATED_MV_TEMPORAL_BUFFERS]; // + + struct { + dri_bo *bo; + } reference_surfaces[MAX_HCP_REFERENCE_SURFACES]; //INTERNAL: refrence surfaces + + //HCP_IND_OBJ_BASE_ADDR_STATE + struct { + dri_bo *bo; + } hcp_indirect_cu_object; //INPUT: the cu' mv info + + struct { + dri_bo *bo; + int offset; + int end_offset; + } hcp_indirect_pak_bse_object; //OUTPUT: the compressed bitstream + + //Bit rate tracking context + struct { + unsigned int QpPrimeY; + unsigned int MaxQpNegModifier; + unsigned int MaxQpPosModifier; + unsigned char MaxSizeInWord; + unsigned char TargetSizeInWord; + unsigned char Correct[6]; + unsigned char GrowInit; + unsigned char GrowResistance; + unsigned char ShrinkInit; + unsigned char ShrinkResistance; + + unsigned int target_mb_size; + unsigned int target_frame_size; + } bit_rate_control_context[3]; //INTERNAL: for I, P, B frames + + struct { + int mode; + int gop_nums[3]; + int target_frame_size[3]; // I,P,B + double bits_per_frame; + double qpf_rounding_accumulator; + + double saved_bps; + double saved_fps; + int saved_intra_period; + int saved_ip_period; + int saved_idr_period; + } brc; + + struct { + double current_buffer_fullness; + double target_buffer_fullness; + double buffer_capacity; + unsigned int buffer_size; + unsigned int violation_noted; + } hrd; + + //HRD control context + struct { + int i_bit_rate_value; // scale? + int i_cpb_size_value; // scale? + + int i_initial_cpb_removal_delay; + int i_cpb_removal_delay; + + int i_frame_number; + + int i_initial_cpb_removal_delay_length; + int i_cpb_removal_delay_length; + int i_dpb_output_delay_length; + } vui_hrd; + + // picture width and height + struct { + uint16_t picture_width_in_samples; + uint16_t picture_height_in_samples; + uint16_t picture_width_in_ctbs; + uint16_t picture_height_in_ctbs; + uint16_t picture_width_in_min_cb_minus1; + uint16_t picture_height_in_min_cb_minus1; + uint16_t picture_width_in_mbs; /* to use on skylake */ + uint16_t picture_height_in_mbs;/* to sue on skylake */ + uint8_t ctb_size; + uint8_t min_cb_size; + } pic_size; + + VAQMatrixBufferHEVC iq_matrix_hevc; + + struct i965_gpe_context gpe_context; + struct i965_buffer_surface hcp_batchbuffer_surface; + struct intel_batchbuffer *aux_batchbuffer; + struct i965_buffer_surface aux_batchbuffer_surface; + + void (*pipe_mode_select)(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context); + void (*set_surface_state)(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + void (*ind_obj_base_addr_state)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); + void (*fqm_state)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); + void (*qm_state)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context); + void (*pic_state)(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + void (*insert_object)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + unsigned int *insert_data, + int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, + int is_last_header, int is_end_of_slice, + int emulation_flag, + struct intel_batchbuffer *batch); + void (*buffer_suface_setup)(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +}; + +VAStatus gen9_hcpe_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +/* HEVC BRC */ +extern int intel_hcpe_update_hrd(struct encode_state *encode_state, + struct gen9_hcpe_context *hcpe_context, + int frame_bits); + +extern int intel_hcpe_brc_postpack(struct encode_state *encode_state, + struct gen9_hcpe_context *hcpe_context, + int frame_bits); + +extern void intel_hcpe_hrd_context_update(struct encode_state *encode_state, + struct gen9_hcpe_context *hcpe_context); + +extern int intel_hcpe_interlace_check(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern void intel_hcpe_brc_prepare(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +/* HEVC HCP pipeline */ +extern void intel_hcpe_hevc_pipeline_header_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch); + +extern VAStatus intel_hcpe_hevc_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern void +intel_hcpe_hevc_ref_idx_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + +extern void +intel_hevc_slice_insert_packed_data(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch); + +extern +Bool gen9_hcpe_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +void gen9_hcpe_context_destroy(void *context); + +#endif /* GEN9_MFC_H */ diff -Nru intel-vaapi-driver-1.0.15/src/gen9_mfc_hevc.c intel-vaapi-driver-1.7.1/src/gen9_mfc_hevc.c --- intel-vaapi-driver-1.0.15/src/gen9_mfc_hevc.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_mfc_hevc.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,2774 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Qu Pengfei + * + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "gen9_mfc.h" +#include "gen6_vme.h" +#include "intel_media.h" + +typedef enum _gen6_brc_status { + BRC_NO_HRD_VIOLATION = 0, + BRC_UNDERFLOW = 1, + BRC_OVERFLOW = 2, + BRC_UNDERFLOW_WITH_MAX_QP = 3, + BRC_OVERFLOW_WITH_MIN_QP = 4, +} gen6_brc_status; + +/* BRC define */ +#define BRC_CLIP(x, min, max) \ + { \ + x = ((x > (max)) ? (max) : ((x < (min)) ? (min) : x)); \ + } + +#define BRC_P_B_QP_DIFF 4 +#define BRC_I_P_QP_DIFF 2 +#define BRC_I_B_QP_DIFF (BRC_I_P_QP_DIFF + BRC_P_B_QP_DIFF) + +#define BRC_PWEIGHT 0.6 /* weight if P slice with comparison to I slice */ +#define BRC_BWEIGHT 0.25 /* weight if B slice with comparison to I slice */ + +#define BRC_QP_MAX_CHANGE 5 /* maximum qp modification */ +#define BRC_CY 0.1 /* weight for */ +#define BRC_CX_UNDERFLOW 5. +#define BRC_CX_OVERFLOW -4. + +#define BRC_PI_0_5 1.5707963267948966192313216916398 + +/* intel buffer write */ +#define ALLOC_ENCODER_BUFFER(gen_buffer, string, size) do { \ + dri_bo_unreference(gen_buffer->bo); \ + gen_buffer->bo = dri_bo_alloc(i965->intel.bufmgr, \ + string, \ + size, \ + 0x1000); \ + assert(gen_buffer->bo); \ + } while (0); + + +#define OUT_BUFFER_X(buf_bo, is_target, ma) do { \ + if (buf_bo) { \ + OUT_BCS_RELOC(batch, \ + buf_bo, \ + I915_GEM_DOMAIN_INSTRUCTION, \ + is_target ? I915_GEM_DOMAIN_INSTRUCTION : 0, \ + 0); \ + } else { \ + OUT_BCS_BATCH(batch, 0); \ + } \ + OUT_BCS_BATCH(batch, 0); \ + if (ma) \ + OUT_BCS_BATCH(batch, 0); \ + } while (0) + +#define OUT_BUFFER_MA_TARGET(buf_bo) OUT_BUFFER_X(buf_bo, 1, 1) +#define OUT_BUFFER_MA_REFERENCE(buf_bo) OUT_BUFFER_X(buf_bo, 0, 1) +#define OUT_BUFFER_NMA_TARGET(buf_bo) OUT_BUFFER_X(buf_bo, 1, 0) +#define OUT_BUFFER_NMA_REFERENCE(buf_bo) OUT_BUFFER_X(buf_bo, 0, 0) + + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define HCP_SOFTWARE_SKYLAKE 1 + +#define NUM_HCPE_KERNEL 2 + +#define INTER_MODE_MASK 0x03 +#define INTER_8X8 0x03 +#define INTER_16X8 0x01 +#define INTER_8X16 0x02 +#define SUBMB_SHAPE_MASK 0x00FF00 + +#define INTER_MV8 (4 << 20) +#define INTER_MV32 (6 << 20) + + +/* HEVC */ + +/* utils */ +static void +hevc_gen_default_iq_matrix_encoder(VAQMatrixBufferHEVC *iq_matrix) +{ + /* Flat_4x4_16 */ + memset(&iq_matrix->scaling_lists_4x4, 16, sizeof(iq_matrix->scaling_lists_4x4)); + + /* Flat_8x8_16 */ + memset(&iq_matrix->scaling_lists_8x8, 16, sizeof(iq_matrix->scaling_lists_8x8)); + + /* Flat_16x16_16 */ + memset(&iq_matrix->scaling_lists_16x16, 16, sizeof(iq_matrix->scaling_lists_16x16)); + + /* Flat_32x32_16 */ + memset(&iq_matrix->scaling_lists_32x32, 16, sizeof(iq_matrix->scaling_lists_32x32)); + + /* Flat_16x16_dc_16 */ + memset(&iq_matrix->scaling_list_dc_16x16, 16, sizeof(iq_matrix->scaling_list_dc_16x16)); + + /* Flat_32x32_dc_16 */ + memset(&iq_matrix->scaling_list_dc_32x32, 16, sizeof(iq_matrix->scaling_list_dc_32x32)); +} + +/* HEVC picture and slice state related */ + +static void +gen9_hcpe_pipe_mode_select(VADriverContextP ctx, + int standard_select, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = encoder_context->base.batch; + + assert(standard_select == HCP_CODEC_HEVC); + + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (6 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 4); + + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (4 - 2)); + } + + OUT_BCS_BATCH(batch, + (standard_select << 5) | + (0 << 3) | /* disable Pic Status / Error Report */ + HCP_CODEC_SELECT_ENCODE); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + if(IS_KBL(i965->intel.device_info)) + { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpe_surface_state(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct object_surface *obj_surface = encode_state->reconstructed_object; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + + /* to do */ + unsigned int y_cb_offset; + + assert(obj_surface); + + y_cb_offset = obj_surface->y_cb_offset; + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (1 << 28) | /* surface id */ + (mfc_context->surface_state.w_pitch - 1)); /* pitch - 1 */ + OUT_BCS_BATCH(batch, + (SURFACE_FORMAT_PLANAR_420_8 << 28) | + y_cb_offset); + ADVANCE_BCS_BATCH(batch); + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (0 << 28) | /* surface id */ + (mfc_context->surface_state.w_pitch - 1)); /* pitch - 1 */ + OUT_BCS_BATCH(batch, + (SURFACE_FORMAT_PLANAR_420_8 << 28) | + y_cb_offset); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpe_pipe_buf_addr_state(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + GenHevcSurface *hcpe_hevc_surface; + dri_bo *bo; + unsigned int i; + + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 104); + + OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (104 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 95); + + OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (95 - 2)); + } + + obj_surface = encode_state->reconstructed_object; + assert(obj_surface && obj_surface->bo); + hcpe_hevc_surface = obj_surface->private_data; + assert(hcpe_hevc_surface && hcpe_hevc_surface->motion_vector_temporal_bo); + + OUT_BUFFER_MA_TARGET(obj_surface->bo); /* DW 1..3 */ + OUT_BUFFER_MA_TARGET(mfc_context->deblocking_filter_line_buffer.bo);/* DW 4..6 */ + OUT_BUFFER_MA_TARGET(mfc_context->deblocking_filter_tile_line_buffer.bo); /* DW 7..9 */ + OUT_BUFFER_MA_TARGET(mfc_context->deblocking_filter_tile_column_buffer.bo); /* DW 10..12 */ + OUT_BUFFER_MA_TARGET(mfc_context->metadata_line_buffer.bo); /* DW 13..15 */ + OUT_BUFFER_MA_TARGET(mfc_context->metadata_tile_line_buffer.bo); /* DW 16..18 */ + OUT_BUFFER_MA_TARGET(mfc_context->metadata_tile_column_buffer.bo); /* DW 19..21 */ + OUT_BUFFER_MA_TARGET(mfc_context->sao_line_buffer.bo); /* DW 22..24 */ + OUT_BUFFER_MA_TARGET(mfc_context->sao_tile_line_buffer.bo); /* DW 25..27 */ + OUT_BUFFER_MA_TARGET(mfc_context->sao_tile_column_buffer.bo); /* DW 28..30 */ + OUT_BUFFER_MA_TARGET(hcpe_hevc_surface->motion_vector_temporal_bo); /* DW 31..33 */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 34..36, reserved */ + + /* here only max 8 reference allowed */ + for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) { + bo = mfc_context->reference_surfaces[i].bo; + + if (bo) { + OUT_BUFFER_NMA_REFERENCE(bo); + } else + OUT_BUFFER_NMA_REFERENCE(NULL); + } + OUT_BCS_BATCH(batch, 0); /* DW 53, memory address attributes */ + + OUT_BUFFER_MA_TARGET(mfc_context->uncompressed_picture_source.bo); /* DW 54..56, uncompressed picture source */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 57..59, ignore */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 60..62, ignore */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 63..65, ignore */ + + for (i = 0; i < ARRAY_ELEMS(mfc_context->current_collocated_mv_temporal_buffer) - 1; i++) { + bo = mfc_context->current_collocated_mv_temporal_buffer[i].bo; + + if (bo) { + OUT_BUFFER_NMA_REFERENCE(bo); + } else + OUT_BUFFER_NMA_REFERENCE(NULL); + } + OUT_BCS_BATCH(batch, 0); /* DW 82, memory address attributes */ + + OUT_BUFFER_MA_TARGET(NULL); /* DW 83..85, ignore for HEVC */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 86..88, ignore for HEVC */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 89..91, ignore for HEVC */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 92..94, ignore for HEVC */ + + if(IS_KBL(i965->intel.device_info)) + { + for(i = 0;i < 9;i++) + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpe_ind_obj_base_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + + /* to do */ + BEGIN_BCS_BATCH(batch, 14); + + OUT_BCS_BATCH(batch, HCP_IND_OBJ_BASE_ADDR_STATE | (14 - 2)); + OUT_BUFFER_MA_REFERENCE(NULL); /* DW 1..3 igonre for encoder*/ + OUT_BUFFER_NMA_REFERENCE(NULL); /* DW 4..5, Upper Bound */ + OUT_BUFFER_MA_TARGET(mfc_context->hcp_indirect_cu_object.bo); /* DW 6..8, CU */ + /* DW 9..11, PAK-BSE */ + OUT_BCS_RELOC(batch, + mfc_context->hcp_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->hcp_indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_RELOC(batch, + mfc_context->hcp_indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + mfc_context->hcp_indirect_pak_bse_object.end_offset); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpe_fqm_state(VADriverContextP ctx, + int size_id, + int color_component, + int pred_type, + int dc, + unsigned int *fqm, + int fqm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int fqm_buffer[32]; + + assert(fqm_length <= 32); + assert(sizeof(*fqm) == 4); + memset(fqm_buffer, 0, sizeof(fqm_buffer)); + memcpy(fqm_buffer, fqm, fqm_length * 4); + + BEGIN_BCS_BATCH(batch, 34); + + OUT_BCS_BATCH(batch, HCP_FQM_STATE | (34 - 2)); + OUT_BCS_BATCH(batch, + dc << 16 | + color_component << 3 | + size_id << 1 | + pred_type); + intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); + + ADVANCE_BCS_BATCH(batch); +} + + +static void +gen9_hcpe_hevc_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + unsigned int qm[32] = { + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000 + }; + + gen9_hcpe_fqm_state(ctx, + 0, 0, 0, 0, + qm, 8, + encoder_context); + gen9_hcpe_fqm_state(ctx, + 0, 0, 1, 0, + qm, 8, + encoder_context); + gen9_hcpe_fqm_state(ctx, + 1, 0, 0, 0, + qm, 32, + encoder_context); + gen9_hcpe_fqm_state(ctx, + 1, 0, 1, 0, + qm, 32, + encoder_context); + gen9_hcpe_fqm_state(ctx, + 2, 0, 0, 0x1000, + qm, 0, + encoder_context); + gen9_hcpe_fqm_state(ctx, + 2, 0, 1, 0x1000, + qm, 0, + encoder_context); + gen9_hcpe_fqm_state(ctx, + 3, 0, 0, 0x1000, + qm, 0, + encoder_context); + gen9_hcpe_fqm_state(ctx, + 3, 0, 1, 0x1000, + qm, 0, + encoder_context); +} + +static void +gen9_hcpe_qm_state(VADriverContextP ctx, + int size_id, + int color_component, + int pred_type, + int dc, + unsigned int *qm, + int qm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16); + assert(sizeof(*qm) == 4); + memset(qm_buffer, 0, sizeof(qm_buffer)); + memcpy(qm_buffer, qm, qm_length * 4); + + BEGIN_BCS_BATCH(batch, 18); + + OUT_BCS_BATCH(batch, HCP_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, + dc << 5 | + color_component << 3 | + size_id << 1 | + pred_type); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpe_hevc_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + + int i; + + unsigned int qm[16] = { + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010 + }; + + for (i = 0; i < 6; i++) { + gen9_hcpe_qm_state(ctx, + 0, i % 3, i / 3, 0, + qm, 4, + encoder_context); + } + + for (i = 0; i < 6; i++) { + gen9_hcpe_qm_state(ctx, + 1, i % 3, i / 3, 0, + qm, 16, + encoder_context); + } + + for (i = 0; i < 6; i++) { + gen9_hcpe_qm_state(ctx, + 2, i % 3, i / 3, 16, + qm, 16, + encoder_context); + } + + for (i = 0; i < 2; i++) { + gen9_hcpe_qm_state(ctx, + 3, 0, i % 2, 16, + qm, 16, + encoder_context); + } +} + +static void +gen9_hcpe_hevc_pic_state(VADriverContextP ctx, struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + VAEncPictureParameterBufferHEVC *pic_param ; + VAEncSequenceParameterBufferHEVC *seq_param ; + + int max_pcm_size_minus3 = 0, min_pcm_size_minus3 = 0; + int pcm_sample_bit_depth_luma_minus1 = 7, pcm_sample_bit_depth_chroma_minus1 = 7; + /* + * 7.4.3.1 + * + * When not present, the value of loop_filter_across_tiles_enabled_flag + * is inferred to be equal to 1. + */ + int loop_filter_across_tiles_enabled_flag = 0; + pic_param = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + seq_param = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + + int log2_cu_size = seq_param->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = seq_param->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + int ctb_size = 1 << log2_ctb_size; + double rawctubits = 8 * 3 * ctb_size * ctb_size / 2.0; + int maxctubits = (int)(5 * rawctubits / 3) ; + double bitrate = seq_param->bits_per_second * 1.0; + double framebitrate = bitrate / 32 / 8; //32 byte unit + int minframebitrate = 0;//(int) (framebitrate * 3 / 10); + int maxframebitrate = (int)(framebitrate * 10 / 10); + int maxdeltaframebitrate = 0x1c5c; //(int) (framebitrate * 1/ 10); + int mindeltaframebitrate = 0; //(int) (framebitrate * 1/ 10); + int minframesize = 0;//(int)(rawframebits * 1/50); + + if (seq_param->seq_fields.bits.pcm_enabled_flag) { + max_pcm_size_minus3 = seq_param->log2_max_pcm_luma_coding_block_size_minus3; + min_pcm_size_minus3 = seq_param->log2_min_pcm_luma_coding_block_size_minus3; + pcm_sample_bit_depth_luma_minus1 = (seq_param->pcm_sample_bit_depth_luma_minus1 & 0x0f); + pcm_sample_bit_depth_chroma_minus1 = (seq_param->pcm_sample_bit_depth_chroma_minus1 & 0x0f); + } else { + max_pcm_size_minus3 = MIN(seq_param->log2_min_luma_coding_block_size_minus3 + seq_param->log2_diff_max_min_luma_coding_block_size, 2); + } + + if (pic_param->pic_fields.bits.tiles_enabled_flag) + loop_filter_across_tiles_enabled_flag = pic_param->pic_fields.bits.loop_filter_across_tiles_enabled_flag; + + /* set zero for encoder */ + loop_filter_across_tiles_enabled_flag = 0; + + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 31); + + OUT_BCS_BATCH(batch, HCP_PIC_STATE | (31 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 19); + + OUT_BCS_BATCH(batch, HCP_PIC_STATE | (19 - 2)); + } + + OUT_BCS_BATCH(batch, + mfc_context->pic_size.picture_height_in_min_cb_minus1 << 16 | + 0 << 14 | + mfc_context->pic_size.picture_width_in_min_cb_minus1); + OUT_BCS_BATCH(batch, + max_pcm_size_minus3 << 10 | + min_pcm_size_minus3 << 8 | + (seq_param->log2_min_transform_block_size_minus2 + + seq_param->log2_diff_max_min_transform_block_size) << 6 | + seq_param->log2_min_transform_block_size_minus2 << 4 | + (seq_param->log2_min_luma_coding_block_size_minus3 + + seq_param->log2_diff_max_min_luma_coding_block_size) << 2 | + seq_param->log2_min_luma_coding_block_size_minus3); + OUT_BCS_BATCH(batch, 0); /* DW 3, ignored */ + OUT_BCS_BATCH(batch, + (IS_KBL(i965->intel.device_info)? 1 : 0) << 27 | /* CU packet structure is 0 for SKL */ + seq_param->seq_fields.bits.strong_intra_smoothing_enabled_flag << 26 | + pic_param->pic_fields.bits.transquant_bypass_enabled_flag << 25 | + seq_param->seq_fields.bits.amp_enabled_flag << 23 | + pic_param->pic_fields.bits.transform_skip_enabled_flag << 22 | + 0 << 21 | /* 0 for encoder !(pic_param->decoded_curr_pic.flags & VA_PICTURE_HEVC_BOTTOM_FIELD)*/ + 0 << 20 | /* 0 for encoder !!(pic_param->decoded_curr_pic.flags & VA_PICTURE_HEVC_FIELD_PIC)*/ + pic_param->pic_fields.bits.weighted_pred_flag << 19 | + pic_param->pic_fields.bits.weighted_bipred_flag << 18 | + pic_param->pic_fields.bits.tiles_enabled_flag << 17 | /* 0 for encoder */ + pic_param->pic_fields.bits.entropy_coding_sync_enabled_flag << 16 | + loop_filter_across_tiles_enabled_flag << 15 | + pic_param->pic_fields.bits.sign_data_hiding_enabled_flag << 13 | /* 0 for encoder */ + pic_param->log2_parallel_merge_level_minus2 << 10 | /* 0 for encoder */ + pic_param->pic_fields.bits.constrained_intra_pred_flag << 9 | /* 0 for encoder */ + seq_param->seq_fields.bits.pcm_loop_filter_disabled_flag << 8 | + (pic_param->diff_cu_qp_delta_depth & 0x03) << 6 | /* 0 for encoder */ + pic_param->pic_fields.bits.cu_qp_delta_enabled_flag << 5 | /* 0 for encoder */ + seq_param->seq_fields.bits.pcm_enabled_flag << 4 | + seq_param->seq_fields.bits.sample_adaptive_offset_enabled_flag << 3 | /* 0 for encoder */ + 0); + OUT_BCS_BATCH(batch, + 0 << 27 | /* 8 bit only for encoder */ + 0 << 24 | /* 8 bit only for encoder */ + pcm_sample_bit_depth_luma_minus1 << 20 | + pcm_sample_bit_depth_chroma_minus1 << 16 | + seq_param->max_transform_hierarchy_depth_inter << 13 | /* for encoder */ + seq_param->max_transform_hierarchy_depth_intra << 10 | /* for encoder */ + (pic_param->pps_cr_qp_offset & 0x1f) << 5 | + (pic_param->pps_cb_qp_offset & 0x1f)); + OUT_BCS_BATCH(batch, + 0 << 29 | /* must be 0 for encoder */ + maxctubits); /* DW 6, max LCU bit size allowed for encoder */ + OUT_BCS_BATCH(batch, + 0 << 31 | /* frame bitrate max unit */ + maxframebitrate); /* DW 7, frame bitrate max 0:13 */ + OUT_BCS_BATCH(batch, + 0 << 31 | /* frame bitrate min unit */ + minframebitrate); /* DW 8, frame bitrate min 0:13 */ + OUT_BCS_BATCH(batch, + maxdeltaframebitrate << 16 | /* frame bitrate max delta ,help to select deltaQP of slice*/ + mindeltaframebitrate); /* DW 9,(0,14) frame bitrate min delta ,help to select deltaQP of slice*/ + OUT_BCS_BATCH(batch, 0x07050402); /* DW 10, frame delta qp max */ + OUT_BCS_BATCH(batch, 0x0d0b0908); + OUT_BCS_BATCH(batch, 0); /* DW 12, frame delta qp min */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0x04030200); /* DW 14, frame delta qp max range */ + OUT_BCS_BATCH(batch, 0x100c0806); /* DW 15 */ + OUT_BCS_BATCH(batch, 0x04030200); /* DW 16, frame delta qp min range */ + OUT_BCS_BATCH(batch, 0x100c0806); + OUT_BCS_BATCH(batch, + 0 << 30 | + minframesize); /* DW 18, min frame size units */ + + if(IS_KBL(i965->intel.device_info)) + { + int i = 0; + + for(i = 0;i < 12;i++) + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); +} + + +static void +gen9_hcpe_hevc_insert_object(VADriverContextP ctx, struct intel_encoder_context *encoder_context, + unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag, + struct intel_batchbuffer *batch) +{ + if (batch == NULL) + batch = encoder_context->base.batch; + + if (data_bits_in_last_dw == 0) + data_bits_in_last_dw = 32; + + BEGIN_BCS_BATCH(batch, lenght_in_dws + 2); + + OUT_BCS_BATCH(batch, HCP_INSERT_PAK_OBJECT | (lenght_in_dws + 2 - 2)); + OUT_BCS_BATCH(batch, + (0 << 31) | /* inline payload */ + (0 << 16) | /* always start at offset 0 */ + (0 << 15) | /* HeaderLengthExcludeFrmSize */ + (data_bits_in_last_dw << 8) | + (skip_emul_byte_count << 4) | + (!!emulation_flag << 3) | + ((!!is_last_header) << 2) | + ((!!is_end_of_slice) << 1) | + (0 << 0)); /* Reserved */ + intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4); + + ADVANCE_BCS_BATCH(batch); +} +/* +// To be do: future +static uint8_t +intel_get_ref_idx_state_1(VAPictureHEVC *va_pic, unsigned int frame_store_id) +{ + unsigned int is_long_term = + !!(va_pic->flags & VA_PICTURE_HEVC_LONG_TERM_REFERENCE); + unsigned int is_top_field = + !!!(va_pic->flags & VA_PICTURE_HEVC_BOTTOM_FIELD); + unsigned int is_bottom_field = + !!(va_pic->flags & VA_PICTURE_HEVC_BOTTOM_FIELD); + + return ((is_long_term << 6) | + ((is_top_field ^ is_bottom_field ^ 1) << 5) | + (frame_store_id << 1) | + ((is_top_field ^ 1) & is_bottom_field)); +} +*/ +static void +gen9_hcpe_ref_idx_state_1(struct intel_batchbuffer *batch, + int list, + struct intel_encoder_context *encoder_context, + struct encode_state *encode_state) +{ + int i; + VAEncPictureParameterBufferHEVC *pic_param = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + uint8_t num_ref_minus1 = (list ? slice_param->num_ref_idx_l1_active_minus1 : slice_param->num_ref_idx_l0_active_minus1); + VAPictureHEVC *ref_list = (list ? slice_param->ref_pic_list1 : slice_param->ref_pic_list0); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct object_surface *obj_surface; + int frame_index; + + int ref_idx_l0 = (vme_context->ref_index_in_mb[list] & 0xff); + + if (ref_idx_l0 > 3) { + WARN_ONCE("ref_idx_l0 is out of range\n"); + ref_idx_l0 = 0; + } + + obj_surface = vme_context->used_reference_objects[list]; + frame_index = -1; + for (i = 0; i < 16; i++) { + if (obj_surface && + obj_surface == encode_state->reference_objects[i]) { + frame_index = i; + break; + } + } + if (frame_index == -1) { + WARN_ONCE("RefPicList 0 or 1 is not found in DPB!\n"); + } + + if(num_ref_minus1 == 0 && frame_index == 1 && list == 0){ + WARN_ONCE("Input ref list is Wrong !\n"); + } + + BEGIN_BCS_BATCH(batch, 18); + + OUT_BCS_BATCH(batch, HCP_REF_IDX_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, + num_ref_minus1 << 1 | + list); + + for (i = 0; i < 16; i++) { + if (i < MIN((num_ref_minus1 + 1), 15)) { + VAPictureHEVC *ref_pic = &ref_list[i]; + VAPictureHEVC *curr_pic = &pic_param->decoded_curr_pic; + + OUT_BCS_BATCH(batch, + 1 << 15 | /* bottom_field_flag 0 */ + 0 << 14 | /* field_pic_flag 0 */ + !!(ref_pic->flags & VA_PICTURE_HEVC_LONG_TERM_REFERENCE) << 13 | /* short term is 1 */ + 0 << 12 | /* disable WP */ + 0 << 11 | /* disable WP */ + frame_index << 8 | + (CLAMP(-128, 127, curr_pic->pic_order_cnt - ref_pic->pic_order_cnt) & 0xff)); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + + ADVANCE_BCS_BATCH(batch); +} + +void +intel_hcpe_hevc_ref_idx_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context + ) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + + if (slice_param->slice_type == HEVC_SLICE_I) + return; + + gen9_hcpe_ref_idx_state_1(batch, 0, encoder_context, encode_state); + + if (slice_param->slice_type == HEVC_SLICE_P) + return; + + gen9_hcpe_ref_idx_state_1(batch, 1, encoder_context, encode_state); +} + +static void +gen9_hcpe_hevc_slice_state(VADriverContextP ctx, + VAEncPictureParameterBufferHEVC *pic_param, + VAEncSliceParameterBufferHEVC *slice_param, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *batch) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int slice_type = slice_param->slice_type; + + int log2_cu_size = pSequenceParameter->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = pSequenceParameter->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + int ctb_size = 1 << log2_ctb_size; + int width_in_ctb = (pSequenceParameter->pic_width_in_luma_samples + ctb_size - 1) / ctb_size; + int height_in_ctb = (pSequenceParameter->pic_height_in_luma_samples + ctb_size - 1) / ctb_size; + int last_slice = (((slice_param->slice_segment_address + slice_param->num_ctu_in_slice) == (width_in_ctb * height_in_ctb)) ? 1 : 0); + + int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos; + + slice_hor_pos = slice_param->slice_segment_address % width_in_ctb; + slice_ver_pos = slice_param->slice_segment_address / width_in_ctb; + + next_slice_hor_pos = (slice_param->slice_segment_address + slice_param->num_ctu_in_slice) % width_in_ctb; + next_slice_ver_pos = (slice_param->slice_segment_address + slice_param->num_ctu_in_slice) / width_in_ctb; + + /* only support multi slice begin from row start address */ + assert((slice_param->slice_segment_address % width_in_ctb) == 0); + + if (last_slice == 1) { + if (slice_param->slice_segment_address == 0) { + next_slice_hor_pos = 0; + next_slice_ver_pos = height_in_ctb; + } else { + next_slice_hor_pos = 0; + next_slice_ver_pos = 0; + } + } + + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, HCP_SLICE_STATE | (11 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 9); + + OUT_BCS_BATCH(batch, HCP_SLICE_STATE | (9 - 2)); + } + + OUT_BCS_BATCH(batch, + slice_ver_pos << 16 | + slice_hor_pos); + OUT_BCS_BATCH(batch, + next_slice_ver_pos << 16 | + next_slice_hor_pos); + OUT_BCS_BATCH(batch, + (slice_param->slice_cr_qp_offset & 0x1f) << 17 | + (slice_param->slice_cb_qp_offset & 0x1f) << 12 | + (pic_param->pic_init_qp + slice_param->slice_qp_delta) << 6 | + slice_param->slice_fields.bits.slice_temporal_mvp_enabled_flag << 5 | + slice_param->slice_fields.bits.dependent_slice_segment_flag << 4 | + last_slice << 2 | + slice_type); + OUT_BCS_BATCH(batch, + 0 << 26 | + (slice_param->max_num_merge_cand - 1) << 23 | + slice_param->slice_fields.bits.cabac_init_flag << 22 | + slice_param->luma_log2_weight_denom << 19 | + (slice_param->luma_log2_weight_denom + slice_param->delta_chroma_log2_weight_denom) << 16 | + slice_param->slice_fields.bits.collocated_from_l0_flag << 15 | + (slice_type != HEVC_SLICE_B) << 14 | + slice_param->slice_fields.bits.mvd_l1_zero_flag << 13 | + slice_param->slice_fields.bits.slice_sao_luma_flag << 12 | + slice_param->slice_fields.bits.slice_sao_chroma_flag << 11 | + slice_param->slice_fields.bits.slice_loop_filter_across_slices_enabled_flag << 10 | + (slice_param->slice_beta_offset_div2 & 0xf) << 5 | + (slice_param->slice_tc_offset_div2 & 0xf) << 1 | + slice_param->slice_fields.bits.slice_deblocking_filter_disabled_flag); + OUT_BCS_BATCH(batch, 0); /* DW 5 ,ignore for encoder.*/ + OUT_BCS_BATCH(batch, + 4 << 26 | + 4 << 20 | + 0); + OUT_BCS_BATCH(batch, + 1 << 10 | /* header insertion enable */ + 1 << 9 | /* slice data enable */ + 1 << 8 | /* tail insertion enable, must at end of frame, not slice */ + 1 << 2 | /* RBSP or EBSP, EmulationByteSliceInsertEnable */ + 1 << 1 | /* cabacZeroWordInsertionEnable */ + 0); /* Ignored for decoding */ + OUT_BCS_BATCH(batch, 0); /* PAK-BSE data start offset */ + + if(IS_KBL(i965->intel.device_info)) + { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); +} + +/* HEVC pipe line related */ +static void gen9_hcpe_hevc_pipeline_picture_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + + mfc_context->pipe_mode_select(ctx, HCP_CODEC_HEVC, encoder_context); + mfc_context->set_surface_state(ctx, encode_state, encoder_context); + gen9_hcpe_pipe_buf_addr_state(ctx, encode_state, encoder_context); + mfc_context->ind_obj_base_addr_state(ctx, encoder_context); + + mfc_context->qm_state(ctx, encoder_context); + mfc_context->fqm_state(ctx, encoder_context); + mfc_context->pic_state(ctx, encode_state, encoder_context); + intel_hcpe_hevc_ref_idx_state(ctx, encode_state, encoder_context); +} + +static void gen9_hcpe_init(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + /* to do */ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + dri_bo *bo; + int i, size = 0; + int slice_batchbuffer_size; + int slice_type = slice_param->slice_type; + int is_inter = (slice_type != HEVC_SLICE_I); + + int log2_cu_size = pSequenceParameter->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = pSequenceParameter->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + int ctb_size = 1 << log2_ctb_size; + int cu_size = 1 << log2_cu_size; + + int width_in_ctb = ALIGN(pSequenceParameter->pic_width_in_luma_samples , ctb_size) / ctb_size; + int height_in_ctb = ALIGN(pSequenceParameter->pic_height_in_luma_samples, ctb_size) / ctb_size; + int width_in_cu = ALIGN(pSequenceParameter->pic_width_in_luma_samples , cu_size) / cu_size; + int height_in_cu = ALIGN(pSequenceParameter->pic_height_in_luma_samples, cu_size) / cu_size; + int width_in_mb = ALIGN(pSequenceParameter->pic_width_in_luma_samples , 16) / 16; + int height_in_mb = ALIGN(pSequenceParameter->pic_height_in_luma_samples, 16) / 16; + + int num_cu_record = 64; + + if (log2_ctb_size == 5) num_cu_record = 16; + else if (log2_ctb_size == 4) num_cu_record = 4; + else if (log2_ctb_size == 6) num_cu_record = 64; + + /* frame size in samples, cu,ctu, mb */ + mfc_context->pic_size.picture_width_in_samples = pSequenceParameter->pic_width_in_luma_samples; + mfc_context->pic_size.picture_height_in_samples = pSequenceParameter->pic_height_in_luma_samples; + mfc_context->pic_size.ctb_size = ctb_size; + mfc_context->pic_size.picture_width_in_ctbs = width_in_ctb; + mfc_context->pic_size.picture_height_in_ctbs = height_in_ctb; + mfc_context->pic_size.min_cb_size = cu_size; + mfc_context->pic_size.picture_width_in_min_cb_minus1 = width_in_cu - 1; + mfc_context->pic_size.picture_height_in_min_cb_minus1 = height_in_cu - 1; + mfc_context->pic_size.picture_width_in_mbs = width_in_mb; + mfc_context->pic_size.picture_height_in_mbs = height_in_mb; + + slice_batchbuffer_size = 64 * width_in_ctb * width_in_ctb + 4096 + + (SLICE_HEADER + SLICE_TAIL) * encode_state->num_slice_params_ext; + + /*Encode common setup for HCP*/ + /*deblocking */ + dri_bo_unreference(mfc_context->deblocking_filter_line_buffer.bo); + mfc_context->deblocking_filter_line_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->deblocking_filter_tile_line_buffer.bo); + mfc_context->deblocking_filter_tile_line_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->deblocking_filter_tile_column_buffer.bo); + mfc_context->deblocking_filter_tile_column_buffer.bo = NULL; + + /* input source */ + dri_bo_unreference(mfc_context->uncompressed_picture_source.bo); + mfc_context->uncompressed_picture_source.bo = NULL; + + /* metadata */ + dri_bo_unreference(mfc_context->metadata_line_buffer.bo); + mfc_context->metadata_line_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->metadata_tile_line_buffer.bo); + mfc_context->metadata_tile_line_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->metadata_tile_column_buffer.bo); + mfc_context->metadata_tile_column_buffer.bo = NULL; + + /* sao */ + dri_bo_unreference(mfc_context->sao_line_buffer.bo); + mfc_context->sao_line_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->sao_tile_line_buffer.bo); + mfc_context->sao_tile_line_buffer.bo = NULL; + + dri_bo_unreference(mfc_context->sao_tile_column_buffer.bo); + mfc_context->sao_tile_column_buffer.bo = NULL; + + /* mv temporal buffer */ + for (i = 0; i < NUM_HCP_CURRENT_COLLOCATED_MV_TEMPORAL_BUFFERS; i++) { + if (mfc_context->current_collocated_mv_temporal_buffer[i].bo != NULL) + dri_bo_unreference(mfc_context->current_collocated_mv_temporal_buffer[i].bo); + mfc_context->current_collocated_mv_temporal_buffer[i].bo = NULL; + } + + /* reference */ + for (i = 0; i < MAX_HCP_REFERENCE_SURFACES; i++) { + if (mfc_context->reference_surfaces[i].bo != NULL) + dri_bo_unreference(mfc_context->reference_surfaces[i].bo); + mfc_context->reference_surfaces[i].bo = NULL; + } + + /* indirect data CU recording */ + dri_bo_unreference(mfc_context->hcp_indirect_cu_object.bo); + mfc_context->hcp_indirect_cu_object.bo = NULL; + + dri_bo_unreference(mfc_context->hcp_indirect_pak_bse_object.bo); + mfc_context->hcp_indirect_pak_bse_object.bo = NULL; + + /* Current internal buffer for HCP */ + + size = ALIGN(pSequenceParameter->pic_width_in_luma_samples, 32) >> 3; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->deblocking_filter_line_buffer), "line buffer", size); + ALLOC_ENCODER_BUFFER((&mfc_context->deblocking_filter_tile_line_buffer), "tile line buffer", size); + + size = ALIGN(pSequenceParameter->pic_height_in_luma_samples + 6 * width_in_ctb, 32) >> 3; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->deblocking_filter_tile_column_buffer), "tile column buffer", size); + + if (is_inter) { + size = (((pSequenceParameter->pic_width_in_luma_samples + 15) >> 4) * 188 + 9 * width_in_ctb + 1023) >> 9; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->metadata_line_buffer), "metadata line buffer", size); + + size = (((pSequenceParameter->pic_width_in_luma_samples + 15) >> 4) * 172 + 9 * width_in_ctb + 1023) >> 9; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->metadata_tile_line_buffer), "metadata tile line buffer", size); + + size = (((pSequenceParameter->pic_height_in_luma_samples + 15) >> 4) * 176 + 89 * width_in_ctb + 1023) >> 9; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->metadata_tile_column_buffer), "metadata tile column buffer", size); + } else { + size = (pSequenceParameter->pic_width_in_luma_samples + 8 * width_in_ctb + 1023) >> 9; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->metadata_line_buffer), "metadata line buffer", size); + + size = (pSequenceParameter->pic_width_in_luma_samples + 16 * width_in_ctb + 1023) >> 9; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->metadata_tile_line_buffer), "metadata tile line buffer", size); + + size = (pSequenceParameter->pic_height_in_luma_samples + 8 * height_in_ctb + 1023) >> 9; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->metadata_tile_column_buffer), "metadata tile column buffer", size); + } + + size = ALIGN(((pSequenceParameter->pic_width_in_luma_samples >> 1) + 3 * width_in_ctb), 16) >> 3; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->sao_line_buffer), "sao line buffer", size); + + size = ALIGN(((pSequenceParameter->pic_width_in_luma_samples >> 1) + 6 * width_in_ctb), 16) >> 3; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->sao_tile_line_buffer), "sao tile line buffer", size); + + size = ALIGN(((pSequenceParameter->pic_height_in_luma_samples >> 1) + 6 * height_in_ctb), 16) >> 3; + size <<= 6; + ALLOC_ENCODER_BUFFER((&mfc_context->sao_tile_column_buffer), "sao tile column buffer", size); + + ///////////////////// + dri_bo_unreference(mfc_context->hcp_indirect_cu_object.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "Indirect data CU Buffer", + width_in_ctb * height_in_ctb * num_cu_record * 16 * 4, + 0x1000); + assert(bo); + mfc_context->hcp_indirect_cu_object.bo = bo; + + /* to do pak bse object buffer */ + /* to do current collocated mv temporal buffer */ + + dri_bo_unreference(mfc_context->hcp_batchbuffer_surface.bo); + mfc_context->hcp_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.bo = NULL; + + if (mfc_context->aux_batchbuffer) + intel_batchbuffer_free(mfc_context->aux_batchbuffer); + + mfc_context->aux_batchbuffer = intel_batchbuffer_new(&i965->intel, I915_EXEC_BSD, slice_batchbuffer_size); + mfc_context->aux_batchbuffer_surface.bo = mfc_context->aux_batchbuffer->buffer; + dri_bo_reference(mfc_context->aux_batchbuffer_surface.bo); + mfc_context->aux_batchbuffer_surface.pitch = 16; + mfc_context->aux_batchbuffer_surface.num_blocks = mfc_context->aux_batchbuffer->size / 16; + mfc_context->aux_batchbuffer_surface.size_block = 16; +} + +static VAStatus gen9_hcpe_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); //run the pipeline + + return VA_STATUS_SUCCESS; +} + + +static VAStatus +gen9_hcpe_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int *encoded_bits_size) +{ + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + VAEncPictureParameterBufferHEVC *pPicParameter = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + VACodedBufferSegment *coded_buffer_segment; + + vaStatus = i965_MapBuffer(ctx, pPicParameter->coded_buf, (void **)&coded_buffer_segment); + assert(vaStatus == VA_STATUS_SUCCESS); + *encoded_bits_size = coded_buffer_segment->size * 8; + i965_UnmapBuffer(ctx, pPicParameter->coded_buf); + + return VA_STATUS_SUCCESS; +} + + +int intel_hevc_find_skipemulcnt(unsigned char *buf, int bits_length) +{ + /* to do */ + int i, found; + int leading_zero_cnt, byte_length, zero_byte; + int nal_unit_type; + int skip_cnt = 0; + +#define NAL_UNIT_TYPE_MASK 0x7e +#define HW_MAX_SKIP_LENGTH 15 + + byte_length = ALIGN(bits_length, 32) >> 3; + + + leading_zero_cnt = 0; + found = 0; + for (i = 0; i < byte_length - 4; i++) { + if (((buf[i] == 0) && (buf[i + 1] == 0) && (buf[i + 2] == 1)) || + ((buf[i] == 0) && (buf[i + 1] == 0) && (buf[i + 2] == 0) && (buf[i + 3] == 1))) { + found = 1; + break; + } + leading_zero_cnt++; + } + if (!found) { + /* warning message is complained. But anyway it will be inserted. */ + WARN_ONCE("Invalid packed header data. " + "Can't find the 000001 start_prefix code\n"); + return 0; + } + i = leading_zero_cnt; + + zero_byte = 0; + if (!((buf[i] == 0) && (buf[i + 1] == 0) && (buf[i + 2] == 1))) + zero_byte = 1; + + skip_cnt = leading_zero_cnt + zero_byte + 3; + + /* the unit header byte is accounted */ + nal_unit_type = (buf[skip_cnt]) & NAL_UNIT_TYPE_MASK; + skip_cnt += 1; + skip_cnt += 1; /* two bytes length of nal headers in hevc */ + + if (nal_unit_type == 14 || nal_unit_type == 20 || nal_unit_type == 21) { + /* more unit header bytes are accounted for MVC/SVC */ + //skip_cnt += 3; + } + if (skip_cnt > HW_MAX_SKIP_LENGTH) { + WARN_ONCE("Too many leading zeros are padded for packed data. " + "It is beyond the HW range.!!!\n"); + } + return skip_cnt; +} + +#ifdef HCP_SOFTWARE_SKYLAKE + +static int +gen9_hcpe_hevc_pak_object(VADriverContextP ctx, int lcu_x, int lcu_y, int isLast_ctb, + struct intel_encoder_context *encoder_context, + int cu_count_in_lcu, unsigned int split_coding_unit_flag, + struct intel_batchbuffer *batch) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int len_in_dwords = 3; + + if(IS_KBL(i965->intel.device_info)) + len_in_dwords = 5; + + if (batch == NULL) + batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, len_in_dwords); + + OUT_BCS_BATCH(batch, HCP_PAK_OBJECT | (len_in_dwords - 2)); + OUT_BCS_BATCH(batch, + (((isLast_ctb > 0) ? 1 : 0) << 31) | /* last ctb?*/ + ((cu_count_in_lcu - 1) << 24) | /* No motion vector */ + split_coding_unit_flag); + + OUT_BCS_BATCH(batch, (lcu_y << 16) | lcu_x); /* LCU for Y*/ + + if(IS_KBL(i965->intel.device_info)) + { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); + + return len_in_dwords; +} + +#define AVC_INTRA_RDO_OFFSET 4 +#define AVC_INTER_RDO_OFFSET 10 +#define AVC_INTER_MSG_OFFSET 8 +#define AVC_INTER_MV_OFFSET 48 +#define AVC_RDO_MASK 0xFFFF + +#define AVC_INTRA_MODE_MASK 0x30 +#define AVC_INTRA_16X16 0x00 +#define AVC_INTRA_8X8 0x01 +#define AVC_INTRA_4X4 0x02 + +#define AVC_INTER_MODE_MASK 0x03 +#define AVC_INTER_8X8 0x03 +#define AVC_INTER_8X16 0x02 +#define AVC_INTER_16X8 0x01 +#define AVC_INTER_16X16 0x00 +#define AVC_SUBMB_SHAPE_MASK 0x00FF00 + +/* VME output message, write back message */ +#define AVC_INTER_SUBMB_PRE_MODE_MASK 0x00ff0000 +#define AVC_SUBMB_SHAPE_MASK 0x00FF00 + +/* here 1 MB = 1CU = 16x16 */ +static void +gen9_hcpe_hevc_fill_indirect_cu_intra(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int qp, unsigned int *msg, + int ctb_x, int ctb_y, + int mb_x, int mb_y, + int ctb_width_in_mb, int width_in_ctb, int num_cu_record, int slice_type,int cu_index,int index) +{ + /* here cu == mb, so we use mb address as the cu address */ + /* to fill the indirect cu by the vme out */ + static int intra_mode_8x8_avc2hevc[9] = {26, 10, 1, 34, 18, 24, 13, 28, 8}; + static int intra_mode_16x16_avc2hevc[4] = {26, 10, 1, 34}; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + unsigned char * cu_record_ptr = NULL; + unsigned int * cu_msg = NULL; + int ctb_address = (ctb_y * width_in_ctb + ctb_x) * num_cu_record; + int mb_address_in_ctb = 0; + int cu_address = (ctb_address + mb_address_in_ctb + cu_index) * 16 * 4; + int zero = 0; + int is_inter = 0; + int intraMbMode = 0; + int cu_part_mode = 0; + int intraMode[4]; + int inerpred_idc = 0; + int intra_chroma_mode = 5; + int cu_size = 1; + int tu_size = 0x55; + int tu_count = 4; + + if (!is_inter) inerpred_idc = 0xff; + + intraMbMode = (msg[0] & AVC_INTRA_MODE_MASK) >> 4; + + + if (intraMbMode == AVC_INTRA_16X16) { + cu_part_mode = 0; //2Nx2N + intra_chroma_mode = 5; + cu_size = 1; + tu_size = 0x55; + tu_count = 4; + intraMode[0] = intra_mode_16x16_avc2hevc[msg[1] & 0xf]; + intraMode[1] = intra_mode_16x16_avc2hevc[msg[1] & 0xf]; + intraMode[2] = intra_mode_16x16_avc2hevc[msg[1] & 0xf]; + intraMode[3] = intra_mode_16x16_avc2hevc[msg[1] & 0xf]; + } else if (intraMbMode == AVC_INTRA_8X8) { + cu_part_mode = 0; //2Nx2N + intra_chroma_mode = 5; + cu_size = 0; + tu_size = 0; + tu_count = 4; + intraMode[0] = intra_mode_8x8_avc2hevc[msg[1] >> (index << 2) & 0xf]; + intraMode[1] = intra_mode_8x8_avc2hevc[msg[1] >> (index << 2) & 0xf]; + intraMode[2] = intra_mode_8x8_avc2hevc[msg[1] >> (index << 2) & 0xf]; + intraMode[3] = intra_mode_8x8_avc2hevc[msg[1] >> (index << 2) & 0xf]; + + } else { // for 4x4 to use 8x8 replace + cu_part_mode = 3; //NxN + intra_chroma_mode = 0; + cu_size = 0; + tu_size = 0; + tu_count = 4; + intraMode[0] = intra_mode_8x8_avc2hevc[msg[1] >> ((index << 4) + 0) & 0xf]; + intraMode[1] = intra_mode_8x8_avc2hevc[msg[1] >> ((index << 4) + 4) & 0xf]; + intraMode[2] = intra_mode_8x8_avc2hevc[msg[1] >> ((index << 4) + 8) & 0xf]; + intraMode[3] = intra_mode_8x8_avc2hevc[msg[1] >> ((index << 4) + 12) & 0xf]; + + } + + cu_record_ptr = (unsigned char *)mfc_context->hcp_indirect_cu_object.bo->virtual; + /* get the mb info from the vme out */ + cu_msg = (unsigned int *)(cu_record_ptr + cu_address); + + cu_msg[0] = (inerpred_idc << 24 | /* interpred_idc[3:0][1:0] */ + zero << 23 | /* reserved */ + qp << 16 | /* CU_qp */ + zero << 11 | /* reserved */ + intra_chroma_mode << 8 | /* intra_chroma_mode */ + zero << 7 | /* IPCM_enable , reserved for SKL*/ + cu_part_mode << 4 | /* cu_part_mode */ + zero << 3 | /* cu_transquant_bypass_flag */ + is_inter << 2 | /* cu_pred_mode :intra 1,inter 1*/ + cu_size /* cu_size */ + ); + cu_msg[1] = (zero << 30 | /* reserved */ + intraMode[3] << 24 | /* intra_mode */ + zero << 22 | /* reserved */ + intraMode[2] << 16 | /* intra_mode */ + zero << 14 | /* reserved */ + intraMode[1] << 8 | /* intra_mode */ + zero << 6 | /* reserved */ + intraMode[0] /* intra_mode */ + ); + /* l0: 4 MV (x,y); l1ï¼› 4 MV (x,y) */ + cu_msg[2] = (zero << 16 | /* mvx_l0[1] */ + zero /* mvx_l0[0] */ + ); + cu_msg[3] = (zero << 16 | /* mvx_l0[3] */ + zero /* mvx_l0[2] */ + ); + cu_msg[4] = (zero << 16 | /* mvy_l0[1] */ + zero /* mvy_l0[0] */ + ); + cu_msg[5] = (zero << 16 | /* mvy_l0[3] */ + zero /* mvy_l0[2] */ + ); + + cu_msg[6] = (zero << 16 | /* mvx_l1[1] */ + zero /* mvx_l1[0] */ + ); + cu_msg[7] = (zero << 16 | /* mvx_l1[3] */ + zero /* mvx_l1[2] */ + ); + cu_msg[8] = (zero << 16 | /* mvy_l1[1] */ + zero /* mvy_l1[0] */ + ); + cu_msg[9] = (zero << 16 | /* mvy_l1[3] */ + zero /* mvy_l1[2] */ + ); + + cu_msg[10] = (zero << 28 | /* ref_idx_l1[3] */ + zero << 24 | /* ref_idx_l1[2] */ + zero << 20 | /* ref_idx_l1[1] */ + zero << 16 | /* ref_idx_l1[0] */ + zero << 12 | /* ref_idx_l0[3] */ + zero << 8 | /* ref_idx_l0[2] */ + zero << 4 | /* ref_idx_l0[1] */ + zero /* ref_idx_l0[0] */ + ); + + cu_msg[11] = tu_size; /* tu_size 00000000 00000000 00000000 10101010 or 0x0*/ + cu_msg[12] = ((tu_count - 1) << 28 | /* tu count - 1 */ + zero << 16 | /* reserved */ + zero /* tu_xform_Yskip[15:0] */ + ); + cu_msg[13] = (zero << 16 | /* tu_xform_Vskip[15:0] */ + zero /* tu_xform_Uskip[15:0] */ + ); + cu_msg[14] = zero ; + cu_msg[15] = zero ; +} + +/* here 1 MB = 1CU = 16x16 */ +static void +gen9_hcpe_hevc_fill_indirect_cu_inter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int qp, unsigned int *msg, + int ctb_x, int ctb_y, + int mb_x, int mb_y, + int ctb_width_in_mb, int width_in_ctb, int num_cu_record, int slice_type, int cu_index,int index) +{ + /* here cu == mb, so we use mb address as the cu address */ + /* to fill the indirect cu by the vme out */ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned char * cu_record_ptr = NULL; + unsigned int * cu_msg = NULL; + int ctb_address = (ctb_y * width_in_ctb + ctb_x) * num_cu_record; + int mb_address_in_ctb = 0; + int cu_address = (ctb_address + mb_address_in_ctb + cu_index) * 16 * 4; + int zero = 0; + int cu_part_mode = 0; + int submb_pre_mode = 0; + int is_inter = 1; + int cu_size = 1; + int tu_size = 0x55; + int tu_count = 4; + int inter_mode = 0; + + unsigned int *mv_ptr; + { + inter_mode = (msg[0] & AVC_INTER_MODE_MASK); + submb_pre_mode = (msg[1] & AVC_INTER_SUBMB_PRE_MODE_MASK) >> 16; +#define MSG_MV_OFFSET 4 + mv_ptr = msg + MSG_MV_OFFSET; + /* MV of VME output is based on 16 sub-blocks. So it is necessary + * to convert them to be compatible with the format of AVC_PAK + * command. + */ + /* 0/2/4/6/8... ： l0, 1/3/5/7...: l1 ; now it only support 16x16,16x8,8x16,8x8*/ + + if (inter_mode == AVC_INTER_16X16) { + mv_ptr[4] = mv_ptr[0]; + mv_ptr[5] = mv_ptr[1]; + mv_ptr[2] = mv_ptr[0]; + mv_ptr[3] = mv_ptr[1]; + mv_ptr[6] = mv_ptr[0]; + mv_ptr[7] = mv_ptr[1]; + cu_part_mode = 0; + cu_size = 1; + tu_size = 0x55; + tu_count = 4; + } else if (inter_mode == AVC_INTER_8X16) { + mv_ptr[4] = mv_ptr[0]; + mv_ptr[5] = mv_ptr[1]; + mv_ptr[2] = mv_ptr[8]; + mv_ptr[3] = mv_ptr[9]; + mv_ptr[6] = mv_ptr[8]; + mv_ptr[7] = mv_ptr[9]; + cu_part_mode = 1; + cu_size = 1; + tu_size = 0x55; + tu_count = 4; + } else if (inter_mode == AVC_INTER_16X8) { + mv_ptr[2] = mv_ptr[0]; + mv_ptr[3] = mv_ptr[1]; + mv_ptr[4] = mv_ptr[16]; + mv_ptr[5] = mv_ptr[17]; + mv_ptr[6] = mv_ptr[24]; + mv_ptr[7] = mv_ptr[25]; + cu_part_mode = 2; + cu_size = 1; + tu_size = 0x55; + tu_count = 4; + }else if(inter_mode == AVC_INTER_8X8) { + mv_ptr[0] = mv_ptr[index * 8 + 0 ]; + mv_ptr[1] = mv_ptr[index * 8 + 1 ]; + mv_ptr[2] = mv_ptr[index * 8 + 0 ]; + mv_ptr[3] = mv_ptr[index * 8 + 1 ]; + mv_ptr[4] = mv_ptr[index * 8 + 0 ]; + mv_ptr[5] = mv_ptr[index * 8 + 1 ]; + mv_ptr[6] = mv_ptr[index * 8 + 0 ]; + mv_ptr[7] = mv_ptr[index * 8 + 1 ]; + cu_part_mode = 0; + cu_size = 0; + tu_size = 0x0; + tu_count = 4; + + }else + { + mv_ptr[4] = mv_ptr[0]; + mv_ptr[5] = mv_ptr[1]; + mv_ptr[2] = mv_ptr[0]; + mv_ptr[3] = mv_ptr[1]; + mv_ptr[6] = mv_ptr[0]; + mv_ptr[7] = mv_ptr[1]; + cu_part_mode = 0; + cu_size = 1; + tu_size = 0x55; + tu_count = 4; + + } + } + + cu_record_ptr = (unsigned char *)mfc_context->hcp_indirect_cu_object.bo->virtual; + /* get the mb info from the vme out */ + cu_msg = (unsigned int *)(cu_record_ptr + cu_address); + + cu_msg[0] = (submb_pre_mode << 24 | /* interpred_idc[3:0][1:0] */ + zero << 23 | /* reserved */ + qp << 16 | /* CU_qp */ + zero << 11 | /* reserved */ + 5 << 8 | /* intra_chroma_mode */ + zero << 7 | /* IPCM_enable , reserved for SKL*/ + cu_part_mode << 4 | /* cu_part_mode */ + zero << 3 | /* cu_transquant_bypass_flag */ + is_inter << 2 | /* cu_pred_mode :intra 1,inter 1*/ + cu_size /* cu_size */ + ); + cu_msg[1] = (zero << 30 | /* reserved */ + zero << 24 | /* intra_mode */ + zero << 22 | /* reserved */ + zero << 16 | /* intra_mode */ + zero << 14 | /* reserved */ + zero << 8 | /* intra_mode */ + zero << 6 | /* reserved */ + zero /* intra_mode */ + ); + /* l0: 4 MV (x,y); l1ï¼› 4 MV (x,y) */ + cu_msg[2] = ((mv_ptr[2] & 0xffff) << 16 | /* mvx_l0[1] */ + (mv_ptr[0] & 0xffff) /* mvx_l0[0] */ + ); + cu_msg[3] = ((mv_ptr[6] & 0xffff) << 16 | /* mvx_l0[3] */ + (mv_ptr[4] & 0xffff) /* mvx_l0[2] */ + ); + cu_msg[4] = ((mv_ptr[2] & 0xffff0000) | /* mvy_l0[1] */ + (mv_ptr[0] & 0xffff0000) >> 16 /* mvy_l0[0] */ + ); + cu_msg[5] = ((mv_ptr[6] & 0xffff0000) | /* mvy_l0[3] */ + (mv_ptr[4] & 0xffff0000) >> 16 /* mvy_l0[2] */ + ); + + cu_msg[6] = ((mv_ptr[3] & 0xffff) << 16 | /* mvx_l1[1] */ + (mv_ptr[1] & 0xffff) /* mvx_l1[0] */ + ); + cu_msg[7] = ((mv_ptr[7] & 0xffff) << 16 | /* mvx_l1[3] */ + (mv_ptr[5] & 0xffff) /* mvx_l1[2] */ + ); + cu_msg[8] = ((mv_ptr[3] & 0xffff0000) | /* mvy_l1[1] */ + (mv_ptr[1] & 0xffff0000) >> 16 /* mvy_l1[0] */ + ); + cu_msg[9] = ((mv_ptr[7] & 0xffff0000) | /* mvy_l1[3] */ + (mv_ptr[5] & 0xffff0000) >> 16 /* mvy_l1[2] */ + ); + + cu_msg[10] = (((vme_context->ref_index_in_mb[1] >> 24) & 0xf) << 28 | /* ref_idx_l1[3] */ + ((vme_context->ref_index_in_mb[1] >> 16) & 0xf) << 24 | /* ref_idx_l1[2] */ + ((vme_context->ref_index_in_mb[1] >> 8) & 0xf) << 20 | /* ref_idx_l1[1] */ + ((vme_context->ref_index_in_mb[1] >> 0) & 0xf) << 16 | /* ref_idx_l1[0] */ + ((vme_context->ref_index_in_mb[0] >> 24) & 0xf) << 12 | /* ref_idx_l0[3] */ + ((vme_context->ref_index_in_mb[0] >> 16) & 0xf) << 8 | /* ref_idx_l0[2] */ + ((vme_context->ref_index_in_mb[0] >> 8) & 0xf) << 4 | /* ref_idx_l0[1] */ + ((vme_context->ref_index_in_mb[0] >> 0) & 0xf) /* ref_idx_l0[0] */ + ); + + cu_msg[11] = tu_size; /* tu_size 00000000 00000000 00000000 10101010 or 0x0*/ + cu_msg[12] = ((tu_count - 1) << 28 | /* tu count - 1 */ + zero << 16 | /* reserved */ + zero /* tu_xform_Yskip[15:0] */ + ); + cu_msg[13] = (zero << 16 | /* tu_xform_Vskip[15:0] */ + zero /* tu_xform_Uskip[15:0] */ + ); + cu_msg[14] = zero ; + cu_msg[15] = zero ; +} + +#define HEVC_SPLIT_CU_FLAG_64_64 ((0x1<<20)|(0xf<<16)|(0x0<<12)|(0x0<<8)|(0x0<<4)|(0x0)) +#define HEVC_SPLIT_CU_FLAG_32_32 ((0x1<<20)|(0x0<<16)|(0x0<<12)|(0x0<<8)|(0x0<<4)|(0x0)) +#define HEVC_SPLIT_CU_FLAG_16_16 ((0x0<<20)|(0x0<<16)|(0x0<<12)|(0x0<<8)|(0x0<<4)|(0x0)) +#define HEVC_SPLIT_CU_FLAG_8_8 ((0x1<<20)|(0x0<<16)|(0x0<<12)|(0x0<<8)|(0x0<<4)|(0x0)) + + +void +intel_hevc_slice_insert_packed_data(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch) +{ + int count, i, start_index; + unsigned int length_in_bits; + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = NULL; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + int slice_header_index; + + if (encode_state->slice_header_index[slice_index] == 0) + slice_header_index = -1; + else + slice_header_index = (encode_state->slice_header_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK); + + count = encode_state->slice_rawdata_count[slice_index]; + start_index = (encode_state->slice_rawdata_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK); + + for (i = 0; i < count; i++) { + unsigned int skip_emul_byte_cnt; + + header_data = (unsigned int *)encode_state->packed_header_data_ext[start_index + i]->buffer; + + param = (VAEncPackedHeaderParameterBuffer *) + (encode_state->packed_header_params_ext[start_index + i]->buffer); + + /* skip the slice header packed data type as it is lastly inserted */ + if (param->type == VAEncPackedHeaderSlice) + continue; + + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_hevc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + /* as the slice header is still required, the last header flag is set to + * zero. + */ + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + if (slice_header_index == -1) { + unsigned char *slice_header = NULL; + int slice_header_length_in_bits = 0; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferHEVC *pPicParameter = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[slice_index]->buffer; + + /* For the Normal HEVC */ + slice_header_length_in_bits = build_hevc_slice_header(pSequenceParameter, + pPicParameter, + pSliceParameter, + &slice_header, + 0); + mfc_context->insert_object(ctx, encoder_context, + (unsigned int *)slice_header, + ALIGN(slice_header_length_in_bits, 32) >> 5, + slice_header_length_in_bits & 0x1f, + 5, /* first 6 bytes are start code + nal unit type */ + 1, 0, 1, slice_batch); + free(slice_header); + } else { + unsigned int skip_emul_byte_cnt; + + header_data = (unsigned int *)encode_state->packed_header_data_ext[slice_header_index]->buffer; + + param = (VAEncPackedHeaderParameterBuffer *) + (encode_state->packed_header_params_ext[slice_header_index]->buffer); + length_in_bits = param->bit_length; + + /* as the slice header is the last header data for one slice, + * the last header flag is set to one. + */ + skip_emul_byte_cnt = intel_hevc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 1, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + return; +} + +static void +gen9_hcpe_hevc_pipeline_slice_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index, + struct intel_batchbuffer *slice_batch) +{ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferHEVC *pPicParameter = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[slice_index]->buffer; + int qp_slice = pPicParameter->pic_init_qp + pSliceParameter->slice_qp_delta; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + //unsigned char *slice_header = NULL; // for future use + //int slice_header_length_in_bits = 0; + unsigned int tail_data[] = { 0x0, 0x0 }; + int slice_type = pSliceParameter->slice_type; + + int log2_cu_size = pSequenceParameter->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = pSequenceParameter->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + int ctb_size = 1 << log2_ctb_size; + int width_in_ctb = (pSequenceParameter->pic_width_in_luma_samples + ctb_size - 1) / ctb_size; + int height_in_ctb = (pSequenceParameter->pic_height_in_luma_samples + ctb_size - 1) / ctb_size; + int last_slice = (pSliceParameter->slice_segment_address + pSliceParameter->num_ctu_in_slice) == (width_in_ctb * height_in_ctb); + int ctb_width_in_mb = (ctb_size + 15) / 16; + int i_ctb, ctb_x, ctb_y; + unsigned int split_coding_unit_flag = 0; + int width_in_mbs = (pSequenceParameter->pic_width_in_luma_samples + 15) / 16; + int row_pad_flag = (pSequenceParameter->pic_height_in_luma_samples % ctb_size)> 0 ? 1:0; + int col_pad_flag = (pSequenceParameter->pic_width_in_luma_samples % ctb_size)> 0 ? 1:0; + + int is_intra = (slice_type == HEVC_SLICE_I); + unsigned int *msg = NULL; + unsigned char *msg_ptr = NULL; + int macroblock_address = 0; + int num_cu_record = 64; + int cu_count = 1; + int tmp_mb_mode = 0; + int mb_x = 0, mb_y = 0; + int mb_addr = 0; + int cu_index = 0; + int inter_rdo, intra_rdo; + int qp; + int drop_cu_row_in_last_mb = 0; + int drop_cu_column_in_last_mb = 0; + + if (log2_ctb_size == 5) num_cu_record = 16; + else if (log2_ctb_size == 4) num_cu_record = 4; + else if (log2_ctb_size == 6) num_cu_record = 64; + + qp = qp_slice; + if (rate_control_mode == VA_RC_CBR) { + qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY; + if(slice_type == HEVC_SLICE_B) { + if(pSequenceParameter->ip_period == 1) + { + qp = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY; + + }else if(mfc_context->vui_hrd.i_frame_number % pSequenceParameter->ip_period == 1){ + qp = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY; + } + } + if (encode_state->slice_header_index[slice_index] == 0) { + pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp; + } + } + + /* only support for 8-bit pixel bit-depth */ + assert(pSequenceParameter->seq_fields.bits.bit_depth_luma_minus8 == 0); + assert(pSequenceParameter->seq_fields.bits.bit_depth_chroma_minus8 == 0); + assert(pPicParameter->pic_init_qp >= 0 && pPicParameter->pic_init_qp < 52); + assert(qp >= 0 && qp < 52); + + { + gen9_hcpe_hevc_slice_state(ctx, + pPicParameter, + pSliceParameter, + encode_state, encoder_context, + slice_batch); + + if (slice_index == 0) + intel_hcpe_hevc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch); + + intel_hevc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch); + + /* + slice_header_length_in_bits = build_hevc_slice_header(pSequenceParameter, pPicParameter, pSliceParameter, &slice_header, slice_index); + int skip_emul_byte_cnt = intel_hevc_find_skipemulcnt((unsigned char *)slice_header, slice_header_length_in_bits); + + mfc_context->insert_object(ctx, encoder_context, + (unsigned int *)slice_header, ALIGN(slice_header_length_in_bits, 32) >> 5, slice_header_length_in_bits & 0x1f, + skip_emul_byte_cnt, + 1, 0, 1, slice_batch); + free(slice_header); + */ + } + + + + split_coding_unit_flag = (ctb_width_in_mb == 4) ? HEVC_SPLIT_CU_FLAG_64_64 : ((ctb_width_in_mb == 2) ? HEVC_SPLIT_CU_FLAG_32_32 : HEVC_SPLIT_CU_FLAG_16_16); + + dri_bo_map(vme_context->vme_output.bo , 1); + msg_ptr = (unsigned char *)vme_context->vme_output.bo->virtual; + dri_bo_map(mfc_context->hcp_indirect_cu_object.bo , 1); + + for (i_ctb = pSliceParameter->slice_segment_address;i_ctb < pSliceParameter->slice_segment_address + pSliceParameter->num_ctu_in_slice; i_ctb++) { + int last_ctb = (i_ctb == (pSliceParameter->slice_segment_address + pSliceParameter->num_ctu_in_slice - 1)); + int ctb_height_in_mb_internal = ctb_width_in_mb; + int ctb_width_in_mb_internal = ctb_width_in_mb; + int max_cu_num_in_mb = 4; + + ctb_x = i_ctb % width_in_ctb; + ctb_y = i_ctb / width_in_ctb; + + drop_cu_row_in_last_mb = 0; + drop_cu_column_in_last_mb = 0; + + if(ctb_y == (height_in_ctb - 1) && row_pad_flag) + { + ctb_height_in_mb_internal = (pSequenceParameter->pic_height_in_luma_samples - (ctb_y * ctb_size) + 15)/16; + + if((log2_cu_size == 3) && (pSequenceParameter->pic_height_in_luma_samples % 16)) + drop_cu_row_in_last_mb = (16 - (pSequenceParameter->pic_height_in_luma_samples % 16))>>log2_cu_size; + } + + if(ctb_x == (width_in_ctb - 1) && col_pad_flag) + { + ctb_width_in_mb_internal = (pSequenceParameter->pic_width_in_luma_samples - (ctb_x * ctb_size) + 15) / 16; + + if((log2_cu_size == 3) && (pSequenceParameter->pic_width_in_luma_samples % 16)) + drop_cu_column_in_last_mb = (16 - (pSequenceParameter->pic_width_in_luma_samples % 16))>>log2_cu_size; + } + + mb_x = 0; + mb_y = 0; + macroblock_address = ctb_y * width_in_mbs * ctb_width_in_mb + ctb_x * ctb_width_in_mb; + split_coding_unit_flag = ((ctb_width_in_mb == 2) ? HEVC_SPLIT_CU_FLAG_32_32 : HEVC_SPLIT_CU_FLAG_16_16); + cu_count = 1; + cu_index = 0; + mb_addr = 0; + msg = NULL; + for (mb_y = 0; mb_y < ctb_height_in_mb_internal; mb_y++) + { + mb_addr = macroblock_address + mb_y * width_in_mbs ; + for (mb_x = 0; mb_x < ctb_width_in_mb_internal; mb_x++) + { + max_cu_num_in_mb = 4; + if(drop_cu_row_in_last_mb && (mb_y == ctb_height_in_mb_internal - 1)) + max_cu_num_in_mb /= 2; + + if(drop_cu_column_in_last_mb && (mb_x == ctb_width_in_mb_internal - 1)) + max_cu_num_in_mb /= 2; + + /* get the mb info from the vme out */ + msg = (unsigned int *)(msg_ptr + mb_addr * vme_context->vme_output.size_block); + + inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK; + intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK; + /*fill to indirect cu */ + /*to do */ + if (is_intra || intra_rdo < inter_rdo) { + /* fill intra cu */ + tmp_mb_mode = (msg[0] & AVC_INTRA_MODE_MASK) >> 4; + if(max_cu_num_in_mb < 4){ + if(tmp_mb_mode == AVC_INTRA_16X16) + { + msg[0] = (msg[0] & !AVC_INTRA_MODE_MASK) | (AVC_INTRA_8X8<<4); + tmp_mb_mode = AVC_INTRA_8X8; + } + + gen9_hcpe_hevc_fill_indirect_cu_intra(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,0); + if(--max_cu_num_in_mb > 0) + gen9_hcpe_hevc_fill_indirect_cu_intra(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,2); + + if(ctb_width_in_mb == 2) + split_coding_unit_flag |= 0x1 << (mb_x + mb_y * ctb_width_in_mb + 16); + else if(ctb_width_in_mb == 1) + split_coding_unit_flag |= 0x1 << 20; + } + else if(tmp_mb_mode == AVC_INTRA_16X16) { + gen9_hcpe_hevc_fill_indirect_cu_intra(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,0); + } else { // for 4x4 to use 8x8 replace + gen9_hcpe_hevc_fill_indirect_cu_intra(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,0); + gen9_hcpe_hevc_fill_indirect_cu_intra(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,1); + gen9_hcpe_hevc_fill_indirect_cu_intra(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,2); + gen9_hcpe_hevc_fill_indirect_cu_intra(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,3); + if(ctb_width_in_mb == 2) + split_coding_unit_flag |= 0x1 << (mb_x + mb_y * ctb_width_in_mb + 16); + else if(ctb_width_in_mb == 1) + split_coding_unit_flag |= 0x1 << 20; + } + } else { + msg += AVC_INTER_MSG_OFFSET; + /* fill inter cu */ + tmp_mb_mode = msg[0] & AVC_INTER_MODE_MASK; + if(max_cu_num_in_mb < 4) + { + if(tmp_mb_mode != AVC_INTER_8X8) + { + msg[0] = (msg[0] & !AVC_INTER_MODE_MASK) | AVC_INTER_8X8; + tmp_mb_mode = AVC_INTER_8X8; + } + gen9_hcpe_hevc_fill_indirect_cu_inter(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,0); + if(--max_cu_num_in_mb > 0) + gen9_hcpe_hevc_fill_indirect_cu_inter(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,1); + + if(ctb_width_in_mb == 2) + split_coding_unit_flag |= 0x1 << (mb_x + mb_y * ctb_width_in_mb + 16); + else if(ctb_width_in_mb == 1) + split_coding_unit_flag |= 0x1 << 20; + } + else if (tmp_mb_mode == AVC_INTER_8X8){ + gen9_hcpe_hevc_fill_indirect_cu_inter(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,0); + gen9_hcpe_hevc_fill_indirect_cu_inter(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,1); + gen9_hcpe_hevc_fill_indirect_cu_inter(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,2); + gen9_hcpe_hevc_fill_indirect_cu_inter(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,3); + if(ctb_width_in_mb == 2) + split_coding_unit_flag |= 0x1 << (mb_x + mb_y * ctb_width_in_mb + 16); + else if(ctb_width_in_mb == 1) + split_coding_unit_flag |= 0x1 << 20; + + }else if(tmp_mb_mode == AVC_INTER_16X16 || + tmp_mb_mode == AVC_INTER_8X16 || + tmp_mb_mode == AVC_INTER_16X8) { + gen9_hcpe_hevc_fill_indirect_cu_inter(ctx, encode_state, encoder_context, qp, msg, ctb_x, ctb_y, mb_x, mb_y, ctb_width_in_mb, width_in_ctb, num_cu_record, slice_type,cu_index++,0); + } + } + mb_addr++; + } + } + + cu_count = cu_index; + // PAK object fill accordingly. + gen9_hcpe_hevc_pak_object(ctx, ctb_x, ctb_y, last_ctb, encoder_context, cu_count, split_coding_unit_flag, slice_batch); + } + + dri_bo_unmap(mfc_context->hcp_indirect_cu_object.bo); + dri_bo_unmap(vme_context->vme_output.bo); + + if (last_slice) { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 2, 8, + 2, 1, 1, 0, slice_batch); + } else { + mfc_context->insert_object(ctx, encoder_context, + tail_data, 1, 8, + 1, 1, 1, 0, slice_batch); + } +} + +static dri_bo * +gen9_hcpe_hevc_software_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch; + dri_bo *batch_bo; + int i; + + batch = mfc_context->aux_batchbuffer; + batch_bo = batch->buffer; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + gen9_hcpe_hevc_pipeline_slice_programing(ctx, encode_state, encoder_context, i, batch); + } + + intel_batchbuffer_align(batch, 8); + + BEGIN_BCS_BATCH(batch, 2); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_END); + ADVANCE_BCS_BATCH(batch); + + dri_bo_reference(batch_bo); + intel_batchbuffer_free(batch); + mfc_context->aux_batchbuffer = NULL; + + return batch_bo; +} + +#else + +#endif + +static void +gen9_hcpe_hevc_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = encoder_context->base.batch; + dri_bo *slice_batch_bo; + +#ifdef HCP_SOFTWARE_SKYLAKE + slice_batch_bo = gen9_hcpe_hevc_software_batchbuffer(ctx, encode_state, encoder_context); +#else + slice_batch_bo = gen9_hcpe_hevc_hardware_batchbuffer(ctx, encode_state, encoder_context); +#endif + + // begin programing + if (i965->intel.has_bsd2) + intel_batchbuffer_start_atomic_bcs_override(batch, 0x4000, BSD_RING0); + else + intel_batchbuffer_start_atomic_bcs(batch, 0x4000); + intel_batchbuffer_emit_mi_flush(batch); + + // picture level programing + gen9_hcpe_hevc_pipeline_picture_programing(ctx, encode_state, encoder_context); + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_BCS_RELOC(batch, + slice_batch_bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); + + // end programing + intel_batchbuffer_end_atomic(batch); + + dri_bo_unreference(slice_batch_bo); +} + +void intel_hcpe_hevc_pipeline_header_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct intel_batchbuffer *slice_batch) +{ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderHEVC_VPS); + unsigned int skip_emul_byte_cnt; + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_hevc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderHEVC_VPS) + 1; // index to SPS + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_hevc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderHEVC_PPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_hevc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderHEVC_SEI); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_hevc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + mfc_context->insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + slice_batch); + } +} + +VAStatus intel_hcpe_hevc_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + GenHevcSurface *hevc_encoder_surface; + dri_bo *bo; + VAStatus vaStatus = VA_STATUS_SUCCESS; + int i; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + + /*Setup all the input&output object*/ + + /* Setup current frame and current direct mv buffer*/ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + if (obj_surface->private_data == NULL) { + uint32_t size; + + if (mfc_context->pic_size.ctb_size == 16) + size = ((pSequenceParameter->pic_width_in_luma_samples + 63) >> 6) * + ((pSequenceParameter->pic_height_in_luma_samples + 15) >> 4); + else + size = ((pSequenceParameter->pic_width_in_luma_samples + 31) >> 5) * + ((pSequenceParameter->pic_height_in_luma_samples + 31) >> 5); + size <<= 6; /* in unit of 64bytes */ + + hevc_encoder_surface = calloc(sizeof(GenHevcSurface), 1); + + assert(hevc_encoder_surface); + hevc_encoder_surface->motion_vector_temporal_bo = + dri_bo_alloc(i965->intel.bufmgr, + "motion vector temporal buffer", + size, + 0x1000); + assert(hevc_encoder_surface->motion_vector_temporal_bo); + + obj_surface->private_data = (void *)hevc_encoder_surface; + obj_surface->free_private_data = (void *)gen_free_hevc_surface; + } + hevc_encoder_surface = (GenHevcSurface *) obj_surface->private_data; + + if (hevc_encoder_surface) { + hevc_encoder_surface->base.frame_store_id = -1; + mfc_context->current_collocated_mv_temporal_buffer[NUM_HCP_CURRENT_COLLOCATED_MV_TEMPORAL_BUFFERS - 1].bo = hevc_encoder_surface->motion_vector_temporal_bo; + + dri_bo_reference(hevc_encoder_surface->motion_vector_temporal_bo); + } + + mfc_context->surface_state.width = obj_surface->orig_width; + mfc_context->surface_state.height = obj_surface->orig_height; + mfc_context->surface_state.w_pitch = obj_surface->width; + mfc_context->surface_state.h_pitch = obj_surface->height; + + /* Setup reference frames and direct mv buffers*/ + for (i = 0; i < MAX_HCP_REFERENCE_SURFACES; i++) { + obj_surface = encode_state->reference_objects[i]; + + if (obj_surface && obj_surface->bo) { + mfc_context->reference_surfaces[i].bo = obj_surface->bo; + dri_bo_reference(obj_surface->bo); + + /* Check MV temporal buffer */ + if (obj_surface->private_data == NULL) { + uint32_t size; + + if (mfc_context->pic_size.ctb_size == 16) + size = ((pSequenceParameter->pic_width_in_luma_samples + 63) >> 6) * + ((pSequenceParameter->pic_height_in_luma_samples + 15) >> 4); + else + size = ((pSequenceParameter->pic_width_in_luma_samples + 31) >> 5) * + ((pSequenceParameter->pic_height_in_luma_samples + 31) >> 5); + size <<= 6; /* in unit of 64bytes */ + + hevc_encoder_surface = calloc(sizeof(GenHevcSurface), 1); + + if (hevc_encoder_surface) { + hevc_encoder_surface->motion_vector_temporal_bo = + dri_bo_alloc(i965->intel.bufmgr, + "motion vector temporal buffer", + size, + 0x1000); + assert(hevc_encoder_surface->motion_vector_temporal_bo); + } + + obj_surface->private_data = (void *)hevc_encoder_surface; + obj_surface->free_private_data = (void *)gen_free_hevc_surface; + } + + hevc_encoder_surface = (GenHevcSurface *) obj_surface->private_data; + + if (hevc_encoder_surface) { + hevc_encoder_surface->base.frame_store_id = -1; + /* Setup MV temporal buffer */ + mfc_context->current_collocated_mv_temporal_buffer[i].bo = hevc_encoder_surface->motion_vector_temporal_bo; + dri_bo_reference(hevc_encoder_surface->motion_vector_temporal_bo); + } + } else { + break; + } + } + + mfc_context->uncompressed_picture_source.bo = encode_state->input_yuv_object->bo; + dri_bo_reference(mfc_context->uncompressed_picture_source.bo); + + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + mfc_context->hcp_indirect_pak_bse_object.bo = bo; + mfc_context->hcp_indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + mfc_context->hcp_indirect_pak_bse_object.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + dri_bo_reference(mfc_context->hcp_indirect_pak_bse_object.bo); + + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)(bo->virtual); + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return vaStatus; +} + +/* HEVC BRC related */ + +static void +intel_hcpe_bit_rate_control_context_init(struct encode_state *encode_state, + struct gen9_hcpe_context *mfc_context) +{ + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int ctb_size = 16; + int width_in_mbs = (pSequenceParameter->pic_width_in_luma_samples + ctb_size - 1) / ctb_size; + int height_in_mbs = (pSequenceParameter->pic_height_in_luma_samples + ctb_size - 1) / ctb_size; + + float fps = pSequenceParameter->vui_time_scale / pSequenceParameter->vui_num_units_in_tick ; + double bitrate = pSequenceParameter->bits_per_second * 1.0; + int inter_mb_size = bitrate * 1.0 / (fps + 4.0) / width_in_mbs / height_in_mbs; + int intra_mb_size = inter_mb_size * 5.0; + int i; + + mfc_context->bit_rate_control_context[HEVC_SLICE_I].target_mb_size = intra_mb_size; + mfc_context->bit_rate_control_context[HEVC_SLICE_I].target_frame_size = intra_mb_size * width_in_mbs * height_in_mbs; + mfc_context->bit_rate_control_context[HEVC_SLICE_P].target_mb_size = inter_mb_size; + mfc_context->bit_rate_control_context[HEVC_SLICE_P].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs; + mfc_context->bit_rate_control_context[HEVC_SLICE_B].target_mb_size = inter_mb_size; + mfc_context->bit_rate_control_context[HEVC_SLICE_B].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs; + + for (i = 0 ; i < 3; i++) { + mfc_context->bit_rate_control_context[i].QpPrimeY = 26; + mfc_context->bit_rate_control_context[i].MaxQpNegModifier = 6; + mfc_context->bit_rate_control_context[i].MaxQpPosModifier = 6; + mfc_context->bit_rate_control_context[i].GrowInit = 6; + mfc_context->bit_rate_control_context[i].GrowResistance = 4; + mfc_context->bit_rate_control_context[i].ShrinkInit = 6; + mfc_context->bit_rate_control_context[i].ShrinkResistance = 4; + + mfc_context->bit_rate_control_context[i].Correct[0] = 8; + mfc_context->bit_rate_control_context[i].Correct[1] = 4; + mfc_context->bit_rate_control_context[i].Correct[2] = 2; + mfc_context->bit_rate_control_context[i].Correct[3] = 2; + mfc_context->bit_rate_control_context[i].Correct[4] = 4; + mfc_context->bit_rate_control_context[i].Correct[5] = 8; + } + + mfc_context->bit_rate_control_context[HEVC_SLICE_I].TargetSizeInWord = (intra_mb_size + 16) / 16; + mfc_context->bit_rate_control_context[HEVC_SLICE_P].TargetSizeInWord = (inter_mb_size + 16) / 16; + mfc_context->bit_rate_control_context[HEVC_SLICE_B].TargetSizeInWord = (inter_mb_size + 16) / 16; + + mfc_context->bit_rate_control_context[HEVC_SLICE_I].MaxSizeInWord = mfc_context->bit_rate_control_context[HEVC_SLICE_I].TargetSizeInWord * 1.5; + mfc_context->bit_rate_control_context[HEVC_SLICE_P].MaxSizeInWord = mfc_context->bit_rate_control_context[HEVC_SLICE_P].TargetSizeInWord * 1.5; + mfc_context->bit_rate_control_context[HEVC_SLICE_B].MaxSizeInWord = mfc_context->bit_rate_control_context[HEVC_SLICE_B].TargetSizeInWord * 1.5; +} + +static void intel_hcpe_brc_init(struct encode_state *encode_state, + struct intel_encoder_context* encoder_context) +{ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + VAEncMiscParameterHRD* pParameterHRD = NULL; + VAEncMiscParameterBuffer* pMiscParamHRD = NULL; + + double bitrate = pSequenceParameter->bits_per_second * 1.0; + double framerate = (double)pSequenceParameter->vui_time_scale / (double)pSequenceParameter->vui_num_units_in_tick; + int inum = 1, pnum = 0, bnum = 0; /* Gop structure: number of I, P, B frames in the Gop. */ + int intra_period = pSequenceParameter->intra_period; + int ip_period = pSequenceParameter->ip_period; + double qp1_size = 0.1 * 8 * 3 * pSequenceParameter->pic_width_in_luma_samples * pSequenceParameter->pic_height_in_luma_samples / 2; + double qp51_size = 0.001 * 8 * 3 * pSequenceParameter->pic_width_in_luma_samples * pSequenceParameter->pic_height_in_luma_samples / 2; + double bpf; + int ratio_min = 1; + int ratio_max = 32; + int ratio = 8; + double buffer_size = 0; + + if (!encode_state->misc_param[VAEncMiscParameterTypeHRD] || !encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer) + return; + + pMiscParamHRD = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer; + pParameterHRD = (VAEncMiscParameterHRD*)pMiscParamHRD->data; + + if (pSequenceParameter->ip_period) { + pnum = (intra_period + ip_period - 1) / ip_period - 1; + bnum = intra_period - inum - pnum; + } + + mfc_context->brc.mode = encoder_context->rate_control_mode; + + mfc_context->brc.target_frame_size[HEVC_SLICE_I] = (int)((double)((bitrate * intra_period) / framerate) / + (double)(inum + BRC_PWEIGHT * pnum + BRC_BWEIGHT * bnum)); + mfc_context->brc.target_frame_size[HEVC_SLICE_P] = BRC_PWEIGHT * mfc_context->brc.target_frame_size[HEVC_SLICE_I]; + mfc_context->brc.target_frame_size[HEVC_SLICE_B] = BRC_BWEIGHT * mfc_context->brc.target_frame_size[HEVC_SLICE_I]; + + mfc_context->brc.gop_nums[HEVC_SLICE_I] = inum; + mfc_context->brc.gop_nums[HEVC_SLICE_P] = pnum; + mfc_context->brc.gop_nums[HEVC_SLICE_B] = bnum; + + bpf = mfc_context->brc.bits_per_frame = bitrate / framerate; + + if (!pParameterHRD || pParameterHRD->buffer_size <= 0) + { + mfc_context->hrd.buffer_size = bitrate * ratio; + mfc_context->hrd.current_buffer_fullness = + (double)(bitrate * ratio/2 < mfc_context->hrd.buffer_size) ? + bitrate * ratio/2 : mfc_context->hrd.buffer_size / 2.; + }else + { + buffer_size = (double)pParameterHRD->buffer_size ; + if(buffer_size < bitrate * ratio_min) + { + buffer_size = bitrate * ratio_min; + }else if (buffer_size > bitrate * ratio_max) + { + buffer_size = bitrate * ratio_max ; + } + mfc_context->hrd.buffer_size =buffer_size; + if(pParameterHRD->initial_buffer_fullness > 0) + { + mfc_context->hrd.current_buffer_fullness = + (double)(pParameterHRD->initial_buffer_fullness < mfc_context->hrd.buffer_size) ? + pParameterHRD->initial_buffer_fullness : mfc_context->hrd.buffer_size / 2.; + }else + { + mfc_context->hrd.current_buffer_fullness = mfc_context->hrd.buffer_size / 2.; + + } + } + + mfc_context->hrd.target_buffer_fullness = (double)mfc_context->hrd.buffer_size / 2.; + mfc_context->hrd.buffer_capacity = (double)mfc_context->hrd.buffer_size / qp1_size; + mfc_context->hrd.violation_noted = 0; + + if ((bpf > qp51_size) && (bpf < qp1_size)) { + mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY = 51 - 50 * (bpf - qp51_size) / (qp1_size - qp51_size); + } else if (bpf >= qp1_size) + mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY = 1; + else if (bpf <= qp51_size) + mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY = 51; + + mfc_context->bit_rate_control_context[HEVC_SLICE_I].QpPrimeY = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY; + mfc_context->bit_rate_control_context[HEVC_SLICE_B].QpPrimeY = mfc_context->bit_rate_control_context[HEVC_SLICE_I].QpPrimeY; + + BRC_CLIP(mfc_context->bit_rate_control_context[HEVC_SLICE_I].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[HEVC_SLICE_B].QpPrimeY, 1, 51); +} + +int intel_hcpe_update_hrd(struct encode_state *encode_state, + struct gen9_hcpe_context *mfc_context, + int frame_bits) +{ + double prev_bf = mfc_context->hrd.current_buffer_fullness; + + mfc_context->hrd.current_buffer_fullness -= frame_bits; + + if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness <= 0.) { + mfc_context->hrd.current_buffer_fullness = prev_bf; + return BRC_UNDERFLOW; + } + + mfc_context->hrd.current_buffer_fullness += mfc_context->brc.bits_per_frame; + if (mfc_context->hrd.buffer_size > 0 && mfc_context->hrd.current_buffer_fullness > mfc_context->hrd.buffer_size) { + if (mfc_context->brc.mode == VA_RC_VBR) + mfc_context->hrd.current_buffer_fullness = mfc_context->hrd.buffer_size; + else { + mfc_context->hrd.current_buffer_fullness = prev_bf; + return BRC_OVERFLOW; + } + } + return BRC_NO_HRD_VIOLATION; +} + +int intel_hcpe_brc_postpack(struct encode_state *encode_state, + struct gen9_hcpe_context *mfc_context, + int frame_bits) +{ + gen6_brc_status sts = BRC_NO_HRD_VIOLATION; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + int slicetype = pSliceParameter->slice_type; + int qpi = mfc_context->bit_rate_control_context[HEVC_SLICE_I].QpPrimeY; + int qpp = mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY; + int qpb = mfc_context->bit_rate_control_context[HEVC_SLICE_B].QpPrimeY; + int qp; // quantizer of previously encoded slice of current type + int qpn; // predicted quantizer for next frame of current type in integer format + double qpf; // predicted quantizer for next frame of current type in float format + double delta_qp; // QP correction + int target_frame_size, frame_size_next; + /* Notes: + * x - how far we are from HRD buffer borders + * y - how far we are from target HRD buffer fullness + */ + double x, y; + double frame_size_alpha; + + if(slicetype == HEVC_SLICE_B) { + if(pSequenceParameter->ip_period == 1) + { + slicetype = HEVC_SLICE_P; + }else if(mfc_context->vui_hrd.i_frame_number % pSequenceParameter->ip_period == 1){ + slicetype = HEVC_SLICE_P; + } + } + + qp = mfc_context->bit_rate_control_context[slicetype].QpPrimeY; + + target_frame_size = mfc_context->brc.target_frame_size[slicetype]; + if (mfc_context->hrd.buffer_capacity < 5) + frame_size_alpha = 0; + else + frame_size_alpha = (double)mfc_context->brc.gop_nums[slicetype]; + if (frame_size_alpha > 30) frame_size_alpha = 30; + frame_size_next = target_frame_size + (double)(target_frame_size - frame_bits) / + (double)(frame_size_alpha + 1.); + + /* frame_size_next: avoiding negative number and too small value */ + if ((double)frame_size_next < (double)(target_frame_size * 0.25)) + frame_size_next = (int)((double)target_frame_size * 0.25); + + qpf = (double)qp * target_frame_size / frame_size_next; + qpn = (int)(qpf + 0.5); + + if (qpn == qp) { + /* setting qpn we round qpf making mistakes: now we are trying to compensate this */ + mfc_context->brc.qpf_rounding_accumulator += qpf - qpn; + if (mfc_context->brc.qpf_rounding_accumulator > 1.0) { + qpn++; + mfc_context->brc.qpf_rounding_accumulator = 0.; + } else if (mfc_context->brc.qpf_rounding_accumulator < -1.0) { + qpn--; + mfc_context->brc.qpf_rounding_accumulator = 0.; + } + } + /* making sure that QP is not changing too fast */ + if ((qpn - qp) > BRC_QP_MAX_CHANGE) qpn = qp + BRC_QP_MAX_CHANGE; + else if ((qpn - qp) < -BRC_QP_MAX_CHANGE) qpn = qp - BRC_QP_MAX_CHANGE; + /* making sure that with QP predictions we did do not leave QPs range */ + BRC_CLIP(qpn, 1, 51); + + /* checking wthether HRD compliance is still met */ + sts = intel_hcpe_update_hrd(encode_state, mfc_context, frame_bits); + + /* calculating QP delta as some function*/ + x = mfc_context->hrd.target_buffer_fullness - mfc_context->hrd.current_buffer_fullness; + if (x > 0) { + x /= mfc_context->hrd.target_buffer_fullness; + y = mfc_context->hrd.current_buffer_fullness; + } else { + x /= (mfc_context->hrd.buffer_size - mfc_context->hrd.target_buffer_fullness); + y = mfc_context->hrd.buffer_size - mfc_context->hrd.current_buffer_fullness; + } + if (y < 0.01) y = 0.01; + if (x > 1) x = 1; + else if (x < -1) x = -1; + + delta_qp = BRC_QP_MAX_CHANGE * exp(-1 / y) * sin(BRC_PI_0_5 * x); + qpn = (int)(qpn + delta_qp + 0.5); + + /* making sure that with QP predictions we did do not leave QPs range */ + BRC_CLIP(qpn, 1, 51); + + if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation + /* correcting QPs of slices of other types */ + if (slicetype == HEVC_SLICE_P) { + if (abs(qpn + BRC_P_B_QP_DIFF - qpb) > 2) + mfc_context->bit_rate_control_context[HEVC_SLICE_B].QpPrimeY += (qpn + BRC_P_B_QP_DIFF - qpb) >> 1; + if (abs(qpn - BRC_I_P_QP_DIFF - qpi) > 2) + mfc_context->bit_rate_control_context[HEVC_SLICE_I].QpPrimeY += (qpn - BRC_I_P_QP_DIFF - qpi) >> 1; + } else if (slicetype == HEVC_SLICE_I) { + if (abs(qpn + BRC_I_B_QP_DIFF - qpb) > 4) + mfc_context->bit_rate_control_context[HEVC_SLICE_B].QpPrimeY += (qpn + BRC_I_B_QP_DIFF - qpb) >> 2; + if (abs(qpn + BRC_I_P_QP_DIFF - qpp) > 2) + mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY += (qpn + BRC_I_P_QP_DIFF - qpp) >> 2; + } else { // HEVC_SLICE_B + if (abs(qpn - BRC_P_B_QP_DIFF - qpp) > 2) + mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY += (qpn - BRC_P_B_QP_DIFF - qpp) >> 1; + if (abs(qpn - BRC_I_B_QP_DIFF - qpi) > 4) + mfc_context->bit_rate_control_context[HEVC_SLICE_I].QpPrimeY += (qpn - BRC_I_B_QP_DIFF - qpi) >> 2; + } + BRC_CLIP(mfc_context->bit_rate_control_context[HEVC_SLICE_I].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[HEVC_SLICE_P].QpPrimeY, 1, 51); + BRC_CLIP(mfc_context->bit_rate_control_context[HEVC_SLICE_B].QpPrimeY, 1, 51); + } else if (sts == BRC_UNDERFLOW) { // underflow + if (qpn <= qp) qpn = qp + 1; + if (qpn > 51) { + qpn = 51; + sts = BRC_UNDERFLOW_WITH_MAX_QP; //underflow with maxQP + } + } else if (sts == BRC_OVERFLOW) { + if (qpn >= qp) qpn = qp - 1; + if (qpn < 1) { // < 0 (?) overflow with minQP + qpn = 1; + sts = BRC_OVERFLOW_WITH_MIN_QP; // bit stuffing to be done + } + } + + mfc_context->bit_rate_control_context[slicetype].QpPrimeY = qpn; + + return sts; +} + +static void intel_hcpe_hrd_context_init(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int target_bit_rate = pSequenceParameter->bits_per_second; + + // current we only support CBR mode. + if (rate_control_mode == VA_RC_CBR) { + mfc_context->vui_hrd.i_bit_rate_value = target_bit_rate >> 10; + mfc_context->vui_hrd.i_cpb_size_value = (target_bit_rate * 8) >> 10; + mfc_context->vui_hrd.i_initial_cpb_removal_delay = mfc_context->vui_hrd.i_cpb_size_value * 0.5 * 1024 / target_bit_rate * 90000; + mfc_context->vui_hrd.i_cpb_removal_delay = 2; + mfc_context->vui_hrd.i_frame_number = 0; + + mfc_context->vui_hrd.i_initial_cpb_removal_delay_length = 24; + mfc_context->vui_hrd.i_cpb_removal_delay_length = 24; + mfc_context->vui_hrd.i_dpb_output_delay_length = 24; + } + +} + +void +intel_hcpe_hrd_context_update(struct encode_state *encode_state, + struct gen9_hcpe_context *mfc_context) +{ + mfc_context->vui_hrd.i_frame_number++; +} + +int intel_hcpe_interlace_check(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAEncSliceParameterBufferHEVC *pSliceParameter; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int log2_cu_size = pSequenceParameter->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = pSequenceParameter->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + int ctb_size = 1 << log2_ctb_size; + int width_in_ctb = (pSequenceParameter->pic_width_in_luma_samples + ctb_size - 1) / ctb_size; + int height_in_ctb = (pSequenceParameter->pic_height_in_luma_samples + ctb_size - 1) / ctb_size; + int i; + int ctbCount = 0; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[i]->buffer; + ctbCount += pSliceParameter->num_ctu_in_slice; + } + + if (ctbCount == (width_in_ctb * height_in_ctb)) + return 0; + + return 1; +} + +/* + * Check whether the parameters related with CBR are updated and decide whether + * it needs to reinitialize the configuration related with CBR. + * Currently it will check the following parameters: + * bits_per_second + * frame_rate + * gop_configuration(intra_period, ip_period, intra_idr_period) + */ +static bool intel_hcpe_brc_updated_check(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + /* to do */ + unsigned int rate_control_mode = encoder_context->rate_control_mode; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + double cur_fps, cur_bitrate; + VAEncSequenceParameterBufferHEVC *pSequenceParameter; + + + if (rate_control_mode != VA_RC_CBR) { + return false; + } + + pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + + cur_bitrate = pSequenceParameter->bits_per_second; + cur_fps = (double)pSequenceParameter->vui_time_scale / + (double)pSequenceParameter->vui_num_units_in_tick; + + if ((cur_bitrate == mfc_context->brc.saved_bps) && + (cur_fps == mfc_context->brc.saved_fps) && + (pSequenceParameter->intra_period == mfc_context->brc.saved_intra_period) && + (pSequenceParameter->intra_idr_period == mfc_context->brc.saved_idr_period) && + (pSequenceParameter->intra_period == mfc_context->brc.saved_intra_period)) { + /* the parameters related with CBR are not updaetd */ + return false; + } + + mfc_context->brc.saved_ip_period = pSequenceParameter->ip_period; + mfc_context->brc.saved_intra_period = pSequenceParameter->intra_period; + mfc_context->brc.saved_idr_period = pSequenceParameter->intra_idr_period; + mfc_context->brc.saved_fps = cur_fps; + mfc_context->brc.saved_bps = cur_bitrate; + return true; +} + +void intel_hcpe_brc_prepare(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + unsigned int rate_control_mode = encoder_context->rate_control_mode; + struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; + + if (rate_control_mode == VA_RC_CBR) { + bool brc_updated; + assert(encoder_context->codec != CODEC_MPEG2); + + brc_updated = intel_hcpe_brc_updated_check(encode_state, encoder_context); + + /*Programing bit rate control */ + if ((mfc_context->bit_rate_control_context[HEVC_SLICE_I].MaxSizeInWord == 0) || + brc_updated) { + intel_hcpe_bit_rate_control_context_init(encode_state, mfc_context); + intel_hcpe_brc_init(encode_state, encoder_context); + } + + /*Programing HRD control */ + if ((mfc_context->vui_hrd.i_cpb_size_value == 0) || brc_updated) + intel_hcpe_hrd_context_init(encode_state, encoder_context); + } +} + +/* HEVC interface API for encoder */ + +static VAStatus +gen9_hcpe_hevc_encode_picture(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_hcpe_context *hcpe_context = encoder_context->mfc_context; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + int current_frame_bits_size; + int sts; + + for (;;) { + gen9_hcpe_init(ctx, encode_state, encoder_context); + intel_hcpe_hevc_prepare(ctx, encode_state, encoder_context); + /*Programing bcs pipeline*/ + gen9_hcpe_hevc_pipeline_programing(ctx, encode_state, encoder_context); //filling the pipeline + gen9_hcpe_run(ctx, encode_state, encoder_context); + if (rate_control_mode == VA_RC_CBR /*|| rate_control_mode == VA_RC_VBR*/) { + gen9_hcpe_stop(ctx, encode_state, encoder_context, ¤t_frame_bits_size); + sts = intel_hcpe_brc_postpack(encode_state, hcpe_context, current_frame_bits_size); + if (sts == BRC_NO_HRD_VIOLATION) { + intel_hcpe_hrd_context_update(encode_state, hcpe_context); + break; + } else if (sts == BRC_OVERFLOW_WITH_MIN_QP || sts == BRC_UNDERFLOW_WITH_MAX_QP) { + if (!hcpe_context->hrd.violation_noted) { + fprintf(stderr, "Unrepairable %s!\n", (sts == BRC_OVERFLOW_WITH_MIN_QP) ? "overflow" : "underflow"); + hcpe_context->hrd.violation_noted = 1; + } + return VA_STATUS_SUCCESS; + } + } else { + break; + } + } + + return VA_STATUS_SUCCESS; +} + +void +gen9_hcpe_context_destroy(void *context) +{ + struct gen9_hcpe_context *hcpe_context = context; + int i; + + dri_bo_unreference(hcpe_context->deblocking_filter_line_buffer.bo); + hcpe_context->deblocking_filter_line_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->deblocking_filter_tile_line_buffer.bo); + hcpe_context->deblocking_filter_tile_line_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->deblocking_filter_tile_column_buffer.bo); + hcpe_context->deblocking_filter_tile_column_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->uncompressed_picture_source.bo); + hcpe_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(hcpe_context->metadata_line_buffer.bo); + hcpe_context->metadata_line_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->metadata_tile_line_buffer.bo); + hcpe_context->metadata_tile_line_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->metadata_tile_column_buffer.bo); + hcpe_context->metadata_tile_column_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->sao_line_buffer.bo); + hcpe_context->sao_line_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->sao_tile_line_buffer.bo); + hcpe_context->sao_tile_line_buffer.bo = NULL; + + dri_bo_unreference(hcpe_context->sao_tile_column_buffer.bo); + hcpe_context->sao_tile_column_buffer.bo = NULL; + + /* mv temporal buffer */ + for (i = 0; i < NUM_HCP_CURRENT_COLLOCATED_MV_TEMPORAL_BUFFERS; i++) { + if (hcpe_context->current_collocated_mv_temporal_buffer[i].bo != NULL) + dri_bo_unreference(hcpe_context->current_collocated_mv_temporal_buffer[i].bo); + hcpe_context->current_collocated_mv_temporal_buffer[i].bo = NULL; + } + + for (i = 0; i < MAX_HCP_REFERENCE_SURFACES; i++) { + dri_bo_unreference(hcpe_context->reference_surfaces[i].bo); + hcpe_context->reference_surfaces[i].bo = NULL; + } + + dri_bo_unreference(hcpe_context->hcp_indirect_cu_object.bo); + hcpe_context->hcp_indirect_cu_object.bo = NULL; + + dri_bo_unreference(hcpe_context->hcp_indirect_pak_bse_object.bo); + hcpe_context->hcp_indirect_pak_bse_object.bo = NULL; + + dri_bo_unreference(hcpe_context->hcp_batchbuffer_surface.bo); + hcpe_context->hcp_batchbuffer_surface.bo = NULL; + + dri_bo_unreference(hcpe_context->aux_batchbuffer_surface.bo); + hcpe_context->aux_batchbuffer_surface.bo = NULL; + + if (hcpe_context->aux_batchbuffer) + intel_batchbuffer_free(hcpe_context->aux_batchbuffer); + + hcpe_context->aux_batchbuffer = NULL; + + free(hcpe_context); +} + +VAStatus gen9_hcpe_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus; + + switch (profile) { + case VAProfileHEVCMain: + vaStatus = gen9_hcpe_hevc_encode_picture(ctx, encode_state, encoder_context); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + return vaStatus; +} + +Bool gen9_hcpe_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_hcpe_context *hcpe_context = calloc(1, sizeof(struct gen9_hcpe_context)); + + assert(hcpe_context); + hcpe_context->pipe_mode_select = gen9_hcpe_pipe_mode_select; + hcpe_context->set_surface_state = gen9_hcpe_surface_state; + hcpe_context->ind_obj_base_addr_state = gen9_hcpe_ind_obj_base_addr_state; + hcpe_context->pic_state = gen9_hcpe_hevc_pic_state; + hcpe_context->qm_state = gen9_hcpe_hevc_qm_state; + hcpe_context->fqm_state = gen9_hcpe_hevc_fqm_state; + hcpe_context->insert_object = gen9_hcpe_hevc_insert_object; + hcpe_context->buffer_suface_setup = gen8_gpe_buffer_suface_setup; + + encoder_context->mfc_context = hcpe_context; + encoder_context->mfc_context_destroy = gen9_hcpe_context_destroy; + encoder_context->mfc_pipeline = gen9_hcpe_pipeline; + encoder_context->mfc_brc_prepare = intel_hcpe_brc_prepare; + + hevc_gen_default_iq_matrix_encoder(&hcpe_context->iq_matrix_hevc); + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_mfd.c intel-vaapi-driver-1.7.1/src/gen9_mfd.c --- intel-vaapi-driver-1.0.15/src/gen9_mfd.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_mfd.c 2016-06-21 01:35:12.000000000 +0000 @@ -0,0 +1,1991 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * + */ + +#include "sysdeps.h" + +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_decoder_utils.h" + +#include "gen9_mfd.h" +#include "intel_media.h" +#include "vp9_probs.h" + +#define OUT_BUFFER(buf_bo, is_target, ma) do { \ + if (buf_bo) { \ + OUT_BCS_RELOC(batch, \ + buf_bo, \ + I915_GEM_DOMAIN_RENDER, \ + is_target ? I915_GEM_DOMAIN_RENDER : 0, \ + 0); \ + } else { \ + OUT_BCS_BATCH(batch, 0); \ + } \ + OUT_BCS_BATCH(batch, 0); \ + if (ma) \ + OUT_BCS_BATCH(batch, 0); \ + } while (0) + +#define OUT_BUFFER_MA_TARGET(buf_bo) OUT_BUFFER(buf_bo, 1, 1) +#define OUT_BUFFER_MA_REFERENCE(buf_bo) OUT_BUFFER(buf_bo, 0, 1) +#define OUT_BUFFER_NMA_TARGET(buf_bo) OUT_BUFFER(buf_bo, 1, 0) +#define OUT_BUFFER_NMA_REFERENCE(buf_bo) OUT_BUFFER(buf_bo, 0, 0) + +static void +gen9_hcpd_init_hevc_surface(VADriverContextP ctx, + VAPictureParameterBufferHEVC *pic_param, + struct object_surface *obj_surface, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + GenHevcSurface *gen9_hevc_surface; + + if (!obj_surface) + return; + + obj_surface->free_private_data = gen_free_hevc_surface; + gen9_hevc_surface = obj_surface->private_data; + + if (!gen9_hevc_surface) { + gen9_hevc_surface = calloc(sizeof(GenHevcSurface), 1); + assert(gen9_hevc_surface); + gen9_hevc_surface->base.frame_store_id = -1; + obj_surface->private_data = gen9_hevc_surface; + } + + if (gen9_hevc_surface->motion_vector_temporal_bo == NULL) { + uint32_t size; + + if (gen9_hcpd_context->ctb_size == 16) + size = ((gen9_hcpd_context->picture_width_in_pixels + 63) >> 6) * + ((gen9_hcpd_context->picture_height_in_pixels + 15) >> 4); + else + size = ((gen9_hcpd_context->picture_width_in_pixels + 31) >> 5) * + ((gen9_hcpd_context->picture_height_in_pixels + 31) >> 5); + + size <<= 6; /* in unit of 64bytes */ + gen9_hevc_surface->motion_vector_temporal_bo = dri_bo_alloc(i965->intel.bufmgr, + "motion vector temporal buffer", + size, + 0x1000); + } +} + +static VAStatus +gen9_hcpd_hevc_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAPictureParameterBufferHEVC *pic_param; + struct object_surface *obj_surface; + uint32_t size; + int size_shift = 3; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer; + intel_update_hevc_frame_store_index(ctx, + decode_state, + pic_param, + gen9_hcpd_context->reference_surfaces, + &gen9_hcpd_context->fs_ctx); + + gen9_hcpd_context->picture_width_in_pixels = pic_param->pic_width_in_luma_samples; + gen9_hcpd_context->picture_height_in_pixels = pic_param->pic_height_in_luma_samples; + gen9_hcpd_context->ctb_size = (1 << (pic_param->log2_min_luma_coding_block_size_minus3 + + 3 + + pic_param->log2_diff_max_min_luma_coding_block_size)); + gen9_hcpd_context->picture_width_in_ctbs = ALIGN(gen9_hcpd_context->picture_width_in_pixels, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size; + gen9_hcpd_context->picture_height_in_ctbs = ALIGN(gen9_hcpd_context->picture_height_in_pixels, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size; + gen9_hcpd_context->min_cb_size = (1 << (pic_param->log2_min_luma_coding_block_size_minus3 + 3)); + gen9_hcpd_context->picture_width_in_min_cb_minus1 = gen9_hcpd_context->picture_width_in_pixels / gen9_hcpd_context->min_cb_size - 1; + gen9_hcpd_context->picture_height_in_min_cb_minus1 = gen9_hcpd_context->picture_height_in_pixels / gen9_hcpd_context->min_cb_size - 1; + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + hevc_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param); + gen9_hcpd_init_hevc_surface(ctx, pic_param, obj_surface, gen9_hcpd_context); + + if((pic_param->bit_depth_luma_minus8 > 0) + || (pic_param->bit_depth_chroma_minus8 > 0)) + size_shift = 2; + + size = ALIGN(gen9_hcpd_context->picture_width_in_pixels, 32) >> size_shift; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_line_buffer), "line buffer", size); + ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_line_buffer), "tile line buffer", size); + + size = ALIGN(gen9_hcpd_context->picture_height_in_pixels + 6 * gen9_hcpd_context->picture_height_in_ctbs, 32) >> size_shift; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_column_buffer), "tile column buffer", size); + + size = (((gen9_hcpd_context->picture_width_in_pixels + 15) >> 4) * 188 + 9 * gen9_hcpd_context->picture_width_in_ctbs + 1023) >> 9; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_line_buffer), "metadata line buffer", size); + + size = (((gen9_hcpd_context->picture_width_in_pixels + 15) >> 4) * 172 + 9 * gen9_hcpd_context->picture_width_in_ctbs + 1023) >> 9; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_line_buffer), "metadata tile line buffer", size); + + if (IS_CHERRYVIEW(i965->intel.device_info)) + size = (((gen9_hcpd_context->picture_height_in_pixels + 15) >> 4) * 256 + 9 * gen9_hcpd_context->picture_height_in_ctbs + 1023) >> 9; + else + size = (((gen9_hcpd_context->picture_height_in_pixels + 15) >> 4) * 176 + 89 * gen9_hcpd_context->picture_height_in_ctbs + 1023) >> 9; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_column_buffer), "metadata tile column buffer", size); + + size = ALIGN(((gen9_hcpd_context->picture_width_in_pixels >> 1) + 3 * gen9_hcpd_context->picture_width_in_ctbs), 16) >> size_shift; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->sao_line_buffer), "sao line buffer", size); + + size = ALIGN(((gen9_hcpd_context->picture_width_in_pixels >> 1) + 6 * gen9_hcpd_context->picture_width_in_ctbs), 16) >> size_shift; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->sao_tile_line_buffer), "sao tile line buffer", size); + + size = ALIGN(((gen9_hcpd_context->picture_height_in_pixels >> 1) + 6 * gen9_hcpd_context->picture_height_in_ctbs), 16) >> size_shift; + size <<= 6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->sao_tile_column_buffer), "sao tile column buffer", size); + + gen9_hcpd_context->first_inter_slice_collocated_ref_idx = 0; + gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = 0; + gen9_hcpd_context->first_inter_slice_valid = 0; + + return VA_STATUS_SUCCESS; +} + +static void +gen9_hcpd_pipe_mode_select(VADriverContextP ctx, + struct decode_state *decode_state, + int codec, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + + assert((codec == HCP_CODEC_HEVC) || (codec == HCP_CODEC_VP9)); + + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (6 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 4); + + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (4 - 2)); + } + OUT_BCS_BATCH(batch, + (codec << 5) | + (0 << 3) | /* disable Pic Status / Error Report */ + HCP_CODEC_SELECT_DECODE); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + if(IS_KBL(i965->intel.device_info)) + { + if(codec == HCP_CODEC_VP9) + OUT_BCS_BATCH(batch, 1<<6); + else + OUT_BCS_BATCH(batch, 0); + + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_surface_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + struct object_surface *obj_surface = decode_state->render_object; + unsigned int y_cb_offset; + VAPictureParameterBufferHEVC *pic_param; + + assert(obj_surface); + + pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer; + y_cb_offset = obj_surface->y_cb_offset; + + BEGIN_BCS_BATCH(batch, 3); + + OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (0 << 28) | /* surface id */ + (obj_surface->width - 1)); /* pitch - 1 */ + if((pic_param->bit_depth_luma_minus8 > 0) + || (pic_param->bit_depth_chroma_minus8 > 0)) + { + OUT_BCS_BATCH(batch, + (SURFACE_FORMAT_P010 << 28) | + y_cb_offset); + } + else + { + OUT_BCS_BATCH(batch, + (SURFACE_FORMAT_PLANAR_420_8 << 28) | + y_cb_offset); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_pipe_buf_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + struct object_surface *obj_surface; + GenHevcSurface *gen9_hevc_surface; + int i; + + BEGIN_BCS_BATCH(batch, 95); + + OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (95 - 2)); + + obj_surface = decode_state->render_object; + assert(obj_surface && obj_surface->bo); + gen9_hevc_surface = obj_surface->private_data; + assert(gen9_hevc_surface && gen9_hevc_surface->motion_vector_temporal_bo); + + OUT_BUFFER_MA_TARGET(obj_surface->bo); /* DW 1..3 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_line_buffer.bo);/* DW 4..6 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_line_buffer.bo); /* DW 7..9 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_column_buffer.bo); /* DW 10..12 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_line_buffer.bo); /* DW 13..15 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_line_buffer.bo); /* DW 16..18 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_column_buffer.bo); /* DW 19..21 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->sao_line_buffer.bo); /* DW 22..24 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->sao_tile_line_buffer.bo); /* DW 25..27 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->sao_tile_column_buffer.bo); /* DW 28..30 */ + OUT_BUFFER_MA_TARGET(gen9_hevc_surface->motion_vector_temporal_bo); /* DW 31..33 */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 34..36, reserved */ + + for (i = 0; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) { + obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface; + + if (obj_surface) + OUT_BUFFER_NMA_REFERENCE(obj_surface->bo); + else + OUT_BUFFER_NMA_REFERENCE(NULL); + } + OUT_BCS_BATCH(batch, 0); /* DW 53, memory address attributes */ + + OUT_BUFFER_MA_REFERENCE(NULL); /* DW 54..56, ignore for decoding mode */ + OUT_BUFFER_MA_TARGET(NULL); + OUT_BUFFER_MA_TARGET(NULL); + OUT_BUFFER_MA_TARGET(NULL); + + for (i = 0; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) { + obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface; + gen9_hevc_surface = NULL; + + if (obj_surface && obj_surface->private_data) + gen9_hevc_surface = obj_surface->private_data; + + if (gen9_hevc_surface) + OUT_BUFFER_NMA_REFERENCE(gen9_hevc_surface->motion_vector_temporal_bo); + else + OUT_BUFFER_NMA_REFERENCE(NULL); + } + OUT_BCS_BATCH(batch, 0); /* DW 82, memory address attributes */ + + OUT_BUFFER_MA_TARGET(NULL); /* DW 83..85, ignore for HEVC */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 86..88, ignore for HEVC */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 89..91, ignore for HEVC */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 92..94, ignore for HEVC */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_ind_obj_base_addr_state(VADriverContextP ctx, + dri_bo *slice_data_bo, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 14); + + OUT_BCS_BATCH(batch, HCP_IND_OBJ_BASE_ADDR_STATE | (14 - 2)); + OUT_BUFFER_MA_REFERENCE(slice_data_bo); /* DW 1..3 */ + OUT_BUFFER_NMA_REFERENCE(NULL); /* DW 4..5, Upper Bound */ + OUT_BUFFER_MA_REFERENCE(NULL); /* DW 6..8, CU, ignored */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 9..11, PAK-BSE, ignored */ + OUT_BUFFER_NMA_TARGET(NULL); /* DW 12..13, Upper Bound */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_qm_state(VADriverContextP ctx, + int size_id, + int color_component, + int pred_type, + int dc, + unsigned char *qm, + int qm_length, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + unsigned char qm_buffer[64]; + + assert(qm_length <= 64); + memset(qm_buffer, 0, sizeof(qm_buffer)); + memcpy(qm_buffer, qm, qm_length); + + BEGIN_BCS_BATCH(batch, 18); + + OUT_BCS_BATCH(batch, HCP_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, + dc << 5 | + color_component << 3 | + size_id << 1 | + pred_type); + intel_batchbuffer_data(batch, qm_buffer, 64); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_hevc_qm_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + VAIQMatrixBufferHEVC *iq_matrix; + VAPictureParameterBufferHEVC *pic_param; + int i; + + if (decode_state->iq_matrix && decode_state->iq_matrix->buffer) + iq_matrix = (VAIQMatrixBufferHEVC *)decode_state->iq_matrix->buffer; + else + iq_matrix = &gen9_hcpd_context->iq_matrix_hevc; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer; + + if (!pic_param->pic_fields.bits.scaling_list_enabled_flag) + iq_matrix = &gen9_hcpd_context->iq_matrix_hevc; + + for (i = 0; i < 6; i++) { + gen9_hcpd_qm_state(ctx, + 0, i % 3, i / 3, 0, + iq_matrix->ScalingList4x4[i], 16, + gen9_hcpd_context); + } + + for (i = 0; i < 6; i++) { + gen9_hcpd_qm_state(ctx, + 1, i % 3, i / 3, 0, + iq_matrix->ScalingList8x8[i], 64, + gen9_hcpd_context); + } + + for (i = 0; i < 6; i++) { + gen9_hcpd_qm_state(ctx, + 2, i % 3, i / 3, iq_matrix->ScalingListDC16x16[i], + iq_matrix->ScalingList16x16[i], 64, + gen9_hcpd_context); + } + + for (i = 0; i < 2; i++) { + gen9_hcpd_qm_state(ctx, + 3, 0, i % 2, iq_matrix->ScalingListDC32x32[i], + iq_matrix->ScalingList32x32[i], 64, + gen9_hcpd_context); + } +} + +static void +gen9_hcpd_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + VAPictureParameterBufferHEVC *pic_param; + int max_pcm_size_minus3 = 0, min_pcm_size_minus3 = 0; + int pcm_sample_bit_depth_luma_minus1 = 7, pcm_sample_bit_depth_chroma_minus1 = 7; + /* + * 7.4.3.1 + * + * When not present, the value of loop_filter_across_tiles_enabled_flag + * is inferred to be equal to 1. + */ + int loop_filter_across_tiles_enabled_flag = 1; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer; + + if (pic_param->pic_fields.bits.pcm_enabled_flag) { + max_pcm_size_minus3 = pic_param->log2_min_pcm_luma_coding_block_size_minus3 + + pic_param->log2_diff_max_min_pcm_luma_coding_block_size; + min_pcm_size_minus3 = pic_param->log2_min_pcm_luma_coding_block_size_minus3; + pcm_sample_bit_depth_luma_minus1 = (pic_param->pcm_sample_bit_depth_luma_minus1 & 0x0f); + pcm_sample_bit_depth_chroma_minus1 = (pic_param->pcm_sample_bit_depth_chroma_minus1 & 0x0f); + } else { + max_pcm_size_minus3 = MIN(pic_param->log2_min_luma_coding_block_size_minus3 + pic_param->log2_diff_max_min_luma_coding_block_size, 2); + } + + if (pic_param->pic_fields.bits.tiles_enabled_flag) + loop_filter_across_tiles_enabled_flag = pic_param->pic_fields.bits.loop_filter_across_tiles_enabled_flag; + + BEGIN_BCS_BATCH(batch, 19); + + OUT_BCS_BATCH(batch, HCP_PIC_STATE | (19 - 2)); + + OUT_BCS_BATCH(batch, + gen9_hcpd_context->picture_height_in_min_cb_minus1 << 16 | + gen9_hcpd_context->picture_width_in_min_cb_minus1); + OUT_BCS_BATCH(batch, + max_pcm_size_minus3 << 10 | + min_pcm_size_minus3 << 8 | + (pic_param->log2_min_transform_block_size_minus2 + + pic_param->log2_diff_max_min_transform_block_size) << 6 | + pic_param->log2_min_transform_block_size_minus2 << 4 | + (pic_param->log2_min_luma_coding_block_size_minus3 + + pic_param->log2_diff_max_min_luma_coding_block_size) << 2 | + pic_param->log2_min_luma_coding_block_size_minus3); + OUT_BCS_BATCH(batch, 0); /* DW 3, ignored */ + OUT_BCS_BATCH(batch, + 0 << 27 | + pic_param->pic_fields.bits.strong_intra_smoothing_enabled_flag << 26 | + pic_param->pic_fields.bits.transquant_bypass_enabled_flag << 25 | + pic_param->pic_fields.bits.amp_enabled_flag << 23 | + pic_param->pic_fields.bits.transform_skip_enabled_flag << 22 | + !(pic_param->CurrPic.flags & VA_PICTURE_HEVC_BOTTOM_FIELD) << 21 | + !!(pic_param->CurrPic.flags & VA_PICTURE_HEVC_FIELD_PIC) << 20 | + pic_param->pic_fields.bits.weighted_pred_flag << 19 | + pic_param->pic_fields.bits.weighted_bipred_flag << 18 | + pic_param->pic_fields.bits.tiles_enabled_flag << 17 | + pic_param->pic_fields.bits.entropy_coding_sync_enabled_flag << 16 | + loop_filter_across_tiles_enabled_flag << 15 | + pic_param->pic_fields.bits.sign_data_hiding_enabled_flag << 13 | + pic_param->log2_parallel_merge_level_minus2 << 10 | + pic_param->pic_fields.bits.constrained_intra_pred_flag << 9 | + pic_param->pic_fields.bits.pcm_loop_filter_disabled_flag << 8 | + (pic_param->diff_cu_qp_delta_depth & 0x03) << 6 | + pic_param->pic_fields.bits.cu_qp_delta_enabled_flag << 5 | + pic_param->pic_fields.bits.pcm_enabled_flag << 4 | + pic_param->slice_parsing_fields.bits.sample_adaptive_offset_enabled_flag << 3 | + 0); + OUT_BCS_BATCH(batch, + pic_param->bit_depth_luma_minus8 << 27 | + pic_param->bit_depth_chroma_minus8 << 24 | + pcm_sample_bit_depth_luma_minus1 << 20 | + pcm_sample_bit_depth_chroma_minus1 << 16 | + pic_param->max_transform_hierarchy_depth_inter << 13 | + pic_param->max_transform_hierarchy_depth_intra << 10 | + (pic_param->pps_cr_qp_offset & 0x1f) << 5 | + (pic_param->pps_cb_qp_offset & 0x1f)); + OUT_BCS_BATCH(batch, + 0 << 29 | + 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* DW 10 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); /* DW 15 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_tile_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + VAPictureParameterBufferHEVC *pic_param; + uint8_t pos_col[20], pos_row[24]; + int i; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer; + + memset(pos_col, 0, sizeof(pos_col)); + memset(pos_row, 0, sizeof(pos_row)); + + for (i = 0; i <= MIN(pic_param->num_tile_columns_minus1, 18); i++) + pos_col[i + 1] = pos_col[i] + pic_param->column_width_minus1[i] + 1; + + for (i = 0; i <= MIN(pic_param->num_tile_rows_minus1, 20); i++) + pos_row[i + 1] = pos_row[i] + pic_param->row_height_minus1[i] + 1; + + BEGIN_BCS_BATCH(batch, 13); + + OUT_BCS_BATCH(batch, HCP_TILE_STATE | (13 - 2)); + + OUT_BCS_BATCH(batch, + pic_param->num_tile_columns_minus1 << 5 | + pic_param->num_tile_rows_minus1); + intel_batchbuffer_data(batch, pos_col, 20); + intel_batchbuffer_data(batch, pos_row, 24); + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen9_hcpd_get_reference_picture_frame_id(VAPictureHEVC *ref_pic, + GenFrameStore frame_store[MAX_GEN_HCP_REFERENCE_FRAMES]) +{ + int i; + + if (ref_pic->picture_id == VA_INVALID_ID || + (ref_pic->flags & VA_PICTURE_HEVC_INVALID)) + return 0; + + for (i = 0; i < MAX_GEN_HCP_REFERENCE_FRAMES; i++) { + if (ref_pic->picture_id == frame_store[i].surface_id) { + assert(frame_store[i].frame_store_id < MAX_GEN_HCP_REFERENCE_FRAMES); + return frame_store[i].frame_store_id; + } + } + + /* Should never get here !!! */ + assert(0); + return 0; +} + +static void +gen9_hcpd_ref_idx_state_1(struct intel_batchbuffer *batch, + int list, + VAPictureParameterBufferHEVC *pic_param, + VASliceParameterBufferHEVC *slice_param, + GenFrameStore frame_store[MAX_GEN_HCP_REFERENCE_FRAMES]) +{ + int i; + uint8_t num_ref_minus1 = (list ? slice_param->num_ref_idx_l1_active_minus1 : slice_param->num_ref_idx_l0_active_minus1); + uint8_t *ref_list = slice_param->RefPicList[list]; + + BEGIN_BCS_BATCH(batch, 18); + + OUT_BCS_BATCH(batch, HCP_REF_IDX_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, + num_ref_minus1 << 1 | + list); + + for (i = 0; i < 16; i++) { + if (i < MIN((num_ref_minus1 + 1), 15)) { + VAPictureHEVC *ref_pic = &pic_param->ReferenceFrames[ref_list[i]]; + VAPictureHEVC *curr_pic = &pic_param->CurrPic; + + OUT_BCS_BATCH(batch, + !(ref_pic->flags & VA_PICTURE_HEVC_BOTTOM_FIELD) << 15 | + !!(ref_pic->flags & VA_PICTURE_HEVC_FIELD_PIC) << 14 | + !!(ref_pic->flags & VA_PICTURE_HEVC_LONG_TERM_REFERENCE) << 13 | + 0 << 12 | + 0 << 11 | + gen9_hcpd_get_reference_picture_frame_id(ref_pic, frame_store) << 8 | + (CLAMP(-128, 127, curr_pic->pic_order_cnt - ref_pic->pic_order_cnt) & 0xff)); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_ref_idx_state(VADriverContextP ctx, + VAPictureParameterBufferHEVC *pic_param, + VASliceParameterBufferHEVC *slice_param, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + + if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I) + return; + + gen9_hcpd_ref_idx_state_1(batch, 0, pic_param, slice_param, gen9_hcpd_context->reference_surfaces); + + if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P) + return; + + gen9_hcpd_ref_idx_state_1(batch, 1, pic_param, slice_param, gen9_hcpd_context->reference_surfaces); +} + +static void +gen9_hcpd_weightoffset_state_1(struct intel_batchbuffer *batch, + int list, + VASliceParameterBufferHEVC *slice_param) +{ + int i; + uint8_t num_ref_minus1 = (list == 1) ? slice_param->num_ref_idx_l1_active_minus1 : slice_param->num_ref_idx_l0_active_minus1; + int8_t *luma_offset = (list == 1) ? slice_param->luma_offset_l1 : slice_param->luma_offset_l0; + int8_t *delta_luma_weight = (list == 1) ? slice_param->delta_luma_weight_l1 : slice_param->delta_luma_weight_l0; + int8_t (* chroma_offset)[2] = (list == 1) ? slice_param->ChromaOffsetL1 : slice_param->ChromaOffsetL0; + int8_t (* delta_chroma_weight)[2] = (list == 1) ? slice_param->delta_chroma_weight_l1 : slice_param->delta_chroma_weight_l0; + + BEGIN_BCS_BATCH(batch, 34); + + OUT_BCS_BATCH(batch, HCP_WEIGHTOFFSET | (34 - 2)); + OUT_BCS_BATCH(batch, list); + + for (i = 0; i < 16; i++) { + if (i < MIN((num_ref_minus1 + 1), 15)) { + OUT_BCS_BATCH(batch, + (luma_offset[i] & 0xff) << 8 | + (delta_luma_weight[i] & 0xff)); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + for (i = 0; i < 16; i++) { + if (i < MIN((num_ref_minus1 + 1), 15)) { + OUT_BCS_BATCH(batch, + (chroma_offset[i][1] & 0xff) << 24 | + (delta_chroma_weight[i][1] & 0xff) << 16 | + (chroma_offset[i][0] & 0xff) << 8 | + (delta_chroma_weight[i][0] & 0xff)); + } else { + OUT_BCS_BATCH(batch, 0); + } + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_weightoffset_state(VADriverContextP ctx, + VAPictureParameterBufferHEVC *pic_param, + VASliceParameterBufferHEVC *slice_param, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + + if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I) + return; + + if ((slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P && + !pic_param->pic_fields.bits.weighted_pred_flag) || + (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_B && + !pic_param->pic_fields.bits.weighted_bipred_flag)) + return; + + gen9_hcpd_weightoffset_state_1(batch, 0, slice_param); + + if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P) + return; + + gen9_hcpd_weightoffset_state_1(batch, 1, slice_param); +} + +static int +gen9_hcpd_get_collocated_ref_idx(VADriverContextP ctx, + VAPictureParameterBufferHEVC *pic_param, + VASliceParameterBufferHEVC *slice_param, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + uint8_t *ref_list; + VAPictureHEVC *ref_pic; + + if (slice_param->collocated_ref_idx > 14) + return 0; + + if (!slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag) + return 0; + + if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I) + return 0; + + if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P || + (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_B && + slice_param->LongSliceFlags.fields.collocated_from_l0_flag)) + ref_list = slice_param->RefPicList[0]; + else { + assert(slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_B); + ref_list = slice_param->RefPicList[1]; + } + + ref_pic = &pic_param->ReferenceFrames[ref_list[slice_param->collocated_ref_idx]]; + + return gen9_hcpd_get_reference_picture_frame_id(ref_pic, gen9_hcpd_context->reference_surfaces); +} + +static int +gen9_hcpd_is_list_low_delay(uint8_t ref_list_count, + uint8_t ref_list[15], + VAPictureHEVC *curr_pic, + VAPictureHEVC ref_surfaces[15]) +{ + int i; + + for (i = 0; i < MIN(ref_list_count, 15); i++) { + VAPictureHEVC *ref_pic; + + if (ref_list[i] > 14) + continue; + + ref_pic = &ref_surfaces[ref_list[i]]; + + if (ref_pic->pic_order_cnt > curr_pic->pic_order_cnt) + return 0; + } + + return 1; +} + +static int +gen9_hcpd_is_low_delay(VADriverContextP ctx, + VAPictureParameterBufferHEVC *pic_param, + VASliceParameterBufferHEVC *slice_param) +{ + if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I) + return 0; + else if (slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_P) + return gen9_hcpd_is_list_low_delay(slice_param->num_ref_idx_l0_active_minus1 + 1, + slice_param->RefPicList[0], + &pic_param->CurrPic, + pic_param->ReferenceFrames); + else + return gen9_hcpd_is_list_low_delay(slice_param->num_ref_idx_l0_active_minus1 + 1, + slice_param->RefPicList[0], + &pic_param->CurrPic, + pic_param->ReferenceFrames) && + gen9_hcpd_is_list_low_delay(slice_param->num_ref_idx_l1_active_minus1 + 1, + slice_param->RefPicList[1], + &pic_param->CurrPic, + pic_param->ReferenceFrames); +} + +static void +gen9_hcpd_slice_state(VADriverContextP ctx, + VAPictureParameterBufferHEVC *pic_param, + VASliceParameterBufferHEVC *slice_param, + VASliceParameterBufferHEVC *next_slice_param, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos; + unsigned short collocated_ref_idx, collocated_from_l0_flag; + int sliceqp_sign_flag = 0, sliceqp = 0; + + slice_hor_pos = slice_param->slice_segment_address % gen9_hcpd_context->picture_width_in_ctbs; + slice_ver_pos = slice_param->slice_segment_address / gen9_hcpd_context->picture_width_in_ctbs; + + if (next_slice_param) { + next_slice_hor_pos = next_slice_param->slice_segment_address % gen9_hcpd_context->picture_width_in_ctbs; + next_slice_ver_pos = next_slice_param->slice_segment_address / gen9_hcpd_context->picture_width_in_ctbs; + } else { + next_slice_hor_pos = 0; + next_slice_ver_pos = 0; + } + + collocated_ref_idx = gen9_hcpd_get_collocated_ref_idx(ctx, pic_param, slice_param, gen9_hcpd_context); + collocated_from_l0_flag = slice_param->LongSliceFlags.fields.collocated_from_l0_flag; + + if ((!gen9_hcpd_context->first_inter_slice_valid) && + (slice_param->LongSliceFlags.fields.slice_type != HEVC_SLICE_I) && + slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag) { + gen9_hcpd_context->first_inter_slice_collocated_ref_idx = collocated_ref_idx; + gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = collocated_from_l0_flag; + gen9_hcpd_context->first_inter_slice_valid = 1; + } + + /* HW requirement */ + if (gen9_hcpd_context->first_inter_slice_valid && + ((slice_param->LongSliceFlags.fields.slice_type == HEVC_SLICE_I) || + (!slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag))) { + collocated_ref_idx = gen9_hcpd_context->first_inter_slice_collocated_ref_idx; + collocated_from_l0_flag = gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag; + } + + sliceqp = pic_param->init_qp_minus26 + 26 + slice_param->slice_qp_delta; + if((pic_param->bit_depth_luma_minus8 > 0) + || (pic_param->bit_depth_chroma_minus8 > 0)) + { + if(sliceqp < 0) + { + sliceqp_sign_flag = 1; + sliceqp = -sliceqp; + } + } + + BEGIN_BCS_BATCH(batch, 9); + + OUT_BCS_BATCH(batch, HCP_SLICE_STATE | (9 - 2)); + + OUT_BCS_BATCH(batch, + slice_ver_pos << 16 | + slice_hor_pos); + OUT_BCS_BATCH(batch, + next_slice_ver_pos << 16 | + next_slice_hor_pos); + OUT_BCS_BATCH(batch, + (slice_param->slice_cr_qp_offset & 0x1f) << 17 | + (slice_param->slice_cb_qp_offset & 0x1f) << 12 | + sliceqp << 6 | + slice_param->LongSliceFlags.fields.slice_temporal_mvp_enabled_flag << 5 | + slice_param->LongSliceFlags.fields.dependent_slice_segment_flag << 4 | + sliceqp_sign_flag << 3 | + !next_slice_param << 2 | + slice_param->LongSliceFlags.fields.slice_type); + OUT_BCS_BATCH(batch, + collocated_ref_idx << 26 | + (5 - slice_param->five_minus_max_num_merge_cand - 1) << 23 | + slice_param->LongSliceFlags.fields.cabac_init_flag << 22 | + slice_param->luma_log2_weight_denom << 19 | + ((slice_param->luma_log2_weight_denom + slice_param->delta_chroma_log2_weight_denom) & 0x7) << 16 | + collocated_from_l0_flag << 15 | + gen9_hcpd_is_low_delay(ctx, pic_param, slice_param) << 14 | + slice_param->LongSliceFlags.fields.mvd_l1_zero_flag << 13 | + slice_param->LongSliceFlags.fields.slice_sao_luma_flag << 12 | + slice_param->LongSliceFlags.fields.slice_sao_chroma_flag << 11 | + slice_param->LongSliceFlags.fields.slice_loop_filter_across_slices_enabled_flag << 10 | + (slice_param->slice_beta_offset_div2 & 0xf) << 5 | + (slice_param->slice_tc_offset_div2 & 0xf) << 1 | + slice_param->LongSliceFlags.fields.slice_deblocking_filter_disabled_flag); + OUT_BCS_BATCH(batch, + slice_param->slice_data_byte_offset); /* DW 5 */ + OUT_BCS_BATCH(batch, + 0 << 26 | + 0 << 20 | + 0); + OUT_BCS_BATCH(batch, 0); /* Ignored for decoding */ + OUT_BCS_BATCH(batch, 0); /* Ignored for decoding */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_hcpd_bsd_object(VADriverContextP ctx, + VASliceParameterBufferHEVC *slice_param, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + + BEGIN_BCS_BATCH(batch, 3); + + OUT_BCS_BATCH(batch, HCP_BSD_OBJECT | (3 - 2)); + + OUT_BCS_BATCH(batch, slice_param->slice_data_size); + OUT_BCS_BATCH(batch, slice_param->slice_data_offset); + + ADVANCE_BCS_BATCH(batch); +} + +static VAStatus +gen9_hcpd_hevc_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + VAStatus vaStatus; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + VAPictureParameterBufferHEVC *pic_param; + VASliceParameterBufferHEVC *slice_param, *next_slice_param, *next_slice_group_param; + dri_bo *slice_data_bo; + int i, j; + + vaStatus = gen9_hcpd_hevc_decode_init(ctx, decode_state, gen9_hcpd_context); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer; + + if (i965->intel.has_bsd2) + intel_batchbuffer_start_atomic_bcs_override(batch, 0x1000, BSD_RING0); + else + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + + gen9_hcpd_pipe_mode_select(ctx, decode_state, HCP_CODEC_HEVC, gen9_hcpd_context); + gen9_hcpd_surface_state(ctx, decode_state, gen9_hcpd_context); + gen9_hcpd_pipe_buf_addr_state(ctx, decode_state, gen9_hcpd_context); + gen9_hcpd_hevc_qm_state(ctx, decode_state, gen9_hcpd_context); + gen9_hcpd_pic_state(ctx, decode_state, gen9_hcpd_context); + + if (pic_param->pic_fields.bits.tiles_enabled_flag) + gen9_hcpd_tile_state(ctx, decode_state, gen9_hcpd_context); + + /* Need to double it works or not if the two slice groups have differenct slice data buffers */ + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferHEVC *)decode_state->slice_params[j]->buffer; + slice_data_bo = decode_state->slice_datas[j]->bo; + + gen9_hcpd_ind_obj_base_addr_state(ctx, slice_data_bo, gen9_hcpd_context); + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferHEVC *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen9_hcpd_slice_state(ctx, pic_param, slice_param, next_slice_param, gen9_hcpd_context); + gen9_hcpd_ref_idx_state(ctx, pic_param, slice_param, gen9_hcpd_context); + gen9_hcpd_weightoffset_state(ctx, pic_param, slice_param, gen9_hcpd_context); + gen9_hcpd_bsd_object(ctx, slice_param, gen9_hcpd_context); + slice_param++; + } + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + +out: + return vaStatus; +} + +/*********************************************************/ +/* VP9 Code */ +/*********************************************************/ + + +#define VP9_PROB_BUFFER_FIRST_PART_SIZE 2010 +#define VP9_PROB_BUFFER_SECOND_PART_SIZE 10 +#define VP9_PROB_BUFFER_KEY_INTER_OFFSET 1667 +#define VP9_PROB_BUFFER_KEY_INTER_SIZE 343 + +#define VP9_PROB_BUFFER_UPDATE_NO 0 +#define VP9_PROB_BUFFER_UPDATE_SECNE_1 1 +#define VP9_PROB_BUFFER_UPDATE_SECNE_2 2 +#define VP9_PROB_BUFFER_UPDATE_SECNE_3 3 +#define VP9_PROB_BUFFER_UPDATE_SECNE_4 4 +#define VP9_PROB_BUFFER_UPDATE_SECNE_5 5 + +#define VP9_PROB_BUFFER_SAVED_NO 0 +#define VP9_PROB_BUFFER_SAVED_SECNE_1 1 +#define VP9_PROB_BUFFER_SAVED_SECNE_2 2 + +#define VP9_PROB_BUFFER_RESTORED_NO 0 +#define VP9_PROB_BUFFER_RESTORED_SECNE_1 1 +#define VP9_PROB_BUFFER_RESTORED_SECNE_2 2 +#define VP9_PROB_BUFFER_RESTORED_SECNE_MAX (VP9_PROB_BUFFER_RESTORED_SECNE_2 + 1) + +#define ALLOC_MV_BUFFER(gen_buffer, string, size,width,height) \ + do { \ + dri_bo_unreference(gen_buffer->bo); \ + gen_buffer->bo = dri_bo_alloc(i965->intel.bufmgr, \ + string, \ + size, \ + 0x1000); \ + assert(gen_buffer->bo); \ + gen_buffer->frame_width = width ; \ + gen_buffer->frame_height = height; \ + } while (0) + +static void +vp9_update_segmentId_buffer(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VADecPictureParameterBufferVP9 *pic_param; + + int size = 0; + int is_scaling = 0; + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + + size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 1 ; + size <<= 6; + if (gen9_hcpd_context->vp9_segment_id_buffer.bo == NULL || pic_param->frame_width > gen9_hcpd_context->last_frame.frame_width || pic_param->frame_height > gen9_hcpd_context->last_frame.frame_height) + { + ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer), "vp9 segment id buffer", size); + } + + is_scaling = (pic_param->frame_width != gen9_hcpd_context->last_frame.frame_width) || (pic_param->frame_height != gen9_hcpd_context->last_frame.frame_height); + + if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) || + pic_param->pic_fields.bits.error_resilient_mode || + pic_param->pic_fields.bits.intra_only || is_scaling) { + + //VP9 Segment ID buffer needs to be zero + dri_bo_map(gen9_hcpd_context->vp9_segment_id_buffer.bo,1); + memset((unsigned char *)gen9_hcpd_context->vp9_segment_id_buffer.bo->virtual,0, size); + dri_bo_unmap(gen9_hcpd_context->vp9_segment_id_buffer.bo); + } +} + +static void +vp9_update_mv_temporal_buffer(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VADecPictureParameterBufferVP9 *pic_param; + int size = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + + size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 9 ; + size <<= 6; //CL aligned + if (gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo == NULL || pic_param->frame_width > gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width || pic_param->frame_height > gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height) + { + ALLOC_MV_BUFFER((&gen9_hcpd_context->vp9_mv_temporal_buffer_curr), "vp9 curr mv temporal buffer", size,pic_param->frame_width,pic_param->frame_height); + } + if (gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo == NULL) + { + ALLOC_MV_BUFFER((&gen9_hcpd_context->vp9_mv_temporal_buffer_last), "vp9 last mv temporal buffer", size,pic_param->frame_width,pic_param->frame_height); + } + +} + +static void +vp9_gen_default_probabilities(VADriverContextP ctx, struct gen9_hcpd_context *gen9_hcpd_context) +{ + int i = 0; + uint32_t size = 0; + + size = sizeof(FRAME_CONTEXT); + memset(&gen9_hcpd_context->vp9_fc_key_default,0,size); + memset(&gen9_hcpd_context->vp9_fc_inter_default,0,size); + memset(&gen9_hcpd_context->vp9_frame_ctx,0,size*FRAME_CONTEXTS); + //more code to come here below + + //1. key default + gen9_hcpd_context->vp9_fc_key_default.tx_probs = default_tx_probs; + //dummy 52 + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs4x4, default_coef_probs_4x4); + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs8x8, default_coef_probs_8x8); + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs16x16, default_coef_probs_16x16); + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.coeff_probs32x32, default_coef_probs_32x32); + //dummy 16 + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.skip_probs, default_skip_probs); + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.partition_prob, vp9_kf_partition_probs); + //dummy 47 + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.uv_mode_prob, vp9_kf_uv_mode_prob); + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.seg_tree_probs, default_seg_tree_probs); + vp9_copy(gen9_hcpd_context->vp9_fc_key_default.seg_pred_probs, default_seg_pred_probs); + + //2. inter default + gen9_hcpd_context->vp9_fc_inter_default.tx_probs = default_tx_probs; + //dummy 52 + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs4x4, default_coef_probs_4x4); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs8x8, default_coef_probs_8x8); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs16x16, default_coef_probs_16x16); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.coeff_probs32x32, default_coef_probs_32x32); + //dummy 16 + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.skip_probs, default_skip_probs); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.inter_mode_probs, default_inter_mode_probs); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.switchable_interp_prob, default_switchable_interp_prob); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.intra_inter_prob, default_intra_inter_p); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.comp_inter_prob, default_comp_inter_p); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.single_ref_prob, default_single_ref_p); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.comp_ref_prob, default_comp_ref_p); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.y_mode_prob, default_if_y_probs); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.partition_prob, default_partition_probs); + gen9_hcpd_context->vp9_fc_inter_default.nmvc = default_nmv_context; + //dummy 47 + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.uv_mode_prob, default_if_uv_probs); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.seg_tree_probs, default_seg_tree_probs); + vp9_copy(gen9_hcpd_context->vp9_fc_inter_default.seg_pred_probs, default_seg_pred_probs); + + for(i = 0; i < FRAME_CONTEXTS; i++) + { + gen9_hcpd_context->vp9_frame_ctx[i] = gen9_hcpd_context->vp9_fc_inter_default; + } +} + +static void +vp9_update_probabilities(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + VADecPictureParameterBufferVP9 *pic_param; + int i = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + + //first part buffer update: Case 1)Reset all 4 probablity buffers + if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only||pic_param->pic_fields.bits.error_resilient_mode) + { + if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) || + (pic_param->pic_fields.bits.reset_frame_context == 3)|| + pic_param->pic_fields.bits.error_resilient_mode) + { + //perform full buffer update + for(i = 0; i < FRAME_CONTEXTS; i++) + { + memcpy(&gen9_hcpd_context->vp9_frame_ctx[i],&gen9_hcpd_context->vp9_fc_inter_default,VP9_PROB_BUFFER_FIRST_PART_SIZE); + + vp9_copy(gen9_hcpd_context->vp9_frame_ctx[i].seg_tree_probs, default_seg_tree_probs); + vp9_copy(gen9_hcpd_context->vp9_frame_ctx[i].seg_pred_probs, default_seg_pred_probs); + } + }else if(pic_param->pic_fields.bits.reset_frame_context == 2&&pic_param->pic_fields.bits.intra_only) + { + memcpy(&gen9_hcpd_context->vp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx],&gen9_hcpd_context->vp9_fc_inter_default,VP9_PROB_BUFFER_FIRST_PART_SIZE); + } + pic_param->pic_fields.bits.frame_context_idx = 0; + } + + //Case 3) Update only segment probabilities + if((pic_param->pic_fields.bits.segmentation_enabled && + pic_param->pic_fields.bits.segmentation_update_map)) + { + //Update seg_tree_probs and seg_pred_probs accordingly + for (i=0; ivp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx].seg_tree_probs[i] = pic_param->mb_segment_tree_probs[i]; + } + for (i=0; ivp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx].seg_pred_probs[i] = pic_param->segment_pred_probs[i]; + } + } + + //update vp9_fc according to frame_context_id + { + void *pfc = (void *)&gen9_hcpd_context->vp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx]; + void *pprob = NULL; + + dri_bo_map(gen9_hcpd_context->vp9_probability_buffer.bo,1); + + pprob = (void *)gen9_hcpd_context->vp9_probability_buffer.bo->virtual; + memcpy(pprob,pfc,2048); + //only update 343bytes for key or intra_only frame + if(pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME || + pic_param->pic_fields.bits.intra_only) + { + memcpy(pprob + VP9_PROB_BUFFER_FIRST_PART_SIZE - VP9_PROB_BUFFER_KEY_INTER_SIZE + , gen9_hcpd_context->vp9_fc_key_default.inter_mode_probs + , VP9_PROB_BUFFER_KEY_INTER_SIZE); + } + + dri_bo_unmap(gen9_hcpd_context->vp9_probability_buffer.bo); + } +} + +static void +gen9_hcpd_init_vp9_surface(VADriverContextP ctx, + VADecPictureParameterBufferVP9 *pic_param, + struct object_surface *obj_surface, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + GenVP9Surface *gen9_vp9_surface; + + if (!obj_surface) + return; + + obj_surface->free_private_data = gen_free_vp9_surface; + gen9_vp9_surface = obj_surface->private_data; + + if (!gen9_vp9_surface) { + gen9_vp9_surface = calloc(sizeof(GenVP9Surface), 1); + assert(gen9_vp9_surface); + gen9_vp9_surface->base.frame_store_id = -1; + obj_surface->private_data = gen9_vp9_surface; + } + + gen9_vp9_surface->frame_width = pic_param->frame_width; + gen9_vp9_surface->frame_height = pic_param->frame_height; + +} + +static VAStatus +gen9_hcpd_vp9_decode_init(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VADecPictureParameterBufferVP9 *pic_param; + struct object_surface *obj_surface; + uint32_t size; + int width_in_mbs=0, height_in_mbs=0; + int bit_depth_minus8 = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + + width_in_mbs = (pic_param->frame_width + 15) / 16; + height_in_mbs = (pic_param->frame_height + 15) / 16; + + //For BXT, we support only till 4K + assert(width_in_mbs > 0 && width_in_mbs <= 256); /* 4K */ + assert(height_in_mbs > 0 && height_in_mbs <= 256); + + if(!(i965->codec_info->vp9_dec_profiles & (1U<profile))) + return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + + if(pic_param->profile >= 2) + { + if(pic_param->bit_depth >= 8) + bit_depth_minus8 = pic_param->bit_depth - 8; + + if(bit_depth_minus8 == 2) + { + if(!(i965->codec_info->vp9_dec_chroma_formats & VA_RT_FORMAT_YUV420_10BPP)) + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + else if((bit_depth_minus8 > 2) || (bit_depth_minus8 == 1) || (bit_depth_minus8 < 0)) + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + + //Update the frame store buffers with the reference frames information + intel_update_vp9_frame_store_index(ctx, + decode_state, + pic_param, + gen9_hcpd_context->reference_surfaces); + + /* Current decoded picture */ + obj_surface = decode_state->render_object; + //Ensure there is a tiled render surface in NV12 format. If not, create one. + vp9_ensure_surface_bo(ctx, decode_state, obj_surface, pic_param); + + + //Super block in VP9 is 64x64 + gen9_hcpd_context->ctb_size = 64; + gen9_hcpd_context->min_cb_size = 8; //Min block size is 4 or 8? + + //If picture width/height is not multiple of 64, needs to upsize it to the next 64 pixels + //before calculation below. + gen9_hcpd_context->picture_width_in_ctbs = ALIGN(pic_param->frame_width, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size; + gen9_hcpd_context->picture_height_in_ctbs = ALIGN(pic_param->frame_height, gen9_hcpd_context->ctb_size) / gen9_hcpd_context->ctb_size; + + gen9_hcpd_context->picture_width_in_min_cb_minus1 = ALIGN(pic_param->frame_width, gen9_hcpd_context->min_cb_size) / gen9_hcpd_context->min_cb_size - 1; + gen9_hcpd_context->picture_height_in_min_cb_minus1 = ALIGN(pic_param->frame_height, gen9_hcpd_context->min_cb_size) / gen9_hcpd_context->min_cb_size - 1; + + gen9_hcpd_context->picture_width_in_pixels = (gen9_hcpd_context->picture_width_in_min_cb_minus1 + 1) * gen9_hcpd_context->min_cb_size ; + gen9_hcpd_context->picture_height_in_pixels = (gen9_hcpd_context->picture_height_in_min_cb_minus1 + 1) * gen9_hcpd_context->min_cb_size ; + + gen9_hcpd_init_vp9_surface(ctx, pic_param, obj_surface, gen9_hcpd_context); + + if(pic_param->profile >= 2) + size = gen9_hcpd_context->picture_width_in_ctbs*36; //num_width_in_SB * 36 + else + size = gen9_hcpd_context->picture_width_in_ctbs*18; //num_width_in_SB * 18 + size<<=6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_line_buffer), "line buffer", size); + ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_line_buffer), "tile line buffer", size); + + if(pic_param->profile >= 2) + size = gen9_hcpd_context->picture_height_in_ctbs*34; //num_height_in_SB * 17 + else + size = gen9_hcpd_context->picture_height_in_ctbs*17; //num_height_in_SB * 17 + size<<=6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_column_buffer), "tile column buffer", size); + + size = gen9_hcpd_context->picture_width_in_ctbs*5; //num_width_in_SB * 5 + size<<=6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_line_buffer), "metadata line buffer", size); + ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_line_buffer), "metadata tile line buffer", size); + + size = gen9_hcpd_context->picture_height_in_ctbs*5; //num_height_in_SB * 5 + size<<=6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_column_buffer), "metadata tile column buffer", size); + + size =gen9_hcpd_context->picture_width_in_ctbs*1; //num_width_in_SB * 1 + size<<=6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->hvd_line_rowstore_buffer), "hvd line rowstore buffer", size); + ALLOC_GEN_BUFFER((&gen9_hcpd_context->hvd_tile_rowstore_buffer), "hvd tile rowstore buffer", size); + + size = 32; + size<<=6; + ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer), "vp9 probability buffer", size); + + gen9_hcpd_context->first_inter_slice_collocated_ref_idx = 0; + gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = 0; + gen9_hcpd_context->first_inter_slice_valid = 0; + + return VA_STATUS_SUCCESS; +} + +static void +gen9_hcpd_vp9_surface_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + struct object_surface *obj_surface = decode_state->render_object; + struct object_surface *tmp_obj_surface = NULL; + unsigned int y_cb_offset; + int i = 0; + + assert(obj_surface); + + y_cb_offset = obj_surface->y_cb_offset; + + BEGIN_BCS_BATCH(batch, 3); + + OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (0 << 28) | /* surface id */ + (obj_surface->width - 1)); /* pitch - 1 */ + OUT_BCS_BATCH(batch, + (((obj_surface->fourcc == VA_FOURCC_P010) ? SURFACE_FORMAT_P010: SURFACE_FORMAT_PLANAR_420_8) << 28) | + y_cb_offset); + ADVANCE_BCS_BATCH(batch); + + tmp_obj_surface = obj_surface; + + for(i = 0; i < 3; i++) + { + obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface; + if (obj_surface && obj_surface->private_data) + { + BEGIN_BCS_BATCH(batch, 3); + + OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + ((i + 2) << 28) | /* surface id */ + (obj_surface->width - 1)); /* pitch - 1 */ + OUT_BCS_BATCH(batch, + (((obj_surface->fourcc == VA_FOURCC_P010) ? SURFACE_FORMAT_P010: SURFACE_FORMAT_PLANAR_420_8) << 28) | + obj_surface->y_cb_offset); + ADVANCE_BCS_BATCH(batch); + }else + { + BEGIN_BCS_BATCH(batch, 3); + + OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + ((i + 2) << 28) | /* surface id */ + (tmp_obj_surface->width - 1)); /* pitch - 1 */ + OUT_BCS_BATCH(batch, + (((tmp_obj_surface->fourcc == VA_FOURCC_P010) ? SURFACE_FORMAT_P010: SURFACE_FORMAT_PLANAR_420_8) << 28) | + tmp_obj_surface->y_cb_offset); + ADVANCE_BCS_BATCH(batch); + } + } +} + +static void +gen9_hcpd_vp9_pipe_buf_addr_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + struct object_surface *obj_surface; + int i=0; + + BEGIN_BCS_BATCH(batch, 95); + + OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (95 - 2)); + + obj_surface = decode_state->render_object; + assert(obj_surface && obj_surface->bo); + + OUT_BUFFER_MA_TARGET(obj_surface->bo); /* DW 1..3 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_line_buffer.bo);/* DW 4..6 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_line_buffer.bo); /* DW 7..9 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_tile_column_buffer.bo); /* DW 10..12 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_line_buffer.bo); /* DW 13..15 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_line_buffer.bo); /* DW 16..18 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->metadata_tile_column_buffer.bo); /* DW 19..21 */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 22..24, ignore for VP9 */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 25..27, ignore for VP9 */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 28..30, ignore for VP9 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo); /* DW 31..33 */ + + OUT_BUFFER_MA_TARGET(NULL); /* DW 34..36, reserved */ + + /* DW 37..52 - Reference picture address */ + for (i = 0; i < 3; i++) + { + obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface; + + if (obj_surface) + { + OUT_BUFFER_NMA_REFERENCE(obj_surface->bo); + } + else + OUT_BUFFER_NMA_REFERENCE(NULL); + } + for (; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) + { + OUT_BUFFER_NMA_REFERENCE(NULL); + } + OUT_BCS_BATCH(batch, 0); /* DW 53, memory address attributes */ + + OUT_BUFFER_MA_REFERENCE(NULL); /* DW 54..56, ignore for decoding mode */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 57..59, StreamOutEnable - used for transcoding */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 60..62, DecodedPictureStatusError, ignored */ + OUT_BUFFER_MA_TARGET(NULL); /* DW 63..65, Ignored */ + + /* DW 66..81 - for 8 Collocated motion vectors */ + for (i = 0; i < 1; i++) + { + OUT_BUFFER_NMA_REFERENCE(gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo); + } + for (; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) + { + OUT_BUFFER_NMA_REFERENCE(NULL); + } + + OUT_BCS_BATCH(batch, 0); /* DW 82, memory address attributes */ + + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->vp9_probability_buffer.bo); /* DW 83..85, VP9 Probability bufffer */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->vp9_segment_id_buffer.bo); /* DW 86..88, VP9 Segment ID buffer */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->hvd_line_rowstore_buffer.bo);/* DW 89..91, VP9 HVD Line Rowstore buffer */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->hvd_tile_rowstore_buffer.bo);/* DW 92..94, VP9 HVD Tile Rowstore buffer */ + + ADVANCE_BCS_BATCH(batch); +} + +static inline int +gen9_hcpd_vp9_valid_ref_frame_size(int ref_width, int ref_height, + int cur_width, int cur_height) { + return 2 * cur_width >= ref_width && + 2 * cur_height >= ref_height && + cur_width <= 16 * ref_width && + cur_height <= 16 * ref_height; +} +static void +gen9_hcpd_vp9_pic_state(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + VADecPictureParameterBufferVP9 *pic_param; + struct object_surface *obj_surface; + GenVP9Surface *gen9_vp9_surface; + uint16_t scale_h = 0; + uint16_t scale_w = 0; + uint16_t frame_width_in_pixel = 0; + uint16_t frame_height_in_pixel = 0; + uint16_t fwidth = 64; + uint16_t fheight = 64; + int i; + int bit_depth_minus8 = 0; + +#define LEN_COMMAND_OWN 12 + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + + uint8_t segmentIDStreamInEnable = 0; + uint8_t segmentIDStreamOutEnable = (pic_param->pic_fields.bits.segmentation_enabled && pic_param->pic_fields.bits.segmentation_update_map); + + // For KEY_FRAME or INTRA_ONLY frame, this bit should be set to "0". + uint8_t segmentation_temporal_update = + ((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) || (pic_param->pic_fields.bits.intra_only)) ? 0 : pic_param->pic_fields.bits.segmentation_temporal_update; + + + if(pic_param->pic_fields.bits.intra_only || (pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME)) + { + segmentIDStreamInEnable = 1; + }else if(pic_param->pic_fields.bits.segmentation_enabled) + { + if(!pic_param->pic_fields.bits.segmentation_update_map) + { + segmentIDStreamInEnable = 1; + + }else if( pic_param->pic_fields.bits.segmentation_temporal_update) + { + segmentIDStreamInEnable = 1; + } + } + + if(pic_param->pic_fields.bits.error_resilient_mode) + { + segmentIDStreamInEnable = 1; + } + + //frame type of previous frame (Key or Non-Key Frame). + uint8_t last_frame_type = gen9_hcpd_context->last_frame.frame_type; + + uint8_t use_pre_frame_mvs = 0; + use_pre_frame_mvs = !((pic_param->pic_fields.bits.error_resilient_mode) || + (pic_param->frame_width != gen9_hcpd_context->last_frame.frame_width) || + (pic_param->frame_height != gen9_hcpd_context->last_frame.frame_height) || + (pic_param->pic_fields.bits.intra_only) || + (pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME)|| + (gen9_hcpd_context->last_frame.intra_only)|| + (last_frame_type == HCP_VP9_KEY_FRAME) || + (!gen9_hcpd_context->last_frame.show_frame)); + + uint8_t adapt_probabilities_flag = 0; + if((pic_param->pic_fields.bits.error_resilient_mode || pic_param->pic_fields.bits.frame_parallel_decoding_mode)) + adapt_probabilities_flag = 0; //0: Do not adapt (error resilient or frame_parallel_mode are set) + else if(!(pic_param->pic_fields.bits.error_resilient_mode) && !(pic_param->pic_fields.bits.frame_parallel_decoding_mode)) + adapt_probabilities_flag = 1; //1: Adapt (not error resilient and not frame_ parallel_mode) + + frame_width_in_pixel = (gen9_hcpd_context->picture_width_in_min_cb_minus1 + 1) * gen9_hcpd_context->min_cb_size ; + frame_height_in_pixel = (gen9_hcpd_context->picture_height_in_min_cb_minus1 + 1) * gen9_hcpd_context->min_cb_size ; + + fwidth = (fwidth > frame_width_in_pixel)?frame_width_in_pixel:fwidth; + fheight = (fheight > frame_height_in_pixel)?frame_height_in_pixel:fheight; + + if(pic_param->profile >= 2) + { + if(pic_param->bit_depth >= 8) + bit_depth_minus8 = pic_param->bit_depth - 8; + } + + BEGIN_BCS_BATCH(batch, LEN_COMMAND_OWN); + + OUT_BCS_BATCH(batch, HCP_VP9_PIC_STATE | (LEN_COMMAND_OWN - 2)); + + OUT_BCS_BATCH(batch, + (frame_height_in_pixel - 1) << 16 | + (frame_width_in_pixel - 1)); /* DW 1 */ + OUT_BCS_BATCH(batch, + segmentIDStreamInEnable << 31 | + segmentIDStreamOutEnable << 30 | + pic_param->pic_fields.bits.lossless_flag << 29 | + segmentation_temporal_update << 28 | + pic_param->pic_fields.bits.segmentation_update_map << 27 | + pic_param->pic_fields.bits.segmentation_enabled << 26 | + pic_param->sharpness_level << 23 | + pic_param->filter_level << 17 | + pic_param->pic_fields.bits.frame_parallel_decoding_mode << 16 | + pic_param->pic_fields.bits.error_resilient_mode << 15 | + pic_param->pic_fields.bits.refresh_frame_context << 14 | + last_frame_type << 13 | + 0 << 12 | /* tx select mode */ + 0 << 11 | /* Hybrid Prediction Mode */ + use_pre_frame_mvs << 10 | + pic_param->pic_fields.bits.alt_ref_frame_sign_bias << 9 | + pic_param->pic_fields.bits.golden_ref_frame_sign_bias << 8 | + pic_param->pic_fields.bits.last_ref_frame_sign_bias << 7 | + pic_param->pic_fields.bits.mcomp_filter_type << 4 | + pic_param->pic_fields.bits.allow_high_precision_mv << 3 | + pic_param->pic_fields.bits.intra_only <<2 | + adapt_probabilities_flag << 1 | + pic_param->pic_fields.bits.frame_type <<0); /* DW 2 */ + OUT_BCS_BATCH(batch, + pic_param->profile << 28 | + bit_depth_minus8 << 24 | + 0 << 22 | /* only support 4:2:0 */ + pic_param->log2_tile_rows << 8 | + pic_param->log2_tile_columns <<0); /* DW 3 */ + // resolution change case + + // DW4-DW6 + for(i = 0; i < 3; i++) + { + obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface; + gen9_vp9_surface = NULL; + scale_w = 0; + scale_h = 0; + if (obj_surface && obj_surface->private_data) + { + gen9_vp9_surface = obj_surface->private_data; + if(!gen9_hcpd_vp9_valid_ref_frame_size(gen9_vp9_surface->frame_width,gen9_vp9_surface->frame_height,pic_param->frame_width,pic_param->frame_height)) + { + scale_w = -1; + scale_h = -1; + }else + { + scale_w = (gen9_vp9_surface->frame_width << 14) /pic_param->frame_width ; + scale_h = (gen9_vp9_surface->frame_height << 14) /pic_param->frame_height ; + } + OUT_BCS_BATCH(batch, + scale_w<<16 | + scale_h); + }else + { + OUT_BCS_BATCH(batch, 0); + } + } + + // DW7-DW9 + for(i = 0; i < 3; i++) + { + obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface; + gen9_vp9_surface = NULL; + + if (obj_surface && obj_surface->private_data) + { + gen9_vp9_surface = obj_surface->private_data; + OUT_BCS_BATCH(batch, + ((gen9_vp9_surface->frame_height- 1)&0x3fff)<<16 | + ((gen9_vp9_surface->frame_width - 1)&0x3fff)); + }else + { + OUT_BCS_BATCH(batch, 0); + } + } + + OUT_BCS_BATCH(batch, + pic_param->first_partition_size << 16 | + pic_param->frame_header_length_in_bytes <<0); /* DW 10 */ + OUT_BCS_BATCH(batch, + (0 << 3) | + (0 << 2) | + (1 << 1) | + (0 << 0)); /* DW 11, ignored */ + //Rest of the DWs are not valid for BXT + for(i = 12; i < LEN_COMMAND_OWN; i++) + { + OUT_BCS_BATCH(batch, 0); + } + + ADVANCE_BCS_BATCH(batch); + +} + +static void +gen9_hcpd_vp9_segment_state(VADriverContextP ctx, + VADecPictureParameterBufferVP9 *pic_param, + VASegmentParameterVP9 *seg_param, uint8_t seg_id, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + + int segment_ref = seg_param->segment_flags.fields.segment_reference; + + if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) + || (pic_param->pic_fields.bits.intra_only)) + segment_ref = 0; + + BEGIN_BCS_BATCH(batch, 7); + + OUT_BCS_BATCH(batch, HCP_VP9_SEGMENT_STATE | (7 - 2)); + OUT_BCS_BATCH(batch, seg_id << 0); /* DW 1 - SegmentID */ + OUT_BCS_BATCH(batch, + seg_param->segment_flags.fields.segment_reference_enabled << 3 | + segment_ref << 1 | + seg_param->segment_flags.fields.segment_reference_skipped <<0 ); /* DW 2 */ + if(pic_param->filter_level) + { + OUT_BCS_BATCH(batch, + seg_param->filter_level[1][1] << 24 | //FilterLevelRef1Mode1 + seg_param->filter_level[1][0] << 16 | //FilterLevelRef1Mode0 + seg_param->filter_level[0][1] << 8 | //FilterLevelRef0Mode1 + seg_param->filter_level[0][0] << 0 ); //FilterLevelRef0Mode0 /* DW 3 */ + OUT_BCS_BATCH(batch, + seg_param->filter_level[3][1] << 24 | //FilterLevelRef3Mode1 + seg_param->filter_level[3][0] << 16 | //FilterLevelRef3Mode0 + seg_param->filter_level[2][1] << 8 | //FilterLevelRef2Mode1 + seg_param->filter_level[2][0] << 0 ); //FilterLevelRef2Mode0 /* DW 4 */ + }else + { + OUT_BCS_BATCH(batch, + 0 ); /* DW 3 */ + OUT_BCS_BATCH(batch, + 0 ); /* DW 4 */ + } + OUT_BCS_BATCH(batch, + seg_param->luma_ac_quant_scale << 16 | + seg_param->luma_dc_quant_scale << 0 ); /* DW 5 */ + OUT_BCS_BATCH(batch, + seg_param->chroma_ac_quant_scale << 16 | + seg_param->chroma_dc_quant_scale << 0 ); /* DW 6 */ + + ADVANCE_BCS_BATCH(batch); + +} + +static void +gen9_hcpd_vp9_bsd_object(VADriverContextP ctx, + VADecPictureParameterBufferVP9 *pic_param, + VASliceParameterBufferVP9 *slice_param, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + int slice_data_size = slice_param->slice_data_size - pic_param->frame_header_length_in_bytes; + int slice_data_offset = slice_param->slice_data_offset + pic_param->frame_header_length_in_bytes; + + BEGIN_BCS_BATCH(batch, 3); + + OUT_BCS_BATCH(batch, HCP_BSD_OBJECT | (3 - 2)); + + OUT_BCS_BATCH(batch, slice_data_size ); + OUT_BCS_BATCH(batch, slice_data_offset); + + ADVANCE_BCS_BATCH(batch); + +} + +static VAStatus +gen9_hcpd_vp9_decode_picture(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; + VADecPictureParameterBufferVP9 *pic_param; + VASliceParameterBufferVP9 *slice_param; + dri_bo *slice_data_bo; + dri_bo *tmp_bo; + uint16_t tmp; + int i = 0, num_segments=0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + assert(decode_state->slice_params && decode_state->slice_params[0]->buffer); + slice_param = (VASliceParameterBufferVP9 *)decode_state->slice_params[0]->buffer; + pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + + if(slice_param->slice_data_size == 1) + { + goto out; + } + + vaStatus = gen9_hcpd_vp9_decode_init(ctx, decode_state, gen9_hcpd_context); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + + //Update segment id buffer if needed + vp9_update_segmentId_buffer(ctx, decode_state, gen9_hcpd_context); + //Update mv buffer if needed + vp9_update_mv_temporal_buffer(ctx, decode_state, gen9_hcpd_context); + //Update probability buffer if needed + vp9_update_probabilities(ctx, decode_state, gen9_hcpd_context); + + if (i965->intel.has_bsd2) + intel_batchbuffer_start_atomic_bcs_override(batch, 0x1000, BSD_RING0); + else + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + + gen9_hcpd_pipe_mode_select(ctx, decode_state, HCP_CODEC_VP9, gen9_hcpd_context); + //Not sure what the surface id value should be: Gold? ALtRef? PrevRef? or Just RefPic? + gen9_hcpd_vp9_surface_state(ctx, decode_state, gen9_hcpd_context); + + //Only one VASliceParameterBufferVP9 should be sent per frame + slice_data_bo = decode_state->slice_datas[0]->bo; + + gen9_hcpd_ind_obj_base_addr_state(ctx, slice_data_bo, gen9_hcpd_context); + + gen9_hcpd_vp9_pipe_buf_addr_state(ctx, decode_state, gen9_hcpd_context); + //If segmentation is disabled, only SegParam[0] is valid, + //all others should be populated with 0 + if(!pic_param->pic_fields.bits.segmentation_enabled) + num_segments = 1; + else //If segmentation is enabled, all 8 entries should be valid. + num_segments = 8; + + for(i=0; iseg_param[i]; + gen9_hcpd_vp9_segment_state(ctx, pic_param, &seg_param, i, gen9_hcpd_context); + } + + gen9_hcpd_vp9_pic_state(ctx, decode_state, gen9_hcpd_context); + + gen9_hcpd_vp9_bsd_object(ctx, pic_param, slice_param, gen9_hcpd_context); + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + + // keep track of the last frame status + gen9_hcpd_context->last_frame.frame_width = pic_param->frame_width; + gen9_hcpd_context->last_frame.frame_height = pic_param->frame_height; + gen9_hcpd_context->last_frame.show_frame = pic_param->pic_fields.bits.show_frame; + gen9_hcpd_context->last_frame.frame_type = pic_param->pic_fields.bits.frame_type; + gen9_hcpd_context->last_frame.refresh_frame_context = pic_param->pic_fields.bits.refresh_frame_context; + gen9_hcpd_context->last_frame.frame_context_idx = pic_param->pic_fields.bits.frame_context_idx; + gen9_hcpd_context->last_frame.intra_only = pic_param->pic_fields.bits.intra_only; + + // switch mv buffer + if(pic_param->pic_fields.bits.frame_type != HCP_VP9_KEY_FRAME) + { + tmp_bo = gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo; + gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo; + gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo = tmp_bo; + + tmp = gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_width; + gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_width = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width; + gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width = tmp; + + tmp = gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_height; + gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_height = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height; + gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height = tmp; + + + } + //update vp9_frame_ctx according to frame_context_id + if (pic_param->pic_fields.bits.refresh_frame_context) + { + void *pfc = (void *)&gen9_hcpd_context->vp9_frame_ctx[pic_param->pic_fields.bits.frame_context_idx]; + void *pprob = NULL; + + //update vp9_fc to frame_context + dri_bo_map(gen9_hcpd_context->vp9_probability_buffer.bo,1); + pprob = (void *)gen9_hcpd_context->vp9_probability_buffer.bo->virtual; + if(pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME|| + pic_param->pic_fields.bits.intra_only) + memcpy(pfc, pprob, VP9_PROB_BUFFER_FIRST_PART_SIZE - VP9_PROB_BUFFER_KEY_INTER_SIZE); + else + memcpy(pfc, pprob, VP9_PROB_BUFFER_FIRST_PART_SIZE); + + dri_bo_unmap(gen9_hcpd_context->vp9_probability_buffer.bo); + } + +out: + return vaStatus; +} + + +static VAStatus +gen9_hcpd_decode_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) +{ + struct gen9_hcpd_context *gen9_hcpd_context = (struct gen9_hcpd_context *)hw_context; + struct decode_state *decode_state = &codec_state->decode; + VAStatus vaStatus; + + assert(gen9_hcpd_context); + + vaStatus = intel_decoder_sanity_check_input(ctx, profile, decode_state); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + + switch (profile) { + case VAProfileHEVCMain: + case VAProfileHEVCMain10: + vaStatus = gen9_hcpd_hevc_decode_picture(ctx, decode_state, gen9_hcpd_context); + break; + case VAProfileVP9Profile0: + case VAProfileVP9Profile2: + vaStatus = gen9_hcpd_vp9_decode_picture(ctx, decode_state, gen9_hcpd_context); + break; + + default: + /* should never get here 1!! */ + assert(0); + break; + } + +out: + return vaStatus; +} + +static void +gen9_hcpd_context_destroy(void *hw_context) +{ + struct gen9_hcpd_context *gen9_hcpd_context = (struct gen9_hcpd_context *)hw_context; + + FREE_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_line_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_line_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_column_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->metadata_line_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_line_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->metadata_tile_column_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->sao_line_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->sao_tile_line_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->sao_tile_column_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->hvd_line_rowstore_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->hvd_tile_rowstore_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer)); + FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer)); + dri_bo_unreference(gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo); + dri_bo_unreference(gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo); + + intel_batchbuffer_free(gen9_hcpd_context->base.batch); + free(gen9_hcpd_context); +} + +static void +gen9_hcpd_hevc_context_init(VADriverContextP ctx, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + hevc_gen_default_iq_matrix(&gen9_hcpd_context->iq_matrix_hevc); +} + +static void +gen9_hcpd_vp9_context_init(VADriverContextP ctx, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + + gen9_hcpd_context->last_frame.frame_height = 0; + gen9_hcpd_context->last_frame.show_frame = 0; + gen9_hcpd_context->last_frame.frame_type = 0; + gen9_hcpd_context->last_frame.refresh_frame_context = 0; + gen9_hcpd_context->last_frame.frame_context_idx = 0; + gen9_hcpd_context->last_frame.intra_only = 0; + gen9_hcpd_context->last_frame.prob_buffer_saved_flag = 0; + gen9_hcpd_context->last_frame.prob_buffer_restored_flag = 0; + + //Super block in VP9 is 64x64 + gen9_hcpd_context->ctb_size = 64; + gen9_hcpd_context->min_cb_size = 8; //Min block size is 8 + + vp9_gen_default_probabilities(ctx, gen9_hcpd_context); +} + +static struct hw_context * +gen9_hcpd_context_init(VADriverContextP ctx, struct object_config *object_config) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct gen9_hcpd_context *gen9_hcpd_context = calloc(1, sizeof(struct gen9_hcpd_context)); + int i; + + if (!gen9_hcpd_context) + return NULL; + + gen9_hcpd_context->base.destroy = gen9_hcpd_context_destroy; + gen9_hcpd_context->base.run = gen9_hcpd_decode_picture; + gen9_hcpd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_VEBOX, 0); + + for (i = 0; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) { + gen9_hcpd_context->reference_surfaces[i].surface_id = VA_INVALID_ID; + gen9_hcpd_context->reference_surfaces[i].frame_store_id = -1; + gen9_hcpd_context->reference_surfaces[i].obj_surface = NULL; + } + + switch (object_config->profile) { + case VAProfileHEVCMain: + case VAProfileHEVCMain10: + gen9_hcpd_hevc_context_init(ctx, gen9_hcpd_context); + break; + case VAProfileVP9Profile0: + case VAProfileVP9Profile2: + gen9_hcpd_vp9_context_init(ctx, gen9_hcpd_context); + break; + + default: + break; + } + + return (struct hw_context *)gen9_hcpd_context; +} + +struct hw_context * +gen9_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + if (obj_config->profile == VAProfileHEVCMain || + obj_config->profile == VAProfileHEVCMain10 || + obj_config->profile == VAProfileVP9Profile0 || + obj_config->profile == VAProfileVP9Profile2) { + return gen9_hcpd_context_init(ctx, obj_config); + } else { + return gen8_dec_hw_context_init(ctx, obj_config); + } +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_mfd.h intel-vaapi-driver-1.7.1/src/gen9_mfd.h --- intel-vaapi-driver-1.0.15/src/gen9_mfd.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_mfd.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,106 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * + */ + +#ifndef GEN9_MFD_H +#define GEN9_MFD_H + +#include +#include +#include +#include +#include "i965_decoder.h" +#include "vp9_probs.h" + +struct hw_context; + +typedef struct vp9_frame_status +{ + uint16_t frame_width; + uint16_t frame_height; + uint8_t frame_type; + uint8_t show_frame; + uint8_t refresh_frame_context; + uint8_t frame_context_idx; + uint8_t intra_only; + uint8_t prob_buffer_saved_flag; + uint8_t prob_buffer_restored_flag; +}vp9_last_frame_status; + +typedef struct vp9_mv_temporal_buffer +{ + dri_bo *bo; + uint16_t frame_width; + uint16_t frame_height; +}VP9_MV_BUFFER; + +struct gen9_hcpd_context +{ + struct hw_context base; + + GenFrameStoreContext fs_ctx; + + GenFrameStore reference_surfaces[MAX_GEN_HCP_REFERENCE_FRAMES]; + + VAIQMatrixBufferHEVC iq_matrix_hevc; + + uint16_t picture_width_in_pixels; + uint16_t picture_height_in_pixels; + uint16_t picture_width_in_ctbs; + uint16_t picture_height_in_ctbs; + uint16_t picture_width_in_min_cb_minus1; + uint16_t picture_height_in_min_cb_minus1; + uint8_t ctb_size; + uint8_t min_cb_size; + + GenBuffer deblocking_filter_line_buffer; + GenBuffer deblocking_filter_tile_line_buffer; + GenBuffer deblocking_filter_tile_column_buffer; + GenBuffer metadata_line_buffer; + GenBuffer metadata_tile_line_buffer; + GenBuffer metadata_tile_column_buffer; + GenBuffer sao_line_buffer; + GenBuffer sao_tile_line_buffer; + GenBuffer sao_tile_column_buffer; + GenBuffer hvd_line_rowstore_buffer; + GenBuffer hvd_tile_rowstore_buffer; + GenBuffer vp9_probability_buffer; + GenBuffer vp9_segment_id_buffer; + VP9_MV_BUFFER vp9_mv_temporal_buffer_curr; + VP9_MV_BUFFER vp9_mv_temporal_buffer_last; + + unsigned short first_inter_slice_collocated_ref_idx; + unsigned short first_inter_slice_collocated_from_l0_flag; + int first_inter_slice_valid; + + vp9_last_frame_status last_frame; + FRAME_CONTEXT vp9_frame_ctx[FRAME_CONTEXTS]; + FRAME_CONTEXT vp9_fc_inter_default; + FRAME_CONTEXT vp9_fc_key_default; +}; + +#endif /* GEN9_MFD_H */ diff -Nru intel-vaapi-driver-1.0.15/src/gen9_post_processing.c intel-vaapi-driver-1.7.1/src/gen9_post_processing.c --- intel-vaapi-driver-1.0.15/src/gen9_post_processing.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_post_processing.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,452 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_post_processing.h" +#include "i965_render.h" +#include "intel_media.h" + +#include "gen8_post_processing.h" + +static const uint32_t pp_null_gen9[][4] = { +}; + +static const uint32_t pp_nv12_load_save_nv12_gen9[][4] = { +#include "shaders/post_processing/gen9/pl2_to_pl2.g9b" +}; + +static const uint32_t pp_nv12_load_save_pl3_gen9[][4] = { +#include "shaders/post_processing/gen9/pl2_to_pl3.g9b" +}; + +static const uint32_t pp_pl3_load_save_nv12_gen9[][4] = { +#include "shaders/post_processing/gen9/pl3_to_pl2.g9b" +}; + +static const uint32_t pp_pl3_load_save_pl3_gen9[][4] = { +#include "shaders/post_processing/gen9/pl3_to_pl3.g9b" +}; + +static const uint32_t pp_nv12_scaling_gen9[][4] = { +#include "shaders/post_processing/gen9/pl2_to_pl2.g9b" +}; + +static const uint32_t pp_nv12_avs_gen9[][4] = { +#include "shaders/post_processing/gen9/pl2_to_pl2.g9b" +}; + +static const uint32_t pp_nv12_dndi_gen9[][4] = { +}; + +static const uint32_t pp_nv12_dn_gen9[][4] = { +}; + +static const uint32_t pp_nv12_load_save_pa_gen9[][4] = { +#include "shaders/post_processing/gen9/pl2_to_pa.g9b" +}; + +static const uint32_t pp_pl3_load_save_pa_gen9[][4] = { +#include "shaders/post_processing/gen9/pl3_to_pa.g9b" +}; + +static const uint32_t pp_pa_load_save_nv12_gen9[][4] = { +#include "shaders/post_processing/gen9/pa_to_pl2.g9b" +}; + +static const uint32_t pp_pa_load_save_pl3_gen9[][4] = { +#include "shaders/post_processing/gen9/pa_to_pl3.g9b" +}; + +static const uint32_t pp_pa_load_save_pa_gen9[][4] = { +#include "shaders/post_processing/gen9/pa_to_pa.g9b" +}; + +static const uint32_t pp_rgbx_load_save_nv12_gen9[][4] = { +#include "shaders/post_processing/gen9/rgbx_to_nv12.g9b" +}; + +static const uint32_t pp_nv12_load_save_rgbx_gen9[][4] = { +#include "shaders/post_processing/gen9/pl2_to_rgbx.g9b" +}; + +static const uint32_t pp_nv12_blending_gen9[][4] = { +}; + +static struct pp_module pp_modules_gen9[] = { + { + { + "NULL module (for testing)", + PP_NULL, + pp_null_gen9, + sizeof(pp_null_gen9), + NULL, + }, + + pp_null_initialize, + }, + + { + { + "NV12_NV12", + PP_NV12_LOAD_SAVE_N12, + pp_nv12_load_save_nv12_gen9, + sizeof(pp_nv12_load_save_nv12_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12_PL3", + PP_NV12_LOAD_SAVE_PL3, + pp_nv12_load_save_pl3_gen9, + sizeof(pp_nv12_load_save_pl3_gen9), + NULL, + }, + gen8_pp_plx_avs_initialize, + }, + + { + { + "PL3_NV12", + PP_PL3_LOAD_SAVE_N12, + pp_pl3_load_save_nv12_gen9, + sizeof(pp_pl3_load_save_nv12_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PL3_PL3", + PP_PL3_LOAD_SAVE_PL3, + pp_pl3_load_save_pl3_gen9, + sizeof(pp_pl3_load_save_pl3_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12 Scaling module", + PP_NV12_SCALING, + pp_nv12_scaling_gen9, + sizeof(pp_nv12_scaling_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12 AVS module", + PP_NV12_AVS, + pp_nv12_avs_gen9, + sizeof(pp_nv12_avs_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12 DNDI module", + PP_NV12_DNDI, + pp_nv12_dndi_gen9, + sizeof(pp_nv12_dndi_gen9), + NULL, + }, + + pp_null_initialize, + }, + + { + { + "NV12 DN module", + PP_NV12_DN, + pp_nv12_dn_gen9, + sizeof(pp_nv12_dn_gen9), + NULL, + }, + + pp_null_initialize, + }, + { + { + "NV12_PA module", + PP_NV12_LOAD_SAVE_PA, + pp_nv12_load_save_pa_gen9, + sizeof(pp_nv12_load_save_pa_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PL3_PA module", + PP_PL3_LOAD_SAVE_PA, + pp_pl3_load_save_pa_gen9, + sizeof(pp_pl3_load_save_pa_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PA_NV12 module", + PP_PA_LOAD_SAVE_NV12, + pp_pa_load_save_nv12_gen9, + sizeof(pp_pa_load_save_nv12_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PA_PL3 module", + PP_PA_LOAD_SAVE_PL3, + pp_pa_load_save_pl3_gen9, + sizeof(pp_pa_load_save_pl3_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "PA_PA module", + PP_PA_LOAD_SAVE_PA, + pp_pa_load_save_pa_gen9, + sizeof(pp_pa_load_save_pa_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "RGBX_NV12 module", + PP_RGBX_LOAD_SAVE_NV12, + pp_rgbx_load_save_nv12_gen9, + sizeof(pp_rgbx_load_save_nv12_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, + + { + { + "NV12_RGBX module", + PP_NV12_LOAD_SAVE_RGBX, + pp_nv12_load_save_rgbx_gen9, + sizeof(pp_nv12_load_save_rgbx_gen9), + NULL, + }, + + gen8_pp_plx_avs_initialize, + }, +}; + +static const AVSConfig gen9_avs_config = { + .coeff_frac_bits = 6, + .coeff_epsilon = 1.0f / (1U << 6), + .num_phases = 31, + .num_luma_coeffs = 8, + .num_chroma_coeffs = 4, + + .coeff_range = { + .lower_bound = { + .y_k_h = { -2, -2, -2, -2, -2, -2, -2, -2 }, + .y_k_v = { -2, -2, -2, -2, -2, -2, -2, -2 }, + .uv_k_h = { -2, -2, -2, -2 }, + .uv_k_v = { -2, -2, -2, -2 }, + }, + .upper_bound = { + .y_k_h = { 2, 2, 2, 2, 2, 2, 2, 2 }, + .y_k_v = { 2, 2, 2, 2, 2, 2, 2, 2 }, + .uv_k_h = { 2, 2, 2, 2 }, + .uv_k_v = { 2, 2, 2, 2 }, + }, + }, +}; + +static void +gen9_pp_pipeline_select(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, + CMD_PIPELINE_SELECT | + PIPELINE_SELECT_MEDIA | + GEN9_FORCE_MEDIA_AWAKE_ON | + GEN9_MEDIA_DOP_GATE_OFF | + GEN9_PIPELINE_SELECTION_MASK | + GEN9_MEDIA_DOP_GATE_MASK | + GEN9_FORCE_MEDIA_AWAKE_MASK); + ADVANCE_BATCH(batch); +} + +static void +gen9_pp_state_base_address(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 19); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (19 - 2)); + /* DW1 Generate state address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW4-5 Surface state address */ + OUT_RELOC64(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + /* DW6-7 Dynamic state address */ + OUT_RELOC64(batch, pp_context->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, + 0, 0 | BASE_ADDRESS_MODIFY); + + /* DW8. Indirect object address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + + /* DW10-11 Instruction base address */ + OUT_RELOC64(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); + + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); + + /* Bindless surface state base address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0xfffff000); + + ADVANCE_BATCH(batch); +} + +static void +gen9_pp_end_pipeline(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, + CMD_PIPELINE_SELECT | + PIPELINE_SELECT_MEDIA | + GEN9_FORCE_MEDIA_AWAKE_OFF | + GEN9_MEDIA_DOP_GATE_ON | + GEN9_PIPELINE_SELECTION_MASK | + GEN9_MEDIA_DOP_GATE_MASK | + GEN9_FORCE_MEDIA_AWAKE_MASK); + ADVANCE_BATCH(batch); +} + +static void +gen9_pp_pipeline_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen9_pp_pipeline_select(ctx, pp_context); + gen9_pp_state_base_address(ctx, pp_context); + gen8_pp_vfe_state(ctx, pp_context); + gen8_pp_curbe_load(ctx, pp_context); + gen8_interface_descriptor_load(ctx, pp_context); + gen8_pp_object_walker(ctx, pp_context); + gen9_pp_end_pipeline(ctx, pp_context); + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus +gen9_post_processing(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void * filter_param) +{ + VAStatus va_status; + + va_status = gen8_pp_initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + pp_index, + filter_param); + + if (va_status == VA_STATUS_SUCCESS) { + gen8_pp_states_setup(ctx, pp_context); + gen9_pp_pipeline_setup(ctx, pp_context); + } + + return va_status; +} + +void +gen9_post_processing_context_init(VADriverContextP ctx, + void *data, + struct intel_batchbuffer *batch) +{ + struct i965_post_processing_context *pp_context = data; + + gen8_post_processing_context_common_init(ctx, data, pp_modules_gen9, ARRAY_ELEMS(pp_modules_gen9), batch); + avs_init_state(&pp_context->pp_avs_context.state, &gen9_avs_config); + + pp_context->intel_post_processing = gen9_post_processing; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_render.c intel-vaapi-driver-1.7.1/src/gen9_render.c --- intel-vaapi-driver-1.0.15/src/gen9_render.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_render.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,1842 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * Keith Packard + * Xiang Haihao + * Zhao Yakui + * + */ + +/* + * Most of rendering codes are ported from xf86-video-intel/src/i965_video.c + */ + +#include +#include +#include +#include +#include + +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_structs.h" +#include "i965_yuv_coefs.h" + +#include "i965_render.h" + +/* Programs for Gen8 */ +static const uint32_t sf_kernel_static_gen9[][4] ={ + +}; +static const uint32_t ps_kernel_static_gen9[][4] = { +#include "shaders/render/exa_wm_src_affine.g9b" +#include "shaders/render/exa_wm_src_sample_planar.g9b" +#include "shaders/render/exa_wm_yuv_color_balance.g9b" +#include "shaders/render/exa_wm_yuv_rgb.g9b" +#include "shaders/render/exa_wm_write.g9b" +}; + +static const uint32_t ps_subpic_kernel_static_gen9[][4] = { +#include "shaders/render/exa_wm_src_affine.g9b" +#include "shaders/render/exa_wm_src_sample_argb.g9b" +#include "shaders/render/exa_wm_write.g9b" +}; + + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 + +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_RENDER_SURFACES) + +enum { + SF_KERNEL = 0, + PS_KERNEL, + PS_SUBPIC_KERNEL +}; + +static struct i965_kernel render_kernels_gen9[] = { + { + "SF", + SF_KERNEL, + sf_kernel_static_gen9, + sizeof(sf_kernel_static_gen9), + NULL + }, + { + "PS", + PS_KERNEL, + ps_kernel_static_gen9, + sizeof(ps_kernel_static_gen9), + NULL + }, + + { + "PS_SUBPIC", + PS_SUBPIC_KERNEL, + ps_subpic_kernel_static_gen9, + sizeof(ps_subpic_kernel_static_gen9), + NULL + } +}; + +#define URB_VS_ENTRIES 8 +#define URB_VS_ENTRY_SIZE 1 + +#define URB_GS_ENTRIES 0 +#define URB_GS_ENTRY_SIZE 0 + +#define URB_CLIP_ENTRIES 0 +#define URB_CLIP_ENTRY_SIZE 0 + +#define URB_SF_ENTRIES 1 +#define URB_SF_ENTRY_SIZE 2 + +#define URB_CS_ENTRIES 4 +#define URB_CS_ENTRY_SIZE 4 + +static void +gen9_render_set_surface_tiling(struct gen8_surface_state *ss, uint32_t tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +/* Set "Shader Channel Select" for GEN9+ */ +static void +gen9_render_set_surface_scs(struct gen8_surface_state *ss) +{ + ss->ss7.shader_chanel_select_r = HSW_SCS_RED; + ss->ss7.shader_chanel_select_g = HSW_SCS_GREEN; + ss->ss7.shader_chanel_select_b = HSW_SCS_BLUE; + ss->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; +} + +static void +gen9_render_set_surface_state( + struct gen8_surface_state *ss, + dri_bo *bo, + unsigned long offset, + int width, + int height, + int pitch, + int format, + unsigned int flags +) +{ + unsigned int tiling; + unsigned int swizzle; + + memset(ss, 0, sizeof(*ss)); + + switch (flags & (VA_TOP_FIELD|VA_BOTTOM_FIELD)) { + case VA_BOTTOM_FIELD: + ss->ss0.vert_line_stride_ofs = 1; + /* fall-through */ + case VA_TOP_FIELD: + ss->ss0.vert_line_stride = 1; + height /= 2; + break; + } + + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = format; + + ss->ss8.base_addr = bo->offset + offset; + + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + + ss->ss3.pitch = pitch - 1; + + /* Always set 1(align 4 mode) per B-spec */ + ss->ss0.vertical_alignment = 1; + ss->ss0.horizontal_alignment = 1; + + dri_bo_get_tiling(bo, &tiling, &swizzle); + gen9_render_set_surface_tiling(ss, tiling); +} + +static void +gen9_render_src_surface_state( + VADriverContextP ctx, + int index, + dri_bo *region, + unsigned long offset, + int w, + int h, + int pitch, + int format, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + void *ss; + dri_bo *ss_bo = render_state->wm.surface_state_binding_table_bo; + + assert(index < MAX_RENDER_SURFACES); + + dri_bo_map(ss_bo, 1); + assert(ss_bo->virtual); + ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); + + gen9_render_set_surface_state(ss, + region, offset, + w, h, + pitch, format, flags); + gen9_render_set_surface_scs(ss); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_SAMPLER, 0, + offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen8_surface_state, ss8), + region); + + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); + render_state->wm.sampler_count++; +} + +static void +gen9_render_src_surfaces_state( + VADriverContextP ctx, + struct object_surface *obj_surface, + unsigned int flags +) +{ + int region_pitch; + int rw, rh; + dri_bo *region; + + region_pitch = obj_surface->width; + rw = obj_surface->orig_width; + rh = obj_surface->orig_height; + region = obj_surface->bo; + + if (obj_surface->fourcc == VA_FOURCC('P', '0', '1', '0')) { + gen9_render_src_surface_state(ctx, 1, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R16_UNORM, flags); /* Y */ + gen9_render_src_surface_state(ctx, 2, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R16_UNORM, flags); + gen9_render_src_surface_state(ctx, 3, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R16G16_UNORM, flags); /* UV */ + gen9_render_src_surface_state(ctx, 4, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R16G16_UNORM, flags); + } else { + gen9_render_src_surface_state(ctx, 1, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags); /* Y */ + gen9_render_src_surface_state(ctx, 2, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags); + + if (obj_surface->fourcc == VA_FOURCC('N', 'V', '1', '2')) { + gen9_render_src_surface_state(ctx, 3, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8G8_UNORM, flags); /* UV */ + gen9_render_src_surface_state(ctx, 4, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8G8_UNORM, flags); + } else { + gen9_render_src_surface_state(ctx, 3, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); /* U */ + gen9_render_src_surface_state(ctx, 4, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); + gen9_render_src_surface_state(ctx, 5, region, + region_pitch * obj_surface->y_cr_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); /* V */ + gen9_render_src_surface_state(ctx, 6, region, + region_pitch * obj_surface->y_cr_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); + } + } +} + +static void +gen9_subpic_render_src_surfaces_state(VADriverContextP ctx, + struct object_surface *obj_surface) +{ + dri_bo *subpic_region; + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + struct object_image *obj_image = obj_subpic->obj_image; + + assert(obj_surface); + assert(obj_surface->bo); + subpic_region = obj_image->bo; + /*subpicture surface*/ + gen9_render_src_surface_state(ctx, 1, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format, 0); + gen9_render_src_surface_state(ctx, 2, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format, 0); +} + +static void +gen9_render_dest_surface_state(VADriverContextP ctx, int index) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + void *ss; + dri_bo *ss_bo = render_state->wm.surface_state_binding_table_bo; + int format; + assert(index < MAX_RENDER_SURFACES); + + if (dest_region->cpp == 2) { + format = I965_SURFACEFORMAT_B5G6R5_UNORM; + } else { + format = I965_SURFACEFORMAT_B8G8R8A8_UNORM; + } + + dri_bo_map(ss_bo, 1); + assert(ss_bo->virtual); + ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); + + gen9_render_set_surface_state(ss, + dest_region->bo, 0, + dest_region->width, dest_region->height, + dest_region->pitch, format, 0); + gen9_render_set_surface_scs(ss); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen8_surface_state, ss8), + dest_region->bo); + + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); +} + +static void +i965_fill_vertex_buffer( + VADriverContextP ctx, + float tex_coords[4], /* [(u1,v1);(u2,v2)] */ + float vid_coords[4] /* [(x1,y1);(x2,y2)] */ +) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + float vb[12]; + + enum { X1, Y1, X2, Y2 }; + + static const unsigned int g_rotation_indices[][6] = { + [VA_ROTATION_NONE] = { X2, Y2, X1, Y2, X1, Y1 }, + [VA_ROTATION_90] = { X2, Y1, X2, Y2, X1, Y2 }, + [VA_ROTATION_180] = { X1, Y1, X2, Y1, X2, Y2 }, + [VA_ROTATION_270] = { X1, Y2, X1, Y1, X2, Y1 }, + }; + + const unsigned int * const rotation_indices = + g_rotation_indices[i965->rotation_attrib->value]; + + vb[0] = tex_coords[rotation_indices[0]]; /* bottom-right corner */ + vb[1] = tex_coords[rotation_indices[1]]; + vb[2] = vid_coords[X2]; + vb[3] = vid_coords[Y2]; + + vb[4] = tex_coords[rotation_indices[2]]; /* bottom-left corner */ + vb[5] = tex_coords[rotation_indices[3]]; + vb[6] = vid_coords[X1]; + vb[7] = vid_coords[Y2]; + + vb[8] = tex_coords[rotation_indices[4]]; /* top-left corner */ + vb[9] = tex_coords[rotation_indices[5]]; + vb[10] = vid_coords[X1]; + vb[11] = vid_coords[Y1]; + + dri_bo_subdata(i965->render_state.vb.vertex_buffer, 0, sizeof(vb), vb); +} + +static void +i965_subpic_render_upload_vertex(VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *output_rect) +{ + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + float tex_coords[4], vid_coords[4]; + VARectangle dst_rect; + + if (obj_subpic->flags & VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD) + dst_rect = obj_subpic->dst_rect; + else { + const float sx = (float)output_rect->width / obj_surface->orig_width; + const float sy = (float)output_rect->height / obj_surface->orig_height; + dst_rect.x = output_rect->x + sx * obj_subpic->dst_rect.x; + dst_rect.y = output_rect->y + sy * obj_subpic->dst_rect.y; + dst_rect.width = sx * obj_subpic->dst_rect.width; + dst_rect.height = sy * obj_subpic->dst_rect.height; + } + + tex_coords[0] = (float)obj_subpic->src_rect.x / obj_subpic->width; + tex_coords[1] = (float)obj_subpic->src_rect.y / obj_subpic->height; + tex_coords[2] = (float)(obj_subpic->src_rect.x + obj_subpic->src_rect.width) / obj_subpic->width; + tex_coords[3] = (float)(obj_subpic->src_rect.y + obj_subpic->src_rect.height) / obj_subpic->height; + + vid_coords[0] = dst_rect.x; + vid_coords[1] = dst_rect.y; + vid_coords[2] = (float)(dst_rect.x + dst_rect.width); + vid_coords[3] = (float)(dst_rect.y + dst_rect.height); + + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); +} + +static void +i965_render_upload_vertex( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + float tex_coords[4], vid_coords[4]; + int width, height; + + width = obj_surface->orig_width; + height = obj_surface->orig_height; + + tex_coords[0] = (float)src_rect->x / width; + tex_coords[1] = (float)src_rect->y / height; + tex_coords[2] = (float)(src_rect->x + src_rect->width) / width; + tex_coords[3] = (float)(src_rect->y + src_rect->height) / height; + + vid_coords[0] = dest_region->x + dst_rect->x; + vid_coords[1] = dest_region->y + dst_rect->y; + vid_coords[2] = vid_coords[0] + dst_rect->width; + vid_coords[3] = vid_coords[1] + dst_rect->height; + + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); +} + +static void +i965_render_drawing_rectangle(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_DRAWING_RECTANGLE | 2); + OUT_BATCH(batch, 0x00000000); + OUT_BATCH(batch, (dest_region->width - 1) | (dest_region->height - 1) << 16); + OUT_BATCH(batch, 0x00000000); + ADVANCE_BATCH(batch); +} + +static void +i965_render_upload_image_palette( + VADriverContextP ctx, + struct object_image *obj_image, + unsigned int alpha +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int i; + + assert(obj_image); + + if (!obj_image) + return; + + if (obj_image->image.num_palette_entries == 0) + return; + + BEGIN_BATCH(batch, 1 + obj_image->image.num_palette_entries); + OUT_BATCH(batch, CMD_SAMPLER_PALETTE_LOAD | (obj_image->image.num_palette_entries - 1)); + /*fill palette*/ + //int32_t out[16]; //0-23:color 23-31:alpha + for (i = 0; i < obj_image->image.num_palette_entries; i++) + OUT_BATCH(batch, (alpha << 24) | obj_image->palette[i]); + ADVANCE_BATCH(batch); +} + +static void +gen9_clear_dest_region(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + struct intel_region *dest_region = render_state->draw_region; + unsigned int blt_cmd, br13; + int pitch; + + blt_cmd = GEN8_XY_COLOR_BLT_CMD; + br13 = 0xf0 << 16; + pitch = dest_region->pitch; + + if (dest_region->cpp == 4) { + br13 |= BR13_8888; + blt_cmd |= (XY_COLOR_BLT_WRITE_RGB | XY_COLOR_BLT_WRITE_ALPHA); + } else { + assert(dest_region->cpp == 2); + br13 |= BR13_565; + } + + if (dest_region->tiling != I915_TILING_NONE) { + blt_cmd |= XY_COLOR_BLT_DST_TILED; + pitch /= 4; + } + + br13 |= pitch; + + intel_batchbuffer_start_atomic_blt(batch, 24); + BEGIN_BLT_BATCH(batch, 7); + + OUT_BATCH(batch, blt_cmd); + OUT_BATCH(batch, br13); + OUT_BATCH(batch, (dest_region->y << 16) | (dest_region->x)); + OUT_BATCH(batch, ((dest_region->y + dest_region->height) << 16) | + (dest_region->x + dest_region->width)); + OUT_RELOC(batch, dest_region->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0); + OUT_BATCH(batch, 0x0); + OUT_BATCH(batch, 0x0); + ADVANCE_BATCH(batch); + intel_batchbuffer_end_atomic(batch); +} + + +/* + * for GEN8 + */ +#define ALIGNMENT 64 + +static void +gen9_render_initialize(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + dri_bo *bo; + int size; + unsigned int end_offset; + + /* VERTEX BUFFER */ + dri_bo_unreference(render_state->vb.vertex_buffer); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vertex buffer", + 4096, + 4096); + assert(bo); + render_state->vb.vertex_buffer = bo; + + /* WM */ + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_RENDER_SURFACES, + 4096); + assert(bo); + render_state->wm.surface_state_binding_table_bo = bo; + + render_state->curbe_size = 256; + + render_state->wm.sampler_count = 0; + + render_state->sampler_size = MAX_SAMPLERS * sizeof(struct gen8_sampler_state); + + render_state->cc_state_size = sizeof(struct gen6_color_calc_state); + + render_state->cc_viewport_size = sizeof(struct i965_cc_viewport); + + render_state->blend_state_size = sizeof(struct gen8_global_blend_state) + + 16 * sizeof(struct gen8_blend_state_rt); + + render_state->sf_clip_size = 1024; + + render_state->scissor_size = 1024; + + size = ALIGN(render_state->curbe_size, ALIGNMENT) + + ALIGN(render_state->sampler_size, ALIGNMENT) + + ALIGN(render_state->cc_viewport_size, ALIGNMENT) + + ALIGN(render_state->cc_state_size, ALIGNMENT) + + ALIGN(render_state->blend_state_size, ALIGNMENT) + + ALIGN(render_state->sf_clip_size, ALIGNMENT) + + ALIGN(render_state->scissor_size, ALIGNMENT); + + dri_bo_unreference(render_state->dynamic_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "dynamic_state", + size, + 4096); + + render_state->dynamic_state.bo = bo; + + end_offset = 0; + render_state->dynamic_state.end_offset = 0; + + /* Constant buffer offset */ + render_state->curbe_offset = end_offset; + end_offset += ALIGN(render_state->curbe_size, ALIGNMENT); + + /* Sampler_state */ + render_state->sampler_offset = end_offset; + end_offset += ALIGN(render_state->sampler_size, ALIGNMENT); + + /* CC_VIEWPORT_state */ + render_state->cc_viewport_offset = end_offset; + end_offset += ALIGN(render_state->cc_viewport_size, ALIGNMENT); + + /* CC_STATE_state */ + render_state->cc_state_offset = end_offset; + end_offset += ALIGN(render_state->cc_state_size, ALIGNMENT); + + /* Blend_state */ + render_state->blend_state_offset = end_offset; + end_offset += ALIGN(render_state->blend_state_size, ALIGNMENT); + + /* SF_CLIP_state */ + render_state->sf_clip_offset = end_offset; + end_offset += ALIGN(render_state->sf_clip_size, ALIGNMENT); + + /* SCISSOR_state */ + render_state->scissor_offset = end_offset; + end_offset += ALIGN(render_state->scissor_size, ALIGNMENT); + + /* update the end offset of dynamic_state */ + render_state->dynamic_state.end_offset = end_offset; + +} + +static void +gen9_render_sampler(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen8_sampler_state *sampler_state; + int i; + unsigned char *cc_ptr; + + assert(render_state->wm.sampler_count > 0); + assert(render_state->wm.sampler_count <= MAX_SAMPLERS); + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->sampler_offset; + + sampler_state = (struct gen8_sampler_state *) cc_ptr; + + for (i = 0; i < render_state->wm.sampler_count; i++) { + memset(sampler_state, 0, sizeof(*sampler_state)); + sampler_state->ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state->ss3.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss3.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state->ss3.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state++; + } + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen9_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen8_global_blend_state *global_blend_state; + struct gen8_blend_state_rt *blend_state; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->blend_state_offset; + + global_blend_state = (struct gen8_global_blend_state*) cc_ptr; + + memset(global_blend_state, 0, render_state->blend_state_size); + /* Global blend state + blend_state for Render Target */ + blend_state = (struct gen8_blend_state_rt *)(global_blend_state + 1); + blend_state->blend1.logic_op_enable = 1; + blend_state->blend1.logic_op_func = 0xc; + blend_state->blend1.pre_blend_clamp_enable = 1; + + dri_bo_unmap(render_state->dynamic_state.bo); +} + + +static void +gen9_render_cc_viewport(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct i965_cc_viewport *cc_viewport; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->cc_viewport_offset; + + cc_viewport = (struct i965_cc_viewport *) cc_ptr; + + memset(cc_viewport, 0, sizeof(*cc_viewport)); + + cc_viewport->min_depth = -1.e35; + cc_viewport->max_depth = 1.e35; + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen9_render_color_calc_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen6_color_calc_state *color_calc_state; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->cc_state_offset; + + color_calc_state = (struct gen6_color_calc_state *) cc_ptr; + + memset(color_calc_state, 0, sizeof(*color_calc_state)); + color_calc_state->constant_r = 1.0; + color_calc_state->constant_g = 0.0; + color_calc_state->constant_b = 1.0; + color_calc_state->constant_a = 1.0; + dri_bo_unmap(render_state->dynamic_state.bo); +} + +#define PI 3.1415926 + +static void +gen9_render_upload_constants(VADriverContextP ctx, + struct object_surface *obj_surface, + unsigned int flags) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + unsigned short *constant_buffer; + unsigned char *cc_ptr; + float *color_balance_base; + float contrast = (float)i965->contrast_attrib->value / DEFAULT_CONTRAST; + float brightness = (float)i965->brightness_attrib->value / 255; /* YUV is float in the shader */ + float hue = (float)i965->hue_attrib->value / 180 * PI; + float saturation = (float)i965->saturation_attrib->value / DEFAULT_SATURATION; + float *yuv_to_rgb; + unsigned int color_flag; + const float* yuv_coefs; + size_t coefs_length; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->curbe_offset; + + constant_buffer = (unsigned short *) cc_ptr; + + if (obj_surface->subsampling == SUBSAMPLE_YUV400) { + assert(obj_surface->fourcc == VA_FOURCC('Y', '8', '0', '0')); + + *constant_buffer = 2; + } else { + if (obj_surface->fourcc == VA_FOURCC('N', 'V', '1', '2') || + obj_surface->fourcc == VA_FOURCC('P', '0', '1', '0')) + *constant_buffer = 1; + else + *constant_buffer = 0; + } + + if (i965->contrast_attrib->value == DEFAULT_CONTRAST && + i965->brightness_attrib->value == DEFAULT_BRIGHTNESS && + i965->hue_attrib->value == DEFAULT_HUE && + i965->saturation_attrib->value == DEFAULT_SATURATION) + constant_buffer[1] = 1; /* skip color balance transformation */ + else + constant_buffer[1] = 0; + + color_balance_base = (float *)constant_buffer + 4; + *color_balance_base++ = contrast; + *color_balance_base++ = brightness; + *color_balance_base++ = cos(hue) * contrast * saturation; + *color_balance_base++ = sin(hue) * contrast * saturation; + + color_flag = flags & VA_SRC_COLOR_MASK; + yuv_to_rgb = (float *)constant_buffer + 8; + + yuv_coefs = i915_color_standard_to_coefs(i915_filter_to_color_standard(color_flag), + &coefs_length); + memcpy(yuv_to_rgb, yuv_coefs, coefs_length); + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen9_render_setup_states( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + gen9_render_dest_surface_state(ctx, 0); + gen9_render_src_surfaces_state(ctx, obj_surface, flags); + gen9_render_sampler(ctx); + gen9_render_cc_viewport(ctx); + gen9_render_color_calc_state(ctx); + gen9_render_blend_state(ctx); + gen9_render_upload_constants(ctx, obj_surface, flags); + i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect); +} + +static void +gen9_emit_state_base_address(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 19); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (19 - 2)); + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General state base address */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /*DW4 */ + OUT_RELOC(batch, render_state->wm.surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_BATCH(batch, 0); + + /*DW6*/ + /* Dynamic state base address */ + OUT_RELOC(batch, render_state->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, + 0, BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + + /*DW8*/ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect object base address */ + OUT_BATCH(batch, 0); + + /*DW10 */ + /* Instruction base address */ + OUT_RELOC(batch, render_state->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + + /*DW12 */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* General state upper bound */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ + OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ + + /* the bindless surface state address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0xFFFF0000); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_cc_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_CC_STATE_POINTERS | (2 - 2)); + OUT_BATCH(batch, (render_state->cc_state_offset + 1)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); + OUT_BATCH(batch, (render_state->blend_state_offset + 1)); + ADVANCE_BATCH(batch); + +} + +static void +gen9_emit_vertices(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, CMD_VERTEX_BUFFERS | (5 - 2)); + OUT_BATCH(batch, + (0 << GEN8_VB0_BUFFER_INDEX_SHIFT) | + (0 << GEN8_VB0_MOCS_SHIFT) | + GEN7_VB0_ADDRESS_MODIFYENABLE | + ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); + OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 12 * 4); + ADVANCE_BATCH(batch); + + /* Topology in 3D primitive is overrided by VF_TOPOLOGY command */ + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_VF_TOPOLOGY | (2 - 2)); + OUT_BATCH(batch, + _3DPRIM_RECTLIST); + ADVANCE_BATCH(batch); + + OUT_BATCH(batch, GEN7_3DSTATE_VF | (2 - 2)); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, GEN8_3DSTATE_VF_INSTANCING | (3 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, GEN8_3DSTATE_VF_SGVS | (2 - 2)); + OUT_BATCH(batch, 0); + + BEGIN_BATCH(batch, 7); + OUT_BATCH(batch, CMD_3DPRIMITIVE | (7 - 2)); + OUT_BATCH(batch, + GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL); + OUT_BATCH(batch, 3); /* vertex count per instance */ + OUT_BATCH(batch, 0); /* start vertex offset */ + OUT_BATCH(batch, 1); /* single instance */ + OUT_BATCH(batch, 0); /* start instance location */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_vertex_element_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + int i; + + /* + * The VUE layout + * dword 0-3: pad (0, 0, 0. 0) + * dword 4-7: position (x, y, 1.0, 1.0), + * dword 8-11: texture coordinate 0 (u0, v0, 1.0, 1.0) + */ + + /* Set up our vertex elements, sourced from the single vertex buffer. */ + OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | (7 - 2)); + + /* Element state 0. These are 4 dwords of 0 required for the VUE format. + * We don't really know or care what they do. + */ + + OUT_BATCH(batch, (0 << GEN8_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN8_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT)); + + /* offset 8: X, Y -> {x, y, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN8_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN8_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (8 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + + /* offset 0: u,v -> {U, V, 1.0, 1.0} */ + OUT_BATCH(batch, (0 << GEN8_VE0_VERTEX_BUFFER_INDEX_SHIFT) | + GEN8_VE0_VALID | + (I965_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | + (0 << VE0_OFFSET_SHIFT)); + OUT_BATCH(batch, (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | + (I965_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | + (I965_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); + + /* Disable instancing for all vertex elements. */ + for (i = 0; i < 3; i++) { + OUT_BATCH(batch, GEN8_3DSTATE_VF_INSTANCING | (3 - 2)); + OUT_BATCH(batch, i); + OUT_BATCH(batch, 0); + } +} + +static void +gen9_emit_vs_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* disable VS constant buffer */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_VS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 0 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 1 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 2 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* CS Buffer 3 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, GEN6_3DSTATE_VS | (9 - 2)); + OUT_BATCH(batch, 0); /* without VS kernel */ + OUT_BATCH(batch, 0); + /* VS shader dispatch flag */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW6. VS shader GRF and URB buffer definition */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + +} + +/* + * URB layout on GEN8 + * ---------------------------------------- + * | PS Push Constants (8KB) | VS entries | + * ---------------------------------------- + */ +static void +gen9_emit_urb(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int num_urb_entries = 64; + + /* The minimum urb entries is 64 */ + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Size is 8Kbs and base address is 0Kb */ + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); + /* Size is 8Kbs and base address is 0Kb */ + OUT_BATCH(batch, + (0 << GEN8_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT) | + (8 << GEN8_PUSH_CONSTANT_BUFFER_SIZE_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_VS | (2 - 2)); + OUT_BATCH(batch, + (num_urb_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) | + (4 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | + (4 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_GS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (5 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_HS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (6 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_URB_DS | (2 - 2)); + OUT_BATCH(batch, + (0 << GEN7_URB_ENTRY_SIZE_SHIFT) | + (7 << GEN7_URB_STARTING_ADDRESS_SHIFT)); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_bypass_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + /* bypass GS */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_GS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 10); + OUT_BATCH(batch, GEN6_3DSTATE_GS | (10 - 2)); + /* GS shader address */ + OUT_BATCH(batch, 0); /* without GS kernel */ + OUT_BATCH(batch, 0); + /* DW3. GS shader dispatch flag */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW6. GS shader GRF and URB offset/length */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* disable HS */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN7_3DSTATE_CONSTANT_HS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, GEN7_3DSTATE_HS | (9 - 2)); + OUT_BATCH(batch, 0); + /*DW2. HS pass-through */ + OUT_BATCH(batch, 0); + /*DW3. HS shader address */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /*DW5. HS shader flag. URB offset/length and so on */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable TE */ + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, GEN7_3DSTATE_TE | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable DS */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN7_3DSTATE_CONSTANT_DS | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN7_3DSTATE_DS | (11 - 2)); + /* DW1. DS shader pointer */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW3-5. DS shader dispatch flag.*/ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW6-7. DS shader pass-through, GRF,URB offset/Length,Thread Number*/ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW8. DS shader output URB */ + OUT_BATCH(batch, 0); + + /* Dual-patch kernel start pointer */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Disable STREAMOUT */ + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN7_3DSTATE_STREAMOUT | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_invarient_states(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_3D | + GEN9_PIPELINE_SELECTION_MASK); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_MULTISAMPLE | (2 - 2)); + OUT_BATCH(batch, GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | + GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ + ADVANCE_BATCH(batch); + + /* Update 3D Multisample pattern */ + BEGIN_BATCH(batch, 9); + OUT_BATCH(batch, GEN8_3DSTATE_SAMPLE_PATTERN | (9 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); + OUT_BATCH(batch, 1); + ADVANCE_BATCH(batch); + + /* Set system instruction pointer */ + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_STATE_SIP | 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_clip_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + OUT_BATCH(batch, GEN6_3DSTATE_CLIP | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* pass-through */ + OUT_BATCH(batch, 0); +} + +static void +gen9_emit_sf_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN8_3DSTATE_RASTER | (5 - 2)); + OUT_BATCH(batch, GEN8_3DSTATE_RASTER_CULL_NONE); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, GEN7_3DSTATE_SBE | (6 - 2)); + OUT_BATCH(batch, + (GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH) | + (GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET) | + (1 << GEN7_SBE_NUM_OUTPUTS_SHIFT) | + (1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT) | + (1 << GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, GEN9_SBE_ACTIVE_COMPONENT_XYZW); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* SBE for backend setup */ + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN8_3DSTATE_SBE_SWIZ | (11 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, GEN6_3DSTATE_SF | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_wm_state(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + unsigned int num_samples = 0; + unsigned int max_threads; + + max_threads = i965->intel.device_info->max_wm_threads - 2; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_PSEXTRA | (2 - 2)); + OUT_BATCH(batch, + (GEN8_PSX_PIXEL_SHADER_VALID | GEN8_PSX_ATTRIBUTE_ENABLE)); + ADVANCE_BATCH(batch); + + if (kernel == PS_KERNEL) { + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_PSBLEND | (2 - 2)); + OUT_BATCH(batch, + GEN8_PS_BLEND_HAS_WRITEABLE_RT); + ADVANCE_BATCH(batch); + } else if (kernel == PS_SUBPIC_KERNEL) { + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN8_3DSTATE_PSBLEND | (2 - 2)); + OUT_BATCH(batch, + (GEN8_PS_BLEND_HAS_WRITEABLE_RT | + GEN8_PS_BLEND_COLOR_BUFFER_BLEND_ENABLE | + (I965_BLENDFACTOR_SRC_ALPHA << GEN8_PS_BLEND_SRC_ALPHA_BLEND_FACTOR_SHIFT) | + (I965_BLENDFACTOR_INV_SRC_ALPHA << GEN8_PS_BLEND_DST_ALPHA_BLEND_FACTOR_SHIFT) | + (I965_BLENDFACTOR_SRC_ALPHA << GEN8_PS_BLEND_SRC_BLEND_FACTOR_SHIFT) | + (I965_BLENDFACTOR_INV_SRC_ALPHA << GEN8_PS_BLEND_DST_BLEND_FACTOR_SHIFT))); + ADVANCE_BATCH(batch); + } + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN6_3DSTATE_WM | (2 - 2)); + OUT_BATCH(batch, + GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 11); + OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS | (11 - 2)); + OUT_BATCH(batch, URB_CS_ENTRY_SIZE); + OUT_BATCH(batch, 0); + /*DW3-4. Constant buffer 0 */ + OUT_BATCH(batch, render_state->curbe_offset); + OUT_BATCH(batch, 0); + + /*DW5-10. Constant buffer 1-3 */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 12); + OUT_BATCH(batch, GEN7_3DSTATE_PS | (12 - 2)); + /* PS shader address */ + OUT_BATCH(batch, render_state->render_kernels[kernel].kernel_offset); + + OUT_BATCH(batch, 0); + /* DW3. PS shader flag .Binding table cnt/sample cnt */ + OUT_BATCH(batch, + (1 << GEN7_PS_SAMPLER_COUNT_SHIFT) | + (5 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT) | + GEN7_PS_VECTOR_MASK_ENABLE); + /* DW4-5. Scatch space */ + OUT_BATCH(batch, 0); /* scratch space base offset */ + OUT_BATCH(batch, 0); + /* DW6. PS shader threads. */ + OUT_BATCH(batch, + ((max_threads - 1) << GEN8_PS_MAX_THREADS_SHIFT) | num_samples | + GEN7_PS_PUSH_CONSTANT_ENABLE | + GEN7_PS_16_DISPATCH_ENABLE); + /* DW7. PS shader GRF */ + OUT_BATCH(batch, + (6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0)); + OUT_BATCH(batch, 0); /* kernel 1 pointer */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* kernel 2 pointer */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); + OUT_BATCH(batch, BINDING_TABLE_OFFSET); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_depth_buffer_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, GEN7_3DSTATE_DEPTH_BUFFER | (8 - 2)); + OUT_BATCH(batch, + (I965_DEPTHFORMAT_D32_FLOAT << 18) | + (I965_SURFACE_NULL << 29)); + /* DW2-3. Depth Buffer Address */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + /* DW4-7. Surface structure */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Update the Hier Depth buffer */ + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + /* Update the stencil buffer */ + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN7_3DSTATE_STENCIL_BUFFER | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_depth_stencil_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, GEN8_3DSTATE_WM_DEPTH_STENCIL | (3 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_wm_hz_op(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + BEGIN_BATCH(batch, 5); + OUT_BATCH(batch, GEN8_3DSTATE_WM_HZ_OP | (5 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_viewport_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); + OUT_BATCH(batch, render_state->cc_viewport_offset); + ADVANCE_BATCH(batch); + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); +} + +static void +gen9_emit_sampler_state_pointers(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + struct i965_render_state *render_state = &i965->render_state; + + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); + OUT_BATCH(batch, render_state->sampler_offset); + ADVANCE_BATCH(batch); +} + + +static void +gen9_emit_drawing_rectangle(VADriverContextP ctx) +{ + i965_render_drawing_rectangle(ctx); +} + +static void +gen9_render_emit_states(VADriverContextP ctx, int kernel) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen9_emit_invarient_states(ctx); + gen9_emit_state_base_address(ctx); + gen9_emit_viewport_state_pointers(ctx); + gen9_emit_urb(ctx); + gen9_emit_cc_state_pointers(ctx); + gen9_emit_sampler_state_pointers(ctx); + gen9_emit_wm_hz_op(ctx); + gen9_emit_bypass_state(ctx); + gen9_emit_vs_state(ctx); + gen9_emit_clip_state(ctx); + gen9_emit_sf_state(ctx); + gen9_emit_depth_stencil_state(ctx); + gen9_emit_wm_state(ctx, kernel); + gen9_emit_depth_buffer_state(ctx); + gen9_emit_drawing_rectangle(ctx); + gen9_emit_vertex_element_state(ctx); + gen9_emit_vertices(ctx); + intel_batchbuffer_end_atomic(batch); +} + +static void +gen9_render_put_surface( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect, + unsigned int flags +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + + gen9_render_initialize(ctx); + gen9_render_setup_states(ctx, obj_surface, src_rect, dst_rect, flags); + gen9_clear_dest_region(ctx); + gen9_render_emit_states(ctx, PS_KERNEL); + intel_batchbuffer_flush(batch); +} + +static void +gen9_subpicture_render_blend_state(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + struct gen8_global_blend_state *global_blend_state; + struct gen8_blend_state_rt *blend_state; + unsigned char *cc_ptr; + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->blend_state_offset; + + global_blend_state = (struct gen8_global_blend_state*) cc_ptr; + + memset(global_blend_state, 0, render_state->blend_state_size); + /* Global blend state + blend_state for Render Target */ + blend_state = (struct gen8_blend_state_rt *)(global_blend_state + 1); + blend_state->blend0.color_blend_func = I965_BLENDFUNCTION_ADD; + blend_state->blend0.dest_blend_factor = I965_BLENDFACTOR_INV_SRC_ALPHA; + blend_state->blend0.src_blend_factor = I965_BLENDFACTOR_SRC_ALPHA; + blend_state->blend0.alpha_blend_func = I965_BLENDFUNCTION_ADD; + blend_state->blend0.ia_dest_blend_factor = I965_BLENDFACTOR_INV_SRC_ALPHA; + blend_state->blend0.ia_src_blend_factor = I965_BLENDFACTOR_SRC_ALPHA; + blend_state->blend0.colorbuf_blend = 1; + blend_state->blend1.post_blend_clamp_enable = 1; + blend_state->blend1.pre_blend_clamp_enable = 1; + blend_state->blend1.clamp_range = 0; /* clamp range [0, 1] */ + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen9_subpic_render_upload_constants(VADriverContextP ctx, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + float *constant_buffer; + float global_alpha = 1.0; + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + unsigned char *cc_ptr; + + if (obj_subpic->flags & VA_SUBPICTURE_GLOBAL_ALPHA) { + global_alpha = obj_subpic->global_alpha; + } + + + dri_bo_map(render_state->dynamic_state.bo, 1); + assert(render_state->dynamic_state.bo->virtual); + + cc_ptr = (unsigned char *) render_state->dynamic_state.bo->virtual + + render_state->curbe_offset; + + constant_buffer = (float *) cc_ptr; + *constant_buffer = global_alpha; + + dri_bo_unmap(render_state->dynamic_state.bo); +} + +static void +gen9_subpicture_render_setup_states( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + gen9_render_dest_surface_state(ctx, 0); + gen9_subpic_render_src_surfaces_state(ctx, obj_surface); + gen9_render_sampler(ctx); + gen9_render_cc_viewport(ctx); + gen9_render_color_calc_state(ctx); + gen9_subpicture_render_blend_state(ctx); + gen9_subpic_render_upload_constants(ctx, obj_surface); + i965_subpic_render_upload_vertex(ctx, obj_surface, dst_rect); +} + +static void +gen9_render_put_subpicture( + VADriverContextP ctx, + struct object_surface *obj_surface, + const VARectangle *src_rect, + const VARectangle *dst_rect +) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = i965->batch; + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + + assert(obj_subpic); + gen9_render_initialize(ctx); + gen9_subpicture_render_setup_states(ctx, obj_surface, src_rect, dst_rect); + gen9_render_emit_states(ctx, PS_SUBPIC_KERNEL); + i965_render_upload_image_palette(ctx, obj_subpic->obj_image, 0xff); + intel_batchbuffer_flush(batch); +} + +static void +gen9_render_terminate(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + + dri_bo_unreference(render_state->vb.vertex_buffer); + render_state->vb.vertex_buffer = NULL; + + dri_bo_unreference(render_state->wm.surface_state_binding_table_bo); + render_state->wm.surface_state_binding_table_bo = NULL; + + if (render_state->instruction_state.bo) { + dri_bo_unreference(render_state->instruction_state.bo); + render_state->instruction_state.bo = NULL; + } + + if (render_state->dynamic_state.bo) { + dri_bo_unreference(render_state->dynamic_state.bo); + render_state->dynamic_state.bo = NULL; + } + + if (render_state->indirect_state.bo) { + dri_bo_unreference(render_state->indirect_state.bo); + render_state->indirect_state.bo = NULL; + } + + if (render_state->draw_region) { + dri_bo_unreference(render_state->draw_region->bo); + free(render_state->draw_region); + render_state->draw_region = NULL; + } +} + +bool +gen9_render_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + int i, kernel_size; + unsigned int kernel_offset, end_offset; + unsigned char *kernel_ptr; + struct i965_kernel *kernel; + + render_state->render_put_surface = gen9_render_put_surface; + render_state->render_put_subpicture = gen9_render_put_subpicture; + render_state->render_terminate = gen9_render_terminate; + + memcpy(render_state->render_kernels, render_kernels_gen9, + sizeof(render_state->render_kernels)); + + kernel_size = 4096; + + for (i = 0; i < NUM_RENDER_KERNEL; i++) { + kernel = &render_state->render_kernels[i]; + + if (!kernel->size) + continue; + + kernel_size += ALIGN(kernel->size, ALIGNMENT); + } + + render_state->instruction_state.bo = dri_bo_alloc(i965->intel.bufmgr, + "kernel shader", + kernel_size, + 0x1000); + if (render_state->instruction_state.bo == NULL) { + WARN_ONCE("failure to allocate the buffer space for kernel shader\n"); + return false; + } + + assert(render_state->instruction_state.bo); + + render_state->instruction_state.bo_size = kernel_size; + render_state->instruction_state.end_offset = 0; + end_offset = 0; + + dri_bo_map(render_state->instruction_state.bo, 1); + kernel_ptr = (unsigned char *)(render_state->instruction_state.bo->virtual); + for (i = 0; i < NUM_RENDER_KERNEL; i++) { + kernel = &render_state->render_kernels[i]; + kernel_offset = end_offset; + kernel->kernel_offset = kernel_offset; + + if (!kernel->size) + continue; + + memcpy(kernel_ptr + kernel_offset, kernel->bin, kernel->size); + + end_offset += ALIGN(kernel->size, ALIGNMENT); + } + + render_state->instruction_state.end_offset = end_offset; + + dri_bo_unmap(render_state->instruction_state.bo); + + return true; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vdenc.c intel-vaapi-driver-1.7.1/src/gen9_vdenc.c --- intel-vaapi-driver-1.0.15/src/gen9_vdenc.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vdenc.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,3778 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "i965_defines.h" +#include "i965_structs.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "i965_encoder_utils.h" +#include "intel_media.h" +#include "gen9_vdenc.h" + +static const uint8_t buf_rate_adj_tab_i_lowdelay[72] = { + 0, 0, -8, -12, -16, -20, -28, -36, + 0, 0, -4, -8, -12, -16, -24, -32, + 4, 2, 0, -1, -3, -8, -16, -24, + 8, 4, 2, 0, -1, -4, -8, -16, + 20, 16, 4, 0, -1, -4, -8, -16, + 24, 20, 16, 8, 4, 0, -4, -8, + 28, 24, 20, 16, 8, 4, 0, -8, + 32, 24, 20, 16, 8, 4, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, +}; + +static const uint8_t buf_rate_adj_tab_p_lowdelay[72] = { + -8, -24, -32, -40, -44, -48, -52, -80, + -8, -16, -32, -40, -40, -44, -44, -56, + 0, 0, -12, -20, -24, -28, -32, -36, + 8, 4, 0, 0, -8, -16, -24, -32, + 32, 16, 8, 4, -4, -8, -16, -20, + 36, 24, 16, 8, 4, -2, -4, -8, + 40, 36, 24, 20, 16, 8, 0, -8, + 48, 40, 28, 24, 20, 12, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, +}; + +static const uint8_t buf_rate_adj_tab_b_lowdelay[72] = { + 0, -4, -8, -16, -24, -32, -40, -48, + 1, 0, -4, -8, -16, -24, -32, -40, + 4, 2, 0, -1, -3, -8, -16, -24, + 8, 4, 2, 0, -1, -4, -8, -16, + 20, 16, 4, 0, -1, -4, -8, -16, + 24, 20, 16, 8, 4, 0, -4, -8, + 28, 24, 20, 16, 8, 4, 0, -8, + 32, 24, 20, 16, 8, 4, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, +}; + +static const int8_t dist_qp_adj_tab_i_vbr[81] = { + +0, 0, 0, 0, 0, 3, 4, 6, 8, + +0, 0, 0, 0, 0, 2, 3, 5, 7, + -1, 0, 0, 0, 0, 2, 2, 4, 5, + -1, -1, 0, 0, 0, 1, 2, 2, 4, + -2, -2, -1, 0, 0, 0, 1, 2, 4, + -2, -2, -1, 0, 0, 0, 1, 2, 4, + -3, -2, -1, -1, 0, 0, 1, 2, 5, + -3, -2, -1, -1, 0, 0, 2, 4, 7, + -4, -3, -2, -1, 0, 1, 3, 5, 8, +}; + +static const int8_t dist_qp_adj_tab_p_vbr[81] = { + -1, 0, 0, 0, 0, 1, 1, 2, 3, + -1, -1, 0, 0, 0, 1, 1, 2, 3, + -2, -1, -1, 0, 0, 1, 1, 2, 3, + -3, -2, -2, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, +}; + +static const int8_t dist_qp_adj_tab_b_vbr[81] = { + +0, 0, 0, 0, 0, 2, 3, 3, 4, + +0, 0, 0, 0, 0, 2, 3, 3, 4, + -1, 0, 0, 0, 0, 2, 2, 3, 3, + -1, -1, 0, 0, 0, 1, 2, 2, 2, + -1, -1, -1, 0, 0, 0, 1, 2, 2, + -2, -1, -1, 0, 0, 0, 0, 1, 2, + -2, -1, -1, -1, 0, 0, 0, 1, 3, + -2, -2, -1, -1, 0, 0, 1, 1, 3, + -2, -2, -1, -1, 0, 1, 1, 2, 4, +}; + +static const int8_t buf_rate_adj_tab_i_vbr[72] = { + -4, -20, -28, -36, -40, -44, -48, -80, + +0, -8, -12, -20, -24, -28, -32, -36, + +0, 0, -8, -16, -20, -24, -28, -32, + +8, 4, 0, 0, -8, -16, -24, -28, + 32, 24, 16, 2, -4, -8, -16, -20, + 36, 32, 28, 16, 8, 0, -4, -8, + 40, 36, 24, 20, 16, 8, 0, -8, + 48, 40, 28, 24, 20, 12, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, +}; + +static const int8_t buf_rate_adj_tab_p_vbr[72] = { + -8, -24, -32, -44, -48, -56, -64, -80, + -8, -16, -32, -40, -44, -52, -56, -64, + +0, 0, -16, -28, -36, -40, -44, -48, + +8, 4, 0, 0, -8, -16, -24, -36, + 20, 12, 4, 0, -8, -8, -8, -16, + 24, 16, 8, 8, 8, 0, -4, -8, + 40, 36, 24, 20, 16, 8, 0, -8, + 48, 40, 28, 24, 20, 12, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, +}; + +static const int8_t buf_rate_adj_tab_b_vbr[72] = { + 0, -4, -8, -16, -24, -32, -40, -48, + 1, 0, -4, -8, -16, -24, -32, -40, + 4, 2, 0, -1, -3, -8, -16, -24, + 8, 4, 2, 0, -1, -4, -8, -16, + 20, 16, 4, 0, -1, -4, -8, -16, + 24, 20, 16, 8, 4, 0, -4, -8, + 28, 24, 20, 16, 8, 4, 0, -8, + 32, 24, 20, 16, 8, 4, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, +}; + +static struct huc_brc_update_constant_data +gen9_brc_update_constant_data = { + .global_rate_qp_adj_tab_i = { + 48, 40, 32, 24, 16, 8, 0, -8, + 40, 32, 24, 16, 8, 0, -8, -16, + 32, 24, 16, 8, 0, -8, -16, -24, + 24, 16, 8, 0, -8, -16, -24, -32, + 16, 8, 0, -8, -16, -24, -32, -40, + 8, 0, -8, -16, -24, -32, -40, -48, + 0, -8, -16, -24, -32, -40, -48, -56, + 48, 40, 32, 24, 16, 8, 0, -8, + }, + + .global_rate_qp_adj_tab_p = { + 48, 40, 32, 24, 16, 8, 0, -8, + 40, 32, 24, 16, 8, 0, -8, -16, + 16, 8, 8, 4, -8, -16, -16, -24, + 8, 0, 0, -8, -16, -16, -16, -24, + 8, 0, 0, -24, -32, -32, -32, -48, + 0, -16, -16, -24, -32, -48, -56, -64, + -8, -16, -32, -32, -48, -48, -56, -64, + -16,-32, -48, -48, -48, -56, -64, -80, + }, + + .global_rate_qp_adj_tab_b = { + 48, 40, 32, 24, 16, 8, 0, -8, + 40, 32, 24, 16, 8, 0, -8, -16, + 32, 24, 16, 8, 0, -8, -16, -24, + 24, 16, 8, 0, -8, -8, -16, -24, + 16, 8, 0, 0, -8, -16, -24, -32, + 16, 8, 0, 0, -8, -16, -24, -32, + 0, -8, -8, -16, -32, -48, -56, -64, + 0, -8, -8, -16, -32, -48, -56, -64 + }, + + .dist_threshld_i = { 2, 4, 8, 12, 19, 32, 64, 128, 0, 0 }, + .dist_threshld_p = { 2, 4, 8, 12, 19, 32, 64, 128, 0, 0 }, + .dist_threshld_b = { 2, 4, 8, 12, 19, 32, 64, 128, 0, 0 }, + + .dist_qp_adj_tab_i = { + 0, 0, 0, 0, 0, 3, 4, 6, 8, + 0, 0, 0, 0, 0, 2, 3, 5, 7, + -1, 0, 0, 0, 0, 2, 2, 4, 5, + -1, -1, 0, 0, 0, 1, 2, 2, 4, + -2, -2, -1, 0, 0, 0, 1, 2, 4, + -2, -2, -1, 0, 0, 0, 1, 2, 4, + -3, -2, -1, -1, 0, 0, 1, 2, 5, + -3, -2, -1, -1, 0, 0, 2, 4, 7, + -4, -3, -2, -1, 0, 1, 3, 5, 8, + }, + + .dist_qp_adj_tab_p = { + -1, 0, 0, 0, 0, 1, 1, 2, 3, + -1, -1, 0, 0, 0, 1, 1, 2, 3, + -2, -1, -1, 0, 0, 1, 1, 2, 3, + -3, -2, -2, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + -3, -2, -1, -1, 0, 0, 1, 2, 3, + }, + + .dist_qp_adj_tab_b = { + 0, 0, 0, 0, 0, 2, 3, 3, 4, + 0, 0, 0, 0, 0, 2, 3, 3, 4, + -1, 0, 0, 0, 0, 2, 2, 3, 3, + -1, -1, 0, 0, 0, 1, 2, 2, 2, + -1, -1, -1, 0, 0, 0, 1, 2, 2, + -2, -1, -1, 0, 0, 0, 0, 1, 2, + -2, -1, -1, -1, 0, 0, 0, 1, 3, + -2, -2, -1, -1, 0, 0, 1, 1, 3, + -2, -2, -1, -1, 0, 1, 1, 2, 4, + }, + + /* default table for non lowdelay */ + .buf_rate_adj_tab_i = { + -4, -20, -28, -36, -40, -44, -48, -80, + 0, -8, -12, -20, -24, -28, -32, -36, + 0, 0, -8, -16, -20, -24, -28, -32, + 8, 4, 0, 0, -8, -16, -24, -28, + 32, 24, 16, 2, -4, -8, -16, -20, + 36, 32, 28, 16, 8, 0, -4, -8, + 40, 36, 24, 20, 16, 8, 0, -8, + 48, 40, 28, 24, 20, 12, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, + }, + + /* default table for non lowdelay */ + .buf_rate_adj_tab_p = { + -8, -24, -32, -44, -48, -56, -64, -80, + -8, -16, -32, -40, -44, -52, -56, -64, + 0, 0, -16, -28, -36, -40, -44, -48, + 8, 4, 0, 0, -8, -16, -24, -36, + 20, 12, 4, 0, -8, -8, -8, -16, + 24, 16, 8, 8, 8, 0, -4, -8, + 40, 36, 24, 20, 16, 8, 0, -8, + 48, 40, 28, 24, 20, 12, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, + }, + + /* default table for non lowdelay */ + .buf_rate_adj_tab_b = { + 0, -4, -8, -16, -24, -32, -40, -48, + 1, 0, -4, -8, -16, -24, -32, -40, + 4, 2, 0, -1, -3, -8, -16, -24, + 8, 4, 2, 0, -1, -4, -8, -16, + 20, 16, 4, 0, -1, -4, -8, -16, + 24, 20, 16, 8, 4, 0, -4, -8, + 28, 24, 20, 16, 8, 4, 0, -8, + 32, 24, 20, 16, 8, 4, 0, -4, + 64, 48, 28, 20, 16, 12, 8, 4, + }, + + .frame_size_min_tab_p = { 1, 2, 4, 6, 8, 10, 16, 16, 16 }, + .frame_size_min_tab_i = { 1, 2, 4, 8, 16, 20, 24, 32, 36 }, + + .frame_size_max_tab_p = { 48, 64, 80, 96, 112, 128, 144, 160, 160 }, + .frame_size_max_tab_i = { 48, 64, 80, 96, 112, 128, 144, 160, 160 }, + + .frame_size_scg_tab_p = { 4, 8, 12, 16, 20, 24, 24, 0, 0 }, + .frame_size_scg_tab_i = { 4, 8, 12, 16, 20, 24, 24, 0, 0 }, + + .i_intra_non_pred = { + 0x0e, 0x0e, 0x0e, 0x18, 0x19, 0x1b, 0x1c, 0x0d, 0x0f, 0x18, 0x19, 0x0d, 0x0f, 0x0f, + 0x0c, 0x0e, 0x0c, 0x0c, 0x0a, 0x0a, 0x0b, 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x07, 0x07, 0x07, 0x07, 0x07, + }, + + .i_intra_16x16 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }, + + .i_intra_8x8 = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x04, 0x04, 0x04, 0x04, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x07, 0x07, 0x07, 0x07, 0x07, + }, + + .i_intra_4x4 = { + 0x2e, 0x2e, 0x2e, 0x38, 0x39, 0x3a, 0x3b, 0x2c, 0x2e, 0x38, 0x39, 0x2d, 0x2f, 0x38, + 0x2e, 0x38, 0x2e, 0x38, 0x2f, 0x2e, 0x38, 0x38, 0x38, 0x38, 0x2f, 0x2f, 0x2f, 0x2e, + 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x1e, 0x1c, 0x1b, 0x1a, 0x19, 0x18, 0x0e, 0x0d, + }, + + .i_intra_chroma = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }, + + .p_intra_non_pred = { + 0x06, 0x06, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x05, 0x06, 0x07, 0x08, 0x06, 0x07, 0x07, + 0x07, 0x07, 0x06, 0x07, 0x07, 0x06, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + }, + + .p_intra_16x16 = { + 0x1b, 0x1b, 0x1b, 0x1c, 0x1e, 0x28, 0x29, 0x1a, 0x1b, 0x1c, 0x1e, 0x1a, 0x1c, 0x1d, + 0x1b, 0x1c, 0x1c, 0x1c, 0x1c, 0x1b, 0x1c, 0x1c, 0x1d, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, + 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c + }, + + .p_intra_8x8 = { + 0x1d, 0x1d, 0x1d, 0x1e, 0x28, 0x29, 0x2a, 0x1b, 0x1d, 0x1e, 0x28, 0x1c, 0x1d, 0x1f, + 0x1d, 0x1e, 0x1d, 0x1e, 0x1d, 0x1d, 0x1f, 0x1e, 0x1e, 0x1e, 0x1d, 0x1e, 0x1e, 0x1d, + 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, + }, + + .p_intra_4x4 = { + 0x38, 0x38, 0x38, 0x39, 0x3a, 0x3b, 0x3d, 0x2e, 0x38, 0x39, 0x3a, 0x2f, 0x39, 0x3a, + 0x38, 0x39, 0x38, 0x39, 0x39, 0x38, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, + 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, + }, + + .p_intra_chroma = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }, + + .p_inter_16x8 = { + 0x07, 0x07, 0x07, 0x08, 0x09, 0x0b, 0x0c, 0x06, 0x07, 0x09, 0x0a, 0x07, 0x08, 0x09, + 0x08, 0x09, 0x08, 0x09, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, + }, + + .p_inter_8x8 = { + 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x02, 0x02, 0x02, 0x03, 0x02, 0x02, 0x02, + 0x02, 0x03, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + }, + + .p_inter_16x16 = { + 0x05, 0x05, 0x05, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + }, + + .p_ref_id = { + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 + }, + + .hme_mv_cost = { + /* mv = 0 */ + { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }, + + /* mv <= 16 */ + { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }, + + /* mv <= 32 */ + { + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + }, + + /* mv <= 64 */ + { + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + }, + + /* mv <= 128 */ + { + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, + }, + + /* mv <= 256 */ + { + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x1f, 0x2a, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d + }, + + /* mv <= 512 */ + { + 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, + 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, + 0x1a, 0x1a, 0x1a, 0x1a, 0x2a, 0x2f, 0x3a, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, + }, + + /* mv <= 1024 */ + { + 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, + 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, + 0x1a, 0x1a, 0x1a, 0x1f, 0x2d, 0x3d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, + }, + }, +}; + +/* 11 DWs */ +static uint8_t vdenc_const_qp_lambda[44] = { + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, + 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x07, + 0x07, 0x08, 0x09, 0x0a, 0x0c, 0x0d, 0x0f, 0x11, 0x13, 0x15, + 0x17, 0x1a, 0x1e, 0x21, 0x25, 0x2a, 0x2f, 0x35, 0x3b, 0x42, + 0x4a, 0x53, 0x00, 0x00 +}; + +/* 14 DWs */ +static uint16_t vdenc_const_skip_threshold[28] = { + +}; + +/* 14 DWs */ +static uint16_t vdenc_const_sic_forward_transform_coeff_threshold_0[28] = { + +}; + +/* 7 DWs */ +static uint8_t vdenc_const_sic_forward_transform_coeff_threshold_1[28] = { + +}; + +/* 7 DWs */ +static uint8_t vdenc_const_sic_forward_transform_coeff_threshold_2[28] = { + +}; + +/* 7 DWs */ +static uint8_t vdenc_const_sic_forward_transform_coeff_threshold_3[28] = { + +}; + +/* P frame */ +/* 11 DWs */ +static uint8_t vdenc_const_qp_lambda_p[44] = { + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, + 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x07, + 0x07, 0x08, 0x09, 0x0a, 0x0c, 0x0d, 0x0f, 0x11, 0x13, 0x15, + 0x17, 0x1a, 0x1e, 0x21, 0x25, 0x2a, 0x2f, 0x35, 0x3b, 0x42, + 0x4a, 0x53, 0x00, 0x00 +}; + +/* 14 DWs */ +static uint16_t vdenc_const_skip_threshold_p[28] = { + 0x0000, 0x0000, 0x0000, 0x0000, 0x0002, 0x0004, 0x0007, 0x000b, + 0x0011, 0x0019, 0x0023, 0x0032, 0x0044, 0x005b, 0x0077, 0x0099, + 0x00c2, 0x00f1, 0x0128, 0x0168, 0x01b0, 0x0201, 0x025c, 0x02c2, + 0x0333, 0x03b0, 0x0000, 0x0000 +}; + +/* 14 DWs */ +static uint16_t vdenc_const_sic_forward_transform_coeff_threshold_0_p[28] = { + 0x02, 0x02, 0x03, 0x04, 0x04, 0x05, 0x07, 0x09, 0x0b, 0x0e, + 0x12, 0x14, 0x18, 0x1d, 0x20, 0x25, 0x2a, 0x34, 0x39, 0x3f, + 0x4e, 0x51, 0x5b, 0x63, 0x6f, 0x7f, 0x00, 0x00 +}; + +/* 7 DWs */ +static uint8_t vdenc_const_sic_forward_transform_coeff_threshold_1_p[28] = { + 0x03, 0x04, 0x05, 0x05, 0x07, 0x09, 0x0b, 0x0e, 0x12, 0x17, + 0x1c, 0x21, 0x27, 0x2c, 0x33, 0x3b, 0x41, 0x51, 0x5c, 0x1a, + 0x1e, 0x21, 0x22, 0x26, 0x2c, 0x30, 0x00, 0x00 +}; + +/* 7 DWs */ +static uint8_t vdenc_const_sic_forward_transform_coeff_threshold_2_p[28] = { + 0x02, 0x02, 0x03, 0x04, 0x04, 0x05, 0x07, 0x09, 0x0b, 0x0e, + 0x12, 0x14, 0x18, 0x1d, 0x20, 0x25, 0x2a, 0x34, 0x39, 0x0f, + 0x13, 0x14, 0x16, 0x18, 0x1b, 0x1f, 0x00, 0x00 +}; + +/* 7 DWs */ +static uint8_t vdenc_const_sic_forward_transform_coeff_threshold_3_p[28] = { + 0x04, 0x05, 0x06, 0x09, 0x0b, 0x0d, 0x12, 0x16, 0x1b, 0x23, + 0x2c, 0x33, 0x3d, 0x45, 0x4f, 0x5b, 0x66, 0x7f, 0x8e, 0x2a, + 0x2f, 0x32, 0x37, 0x3c, 0x45, 0x4c, 0x00, 0x00 +}; + +static const double +vdenc_brc_dev_threshi0_fp_neg[4] = { 0.80, 0.60, 0.34, 0.2 }; + +static const double +vdenc_brc_dev_threshi0_fp_pos[4] = { 0.2, 0.4, 0.66, 0.9 }; + +static const double +vdenc_brc_dev_threshpb0_fp_neg[4] = { 0.90, 0.66, 0.46, 0.3 }; + +static const double +vdenc_brc_dev_threshpb0_fp_pos[4] = { 0.3, 0.46, 0.70, 0.90 }; + +static const double +vdenc_brc_dev_threshvbr0_neg[4] = { 0.90, 0.70, 0.50, 0.3 }; + +static const double +vdenc_brc_dev_threshvbr0_pos[4] = { 0.4, 0.5, 0.75, 0.90 }; + +static const unsigned char +vdenc_brc_estrate_thresh_p0[7] = { 4, 8, 12, 16, 20, 24, 28 }; + +static const unsigned char +vdenc_brc_estrate_thresh_i0[7] = { 4, 8, 12, 16, 20, 24, 28 }; + +static const uint16_t +vdenc_brc_start_global_adjust_frame[4] = { 10, 50, 100, 150 }; + +static const uint8_t +vdenc_brc_global_rate_ratio_threshold[7] = { 80, 90, 95, 101, 105, 115, 130}; + +static const uint8_t +vdenc_brc_start_global_adjust_mult[5] = { 1, 1, 3, 2, 1 }; + +static const uint8_t +vdenc_brc_start_global_adjust_div[5] = { 40, 5, 5, 3, 1 }; + +static const int8_t +vdenc_brc_global_rate_ratio_threshold_qp[8] = { -3, -2, -1, 0, 1, 1, 2, 3 }; + +const int vdenc_mode_const[2][12][52] = { + //INTRASLICE + { + //LUTMODE_INTRA_NONPRED + { + 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, //QP=[0 ~12] + 16, 18, 22, 24, 13, 15, 16, 18, 13, 15, 15, 12, 14, //QP=[13~25] + 12, 12, 10, 10, 11, 10, 10, 10, 9, 9, 8, 8, 8, //QP=[26~38] + 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, //QP=[39~51] + }, + + //LUTMODE_INTRA_16x16, LUTMODE_INTRA + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[0 ~12] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[13~25] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[26~38] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[39~51] + }, + + //LUTMODE_INTRA_8x8 + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[0 ~12] + 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, //QP=[13~25] + 1, 1, 1, 1, 1, 4, 4, 4, 4, 6, 6, 6, 6, //QP=[26~38] + 6, 6, 6, 6, 6, 6, 6, 6, 7, 7, 7, 7, 7, //QP=[39~51] + }, + + //LUTMODE_INTRA_4x4 + { + 56, 56, 56, 56, 56, 56, 56, 56, 56, 56, 56, 56, 56, //QP=[0 ~12] + 64, 72, 80, 88, 48, 56, 64, 72, 53, 59, 64, 56, 64, //QP=[13~25] + 57, 64, 58, 55, 64, 64, 64, 64, 59, 59, 60, 57, 50, //QP=[26~38] + 46, 42, 38, 34, 31, 27, 23, 22, 19, 18, 16, 14, 13, //QP=[39~51] + }, + + //LUTMODE_INTER_16x8, LUTMODE_INTER_8x16 + { 0, }, + + //LUTMODE_INTER_8X8Q + { 0, }, + + //LUTMODE_INTER_8X4Q, LUTMODE_INTER_4X8Q, LUTMODE_INTER_16x8_FIELD + { 0, }, + + //LUTMODE_INTER_4X4Q, LUTMODE_INTER_8X8_FIELD + { 0, }, + + //LUTMODE_INTER_16x16, LUTMODE_INTER + { 0, }, + + //LUTMODE_INTER_BWD + { 0, }, + + //LUTMODE_REF_ID + { 0, }, + + //LUTMODE_INTRA_CHROMA + { 0, }, + }, + + //PREDSLICE + { + //LUTMODE_INTRA_NONPRED + { + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, //QP=[0 ~12] + 7, 8, 9, 10, 5, 6, 7, 8, 6, 7, 7, 7, 7, //QP=[13~25] + 6, 7, 7, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7, //QP=[26~38] + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, //QP=[39~51] + }, + + //LUTMODE_INTRA_16x16, LUTMODE_INTRA + { + 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, + 24, 28, 31, 35, 19, 21, 24, 28, 20, 24, 25, 21, 24, + 24, 24, 24, 21, 24, 24, 26, 24, 24, 24, 24, 24, 24, + 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, + + }, + + //LUTMODE_INTRA_8x8 + { + 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, //QP=[0 ~12] + 28, 32, 36, 40, 22, 26, 28, 32, 24, 26, 30, 26, 28, //QP=[13~25] + 26, 28, 26, 26, 30, 28, 28, 28, 26, 28, 28, 26, 28, //QP=[26~38] + 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, //QP=[39~51] + }, + + //LUTMODE_INTRA_4x4 + { + 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, //QP=[0 ~12] + 72, 80, 88, 104, 56, 64, 72, 80, 58, 68, 76, 64, 68, //QP=[13~25] + 64, 68, 68, 64, 70, 70, 70, 70, 68, 68, 68, 68, 68, //QP=[26~38] + 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, 68, //QP=[39~51] + }, + + //LUTMODE_INTER_16x8, LUTMODE_INTER_8x16 + { + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, //QP=[0 ~12] + 8, 9, 11, 12, 6, 7, 9, 10, 7, 8, 9, 8, 9, //QP=[13~25] + 8, 9, 8, 8, 9, 9, 9, 9, 8, 8, 8, 8, 8, //QP=[26~38] + 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, //QP=[39~51] + }, + + //LUTMODE_INTER_8X8Q + { + 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, //QP=[0 ~12] + 2, 3, 3, 3, 2, 2, 2, 3, 2, 2, 2, 2, 3, //QP=[13~25] + 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //QP=[26~38] + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, //QP=[39~51] + }, + + //LUTMODE_INTER_8X4Q, LUTMODE_INTER_4X8Q, LUTMODE_INTER_16X8_FIELD + { + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[0 ~12] + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[13~25] + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[26~38] + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[39~51] + }, + + //LUTMODE_INTER_4X4Q, LUTMODE_INTER_8x8_FIELD + { + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, //QP=[0 ~12] + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, //QP=[13~25] + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, //QP=[26~38] + 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, //QP=[39~51] + }, + + //LUTMODE_INTER_16x16, LUTMODE_INTER + { + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[0 ~12] + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, //QP=[13~25] + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, //QP=[26~38] + 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, //QP=[39~51] + }, + + //LUTMODE_INTER_BWD + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[0 ~12] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[13~25] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[26~38] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[39~51] + }, + + //LUTMODE_REF_ID + { + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, //QP=[0 ~12] + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, //QP=[13~25] + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, //QP=[26~38] + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, //QP=[39~51] + }, + + //LUTMODE_INTRA_CHROMA + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[0 ~12] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[13~25] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[26~38] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[39~51] + }, + }, +}; + +const int vdenc_mv_cost_skipbias_qpel[8] = { + //PREDSLICE + 0, 6, 6, 9, 10, 13, 14, 16 +}; + +const int vdenc_hme_cost[8][52] = { + //mv=0 + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[0 ~12] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[13 ~25] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[26 ~38] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[39 ~51] + }, + //mv<=16 + { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[0 ~12] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[13 ~25] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[26 ~38] + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //QP=[39 ~51] + }, + //mv<=32 + { + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, //QP=[0 ~12] + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, //QP=[13 ~25] + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, //QP=[26 ~38] + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, //QP=[39 ~51] + }, + //mv<=64 + { + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[0 ~12] + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[13 ~25] + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[26 ~38] + 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, //QP=[39 ~51] + }, + //mv<=128 + { + 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, //QP=[0 ~12] + 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, //QP=[13 ~25] + 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, //QP=[26 ~38] + 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, //QP=[39 ~51] + }, + //mv<=256 + { + 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, //QP=[0 ~12] + 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, //QP=[13 ~25] + 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, //QP=[26 ~38] + 10, 10, 10, 10, 20, 30, 40, 50, 50, 50, 50, 50, 50, //QP=[39 ~51] + }, + //mv<=512 + { + 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, //QP=[0 ~12] + 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, //QP=[13 ~25] + 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, //QP=[26 ~38] + 20, 20, 20, 40, 60, 80, 100, 100, 100, 100, 100, 100, 100, //QP=[39 ~51] + }, + + //mv<=1024 + { + 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, //QP=[0 ~12] + 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, //QP=[13 ~25] + 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, //QP=[26 ~38] + 20, 20, 30, 50, 100, 200, 200, 200, 200, 200, 200, 200, 200, //QP=[39 ~51] + }, +}; + +#define OUT_BUFFER_2DW(batch, bo, is_target, delta) do { \ + if (bo) { \ + OUT_BCS_RELOC64(batch, \ + bo, \ + I915_GEM_DOMAIN_RENDER, \ + is_target ? I915_GEM_DOMAIN_RENDER : 0, \ + delta); \ + } else { \ + OUT_BCS_BATCH(batch, 0); \ + OUT_BCS_BATCH(batch, 0); \ + } \ + } while (0) + +#define OUT_BUFFER_3DW(batch, bo, is_target, delta, attr) do { \ + OUT_BUFFER_2DW(batch, bo, is_target, delta); \ + OUT_BCS_BATCH(batch, attr); \ + } while (0) + +#define ALLOC_VDENC_BUFFER_RESOURCE(buffer, bfsize, des) { \ + buffer.type = I965_GPE_RESOURCE_BUFFER; \ + buffer.width = bfsize; \ + buffer.height = 1; \ + buffer.pitch = buffer.width; \ + buffer.size = buffer.pitch; \ + buffer.tiling = I915_TILING_NONE; \ + i965_allocate_gpe_resource(i965->intel.bufmgr, \ + &buffer, \ + bfsize, \ + (des)); \ + } while (0) + +static int +gen9_vdenc_get_max_vmv_range(int level) +{ + int max_vmv_range = 512; + + if (level == 10) + max_vmv_range = 256; + else if (level <= 20) + max_vmv_range = 512; + else if (level <= 30) + max_vmv_range = 1024; + else + max_vmv_range = 2048; + + return max_vmv_range; +} + +static unsigned char +map_44_lut_value(unsigned int v, unsigned char max) +{ + unsigned int maxcost; + int d; + unsigned char ret; + + if (v == 0) { + return 0; + } + + maxcost = ((max & 15) << (max >> 4)); + + if (v >= maxcost) { + return max; + } + + d = (int)(log((double)v) / log(2.0)) - 3; + + if (d < 0) { + d = 0; + } + + ret = (unsigned char)((d << 4) + (int)((v + (d == 0 ? 0 : (1 << (d - 1)))) >> d)); + ret = (ret & 0xf) == 0 ? (ret | 8) : ret; + + return ret; +} + +static void +gen9_vdenc_update_rate_control_parameters(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncMiscParameterRateControl *misc) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + + vdenc_context->max_bit_rate = ALIGN(misc->bits_per_second, 1000) / 1000; + vdenc_context->mb_brc_enabled = 0; + + if (vdenc_context->internal_rate_mode == I965_BRC_CBR) { + vdenc_context->min_bit_rate = vdenc_context->max_bit_rate; + vdenc_context->mb_brc_enabled = (misc->rc_flags.bits.mb_rate_control < 2); + + if (vdenc_context->target_bit_rate != vdenc_context->max_bit_rate) { + vdenc_context->target_bit_rate = vdenc_context->max_bit_rate; + vdenc_context->brc_need_reset = 1; + } + } else if (vdenc_context->internal_rate_mode == I965_BRC_VBR) { + vdenc_context->min_bit_rate = vdenc_context->max_bit_rate * (2 * misc->target_percentage - 100) / 100; + vdenc_context->mb_brc_enabled = (misc->rc_flags.bits.mb_rate_control < 2); + + if (vdenc_context->target_bit_rate != vdenc_context->max_bit_rate * misc->target_percentage / 100) { + vdenc_context->target_bit_rate = vdenc_context->max_bit_rate * misc->target_percentage / 100; + vdenc_context->brc_need_reset = 1; + } + } +} + +static void +gen9_vdenc_update_hrd_parameters(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncMiscParameterHRD *misc) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + + if (vdenc_context->internal_rate_mode == I965_BRC_CQP) + return; + + vdenc_context->vbv_buffer_size_in_bit = misc->buffer_size; + vdenc_context->init_vbv_buffer_fullness_in_bit = misc->initial_buffer_fullness; +} + +static void +gen9_vdenc_update_framerate_parameters(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncMiscParameterFrameRate *misc) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + + vdenc_context->frames_per_100s = misc->framerate; /* misc->framerate is multiple of 100 */ +} + +static void +gen9_vdenc_update_roi_parameters(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + VAEncMiscParameterBufferROI *misc) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + int i; + + if (!misc || !misc->roi) { + vdenc_context->num_roi = 0; + return; + } + + vdenc_context->num_roi = MIN(misc->num_roi, 3); + vdenc_context->max_delta_qp = misc->max_delta_qp; + vdenc_context->min_delta_qp = misc->min_delta_qp; + vdenc_context->vdenc_streamin_enable = (vdenc_context->num_roi == 0); + + for (i = 0; i < vdenc_context->num_roi; i++) { + vdenc_context->roi[i].left = misc->roi->roi_rectangle.x; + vdenc_context->roi[i].right = vdenc_context->roi[i].left + misc->roi->roi_rectangle.width; + vdenc_context->roi[i].top = misc->roi->roi_rectangle.y; + vdenc_context->roi[i].bottom = vdenc_context->roi[i].top + misc->roi->roi_rectangle.height; + vdenc_context->roi[i].value = misc->roi->roi_value; + + vdenc_context->roi[i].left /= 16; + vdenc_context->roi[i].right /= 16; + vdenc_context->roi[i].top /= 16; + vdenc_context->roi[i].bottom /= 16; + } +} + +static void +gen9_vdenc_update_misc_parameters(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + int i; + VAEncMiscParameterBuffer *misc_param; + + for (i = 0; i < ARRAY_ELEMS(encode_state->misc_param); i++) { + if (!encode_state->misc_param[i] || !encode_state->misc_param[i]->buffer) + continue; + + misc_param = (VAEncMiscParameterBuffer *)encode_state->misc_param[i]->buffer; + + switch (misc_param->type) { + case VAEncMiscParameterTypeFrameRate: + gen9_vdenc_update_framerate_parameters(ctx, + encoder_context, + (VAEncMiscParameterFrameRate *)misc_param->data); + break; + + case VAEncMiscParameterTypeRateControl: + gen9_vdenc_update_rate_control_parameters(ctx, + encoder_context, + (VAEncMiscParameterRateControl *)misc_param->data); + break; + + case VAEncMiscParameterTypeHRD: + gen9_vdenc_update_hrd_parameters(ctx, + encoder_context, + (VAEncMiscParameterHRD *)misc_param->data); + break; + + case VAEncMiscParameterTypeROI: + gen9_vdenc_update_roi_parameters(ctx, + encoder_context, + (VAEncMiscParameterBufferROI *)misc_param->data); + break; + + default: + break; + } + } +} + +static void +gen9_vdenc_update_parameters(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *seq_param = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + + if (profile == VAProfileH264High) + vdenc_context->transform_8x8_mode_enable = !!pic_param->pic_fields.bits.transform_8x8_mode_flag; + else + vdenc_context->transform_8x8_mode_enable = 0; + + vdenc_context->frame_width_in_mbs = seq_param->picture_width_in_mbs; + vdenc_context->frame_height_in_mbs = seq_param->picture_height_in_mbs; + + vdenc_context->frame_width = vdenc_context->frame_width_in_mbs * 16; + vdenc_context->frame_height = vdenc_context->frame_height_in_mbs * 16; + + vdenc_context->down_scaled_width_in_mb4x = WIDTH_IN_MACROBLOCKS(vdenc_context->frame_width / SCALE_FACTOR_4X); + vdenc_context->down_scaled_height_in_mb4x = HEIGHT_IN_MACROBLOCKS(vdenc_context->frame_height / SCALE_FACTOR_4X); + vdenc_context->down_scaled_width_4x = vdenc_context->down_scaled_width_in_mb4x * 16; + vdenc_context->down_scaled_height_4x = ((vdenc_context->down_scaled_height_in_mb4x + 1) >> 1) * 16; + vdenc_context->down_scaled_height_4x = ALIGN(vdenc_context->down_scaled_height_4x, 32) << 1; + + if (vdenc_context->internal_rate_mode == I965_BRC_CBR) { + vdenc_context->target_bit_rate = ALIGN(seq_param->bits_per_second, 1000) / 1000; + vdenc_context->max_bit_rate = ALIGN(seq_param->bits_per_second, 1000) / 1000; + vdenc_context->min_bit_rate = ALIGN(seq_param->bits_per_second, 1000) / 1000; + } + + vdenc_context->init_vbv_buffer_fullness_in_bit = seq_param->bits_per_second; + vdenc_context->vbv_buffer_size_in_bit = (uint64_t)seq_param->bits_per_second << 1; + vdenc_context->frames_per_100s = 3000; /* 30fps */ + vdenc_context->gop_size = seq_param->intra_period; + vdenc_context->ref_dist = seq_param->ip_period; + vdenc_context->vdenc_streamin_enable = 0; + + gen9_vdenc_update_misc_parameters(ctx, encode_state, encoder_context); + + vdenc_context->current_pass = 0; + vdenc_context->num_passes = 1; + + if (vdenc_context->internal_rate_mode == I965_BRC_CBR || + vdenc_context->internal_rate_mode == I965_BRC_VBR) + vdenc_context->brc_enabled = 1; + else + vdenc_context->brc_enabled = 0; + + if (vdenc_context->brc_enabled && + (!vdenc_context->init_vbv_buffer_fullness_in_bit || + !vdenc_context->vbv_buffer_size_in_bit || + !vdenc_context->max_bit_rate || + !vdenc_context->target_bit_rate || + !vdenc_context->frames_per_100s)) + vdenc_context->brc_enabled = 0; + + if (!vdenc_context->brc_enabled) { + vdenc_context->target_bit_rate = 0; + vdenc_context->max_bit_rate = 0; + vdenc_context->min_bit_rate = 0; + vdenc_context->init_vbv_buffer_fullness_in_bit = 0; + vdenc_context->vbv_buffer_size_in_bit = 0; + } else { + vdenc_context->num_passes = NUM_OF_BRC_PAK_PASSES; + } +} + +static void +gen9_vdenc_avc_calculate_mode_cost(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int qp) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + unsigned int frame_type = vdenc_context->frame_type; + + memset(vdenc_context->mode_cost, 0, sizeof(vdenc_context->mode_cost)); + memset(vdenc_context->mv_cost, 0, sizeof(vdenc_context->mv_cost)); + memset(vdenc_context->hme_mv_cost, 0, sizeof(vdenc_context->hme_mv_cost)); + + vdenc_context->mode_cost[VDENC_LUTMODE_INTRA_NONPRED] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTRA_NONPRED][qp]), 0x6f); + vdenc_context->mode_cost[VDENC_LUTMODE_INTRA_16x16] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTRA_16x16][qp]), 0x8f); + vdenc_context->mode_cost[VDENC_LUTMODE_INTRA_8x8] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTRA_8x8][qp]), 0x8f); + vdenc_context->mode_cost[VDENC_LUTMODE_INTRA_4x4] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTRA_4x4][qp]), 0x8f); + + if (frame_type == VDENC_FRAME_P) { + vdenc_context->mode_cost[VDENC_LUTMODE_INTER_16x16] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTER_16x16][qp]), 0x8f); + vdenc_context->mode_cost[VDENC_LUTMODE_INTER_16x8] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTER_16x8][qp]), 0x8f); + vdenc_context->mode_cost[VDENC_LUTMODE_INTER_8X8Q] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTER_8X8Q][qp]), 0x6f); + vdenc_context->mode_cost[VDENC_LUTMODE_INTER_8X4Q] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTER_8X4Q][qp]), 0x6f); + vdenc_context->mode_cost[VDENC_LUTMODE_INTER_4X4Q] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_INTER_4X4Q][qp]), 0x6f); + vdenc_context->mode_cost[VDENC_LUTMODE_REF_ID] = map_44_lut_value((uint32_t)(vdenc_mode_const[frame_type][VDENC_LUTMODE_REF_ID][qp]), 0x6f); + + vdenc_context->mv_cost[0] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[0]), 0x6f); + vdenc_context->mv_cost[1] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[1]), 0x6f); + vdenc_context->mv_cost[2] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[2]), 0x6f); + vdenc_context->mv_cost[3] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[3]), 0x6f); + vdenc_context->mv_cost[4] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[4]), 0x6f); + vdenc_context->mv_cost[5] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[5]), 0x6f); + vdenc_context->mv_cost[6] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[6]), 0x6f); + vdenc_context->mv_cost[7] = map_44_lut_value((uint32_t)(vdenc_mv_cost_skipbias_qpel[7]), 0x6f); + + vdenc_context->hme_mv_cost[0] = map_44_lut_value((uint32_t)(vdenc_hme_cost[0][qp]), 0x6f); + vdenc_context->hme_mv_cost[1] = map_44_lut_value((uint32_t)(vdenc_hme_cost[1][qp]), 0x6f); + vdenc_context->hme_mv_cost[2] = map_44_lut_value((uint32_t)(vdenc_hme_cost[2][qp]), 0x6f); + vdenc_context->hme_mv_cost[3] = map_44_lut_value((uint32_t)(vdenc_hme_cost[3][qp]), 0x6f); + vdenc_context->hme_mv_cost[4] = map_44_lut_value((uint32_t)(vdenc_hme_cost[4][qp]), 0x6f); + vdenc_context->hme_mv_cost[5] = map_44_lut_value((uint32_t)(vdenc_hme_cost[5][qp]), 0x6f); + vdenc_context->hme_mv_cost[6] = map_44_lut_value((uint32_t)(vdenc_hme_cost[6][qp]), 0x6f); + vdenc_context->hme_mv_cost[7] = map_44_lut_value((uint32_t)(vdenc_hme_cost[7][qp]), 0x6f); + } +} + +static void +gen9_vdenc_update_roi_in_streamin_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct gen9_vdenc_streamin_state *streamin_state; + int row, col, i; + + if (!vdenc_context->num_roi) + return; + + streamin_state = (struct gen9_vdenc_streamin_state *)i965_map_gpe_resource(&vdenc_context->vdenc_streamin_res); + + if (!streamin_state) + return; + + for (col = 0; col < vdenc_context->frame_width_in_mbs; col++) { + for (row = 0; row < vdenc_context->frame_height_in_mbs; row++) { + streamin_state[row * vdenc_context->frame_width_in_mbs + col].dw0.roi_selection = 0; /* non-ROI region */ + + /* The last one has higher priority */ + for (i = vdenc_context->num_roi - 1; i >= 0; i--) { + if ((col >= vdenc_context->roi[i].left && col <= vdenc_context->roi[i].right) && + (row >= vdenc_context->roi[i].top && row <= vdenc_context->roi[i].bottom)) { + streamin_state[row * vdenc_context->frame_width_in_mbs + col].dw0.roi_selection = i + 1; + + break; + } + } + } + } + + i965_unmap_gpe_resource(&vdenc_context->vdenc_streamin_res); +} + +static VAStatus +gen9_vdenc_avc_prepare(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct i965_coded_buffer_segment *coded_buffer_segment; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + VAEncPictureParameterBufferH264 *pic_param; + VAEncSliceParameterBufferH264 *slice_param; + VDEncAvcSurface *vdenc_avc_surface; + dri_bo *bo; + int i, j, enable_avc_ildb = 0; + int qp; + char *pbuffer; + + gen9_vdenc_update_parameters(ctx, profile, encode_state, encoder_context); + + for (j = 0; j < encode_state->num_slice_params_ext && enable_avc_ildb == 0; j++) { + assert(encode_state->slice_params_ext && encode_state->slice_params_ext[j]->buffer); + slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[j]->buffer; + + for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) { + assert((slice_param->slice_type == SLICE_TYPE_I) || + (slice_param->slice_type == SLICE_TYPE_SI) || + (slice_param->slice_type == SLICE_TYPE_P) || + (slice_param->slice_type == SLICE_TYPE_SP) || + (slice_param->slice_type == SLICE_TYPE_B)); + + if (slice_param->disable_deblocking_filter_idc != 1) { + enable_avc_ildb = 1; + break; + } + + slice_param++; + } + } + + /* Setup current frame */ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + if (obj_surface->private_data == NULL) { + vdenc_avc_surface = calloc(sizeof(VDEncAvcSurface), 1); + assert(vdenc_avc_surface); + + vdenc_avc_surface->ctx = ctx; + i965_CreateSurfaces(ctx, + vdenc_context->down_scaled_width_4x, + vdenc_context->down_scaled_height_4x, + VA_RT_FORMAT_YUV420, + 1, + &vdenc_avc_surface->scaled_4x_surface_id); + vdenc_avc_surface->scaled_4x_surface_obj = SURFACE(vdenc_avc_surface->scaled_4x_surface_id); + assert(vdenc_avc_surface->scaled_4x_surface_obj); + i965_check_alloc_surface_bo(ctx, + vdenc_avc_surface->scaled_4x_surface_obj, + 1, + VA_FOURCC_NV12, + SUBSAMPLE_YUV420); + + obj_surface->private_data = (void *)vdenc_avc_surface; + obj_surface->free_private_data = (void *)vdenc_free_avc_surface; + } + + vdenc_avc_surface = (VDEncAvcSurface *)obj_surface->private_data; + assert(vdenc_avc_surface->scaled_4x_surface_obj); + + /* Reconstructed surfaces */ + i965_free_gpe_resource(&vdenc_context->recon_surface_res); + i965_free_gpe_resource(&vdenc_context->scaled_4x_recon_surface_res); + i965_free_gpe_resource(&vdenc_context->post_deblocking_output_res); + i965_free_gpe_resource(&vdenc_context->pre_deblocking_output_res); + + i965_object_surface_to_2d_gpe_resource(&vdenc_context->recon_surface_res, obj_surface); + i965_object_surface_to_2d_gpe_resource(&vdenc_context->scaled_4x_recon_surface_res, vdenc_avc_surface->scaled_4x_surface_obj); + + if (enable_avc_ildb) { + i965_object_surface_to_2d_gpe_resource(&vdenc_context->post_deblocking_output_res, obj_surface); + } else { + i965_object_surface_to_2d_gpe_resource(&vdenc_context->pre_deblocking_output_res, obj_surface); + } + + + /* Reference surfaces */ + for (i = 0; i < ARRAY_ELEMS(vdenc_context->list_reference_res); i++) { + assert(ARRAY_ELEMS(vdenc_context->list_reference_res) == + ARRAY_ELEMS(vdenc_context->list_scaled_4x_reference_res)); + i965_free_gpe_resource(&vdenc_context->list_reference_res[i]); + i965_free_gpe_resource(&vdenc_context->list_scaled_4x_reference_res[i]); + obj_surface = encode_state->reference_objects[i]; + + if (obj_surface && obj_surface->bo) { + i965_object_surface_to_2d_gpe_resource(&vdenc_context->list_reference_res[i], obj_surface); + + if (obj_surface->private_data == NULL) { + vdenc_avc_surface = calloc(sizeof(VDEncAvcSurface), 1); + assert(vdenc_avc_surface); + + vdenc_avc_surface->ctx = ctx; + i965_CreateSurfaces(ctx, + vdenc_context->down_scaled_width_4x, + vdenc_context->down_scaled_height_4x, + VA_RT_FORMAT_YUV420, + 1, + &vdenc_avc_surface->scaled_4x_surface_id); + vdenc_avc_surface->scaled_4x_surface_obj = SURFACE(vdenc_avc_surface->scaled_4x_surface_id); + assert(vdenc_avc_surface->scaled_4x_surface_obj); + i965_check_alloc_surface_bo(ctx, + vdenc_avc_surface->scaled_4x_surface_obj, + 1, + VA_FOURCC_NV12, + SUBSAMPLE_YUV420); + + obj_surface->private_data = vdenc_avc_surface; + obj_surface->free_private_data = gen_free_avc_surface; + } + + vdenc_avc_surface = obj_surface->private_data; + i965_object_surface_to_2d_gpe_resource(&vdenc_context->list_scaled_4x_reference_res[i], vdenc_avc_surface->scaled_4x_surface_obj); + } + } + + /* Input YUV surface */ + i965_free_gpe_resource(&vdenc_context->uncompressed_input_surface_res); + i965_object_surface_to_2d_gpe_resource(&vdenc_context->uncompressed_input_surface_res, encode_state->input_yuv_object); + + /* Encoded bitstream */ + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + i965_free_gpe_resource(&vdenc_context->compressed_bitstream.res); + i965_dri_object_to_buffer_gpe_resource(&vdenc_context->compressed_bitstream.res, bo); + vdenc_context->compressed_bitstream.start_offset = I965_CODEDBUFFER_HEADER_SIZE; + vdenc_context->compressed_bitstream.end_offset = ALIGN(obj_buffer->size_element - 0x1000, 0x1000); + + /* Status buffer */ + i965_free_gpe_resource(&vdenc_context->status_bffuer.res); + i965_dri_object_to_buffer_gpe_resource(&vdenc_context->status_bffuer.res, bo); + vdenc_context->status_bffuer.base_offset = offsetof(struct i965_coded_buffer_segment, codec_private_data); + vdenc_context->status_bffuer.size = ALIGN(sizeof(struct gen9_vdenc_status), 64); + vdenc_context->status_bffuer.bytes_per_frame_offset = offsetof(struct gen9_vdenc_status, bytes_per_frame); + assert(vdenc_context->status_bffuer.base_offset + vdenc_context->status_bffuer.size < + vdenc_context->compressed_bitstream.start_offset); + + dri_bo_map(bo, 1); + + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + coded_buffer_segment->status_support = 1; + + pbuffer = bo->virtual; + pbuffer += vdenc_context->status_bffuer.base_offset; + memset(pbuffer, 0, vdenc_context->status_bffuer.size); + + dri_bo_unmap(bo); + + i965_free_gpe_resource(&vdenc_context->mfx_intra_row_store_scratch_res); + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->mfx_intra_row_store_scratch_res, + vdenc_context->frame_width_in_mbs * 64, + "Intra row store scratch buffer"); + + i965_free_gpe_resource(&vdenc_context->mfx_deblocking_filter_row_store_scratch_res); + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->mfx_deblocking_filter_row_store_scratch_res, + vdenc_context->frame_width_in_mbs * 256, + "Deblocking filter row store scratch buffer"); + + i965_free_gpe_resource(&vdenc_context->mfx_bsd_mpc_row_store_scratch_res); + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->mfx_bsd_mpc_row_store_scratch_res, + vdenc_context->frame_width_in_mbs * 128, + "BSD/MPC row store scratch buffer"); + + i965_free_gpe_resource(&vdenc_context->vdenc_row_store_scratch_res); + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->vdenc_row_store_scratch_res, + vdenc_context->frame_width_in_mbs * 64, + "VDENC row store scratch buffer"); + + assert(sizeof(struct gen9_vdenc_streamin_state) == 64); + i965_free_gpe_resource(&vdenc_context->vdenc_streamin_res); + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->vdenc_streamin_res, + vdenc_context->frame_width_in_mbs * + vdenc_context->frame_height_in_mbs * + sizeof(struct gen9_vdenc_streamin_state), + "VDENC StreamIn buffer"); + + /* + * Calculate the index for each reference surface in list0 for the first slice + * TODO: other slices + */ + pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + + vdenc_context->num_refs[0] = pic_param->num_ref_idx_l0_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) + vdenc_context->num_refs[0] = slice_param->num_ref_idx_l0_active_minus1 + 1; + + if (vdenc_context->num_refs[0] > ARRAY_ELEMS(vdenc_context->list_ref_idx[0])) + return VA_STATUS_ERROR_INVALID_VALUE; + + for (i = 0; i < ARRAY_ELEMS(vdenc_context->list_ref_idx[0]); i++) { + VAPictureH264 *va_pic; + + assert(ARRAY_ELEMS(slice_param->RefPicList0) == ARRAY_ELEMS(vdenc_context->list_ref_idx[0])); + vdenc_context->list_ref_idx[0][i] = 0; + + if (i >= vdenc_context->num_refs[0]) + continue; + + va_pic = &slice_param->RefPicList0[i]; + + for (j = 0; j < ARRAY_ELEMS(encode_state->reference_objects); j++) { + obj_surface = encode_state->reference_objects[j]; + + if (obj_surface && + obj_surface->bo && + obj_surface->base.id == va_pic->picture_id) { + + assert(obj_surface->base.id != VA_INVALID_SURFACE); + vdenc_context->list_ref_idx[0][i] = j; + + break; + } + } + } + + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) + vdenc_context->frame_type = VDENC_FRAME_I; + else + vdenc_context->frame_type = VDENC_FRAME_P; + + qp = pic_param->pic_init_qp + slice_param->slice_qp_delta; + + gen9_vdenc_avc_calculate_mode_cost(ctx, encode_state, encoder_context, qp); + gen9_vdenc_update_roi_in_streamin_state(ctx, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vdenc_huc_pipe_mode_select(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_pipe_mode_select_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 3); + + OUT_BCS_BATCH(batch, HUC_PIPE_MODE_SELECT | (3 - 2)); + OUT_BCS_BATCH(batch, + (params->huc_stream_object_enable << 10) | + (params->indirect_stream_out_enable << 4)); + OUT_BCS_BATCH(batch, + params->media_soft_reset_counter); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_huc_imem_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_imem_state_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 5); + + OUT_BCS_BATCH(batch, HUC_IMEM_STATE | (5 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, params->huc_firmware_descriptor); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_huc_dmem_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_dmem_state_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, HUC_DMEM_STATE | (6 - 2)); + OUT_BUFFER_3DW(batch, params->huc_data_source_res->bo, 0, 0, 0); + OUT_BCS_BATCH(batch, params->huc_data_destination_base_address); + OUT_BCS_BATCH(batch, params->huc_data_length); + + ADVANCE_BCS_BATCH(batch); +} + +/* +static void +gen9_vdenc_huc_cfg_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_cfg_state_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 2); + + OUT_BCS_BATCH(batch, HUC_CFG_STATE | (2 - 2)); + OUT_BCS_BATCH(batch, !!params->force_reset); + + ADVANCE_BCS_BATCH(batch); +} +*/ +static void +gen9_vdenc_huc_virtual_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_virtual_addr_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 49); + + OUT_BCS_BATCH(batch, HUC_VIRTUAL_ADDR_STATE | (49 - 2)); + + for (i = 0; i < 16; i++) { + if (params->regions[i].huc_surface_res && params->regions[i].huc_surface_res->bo) + OUT_BUFFER_3DW(batch, + params->regions[i].huc_surface_res->bo, + !!params->regions[i].is_target, 0, 0); + else + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_huc_ind_obj_base_addr_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_ind_obj_base_addr_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, HUC_IND_OBJ_BASE_ADDR_STATE | (11 - 2)); + + if (params->huc_indirect_stream_in_object_res) + OUT_BUFFER_3DW(batch, + params->huc_indirect_stream_in_object_res->bo, + 0, 0, 0); + else + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + OUT_BUFFER_2DW(batch, NULL, 0, 0); /* ignore access upper bound */ + + if (params->huc_indirect_stream_out_object_res) + OUT_BUFFER_3DW(batch, + params->huc_indirect_stream_out_object_res->bo, + 1, 0, 0); + else + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + OUT_BUFFER_2DW(batch, NULL, 0, 0); /* ignore access upper bound */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_huc_store_huc_status2(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gpe_mi_store_register_mem_parameter mi_store_register_mem_params; + struct gpe_mi_store_data_imm_parameter mi_store_data_imm_params; + + /* Write HUC_STATUS2 mask (1 << 6) */ + memset(&mi_store_data_imm_params, 0, sizeof(mi_store_data_imm_params)); + mi_store_data_imm_params.bo = vdenc_context->huc_status2_res.bo; + mi_store_data_imm_params.offset = 0; + mi_store_data_imm_params.dw0 = (1 << 6); + gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm_params); + + /* Store HUC_STATUS2 */ + memset(&mi_store_register_mem_params, 0, sizeof(mi_store_register_mem_params)); + mi_store_register_mem_params.mmio_offset = VCS0_HUC_STATUS2; + mi_store_register_mem_params.bo = vdenc_context->huc_status2_res.bo; + mi_store_register_mem_params.offset = 4; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_register_mem_params); +} + +static void +gen9_vdenc_huc_stream_object(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_stream_object_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 5); + + OUT_BCS_BATCH(batch, HUC_STREAM_OBJECT | (5 - 2)); + OUT_BCS_BATCH(batch, params->indirect_stream_in_data_length); + OUT_BCS_BATCH(batch, + (1 << 31) | /* Must be 1 */ + params->indirect_stream_in_start_address); + OUT_BCS_BATCH(batch, params->indirect_stream_out_start_address); + OUT_BCS_BATCH(batch, + (!!params->huc_bitstream_enable << 29) | + (params->length_mode << 27) | + (!!params->stream_out << 26) | + (!!params->emulation_prevention_byte_removal << 25) | + (!!params->start_code_search_engine << 24) | + (params->start_code_byte2 << 16) | + (params->start_code_byte1 << 8) | + params->start_code_byte0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_huc_start(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct huc_start_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 2); + + OUT_BCS_BATCH(batch, HUC_START | (2 - 2)); + OUT_BCS_BATCH(batch, !!params->last_stream_object); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_vd_pipeline_flush(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct vd_pipeline_flush_parameter *params) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 2); + + OUT_BCS_BATCH(batch, VD_PIPELINE_FLUSH | (2 - 2)); + OUT_BCS_BATCH(batch, + params->mfx_pipeline_command_flush << 19 | + params->mfl_pipeline_command_flush << 18 | + params->vdenc_pipeline_command_flush << 17 | + params->hevc_pipeline_command_flush << 16 | + params->vd_command_message_parser_done << 4 | + params->mfx_pipeline_done << 3 | + params->mfl_pipeline_done << 2 | + params->vdenc_pipeline_done << 1 | + params->hevc_pipeline_done); + + ADVANCE_BCS_BATCH(batch); +} + +static int +gen9_vdenc_get_max_mbps(int level_idc) +{ + int max_mbps = 11880; + + switch (level_idc) { + case 20: + max_mbps = 11880; + break; + + case 21: + max_mbps = 19800; + break; + + case 22: + max_mbps = 20250; + break; + + case 30: + max_mbps = 40500; + break; + + case 31: + max_mbps = 108000; + break; + + case 32: + max_mbps = 216000; + break; + + case 40: + case 41: + max_mbps = 245760; + break; + + case 42: + max_mbps = 522240; + break; + + case 50: + max_mbps = 589824; + break; + + case 51: + max_mbps = 983040; + break; + + case 52: + max_mbps = 2073600; + break; + + default: + break; + } + + return max_mbps; +}; + +static unsigned int +gen9_vdenc_get_profile_level_max_frame(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + int level_idc) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + double bits_per_mb, tmpf; + int max_mbps, num_mb_per_frame; + uint64_t max_byte_per_frame0, max_byte_per_frame1; + unsigned int ret; + + if (level_idc >= 31 && level_idc <= 40) + bits_per_mb = 96.0; + else + bits_per_mb = 192.0; + + max_mbps = gen9_vdenc_get_max_mbps(level_idc); + num_mb_per_frame = vdenc_context->frame_width_in_mbs * vdenc_context->frame_height_in_mbs; + + tmpf = (double)num_mb_per_frame; + + if (tmpf < max_mbps / 172.0) + tmpf = max_mbps / 172.0; + + max_byte_per_frame0 = (uint64_t)(tmpf * bits_per_mb); + max_byte_per_frame1 = (uint64_t)(((double)max_mbps * 100) / vdenc_context->frames_per_100s *bits_per_mb); + + /* TODO: check VAEncMiscParameterTypeMaxFrameSize */ + ret = (unsigned int)MIN(max_byte_per_frame0, max_byte_per_frame1); + ret = (unsigned int)MIN(ret, vdenc_context->frame_height * vdenc_context->frame_height); + + return ret; +} + +static int +gen9_vdenc_calculate_initial_qp(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + float x0 = 0, y0 = 1.19f, x1 = 1.75f, y1 = 1.75f; + unsigned frame_size; + int qp, delat_qp; + + frame_size = (vdenc_context->frame_width * vdenc_context->frame_height * 3 / 2); + qp = (int)(1.0 / 1.2 * pow(10.0, + (log10(frame_size * 2.0 / 3.0 * ((float)vdenc_context->frames_per_100s) / + ((float)(vdenc_context->target_bit_rate * 1000) * 100)) - x0) * + (y1 - y0) / (x1 - x0) + y0) + 0.5); + qp += 2; + delat_qp = (int)(9 - (vdenc_context->vbv_buffer_size_in_bit * ((float)vdenc_context->frames_per_100s) / + ((float)(vdenc_context->target_bit_rate * 1000) * 100))); + if (delat_qp > 0) + qp += delat_qp; + + qp = CLAMP(1, 51, qp); + qp--; + + if (qp < 0) + qp = 1; + + return qp; +} + +static void +gen9_vdenc_update_huc_brc_init_dmem(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct huc_brc_init_dmem *dmem; + VAEncSequenceParameterBufferH264 *seq_param = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + double input_bits_per_frame, bps_ratio; + int i; + + vdenc_context->brc_init_reset_input_bits_per_frame = ((double)(vdenc_context->max_bit_rate * 1000) * 100) / vdenc_context->frames_per_100s; + vdenc_context->brc_init_current_target_buf_full_in_bits = vdenc_context->brc_init_reset_input_bits_per_frame; + vdenc_context->brc_target_size = vdenc_context->init_vbv_buffer_fullness_in_bit; + + dmem = (struct huc_brc_init_dmem *)i965_map_gpe_resource(&vdenc_context->brc_init_reset_dmem_res); + + if (!dmem) + return; + + memset(dmem, 0, sizeof(*dmem)); + + dmem->brc_func = vdenc_context->brc_initted ? 2 : 0; + + dmem->frame_width = vdenc_context->frame_width; + dmem->frame_height = vdenc_context->frame_height; + + dmem->target_bitrate = vdenc_context->target_bit_rate * 1000; + dmem->min_rate = vdenc_context->min_bit_rate * 1000; + dmem->max_rate = vdenc_context->max_bit_rate * 1000; + dmem->buffer_size = vdenc_context->vbv_buffer_size_in_bit; + dmem->init_buffer_fullness = vdenc_context->init_vbv_buffer_fullness_in_bit; + + if (dmem->init_buffer_fullness > vdenc_context->init_vbv_buffer_fullness_in_bit) + dmem->init_buffer_fullness = vdenc_context->vbv_buffer_size_in_bit; + + if (vdenc_context->internal_rate_mode == I965_BRC_CBR) + dmem->brc_flag |= 0x10; + else if (vdenc_context->internal_rate_mode == I965_BRC_VBR) + dmem->brc_flag |= 0x20; + + dmem->frame_rate_m = vdenc_context->frames_per_100s; + dmem->frame_rate_d = 100; + + dmem->profile_level_max_frame = gen9_vdenc_get_profile_level_max_frame(ctx, encoder_context, seq_param->level_idc); + + if (vdenc_context->ref_dist && vdenc_context->gop_size > 0) + dmem->num_p_in_gop = (vdenc_context->gop_size - 1) / vdenc_context->ref_dist; + + dmem->min_qp = 10; + dmem->max_qp = 51; + + input_bits_per_frame = ((double)vdenc_context->max_bit_rate * 1000 * 100) / vdenc_context->frames_per_100s; + bps_ratio = input_bits_per_frame / ((double)vdenc_context->vbv_buffer_size_in_bit * 100 / vdenc_context->frames_per_100s); + + if (bps_ratio < 0.1) + bps_ratio = 0.1; + + if (bps_ratio > 3.5) + bps_ratio = 3.5; + + for (i = 0; i < 4; i++) { + dmem->dev_thresh_pb0[i] = (char)(-50 * pow(vdenc_brc_dev_threshpb0_fp_neg[i], bps_ratio)); + dmem->dev_thresh_pb0[i + 4] = (char)(50 * pow(vdenc_brc_dev_threshpb0_fp_pos[i], bps_ratio)); + + dmem->dev_thresh_i0[i] = (char)(-50 * pow(vdenc_brc_dev_threshi0_fp_neg[i], bps_ratio)); + dmem->dev_thresh_i0[i + 4] = (char)(50 * pow(vdenc_brc_dev_threshi0_fp_pos[i], bps_ratio)); + + dmem->dev_thresh_vbr0[i] = (char)(-50 * pow(vdenc_brc_dev_threshvbr0_neg[i], bps_ratio)); + dmem->dev_thresh_vbr0[i + 4] = (char)(100 * pow(vdenc_brc_dev_threshvbr0_pos[i], bps_ratio)); + } + + dmem->init_qp_ip = gen9_vdenc_calculate_initial_qp(ctx, encode_state, encoder_context); + + if (vdenc_context->mb_brc_enabled) { + dmem->mb_qp_ctrl = 1; + dmem->dist_qp_delta[0] = -5; + dmem->dist_qp_delta[1] = -2; + dmem->dist_qp_delta[2] = 2; + dmem->dist_qp_delta[3] = 5; + } + + dmem->slice_size_ctrl_en = 0; /* TODO: add support for slice size control */ + + dmem->oscillation_qp_delta = 0; /* TODO: add support */ + dmem->first_iframe_no_hrd_check = 0;/* TODO: add support */ + + // 2nd re-encode pass if possible + if (vdenc_context->frame_width_in_mbs * vdenc_context->frame_height_in_mbs >= (3840 * 2160 / 256)) { + dmem->top_qp_delta_thr_for_2nd_pass = 5; + dmem->bottom_qp_delta_thr_for_2nd_pass = 5; + dmem->top_frame_size_threshold_for_2nd_pass = 80; + dmem->bottom_frame_size_threshold_for_2nd_pass = 80; + } else { + dmem->top_qp_delta_thr_for_2nd_pass = 2; + dmem->bottom_qp_delta_thr_for_2nd_pass = 1; + dmem->top_frame_size_threshold_for_2nd_pass = 32; + dmem->bottom_frame_size_threshold_for_2nd_pass = 24; + } + + dmem->qp_select_for_first_pass = 1; + dmem->mb_header_compensation = 1; + dmem->delta_qp_adaptation = 1; + dmem->max_crf_quality_factor = 52; + + dmem->crf_quality_factor = 0; /* TODO: add support for CRF */ + dmem->scenario_info = 0; + + memcpy(&dmem->estrate_thresh_i0, vdenc_brc_estrate_thresh_i0, sizeof(dmem->estrate_thresh_i0)); + memcpy(&dmem->estrate_thresh_p0, vdenc_brc_estrate_thresh_p0, sizeof(dmem->estrate_thresh_p0)); + + i965_unmap_gpe_resource(&vdenc_context->brc_init_reset_dmem_res); +} + +static void +gen9_vdenc_huc_brc_init_reset(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct huc_pipe_mode_select_parameter pipe_mode_select_params; + struct huc_imem_state_parameter imem_state_params; + struct huc_dmem_state_parameter dmem_state_params; + struct huc_virtual_addr_parameter virtual_addr_params; + struct huc_ind_obj_base_addr_parameter ind_obj_base_addr_params; + struct huc_stream_object_parameter stream_object_params; + struct huc_start_parameter start_params; + struct vd_pipeline_flush_parameter pipeline_flush_params; + struct gpe_mi_flush_dw_parameter mi_flush_dw_params; + + vdenc_context->brc_target_size = vdenc_context->init_vbv_buffer_fullness_in_bit; + + memset(&imem_state_params, 0, sizeof(imem_state_params)); + imem_state_params.huc_firmware_descriptor = HUC_BRC_INIT_RESET; + gen9_vdenc_huc_imem_state(ctx, encoder_context, &imem_state_params); + + memset(&pipe_mode_select_params, 0, sizeof(pipe_mode_select_params)); + gen9_vdenc_huc_pipe_mode_select(ctx, encoder_context, &pipe_mode_select_params); + + gen9_vdenc_update_huc_brc_init_dmem(ctx, encode_state, encoder_context); + memset(&dmem_state_params, 0, sizeof(dmem_state_params)); + dmem_state_params.huc_data_source_res = &vdenc_context->brc_init_reset_dmem_res; + dmem_state_params.huc_data_destination_base_address = HUC_DMEM_DATA_OFFSET; + dmem_state_params.huc_data_length = ALIGN(sizeof(struct huc_brc_init_dmem), 64); + gen9_vdenc_huc_dmem_state(ctx, encoder_context, &dmem_state_params); + + memset(&virtual_addr_params, 0, sizeof(virtual_addr_params)); + virtual_addr_params.regions[0].huc_surface_res = &vdenc_context->brc_history_buffer_res; + virtual_addr_params.regions[0].is_target = 1; + gen9_vdenc_huc_virtual_addr_state(ctx, encoder_context, &virtual_addr_params); + + memset(&ind_obj_base_addr_params, 0, sizeof(ind_obj_base_addr_params)); + ind_obj_base_addr_params.huc_indirect_stream_in_object_res = &vdenc_context->huc_dummy_res; + ind_obj_base_addr_params.huc_indirect_stream_out_object_res = NULL; + gen9_vdenc_huc_ind_obj_base_addr_state(ctx, encoder_context, &ind_obj_base_addr_params); + + memset(&stream_object_params, 0, sizeof(stream_object_params)); + stream_object_params.indirect_stream_in_data_length = 1; + stream_object_params.indirect_stream_in_start_address = 0; + gen9_vdenc_huc_stream_object(ctx, encoder_context, &stream_object_params); + + gen9_vdenc_huc_store_huc_status2(ctx, encoder_context); + + memset(&start_params, 0, sizeof(start_params)); + start_params.last_stream_object = 1; + gen9_vdenc_huc_start(ctx, encoder_context, &start_params); + + memset(&pipeline_flush_params, 0, sizeof(pipeline_flush_params)); + pipeline_flush_params.hevc_pipeline_done = 1; + pipeline_flush_params.hevc_pipeline_command_flush = 1; + gen9_vdenc_vd_pipeline_flush(ctx, encoder_context, &pipeline_flush_params); + + memset(&mi_flush_dw_params, 0, sizeof(mi_flush_dw_params)); + mi_flush_dw_params.video_pipeline_cache_invalidate = 1; + gen9_gpe_mi_flush_dw(ctx, batch, &mi_flush_dw_params); +} + +static void +gen9_vdenc_update_huc_update_dmem(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct huc_brc_update_dmem *dmem; + int i, num_p_in_gop = 0; + + dmem = (struct huc_brc_update_dmem *)i965_map_gpe_resource(&vdenc_context->brc_update_dmem_res[vdenc_context->current_pass]); + + if (!dmem) + return; + + dmem->brc_func = 1; + + if (vdenc_context->brc_initted && (vdenc_context->current_pass == 0)) { + vdenc_context->brc_init_previous_target_buf_full_in_bits = + (uint32_t)(vdenc_context->brc_init_current_target_buf_full_in_bits); + vdenc_context->brc_init_current_target_buf_full_in_bits += vdenc_context->brc_init_reset_input_bits_per_frame; + vdenc_context->brc_target_size += vdenc_context->brc_init_reset_input_bits_per_frame; + } + + if (vdenc_context->brc_target_size > vdenc_context->vbv_buffer_size_in_bit) + vdenc_context->brc_target_size -= vdenc_context->vbv_buffer_size_in_bit; + + dmem->target_size = vdenc_context->brc_target_size; + + dmem->peak_tx_bits_per_frame = (uint32_t)(vdenc_context->brc_init_current_target_buf_full_in_bits - vdenc_context->brc_init_previous_target_buf_full_in_bits); + + dmem->target_slice_size = 0; // TODO: add support for slice size control + + memcpy(dmem->start_global_adjust_frame, vdenc_brc_start_global_adjust_frame, sizeof(dmem->start_global_adjust_frame)); + memcpy(dmem->global_rate_ratio_threshold, vdenc_brc_global_rate_ratio_threshold, sizeof(dmem->global_rate_ratio_threshold)); + + dmem->current_frame_type = (vdenc_context->frame_type + 2) % 3; // I frame:2, P frame:0, B frame:1 + + memcpy(dmem->start_global_adjust_mult, vdenc_brc_start_global_adjust_mult, sizeof(dmem->start_global_adjust_mult)); + memcpy(dmem->start_global_adjust_div, vdenc_brc_start_global_adjust_div, sizeof(dmem->start_global_adjust_div)); + memcpy(dmem->global_rate_ratio_threshold_qp, vdenc_brc_global_rate_ratio_threshold_qp, sizeof(dmem->global_rate_ratio_threshold_qp)); + + dmem->current_pak_pass = vdenc_context->current_pass; + dmem->max_num_passes = 2; + + dmem->scene_change_detect_enable = 1; + dmem->scene_change_prev_intra_percent_threshold = 96; + dmem->scene_change_cur_intra_perent_threshold = 192; + + if (vdenc_context->ref_dist && vdenc_context->gop_size > 0) + num_p_in_gop = (vdenc_context->gop_size - 1) / vdenc_context->ref_dist; + + for (i = 0; i < 2; i++) + dmem->scene_change_width[i] = MIN((num_p_in_gop + 1) / 5, 6); + + if (vdenc_context->is_low_delay) + dmem->ip_average_coeff = 0; + else + dmem->ip_average_coeff = 128; + + dmem->skip_frame_size = 0; + dmem->num_of_frames_skipped = 0; + + dmem->roi_source = 0; // TODO: add support for dirty ROI + dmem->hme_detection_enable = 0; // TODO: support HME kernel + dmem->hme_cost_enable = 1; + + dmem->second_level_batchbuffer_size = 228; + + i965_unmap_gpe_resource(&vdenc_context->brc_update_dmem_res[vdenc_context->current_pass]); +} + +static void +gen9_vdenc_init_mfx_avc_img_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct gen9_mfx_avc_img_state *pstate) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *seq_param = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + + memset(pstate, 0, sizeof(*pstate)); + + pstate->dw0.value = (MFX_AVC_IMG_STATE | (sizeof(*pstate) / 4 - 2)); + + pstate->dw1.frame_size_in_mbs_minus1 = vdenc_context->frame_width_in_mbs * vdenc_context->frame_height_in_mbs - 1; + + pstate->dw2.frame_width_in_mbs_minus1 = vdenc_context->frame_width_in_mbs - 1; + pstate->dw2.frame_height_in_mbs_minus1 = vdenc_context->frame_height_in_mbs - 1; + + pstate->dw3.image_structure = 0; + pstate->dw3.weighted_bipred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + pstate->dw3.weighted_pred_flag = pic_param->pic_fields.bits.weighted_pred_flag; + pstate->dw3.brc_domain_rate_control_enable = 1; + pstate->dw3.chroma_qp_offset = pic_param->chroma_qp_index_offset; + pstate->dw3.second_chroma_qp_offset = pic_param->second_chroma_qp_index_offset; + + pstate->dw4.field_picture_flag = 0; + pstate->dw4.mbaff_mode_active = seq_param->seq_fields.bits.mb_adaptive_frame_field_flag; + pstate->dw4.frame_mb_only_flag = seq_param->seq_fields.bits.frame_mbs_only_flag; + pstate->dw4.transform_8x8_idct_mode_flag = vdenc_context->transform_8x8_mode_enable; + pstate->dw4.direct_8x8_interface_flag = seq_param->seq_fields.bits.direct_8x8_inference_flag; + pstate->dw4.constrained_intra_prediction_flag = pic_param->pic_fields.bits.constrained_intra_pred_flag; + pstate->dw4.entropy_coding_flag = pic_param->pic_fields.bits.entropy_coding_mode_flag; + pstate->dw4.mb_mv_format_flag = 1; + pstate->dw4.chroma_format_idc = seq_param->seq_fields.bits.chroma_format_idc; + pstate->dw4.mv_unpacked_flag = 1; + pstate->dw4.insert_test_flag = 0; + pstate->dw4.load_slice_pointer_flag = 0; + pstate->dw4.macroblock_stat_enable = 0; /* Always 0 in VDEnc mode */ + pstate->dw4.minimum_frame_size = 0; + + pstate->dw5.intra_mb_max_bit_flag = 1; + pstate->dw5.inter_mb_max_bit_flag = 1; + pstate->dw5.frame_size_over_flag = 1; + pstate->dw5.frame_size_under_flag = 1; + pstate->dw5.intra_mb_ipcm_flag = 1; + pstate->dw5.mb_rate_ctrl_flag = 0; /* Always 0 in VDEnc mode */ + pstate->dw5.non_first_pass_flag = 0; + pstate->dw5.aq_enable = pstate->dw5.aq_rounding = 0; + pstate->dw5.aq_chroma_disable = 1; + + pstate->dw6.intra_mb_max_size = 2700; + pstate->dw6.inter_mb_max_size = 4095; + + pstate->dw8.slice_delta_qp_max0 = 0; + pstate->dw8.slice_delta_qp_max1 = 0; + pstate->dw8.slice_delta_qp_max2 = 0; + pstate->dw8.slice_delta_qp_max3 = 0; + + pstate->dw9.slice_delta_qp_min0 = 0; + pstate->dw9.slice_delta_qp_min1 = 0; + pstate->dw9.slice_delta_qp_min2 = 0; + pstate->dw9.slice_delta_qp_min3 = 0; + + pstate->dw10.frame_bitrate_min = 0; + pstate->dw10.frame_bitrate_min_unit = 1; + pstate->dw10.frame_bitrate_min_unit_mode = 1; + pstate->dw10.frame_bitrate_max = (1 << 14) - 1; + pstate->dw10.frame_bitrate_max_unit = 1; + pstate->dw10.frame_bitrate_max_unit_mode = 1; + + pstate->dw11.frame_bitrate_min_delta = 0; + pstate->dw11.frame_bitrate_max_delta = 0; + + pstate->dw12.vad_error_logic = 1; + /* TODO: set paramters DW19/DW20 for slices */ +} + +static void +gen9_vdenc_init_vdenc_img_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct gen9_vdenc_img_state *pstate, + int update_cost) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + VAEncSequenceParameterBufferH264 *seq_param = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + + memset(pstate, 0, sizeof(*pstate)); + + pstate->dw0.value = (VDENC_IMG_STATE | (sizeof(*pstate) / 4 - 2)); + + if (vdenc_context->frame_type == VDENC_FRAME_I) { + pstate->dw4.intra_sad_measure_adjustment = 2; + pstate->dw4.sub_macroblock_sub_partition_mask = 0x70; + + pstate->dw5.cre_prefetch_enable = 1; + + pstate->dw9.mode0_cost = 10; + pstate->dw9.mode1_cost = 0; + pstate->dw9.mode2_cost = 3; + pstate->dw9.mode3_cost = 30; + + pstate->dw20.penalty_for_intra_16x16_non_dc_prediction = 36; + pstate->dw20.penalty_for_intra_8x8_non_dc_prediction = 12; + pstate->dw20.penalty_for_intra_4x4_non_dc_prediction = 4; + + pstate->dw22.small_mb_size_in_word = 0xff; + pstate->dw22.large_mb_size_in_word = 0xff; + + pstate->dw27.max_hmv_r = 0x2000; + pstate->dw27.max_vmv_r = 0x200; + + pstate->dw33.qp_range_check_upper_bound = 0x33; + pstate->dw33.qp_range_check_lower_bound = 0x0a; + pstate->dw33.qp_range_check_value = 0x0f; + } else { + pstate->dw2.bidirectional_weight = 0x20; + + pstate->dw4.subpel_mode = 3; + pstate->dw4.bme_disable_for_fbr_message = 1; + pstate->dw4.inter_sad_measure_adjustment = 2; + pstate->dw4.intra_sad_measure_adjustment = 2; + pstate->dw4.sub_macroblock_sub_partition_mask = 0x70; + + pstate->dw5.cre_prefetch_enable = 1; + + pstate->dw8.non_skip_zero_mv_const_added = 1; + pstate->dw8.non_skip_mb_mode_const_added = 1; + pstate->dw8.ref_id_cost_mode_select = 1; + + pstate->dw9.mode0_cost = 7; + pstate->dw9.mode1_cost = 26; + pstate->dw9.mode2_cost = 30; + pstate->dw9.mode3_cost = 57; + + pstate->dw10.mode4_cost = 8; + pstate->dw10.mode5_cost = 2; + pstate->dw10.mode6_cost = 4; + pstate->dw10.mode7_cost = 6; + + pstate->dw11.mode8_cost = 5; + pstate->dw11.mode9_cost = 0; + pstate->dw11.ref_id_cost = 4; + pstate->dw11.chroma_intra_mode_cost = 0; + + pstate->dw12_13.mv_cost.dw0.mv0_cost = 0; + pstate->dw12_13.mv_cost.dw0.mv1_cost = 6; + pstate->dw12_13.mv_cost.dw0.mv2_cost = 6; + pstate->dw12_13.mv_cost.dw0.mv3_cost = 9; + pstate->dw12_13.mv_cost.dw1.mv4_cost = 10; + pstate->dw12_13.mv_cost.dw1.mv5_cost = 13; + pstate->dw12_13.mv_cost.dw1.mv6_cost = 14; + pstate->dw12_13.mv_cost.dw1.mv7_cost = 24; + + pstate->dw20.penalty_for_intra_16x16_non_dc_prediction = 36; + pstate->dw20.penalty_for_intra_8x8_non_dc_prediction = 12; + pstate->dw20.penalty_for_intra_4x4_non_dc_prediction = 4; + + pstate->dw22.small_mb_size_in_word = 0xff; + pstate->dw22.large_mb_size_in_word = 0xff; + + pstate->dw27.max_hmv_r = 0x2000; + pstate->dw27.max_vmv_r = 0x200; + + pstate->dw31.offset0_for_zone0_neg_zone1_boundary = 800; + + pstate->dw32.offset1_for_zone1_neg_zone2_boundary = 1600; + pstate->dw32.offset2_for_zone2_neg_zone3_boundary = 2400; + + pstate->dw33.qp_range_check_upper_bound = 0x33; + pstate->dw33.qp_range_check_lower_bound = 0x0a; + pstate->dw33.qp_range_check_value = 0x0f; + + pstate->dw34.midpoint_distortion = 0x640; + } + + /* ROI will be updated in HuC kernel for CBR/VBR */ + if (!vdenc_context->brc_enabled && vdenc_context->num_roi) { + pstate->dw34.roi_enable = 1; + + pstate->dw30.roi_qp_adjustment_for_zone1 = CLAMP(-8, 7, vdenc_context->roi[0].value); + + if (vdenc_context->num_roi > 1) + pstate->dw30.roi_qp_adjustment_for_zone2 = CLAMP(-8, 7, vdenc_context->roi[1].value); + + if (vdenc_context->num_roi > 2) + pstate->dw30.roi_qp_adjustment_for_zone3 = CLAMP(-8, 7, vdenc_context->roi[2].value); + } + + pstate->dw1.transform_8x8_flag = vdenc_context->transform_8x8_mode_enable; + + pstate->dw3.picture_width = vdenc_context->frame_width_in_mbs; + + pstate->dw4.forward_transform_skip_check_enable = 1; /* TODO: double-check it */ + + pstate->dw5.picture_height_minus1 = vdenc_context->frame_height_in_mbs - 1; + pstate->dw5.picture_type = vdenc_context->frame_type; + pstate->dw5.constrained_intra_prediction_flag = pic_param->pic_fields.bits.constrained_intra_pred_flag; + + if (vdenc_context->frame_type == VDENC_FRAME_P) { + pstate->dw5.hme_ref1_disable = vdenc_context->num_refs[0] == 1 ? 1 : 0; + } + + pstate->dw5.mb_slice_threshold_value = 0; + + pstate->dw6.slice_macroblock_height_minus1 = vdenc_context->frame_height_in_mbs - 1; /* single slice onlye */ + + if (pstate->dw1.transform_8x8_flag) + pstate->dw8.luma_intra_partition_mask = 0; + else + pstate->dw8.luma_intra_partition_mask = (1 << 1); /* disable transform_8x8 */ + + pstate->dw14.qp_prime_y = pic_param->pic_init_qp + slice_param->slice_qp_delta; /* TODO: check whether it is OK to use the first slice only */ + + if (update_cost) { + pstate->dw9.mode0_cost = vdenc_context->mode_cost[0]; + pstate->dw9.mode1_cost = vdenc_context->mode_cost[1]; + pstate->dw9.mode2_cost = vdenc_context->mode_cost[2]; + pstate->dw9.mode3_cost = vdenc_context->mode_cost[3]; + + pstate->dw10.mode4_cost = vdenc_context->mode_cost[4]; + pstate->dw10.mode5_cost = vdenc_context->mode_cost[5]; + pstate->dw10.mode6_cost = vdenc_context->mode_cost[6]; + pstate->dw10.mode7_cost = vdenc_context->mode_cost[7]; + + pstate->dw11.mode8_cost = vdenc_context->mode_cost[8]; + pstate->dw11.mode9_cost = vdenc_context->mode_cost[9]; + pstate->dw11.ref_id_cost = vdenc_context->mode_cost[10]; + pstate->dw11.chroma_intra_mode_cost = vdenc_context->mode_cost[11]; + + pstate->dw12_13.mv_cost.dw0.mv0_cost = vdenc_context->mv_cost[0]; + pstate->dw12_13.mv_cost.dw0.mv1_cost = vdenc_context->mv_cost[1]; + pstate->dw12_13.mv_cost.dw0.mv2_cost = vdenc_context->mv_cost[2]; + pstate->dw12_13.mv_cost.dw0.mv3_cost = vdenc_context->mv_cost[3]; + pstate->dw12_13.mv_cost.dw1.mv4_cost = vdenc_context->mv_cost[4]; + pstate->dw12_13.mv_cost.dw1.mv5_cost = vdenc_context->mv_cost[5]; + pstate->dw12_13.mv_cost.dw1.mv6_cost = vdenc_context->mv_cost[6]; + pstate->dw12_13.mv_cost.dw1.mv7_cost = vdenc_context->mv_cost[7]; + + pstate->dw28_29.hme_mv_cost.dw0.mv0_cost = vdenc_context->hme_mv_cost[0]; + pstate->dw28_29.hme_mv_cost.dw0.mv1_cost = vdenc_context->hme_mv_cost[1]; + pstate->dw28_29.hme_mv_cost.dw0.mv2_cost = vdenc_context->hme_mv_cost[2]; + pstate->dw28_29.hme_mv_cost.dw0.mv3_cost = vdenc_context->hme_mv_cost[3]; + pstate->dw28_29.hme_mv_cost.dw1.mv4_cost = vdenc_context->hme_mv_cost[4]; + pstate->dw28_29.hme_mv_cost.dw1.mv5_cost = vdenc_context->hme_mv_cost[5]; + pstate->dw28_29.hme_mv_cost.dw1.mv6_cost = vdenc_context->hme_mv_cost[6]; + pstate->dw28_29.hme_mv_cost.dw1.mv7_cost = vdenc_context->hme_mv_cost[7]; + } + + pstate->dw27.max_vmv_r = gen9_vdenc_get_max_vmv_range(seq_param->level_idc); + + pstate->dw34.image_state_qp_override = (vdenc_context->internal_rate_mode == I965_BRC_CQP) ? 1 : 0; + + /* TODO: check rolling I */ + + /* TODO: handle ROI */ + + /* TODO: check stream in support */ +} + +static void +gen9_vdenc_init_img_states(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct gen9_mfx_avc_img_state *mfx_img_cmd; + struct gen9_vdenc_img_state *vdenc_img_cmd; + char *pbuffer; + + pbuffer = i965_map_gpe_resource(&vdenc_context->vdenc_avc_image_state_res); + + if (!pbuffer) + return; + + mfx_img_cmd = (struct gen9_mfx_avc_img_state *)pbuffer; + gen9_vdenc_init_mfx_avc_img_state(ctx, encode_state, encoder_context, mfx_img_cmd); + pbuffer += sizeof(*mfx_img_cmd); + + vdenc_img_cmd = (struct gen9_vdenc_img_state *)pbuffer; + gen9_vdenc_init_vdenc_img_state(ctx, encode_state, encoder_context, vdenc_img_cmd, 0); + pbuffer += sizeof(*vdenc_img_cmd); + + /* Add batch buffer end command */ + *((unsigned int *)pbuffer) = MI_BATCH_BUFFER_END; + + i965_unmap_gpe_resource(&vdenc_context->vdenc_avc_image_state_res); +} + +static void +gen9_vdenc_huc_brc_update_constant_data(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + char *pbuffer; + + pbuffer = i965_map_gpe_resource(&vdenc_context->brc_constant_data_res); + + if (!pbuffer) + return; + + if (vdenc_context->internal_rate_mode == I965_BRC_VBR) { + memcpy(gen9_brc_update_constant_data.dist_qp_adj_tab_i, dist_qp_adj_tab_i_vbr, sizeof(dist_qp_adj_tab_i_vbr)); + memcpy(gen9_brc_update_constant_data.dist_qp_adj_tab_p, dist_qp_adj_tab_p_vbr, sizeof(dist_qp_adj_tab_p_vbr)); + memcpy(gen9_brc_update_constant_data.dist_qp_adj_tab_b, dist_qp_adj_tab_b_vbr, sizeof(dist_qp_adj_tab_b_vbr)); + memcpy(gen9_brc_update_constant_data.buf_rate_adj_tab_i, buf_rate_adj_tab_i_vbr, sizeof(buf_rate_adj_tab_i_vbr)); + memcpy(gen9_brc_update_constant_data.buf_rate_adj_tab_p, buf_rate_adj_tab_p_vbr, sizeof(buf_rate_adj_tab_p_vbr)); + memcpy(gen9_brc_update_constant_data.buf_rate_adj_tab_b, buf_rate_adj_tab_b_vbr, sizeof(buf_rate_adj_tab_b_vbr)); + } + + memcpy(pbuffer, &gen9_brc_update_constant_data, sizeof(gen9_brc_update_constant_data)); + + i965_unmap_gpe_resource(&vdenc_context->brc_constant_data_res); +} + +static void +gen9_vdenc_huc_brc_update(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct huc_pipe_mode_select_parameter pipe_mode_select_params; + struct huc_imem_state_parameter imem_state_params; + struct huc_dmem_state_parameter dmem_state_params; + struct huc_virtual_addr_parameter virtual_addr_params; + struct huc_ind_obj_base_addr_parameter ind_obj_base_addr_params; + struct huc_stream_object_parameter stream_object_params; + struct huc_start_parameter start_params; + struct vd_pipeline_flush_parameter pipeline_flush_params; + struct gpe_mi_store_register_mem_parameter mi_store_register_mem_params; + struct gpe_mi_store_data_imm_parameter mi_store_data_imm_params; + struct gpe_mi_flush_dw_parameter mi_flush_dw_params; + + memset(&mi_flush_dw_params, 0, sizeof(mi_flush_dw_params)); + mi_flush_dw_params.video_pipeline_cache_invalidate = 1; + gen9_gpe_mi_flush_dw(ctx, batch, &mi_flush_dw_params); + + if (!vdenc_context->brc_initted || vdenc_context->brc_need_reset) { + struct gpe_mi_conditional_batch_buffer_end_parameter mi_conditional_batch_buffer_end_params; + + memset(&mi_conditional_batch_buffer_end_params, 0, sizeof(mi_conditional_batch_buffer_end_params)); + mi_conditional_batch_buffer_end_params.bo = vdenc_context->huc_status2_res.bo; + gen9_gpe_mi_conditional_batch_buffer_end(ctx, batch, &mi_conditional_batch_buffer_end_params); + } + + gen9_vdenc_init_img_states(ctx, encode_state, encoder_context); + + memset(&imem_state_params, 0, sizeof(imem_state_params)); + imem_state_params.huc_firmware_descriptor = HUC_BRC_UPDATE; + gen9_vdenc_huc_imem_state(ctx, encoder_context, &imem_state_params); + + memset(&pipe_mode_select_params, 0, sizeof(pipe_mode_select_params)); + gen9_vdenc_huc_pipe_mode_select(ctx, encoder_context, &pipe_mode_select_params); + + gen9_vdenc_update_huc_update_dmem(ctx, encoder_context); + memset(&dmem_state_params, 0, sizeof(dmem_state_params)); + dmem_state_params.huc_data_source_res = &vdenc_context->brc_update_dmem_res[vdenc_context->current_pass]; + dmem_state_params.huc_data_destination_base_address = HUC_DMEM_DATA_OFFSET; + dmem_state_params.huc_data_length = ALIGN(sizeof(struct huc_brc_update_dmem), 64); + gen9_vdenc_huc_dmem_state(ctx, encoder_context, &dmem_state_params); + + gen9_vdenc_huc_brc_update_constant_data(ctx, encode_state, encoder_context); + memset(&virtual_addr_params, 0, sizeof(virtual_addr_params)); + virtual_addr_params.regions[0].huc_surface_res = &vdenc_context->brc_history_buffer_res; + virtual_addr_params.regions[0].is_target = 1; + virtual_addr_params.regions[1].huc_surface_res = &vdenc_context->vdenc_statistics_res; + virtual_addr_params.regions[2].huc_surface_res = &vdenc_context->pak_statistics_res; + virtual_addr_params.regions[3].huc_surface_res = &vdenc_context->vdenc_avc_image_state_res; + virtual_addr_params.regions[4].huc_surface_res = &vdenc_context->hme_detection_summary_buffer_res; + virtual_addr_params.regions[4].is_target = 1; + virtual_addr_params.regions[5].huc_surface_res = &vdenc_context->brc_constant_data_res; + virtual_addr_params.regions[6].huc_surface_res = &vdenc_context->second_level_batch_res; + virtual_addr_params.regions[6].is_target = 1; + gen9_vdenc_huc_virtual_addr_state(ctx, encoder_context, &virtual_addr_params); + + memset(&ind_obj_base_addr_params, 0, sizeof(ind_obj_base_addr_params)); + ind_obj_base_addr_params.huc_indirect_stream_in_object_res = &vdenc_context->huc_dummy_res; + ind_obj_base_addr_params.huc_indirect_stream_out_object_res = NULL; + gen9_vdenc_huc_ind_obj_base_addr_state(ctx, encoder_context, &ind_obj_base_addr_params); + + memset(&stream_object_params, 0, sizeof(stream_object_params)); + stream_object_params.indirect_stream_in_data_length = 1; + stream_object_params.indirect_stream_in_start_address = 0; + gen9_vdenc_huc_stream_object(ctx, encoder_context, &stream_object_params); + + gen9_vdenc_huc_store_huc_status2(ctx, encoder_context); + + memset(&start_params, 0, sizeof(start_params)); + start_params.last_stream_object = 1; + gen9_vdenc_huc_start(ctx, encoder_context, &start_params); + + memset(&pipeline_flush_params, 0, sizeof(pipeline_flush_params)); + pipeline_flush_params.hevc_pipeline_done = 1; + pipeline_flush_params.hevc_pipeline_command_flush = 1; + gen9_vdenc_vd_pipeline_flush(ctx, encoder_context, &pipeline_flush_params); + + memset(&mi_flush_dw_params, 0, sizeof(mi_flush_dw_params)); + mi_flush_dw_params.video_pipeline_cache_invalidate = 1; + gen9_gpe_mi_flush_dw(ctx, batch, &mi_flush_dw_params); + + /* Store HUC_STATUS */ + memset(&mi_store_register_mem_params, 0, sizeof(mi_store_register_mem_params)); + mi_store_register_mem_params.mmio_offset = VCS0_HUC_STATUS; + mi_store_register_mem_params.bo = vdenc_context->huc_status_res.bo; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_register_mem_params); + + /* Write HUC_STATUS mask (1 << 31) */ + memset(&mi_store_data_imm_params, 0, sizeof(mi_store_data_imm_params)); + mi_store_data_imm_params.bo = vdenc_context->huc_status_res.bo; + mi_store_data_imm_params.offset = 4; + mi_store_data_imm_params.dw0 = (1 << 31); + gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm_params); +} + +static void +gen9_vdenc_mfx_pipe_mode_select(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 5); + + OUT_BCS_BATCH(batch, MFX_PIPE_MODE_SELECT | (5 - 2)); + OUT_BCS_BATCH(batch, + (1 << 29) | + (MFX_LONG_MODE << 17) | /* Must be long format for encoder */ + (MFD_MODE_VLD << 15) | + (1 << 13) | /* VDEnc mode */ + ((!!vdenc_context->post_deblocking_output_res.bo) << 9) | /* Post Deblocking Output */ + ((!!vdenc_context->pre_deblocking_output_res.bo) << 8) | /* Pre Deblocking Output */ + (1 << 7) | /* Scaled surface enable */ + (1 << 6) | /* Frame statistics stream out enable, always '1' in VDEnc mode */ + (1 << 4) | /* encoding mode */ + (MFX_FORMAT_AVC << 0)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_surface_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_resource *gpe_resource, + int id) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, MFX_SURFACE_STATE | (6 - 2)); + OUT_BCS_BATCH(batch, id); + OUT_BCS_BATCH(batch, + ((gpe_resource->height - 1) << 18) | + ((gpe_resource->width - 1) << 4)); + OUT_BCS_BATCH(batch, + (MFX_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + ((gpe_resource->pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (gpe_resource->y_cb_offset)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (gpe_resource->y_cb_offset)); /* y offset for U(cb) */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_pipe_buf_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + int i; + + BEGIN_BCS_BATCH(batch, 65); + + OUT_BCS_BATCH(batch, MFX_PIPE_BUF_ADDR_STATE | (65 - 2)); + + /* the DW1-3 is for pre_deblocking */ + OUT_BUFFER_3DW(batch, vdenc_context->pre_deblocking_output_res.bo, 1, 0, 0); + + /* the DW4-6 is for the post_deblocking */ + OUT_BUFFER_3DW(batch, vdenc_context->post_deblocking_output_res.bo, 1, 0, 0); + + /* the DW7-9 is for the uncompressed_picture */ + OUT_BUFFER_3DW(batch, vdenc_context->uncompressed_input_surface_res.bo, 0, 0, 0); + + /* the DW10-12 is for PAK information (write) */ + OUT_BUFFER_3DW(batch, vdenc_context->pak_statistics_res.bo, 1, 0, 0); + + /* the DW13-15 is for the intra_row_store_scratch */ + OUT_BUFFER_3DW(batch, vdenc_context->mfx_intra_row_store_scratch_res.bo, 1, 0, 0); + + /* the DW16-18 is for the deblocking filter */ + OUT_BUFFER_3DW(batch, vdenc_context->mfx_deblocking_filter_row_store_scratch_res.bo, 1, 0, 0); + + /* the DW 19-50 is for Reference pictures*/ + for (i = 0; i < ARRAY_ELEMS(vdenc_context->list_reference_res); i++) { + OUT_BUFFER_2DW(batch, vdenc_context->list_reference_res[i].bo, 0, 0); + } + + /* DW 51, reference picture attributes */ + OUT_BCS_BATCH(batch, 0); + + /* The DW 52-54 is for PAK information (read) */ + OUT_BUFFER_3DW(batch, vdenc_context->pak_statistics_res.bo, 0, 0, 0); + + /* the DW 55-57 is the ILDB buffer */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* the DW 58-60 is the second ILDB buffer */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* DW 61, memory compress enable & mode */ + OUT_BCS_BATCH(batch, 0); + + /* the DW 62-64 is the 4x Down Scaling surface */ + OUT_BUFFER_3DW(batch, vdenc_context->scaled_4x_recon_surface_res.bo, 0, 0, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_ind_obj_base_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 26); + + OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (26 - 2)); + /* The DW1-5 is for the MFX indirect bistream offset, ignore for VDEnc mode */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + OUT_BUFFER_2DW(batch, NULL, 0, 0); + + /* the DW6-10 is for MFX Indirect MV Object Base Address, ignore for VDEnc mode */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + OUT_BUFFER_2DW(batch, NULL, 0, 0); + + /* The DW11-15 is for MFX IT-COFF. Not used on encoder */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + OUT_BUFFER_2DW(batch, NULL, 0, 0); + + /* The DW16-20 is for MFX indirect DBLK. Not used on encoder */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + OUT_BUFFER_2DW(batch, NULL, 0, 0); + + /* The DW21-25 is for MFC Indirect PAK-BSE Object Base Address for Encoder + * Note: an offset is specified in MFX_AVC_SLICE_STATE + */ + OUT_BUFFER_3DW(batch, + vdenc_context->compressed_bitstream.res.bo, + 1, + 0, + 0); + OUT_BUFFER_2DW(batch, + vdenc_context->compressed_bitstream.res.bo, + 1, + vdenc_context->compressed_bitstream.end_offset); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_bsp_buf_base_addr_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 10); + + OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (10 - 2)); + + /* The DW1-3 is for bsd/mpc row store scratch buffer */ + OUT_BUFFER_3DW(batch, vdenc_context->mfx_bsd_mpc_row_store_scratch_res.bo, 1, 0, 0); + + /* The DW4-6 is for MPR Row Store Scratch Buffer Base Address, ignore for encoder */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* The DW7-9 is for Bitplane Read Buffer Base Address, ignore for encoder */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_qm_state(VADriverContextP ctx, + int qm_type, + unsigned int *qm, + int qm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int qm_buffer[16]; + + assert(qm_length <= 16); + assert(sizeof(*qm) == 4); + memcpy(qm_buffer, qm, qm_length * 4); + + BEGIN_BCS_BATCH(batch, 18); + OUT_BCS_BATCH(batch, MFX_QM_STATE | (18 - 2)); + OUT_BCS_BATCH(batch, qm_type << 0); + intel_batchbuffer_data(batch, qm_buffer, 16 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_avc_qm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + /* TODO: add support for non flat matrix */ + unsigned int qm[16] = { + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010, + 0x10101010, 0x10101010, 0x10101010, 0x10101010 + }; + + gen9_vdenc_mfx_qm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 12, encoder_context); + gen9_vdenc_mfx_qm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 12, encoder_context); + gen9_vdenc_mfx_qm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 16, encoder_context); + gen9_vdenc_mfx_qm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 16, encoder_context); +} + +static void +gen9_vdenc_mfx_fqm_state(VADriverContextP ctx, + int fqm_type, + unsigned int *fqm, + int fqm_length, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int fqm_buffer[32]; + + assert(fqm_length <= 32); + assert(sizeof(*fqm) == 4); + memcpy(fqm_buffer, fqm, fqm_length * 4); + + BEGIN_BCS_BATCH(batch, 34); + OUT_BCS_BATCH(batch, MFX_FQM_STATE | (34 - 2)); + OUT_BCS_BATCH(batch, fqm_type << 0); + intel_batchbuffer_data(batch, fqm_buffer, 32 * 4); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_avc_fqm_state(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + /* TODO: add support for non flat matrix */ + unsigned int qm[32] = { + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000, + 0x10001000, 0x10001000, 0x10001000, 0x10001000 + }; + + gen9_vdenc_mfx_fqm_state(ctx, MFX_QM_AVC_4X4_INTRA_MATRIX, qm, 24, encoder_context); + gen9_vdenc_mfx_fqm_state(ctx, MFX_QM_AVC_4X4_INTER_MATRIX, qm, 24, encoder_context); + gen9_vdenc_mfx_fqm_state(ctx, MFX_QM_AVC_8x8_INTRA_MATRIX, qm, 32, encoder_context); + gen9_vdenc_mfx_fqm_state(ctx, MFX_QM_AVC_8x8_INTER_MATRIX, qm, 32, encoder_context); +} + +static void +gen9_vdenc_mfx_avc_img_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_mfx_avc_img_state mfx_img_cmd; + + gen9_vdenc_init_mfx_avc_img_state(ctx, encode_state, encoder_context, &mfx_img_cmd); + + BEGIN_BCS_BATCH(batch, (sizeof(mfx_img_cmd) >> 2)); + intel_batchbuffer_data(batch, &mfx_img_cmd, sizeof(mfx_img_cmd)); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_vdenc_pipe_mode_select(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 2); + + OUT_BCS_BATCH(batch, VDENC_PIPE_MODE_SELECT | (2 - 2)); + OUT_BCS_BATCH(batch, + (vdenc_context->vdenc_streamin_enable << 9) | + (vdenc_context->vdenc_pak_threshold_check_enable << 8) | + (1 << 7) | /* Tlb prefetch enable */ + (1 << 5) | /* Frame Statistics Stream-Out Enable */ + (VDENC_CODEC_AVC << 0)); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_vdenc_surface_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_resource *gpe_resource, + int vdenc_surface_cmd) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, vdenc_surface_cmd | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + ((gpe_resource->height - 1) << 18) | + ((gpe_resource->width - 1) << 4)); + OUT_BCS_BATCH(batch, + (VDENC_SURFACE_PLANAR_420_8 << 28) | /* 420 planar YUV surface only on SKL */ + (1 << 27) | /* must be 1 for interleave U/V, hardware requirement */ + ((gpe_resource->pitch - 1) << 3) | /* pitch */ + (0 << 2) | /* must be 0 for interleave U/V */ + (1 << 1) | /* must be tiled */ + (I965_TILEWALK_YMAJOR << 0)); /* tile walk, TILEWALK_YMAJOR */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (gpe_resource->y_cb_offset)); /* y offset for U(cb) */ + OUT_BCS_BATCH(batch, + (0 << 16) | /* must be 0 for interleave U/V */ + (gpe_resource->y_cb_offset)); /* y offset for v(cr) */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_vdenc_src_surface_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_resource *gpe_resource) +{ + gen9_vdenc_vdenc_surface_state(ctx, encoder_context, gpe_resource, VDENC_SRC_SURFACE_STATE); +} + +static void +gen9_vdenc_vdenc_ref_surface_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_resource *gpe_resource) +{ + gen9_vdenc_vdenc_surface_state(ctx, encoder_context, gpe_resource, VDENC_REF_SURFACE_STATE); +} + +static void +gen9_vdenc_vdenc_ds_ref_surface_state(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_resource *gpe_resource) +{ + gen9_vdenc_vdenc_surface_state(ctx, encoder_context, gpe_resource, VDENC_DS_REF_SURFACE_STATE); +} + +static void +gen9_vdenc_vdenc_pipe_buf_addr_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 37); + + OUT_BCS_BATCH(batch, VDENC_PIPE_BUF_ADDR_STATE | (37 - 2)); + + /* DW1-6 for DS FWD REF0/REF1 */ + OUT_BUFFER_3DW(batch, vdenc_context->list_scaled_4x_reference_res[vdenc_context->list_ref_idx[0][0]].bo, 0, 0, 0); + OUT_BUFFER_3DW(batch, vdenc_context->list_scaled_4x_reference_res[vdenc_context->list_ref_idx[0][1]].bo, 0, 0, 0); + + /* DW7-9 for DS BWD REF0, ignored on SKL */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* DW10-12 for uncompressed input data */ + OUT_BUFFER_3DW(batch, vdenc_context->uncompressed_input_surface_res.bo, 0, 0, 0); + + /* DW13-DW15 for streamin data */ + if (vdenc_context->vdenc_streamin_enable) + OUT_BUFFER_3DW(batch, vdenc_context->vdenc_streamin_res.bo, 0, 0, 0); + else + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* DW16-DW18 for row scratch buffer */ + OUT_BUFFER_3DW(batch, vdenc_context->vdenc_row_store_scratch_res.bo, 1, 0, 0); + + /* DW19-DW21, ignored on SKL */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* DW22-DW27 for FWD REF0/REF1 */ + OUT_BUFFER_3DW(batch, vdenc_context->list_reference_res[vdenc_context->list_ref_idx[0][0]].bo, 0, 0, 0); + OUT_BUFFER_3DW(batch, vdenc_context->list_reference_res[vdenc_context->list_ref_idx[0][1]].bo, 0, 0, 0); + + /* DW28-DW30 for FWD REF2, ignored on SKL */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* DW31-DW33 for BDW REF0, ignored on SKL */ + OUT_BUFFER_3DW(batch, NULL, 0, 0, 0); + + /* DW34-DW36 for VDEnc statistics streamout */ + OUT_BUFFER_3DW(batch, vdenc_context->vdenc_statistics_res.bo, 1, 0, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_vdenc_const_qpt_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 61); + + OUT_BCS_BATCH(batch, VDENC_CONST_QPT_STATE | (61 - 2)); + + if (vdenc_context->frame_type == VDENC_FRAME_I) { + /* DW1-DW11 */ + intel_batchbuffer_data(batch, vdenc_const_qp_lambda, sizeof(vdenc_const_qp_lambda)); + + /* DW12-DW25 */ + intel_batchbuffer_data(batch, vdenc_const_skip_threshold, sizeof(vdenc_const_skip_threshold)); + + /* DW26-DW39 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_0, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_0)); + + /* DW40-DW46 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_1, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_1)); + + /* DW47-DW53 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_2, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_2)); + + /* DW54-DW60 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_3, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_3)); + } else { + int i; + + for (i = 0; i < 28; i++) { + vdenc_const_skip_threshold_p[i] *= 3; + } + + /* DW1-DW11 */ + intel_batchbuffer_data(batch, vdenc_const_qp_lambda_p, sizeof(vdenc_const_qp_lambda_p)); + + /* DW12-DW25 */ + intel_batchbuffer_data(batch, vdenc_const_skip_threshold_p, sizeof(vdenc_const_skip_threshold_p)); + + /* DW26-DW39 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_0_p, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_0_p)); + + /* DW40-DW46 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_1_p, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_1_p)); + + /* DW47-DW53 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_2_p, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_2_p)); + + /* DW54-DW60 */ + intel_batchbuffer_data(batch, vdenc_const_sic_forward_transform_coeff_threshold_3_p, sizeof(vdenc_const_sic_forward_transform_coeff_threshold_3_p)); + } + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_vdenc_walker_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 2); + + OUT_BCS_BATCH(batch, VDENC_WALKER_STATE | (2 - 2)); + OUT_BCS_BATCH(batch, 0); /* All fields are set to 0 */ + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_vdenc_img_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_vdenc_img_state vdenc_img_cmd; + + gen9_vdenc_init_vdenc_img_state(ctx, encode_state, encoder_context, &vdenc_img_cmd, 1); + + BEGIN_BCS_BATCH(batch, (sizeof(vdenc_img_cmd) >> 2)); + intel_batchbuffer_data(batch, &vdenc_img_cmd, sizeof(vdenc_img_cmd)); + ADVANCE_BCS_BATCH(batch); +} + +extern int +intel_avc_enc_slice_type_fixup(int slice_type); + +static void +gen9_vdenc_mfx_avc_insert_object(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + unsigned int *insert_data, int lenght_in_dws, int data_bits_in_last_dw, + int skip_emul_byte_count, int is_last_header, int is_end_of_slice, int emulation_flag, + int slice_header_indicator) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + if (data_bits_in_last_dw == 0) + data_bits_in_last_dw = 32; + + BEGIN_BCS_BATCH(batch, lenght_in_dws + 2); + + OUT_BCS_BATCH(batch, MFX_INSERT_OBJECT | (lenght_in_dws)); + OUT_BCS_BATCH(batch, + (0 << 16) | /* always start at offset 0 */ + (slice_header_indicator << 14) | + (data_bits_in_last_dw << 8) | + (skip_emul_byte_count << 4) | + (!!emulation_flag << 3) | + ((!!is_last_header) << 2) | + ((!!is_end_of_slice) << 1) | + (0 << 0)); /* TODO: check this flag */ + intel_batchbuffer_data(batch, insert_data, lenght_in_dws * 4); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vdenc_mfx_avc_insert_slice_packed_data(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int slice_index) +{ + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int length_in_bits; + unsigned int *header_data = NULL; + int count, i, start_index; + int slice_header_index; + + if (encode_state->slice_header_index[slice_index] == 0) + slice_header_index = -1; + else + slice_header_index = (encode_state->slice_header_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK); + + count = encode_state->slice_rawdata_count[slice_index]; + start_index = (encode_state->slice_rawdata_index[slice_index] & SLICE_PACKED_DATA_INDEX_MASK); + + for (i = 0; i < count; i++) { + unsigned int skip_emul_byte_cnt; + + header_data = (unsigned int *)encode_state->packed_header_data_ext[start_index + i]->buffer; + + param = (VAEncPackedHeaderParameterBuffer *)(encode_state->packed_header_params_ext[start_index + i]->buffer); + + /* skip the slice header packed data type as it is lastly inserted */ + if (param->type == VAEncPackedHeaderSlice) + continue; + + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + /* as the slice header is still required, the last header flag is set to + * zero. + */ + gen9_vdenc_mfx_avc_insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + 0); + } + + if (slice_header_index == -1) { + VAEncSequenceParameterBufferH264 *seq_param = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *slice_params = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[slice_index]->buffer; + unsigned char *slice_header = NULL; + int slice_header_length_in_bits = 0; + + /* No slice header data is passed. And the driver needs to generate it */ + /* For the Normal H264 */ + slice_header_length_in_bits = build_avc_slice_header(seq_param, + pic_param, + slice_params, + &slice_header); + gen9_vdenc_mfx_avc_insert_object(ctx, + encoder_context, + (unsigned int *)slice_header, + ALIGN(slice_header_length_in_bits, 32) >> 5, + slice_header_length_in_bits & 0x1f, + 5, /* first 5 bytes are start code + nal unit type */ + 1, 0, 1, + 1); + + free(slice_header); + } else { + unsigned int skip_emul_byte_cnt; + + header_data = (unsigned int *)encode_state->packed_header_data_ext[slice_header_index]->buffer; + + param = (VAEncPackedHeaderParameterBuffer *)(encode_state->packed_header_params_ext[slice_header_index]->buffer); + length_in_bits = param->bit_length; + + /* as the slice header is the last header data for one slice, + * the last header flag is set to one. + */ + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + gen9_vdenc_mfx_avc_insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 1, + 0, + !param->has_emulation_bytes, + 1); + } + + return; +} + +static void +gen9_vdenc_mfx_avc_inset_headers(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + VAEncSliceParameterBufferH264 *slice_param, + int slice_index) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + int idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SPS); + unsigned int internal_rate_mode = vdenc_context->internal_rate_mode; + unsigned int skip_emul_byte_cnt; + + if (slice_index == 0) { + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + gen9_vdenc_mfx_avc_insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + 0); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_PPS); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + + gen9_vdenc_mfx_avc_insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + 0); + } + + idx = va_enc_packed_type_to_idx(VAEncPackedHeaderH264_SEI); + + if (encode_state->packed_header_data[idx]) { + VAEncPackedHeaderParameterBuffer *param = NULL; + unsigned int *header_data = (unsigned int *)encode_state->packed_header_data[idx]->buffer; + unsigned int length_in_bits; + + assert(encode_state->packed_header_param[idx]); + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_param[idx]->buffer; + length_in_bits = param->bit_length; + + skip_emul_byte_cnt = intel_avc_find_skipemulcnt((unsigned char *)header_data, length_in_bits); + gen9_vdenc_mfx_avc_insert_object(ctx, + encoder_context, + header_data, + ALIGN(length_in_bits, 32) >> 5, + length_in_bits & 0x1f, + skip_emul_byte_cnt, + 0, + 0, + !param->has_emulation_bytes, + 0); + } else if (internal_rate_mode == I965_BRC_CBR) { + /* TODO: insert others */ + } + } + + gen9_vdenc_mfx_avc_insert_slice_packed_data(ctx, + encode_state, + encoder_context, + slice_index); +} + +static void +gen9_vdenc_mfx_avc_slice_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param, + VAEncSliceParameterBufferH264 *next_slice_param) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + unsigned int luma_log2_weight_denom = slice_param->luma_log2_weight_denom; + unsigned int chroma_log2_weight_denom = slice_param->chroma_log2_weight_denom; + unsigned char correct[6], grow, shrink; + int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos; + int max_qp_n, max_qp_p; + int i; + int weighted_pred_idc = 0; + int num_ref_l0 = 0, num_ref_l1 = 0; + int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + int slice_qp = pic_param->pic_init_qp + slice_param->slice_qp_delta; // TODO: fix for CBR&VBR */ + + slice_hor_pos = slice_param->macroblock_address % vdenc_context->frame_width_in_mbs; + slice_ver_pos = slice_param->macroblock_address / vdenc_context->frame_height_in_mbs; + + if (next_slice_param) { + next_slice_hor_pos = next_slice_param->macroblock_address % vdenc_context->frame_width_in_mbs; + next_slice_ver_pos = next_slice_param->macroblock_address / vdenc_context->frame_height_in_mbs; + } else { + next_slice_hor_pos = 0; + next_slice_ver_pos = vdenc_context->frame_height_in_mbs; + } + + if (slice_type == SLICE_TYPE_I) { + luma_log2_weight_denom = 0; + chroma_log2_weight_denom = 0; + } else if (slice_type == SLICE_TYPE_P) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_pred_flag; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + } else if (slice_type == SLICE_TYPE_B) { + weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc; + num_ref_l0 = pic_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = pic_param->num_ref_idx_l1_active_minus1 + 1; + + if (slice_param->num_ref_idx_active_override_flag) { + num_ref_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1; + num_ref_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1; + } + + if (weighted_pred_idc == 2) { + /* 8.4.3 - Derivation process for prediction weights (8-279) */ + luma_log2_weight_denom = 5; + chroma_log2_weight_denom = 5; + } + } + + max_qp_n = 0; /* TODO: update it */ + max_qp_p = 0; /* TODO: update it */ + grow = 0; /* TODO: update it */ + shrink = 0; /* TODO: update it */ + + for (i = 0; i < 6; i++) + correct[i] = 0; /* TODO: update it */ + + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2) ); + OUT_BCS_BATCH(batch, slice_type); + OUT_BCS_BATCH(batch, + (num_ref_l0 << 16) | + (num_ref_l1 << 24) | + (chroma_log2_weight_denom << 8) | + (luma_log2_weight_denom << 0)); + OUT_BCS_BATCH(batch, + (weighted_pred_idc << 30) | + (slice_param->direct_spatial_mv_pred_flag << 29) | + (slice_param->disable_deblocking_filter_idc << 27) | + (slice_param->cabac_init_idc << 24) | + (slice_qp << 16) | + ((slice_param->slice_beta_offset_div2 & 0xf) << 8) | + ((slice_param->slice_alpha_c0_offset_div2 & 0xf) << 0)); + + OUT_BCS_BATCH(batch, + slice_ver_pos << 24 | + slice_hor_pos << 16 | + slice_param->macroblock_address); + OUT_BCS_BATCH(batch, + next_slice_ver_pos << 16 | + next_slice_hor_pos); + + OUT_BCS_BATCH(batch, + (0 << 31) | /* TODO: ignore it for VDENC ??? */ + (!slice_param->macroblock_address << 30) | /* ResetRateControlCounter */ + (2 << 28) | /* Loose Rate Control */ + (0 << 24) | /* RC Stable Tolerance */ + (0 << 23) | /* RC Panic Enable */ + (1 << 22) | /* CBP mode */ + (0 << 21) | /* MB Type Direct Conversion, 0: Enable, 1: Disable */ + (0 << 20) | /* MB Type Skip Conversion, 0: Enable, 1: Disable */ + (!next_slice_param << 19) | /* Is Last Slice */ + (0 << 18) | /* BitstreamOutputFlag Compressed BitStream Output Disable Flag 0:enable 1:disable */ + (1 << 17) | /* HeaderPresentFlag */ + (1 << 16) | /* SliceData PresentFlag */ + (0 << 15) | /* TailPresentFlag, TODO: check it on VDEnc */ + (1 << 13) | /* RBSP NAL TYPE */ + (1 << 12)); /* CabacZeroWordInsertionEnable */ + + OUT_BCS_BATCH(batch, vdenc_context->compressed_bitstream.start_offset); + + OUT_BCS_BATCH(batch, + (max_qp_n << 24) | /*Target QP - 24 is lowest QP*/ + (max_qp_p << 16) | /*Target QP + 20 is highest QP*/ + (shrink << 8) | + (grow << 0)); + OUT_BCS_BATCH(batch, + (1 << 31) | + (3 << 28) | + (1 << 27) | + (5 << 24) | + (correct[5] << 20) | + (correct[4] << 16) | + (correct[3] << 12) | + (correct[2] << 8) | + (correct[1] << 4) | + (correct[0] << 0)); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static uint8_t +gen9_vdenc_mfx_get_ref_idx_state(VAPictureH264 *va_pic, unsigned int frame_store_id) +{ + unsigned int is_long_term = + !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); + unsigned int is_top_field = + !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD); + unsigned int is_bottom_field = + !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + + return ((is_long_term << 6) | + ((is_top_field ^ is_bottom_field ^ 1) << 5) | + (frame_store_id << 1) | + ((is_top_field ^ 1) & is_bottom_field)); +} + +static void +gen9_vdenc_mfx_avc_ref_idx_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + VAEncSliceParameterBufferH264 *slice_param) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAPictureH264 *ref_pic; + int i, slice_type, ref_idx_shift; + unsigned int fwd_ref_entry; + + fwd_ref_entry = 0x80808080; + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + + for (i = 0; i < MAX(vdenc_context->num_refs[0], 2); i++) { + ref_pic = &slice_param->RefPicList0[i]; + ref_idx_shift = vdenc_context->list_ref_idx[0][i] * 8; + + fwd_ref_entry &= ~(0xFF << ref_idx_shift); + fwd_ref_entry += (gen9_vdenc_mfx_get_ref_idx_state(ref_pic, vdenc_context->list_ref_idx[0][i]) << ref_idx_shift); + } + + if (slice_type == SLICE_TYPE_P) { + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | 8); + OUT_BCS_BATCH(batch, 0); // L0 + OUT_BCS_BATCH(batch, fwd_ref_entry); + + for (i = 0; i < 7; i++) { + OUT_BCS_BATCH(batch, 0x80808080); + } + + ADVANCE_BCS_BATCH(batch); + } + + if (slice_type == SLICE_TYPE_B) { + /* VDEnc on SKL doesn't support BDW */ + assert(0); + } +} + +static void +gen9_vdenc_mfx_avc_weightoffset_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + int i, slice_type; + short weightoffsets[32 * 6]; + + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + + if (slice_type == SLICE_TYPE_P && + pic_param->pic_fields.bits.weighted_pred_flag == 1) { + + for (i = 0; i < 32; i++) { + weightoffsets[i * 6 + 0] = slice_param->luma_weight_l0[i]; + weightoffsets[i * 6 + 1] = slice_param->luma_offset_l0[i]; + weightoffsets[i * 6 + 2] = slice_param->chroma_weight_l0[i][0]; + weightoffsets[i * 6 + 3] = slice_param->chroma_offset_l0[i][0]; + weightoffsets[i * 6 + 4] = slice_param->chroma_weight_l0[i][1]; + weightoffsets[i * 6 + 5] = slice_param->chroma_offset_l0[i][1]; + } + + BEGIN_BCS_BATCH(batch, 98); + OUT_BCS_BATCH(batch, MFX_AVC_WEIGHTOFFSET_STATE | (98 - 2)); + OUT_BCS_BATCH(batch, 0); + intel_batchbuffer_data(batch, weightoffsets, sizeof(weightoffsets)); + + ADVANCE_BCS_BATCH(batch); + } + + if (slice_type == SLICE_TYPE_B) { + /* VDEnc on SKL doesn't support BWD */ + assert(0); + } +} + +static void +gen9_vdenc_mfx_avc_single_slice(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + VAEncSliceParameterBufferH264 *slice_param, + VAEncSliceParameterBufferH264 *next_slice_param, + int slice_index) +{ + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + + gen9_vdenc_mfx_avc_ref_idx_state(ctx, encode_state, encoder_context, slice_param); + gen9_vdenc_mfx_avc_weightoffset_state(ctx, + encode_state, + encoder_context, + pic_param, + slice_param); + gen9_vdenc_mfx_avc_slice_state(ctx, + encode_state, + encoder_context, + pic_param, + slice_param, + next_slice_param); + gen9_vdenc_mfx_avc_inset_headers(ctx, + encode_state, + encoder_context, + slice_param, + slice_index); +} + +static void +gen9_vdenc_mfx_vdenc_avc_slices(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gpe_mi_flush_dw_parameter mi_flush_dw_params; + VAEncSliceParameterBufferH264 *slice_param, *next_slice_param, *next_slice_group_param; + int i, j; + int slice_index = 0; + int is_frame_level_vdenc = 1; /* TODO: check it for SKL */ + int has_tail = 0; /* TODO: check it later */ + + for (j = 0; j < encode_state->num_slice_params_ext; j++) { + slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[j]->buffer; + + if (j == encode_state->num_slice_params_ext - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[j + 1]->buffer; + + for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) { + if (i < encode_state->slice_params_ext[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + gen9_vdenc_mfx_avc_single_slice(ctx, + encode_state, + encoder_context, + slice_param, + next_slice_param, + slice_index); + slice_param++; + slice_index++; + + if (is_frame_level_vdenc) + break; + else { + /* TODO: remove assert(0) and add other commands here */ + assert(0); + } + } + + if (is_frame_level_vdenc) + break; + } + + if (is_frame_level_vdenc) { + struct vd_pipeline_flush_parameter pipeline_flush_params; + + gen9_vdenc_vdenc_walker_state(ctx, encode_state, encoder_context); + + memset(&pipeline_flush_params, 0, sizeof(pipeline_flush_params)); + pipeline_flush_params.mfx_pipeline_done = !has_tail; + pipeline_flush_params.vdenc_pipeline_done = 1; + pipeline_flush_params.vdenc_pipeline_command_flush = 1; + pipeline_flush_params.vd_command_message_parser_done = 1; + gen9_vdenc_vd_pipeline_flush(ctx, encoder_context, &pipeline_flush_params); + } + + if (has_tail) { + /* TODO: insert a tail if required */ + } + + memset(&mi_flush_dw_params, 0, sizeof(mi_flush_dw_params)); + mi_flush_dw_params.video_pipeline_cache_invalidate = 1; + gen9_gpe_mi_flush_dw(ctx, batch, &mi_flush_dw_params); +} + +static void +gen9_vdenc_mfx_vdenc_pipeline(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gpe_mi_batch_buffer_start_parameter mi_batch_buffer_start_params; + + if (vdenc_context->brc_enabled) { + struct gpe_mi_conditional_batch_buffer_end_parameter mi_conditional_batch_buffer_end_params; + + memset(&mi_conditional_batch_buffer_end_params, 0, sizeof(mi_conditional_batch_buffer_end_params)); + mi_conditional_batch_buffer_end_params.bo = vdenc_context->huc_status2_res.bo; + gen9_gpe_mi_conditional_batch_buffer_end(ctx, batch, &mi_conditional_batch_buffer_end_params); + } + + if (vdenc_context->current_pass) { + struct gpe_mi_conditional_batch_buffer_end_parameter mi_conditional_batch_buffer_end_params; + + memset(&mi_conditional_batch_buffer_end_params, 0, sizeof(mi_conditional_batch_buffer_end_params)); + mi_conditional_batch_buffer_end_params.bo = vdenc_context->huc_status_res.bo; + gen9_gpe_mi_conditional_batch_buffer_end(ctx, batch, &mi_conditional_batch_buffer_end_params); + } + + gen9_vdenc_mfx_pipe_mode_select(ctx, encode_state, encoder_context); + + gen9_vdenc_mfx_surface_state(ctx, encoder_context, &vdenc_context->recon_surface_res, 0); + gen9_vdenc_mfx_surface_state(ctx, encoder_context, &vdenc_context->uncompressed_input_surface_res, 4); + gen9_vdenc_mfx_surface_state(ctx, encoder_context, &vdenc_context->scaled_4x_recon_surface_res, 5); + + gen9_vdenc_mfx_pipe_buf_addr_state(ctx, encoder_context); + gen9_vdenc_mfx_ind_obj_base_addr_state(ctx, encoder_context); + gen9_vdenc_mfx_bsp_buf_base_addr_state(ctx, encoder_context); + + gen9_vdenc_vdenc_pipe_mode_select(ctx, encode_state, encoder_context); + gen9_vdenc_vdenc_src_surface_state(ctx, encoder_context, &vdenc_context->uncompressed_input_surface_res); + gen9_vdenc_vdenc_ref_surface_state(ctx, encoder_context, &vdenc_context->recon_surface_res); + gen9_vdenc_vdenc_ds_ref_surface_state(ctx, encoder_context, &vdenc_context->scaled_4x_recon_surface_res); + gen9_vdenc_vdenc_pipe_buf_addr_state(ctx, encode_state, encoder_context); + gen9_vdenc_vdenc_const_qpt_state(ctx, encode_state, encoder_context); + + if (!vdenc_context->brc_enabled) { + gen9_vdenc_mfx_avc_img_state(ctx, encode_state, encoder_context); + gen9_vdenc_vdenc_img_state(ctx, encode_state, encoder_context); + } else { + memset(&mi_batch_buffer_start_params, 0, sizeof(mi_batch_buffer_start_params)); + mi_batch_buffer_start_params.is_second_level = 1; /* Must be the second level batch buffer */ + mi_batch_buffer_start_params.bo = vdenc_context->second_level_batch_res.bo; + gen9_gpe_mi_batch_buffer_start(ctx, batch, &mi_batch_buffer_start_params); + } + + gen9_vdenc_mfx_avc_qm_state(ctx, encoder_context); + gen9_vdenc_mfx_avc_fqm_state(ctx, encoder_context); + + gen9_vdenc_mfx_vdenc_avc_slices(ctx, encode_state, encoder_context); +} + +static void +gen9_vdenc_context_brc_prepare(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + unsigned int rate_control_mode = encoder_context->rate_control_mode; + + switch (rate_control_mode & 0x7f) { + case VA_RC_CBR: + vdenc_context->internal_rate_mode = I965_BRC_CBR; + break; + + case VA_RC_VBR: + vdenc_context->internal_rate_mode = I965_BRC_VBR; + break; + + case VA_RC_CQP: + default: + vdenc_context->internal_rate_mode = I965_BRC_CQP; + break; + } +} + +static void +gen9_vdenc_read_status(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gpe_mi_store_register_mem_parameter mi_store_register_mem_params; + struct gpe_mi_flush_dw_parameter mi_flush_dw_params; + unsigned int base_offset = vdenc_context->status_bffuer.base_offset; + int i; + + memset(&mi_flush_dw_params, 0, sizeof(mi_flush_dw_params)); + gen9_gpe_mi_flush_dw(ctx, batch, &mi_flush_dw_params); + + memset(&mi_store_register_mem_params, 0, sizeof(mi_store_register_mem_params)); + mi_store_register_mem_params.mmio_offset = MFC_BITSTREAM_BYTECOUNT_FRAME_REG; /* TODO: fix it if VDBOX2 is used */ + mi_store_register_mem_params.bo = vdenc_context->status_bffuer.res.bo; + mi_store_register_mem_params.offset = base_offset + vdenc_context->status_bffuer.bytes_per_frame_offset; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_register_mem_params); + + /* Update DMEM buffer for BRC Update */ + for (i = 0; i < NUM_OF_BRC_PAK_PASSES; i++) { + mi_store_register_mem_params.mmio_offset = MFC_BITSTREAM_BYTECOUNT_FRAME_REG; /* TODO: fix it if VDBOX2 is used */ + mi_store_register_mem_params.bo = vdenc_context->brc_update_dmem_res[i].bo; + mi_store_register_mem_params.offset = 5 * sizeof(uint32_t); + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_register_mem_params); + + mi_store_register_mem_params.mmio_offset = MFC_IMAGE_STATUS_CTRL_REG; /* TODO: fix it if VDBOX2 is used */ + mi_store_register_mem_params.bo = vdenc_context->brc_update_dmem_res[i].bo; + mi_store_register_mem_params.offset = 7 * sizeof(uint32_t); + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_register_mem_params); + } +} + +static VAStatus +gen9_vdenc_avc_check_capability(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAEncSliceParameterBufferH264 *slice_param; + int i, j; + + for (j = 0; j < encode_state->num_slice_params_ext; j++) { + slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[j]->buffer; + + for (i = 0; i < encode_state->slice_params_ext[j]->num_elements; i++) { + if (slice_param->slice_type == SLICE_TYPE_B) + return VA_STATUS_ERROR_UNKNOWN; + + slice_param++; + } + } + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vdenc_avc_encode_picture(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus va_status; + struct gen9_vdenc_context *vdenc_context = encoder_context->mfc_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + + va_status = gen9_vdenc_avc_check_capability(ctx, encode_state, encoder_context); + + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + gen9_vdenc_avc_prepare(ctx, profile, encode_state, encoder_context); + + for (vdenc_context->current_pass = 0; vdenc_context->current_pass < vdenc_context->num_passes; vdenc_context->current_pass++) { + vdenc_context->is_first_pass = (vdenc_context->current_pass == 0); + vdenc_context->is_last_pass = (vdenc_context->current_pass == (vdenc_context->num_passes - 1)); + + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + + if (vdenc_context->brc_enabled) { + if (!vdenc_context->brc_initted || vdenc_context->brc_need_reset) + gen9_vdenc_huc_brc_init_reset(ctx, encode_state, encoder_context); + + gen9_vdenc_huc_brc_update(ctx, encode_state, encoder_context); + intel_batchbuffer_emit_mi_flush(batch); + } + + gen9_vdenc_mfx_vdenc_pipeline(ctx, encode_state, encoder_context); + gen9_vdenc_read_status(ctx, encoder_context); + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + + vdenc_context->brc_initted = 1; + vdenc_context->brc_need_reset = 0; + } + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vdenc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus; + + switch (profile) { + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + vaStatus = gen9_vdenc_avc_encode_picture(ctx, profile, encode_state, encoder_context); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + + return vaStatus; +} + +static void +gen9_vdenc_free_resources(struct gen9_vdenc_context *vdenc_context) +{ + int i; + + i965_free_gpe_resource(&vdenc_context->brc_init_reset_dmem_res); + i965_free_gpe_resource(&vdenc_context->brc_history_buffer_res); + i965_free_gpe_resource(&vdenc_context->brc_stream_in_res); + i965_free_gpe_resource(&vdenc_context->brc_stream_out_res); + i965_free_gpe_resource(&vdenc_context->huc_dummy_res); + + for (i = 0; i < NUM_OF_BRC_PAK_PASSES; i++) + i965_free_gpe_resource(&vdenc_context->brc_update_dmem_res[i]); + + i965_free_gpe_resource(&vdenc_context->vdenc_statistics_res); + i965_free_gpe_resource(&vdenc_context->pak_statistics_res); + i965_free_gpe_resource(&vdenc_context->vdenc_avc_image_state_res); + i965_free_gpe_resource(&vdenc_context->hme_detection_summary_buffer_res); + i965_free_gpe_resource(&vdenc_context->brc_constant_data_res); + i965_free_gpe_resource(&vdenc_context->second_level_batch_res); + + i965_free_gpe_resource(&vdenc_context->huc_status_res); + i965_free_gpe_resource(&vdenc_context->huc_status2_res); + + i965_free_gpe_resource(&vdenc_context->recon_surface_res); + i965_free_gpe_resource(&vdenc_context->scaled_4x_recon_surface_res); + i965_free_gpe_resource(&vdenc_context->post_deblocking_output_res); + i965_free_gpe_resource(&vdenc_context->pre_deblocking_output_res); + + for (i = 0; i < ARRAY_ELEMS(vdenc_context->list_reference_res); i++) { + i965_free_gpe_resource(&vdenc_context->list_reference_res[i]); + i965_free_gpe_resource(&vdenc_context->list_scaled_4x_reference_res[i]); + } + + i965_free_gpe_resource(&vdenc_context->uncompressed_input_surface_res); + i965_free_gpe_resource(&vdenc_context->compressed_bitstream.res); + i965_free_gpe_resource(&vdenc_context->status_bffuer.res); + + i965_free_gpe_resource(&vdenc_context->mfx_intra_row_store_scratch_res); + i965_free_gpe_resource(&vdenc_context->mfx_deblocking_filter_row_store_scratch_res); + i965_free_gpe_resource(&vdenc_context->mfx_bsd_mpc_row_store_scratch_res); + i965_free_gpe_resource(&vdenc_context->vdenc_row_store_scratch_res); + + i965_free_gpe_resource(&vdenc_context->vdenc_streamin_res); +} + +static void +gen9_vdenc_context_destroy(void *context) +{ + struct gen9_vdenc_context *vdenc_context = context; + + gen9_vdenc_free_resources(vdenc_context); + + free(vdenc_context); +} + +static void +gen9_vdenc_allocate_resources(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct gen9_vdenc_context *vdenc_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->brc_init_reset_dmem_res, + ALIGN(sizeof(struct huc_brc_init_dmem), 64), + "HuC Init&Reset DMEM buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->brc_history_buffer_res, + ALIGN(HUC_BRC_HISTORY_BUFFER_SIZE, 0x1000), + "HuC History buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->brc_stream_in_res, + ALIGN(HUC_BRC_STREAM_INOUT_BUFFER_SIZE, 0x1000), + "HuC Stream In buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->brc_stream_out_res, + ALIGN(HUC_BRC_STREAM_INOUT_BUFFER_SIZE, 0x1000), + "HuC Stream Out buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->huc_dummy_res, + 0x1000, + "HuC dummy buffer"); + + for (i = 0; i < NUM_OF_BRC_PAK_PASSES; i++) { + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->brc_update_dmem_res[i], + ALIGN(sizeof(struct huc_brc_update_dmem), 64), + "HuC BRC Update buffer"); + i965_zero_gpe_resource(&vdenc_context->brc_update_dmem_res[i]); + } + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->vdenc_statistics_res, + ALIGN(VDENC_STATISTICS_SIZE, 0x1000), + "VDENC statistics buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->pak_statistics_res, + ALIGN(PAK_STATISTICS_SIZE, 0x1000), + "PAK statistics buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->vdenc_avc_image_state_res, + ALIGN(VDENC_AVC_IMAGE_STATE_SIZE, 0x1000), + "VDENC/AVC image state buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->hme_detection_summary_buffer_res, + ALIGN(HME_DETECTION_SUMMARY_BUFFER_SIZE, 0x1000), + "HME summary buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->brc_constant_data_res, + ALIGN(BRC_CONSTANT_DATA_SIZE, 0x1000), + "BRC constant buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->second_level_batch_res, + ALIGN(VDENC_AVC_IMAGE_STATE_SIZE, 0x1000), + "Second level batch buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->huc_status_res, + 0x1000, + "HuC Status buffer"); + + ALLOC_VDENC_BUFFER_RESOURCE(vdenc_context->huc_status2_res, + 0x1000, + "HuC Status buffer"); +} + +static VAStatus +gen9_vdenc_context_get_status(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_coded_buffer_segment *coded_buffer_segment) +{ + struct gen9_vdenc_status *vdenc_status = (struct gen9_vdenc_status *)coded_buffer_segment->codec_private_data; + + coded_buffer_segment->base.size = vdenc_status->bytes_per_frame; + + return VA_STATUS_SUCCESS; +} + +Bool +gen9_vdenc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_vdenc_context *vdenc_context = calloc(1, sizeof(struct gen9_vdenc_context)); + + if (!vdenc_context) + return False; + + vdenc_context->brc_initted = 0; + vdenc_context->brc_need_reset = 0; + vdenc_context->is_low_delay = 0; + vdenc_context->current_pass = 0; + vdenc_context->num_passes = 1; + vdenc_context->vdenc_streamin_enable = 0; + vdenc_context->vdenc_pak_threshold_check_enable = 0; + + gen9_vdenc_allocate_resources(ctx, encoder_context, vdenc_context); + + encoder_context->mfc_context = vdenc_context; + encoder_context->mfc_context_destroy = gen9_vdenc_context_destroy; + encoder_context->mfc_pipeline = gen9_vdenc_pipeline; + encoder_context->mfc_brc_prepare = gen9_vdenc_context_brc_prepare; + encoder_context->get_status = gen9_vdenc_context_get_status; + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vdenc.h intel-vaapi-driver-1.7.1/src/gen9_vdenc.h --- intel-vaapi-driver-1.0.15/src/gen9_vdenc.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vdenc.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,908 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * + */ + +#ifndef GEN9_VDENC_H +#define GEN9_VDENC_H + +#include +#include +#include + +#include "i965_gpe_utils.h" +#include "i965_encoder.h" + +struct encode_state; + +#define HUC_BRC_INIT_RESET 4 +#define HUC_BRC_UPDATE 5 + +#define HUC_DMEM_DATA_OFFSET 0x2000 + +#define NUM_OF_BRC_PAK_PASSES 2 + +#define HUC_BRC_HISTORY_BUFFER_SIZE 832 +#define HUC_BRC_STREAM_INOUT_BUFFER_SIZE 4096 +#define VDENC_STATISTICS_SIZE 128 +#define PAK_STATISTICS_SIZE 256 +#define VDENC_AVC_IMAGE_STATE_SIZE (sizeof(struct gen9_mfx_avc_img_state) + sizeof(struct gen9_vdenc_img_state) + 2 * sizeof(int)) +#define HME_DETECTION_SUMMARY_BUFFER_SIZE 256 +#define BRC_CONSTANT_DATA_SIZE 4096 +#define BRC_DEBUG_OUTPUT_SIZE 4096 + +#define HUC_STATUS_MMIO_OFFSET 0x0D000 + +#define SCALE_FACTOR_4X 4 + +#define VDENC_FRAME_I 0 +#define VDENC_FRAME_P 1 + +#define VDENC_LUTMODE_INTRA_NONPRED 0x00 +#define VDENC_LUTMODE_INTRA 0x01 +#define VDENC_LUTMODE_INTRA_16x16 0x01 +#define VDENC_LUTMODE_INTRA_8x8 0x02 +#define VDENC_LUTMODE_INTRA_4x4 0x03 +#define VDENC_LUTMODE_INTER_16x8 0x04 +#define VDENC_LUTMODE_INTER_8x16 0x04 +#define VDENC_LUTMODE_INTER_8X8Q 0x05 +#define VDENC_LUTMODE_INTER_8X4Q 0x06 +#define VDENC_LUTMODE_INTER_4X8Q 0x06 +#define VDENC_LUTMODE_INTER_16x8_FIELD 0x06 +#define VDENC_LUTMODE_INTER_4X4Q 0x07 +#define VDENC_LUTMODE_INTER_8x8_FIELD 0x07 +#define VDENC_LUTMODE_INTER 0x08 +#define VDENC_LUTMODE_INTER_16x16 0x08 +#define VDENC_LUTMODE_INTER_BWD 0x09 +#define VDENC_LUTMODE_REF_ID 0x0A +#define VDENC_LUTMODE_INTRA_CHROMA 0x0B + +#define WIDTH_IN_MACROBLOCKS(width) (ALIGN(width, 16) >> 4) +#define HEIGHT_IN_MACROBLOCKS(height) (ALIGN(height, 16) >> 4) + +struct gen9_mfx_avc_img_state +{ + union { + struct { + uint32_t dword_length:16; + uint32_t sub_opcode_b:5; + uint32_t sub_opcode_a:3; + uint32_t command_opcode:3; + uint32_t pipeline:2; + uint32_t command_type:3; + }; + + uint32_t value; + } dw0; + + struct { + uint32_t frame_size_in_mbs_minus1:16; + uint32_t pad0:16; + } dw1; + + struct { + uint32_t frame_width_in_mbs_minus1:8; + uint32_t pad0:8; + uint32_t frame_height_in_mbs_minus1:8; + uint32_t pad1:8; + } dw2; + + struct { + uint32_t pad0:8; + uint32_t image_structure:2; + uint32_t weighted_bipred_idc:2; + uint32_t weighted_pred_flag:1; + uint32_t brc_domain_rate_control_enable:1; + uint32_t pad1:2; + uint32_t chroma_qp_offset:5; + uint32_t pad2:3; + uint32_t second_chroma_qp_offset:5; + uint32_t pad3:3; + } dw3; + + struct { + uint32_t field_picture_flag:1; + uint32_t mbaff_mode_active:1; + uint32_t frame_mb_only_flag:1; + uint32_t transform_8x8_idct_mode_flag:1; + uint32_t direct_8x8_interface_flag:1; + uint32_t constrained_intra_prediction_flag:1; + uint32_t current_img_dispoable_flag:1; + uint32_t entropy_coding_flag:1; + uint32_t mb_mv_format_flag:1; + uint32_t pad0:1; + uint32_t chroma_format_idc:2; + uint32_t mv_unpacked_flag:1; + uint32_t insert_test_flag:1; + uint32_t load_slice_pointer_flag:1; + uint32_t macroblock_stat_enable:1; + uint32_t minimum_frame_size:16; + } dw4; + + struct { + uint32_t intra_mb_max_bit_flag:1; + uint32_t inter_mb_max_bit_flag:1; + uint32_t frame_size_over_flag:1; + uint32_t frame_size_under_flag:1; + uint32_t pad0:3; + uint32_t intra_mb_ipcm_flag:1; + uint32_t pad1:1; + uint32_t mb_rate_ctrl_flag:1; + uint32_t min_frame_size_units:2; + uint32_t inter_mb_zero_cbp_flag:1; + uint32_t pad2:3; + uint32_t non_first_pass_flag:1; + uint32_t pad3:10; + uint32_t aq_chroma_disable:1; + uint32_t aq_rounding:3; + uint32_t aq_enable:1; + } dw5; + + struct { + uint32_t intra_mb_max_size:12; + uint32_t pad0:4; + uint32_t inter_mb_max_size:12; + uint32_t pad1:4; + } dw6; + + struct { + uint32_t pad0; + } dw7; + + struct { + uint32_t slice_delta_qp_max0:8; + uint32_t slice_delta_qp_max1:8; + uint32_t slice_delta_qp_max2:8; + uint32_t slice_delta_qp_max3:8; + } dw8; + + struct { + uint32_t slice_delta_qp_min0:8; + uint32_t slice_delta_qp_min1:8; + uint32_t slice_delta_qp_min2:8; + uint32_t slice_delta_qp_min3:8; + } dw9; + + struct { + uint32_t frame_bitrate_min:14; + uint32_t frame_bitrate_min_unit_mode:1; + uint32_t frame_bitrate_min_unit:1; + uint32_t frame_bitrate_max:14; + uint32_t frame_bitrate_max_unit_mode:1; + uint32_t frame_bitrate_max_unit:1; + } dw10; + + struct { + uint32_t frame_bitrate_min_delta:15; + uint32_t pad0:1; + uint32_t frame_bitrate_max_delta:15; + uint32_t pad1:1; + } dw11; + + struct { + uint32_t pad0:18; + uint32_t vad_error_logic:1; + uint32_t pad1:13; + } dw12; + + struct { + uint32_t pic_qp_init_minus26:8; + uint32_t pic_num_ref_idx_l0_active_minus1:6; + uint32_t pad0:2; + uint32_t pic_num_ref_idx_l1_active_minus1:6; + uint32_t pad1:2; + uint32_t num_ref_frames:5; + uint32_t is_curr_pic_has_mmco5:1; + } dw13; + + struct { + uint32_t pic_order_present_flag:1; + uint32_t delta_pic_order_always_zero_flag:1; + uint32_t pic_order_cnt_type:2; + uint32_t pad0:4; + uint32_t slice_group_map_type:3; + uint32_t redundant_pic_cnt_present_flag:1; + uint32_t num_slice_groups_minus1:3; + uint32_t deblock_filter_ctrl_present_flag:1; + uint32_t log2_max_frame_num_minus4:8; + uint32_t log2_max_pic_order_cnt_lsb_minus4:8; + } dw14; + + struct { + uint32_t slice_group_change_rate:16; + uint32_t curr_pic_frame_num:16; + } dw15; + + struct { + uint32_t current_frame_view_id:10; + uint32_t pad0:2; + uint32_t max_view_idx_l0:4; + uint32_t pad1:2; + uint32_t max_view_idx_l1:4; + uint32_t pad2:9; + uint32_t inter_view_order_disable:1; + } dw16; + + struct { + uint32_t fqp:3; // Must be zero for SKL + uint32_t fqp_offset:3; // Must be zero for SKL + uint32_t pad0:2; + uint32_t ext_brc_dm_stat_en:1; // Must be zero for SKL + uint32_t pad1:7; + uint32_t brc_dm_avg_mb_qp:6; // Must be zero for SKL + uint32_t pad2:10; + } dw17; + + struct { + uint32_t brc_domain_target_frame_size; + } dw18; + + struct { + uint32_t threshold_size_in_bytes; + } dw19; + + struct { + uint32_t target_slice_size_in_bytes; + } dw20; +}; + +struct gen9_image_state_cost +{ + struct { + uint32_t mv0_cost:8; + uint32_t mv1_cost:8; + uint32_t mv2_cost:8; + uint32_t mv3_cost:8; + } dw0; + + struct { + uint32_t mv4_cost:8; + uint32_t mv5_cost:8; + uint32_t mv6_cost:8; + uint32_t mv7_cost:8; + } dw1; +}; + +struct gen9_vdenc_img_state +{ + union { + struct { + uint32_t dword_length:12; + uint32_t pad0:4; + uint32_t sub_opcode_b:5; + uint32_t sub_opcode_a:2; + uint32_t command_opcode:4; + uint32_t pipeline:2; + uint32_t command_type:3; + }; + + uint32_t value; + } dw0; + + struct { + uint32_t pad0:2; + uint32_t bidirectional_mix_disable:1; + uint32_t pad1:1; + uint32_t time_budget_overflow_check:1; + uint32_t pad2:2; + uint32_t transform_8x8_flag:1; + uint32_t vdenc_l1_cache_priority:2; + uint32_t pad3:22; + } dw1; + + struct { + uint32_t pad0:16; + uint32_t bidirectional_weight:6; + uint32_t pad1:6; + uint32_t unidirection_mix_disable:1; + uint32_t pad2:3; + } dw2; + + struct { + uint32_t pad0:16; + uint32_t picture_width:16; + } dw3; + + struct { + uint32_t pad0:12; + uint32_t subpel_mode:2; + uint32_t pad1:3; + uint32_t forward_transform_skip_check_enable:1; + uint32_t bme_disable_for_fbr_message:1; + uint32_t block_based_skip_enabled:1; + uint32_t inter_sad_measure_adjustment:2; + uint32_t intra_sad_measure_adjustment:2; + uint32_t sub_macroblock_sub_partition_mask:7; + uint32_t block_based_skip_type:1; + } dw4; + + struct { + uint32_t picture_height_minus1:16; + uint32_t cre_prefetch_enable:1; + uint32_t hme_ref1_disable:1; + uint32_t mb_slice_threshold_value:4; + uint32_t pad0:4; + uint32_t constrained_intra_prediction_flag:1; + uint32_t pad1:2; + uint32_t picture_type:2; + uint32_t pad2:1; + } dw5; + + struct { + uint32_t slice_macroblock_height_minus1:16; + uint32_t pad0:16; + } dw6; + + struct { + uint32_t pad0; + } dw7; + + struct { + uint32_t luma_intra_partition_mask:5; + uint32_t non_skip_zero_mv_const_added:1; + uint32_t non_skip_mb_mode_const_added:1; + uint32_t pad0:9; + uint32_t mv_cost_scaling_factor:2; + uint32_t bilinear_filter_enable:1; + uint32_t pad1:3; + uint32_t ref_id_cost_mode_select:1; + uint32_t pad2:9; + } dw8; + + struct { + uint32_t mode0_cost:8; + uint32_t mode1_cost:8; + uint32_t mode2_cost:8; + uint32_t mode3_cost:8; + } dw9; + + struct { + uint32_t mode4_cost:8; + uint32_t mode5_cost:8; + uint32_t mode6_cost:8; + uint32_t mode7_cost:8; + } dw10; + + struct { + uint32_t mode8_cost:8; + uint32_t mode9_cost:8; + uint32_t ref_id_cost:8; + uint32_t chroma_intra_mode_cost:8; + } dw11; + + struct { + struct gen9_image_state_cost mv_cost; + } dw12_13; + + struct { + uint32_t qp_prime_y:8; + uint32_t pad0:16; + uint32_t target_size_in_word:8; + } dw14; + + struct { + uint32_t pad0; + } dw15; + + struct { + uint32_t pad0; + } dw16; + + struct { + uint32_t avc_intra_4x4_mode_mask:9; + uint32_t pad0:7; + uint32_t avc_intra_8x8_mode_mask:9; + uint32_t pad1:7; + } dw17; + + struct { + uint32_t avc_intra_16x16_mode_mask:4; + uint32_t avc_intra_chroma_mode_mask:4; + uint32_t intra_compute_type_intra_compute_type:2; + uint32_t pad0:22; + } dw18; + + struct { + uint32_t pad0; + } dw19; + + struct { + uint32_t penalty_for_intra_16x16_non_dc_prediction:8; + uint32_t penalty_for_intra_8x8_non_dc_prediction:8; + uint32_t penalty_for_intra_4x4_non_dc_prediction:8; + uint32_t pad0:8; + } dw20; + + struct { + uint32_t pad0; + } dw21; + + struct { + uint32_t panic_mode_mb_threadhold:16; + uint32_t small_mb_size_in_word:8; + uint32_t large_mb_size_in_word:8; + } dw22; + + struct { + uint32_t l0_number_of_reference_minus1:8; + uint32_t pad0:8; + uint32_t l1_number_of_reference_minus1:8; + uint32_t pad1:8; + } dw23; + + struct { + uint32_t pad0; + } dw24; + + struct { + uint32_t pad0; + } dw25; + + struct { + uint32_t pad0:8; + uint32_t hme_ref_windows_combining_threshold:8; + uint32_t pad1:16; + } dw26; + + struct { + uint32_t max_hmv_r:16; + uint32_t max_vmv_r:16; + } dw27; + + struct { + struct gen9_image_state_cost hme_mv_cost; + } dw28_29; + + struct { + uint32_t roi_qp_adjustment_for_zone0:4; + uint32_t roi_qp_adjustment_for_zone1:4; + uint32_t roi_qp_adjustment_for_zone2:4; + uint32_t roi_qp_adjustment_for_zone3:4; + uint32_t qp_adjustment_for_shape_best_intra_4x4_winner:4; + uint32_t qp_adjustment_for_shape_best_intra_8x8_winner:4; + uint32_t qp_adjustment_for_shape_best_intra_16x16_winner:4; + uint32_t pad0:4; + } dw30; + + struct { + uint32_t best_distortion_qp_adjustment_for_zone0:4; + uint32_t best_distortion_qp_adjustment_for_zone1:4; + uint32_t best_distortion_qp_adjustment_for_zone2:4; + uint32_t best_distortion_qp_adjustment_for_zone3:4; + uint32_t offset0_for_zone0_neg_zone1_boundary:16; + } dw31; + + struct { + uint32_t offset1_for_zone1_neg_zone2_boundary:16; + uint32_t offset2_for_zone2_neg_zone3_boundary:16; + } dw32; + + struct { + uint32_t qp_range_check_upper_bound:8; + uint32_t qp_range_check_lower_bound:8; + uint32_t pad0:8; + uint32_t qp_range_check_value:4; + uint32_t pad1:4; + } dw33; + + struct { + uint32_t roi_enable:1; + uint32_t fwd_predictor0_mv_enable:1; + uint32_t bdw_predictor1_mv_enable:1; + uint32_t mb_level_qp_enable:1; + uint32_t target_size_in_words_mb_max_size_in_words_mb_enable:1; + uint32_t pad0:3; + uint32_t ppmv_disable:1; + uint32_t coefficient_clamp_enable:1; + uint32_t long_term_reference_frame_bwd_ref0_indicator:1; + uint32_t long_term_reference_frame_fwd_ref2_indicator:1; + uint32_t long_term_reference_frame_fwd_ref1_indicator:1; + uint32_t long_term_reference_frame_fwd_ref0_indicator:1; + uint32_t image_state_qp_override:1; + uint32_t pad1:1; + uint32_t midpoint_distortion:16; + } dw34; +}; + +struct gen9_vdenc_streamin_state +{ + struct { + uint32_t roi_selection:8; + uint32_t force_intra:1; + uint32_t force_skip:1; + uint32_t pad0:22; + } dw0; + + struct { + uint32_t qp_prime_y:8; + uint32_t target_size_in_word:8; + uint32_t max_size_in_word:8; + uint32_t pad0:8; + } dw1; + + struct { + uint32_t fwd_predictor_x:16; + uint32_t fwd_predictor_y:16; + } dw2; + + struct { + uint32_t bwd_predictore_x:16; + uint32_t bwd_predictore_y:16; + } dw3; + + struct { + uint32_t fwd_ref_id0:4; + uint32_t bdw_ref_id0:4; + uint32_t pad0:24; + } dw4; + + struct { + uint32_t pad0[11]; + } dw5_15; +}; + +struct huc_brc_update_constant_data +{ + uint8_t global_rate_qp_adj_tab_i[64]; + uint8_t global_rate_qp_adj_tab_p[64]; + uint8_t global_rate_qp_adj_tab_b[64]; + uint8_t dist_threshld_i[10]; + uint8_t dist_threshld_p[10]; + uint8_t dist_threshld_b[10]; + uint8_t dist_qp_adj_tab_i[81]; + uint8_t dist_qp_adj_tab_p[81]; + uint8_t dist_qp_adj_tab_b[81]; + int8_t buf_rate_adj_tab_i[72]; + int8_t buf_rate_adj_tab_p[72]; + int8_t buf_rate_adj_tab_b[72]; + uint8_t frame_size_min_tab_p[9]; + uint8_t frame_size_min_tab_b[9]; + uint8_t frame_size_min_tab_i[9]; + uint8_t frame_size_max_tab_p[9]; + uint8_t frame_size_max_tab_b[9]; + uint8_t frame_size_max_tab_i[9]; + uint8_t frame_size_scg_tab_p[9]; + uint8_t frame_size_scg_tab_b[9]; + uint8_t frame_size_scg_tab_i[9]; + /* cost table 14*42 = 588 bytes */ + uint8_t i_intra_non_pred[42]; + uint8_t i_intra_16x16[42]; + uint8_t i_intra_8x8[42]; + uint8_t i_intra_4x4[42]; + uint8_t i_intra_chroma[42]; + uint8_t p_intra_non_pred[42]; + uint8_t p_intra_16x16[42]; + uint8_t p_intra_8x8[42]; + uint8_t p_intra_4x4[42]; + uint8_t p_intra_chroma[42]; + uint8_t p_inter_16x8[42]; + uint8_t p_inter_8x8[42]; + uint8_t p_inter_16x16[42]; + uint8_t p_ref_id[42]; + uint8_t hme_mv_cost[8][42]; + uint8_t pad0[42]; +}; + +struct huc_brc_init_dmem +{ + uint8_t brc_func; // 0: Init; 2: Reset + uint8_t os_enabled; // Always 1 + uint8_t pad0[2]; + uint16_t brc_flag; // ICQ or CQP with slice size control: 0x00 CBR: 0x10; VBR: 0x20; VCM: 0x40; LOWDELAY: 0x80. + uint16_t pad1; + uint16_t frame_width; // Luma width in bytes + uint16_t frame_height; // Luma height in bytes + uint32_t target_bitrate; // target bitrate, set by application + uint32_t min_rate; // 0 + uint32_t max_rate; // Maximum bit rate in bits per second (bps). + uint32_t buffer_size; // buffer size in bits + uint32_t init_buffer_fullness; // initial buffer fullness in bits + uint32_t profile_level_max_frame; // user defined. refer to AVC BRC HLD for conformance check and correction + uint32_t frame_rate_m; // FrameRateM is the number of frames in FrameRateD + uint32_t frame_rate_d; // If driver gets this FrameRateD from VUI, it is the num_units_in_tick field (32 bits UINT). + uint16_t num_p_in_gop; // number of P frames in a GOP + uint16_t num_b_in_gop; // number of B frames in a GOP + uint16_t min_qp; // 10 + uint16_t max_qp; // 51 + int8_t dev_thresh_pb0[8]; // lowdelay ? (-45, -33, -23, -15, -8, 0, 15, 25) : (-46, -38, -30, -23, 23, 30, 40, 46) + int8_t dev_thresh_vbr0[8]; // lowdelay ? (-45, -35, -25, -15, -8, 0, 20, 40) : (-46, -40, -32, -23, 56, 64, 83, 93) + int8_t dev_thresh_i0[8]; // lowdelay ? (-40, -30, -17, -10, -5, 0, 10, 20) : (-43, -36, -25, -18, 18, 28, 38, 46) + uint8_t init_qp_ip; // Initial QP for I and P + + uint8_t pad2; // Reserved + uint8_t init_qp_b; // Initial QP for B + uint8_t mb_qp_ctrl; // Enable MB level QP control (global) + uint8_t slice_size_ctrl_en; // Enable slice size control + int8_t intra_qp_delta[3]; // set to zero for all by default + int8_t skip_qp_delta; // Reserved + int8_t dist_qp_delta[4]; // lowdelay ? (-5, -2, 2, 5) : (0, 0, 0, 0) + uint8_t oscillation_qp_delta; // BRCFLAG_ISVCM ? 16 : 0 + uint8_t first_iframe_no_hrd_check; // BRCFLAG_ISVCM ? 1 : 0 + uint8_t skip_frame_enable_flag; + uint8_t top_qp_delta_thr_for_2nd_pass; // =1. QP Delta threshold for second pass. + uint8_t top_frame_size_threshold_for_2nd_pass; // lowdelay ? 10 : 50. Top frame size threshold for second pass + uint8_t bottom_frame_size_threshold_for_2nd_pass; // lowdelay ? 10 : 200. Bottom frame size threshold for second pass + uint8_t qp_select_for_first_pass; // lowdelay ? 0 : 1. =0 to use previous frame final QP; or =1 to use (targetQP + previousQP) / 2. + uint8_t mb_header_compensation; // Reserved + uint8_t over_shoot_carry_flag; // set to zero by default + uint8_t over_shoot_skip_frame_pct; // set to zero by default + uint8_t estrate_thresh_p0[7]; // 4, 8, 12, 16, 20, 24, 28 + uint8_t estrate_thresh_b0[7]; // 4, 8, 12, 16, 20, 24, 28 + uint8_t estrate_thresh_i0[7]; // 4, 8, 12, 16, 20, 24, 28 + uint8_t fqp_enable; // ExtendedBrcDomainEn + uint8_t scenario_info; // 0: UNKNOWN, 1: DISPLAYREMOTING, 2: VIDEOCONFERENCE, 3: ARCHIVE, 4: LIVESTREAMING. + uint8_t static_Region_streamin; // should be programmed from par file + uint8_t delta_qp_adaptation; // =1, + uint8_t max_crf_quality_factor; // =52, + uint8_t crf_quality_factor; // =25, + uint8_t bottom_qp_delta_thr_for_2nd_pass;// =1. QP Delta threshold for second pass. + uint8_t sliding_window_size; // =30, the window size (in frames) used to compute bit rate + uint8_t sliding_widow_rc_enable; // =0, sliding window based rate control (SWRC) disabled, 1: enabled + uint8_t sliding_window_max_rate_ratio; // =120, ratio between the max rate within the window and average target bitrate + uint8_t low_delay_golden_frame_boost; // only for lowdelay mode, 0 (default): no boost for I and scene change frames, 1: boost + uint8_t pad3[61]; // Must be zero +}; + +struct huc_brc_update_dmem +{ + uint8_t brc_func; // =1 for Update, other values are reserved for future use + uint8_t pad0[3]; + uint32_t target_size; // refer to AVC BRC HLD for calculation + uint32_t frame_number; // frame number + uint32_t peak_tx_bits_per_frame; // current global target bits - previous global target bits (global target bits += input bits per frame) + uint32_t frame_budget; // target time counter + uint32_t frame_byte_count; // PAK output via MMIO + uint32_t timing_budget_overflow; // PAK output via MMIO + uint32_t slice_size_violation; // PAK output via MMIO + uint32_t ipcm_non_conformant; // PAK output via MMIO + + uint16_t start_global_adjust_frame[4]; // 10, 50, 100, 150 + uint16_t mb_budget[52]; // MB bugdet for QP 0 - 51. + uint16_t target_slice_size; // target slice size + uint16_t slcsz_thr_deltai[42]; // slice size threshold delta for I frame + uint16_t slcsz_thr_deltap[42]; // slice size threshold delta for P frame + uint16_t num_of_frames_skipped; // Recording how many frames have been skipped. + uint16_t skip_frame_size; // Recording the skip frame size for one frame. =NumMBs * 1, assuming one bit per mb for skip frame. + uint16_t static_region_pct; // One entry, recording the percentage of static region + uint8_t global_rate_ratio_threshold[7]; // 80,95,99,101,105,125,160 + uint8_t current_frame_type; // I frame: 2; P frame: 0; B frame: 1. + uint8_t start_global_adjust_mult[5]; // 1, 1, 3, 2, 1 + uint8_t start_global_adjust_div[5]; // 40, 5, 5, 3, 1 + uint8_t global_rate_ratio_threshold_qp[8]; // 253,254,255,0,1,1,2,3 + uint8_t current_pak_pass; // current pak pass number + uint8_t max_num_passes; // 2 + uint8_t scene_change_width[2]; // set both to MIN((NumP + 1) / 5, 6) + uint8_t scene_change_detect_enable; // Enable scene change detection + uint8_t scene_change_prev_intra_percent_threshold; // =96. scene change previous intra percentage threshold + uint8_t scene_change_cur_intra_perent_threshold; // =192. scene change current intra percentage threshold + uint8_t ip_average_coeff; // lowdelay ? 0 : 128 + uint8_t min_qp_adjustment; // Minimum QP increase step + uint8_t timing_budget_check; // Flag indicating if kernel will check timing budget. + int8_t roi_qp_delta_i8[4]; // Application specified ROI QP Adjustment for Zone0, Zone1, Zone2 and Zone3. + uint8_t cqp_qp_value; // Application specified target QP in BRC_ICQ mode + uint8_t cqp_fqp; // Application specified fine position in BRC_ICQ mode + uint8_t hme_detection_enable; // 0: default, 1: HuC BRC kernel requires information from HME detection kernel output + uint8_t hme_cost_enable; // 0: default, 1: driver provides HME cost table + uint8_t disable_pframe_8x8_transform; + uint8_t skl_cabac_wa_enable; + uint8_t roi_source; // =0: disable, 1: ROIMap from HME Static Region or from App dirty rectangle, 2: ROIMap from App + uint8_t slice_size_consertative_threshold; // =0, 0: do not set conservative threshold (suggested for video conference) 1: set conservative threshold for non-video conference + uint16_t max_target_slice_size; // default: 1498, max target slice size from app DDI + uint16_t max_num_slice_allowed; // computed by driver based on level idc + uint16_t second_level_batchbuffer_size; // second level batch buffer (SLBB) size in bytes, the input buffer will contain two SLBBs A and B, A followed by B, A and B have the same structure. + uint16_t second_level_batchbuffer_b_offset; // offset in bytes from the beginning of the input buffer, it points to the start of SLBB B, set by driver for skip frame support + uint16_t avc_img_state_offset; // offset in bytes from the beginning of SLBB A + + /* HME distortion based QP adjustment */ + uint16_t ave_hme_dist; + uint8_t hme_dist_available; // 0: disabled, 1: enabled + + uint8_t pad1[63]; +}; + +struct gen9_vdenc_status +{ + uint32_t bytes_per_frame; +}; + +struct gen9_vdenc_context +{ + uint32_t frame_width_in_mbs; + uint32_t frame_height_in_mbs; + uint32_t frame_width; // frame_width_in_mbs * 16 + uint32_t frame_height; // frame_height_in_mbs * 16 + uint32_t down_scaled_width_in_mb4x; + uint32_t down_scaled_height_in_mb4x; + uint32_t down_scaled_width_4x; // down_scaled_width_in_mb4x * 16 + uint32_t down_scaled_height_4x; // down_scaled_height_in_mbs * 16 + + uint32_t target_bit_rate; /* in kbps */ + uint32_t max_bit_rate; /* in kbps */ + uint32_t min_bit_rate; /* in kbps */ + uint64_t init_vbv_buffer_fullness_in_bit; + uint64_t vbv_buffer_size_in_bit; + uint32_t frames_per_100s; + uint32_t gop_size; + uint32_t ref_dist; + uint32_t brc_target_size; + double brc_init_current_target_buf_full_in_bits; + double brc_init_reset_input_bits_per_frame; + uint32_t brc_init_reset_buf_size_in_bits; + uint32_t brc_init_previous_target_buf_full_in_bits; + + uint8_t mode_cost[12]; + uint8_t mv_cost[8]; + uint8_t hme_mv_cost[8]; + + uint32_t num_roi; + uint32_t max_delta_qp; + uint32_t min_delta_qp; + struct intel_roi roi[3]; + + uint32_t brc_initted:1; + uint32_t brc_need_reset:1; + uint32_t is_low_delay:1; + uint32_t brc_enabled:1; + uint32_t internal_rate_mode:4; + uint32_t current_pass:4; + uint32_t num_passes:4; + uint32_t is_first_pass:1; + uint32_t is_last_pass:1; + + uint32_t vdenc_streamin_enable:1; + uint32_t vdenc_pak_threshold_check_enable:1; + uint32_t pad1:1; + uint32_t transform_8x8_mode_enable:1; + uint32_t frame_type:2; + + uint32_t mb_brc_enabled:1; + uint32_t pad0:31; + + struct i965_gpe_resource brc_init_reset_dmem_res; + struct i965_gpe_resource brc_history_buffer_res; + struct i965_gpe_resource brc_stream_in_res; + struct i965_gpe_resource brc_stream_out_res; + struct i965_gpe_resource huc_dummy_res; + + struct i965_gpe_resource brc_update_dmem_res[NUM_OF_BRC_PAK_PASSES]; + struct i965_gpe_resource vdenc_statistics_res; + struct i965_gpe_resource pak_statistics_res; + struct i965_gpe_resource vdenc_avc_image_state_res; + struct i965_gpe_resource hme_detection_summary_buffer_res; + struct i965_gpe_resource brc_constant_data_res; + struct i965_gpe_resource second_level_batch_res; + + struct i965_gpe_resource huc_status_res; + struct i965_gpe_resource huc_status2_res; + + struct i965_gpe_resource recon_surface_res; + struct i965_gpe_resource scaled_4x_recon_surface_res; + struct i965_gpe_resource post_deblocking_output_res; + struct i965_gpe_resource pre_deblocking_output_res; + struct i965_gpe_resource list_reference_res[16]; + struct i965_gpe_resource list_scaled_4x_reference_res[16]; + struct i965_gpe_resource uncompressed_input_surface_res; // Input + + struct { + struct i965_gpe_resource res; // Output + uint32_t start_offset; + uint32_t end_offset; + } compressed_bitstream; + + struct i965_gpe_resource mfx_intra_row_store_scratch_res; // MFX internal buffer + struct i965_gpe_resource mfx_deblocking_filter_row_store_scratch_res; // MFX internal buffer + struct i965_gpe_resource mfx_bsd_mpc_row_store_scratch_res; // MFX internal buffer + struct i965_gpe_resource vdenc_row_store_scratch_res; // VDENC internal buffer + + struct i965_gpe_resource vdenc_streamin_res; + + uint32_t num_refs[2]; + uint32_t list_ref_idx[2][32]; + + struct { + struct i965_gpe_resource res; + uint32_t base_offset; + uint32_t size; + uint32_t bytes_per_frame_offset; + } status_bffuer; +}; + +struct huc_pipe_mode_select_parameter +{ + uint32_t huc_stream_object_enable; + uint32_t indirect_stream_out_enable; + uint32_t media_soft_reset_counter; +}; + +struct huc_imem_state_parameter +{ + uint32_t huc_firmware_descriptor; +}; + +struct huc_dmem_state_parameter +{ + struct i965_gpe_resource *huc_data_source_res; + uint32_t huc_data_destination_base_address; + uint32_t huc_data_length; +}; + +struct huc_cfg_state_parameter +{ + uint32_t force_reset; +}; + + +struct huc_virtual_addr_parameter +{ + struct { + struct i965_gpe_resource *huc_surface_res; + uint32_t is_target; + } regions[16]; +}; + +struct huc_ind_obj_base_addr_parameter +{ + struct i965_gpe_resource *huc_indirect_stream_in_object_res; + struct i965_gpe_resource *huc_indirect_stream_out_object_res; +}; + +struct huc_stream_object_parameter +{ + uint32_t indirect_stream_in_data_length; + uint32_t indirect_stream_in_start_address; + uint32_t indirect_stream_out_start_address; + uint32_t huc_bitstream_enable; + uint32_t length_mode; + uint32_t stream_out; + uint32_t emulation_prevention_byte_removal; + uint32_t start_code_search_engine; + uint8_t start_code_byte2; + uint8_t start_code_byte1; + uint8_t start_code_byte0; +}; + +struct huc_start_parameter +{ + uint32_t last_stream_object; +}; + +struct vd_pipeline_flush_parameter +{ + uint32_t hevc_pipeline_done; + uint32_t vdenc_pipeline_done; + uint32_t mfl_pipeline_done; + uint32_t mfx_pipeline_done; + uint32_t vd_command_message_parser_done; + uint32_t hevc_pipeline_command_flush; + uint32_t vdenc_pipeline_command_flush; + uint32_t mfl_pipeline_command_flush; + uint32_t mfx_pipeline_command_flush; +}; + +extern Bool +gen9_vdenc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +#endif /* GEN9_VDENC_H */ diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vme.c intel-vaapi-driver-1.7.1/src/gen9_vme.c --- intel-vaapi-driver-1.0.15/src/gen9_vme.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vme.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,1853 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + */ + +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "gen6_vme.h" +#include "gen6_mfc.h" + +#ifdef SURFACE_STATE_PADDED_SIZE +#undef SURFACE_STATE_PADDED_SIZE +#endif + +#define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET(index) (SURFACE_STATE_OFFSET(MAX_MEDIA_SURFACES_GEN6) + sizeof(unsigned int) * index) + +#define VME_INTRA_SHADER 0 +#define VME_INTER_SHADER 1 +#define VME_BINTER_SHADER 2 + +#define CURBE_ALLOCATION_SIZE 37 /* in 256-bit */ +#define CURBE_TOTAL_DATA_LENGTH (4 * 32) /* in byte, it should be less than or equal to CURBE_ALLOCATION_SIZE * 32 */ +#define CURBE_URB_ENTRY_LENGTH 4 /* in 256-bit, it should be less than or equal to CURBE_TOTAL_DATA_LENGTH / 32 */ + +#define VME_MSG_LENGTH 32 + +static const uint32_t gen9_vme_intra_frame[][4] = { +#include "shaders/vme/intra_frame_gen9.g9b" +}; + +static const uint32_t gen9_vme_inter_frame[][4] = { +#include "shaders/vme/inter_frame_gen9.g9b" +}; + +static const uint32_t gen9_vme_inter_bframe[][4] = { +#include "shaders/vme/inter_bframe_gen9.g9b" +}; + +static struct i965_kernel gen9_vme_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen9_vme_intra_frame, + sizeof(gen9_vme_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen9_vme_inter_frame, + sizeof(gen9_vme_inter_frame), + NULL + }, + { + "VME inter BFrame", + VME_BINTER_SHADER, + gen9_vme_inter_bframe, + sizeof(gen9_vme_inter_bframe), + NULL + } +}; + +static const uint32_t gen9_vme_mpeg2_intra_frame[][4] = { +#include "shaders/vme/intra_frame_gen9.g9b" +}; + +static const uint32_t gen9_vme_mpeg2_inter_frame[][4] = { +#include "shaders/vme/mpeg2_inter_gen9.g9b" +}; + +static struct i965_kernel gen9_vme_mpeg2_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen9_vme_mpeg2_intra_frame, + sizeof(gen9_vme_mpeg2_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen9_vme_mpeg2_inter_frame, + sizeof(gen9_vme_mpeg2_inter_frame), + NULL + }, +}; + +static const uint32_t gen9_vme_vp8_intra_frame[][4] = { +#include "shaders/vme/vp8_intra_frame_gen9.g9b" +}; + +static const uint32_t gen9_vme_vp8_inter_frame[][4] = { +#include "shaders/vme/vp8_inter_frame_gen9.g9b" +}; + +static struct i965_kernel gen9_vme_vp8_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen9_vme_vp8_intra_frame, + sizeof(gen9_vme_vp8_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen9_vme_vp8_inter_frame, + sizeof(gen9_vme_vp8_inter_frame), + NULL + }, +}; + +/* HEVC */ + +static const uint32_t gen9_vme_hevc_intra_frame[][4] = { +#include "shaders/vme/intra_frame_gen9.g9b" +}; + +static const uint32_t gen9_vme_hevc_inter_frame[][4] = { +#include "shaders/vme/inter_frame_gen9.g9b" +}; + +static const uint32_t gen9_vme_hevc_inter_bframe[][4] = { +#include "shaders/vme/inter_bframe_gen9.g9b" +}; + +static struct i965_kernel gen9_vme_hevc_kernels[] = { + { + "VME Intra Frame", + VME_INTRA_SHADER, /*index*/ + gen9_vme_hevc_intra_frame, + sizeof(gen9_vme_hevc_intra_frame), + NULL + }, + { + "VME inter Frame", + VME_INTER_SHADER, + gen9_vme_hevc_inter_frame, + sizeof(gen9_vme_hevc_inter_frame), + NULL + }, + { + "VME inter BFrame", + VME_BINTER_SHADER, + gen9_vme_hevc_inter_bframe, + sizeof(gen9_vme_hevc_inter_bframe), + NULL + } +}; +/* only used for VME source surface state */ +static void +gen9_vme_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_surface2_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen9_vme_media_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_media_rw_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen9_vme_media_chroma_source_surface_state(VADriverContextP ctx, + int index, + struct object_surface *obj_surface, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_media_chroma_surface_setup(ctx, + &vme_context->gpe_context, + obj_surface, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen9_vme_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context, + int is_intra, + int width_in_mbs, + int height_in_mbs) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2; + else + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24; + /* + * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref + * + 16 FBR Info + 128 FBR MV + 32 FBR Ref. + * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24. + */ + + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen9_vme_avc_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + gen9_vme_output_buffer_setup(ctx, encode_state, index, encoder_context, is_intra, width_in_mbs, height_in_mbs); + +} + +static void +gen9_vme_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context, + int width_in_mbs, + int height_in_mbs) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_batchbuffer, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen9_vme_avc_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + + gen9_vme_output_vme_batchbuffer_setup(ctx, encode_state, index, encoder_context, width_in_mbs, height_in_mbs); +} + + +static VAStatus +gen9_vme_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen9_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen9_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen9_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int slice_type; + + slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type); + assert(slice_type != SLICE_TYPE_I && slice_type != SLICE_TYPE_SI); + + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen9_vme_source_surface_state); + + if (slice_type == SLICE_TYPE_B) + intel_avc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen9_vme_source_surface_state); + } + + /* VME output */ + gen9_vme_avc_output_buffer_setup(ctx, encode_state, 3, encoder_context); + gen9_vme_avc_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen9_vme_interface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct gen8_interface_descriptor_data *desc; + int i; + dri_bo *bo; + unsigned char *desc_ptr; + + bo = vme_context->gpe_context.dynamic_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc_ptr = (unsigned char *)bo->virtual + vme_context->gpe_context.idrt_offset; + + desc = (struct gen8_interface_descriptor_data *)desc_ptr; + + for (i = 0; i < vme_context->vme_kernel_sum; i++) { + struct i965_kernel *kernel; + kernel = &vme_context->gpe_context.kernels[i]; + assert(sizeof(*desc) == 32); + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6; + desc->desc3.sampler_count = 0; /* FIXME: */ + desc->desc3.sampler_state_pointer = 0; + desc->desc4.binding_table_entry_count = 1; /* FIXME: */ + desc->desc4.binding_table_pointer = (BINDING_TABLE_OFFSET(0) >> 5); + desc->desc5.constant_urb_entry_read_offset = 0; + desc->desc5.constant_urb_entry_read_length = CURBE_URB_ENTRY_LENGTH; + + desc++; + } + + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen9_vme_constant_setup(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned char *constant_buffer; + unsigned int *vme_state_message; + int mv_num = 32; + + vme_state_message = (unsigned int *)vme_context->vme_state_message; + + if (encoder_context->codec == CODEC_H264 || + encoder_context->codec == CODEC_H264_MVC) { + if (vme_context->h264_level >= 30) { + mv_num = 16; + + if (vme_context->h264_level >= 31) + mv_num = 8; + } + } else if (encoder_context->codec == CODEC_MPEG2) { + mv_num = 2; + }else if (encoder_context->codec == CODEC_HEVC) { + if (vme_context->hevc_level >= 30*3) { + mv_num = 16; + + if (vme_context->hevc_level >= 31*3) + mv_num = 8; + }/* use the avc level setting */ + } + + vme_state_message[31] = mv_num; + + dri_bo_map(vme_context->gpe_context.dynamic_state.bo, 1); + assert(vme_context->gpe_context.dynamic_state.bo->virtual); + constant_buffer = (unsigned char *)vme_context->gpe_context.dynamic_state.bo->virtual + + vme_context->gpe_context.curbe_offset; + + /* VME MV/Mb cost table is passed by using const buffer */ + /* Now it uses the fixed search path. So it is constructed directly + * in the GPU shader. + */ + memcpy(constant_buffer, (char *)vme_context->vme_state_message, 128); + + dri_bo_unmap(vme_context->gpe_context.dynamic_state.bo); + + return VA_STATUS_SUCCESS; +} + +#define MB_SCOREBOARD_A (1 << 0) +#define MB_SCOREBOARD_B (1 << 1) +#define MB_SCOREBOARD_C (1 << 2) + +/* check whether the mb of (x_index, y_index) is out of bound */ +static inline int loop_in_bounds(int x_index, int y_index, int first_mb, int num_mb, int mb_width, int mb_height) +{ + int mb_index; + if (x_index < 0 || x_index >= mb_width) + return -1; + if (y_index < 0 || y_index >= mb_height) + return -1; + + mb_index = y_index * mb_width + x_index; + if (mb_index < first_mb || mb_index > (first_mb + num_mb)) + return -1; + return 0; +} + +static void +gen9wa_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_row; + int s; + unsigned int *command_ptr; + +#define USE_SCOREBOARD (1 << 21) + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + int first_mb = pSliceParameter->macroblock_address; + int num_mb = pSliceParameter->num_macroblocks; + unsigned int mb_intra_ub, score_dep; + int x_outer, y_outer, x_inner, y_inner; + int xtemp_outer = 0; + + x_outer = first_mb % mb_width; + y_outer = first_mb / mb_width; + mb_row = y_outer; + + for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + x_inner = x_outer; + y_inner = y_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + + x_inner -= 2; + y_inner += 1; + } + x_outer += 1; + } + + xtemp_outer = mb_width - 2; + if (xtemp_outer < 0) + xtemp_outer = 0; + x_outer = xtemp_outer; + y_outer = first_mb / mb_width; + for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + y_inner = y_outer; + x_inner = x_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + x_inner -= 2; + y_inner += 1; + } + x_outer++; + if (x_outer >= mb_width) { + y_outer += 1; + x_outer = xtemp_outer; + } + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void +gen9_vme_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s; + unsigned int *command_ptr; + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + int slice_mb_begin = pSliceParameter->macroblock_address; + int slice_mb_number = pSliceParameter->num_macroblocks; + unsigned int mb_intra_ub; + int slice_mb_x = pSliceParameter->macroblock_address % mb_width; + for (i = 0; i < slice_mb_number; ) { + int mb_count = i + slice_mb_begin; + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + if (i < mb_width) { + if (i == 0) + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE); + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK); + if ((i == (mb_width - 1)) && slice_mb_x) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + } + + if ((i == mb_width) && slice_mb_x) { + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D); + } + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + i += 1; + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void gen9_vme_media_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + gen8_gpe_context_init(ctx, &vme_context->gpe_context); + + /* VME output buffer */ + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + /* VME state */ + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; +} + +static void gen9_vme_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncPictureParameterBufferH264 *pPicParameter = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = pSequenceParameter->picture_width_in_mbs; + int height_in_mbs = pSequenceParameter->picture_height_in_mbs; + int kernel_shader; + bool allow_hwscore = true; + int s; + unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY); + + if (is_low_quality) + allow_hwscore = false; + else { + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer; + if ((pSliceParameter->macroblock_address % width_in_mbs)) { + allow_hwscore = false; + break; + } + } + } + + if ((pSliceParameter->slice_type == SLICE_TYPE_I) || + (pSliceParameter->slice_type == SLICE_TYPE_SI)) { + kernel_shader = VME_INTRA_SHADER; + } else if ((pSliceParameter->slice_type == SLICE_TYPE_P) || + (pSliceParameter->slice_type == SLICE_TYPE_SP)) { + kernel_shader = VME_INTER_SHADER; + } else { + kernel_shader = VME_BINTER_SHADER; + if (!allow_hwscore) + kernel_shader = VME_INTER_SHADER; + } + if (allow_hwscore) + gen9wa_vme_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + else + gen9_vme_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + pPicParameter->pic_fields.bits.transform_8x8_mode_flag, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen9_vme_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferH264 *pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == SLICE_TYPE_I; + VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if (!vme_context->h264_level || + (vme_context->h264_level != pSequenceParameter->level_idc)) { + vme_context->h264_level = pSequenceParameter->level_idc; + } + + intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context); + + /*Setup all the memory object*/ + gen9_vme_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen9_vme_interface_setup(ctx, encode_state, encoder_context); + //gen9_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context); + gen9_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen9_vme_pipeline_programing(ctx, encode_state, encoder_context); + + return vaStatus; +} + +static VAStatus gen9_vme_run(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + intel_batchbuffer_flush(batch); + + return VA_STATUS_SUCCESS; +} + +static VAStatus gen9_vme_stop(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vme_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen9_vme_media_init(ctx, encoder_context); + gen9_vme_prepare(ctx, encode_state, encoder_context); + gen9_vme_run(ctx, encode_state, encoder_context); + gen9_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vme_mpeg2_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + int is_intra, + struct intel_encoder_context *encoder_context) + +{ + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + gen9_vme_output_buffer_setup(ctx, encode_state, index, encoder_context, is_intra, width_in_mbs, height_in_mbs); +} + +static void +gen9_vme_mpeg2_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + + gen9_vme_output_vme_batchbuffer_setup(ctx, encode_state, index, encoder_context, width_in_mbs, height_in_mbs); +} + +static VAStatus +gen9_vme_mpeg2_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen9_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen9_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen9_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + /* reference 0 */ + obj_surface = encode_state->reference_objects[0]; + + if (obj_surface->bo != NULL) + gen9_vme_source_surface_state(ctx, 1, obj_surface, encoder_context); + + /* reference 1 */ + obj_surface = encode_state->reference_objects[1]; + + if (obj_surface && obj_surface->bo != NULL) + gen9_vme_source_surface_state(ctx, 2, obj_surface, encoder_context); + } + + /* VME output */ + gen9_vme_mpeg2_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context); + gen9_vme_mpeg2_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen9wa_vme_mpeg2_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + unsigned int *command_ptr; + +#define MPEG2_SCOREBOARD (1 << 21) + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + { + unsigned int mb_intra_ub, score_dep; + int x_outer, y_outer, x_inner, y_inner; + int xtemp_outer = 0; + int first_mb = 0; + int num_mb = mb_width * mb_height; + + x_outer = 0; + y_outer = 0; + + for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + x_inner = x_outer; + y_inner = y_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = MPEG2_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8)); + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + + x_inner -= 2; + y_inner += 1; + } + x_outer += 1; + } + + xtemp_outer = mb_width - 2; + if (xtemp_outer < 0) + xtemp_outer = 0; + x_outer = xtemp_outer; + y_outer = 0; + for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + y_inner = y_outer; + x_inner = x_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = MPEG2_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + x_inner -= 2; + y_inner += 1; + } + x_outer++; + if (x_outer >= mb_width) { + y_outer += 1; + x_outer = xtemp_outer; + } + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); + return; +} + +static void +gen9_vme_mpeg2_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s, j; + unsigned int *command_ptr; + + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + int slice_mb_begin = slice_param->macroblock_address; + int slice_mb_number = slice_param->num_macroblocks; + unsigned int mb_intra_ub; + + for (i = 0; i < slice_mb_number;) { + int mb_count = i + slice_mb_begin; + + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + i += 1; + } + + slice_param++; + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void +gen9_vme_mpeg2_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->picture_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->picture_height, 16) / 16; + bool allow_hwscore = true; + int s; + int kernel_shader; + VAEncPictureParameterBufferMPEG2 *pic_param = NULL; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + int j; + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[s]->buffer; + + for (j = 0; j < encode_state->slice_params_ext[s]->num_elements; j++) { + if (slice_param->macroblock_address % width_in_mbs) { + allow_hwscore = false; + break; + } + } + } + + pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + if (pic_param->picture_type == VAEncPictureTypeIntra) { + allow_hwscore = false; + kernel_shader = VME_INTRA_SHADER; + } else { + kernel_shader = VME_INTER_SHADER; + } + + if (allow_hwscore) + gen9wa_vme_mpeg2_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + encoder_context); + else + gen9_vme_mpeg2_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER, + 0, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus +gen9_vme_mpeg2_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferMPEG2 *slice_param = (VAEncSliceParameterBufferMPEG2 *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferMPEG2 *seq_param = (VAEncSequenceParameterBufferMPEG2 *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + if ((!vme_context->mpeg2_level) || + (vme_context->mpeg2_level != (seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK))) { + vme_context->mpeg2_level = seq_param->sequence_extension.bits.profile_and_level_indication & MPEG2_LEVEL_MASK; + } + + /*Setup all the memory object*/ + gen9_vme_mpeg2_surface_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + gen9_vme_interface_setup(ctx, encode_state, encoder_context); + //gen9_vme_vme_state_setup(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + intel_vme_mpeg2_state_setup(ctx, encode_state, encoder_context); + gen9_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen9_vme_mpeg2_pipeline_programing(ctx, encode_state, slice_param->is_intra_slice, encoder_context); + + return vaStatus; +} + +static VAStatus +gen9_vme_mpeg2_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen9_vme_media_init(ctx, encoder_context); + gen9_vme_mpeg2_prepare(ctx, encode_state, encoder_context); + gen9_vme_run(ctx, encode_state, encoder_context); + gen9_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vme_vp8_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + + gen9_vme_output_buffer_setup(ctx, encode_state, index, encoder_context, is_intra, width_in_mbs, height_in_mbs); +} + +static void +gen9_vme_vp8_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) +{ + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + + gen9_vme_output_vme_batchbuffer_setup(ctx, encode_state, index, encoder_context, width_in_mbs, height_in_mbs); +} + +static VAStatus +gen9_vme_vp8_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen9_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen9_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen9_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + /* reference 0 */ + obj_surface = encode_state->reference_objects[0]; + + if (obj_surface->bo != NULL) + gen9_vme_source_surface_state(ctx, 1, obj_surface, encoder_context); + + /* reference 1 */ + obj_surface = encode_state->reference_objects[1]; + + if (obj_surface && obj_surface->bo != NULL) + gen9_vme_source_surface_state(ctx, 2, obj_surface, encoder_context); + } + + /* VME output */ + gen9_vme_vp8_output_buffer_setup(ctx, encode_state, 3, is_intra, encoder_context); + gen9_vme_vp8_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vme_vp8_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncSequenceParameterBufferVP8 *seq_param = (VAEncSequenceParameterBufferVP8 *)encode_state->seq_param_ext->buffer; + int width_in_mbs = ALIGN(seq_param->frame_width, 16) / 16; + int height_in_mbs = ALIGN(seq_param->frame_height, 16) / 16; + int kernel_shader = (is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER); + + gen9wa_vme_mpeg2_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen9_vme_vp8_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncPictureParameterBufferVP8 *pPicParameter = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + int is_intra = !pPicParameter->pic_flags.bits.frame_type; + + /* update vp8 mbmv cost */ + intel_vme_vp8_update_mbmv_cost(ctx, encode_state, encoder_context); + + /*Setup all the memory object*/ + gen9_vme_vp8_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen9_vme_interface_setup(ctx, encode_state, encoder_context); + gen9_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen9_vme_vp8_pipeline_programing(ctx, encode_state, is_intra, encoder_context); + + return vaStatus; +} + +static VAStatus +gen9_vme_vp8_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen9_vme_media_init(ctx, encoder_context); + gen9_vme_vp8_prepare(ctx, encode_state, encoder_context); + gen9_vme_run(ctx, encode_state, encoder_context); + gen9_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +/* HEVC */ + +static void +gen9_vme_hevc_output_buffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == HEVC_SLICE_I; + int width_in_mbs = (pSequenceParameter->pic_width_in_luma_samples + 15)/16; + int height_in_mbs = (pSequenceParameter->pic_height_in_luma_samples + 15)/16; + + + vme_context->vme_output.num_blocks = width_in_mbs * height_in_mbs; + vme_context->vme_output.pitch = 16; /* in bytes, always 16 */ + + if (is_intra) + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 2; + else + vme_context->vme_output.size_block = INTRA_VME_OUTPUT_IN_BYTES * 24; + /* + * Inter MV . 32-byte Intra search + 16 IME info + 128 IME MV + 32 IME Ref + * + 16 FBR Info + 128 FBR MV + 32 FBR Ref. + * 16 * (2 + 2 * (1 + 8 + 2))= 16 * 24. + */ + + vme_context->vme_output.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME output buffer", + vme_context->vme_output.num_blocks * vme_context->vme_output.size_block, + 0x1000); + assert(vme_context->vme_output.bo); + vme_context->vme_buffer_suface_setup(ctx, + &vme_context->gpe_context, + &vme_context->vme_output, + BINDING_TABLE_OFFSET(index), + SURFACE_STATE_OFFSET(index)); +} + +static void +gen9_vme_hevc_output_vme_batchbuffer_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int index, + struct intel_encoder_context *encoder_context) + +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_vme_context *vme_context = encoder_context->vme_context; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int width_in_mbs = (pSequenceParameter->pic_width_in_luma_samples + 15)/16; + int height_in_mbs = (pSequenceParameter->pic_height_in_luma_samples + 15)/16; + + vme_context->vme_batchbuffer.num_blocks = width_in_mbs * height_in_mbs + 1; + vme_context->vme_batchbuffer.size_block = 64; /* 4 OWORDs */ + vme_context->vme_batchbuffer.pitch = 16; + vme_context->vme_batchbuffer.bo = dri_bo_alloc(i965->intel.bufmgr, + "VME batchbuffer", + vme_context->vme_batchbuffer.num_blocks * vme_context->vme_batchbuffer.size_block, + 0x1000); +} +static VAStatus +gen9_vme_hevc_surface_setup(VADriverContextP ctx, + struct encode_state *encode_state, + int is_intra, + struct intel_encoder_context *encoder_context) +{ + struct object_surface *obj_surface; + + /*Setup surfaces state*/ + /* current picture for encoding */ + obj_surface = encode_state->input_yuv_object; + gen9_vme_source_surface_state(ctx, 0, obj_surface, encoder_context); + gen9_vme_media_source_surface_state(ctx, 4, obj_surface, encoder_context); + gen9_vme_media_chroma_source_surface_state(ctx, 6, obj_surface, encoder_context); + + if (!is_intra) { + VAEncSliceParameterBufferHEVC *slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + int slice_type; + + slice_type = slice_param->slice_type; + assert(slice_type != HEVC_SLICE_I); + + /* to do HEVC */ + intel_hevc_vme_reference_state(ctx, encode_state, encoder_context, 0, 1, gen9_vme_source_surface_state); + + if (slice_type == HEVC_SLICE_B) + intel_hevc_vme_reference_state(ctx, encode_state, encoder_context, 1, 2, gen9_vme_source_surface_state); + } + + /* VME output */ + gen9_vme_hevc_output_buffer_setup(ctx, encode_state, 3, encoder_context); + gen9_vme_hevc_output_vme_batchbuffer_setup(ctx, encode_state, 5, encoder_context); + + return VA_STATUS_SUCCESS; +} +static void +gen9wa_vme_hevc_walker_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_row; + int s; + unsigned int *command_ptr; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int log2_cu_size = pSequenceParameter->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = pSequenceParameter->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + int ctb_size = 1 << log2_ctb_size; + int num_mb_in_ctb = (ctb_size + 15)/16; + num_mb_in_ctb = num_mb_in_ctb * num_mb_in_ctb; + +#define USE_SCOREBOARD (1 << 21) + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + /*slice_segment_address must picture_width_in_ctb alainment */ + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[s]->buffer; + int first_mb = pSliceParameter->slice_segment_address * num_mb_in_ctb; + int num_mb = pSliceParameter->num_ctu_in_slice * num_mb_in_ctb; + unsigned int mb_intra_ub, score_dep; + int x_outer, y_outer, x_inner, y_inner; + int xtemp_outer = 0; + + x_outer = first_mb % mb_width; + y_outer = first_mb / mb_width; + mb_row = y_outer; + + for (; x_outer < (mb_width -2 ) && !loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + x_inner = x_outer; + y_inner = y_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + + x_inner -= 2; + y_inner += 1; + } + x_outer += 1; + } + + xtemp_outer = mb_width - 2; + if (xtemp_outer < 0) + xtemp_outer = 0; + x_outer = xtemp_outer; + y_outer = first_mb / mb_width; + for (;!loop_in_bounds(x_outer, y_outer, first_mb, num_mb, mb_width, mb_height); ) { + y_inner = y_outer; + x_inner = x_outer; + for (; !loop_in_bounds(x_inner, y_inner, first_mb, num_mb, mb_width, mb_height);) { + mb_intra_ub = 0; + score_dep = 0; + if (x_inner != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + score_dep |= MB_SCOREBOARD_A; + } + if (y_inner != mb_row) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + score_dep |= MB_SCOREBOARD_B; + if (x_inner != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + + if (x_inner != (mb_width -1)) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + score_dep |= MB_SCOREBOARD_C; + } + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = USE_SCOREBOARD; + /* Indirect data */ + *command_ptr++ = 0; + /* the (X, Y) term of scoreboard */ + *command_ptr++ = ((y_inner << 16) | x_inner); + *command_ptr++ = score_dep; + /*inline data */ + *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner); + *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + x_inner -= 2; + y_inner += 1; + } + x_outer++; + if (x_outer >= mb_width) { + y_outer += 1; + x_outer = xtemp_outer; + } + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void +gen9_vme_hevc_fill_vme_batchbuffer(VADriverContextP ctx, + struct encode_state *encode_state, + int mb_width, int mb_height, + int kernel, + int transform_8x8_mode_flag, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + int mb_x = 0, mb_y = 0; + int i, s; + unsigned int *command_ptr; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int log2_cu_size = pSequenceParameter->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = pSequenceParameter->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + + int ctb_size = 1 << log2_ctb_size; + int num_mb_in_ctb = (ctb_size + 15)/16; + num_mb_in_ctb = num_mb_in_ctb * num_mb_in_ctb; + + dri_bo_map(vme_context->vme_batchbuffer.bo, 1); + command_ptr = vme_context->vme_batchbuffer.bo->virtual; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[s]->buffer; + int slice_mb_begin = pSliceParameter->slice_segment_address * num_mb_in_ctb; + int slice_mb_number = pSliceParameter->num_ctu_in_slice * num_mb_in_ctb; + + unsigned int mb_intra_ub; + int slice_mb_x = slice_mb_begin % mb_width; + for (i = 0; i < slice_mb_number; ) { + int mb_count = i + slice_mb_begin; + mb_x = mb_count % mb_width; + mb_y = mb_count / mb_width; + mb_intra_ub = 0; + + if (mb_x != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_AE; + } + if (mb_y != 0) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_B; + if (mb_x != 0) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_D; + if (mb_x != (mb_width -1)) + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + if (i < mb_width) { + if (i == 0) + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_AE); + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_BCD_MASK); + if ((i == (mb_width - 1)) && slice_mb_x) { + mb_intra_ub |= INTRA_PRED_AVAIL_FLAG_C; + } + } + + if ((i == mb_width) && slice_mb_x) { + mb_intra_ub &= ~(INTRA_PRED_AVAIL_FLAG_D); + } + + *command_ptr++ = (CMD_MEDIA_OBJECT | (8 - 2)); + *command_ptr++ = kernel; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + + /*inline data */ + *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x); + *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8)); + + *command_ptr++ = CMD_MEDIA_STATE_FLUSH; + *command_ptr++ = 0; + i += 1; + } + } + + *command_ptr++ = MI_BATCH_BUFFER_END; + *command_ptr++ = 0; + + dri_bo_unmap(vme_context->vme_batchbuffer.bo); +} + +static void gen9_vme_hevc_pipeline_programing(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = encoder_context->vme_context; + struct intel_batchbuffer *batch = encoder_context->base.batch; + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + int width_in_mbs = (pSequenceParameter->pic_width_in_luma_samples + 15)/16; + int height_in_mbs = (pSequenceParameter->pic_height_in_luma_samples + 15)/16; + int kernel_shader; + bool allow_hwscore = true; + int s; + + int log2_cu_size = pSequenceParameter->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = pSequenceParameter->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + + int ctb_size = 1 << log2_ctb_size; + int num_mb_in_ctb = (ctb_size + 15)/16; + int transform_8x8_mode_flag = 1; + num_mb_in_ctb = num_mb_in_ctb * num_mb_in_ctb; + + for (s = 0; s < encode_state->num_slice_params_ext; s++) { + pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[s]->buffer; + int slice_mb_begin = pSliceParameter->slice_segment_address * num_mb_in_ctb; + if ((slice_mb_begin % width_in_mbs)) { + allow_hwscore = false; + break; + } + } + + if (pSliceParameter->slice_type == HEVC_SLICE_I) { + kernel_shader = VME_INTRA_SHADER; + } else if (pSliceParameter->slice_type == HEVC_SLICE_P) { + kernel_shader = VME_INTER_SHADER; + } else { + kernel_shader = VME_BINTER_SHADER; + if (!allow_hwscore) + kernel_shader = VME_INTER_SHADER; + } + if (allow_hwscore) + gen9wa_vme_hevc_walker_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + transform_8x8_mode_flag, + encoder_context); + else + gen9_vme_hevc_fill_vme_batchbuffer(ctx, + encode_state, + width_in_mbs, height_in_mbs, + kernel_shader, + transform_8x8_mode_flag, + encoder_context); + + intel_batchbuffer_start_atomic(batch, 0x1000); + gen9_gpe_pipeline_setup(ctx, &vme_context->gpe_context, batch); + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8) | (1 << 0)); + OUT_RELOC(batch, + vme_context->vme_batchbuffer.bo, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + + gen9_gpe_pipeline_end(ctx, &vme_context->gpe_context, batch); + + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus gen9_vme_hevc_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + VAEncSliceParameterBufferHEVC *pSliceParameter = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[0]->buffer; + int is_intra = pSliceParameter->slice_type == HEVC_SLICE_I; + VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; + struct gen6_vme_context *vme_context = encoder_context->vme_context; + + /* here use the avc level for hevc vme */ + if (!vme_context->hevc_level || + (vme_context->hevc_level != pSequenceParameter->general_level_idc)) { + vme_context->hevc_level = pSequenceParameter->general_level_idc; + } + + intel_vme_hevc_update_mbmv_cost(ctx, encode_state, encoder_context); + + /*Setup all the memory object*/ + gen9_vme_hevc_surface_setup(ctx, encode_state, is_intra, encoder_context); + gen9_vme_interface_setup(ctx, encode_state, encoder_context); + //gen9_vme_vme_state_setup(ctx, encode_state, is_intra, encoder_context); + gen9_vme_constant_setup(ctx, encode_state, encoder_context); + + /*Programing media pipeline*/ + gen9_vme_hevc_pipeline_programing(ctx, encode_state, encoder_context); + + return vaStatus; +} + + +static VAStatus +gen9_vme_hevc_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + gen9_vme_media_init(ctx, encoder_context); + gen9_vme_hevc_prepare(ctx, encode_state, encoder_context); + gen9_vme_run(ctx, encode_state, encoder_context); + gen9_vme_stop(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + + +static void +gen9_vme_context_destroy(void *context) +{ + struct gen6_vme_context *vme_context = context; + + gen8_gpe_context_destroy(&vme_context->gpe_context); + + dri_bo_unreference(vme_context->vme_output.bo); + vme_context->vme_output.bo = NULL; + + dri_bo_unreference(vme_context->vme_state.bo); + vme_context->vme_state.bo = NULL; + + dri_bo_unreference(vme_context->vme_batchbuffer.bo); + vme_context->vme_batchbuffer.bo = NULL; + + if (vme_context->vme_state_message) { + free(vme_context->vme_state_message); + vme_context->vme_state_message = NULL; + } + + free(vme_context); +} + +Bool gen9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen6_vme_context *vme_context = calloc(1, sizeof(struct gen6_vme_context)); + struct i965_kernel *vme_kernel_list = NULL; + int i965_kernel_num; + + switch (encoder_context->codec) { + case CODEC_H264: + case CODEC_H264_MVC: + vme_kernel_list = gen9_vme_kernels; + encoder_context->vme_pipeline = gen9_vme_pipeline; + i965_kernel_num = sizeof(gen9_vme_kernels) / sizeof(struct i965_kernel); + break; + + case CODEC_MPEG2: + vme_kernel_list = gen9_vme_mpeg2_kernels; + encoder_context->vme_pipeline = gen9_vme_mpeg2_pipeline; + i965_kernel_num = sizeof(gen9_vme_mpeg2_kernels) / sizeof(struct i965_kernel); + break; + + case CODEC_VP8: + vme_kernel_list = gen9_vme_vp8_kernels; + encoder_context->vme_pipeline = gen9_vme_vp8_pipeline; + i965_kernel_num = sizeof(gen9_vme_vp8_kernels) / sizeof(struct i965_kernel); + break; + + case CODEC_HEVC: + vme_kernel_list = gen9_vme_hevc_kernels; + encoder_context->vme_pipeline = gen9_vme_hevc_pipeline; + i965_kernel_num = sizeof(gen9_vme_hevc_kernels) / sizeof(struct i965_kernel); + break; + + default: + /* never get here */ + assert(0); + + break; + } + + assert(vme_context); + vme_context->vme_kernel_sum = i965_kernel_num; + vme_context->gpe_context.surface_state_binding_table.length = (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_MEDIA_SURFACES_GEN6; + + vme_context->gpe_context.idrt_size = sizeof(struct gen8_interface_descriptor_data) * MAX_INTERFACE_DESC_GEN6; + vme_context->gpe_context.curbe_size = CURBE_TOTAL_DATA_LENGTH; + vme_context->gpe_context.sampler_size = 0; + + + vme_context->gpe_context.vfe_state.max_num_threads = 60 - 1; + vme_context->gpe_context.vfe_state.num_urb_entries = 64; + vme_context->gpe_context.vfe_state.gpgpu_mode = 0; + vme_context->gpe_context.vfe_state.urb_entry_size = 16; + vme_context->gpe_context.vfe_state.curbe_allocation_size = CURBE_ALLOCATION_SIZE - 1; + + gen7_vme_scoreboard_init(ctx, vme_context); + + gen8_gpe_load_kernels(ctx, + &vme_context->gpe_context, + vme_kernel_list, + i965_kernel_num); + vme_context->vme_surface2_setup = gen8_gpe_surface2_setup; + vme_context->vme_media_rw_surface_setup = gen8_gpe_media_rw_surface_setup; + vme_context->vme_buffer_suface_setup = gen8_gpe_buffer_suface_setup; + vme_context->vme_media_chroma_surface_setup = gen8_gpe_media_chroma_surface_setup; + + encoder_context->vme_context = vme_context; + encoder_context->vme_context_destroy = gen9_vme_context_destroy; + + vme_context->vme_state_message = malloc(VME_MSG_LENGTH * sizeof(int)); + + return True; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vp9_const_def.c intel-vaapi-driver-1.7.1/src/gen9_vp9_const_def.c --- intel-vaapi-driver-1.0.15/src/gen9_vp9_const_def.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vp9_const_def.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,1716 @@ +/* + * * Copyright (c) 2016, Intel Corporation + * + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * No reverse engineering, decompilation, or disassembly of this software is permitted. + * Limited patent license. Intel Corporation grants a world-wide, royalty-free, + * nonexclusive license under patents it now or hereafter owns or controls to make, have made, + * use, import, offer to sell and sell (.Utilize.) this software, but solely to the extent that any + * such patent is necessary to Utilize the software alone. The patent license shall not apply + * to any combinations which include this software. No hardware per se is licensed here under. + + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +const unsigned int vp9_fullspiral_ime_search_path_delta[14] = { + 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0, 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0 +}; + +const unsigned int vp9_diamond_ime_search_path_delta[14] = { + 0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211, 0x0DFFFFE0, 0x11201F1F, 0x1105F1CF, 0x00000000, 0x00000000, 0x00000000 +}; + +const unsigned int vp9_brc_const_data_i_g9[4448] = { + 0x0032000A, 0x00960064, 0x67614B28, 0xFCFAA07D, 0x040200FE, 0x03010106, 0x05280102, 0x04010305, + 0x78503C1E, 0x04FFC88C, 0x78503C1E, 0x28FFC88C, 0x02B47850, 0x120E0A06, 0x0A060402, 0x0200000E, + 0x00000804, 0xFE040200, 0x02000000, 0x00FEFCFA, 0xFCF8F600, 0xF4F200FE, 0xEEFEFCF8, 0xFEFCF6F2, + 0x100A0402, 0x08040214, 0x0200100C, 0x000C0804, 0x04020000, 0x000000FE, 0xFEFEFC02, 0xFCFA0000, + 0xF600FEFE, 0x00FEFCFA, 0xFCF8F4F2, 0x000000FE, 0x0C080000, 0x00001410, 0x06000000, 0xFE120E0A, + 0x00000000, 0x0E0C0806, 0x0000FEFC, 0x06040200, 0xFEFCFA0A, 0x02000000, 0xFCF80A06, 0x000000FE, + 0xF60A0602, 0x00FEFCFA, 0x0A060200, 0xFEFCF8F4, 0x06020000, 0xFCF8F40A, 0x020000FE, 0x00000A06, + 0x06000000, 0x00120E0A, 0x00000000, 0x100C0A06, 0x000000FE, 0x0E0A0600, 0x00FEFC10, 0x08040000, + 0xFCFA0C0A, 0x000000FE, 0xF80A0802, 0x0000FEFC, 0x0A080200, 0xFEFEFCF8, 0x08000000, 0xFCFAF80A, + 0x000000FE, 0xF8F60A02, 0x0000FEFC, 0x00080200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x02061200, 0x00000036, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x28190702, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010002, + 0x050D2501, 0x0000006D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x38290E03, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020004, + 0x050D2502, 0x0000006D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x38290E03, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020004, + 0x050D2503, 0x0000006D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x38290E03, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020004, + 0x06102E04, 0x00000088, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x3A2B1904, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020005, + 0x06102E05, 0x00000088, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x3A2B1904, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020005, + 0x07133706, 0x000000A3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x3C2E1B05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030006, + 0x07133707, 0x000000A3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x3C2E1B05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030006, + 0x07133708, 0x000000A3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x3C2E1B05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030006, + 0x08164009, 0x000000BE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x3E381D05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030007, + 0x0816400A, 0x000000BE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x3E381D05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030007, + 0x0A1A4A0B, 0x000000DA, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x48391E06, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040008, + 0x0A1A4A0C, 0x000000DA, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x48391E06, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040008, + 0x0B1D530D, 0x000000F5, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x493A2807, 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0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8E7F6C4A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x006900D3, + 0xFFFFFFCF, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8E7F6C4A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x006B00D6, + 0xFFFFFFD0, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8E7F6C4B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x006C00D9, + 0xFFFFFFD1, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8E7F6C4B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x006E00DC, + 0xFFFFFFD2, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8E886C4B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x006F00DF, + 0xFFFFFFD3, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F886C4B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007100E3, + 0xFFFFFFD4, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F886D4B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007300E6, + 0xFFFFFFD5, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F886D4B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007400E9, + 0xFFFFFFD6, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F886D4C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007600ED, + 0xFFFFFFD7, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F886D4C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007800F1, + 0xFFFFFFD8, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F896D4C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007A00F4, + 0xFFFFFFD9, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F896E4C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007C00F8, + 0xFFFFFFDA, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F896E4C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x007E00FC, + 0xFFFFFFDB, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F896E4D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800100, + 0xFFFFFFDC, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F896E4D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820105, + 0xFFFFFFDD, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F896F4D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00840109, + 0xFFFFFFDE, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F896F4D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0086010D, + 0xFFFFFFDF, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8A6F4D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00890112, + 0xFFFFFFE0, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8A6F4E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x008B0117, + 0xFFFFFFE1, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8A784E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x008E011C, + 0xFFFFFFE2, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8A784E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00900121, + 0xFFFFFFE3, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8A784E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00930127, + 0xFFFFFFE4, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8B784F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0096012D, + 0xFFFFFFE5, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8B784F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00990133, + 0xFFFFFFE6, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8B794F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x009C0139, + 0xFFFFFFE7, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8B7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00A00140, + 0xFFFFFFE8, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8B7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00A30147, + 0xFFFFFFE9, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8C7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00A7014E, + 0xFFFFFFEA, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8C7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00AB0156, + 0xFFFFFFEB, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8C7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00AF015E, + 0xFFFFFFEC, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8D7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00B30166, + 0xFFFFFFED, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8D7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00B80170, + 0xFFFFFFEE, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8D7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00BC0179, + 0xFFFFFFEF, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8E7B59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00C10183, + 0xFFFFFFF0, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8E7B5A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00C7018E, + 0xFFFFFFF1, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8E7B5A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00CC0199, + 0xFFFFFFF2, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7C5A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00D201A5, + 0xFFFFFFF3, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7C5B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00D901B2, + 0xFFFFFFF4, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7C5B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00E001C0, + 0xFFFFFFF5, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7D5B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00E701CE, + 0xFFFFFFF6, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7D5C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00EE01DD, + 0xFFFFFFF7, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7E5C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00F701EE, + 0xFFFFFFF8, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7E5C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00FF01FF, + 0xFFFFFFF9, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7F5D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080211, + 0xFFFFFFFA, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F7F5D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01120225, + 0xFFFFFFFB, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F885E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x011C0239, + 0xFFFFFFFC, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F885E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01280250, + 0xFFFFFFFD, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F885F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01340268, + 0xFFFFFFFE, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F8968, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01400281, + 0xFFFFFFFF, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x8F8F8968, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x014E029C, + 0x00080004, 0x00090008, 0x000B000A, 0x000C000C, 0x000E000D, 0x0010000F, 0x00120011, 0x00130013, + 0x00150014, 0x00170016, 0x00190018, 0x001A001A, 0x001C001B, 0x001E001D, 0x0020001F, 0x00210020, + 0x00230022, 0x00250024, 0x00260026, 0x00280027, 0x002A0029, 0x002B002B, 0x002D002C, 0x002F002E, + 0x00300030, 0x00320031, 0x00340033, 0x00350035, 0x00370036, 0x00390038, 0x003A0039, 0x003C003B, + 0x003E003D, 0x003F003E, 0x00410040, 0x00420042, 0x00440043, 0x00460045, 0x00470046, 0x00490048, + 0x004A004A, 0x004C004B, 0x004E004D, 0x004F004E, 0x00510050, 0x00520051, 0x00540053, 0x00550055, + 0x00580057, 0x005C005A, 0x005F005D, 0x00620060, 0x00650063, 0x00680066, 0x006B0069, 0x006E006C, + 0x0071006F, 0x00740072, 0x00760075, 0x00790078, 0x007D007B, 0x0081007F, 0x00860083, 0x008A0088, + 0x008E008C, 0x00920090, 0x00960094, 0x009A0098, 0x009E009C, 0x00A400A1, 0x00A900A6, 0x00AE00AC, + 0x00B400B1, 0x00B900B6, 0x00BE00BB, 0x00C300C0, 0x00CA00C7, 0x00D000CD, 0x00D600D3, 0x00DC00D9, + 0x00E200DF, 0x00E900E6, 0x00F000ED, 0x00F700F3, 0x00FD00FA, 0x01050101, 0x010D0109, 0x01140110, + 0x011C0118, 0x01240120, 0x012C0128, 0x01350130, 0x013D0139, 0x01460142, 0x014F014A, 0x01580154, + 0x0162015D, 0x016C0167, 0x01760171, 0x0180017B, 0x018B0185, 0x01960190, 0x01A1019B, 0x01AD01A7, + 0x01B901B3, 0x01C601BF, 0x01D301CD, 0x01E201DB, 0x01F101E9, 0x020101F9, 0x0212020A, 0x0225021B, + 0x0239022F, 0x024E0243, 0x0266025A, 0x02800272, 0x029C028E, 0x02BC02AC, 0x02E002CD, 0x030702F3, + 0x0333031C, 0x0365034B, 0x039D0380, 0x03DC03BB, 0x042203FE, 0x0473044A, 0x04D004A0, 0x05380502, + 0x00080004, 0x000A0009, 0x000C000B, 0x000E000D, 0x0010000F, 0x00120011, 0x00140013, 0x00160015, + 0x00180017, 0x001A0019, 0x001C001B, 0x001E001D, 0x0020001F, 0x00220021, 0x00240023, 0x00260025, + 0x00280027, 0x002A0029, 0x002C002B, 0x002E002D, 0x0030002F, 0x00320031, 0x00340033, 0x00360035, + 0x00380037, 0x003A0039, 0x003C003B, 0x003E003D, 0x0040003F, 0x00420041, 0x00440043, 0x00460045, + 0x00480047, 0x004A0049, 0x004C004B, 0x004E004D, 0x0050004F, 0x00520051, 0x00540053, 0x00560055, + 0x00580057, 0x005A0059, 0x005C005B, 0x005E005D, 0x0060005F, 0x00620061, 0x00640063, 0x00660065, + 0x006A0068, 0x006E006C, 0x00720070, 0x00760074, 0x007A0078, 0x007E007C, 0x00820080, 0x00860084, + 0x008A0088, 0x008E008C, 0x00920090, 0x00960094, 0x009B0098, 0x00A1009E, 0x00A700A4, 0x00AD00AA, + 0x00B300B0, 0x00B900B6, 0x00BF00BC, 0x00C500C2, 0x00CB00C8, 0x00D300CF, 0x00DB00D7, 0x00E300DF, + 0x00EB00E7, 0x00F300EF, 0x00FB00F7, 0x010400FF, 0x010E0109, 0x01180113, 0x0122011D, 0x012C0127, + 0x01370131, 0x0143013D, 0x014F0149, 0x015B0155, 0x01670161, 0x0175016E, 0x0183017C, 0x0191018A, + 0x01A00198, 0x01B001A8, 0x01C001B8, 0x01D101C8, 0x01E301DA, 0x01F501EC, 0x020801FE, 0x021C0212, + 0x02300226, 0x0246023B, 0x025C0251, 0x02730267, 0x028B027F, 0x02A40297, 0x02BE02B1, 0x02D902CB, + 0x02F502E7, 0x03120303, 0x03300321, 0x03500340, 0x03710360, 0x03930382, 0x03B703A5, 0x03DC03C9, + 0x040203EF, 0x042A0416, 0x0454043F, 0x047F0469, 0x04AC0495, 0x04DB04C3, 0x050C04F3, 0x053F0525, + 0x05740559, 0x05AB058F, 0x05E405C7, 0x061F0601, 0x065C063D, 0x069C067C, 0x06DF06BD, 0x07240701 +}; + +const unsigned int vp9_brc_const_data_p_g9[4448] = { + 0x0032000A, 0x00960064, 0x67614B28, 0xFCFAA07D, 0x040200FE, 0x03010106, 0x05280102, 0x04010305, + 0x78503C1E, 0x04FFC88C, 0x78503C1E, 0x28FFC88C, 0x02B47850, 0x120E0A06, 0x0A060402, 0x0200000E, + 0x00000804, 0xFE040200, 0x02000000, 0x00FEFCFA, 0xFCF8F600, 0xF4F200FE, 0xEEFEFCF8, 0xFEFCF6F2, + 0x100A0402, 0x08040214, 0x0200100C, 0x000C0804, 0x04020000, 0x000000FE, 0xFEFEFC02, 0xFCFA0000, + 0xF600FEFE, 0x00FEFCFA, 0xFCF8F4F2, 0x000000FE, 0x0C080000, 0x00001410, 0x06000000, 0xFE120E0A, + 0x00000000, 0x0E0C0806, 0x0000FEFC, 0x06040200, 0xFEFCFA0A, 0x02000000, 0xFCF80A06, 0x000000FE, + 0xF60A0602, 0x00FEFCFA, 0x0A060200, 0xFEFCF8F4, 0x06020000, 0xFCF8F40A, 0x020000FE, 0x00000A06, + 0x06000000, 0x00120E0A, 0x00000000, 0x100C0A06, 0x000000FE, 0x0E0A0600, 0x00FEFC10, 0x08040000, + 0xFCFA0C0A, 0x000000FE, 0xF80A0802, 0x0000FEFC, 0x0A080200, 0xFEFEFCF8, 0x08000000, 0xFCFAF80A, + 0x000000FE, 0xF8F60A02, 0x0000FEFC, 0x00080200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x040C2400, 0x00000000, 0x00010001, 0x00010000, 0x00010000, 0x00020002, 0x00030002, 0x00040003, + 0x02020100, 0x04030302, 0x39070402, 0x6F6F0103, 0x00010001, 0x00000000, 0x00000004, 0x00010004, + 0x08184801, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, + 0x04030200, 0x08070605, 0x490D0903, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x00020008, + 0x08184802, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, + 0x04030200, 0x08070605, 0x490D0903, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x00020008, + 0x091B5103, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, + 0x04030200, 0x08070605, 0x4A0F0A04, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x00020009, + 0x0A1E5A04, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, + 0x04030200, 0x08070605, 0x4B180B04, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x0002000A, + 0x0B216305, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, + 0x04030200, 0x08070605, 0x4D190C04, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x0002000B, + 0x0C246C06, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, + 0x06050400, 0x0C0A0807, 0x4E1A0D05, 0x6F6F0408, 0x00030002, 0x00000000, 0x0000000C, 0x0003000C, + 0x0C246C07, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, + 0x06050400, 0x0C0A0807, 0x4E1A0D05, 0x6F6F0408, 0x00030002, 0x00000000, 0x0000000C, 0x0003000C, + 0x0D277508, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, + 0x06050400, 0x0C0A0807, 0x4F1B0E05, 0x6F6F0408, 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0x00000000, 0x0048006C, 0x005A0024, 0x006C0000, 0x00BB0090, 0x010300DF, 0x01670131, + 0x4C493E00, 0x5B5A584E, 0x8F695D49, 0x6F6F4858, 0x003B002D, 0x00000000, 0x00000167, 0x005C0171, + 0xFFFFFFC5, 0x00000000, 0x0049006D, 0x005B0024, 0x006D0000, 0x00BD0091, 0x010600E1, 0x016B0135, + 0x4C493E00, 0x5B5A584E, 0x8F6A5D49, 0x6F6F4858, 0x003B002D, 0x00000000, 0x0000016B, 0x005D0176, + 0xFFFFFFC6, 0x00000000, 0x0049006E, 0x005C0025, 0x006E0000, 0x00BF0093, 0x010800E4, 0x016F0138, + 0x4C493E00, 0x5B5A584E, 0x8F6A5D49, 0x6F6F4858, 0x003C002D, 0x00000000, 0x0000016F, 0x005E017B, + 0xFFFFFFC7, 0x00000000, 0x004B0071, 0x005E0026, 0x00710000, 0x00C30096, 0x010E00E9, 0x0177013F, + 0x4C493E00, 0x5C5A584F, 0x8F6A5D49, 0x6F6F4858, 0x003C002D, 0x00000000, 0x00000177, 0x00600180, + 0xFFFFFFC8, 0x00000000, 0x004C0072, 0x005F0026, 0x00720000, 0x00C50098, 0x011100EB, 0x017B0142, + 0x4C4A3E00, 0x5C5A594F, 0x8F6A5D4A, 0x6F6F4858, 0x003C002D, 0x00000000, 0x0000017B, 0x00610185, + 0xFFFFFFC9, 0x00000000, 0x004D0073, 0x00600026, 0x00730000, 0x00C70099, 0x011400ED, 0x017F0145, + 0x4C4A3E00, 0x5C5A594F, 0x8F6A5E4A, 0x6F6F4858, 0x003C002E, 0x00000000, 0x0000017F, 0x0062018B, + 0xFFFFFFCA, 0x00000000, 0x004E0075, 0x00620027, 0x00750000, 0x00CB009C, 0x011900F2, 0x0187014C, + 0x4D4A3F00, 0x5C5A594F, 0x8F6A5E4A, 0x6F6F4959, 0x003C002E, 0x00000000, 0x00000187, 0x00640190, + 0xFFFFFFCB, 0x00000000, 0x004F0076, 0x00630027, 0x00760000, 0x00CD009E, 0x011C00F5, 0x018B014F, + 0x4D4A3F00, 0x5C5A594F, 0x8F6A5E4A, 0x6F6F4959, 0x003C002E, 0x00000000, 0x0000018B, 0x00650196, + 0xFFFFFFCC, 0x00000000, 0x00500078, 0x00640028, 0x00780000, 0x00CF009F, 0x011F00F7, 0x018E0153, + 0x4D4A3F00, 0x5C5B594F, 0x8F6B5E4A, 0x6F6F4959, 0x003D002E, 0x00000000, 0x0000018E, 0x0066019B, + 0xFFFFFFCD, 0x00000000, 0x0051007A, 0x00660029, 0x007A0000, 0x00D300A3, 0x012500FC, 0x01960159, + 0x4D4A3F00, 0x5D5B5958, 0x8F6B5E4A, 0x6F6F4959, 0x003D002E, 0x00000000, 0x00000196, 0x006801A1, + 0xFFFFFFCE, 0x00000000, 0x0052007B, 0x00670029, 0x007B0000, 0x00D500A4, 0x012700FE, 0x019A015D, + 0x4D4A3F00, 0x5D5B5958, 0x8F6B5E4A, 0x6F6F4959, 0x003D002E, 0x00000000, 0x0000019A, 0x006901A7, + 0xFFFFFFCF, 0x00000000, 0x0054007D, 0x0068002A, 0x007D0000, 0x00D900A7, 0x012D0103, 0x01A20163, + 0x4E4A4800, 0x5D5B5958, 0x8F6B5F4B, 0x6F6F4959, 0x003D002F, 0x00000000, 0x000001A2, 0x006B01AD, + 0xFFFFFFD0, 0x00000000, 0x0054007F, 0x0069002A, 0x007F0000, 0x00DB00A9, 0x01300106, 0x01A60167, + 0x4E4B4800, 0x5D5B5A58, 0x8F6B5F4B, 0x6F6F4959, 0x003D002F, 0x00000000, 0x000001A6, 0x006C01B3, + 0xFFFFFFD1, 0x00000000, 0x00560081, 0x006B002B, 0x00810000, 0x00DF00AC, 0x0135010A, 0x01AE016D, + 0x4E4B4800, 0x5D5B5A58, 0x8F6B5F4B, 0x6F6F4959, 0x003D002F, 0x00000000, 0x000001AE, 0x006E01B9, + 0xFFFFFFD2, 0x00000000, 0x00570082, 0x006C002B, 0x00820000, 0x00E100AD, 0x0138010D, 0x01B20171, + 0x4E4B4800, 0x5E5C5A58, 0x8F6B5F4B, 0x6F6F4A5A, 0x003E002F, 0x00000000, 0x000001B2, 0x006F01BF, + 0xFFFFFFD3, 0x00000000, 0x00580084, 0x006E002C, 0x00840000, 0x00E600B1, 0x013E0112, 0x01B90177, + 0x4E4B4800, 0x5E5C5A59, 0x8F6C684B, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001B9, 0x007101C6, + 0xFFFFFFD4, 0x00000000, 0x005A0087, 0x0070002D, 0x00870000, 0x00EA00B4, 0x01430117, 0x01C1017E, + 0x4F4B4800, 0x5E5C5A59, 0x8F6C684B, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001C1, 0x007301CD, + 0xFFFFFFD5, 0x00000000, 0x005B0088, 0x0071002D, 0x00880000, 0x00EC00B5, 0x01460119, 0x01C50181, + 0x4F4B4900, 0x5E5C5A59, 0x8F6C684B, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001C5, 0x007401D3, + 0xFFFFFFD6, 0x00000000, 0x005C008A, 0x0073002E, 0x008A0000, 0x00F000B8, 0x014C011E, 0x01CD0188, + 0x4F4C4900, 0x5E5C5A59, 0x8F6C684C, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001CD, 0x007601DB, + 0xFFFFFFD7, 0x00000000, 0x005E008D, 0x0075002F, 0x008D0000, 0x00F400BC, 0x01520123, 0x01D5018E, + 0x4F4C4900, 0x5F5C5B59, 0x8F6C684C, 0x6F6F4A5A, 0x003F0038, 0x00000000, 0x000001D5, 0x007801E2, + 0xFFFFFFD8, 0x00000000, 0x005F008F, 0x00770030, 0x008F0000, 0x00F800BF, 0x01570127, 0x01DD0195, + 0x584C4900, 0x5F5D5B59, 0x8F6D684C, 0x6F6F4A5A, 0x003F0038, 0x00000000, 0x000001DD, 0x007A01E9, + 0xFFFFFFD9, 0x00000000, 0x00610091, 0x00790030, 0x00910000, 0x00FC00C2, 0x015D012C, 0x01E4019C, + 0x584C4900, 0x5F5D5B59, 0x8F6D694C, 0x6F6F4B5B, 0x003F0039, 0x00000000, 0x000001E4, 0x007C01F1, + 0xFFFFFFDA, 0x00000000, 0x00620094, 0x007B0031, 0x00940000, 0x010000C5, 0x01620131, 0x01EC01A2, + 0x584C4900, 0x5F5D5B5A, 0x8F6D694C, 0x6F6F4B5B, 0x003F0039, 0x00000000, 0x000001EC, 0x007E01F9, + 0xFFFFFFDB, 0x00000000, 0x00640096, 0x007D0032, 0x00960000, 0x010400C8, 0x01680136, 0x01F401A9, + 0x584D4900, 0x685D5B5A, 0x8F6D694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x000001F4, 0x00800201, + 0xFFFFFFDC, 0x00000000, 0x00660098, 0x007F0033, 0x00980000, 0x010800CB, 0x016E013B, 0x01FC01B0, + 0x584D4A00, 0x685E5B5A, 0x8F6D694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x000001FC, 0x0082020A, + 0xFFFFFFDD, 0x00000000, 0x0067009B, 0x00810034, 0x009B0000, 0x010C00CE, 0x01730140, 0x020401B6, + 0x584D4A00, 0x685E5C5A, 0x8F6E694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x00000204, 0x00840212, + 0xFFFFFFDE, 0x00000000, 0x0069009D, 0x00830034, 0x009D0000, 0x011000D1, 0x01790145, 0x020B01BD, + 0x594D4A00, 0x685E5C5A, 0x8F6E694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x0000020B, 0x0086021B, + 0xFFFFFFDF, 0x00000000, 0x006B00A1, 0x00860036, 0x00A10000, 0x011600D6, 0x0181014C, 0x021701C7, + 0x594D4A00, 0x685E5C5A, 0x8F6E694D, 0x6F6F4C5C, 0x00480039, 0x00000000, 0x00000217, 0x00890225, + 0xFFFFFFE0, 0x00000000, 0x006D00A3, 0x00880036, 0x00A30000, 0x011A00D9, 0x01870151, 0x021F01CE, + 0x594E4A00, 0x685E5C5B, 0x8F6E6A4E, 0x6F6F4C5C, 0x0049003A, 0x00000000, 0x0000021F, 0x008B022F, + 0xFFFFFFE1, 0x00000000, 0x006F00A6, 0x008B0037, 0x00A60000, 0x012000DE, 0x018F0158, 0x022B01D7, + 0x594E4A00, 0x695F5C5B, 0x8F6F6A4E, 0x6F6F4C5C, 0x0049003A, 0x00000000, 0x0000022B, 0x008E0239, + 0xFFFFFFE2, 0x00000000, 0x007100A9, 0x008D0038, 0x00A90000, 0x012500E1, 0x0195015D, 0x023301DE, + 0x594E4B00, 0x695F5D5B, 0x8F6F6A4E, 0x6F6F4C5C, 0x0049003A, 0x00000000, 0x00000233, 0x00900243, + 0xFFFFFFE3, 0x00000000, 0x007300AC, 0x00900039, 0x00AC0000, 0x012B00E6, 0x019D0164, 0x023E01E8, + 0x594E4B00, 0x695F5D5B, 0x8F6F6A4E, 0x6F6F4D5D, 0x0049003A, 0x00000000, 0x0000023E, 0x0093024E, + 0xFFFFFFE4, 0x00000000, 0x007500B0, 0x0092003B, 0x00B00000, 0x013100EA, 0x01A6016B, 0x024A01F2, + 0x5A4F4B00, 0x69685D5B, 0x8F6F6A4F, 0x6F6F4D5D, 0x0049003A, 0x00000000, 0x0000024A, 0x0096025A, + 0xFFFFFFE5, 0x00000000, 0x007800B3, 0x0095003C, 0x00B30000, 0x013700EF, 0x01AE0173, 0x025601FC, + 0x5A4F4B00, 0x69685D5C, 0x8F786B4F, 0x6F6F4D5D, 0x0049003B, 0x00000000, 0x00000256, 0x00990266, + 0xFFFFFFE6, 0x00000000, 0x007A00B7, 0x0098003D, 0x00B70000, 0x013D00F4, 0x01B7017A, 0x02610206, + 0x5A4F4B00, 0x6A685E5C, 0x8F786B4F, 0x6F6F4D5D, 0x004A003B, 0x00000000, 0x00000261, 0x009C0272, + 0xFFFFFFE7, 0x00000000, 0x007D00BC, 0x009C003F, 0x00BC0000, 0x014500FA, 0x01C20184, 0x02710213, + 0x5A584C00, 0x6A685E5C, 0x8F786B58, 0x6F6F4E5E, 0x004A003B, 0x00000000, 0x00000271, 0x00A00280, + 0xFFFFFFE8, 0x00000000, 0x007F00BF, 0x009F0040, 0x00BF0000, 0x014B00FF, 0x01CA018B, 0x027D021D, + 0x5A584C00, 0x6A685E5C, 0x8F786B58, 0x6F6F4E5E, 0x004A003B, 0x00000000, 0x0000027D, 0x00A3028E, + 0xFFFFFFE9, 0x00000000, 0x008200C4, 0x00A30041, 0x00C40000, 0x01530105, 0x01D60194, 0x028C022A, + 0x5B584C00, 0x6A695F5D, 0x8F796B58, 0x6F6F4E5E, 0x004A003B, 0x00000000, 0x0000028C, 0x00A7029C, + 0xFFFFFFEA, 0x00000000, 0x008600C8, 0x00A70043, 0x00C80000, 0x015B010B, 0x01E1019E, 0x029C0238, + 0x5B584D00, 0x6A695F5D, 0x8F796C58, 0x6F6F4F5F, 0x004A003C, 0x00000000, 0x0000029C, 0x00AB02AC, + 0xFFFFFFEB, 0x00000000, 0x008900CD, 0x00AB0044, 0x00CD0000, 0x01630111, 0x01EC01A8, 0x02AC0245, + 0x5B594D00, 0x6B695F5D, 0x8F796C59, 0x6F6F4F5F, 0x004B003C, 0x00000000, 0x000002AC, 0x00AF02BC, + 0xFFFFFFEC, 0x00000000, 0x008C00D2, 0x00AF0046, 0x00D20000, 0x016C0118, 0x01F701B2, 0x02BB0252, + 0x5B594D00, 0x6B69685E, 0x8F796C59, 0x6F6F4F5F, 0x004B003C, 0x00000000, 0x000002BB, 0x00B302CD, + 0xFFFFFFED, 0x00000000, 0x009000D8, 0x00B40048, 0x00D80000, 0x01760120, 0x020601BE, 0x02CF0263, + 0x5C594E00, 0x6B6A685E, 0x8F796D59, 0x6F6F5868, 0x004B003D, 0x00000000, 0x000002CF, 0x00B802E0, + 0xFFFFFFEE, 0x00000000, 0x009300DC, 0x00B80049, 0x00DC0000, 0x017E0126, 0x021101C7, 0x02DE0270, + 0x5C594E00, 0x6B6A685E, 0x8F7A6D59, 0x6F6F5868, 0x004C003D, 0x00000000, 0x000002DE, 0x00BC02F3, + 0xFFFFFFEF, 0x00000000, 0x009700E2, 0x00BC004B, 0x00E20000, 0x0188012E, 0x021F01D3, 0x02F20281, + 0x5C594E00, 0x6C6A685F, 0x8F7A6D59, 0x6F6F5868, 0x004C003D, 0x00000000, 0x000002F2, 0x00C10307, + 0xFFFFFFF0, 0x00000000, 0x009B00E9, 0x00C2004E, 0x00E90000, 0x01940137, 0x023001E2, 0x03090295, + 0x5D5A4F00, 0x6C6A695F, 0x8F7A6E5A, 0x6F6F5969, 0x004C003E, 0x00000000, 0x00000309, 0x00C7031C, + 0xFFFFFFF1, 0x00000000, 0x009F00EF, 0x00C70050, 0x00EF0000, 0x019E013F, 0x023E01EE, 0x031D02A5, + 0x5D5A4F00, 0x6C6B695F, 0x8F7B6E5A, 0x6F6F5969, 0x004C003E, 0x00000000, 0x0000031D, 0x00CC0333, + 0xFFFFFFF2, 0x00000000, 0x00A400F6, 0x00CD0052, 0x00F60000, 0x01AB0148, 0x024F01FD, 0x033402B9, + 0x5D5A4F00, 0x6D6B6968, 0x8F7B6E5A, 0x6F6F5969, 0x004D003E, 0x00000000, 0x00000334, 0x00D2034B, + 0xFFFFFFF3, 0x00000000, 0x00AA00FE, 0x00D40055, 0x00FE0000, 0x01B90153, 0x0262020E, 0x035002D1, + 0x5E5B5800, 0x6D6B6A68, 0x8F7B6F5B, 0x6F6F5969, 0x004D003F, 0x00000000, 0x00000350, 0x00D90365, + 0xFFFFFFF4, 0x00000000, 0x00AF0107, 0x00DB0058, 0x01070000, 0x01C7015E, 0x0276021F, 0x036B02E8, + 0x5E5B5800, 0x6E6C6A68, 0x8F7B6F5B, 0x6F6F5A6A, 0x004E003F, 0x00000000, 0x0000036B, 0x00E00380, + 0xFFFFFFF5, 0x00000000, 0x00B4010F, 0x00E2005A, 0x010F0000, 0x01D50169, 0x028A022F, 0x038602FF, + 0x5F5B5800, 0x6E6C6A69, 0x8F7C785B, 0x6F6F5A6A, 0x004E0048, 0x00000000, 0x00000386, 0x00E7039D, + 0xFFFFFFF6, 0x00000000, 0x00BA0117, 0x00E8005D, 0x01170000, 0x01E30174, 0x029D0240, 0x03A20316, + 0x5F5C5900, 0x6F6C6A69, 0x8F7C785C, 0x6F6F5A6A, 0x004F0048, 0x00000000, 0x000003A2, 0x00EE03BB, + 0xFFFFFFF7, 0x00000000, 0x00C10121, 0x00F10060, 0x01210000, 0x01F60182, 0x02B70256, 0x03C50334, + 0x685C5900, 0x6F6D6B69, 0x8F7D785C, 0x6F6F5B6B, 0x004F0048, 0x00000000, 0x000003C5, 0x00F703DC, + 0xFFFFFFF8, 0x00000000, 0x00C7012B, 0x00F90064, 0x012B0000, 0x0206018E, 0x02CD026A, 0x03E4034F, + 0x685C5900, 0x6F6D6B6A, 0x8F7D795C, 0x6F6F5B6B, 0x00580049, 0x00000000, 0x000003E4, 0x00FF03FE, + 0xFFFFFFF9, 0x00000000, 0x00CE0135, 0x01020067, 0x01350000, 0x0218019D, 0x02E7027F, 0x0407036D, + 0x685D5A00, 0x6F6E6C6A, 0x8F7E795D, 0x6F6F5B6B, 0x00580049, 0x00000000, 0x00000407, 0x01080422, + 0xFFFFFFFA, 0x00000000, 0x00D60141, 0x010C006B, 0x01410000, 0x022D01AC, 0x03030298, 0x042E038E, + 0x695D5A00, 0x6F6E6C6A, 0x8F7E795D, 0x6F6F5C6C, 0x00580049, 0x00000000, 0x0000042E, 0x0112044A, + 0xFFFFFFFB, 0x00000000, 0x00DE014D, 0x0115006F, 0x014D0000, 0x024101BC, 0x031F02B0, 0x045503AF, + 0x695E5A00, 0x6F6F6C6B, 0x8F7F7A5E, 0x6F6F5C6C, 0x0059004A, 0x00000000, 0x00000455, 0x011C0473, + 0xFFFFFFFC, 0x00000000, 0x00E7015B, 0x01210074, 0x015B0000, 0x025901CF, 0x034102CD, 0x048403D7, + 0x695E5B00, 0x6F6F6D6B, 0x8F7F7A5E, 0x6F6F5D6D, 0x0059004A, 0x00000000, 0x00000484, 0x012804A0, + 0xFFFFFFFD, 0x00000000, 0x00F10169, 0x012D0078, 0x01690000, 0x027201E1, 0x036202EA, 0x04B303FF, + 0x6A5F5B00, 0x6F6F6E6C, 0x8F887B5F, 0x6F6F5D6D, 0x0059004B, 0x00000000, 0x000004B3, 0x013404D0, + 0xFFFFFFFE, 0x00000000, 0x00FA0177, 0x0139007D, 0x01770000, 0x028A01F4, 0x03840307, 0x04E20427, + 0x6A685C00, 0x6F6F6E6C, 0x8F887B68, 0x6F6F5E6E, 0x005A004B, 0x00000000, 0x000004E2, 0x01400502, + 0xFFFFFFFF, 0x00000000, 0x01050187, 0x01460082, 0x01870000, 0x02A6020A, 0x03AB0329, 0x05190455, + 0x6B685C00, 0x6F6F6F6D, 0x8F897B68, 0x6F6F5E6E, 0x005A004B, 0x00000000, 0x00000519, 0x014E0538, + 0x00080004, 0x00090008, 0x000B000A, 0x000C000C, 0x000E000D, 0x0010000F, 0x00120011, 0x00130013, + 0x00150014, 0x00170016, 0x00190018, 0x001A001A, 0x001C001B, 0x001E001D, 0x0020001F, 0x00210020, + 0x00230022, 0x00250024, 0x00260026, 0x00280027, 0x002A0029, 0x002B002B, 0x002D002C, 0x002F002E, + 0x00300030, 0x00320031, 0x00340033, 0x00350035, 0x00370036, 0x00390038, 0x003A0039, 0x003C003B, + 0x003E003D, 0x003F003E, 0x00410040, 0x00420042, 0x00440043, 0x00460045, 0x00470046, 0x00490048, + 0x004A004A, 0x004C004B, 0x004E004D, 0x004F004E, 0x00510050, 0x00520051, 0x00540053, 0x00550055, + 0x00580057, 0x005C005A, 0x005F005D, 0x00620060, 0x00650063, 0x00680066, 0x006B0069, 0x006E006C, + 0x0071006F, 0x00740072, 0x00760075, 0x00790078, 0x007D007B, 0x0081007F, 0x00860083, 0x008A0088, + 0x008E008C, 0x00920090, 0x00960094, 0x009A0098, 0x009E009C, 0x00A400A1, 0x00A900A6, 0x00AE00AC, + 0x00B400B1, 0x00B900B6, 0x00BE00BB, 0x00C300C0, 0x00CA00C7, 0x00D000CD, 0x00D600D3, 0x00DC00D9, + 0x00E200DF, 0x00E900E6, 0x00F000ED, 0x00F700F3, 0x00FD00FA, 0x01050101, 0x010D0109, 0x01140110, + 0x011C0118, 0x01240120, 0x012C0128, 0x01350130, 0x013D0139, 0x01460142, 0x014F014A, 0x01580154, + 0x0162015D, 0x016C0167, 0x01760171, 0x0180017B, 0x018B0185, 0x01960190, 0x01A1019B, 0x01AD01A7, + 0x01B901B3, 0x01C601BF, 0x01D301CD, 0x01E201DB, 0x01F101E9, 0x020101F9, 0x0212020A, 0x0225021B, + 0x0239022F, 0x024E0243, 0x0266025A, 0x02800272, 0x029C028E, 0x02BC02AC, 0x02E002CD, 0x030702F3, + 0x0333031C, 0x0365034B, 0x039D0380, 0x03DC03BB, 0x042203FE, 0x0473044A, 0x04D004A0, 0x05380502, + 0x00080004, 0x000A0009, 0x000C000B, 0x000E000D, 0x0010000F, 0x00120011, 0x00140013, 0x00160015, + 0x00180017, 0x001A0019, 0x001C001B, 0x001E001D, 0x0020001F, 0x00220021, 0x00240023, 0x00260025, + 0x00280027, 0x002A0029, 0x002C002B, 0x002E002D, 0x0030002F, 0x00320031, 0x00340033, 0x00360035, + 0x00380037, 0x003A0039, 0x003C003B, 0x003E003D, 0x0040003F, 0x00420041, 0x00440043, 0x00460045, + 0x00480047, 0x004A0049, 0x004C004B, 0x004E004D, 0x0050004F, 0x00520051, 0x00540053, 0x00560055, + 0x00580057, 0x005A0059, 0x005C005B, 0x005E005D, 0x0060005F, 0x00620061, 0x00640063, 0x00660065, + 0x006A0068, 0x006E006C, 0x00720070, 0x00760074, 0x007A0078, 0x007E007C, 0x00820080, 0x00860084, + 0x008A0088, 0x008E008C, 0x00920090, 0x00960094, 0x009B0098, 0x00A1009E, 0x00A700A4, 0x00AD00AA, + 0x00B300B0, 0x00B900B6, 0x00BF00BC, 0x00C500C2, 0x00CB00C8, 0x00D300CF, 0x00DB00D7, 0x00E300DF, + 0x00EB00E7, 0x00F300EF, 0x00FB00F7, 0x010400FF, 0x010E0109, 0x01180113, 0x0122011D, 0x012C0127, + 0x01370131, 0x0143013D, 0x014F0149, 0x015B0155, 0x01670161, 0x0175016E, 0x0183017C, 0x0191018A, + 0x01A00198, 0x01B001A8, 0x01C001B8, 0x01D101C8, 0x01E301DA, 0x01F501EC, 0x020801FE, 0x021C0212, + 0x02300226, 0x0246023B, 0x025C0251, 0x02730267, 0x028B027F, 0x02A40297, 0x02BE02B1, 0x02D902CB, + 0x02F502E7, 0x03120303, 0x03300321, 0x03500340, 0x03710360, 0x03930382, 0x03B703A5, 0x03DC03C9, + 0x040203EF, 0x042A0416, 0x0454043F, 0x047F0469, 0x04AC0495, 0x04DB04C3, 0x050C04F3, 0x053F0525, + 0x05740559, 0x05AB058F, 0x05E405C7, 0x061F0601, 0x065C063D, 0x069C067C, 0x06DF06BD, 0x07240701 +}; + +const unsigned int gen9_vp9_avs_coeffs[256] = { + 0x00000000, 0x40400000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x40000000, 0x00000000, + 0x0101FFFF, 0x4040FEFE, 0xFFFF0202, 0x00000101, 0x40FF0000, 0x00000001, 0x40FF0000, 0x00000001, + 0x0202FFFF, 0x4141FCFC, 0xFEFE0404, 0xFFFF0101, 0x3FFE0000, 0x00000003, 0x3FFE0000, 0x00000003, + 0x0303FFFF, 0x3F3FFBFB, 0xFDFD0606, 0xFFFF0202, 0x3EFD0000, 0x00000005, 0x3EFD0000, 0x00000005, + 0x0303FEFE, 0x4040F9F9, 0xFCFC0909, 0xFFFF0202, 0x3EFC0000, 0x00000006, 0x3EFC0000, 0x00000006, + 0x0404FEFE, 0x3F3FF8F8, 0xFBFB0B0B, 0xFEFE0303, 0x3CFC0000, 0x00000008, 0x3CFC0000, 0x00000008, + 0x0505FDFD, 0x3E3EF7F7, 0xFAFA0E0E, 0xFEFE0303, 0x3CFB0000, 0x0000FF0A, 0x3CFB0000, 0x0000FF0A, + 0x0505FDFD, 0x3D3DF5F5, 0xF9F91111, 0xFEFE0404, 0x39FB0000, 0x0000FF0D, 0x39FB0000, 0x0000FF0D, + 0x0606FDFD, 0x3B3BF5F5, 0xF8F81414, 0xFDFD0404, 0x37FB0000, 0x0000FF0F, 0x37FB0000, 0x0000FF0F, + 0x0606FCFC, 0x3B3BF4F4, 0xF7F71616, 0xFDFD0505, 0x35FB0000, 0x0000FF11, 0x35FB0000, 0x0000FF11, + 0x0707FCFC, 0x3939F3F3, 0xF6F61919, 0xFDFD0505, 0x33FB0000, 0x0000FE14, 0x33FB0000, 0x0000FE14, + 0x0707FCFC, 0x3737F3F3, 0xF5F51C1C, 0xFCFC0606, 0x31FB0000, 0x0000FE16, 0x31FB0000, 0x0000FE16, + 0x0707FCFC, 0x3535F2F2, 0xF5F51F1F, 0xFCFC0606, 0x2EFB0000, 0x0000FE19, 0x2EFB0000, 0x0000FE19, + 0x0707FCFC, 0x3232F2F2, 0xF4F42222, 0xFCFC0707, 0x2CFB0000, 0x0000FD1C, 0x2CFB0000, 0x0000FD1C, + 0x0707FCFC, 0x3030F2F2, 0xF3F32525, 0xFCFC0707, 0x29FB0000, 0x0000FD1F, 0x29FB0000, 0x0000FD1F, + 0x0707FCFC, 0x2D2DF2F2, 0xF3F32828, 0xFCFC0707, 0x27FC0000, 0x0000FC21, 0x27FC0000, 0x0000FC21, + 0x0707FCFC, 0x2929F3F3, 0xF3F32B2B, 0xFCFC0707, 0x24FC0000, 0x0000FC24, 0x24FC0000, 0x0000FC24, + 0x0707FCFC, 0x2828F3F3, 0xF2F22D2D, 0xFCFC0707, 0x21FC0000, 0x0000FC27, 0x21FC0000, 0x0000FC27, + 0x0707FCFC, 0x2525F3F3, 0xF2F23030, 0xFCFC0707, 0x1FFD0000, 0x0000FB29, 0x1FFD0000, 0x0000FB29, + 0x0707FCFC, 0x2222F4F4, 0xF2F23232, 0xFCFC0707, 0x1CFD0000, 0x0000FB2C, 0x1CFD0000, 0x0000FB2C, + 0x0606FCFC, 0x1F1FF5F5, 0xF2F23535, 0xFCFC0707, 0x19FE0000, 0x0000FB2E, 0x19FE0000, 0x0000FB2E, + 0x0606FCFC, 0x1C1CF5F5, 0xF3F33737, 0xFCFC0707, 0x16FE0000, 0x0000FB31, 0x16FE0000, 0x0000FB31, + 0x0505FDFD, 0x1919F6F6, 0xF3F33939, 0xFCFC0707, 0x14FE0000, 0x0000FB33, 0x14FE0000, 0x0000FB33, + 0x0505FDFD, 0x1616F7F7, 0xF4F43B3B, 0xFCFC0606, 0x11FF0000, 0x0000FB35, 0x11FF0000, 0x0000FB35, + 0x0404FDFD, 0x1414F8F8, 0xF5F53B3B, 0xFDFD0606, 0x0FFF0000, 0x0000FB37, 0x0FFF0000, 0x0000FB37, + 0x0404FEFE, 0x1111F9F9, 0xF5F53D3D, 0xFDFD0505, 0x0DFF0000, 0x0000FB39, 0x0DFF0000, 0x0000FB39, + 0x0303FEFE, 0x0E0EFAFA, 0xF7F73E3E, 0xFDFD0505, 0x0AFF0000, 0x0000FB3C, 0x0AFF0000, 0x0000FB3C, + 0x0303FEFE, 0x0B0BFBFB, 0xF8F83F3F, 0xFEFE0404, 0x08000000, 0x0000FC3C, 0x08000000, 0x0000FC3C, + 0x0202FFFF, 0x0909FCFC, 0xF9F94040, 0xFEFE0303, 0x06000000, 0x0000FC3E, 0x06000000, 0x0000FC3E, + 0x0202FFFF, 0x0606FDFD, 0xFBFB3F3F, 0xFFFF0303, 0x05000000, 0x0000FD3E, 0x05000000, 0x0000FD3E, + 0x0101FFFF, 0x0404FEFE, 0xFCFC4141, 0xFFFF0202, 0x03000000, 0x0000FE3F, 0x03000000, 0x0000FE3F, + 0x01010000, 0x0202FFFF, 0xFEFE4040, 0xFFFF0101, 0x01000000, 0x0000FF40, 0x01000000, 0x0000FF40, +}; + +const unsigned int intel_vp9_costlut_key[4096] = { + 0x02061200, 0x00000036, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x28190702, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010002, + 0x050D2501, 0x0000006D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x38290E03, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020004, + 0x050D2502, 0x0000006D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x38290E03, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020004, + 0x050D2503, 0x0000006D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x38290E03, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020004, + 0x06102E04, 0x00000088, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3A2B1904, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020005, + 0x06102E05, 0x00000088, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3A2B1904, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020005, + 0x07133706, 0x000000A3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3C2E1B05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030006, + 0x07133707, 0x000000A3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3C2E1B05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030006, + 0x07133708, 0x000000A3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3C2E1B05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030006, + 0x08164009, 0x000000BE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3E381D05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030007, + 0x0816400A, 0x000000BE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3E381D05, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030007, + 0x0A1A4A0B, 0x000000DA, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x48391E06, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040008, + 0x0A1A4A0C, 0x000000DA, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x48391E06, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040008, + 0x0B1D530D, 0x000000F5, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x493A2807, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040009, + 0x0B1D530E, 0x000000F5, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x493A2807, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040009, + 0x0B1D530F, 0x000000F5, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x493A2807, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040009, + 0x0C205C10, 0x00000110, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4A3B2908, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0005000A, + 0x0C205C11, 0x00000110, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4A3B2908, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0005000A, + 0x0D236512, 0x0000012B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4B3C2A09, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0005000B, + 0x0D236513, 0x0000012B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4B3C2A09, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0005000B, + 0x0E266E14, 0x00000146, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4C3E2B09, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0006000C, + 0x0E266E15, 0x00000146, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4C3E2B09, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0006000C, + 0x102A7816, 0x00000162, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4D3F2C0A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0006000D, + 0x102A7817, 0x00000162, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4D3F2C0A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0006000D, + 0x102A7818, 0x00000162, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4D3F2C0A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0006000D, + 0x112D8119, 0x0000017D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4E482C0B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0007000E, + 0x112D811A, 0x0000017D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4E482C0B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0007000E, + 0x12308A1B, 0x00000198, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4F482D0C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0007000F, + 0x12308A1C, 0x00000198, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4F482D0C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0007000F, + 0x1333931D, 0x000001B3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x58492E0D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080010, + 0x1333931E, 0x000001B3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x58492E0D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080010, + 0x1333931F, 0x000001B3, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x58492E0D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080010, + 0x14369C20, 0x000001CE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x594A2F0D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080011, + 0x14369C21, 0x000001CE, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x594A2F0D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080011, + 0x163AA622, 0x000001EA, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 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0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8B784F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00990133, + 0xFFFFFFE6, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8B794F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x009C0139, + 0xFFFFFFE7, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8B7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00A00140, + 0xFFFFFFE8, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8B7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00A30147, + 0xFFFFFFE9, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8C7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00A7014E, + 0xFFFFFFEA, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8C7958, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00AB0156, + 0xFFFFFFEB, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8C7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00AF015E, + 0xFFFFFFEC, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8D7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00B30166, + 0xFFFFFFED, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8D7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00B80170, + 0xFFFFFFEE, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8D7A59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00BC0179, + 0xFFFFFFEF, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8E7B59, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00C10183, + 0xFFFFFFF0, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8E7B5A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00C7018E, + 0xFFFFFFF1, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8E7B5A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00CC0199, + 0xFFFFFFF2, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7C5A, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00D201A5, + 0xFFFFFFF3, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7C5B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00D901B2, + 0xFFFFFFF4, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7C5B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00E001C0, + 0xFFFFFFF5, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7D5B, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00E701CE, + 0xFFFFFFF6, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7D5C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00EE01DD, + 0xFFFFFFF7, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7E5C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00F701EE, + 0xFFFFFFF8, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7E5C, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00FF01FF, + 0xFFFFFFF9, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7F5D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080211, + 0xFFFFFFFA, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F7F5D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01120225, + 0xFFFFFFFB, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F885E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x011C0239, + 0xFFFFFFFC, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F885E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01280250, + 0xFFFFFFFD, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F885F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01340268, + 0xFFFFFFFE, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F8968, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01400281, + 0xFFFFFFFF, 0x000003FF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8F8F8968, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x014E029C, +}; + +const unsigned int intel_vp9_costlut_p[4096] = { + 0x040C2400, 0x00000010, 0x00010001, 0x00010000, 0x00010000, 0x00020002, 0x00030002, 0x00040003, 0x02020100, 0x04030302, 0x39070402, 0x6F6F0103, 0x00010001, 0x00000000, 0x00000004, 0x00010004, + 0x08184801, 0x00000001, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, 0x04030200, 0x08070605, 0x490D0903, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x00020008, + 0x08184802, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, 0x04030200, 0x08070605, 0x490D0903, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x00020008, + 0x091B5103, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, 0x04030200, 0x08070605, 0x4A0F0A04, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x00020009, + 0x0A1E5A04, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, 0x04030200, 0x08070605, 0x4B180B04, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x0002000A, + 0x0B216305, 0x00000000, 0x00020002, 0x00020001, 0x00020000, 0x00040003, 0x00060005, 0x00080007, 0x04030200, 0x08070605, 0x4D190C04, 0x6F6F0305, 0x00020001, 0x00000000, 0x00000008, 0x0002000B, + 0x0C246C06, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, 0x06050400, 0x0C0A0807, 0x4E1A0D05, 0x6F6F0408, 0x00030002, 0x00000000, 0x0000000C, 0x0003000C, + 0x0C246C07, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, 0x06050400, 0x0C0A0807, 0x4E1A0D05, 0x6F6F0408, 0x00030002, 0x00000000, 0x0000000C, 0x0003000C, + 0x0D277508, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, 0x06050400, 0x0C0A0807, 0x4F1B0E05, 0x6F6F0408, 0x00030002, 0x00000000, 0x0000000C, 0x0003000D, + 0x0E2A7E09, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, 0x06050400, 0x0C0A0807, 0x581C0F05, 0x6F6F0408, 0x00030002, 0x00000000, 0x0000000C, 0x0003000E, + 0x0F2D870A, 0x00000000, 0x00020004, 0x00030001, 0x00040000, 0x00060005, 0x00080007, 0x000C000A, 0x06050400, 0x0C0A0807, 0x591D1806, 0x6F6F0408, 0x00030002, 0x00000000, 0x0000000C, 0x0003000F, + 0x1030900B, 0x00000000, 0x00030005, 0x00040002, 0x00050000, 0x00080006, 0x000B000A, 0x0010000D, 0x08060500, 0x180D0B0A, 0x591D1906, 0x6F6F050B, 0x00040002, 0x00000000, 0x00000010, 0x00040010, + 0x1133990C, 0x00000000, 0x00030005, 0x00040002, 0x00050000, 0x00080006, 0x000B000A, 0x0010000D, 0x08060500, 0x180D0B0A, 0x5A1E1A07, 0x6F6F050B, 0x00040002, 0x00000000, 0x00000010, 0x00040011, + 0x1236A20D, 0x00000000, 0x00030005, 0x00040002, 0x00050000, 0x00080006, 0x000B000A, 0x0010000D, 0x08060500, 0x180D0B0A, 0x5A1F1A07, 0x6F6F050B, 0x00040002, 0x00000000, 0x00000010, 0x00040012, + 0x1339AB0E, 0x00000000, 0x00030005, 0x00040002, 0x00050000, 0x00080006, 0x000B000A, 0x0010000D, 0x08060500, 0x180D0B0A, 0x5B281B07, 0x6F6F050B, 0x00040002, 0x00000000, 0x00000010, 0x00040013, + 0x1339AB0F, 0x00000000, 0x00030005, 0x00040002, 0x00050000, 0x00080006, 0x000B000A, 0x0010000D, 0x08060500, 0x180D0B0A, 0x5B281B07, 0x6F6F050B, 0x00040002, 0x00000000, 0x00000010, 0x00040013, + 0x143CB410, 0x00000000, 0x00040006, 0x00050002, 0x00060000, 0x000A0008, 0x000E000C, 0x00140011, 0x0A080600, 0x1A190E0C, 0x5B281B08, 0x6F6F070E, 0x00050003, 0x00000000, 0x00000014, 0x00050014, + 0x153FBD11, 0x00000000, 0x00040006, 0x00050002, 0x00060000, 0x000A0008, 0x000E000C, 0x00140011, 0x0A080600, 0x1A190E0C, 0x5C291C08, 0x6F6F070E, 0x00050003, 0x00000000, 0x00000014, 0x00050015, + 0x1642C612, 0x00000000, 0x00040006, 0x00050002, 0x00060000, 0x000A0008, 0x000E000C, 0x00140011, 0x0A080600, 0x1A190E0C, 0x5D291C09, 0x6F6F070E, 0x00050003, 0x00000000, 0x00000014, 0x00050016, + 0x1745CF13, 0x00000000, 0x00040006, 0x00050002, 0x00060000, 0x000A0008, 0x000E000C, 0x00140011, 0x0A080600, 0x1A190E0C, 0x5D2A1D09, 0x6F6F070E, 0x00050003, 0x00000000, 0x00000014, 0x00050017, + 0x1848D814, 0x00000000, 0x00050007, 0x00060002, 0x00070000, 0x000C0009, 0x0011000F, 0x00170014, 0x0C090700, 0x1C1A190F, 0x5E2A1D09, 0x6F6F0818, 0x00060003, 0x00000000, 0x00000017, 0x00060018, + 0x194BE115, 0x00000000, 0x00050007, 0x00060002, 0x00070000, 0x000C0009, 0x0011000F, 0x00170014, 0x0C090700, 0x1C1A190F, 0x5E2A1E0A, 0x6F6F0818, 0x00060003, 0x00000000, 0x00000017, 0x00060019, + 0x1A4EEA16, 0x00000000, 0x00050007, 0x00060002, 0x00070000, 0x000C0009, 0x0011000F, 0x00170014, 0x0C090700, 0x1C1A190F, 0x5F2B1E0A, 0x6F6F0818, 0x00060003, 0x00000000, 0x00000017, 0x0006001A, + 0x1A4EEA17, 0x00000000, 0x00050007, 0x00060002, 0x00070000, 0x000C0009, 0x0011000F, 0x00170014, 0x0C090700, 0x1C1A190F, 0x5F2B1E0A, 0x6F6F0818, 0x00060003, 0x00000000, 0x00000017, 0x0006001A, + 0x1B51F318, 0x00000000, 0x00050007, 0x00060002, 0x00070000, 0x000C0009, 0x0011000F, 0x00170014, 0x0C090700, 0x1C1A190F, 0x5F2B1F0B, 0x6F6F0818, 0x00060003, 0x00000000, 0x00000017, 0x0006001B, + 0x1C54FC19, 0x00000000, 0x00050008, 0x00070003, 0x00080000, 0x000E000B, 0x00140011, 0x001B0017, 0x0E0B0800, 0x1E1C1A19, 0x682C280B, 0x6F6F0A1A, 0x00070004, 0x00000000, 0x0000001B, 0x0007001C, + 0x1D57FF1A, 0x00000000, 0x00050008, 0x00070003, 0x00080000, 0x000E000B, 0x00140011, 0x001B0017, 0x0E0B0800, 0x1E1C1A19, 0x682C280B, 0x6F6F0A1A, 0x00070004, 0x00000000, 0x0000001B, 0x0007001D, + 0x1E5AFF1B, 0x00000000, 0x00050008, 0x00070003, 0x00080000, 0x000E000B, 0x00140011, 0x001B0017, 0x0E0B0800, 0x1E1C1A19, 0x692C280C, 0x6F6F0A1A, 0x00070004, 0x00000000, 0x0000001B, 0x0007001E, + 0x1F5DFF1C, 0x00000000, 0x00050008, 0x00070003, 0x00080000, 0x000E000B, 0x00140011, 0x001B0017, 0x0E0B0800, 0x1E1C1A19, 0x692D290C, 0x6F6F0A1A, 0x00070004, 0x00000000, 0x0000001B, 0x0007001F, + 0x2060FF1D, 0x00000000, 0x00060009, 0x00080003, 0x00090000, 0x0010000D, 0x00170013, 0x001F001B, 0x180D0900, 0x281E1C1A, 0x692D290D, 0x6F6F0B1B, 0x00080004, 0x00000000, 0x0000001F, 0x00080020, + 0x2060FF1E, 0x00000000, 0x00060009, 0x00080003, 0x00090000, 0x0010000D, 0x00170013, 0x001F001B, 0x180D0900, 0x281E1C1A, 0x692D290D, 0x6F6F0B1B, 0x00080004, 0x00000000, 0x0000001F, 0x00080020, + 0x2163FF1F, 0x00000000, 0x00060009, 0x00080003, 0x00090000, 0x0010000D, 0x00170013, 0x001F001B, 0x180D0900, 0x281E1C1A, 0x692E290D, 0x6F6F0B1B, 0x00080004, 0x00000000, 0x0000001F, 0x00080021, + 0x2266FF20, 0x00000000, 0x00060009, 0x00080003, 0x00090000, 0x0010000D, 0x00170013, 0x001F001B, 0x180D0900, 0x281E1C1A, 0x6A2E290D, 0x6F6F0B1B, 0x00080004, 0x00000000, 0x0000001F, 0x00080022, + 0x2369FF21, 0x00000000, 0x00060009, 0x00080003, 0x00090000, 0x0010000D, 0x00170013, 0x001F001B, 0x180D0900, 0x281E1C1A, 0x6A2E2A0E, 0x6F6F0B1B, 0x00080004, 0x00000000, 0x0000001F, 0x00080023, + 0x246CFF22, 0x00000000, 0x0007000B, 0x00090004, 0x000B0000, 0x0012000E, 0x00190016, 0x0023001E, 0x190E0B00, 0x291F1D1B, 0x6A2F2A0E, 0x6F6F0C1D, 0x00090005, 0x00000000, 0x00000023, 0x00090024, + 0x256FFF23, 0x00000000, 0x0007000B, 0x00090004, 0x000B0000, 0x0012000E, 0x00190016, 0x0023001E, 0x190E0B00, 0x291F1D1B, 0x6B2F2A0E, 0x6F6F0C1D, 0x00090005, 0x00000000, 0x00000023, 0x00090025, + 0x2672FF24, 0x00000000, 0x0007000B, 0x00090004, 0x000B0000, 0x0012000E, 0x00190016, 0x0023001E, 0x190E0B00, 0x291F1D1B, 0x6B382B0F, 0x6F6F0C1D, 0x00090005, 0x00000000, 0x00000023, 0x00090026, + 0x2672FF25, 0x00000000, 0x0007000B, 0x00090004, 0x000B0000, 0x0012000E, 0x00190016, 0x0023001E, 0x190E0B00, 0x291F1D1B, 0x6B382B0F, 0x6F6F0C1D, 0x00090005, 0x00000000, 0x00000023, 0x00090026, + 0x2775FF26, 0x00000000, 0x0007000B, 0x00090004, 0x000B0000, 0x0012000E, 0x00190016, 0x0023001E, 0x190E0B00, 0x291F1D1B, 0x6B382B0F, 0x6F6F0C1D, 0x00090005, 0x00000000, 0x00000023, 0x00090027, + 0x2878FF27, 0x00000000, 0x0008000C, 0x000A0004, 0x000C0000, 0x00140010, 0x001C0018, 0x00270021, 0x1A180C00, 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0x00000000, 0x00000102, 0x00420109, + 0xFFFFFFAD, 0x00000000, 0x0034004F, 0x0041001A, 0x004F0000, 0x00880069, 0x00BC00A2, 0x010600DE, 0x493D3A00, 0x584E4C4A, 0x8F5E593D, 0x6F6F3C4B, 0x00380029, 0x00000000, 0x00000106, 0x0043010D, + 0xFFFFFFAE, 0x00000000, 0x00350050, 0x0042001B, 0x00500000, 0x008A006A, 0x00BF00A5, 0x010A00E2, 0x493D3A00, 0x584E4C4A, 0x8F5E593D, 0x6F6F3C4C, 0x00380029, 0x00000000, 0x0000010A, 0x00440110, + 0xFFFFFFAF, 0x00000000, 0x00360051, 0x0043001B, 0x00510000, 0x008C006C, 0x00C200A7, 0x010E00E5, 0x493E3A00, 0x584E4C4A, 0x8F5E593E, 0x6F6F3C4C, 0x0038002A, 0x00000000, 0x0000010E, 0x00450114, + 0xFFFFFFB0, 0x00000000, 0x00370052, 0x0044001B, 0x00520000, 0x008E006D, 0x00C500AA, 0x011100E8, 0x493E3A00, 0x594F4C4B, 0x8F5E5A3E, 0x6F6F3C4C, 0x0039002A, 0x00000000, 0x00000111, 0x00460118, + 0xFFFFFFB1, 0x00000000, 0x00370053, 0x0045001C, 0x00530000, 0x0090006F, 0x00C800AC, 0x011500EC, 0x493E3A00, 0x594F4D4B, 0x8F5F5A3E, 0x6F6F3C4C, 0x0039002A, 0x00000000, 0x00000115, 0x0047011C, + 0xFFFFFFB2, 0x00000000, 0x00380054, 0x0046001C, 0x00540000, 0x00920071, 0x00CB00AE, 0x011900EF, 0x493E3B00, 0x594F4D4B, 0x8F5F5A3E, 0x6F6F3C4C, 0x0039002A, 0x00000000, 0x00000119, 0x00480120, + 0xFFFFFFB3, 0x00000000, 0x00390056, 0x0047001D, 0x00560000, 0x00940072, 0x00CD00B1, 0x011D00F2, 0x493E3B00, 0x594F4D4B, 0x8F5F5A3E, 0x6F6F3D4D, 0x0039002A, 0x00000000, 0x0000011D, 0x00490124, + 0xFFFFFFB4, 0x00000000, 0x003A0057, 0x0048001D, 0x00570000, 0x00960074, 0x00D000B3, 0x012100F6, 0x493F3B00, 0x594F4D4B, 0x8F5F5A3F, 0x6F6F3D4D, 0x0039002A, 0x00000000, 0x00000121, 0x004A0128, + 0xFFFFFFB5, 0x00000000, 0x003B0058, 0x0049001D, 0x00580000, 0x00980075, 0x00D300B6, 0x012500F9, 0x4A3F3B00, 0x59584D4B, 0x8F5F5A3F, 0x6F6F3D4D, 0x0039002A, 0x00000000, 0x00000125, 0x004B012C, + 0xFFFFFFB6, 0x00000000, 0x003B0059, 0x004A001E, 0x00590000, 0x009A0077, 0x00D600B8, 0x012900FC, 0x4A3F3B00, 0x59584D4C, 0x8F685A3F, 0x6F6F3D4D, 0x0039002B, 0x00000000, 0x00000129, 0x004C0130, + 0xFFFFFFB7, 0x00000000, 0x003C005A, 0x004B001E, 0x005A0000, 0x009C0078, 0x00D900BA, 0x012D0100, 0x4A3F3B00, 0x59584E4C, 0x8F685B3F, 0x6F6F3D4D, 0x0039002B, 0x00000000, 0x0000012D, 0x004D0135, + 0xFFFFFFB8, 0x00000000, 0x003D005B, 0x004C001E, 0x005B0000, 0x009E007A, 0x00DB00BD, 0x01310103, 0x4A3F3B00, 0x5A584E4C, 0x8F685B3F, 0x6F6F3D4D, 0x003A002B, 0x00000000, 0x00000131, 0x004E0139, + 0xFFFFFFB9, 0x00000000, 0x003E005D, 0x004D001F, 0x005D0000, 0x00A0007B, 0x00DE00BF, 0x01350106, 0x4A3F3C00, 0x5A584E4C, 0x8F685B48, 0x6F6F3E4E, 0x003A002B, 0x00000000, 0x00000135, 0x004F013D, + 0xFFFFFFBA, 0x00000000, 0x003F005E, 0x004E001F, 0x005E0000, 0x00A3007D, 0x00E100C2, 0x0139010A, 0x4A483C00, 0x5A584E4C, 0x8F685B48, 0x6F6F3E4E, 0x003A002B, 0x00000000, 0x00000139, 0x00500142, + 0xFFFFFFBB, 0x00000000, 0x003F005F, 0x004F0020, 0x005F0000, 0x00A5007F, 0x00E400C4, 0x013C010D, 0x4A483C00, 0x5A584E4C, 0x8F685B48, 0x6F6F3E4E, 0x003A002B, 0x00000000, 0x0000013C, 0x00510146, + 0xFFFFFFBC, 0x00000000, 0x00400060, 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0x00B3008A, 0x00F800D5, 0x01580124, 0x4B493D00, 0x5B59584D, 0x8F695C49, 0x6F6F3F4F, 0x003B002C, 0x00000000, 0x00000158, 0x00580162, + 0xFFFFFFC2, 0x00000000, 0x00460068, 0x00570023, 0x00680000, 0x00B5008B, 0x00FA00D8, 0x015C0128, 0x4B493D00, 0x5B59584E, 0x8F695C49, 0x6F6F3F4F, 0x003B002C, 0x00000000, 0x0000015C, 0x00590167, + 0xFFFFFFC3, 0x00000000, 0x0047006B, 0x00590024, 0x006B0000, 0x00B9008E, 0x010000DC, 0x0163012E, 0x4C493D00, 0x5B59584E, 0x8F695C49, 0x6F6F4858, 0x003B002D, 0x00000000, 0x00000163, 0x005B016C, + 0xFFFFFFC4, 0x00000000, 0x0048006C, 0x005A0024, 0x006C0000, 0x00BB0090, 0x010300DF, 0x01670131, 0x4C493E00, 0x5B5A584E, 0x8F695D49, 0x6F6F4858, 0x003B002D, 0x00000000, 0x00000167, 0x005C0171, + 0xFFFFFFC5, 0x00000000, 0x0049006D, 0x005B0024, 0x006D0000, 0x00BD0091, 0x010600E1, 0x016B0135, 0x4C493E00, 0x5B5A584E, 0x8F6A5D49, 0x6F6F4858, 0x003B002D, 0x00000000, 0x0000016B, 0x005D0176, + 0xFFFFFFC6, 0x00000000, 0x0049006E, 0x005C0025, 0x006E0000, 0x00BF0093, 0x010800E4, 0x016F0138, 0x4C493E00, 0x5B5A584E, 0x8F6A5D49, 0x6F6F4858, 0x003C002D, 0x00000000, 0x0000016F, 0x005E017B, + 0xFFFFFFC7, 0x00000000, 0x004B0071, 0x005E0026, 0x00710000, 0x00C30096, 0x010E00E9, 0x0177013F, 0x4C493E00, 0x5C5A584F, 0x8F6A5D49, 0x6F6F4858, 0x003C002D, 0x00000000, 0x00000177, 0x00600180, + 0xFFFFFFC8, 0x00000000, 0x004C0072, 0x005F0026, 0x00720000, 0x00C50098, 0x011100EB, 0x017B0142, 0x4C4A3E00, 0x5C5A594F, 0x8F6A5D4A, 0x6F6F4858, 0x003C002D, 0x00000000, 0x0000017B, 0x00610185, + 0xFFFFFFC9, 0x00000000, 0x004D0073, 0x00600026, 0x00730000, 0x00C70099, 0x011400ED, 0x017F0145, 0x4C4A3E00, 0x5C5A594F, 0x8F6A5E4A, 0x6F6F4858, 0x003C002E, 0x00000000, 0x0000017F, 0x0062018B, + 0xFFFFFFCA, 0x00000000, 0x004E0075, 0x00620027, 0x00750000, 0x00CB009C, 0x011900F2, 0x0187014C, 0x4D4A3F00, 0x5C5A594F, 0x8F6A5E4A, 0x6F6F4959, 0x003C002E, 0x00000000, 0x00000187, 0x00640190, + 0xFFFFFFCB, 0x00000000, 0x004F0076, 0x00630027, 0x00760000, 0x00CD009E, 0x011C00F5, 0x018B014F, 0x4D4A3F00, 0x5C5A594F, 0x8F6A5E4A, 0x6F6F4959, 0x003C002E, 0x00000000, 0x0000018B, 0x00650196, + 0xFFFFFFCC, 0x00000000, 0x00500078, 0x00640028, 0x00780000, 0x00CF009F, 0x011F00F7, 0x018E0153, 0x4D4A3F00, 0x5C5B594F, 0x8F6B5E4A, 0x6F6F4959, 0x003D002E, 0x00000000, 0x0000018E, 0x0066019B, + 0xFFFFFFCD, 0x00000000, 0x0051007A, 0x00660029, 0x007A0000, 0x00D300A3, 0x012500FC, 0x01960159, 0x4D4A3F00, 0x5D5B5958, 0x8F6B5E4A, 0x6F6F4959, 0x003D002E, 0x00000000, 0x00000196, 0x006801A1, + 0xFFFFFFCE, 0x00000000, 0x0052007B, 0x00670029, 0x007B0000, 0x00D500A4, 0x012700FE, 0x019A015D, 0x4D4A3F00, 0x5D5B5958, 0x8F6B5E4A, 0x6F6F4959, 0x003D002E, 0x00000000, 0x0000019A, 0x006901A7, + 0xFFFFFFCF, 0x00000000, 0x0054007D, 0x0068002A, 0x007D0000, 0x00D900A7, 0x012D0103, 0x01A20163, 0x4E4A4800, 0x5D5B5958, 0x8F6B5F4B, 0x6F6F4959, 0x003D002F, 0x00000000, 0x000001A2, 0x006B01AD, + 0xFFFFFFD0, 0x00000000, 0x0054007F, 0x0069002A, 0x007F0000, 0x00DB00A9, 0x01300106, 0x01A60167, 0x4E4B4800, 0x5D5B5A58, 0x8F6B5F4B, 0x6F6F4959, 0x003D002F, 0x00000000, 0x000001A6, 0x006C01B3, + 0xFFFFFFD1, 0x00000000, 0x00560081, 0x006B002B, 0x00810000, 0x00DF00AC, 0x0135010A, 0x01AE016D, 0x4E4B4800, 0x5D5B5A58, 0x8F6B5F4B, 0x6F6F4959, 0x003D002F, 0x00000000, 0x000001AE, 0x006E01B9, + 0xFFFFFFD2, 0x00000000, 0x00570082, 0x006C002B, 0x00820000, 0x00E100AD, 0x0138010D, 0x01B20171, 0x4E4B4800, 0x5E5C5A58, 0x8F6B5F4B, 0x6F6F4A5A, 0x003E002F, 0x00000000, 0x000001B2, 0x006F01BF, + 0xFFFFFFD3, 0x00000000, 0x00580084, 0x006E002C, 0x00840000, 0x00E600B1, 0x013E0112, 0x01B90177, 0x4E4B4800, 0x5E5C5A59, 0x8F6C684B, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001B9, 0x007101C6, + 0xFFFFFFD4, 0x00000000, 0x005A0087, 0x0070002D, 0x00870000, 0x00EA00B4, 0x01430117, 0x01C1017E, 0x4F4B4800, 0x5E5C5A59, 0x8F6C684B, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001C1, 0x007301CD, + 0xFFFFFFD5, 0x00000000, 0x005B0088, 0x0071002D, 0x00880000, 0x00EC00B5, 0x01460119, 0x01C50181, 0x4F4B4900, 0x5E5C5A59, 0x8F6C684B, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001C5, 0x007401D3, + 0xFFFFFFD6, 0x00000000, 0x005C008A, 0x0073002E, 0x008A0000, 0x00F000B8, 0x014C011E, 0x01CD0188, 0x4F4C4900, 0x5E5C5A59, 0x8F6C684C, 0x6F6F4A5A, 0x003E0038, 0x00000000, 0x000001CD, 0x007601DB, + 0xFFFFFFD7, 0x00000000, 0x005E008D, 0x0075002F, 0x008D0000, 0x00F400BC, 0x01520123, 0x01D5018E, 0x4F4C4900, 0x5F5C5B59, 0x8F6C684C, 0x6F6F4A5A, 0x003F0038, 0x00000000, 0x000001D5, 0x007801E2, + 0xFFFFFFD8, 0x00000000, 0x005F008F, 0x00770030, 0x008F0000, 0x00F800BF, 0x01570127, 0x01DD0195, 0x584C4900, 0x5F5D5B59, 0x8F6D684C, 0x6F6F4A5A, 0x003F0038, 0x00000000, 0x000001DD, 0x007A01E9, + 0xFFFFFFD9, 0x00000000, 0x00610091, 0x00790030, 0x00910000, 0x00FC00C2, 0x015D012C, 0x01E4019C, 0x584C4900, 0x5F5D5B59, 0x8F6D694C, 0x6F6F4B5B, 0x003F0039, 0x00000000, 0x000001E4, 0x007C01F1, + 0xFFFFFFDA, 0x00000000, 0x00620094, 0x007B0031, 0x00940000, 0x010000C5, 0x01620131, 0x01EC01A2, 0x584C4900, 0x5F5D5B5A, 0x8F6D694C, 0x6F6F4B5B, 0x003F0039, 0x00000000, 0x000001EC, 0x007E01F9, + 0xFFFFFFDB, 0x00000000, 0x00640096, 0x007D0032, 0x00960000, 0x010400C8, 0x01680136, 0x01F401A9, 0x584D4900, 0x685D5B5A, 0x8F6D694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x000001F4, 0x00800201, + 0xFFFFFFDC, 0x00000000, 0x00660098, 0x007F0033, 0x00980000, 0x010800CB, 0x016E013B, 0x01FC01B0, 0x584D4A00, 0x685E5B5A, 0x8F6D694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x000001FC, 0x0082020A, + 0xFFFFFFDD, 0x00000000, 0x0067009B, 0x00810034, 0x009B0000, 0x010C00CE, 0x01730140, 0x020401B6, 0x584D4A00, 0x685E5C5A, 0x8F6E694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x00000204, 0x00840212, + 0xFFFFFFDE, 0x00000000, 0x0069009D, 0x00830034, 0x009D0000, 0x011000D1, 0x01790145, 0x020B01BD, 0x594D4A00, 0x685E5C5A, 0x8F6E694D, 0x6F6F4B5B, 0x00480039, 0x00000000, 0x0000020B, 0x0086021B, + 0xFFFFFFDF, 0x00000000, 0x006B00A1, 0x00860036, 0x00A10000, 0x011600D6, 0x0181014C, 0x021701C7, 0x594D4A00, 0x685E5C5A, 0x8F6E694D, 0x6F6F4C5C, 0x00480039, 0x00000000, 0x00000217, 0x00890225, + 0xFFFFFFE0, 0x00000000, 0x006D00A3, 0x00880036, 0x00A30000, 0x011A00D9, 0x01870151, 0x021F01CE, 0x594E4A00, 0x685E5C5B, 0x8F6E6A4E, 0x6F6F4C5C, 0x0049003A, 0x00000000, 0x0000021F, 0x008B022F, + 0xFFFFFFE1, 0x00000000, 0x006F00A6, 0x008B0037, 0x00A60000, 0x012000DE, 0x018F0158, 0x022B01D7, 0x594E4A00, 0x695F5C5B, 0x8F6F6A4E, 0x6F6F4C5C, 0x0049003A, 0x00000000, 0x0000022B, 0x008E0239, + 0xFFFFFFE2, 0x00000000, 0x007100A9, 0x008D0038, 0x00A90000, 0x012500E1, 0x0195015D, 0x023301DE, 0x594E4B00, 0x695F5D5B, 0x8F6F6A4E, 0x6F6F4C5C, 0x0049003A, 0x00000000, 0x00000233, 0x00900243, + 0xFFFFFFE3, 0x00000000, 0x007300AC, 0x00900039, 0x00AC0000, 0x012B00E6, 0x019D0164, 0x023E01E8, 0x594E4B00, 0x695F5D5B, 0x8F6F6A4E, 0x6F6F4D5D, 0x0049003A, 0x00000000, 0x0000023E, 0x0093024E, + 0xFFFFFFE4, 0x00000000, 0x007500B0, 0x0092003B, 0x00B00000, 0x013100EA, 0x01A6016B, 0x024A01F2, 0x5A4F4B00, 0x69685D5B, 0x8F6F6A4F, 0x6F6F4D5D, 0x0049003A, 0x00000000, 0x0000024A, 0x0096025A, + 0xFFFFFFE5, 0x00000000, 0x007800B3, 0x0095003C, 0x00B30000, 0x013700EF, 0x01AE0173, 0x025601FC, 0x5A4F4B00, 0x69685D5C, 0x8F786B4F, 0x6F6F4D5D, 0x0049003B, 0x00000000, 0x00000256, 0x00990266, + 0xFFFFFFE6, 0x00000000, 0x007A00B7, 0x0098003D, 0x00B70000, 0x013D00F4, 0x01B7017A, 0x02610206, 0x5A4F4B00, 0x6A685E5C, 0x8F786B4F, 0x6F6F4D5D, 0x004A003B, 0x00000000, 0x00000261, 0x009C0272, + 0xFFFFFFE7, 0x00000000, 0x007D00BC, 0x009C003F, 0x00BC0000, 0x014500FA, 0x01C20184, 0x02710213, 0x5A584C00, 0x6A685E5C, 0x8F786B58, 0x6F6F4E5E, 0x004A003B, 0x00000000, 0x00000271, 0x00A00280, + 0xFFFFFFE8, 0x00000000, 0x007F00BF, 0x009F0040, 0x00BF0000, 0x014B00FF, 0x01CA018B, 0x027D021D, 0x5A584C00, 0x6A685E5C, 0x8F786B58, 0x6F6F4E5E, 0x004A003B, 0x00000000, 0x0000027D, 0x00A3028E, + 0xFFFFFFE9, 0x00000000, 0x008200C4, 0x00A30041, 0x00C40000, 0x01530105, 0x01D60194, 0x028C022A, 0x5B584C00, 0x6A695F5D, 0x8F796B58, 0x6F6F4E5E, 0x004A003B, 0x00000000, 0x0000028C, 0x00A7029C, + 0xFFFFFFEA, 0x00000000, 0x008600C8, 0x00A70043, 0x00C80000, 0x015B010B, 0x01E1019E, 0x029C0238, 0x5B584D00, 0x6A695F5D, 0x8F796C58, 0x6F6F4F5F, 0x004A003C, 0x00000000, 0x0000029C, 0x00AB02AC, + 0xFFFFFFEB, 0x00000000, 0x008900CD, 0x00AB0044, 0x00CD0000, 0x01630111, 0x01EC01A8, 0x02AC0245, 0x5B594D00, 0x6B695F5D, 0x8F796C59, 0x6F6F4F5F, 0x004B003C, 0x00000000, 0x000002AC, 0x00AF02BC, + 0xFFFFFFEC, 0x00000000, 0x008C00D2, 0x00AF0046, 0x00D20000, 0x016C0118, 0x01F701B2, 0x02BB0252, 0x5B594D00, 0x6B69685E, 0x8F796C59, 0x6F6F4F5F, 0x004B003C, 0x00000000, 0x000002BB, 0x00B302CD, + 0xFFFFFFED, 0x00000000, 0x009000D8, 0x00B40048, 0x00D80000, 0x01760120, 0x020601BE, 0x02CF0263, 0x5C594E00, 0x6B6A685E, 0x8F796D59, 0x6F6F5868, 0x004B003D, 0x00000000, 0x000002CF, 0x00B802E0, + 0xFFFFFFEE, 0x00000000, 0x009300DC, 0x00B80049, 0x00DC0000, 0x017E0126, 0x021101C7, 0x02DE0270, 0x5C594E00, 0x6B6A685E, 0x8F7A6D59, 0x6F6F5868, 0x004C003D, 0x00000000, 0x000002DE, 0x00BC02F3, + 0xFFFFFFEF, 0x00000000, 0x009700E2, 0x00BC004B, 0x00E20000, 0x0188012E, 0x021F01D3, 0x02F20281, 0x5C594E00, 0x6C6A685F, 0x8F7A6D59, 0x6F6F5868, 0x004C003D, 0x00000000, 0x000002F2, 0x00C10307, + 0xFFFFFFF0, 0x00000000, 0x009B00E9, 0x00C2004E, 0x00E90000, 0x01940137, 0x023001E2, 0x03090295, 0x5D5A4F00, 0x6C6A695F, 0x8F7A6E5A, 0x6F6F5969, 0x004C003E, 0x00000000, 0x00000309, 0x00C7031C, + 0xFFFFFFF1, 0x00000000, 0x009F00EF, 0x00C70050, 0x00EF0000, 0x019E013F, 0x023E01EE, 0x031D02A5, 0x5D5A4F00, 0x6C6B695F, 0x8F7B6E5A, 0x6F6F5969, 0x004C003E, 0x00000000, 0x0000031D, 0x00CC0333, + 0xFFFFFFF2, 0x00000000, 0x00A400F6, 0x00CD0052, 0x00F60000, 0x01AB0148, 0x024F01FD, 0x033402B9, 0x5D5A4F00, 0x6D6B6968, 0x8F7B6E5A, 0x6F6F5969, 0x004D003E, 0x00000000, 0x00000334, 0x00D2034B, + 0xFFFFFFF3, 0x00000000, 0x00AA00FE, 0x00D40055, 0x00FE0000, 0x01B90153, 0x0262020E, 0x035002D1, 0x5E5B5800, 0x6D6B6A68, 0x8F7B6F5B, 0x6F6F5969, 0x004D003F, 0x00000000, 0x00000350, 0x00D90365, + 0xFFFFFFF4, 0x00000000, 0x00AF0107, 0x00DB0058, 0x01070000, 0x01C7015E, 0x0276021F, 0x036B02E8, 0x5E5B5800, 0x6E6C6A68, 0x8F7B6F5B, 0x6F6F5A6A, 0x004E003F, 0x00000000, 0x0000036B, 0x00E00380, + 0xFFFFFFF5, 0x00000000, 0x00B4010F, 0x00E2005A, 0x010F0000, 0x01D50169, 0x028A022F, 0x038602FF, 0x5F5B5800, 0x6E6C6A69, 0x8F7C785B, 0x6F6F5A6A, 0x004E0048, 0x00000000, 0x00000386, 0x00E7039D, + 0xFFFFFFF6, 0x00000000, 0x00BA0117, 0x00E8005D, 0x01170000, 0x01E30174, 0x029D0240, 0x03A20316, 0x5F5C5900, 0x6F6C6A69, 0x8F7C785C, 0x6F6F5A6A, 0x004F0048, 0x00000000, 0x000003A2, 0x00EE03BB, + 0xFFFFFFF7, 0x00000000, 0x00C10121, 0x00F10060, 0x01210000, 0x01F60182, 0x02B70256, 0x03C50334, 0x685C5900, 0x6F6D6B69, 0x8F7D785C, 0x6F6F5B6B, 0x004F0048, 0x00000000, 0x000003C5, 0x00F703DC, + 0xFFFFFFF8, 0x00000000, 0x00C7012B, 0x00F90064, 0x012B0000, 0x0206018E, 0x02CD026A, 0x03E4034F, 0x685C5900, 0x6F6D6B6A, 0x8F7D795C, 0x6F6F5B6B, 0x00580049, 0x00000000, 0x000003E4, 0x00FF03FE, + 0xFFFFFFF9, 0x00000000, 0x00CE0135, 0x01020067, 0x01350000, 0x0218019D, 0x02E7027F, 0x0407036D, 0x685D5A00, 0x6F6E6C6A, 0x8F7E795D, 0x6F6F5B6B, 0x00580049, 0x00000000, 0x00000407, 0x01080422, + 0xFFFFFFFA, 0x00000000, 0x00D60141, 0x010C006B, 0x01410000, 0x022D01AC, 0x03030298, 0x042E038E, 0x695D5A00, 0x6F6E6C6A, 0x8F7E795D, 0x6F6F5C6C, 0x00580049, 0x00000000, 0x0000042E, 0x0112044A, + 0xFFFFFFFB, 0x00000000, 0x00DE014D, 0x0115006F, 0x014D0000, 0x024101BC, 0x031F02B0, 0x045503AF, 0x695E5A00, 0x6F6F6C6B, 0x8F7F7A5E, 0x6F6F5C6C, 0x0059004A, 0x00000000, 0x00000455, 0x011C0473, + 0xFFFFFFFC, 0x00000000, 0x00E7015B, 0x01210074, 0x015B0000, 0x025901CF, 0x034102CD, 0x048403D7, 0x695E5B00, 0x6F6F6D6B, 0x8F7F7A5E, 0x6F6F5D6D, 0x0059004A, 0x00000000, 0x00000484, 0x012804A0, + 0xFFFFFFFD, 0x00000000, 0x00F10169, 0x012D0078, 0x01690000, 0x027201E1, 0x036202EA, 0x04B303FF, 0x6A5F5B00, 0x6F6F6E6C, 0x8F887B5F, 0x6F6F5D6D, 0x0059004B, 0x00000000, 0x000004B3, 0x013404D0, + 0xFFFFFFFE, 0x00000000, 0x00FA0177, 0x0139007D, 0x01770000, 0x028A01F4, 0x03840307, 0x04E20427, 0x6A685C00, 0x6F6F6E6C, 0x8F887B68, 0x6F6F5E6E, 0x005A004B, 0x00000000, 0x000004E2, 0x01400502, + 0xFFFFFFFF, 0x00000000, 0x01050187, 0x01460082, 0x01870000, 0x02A6020A, 0x03AB0329, 0x05190455, 0x6B685C00, 0x6F6F6F6D, 0x8F897B68, 0x6F6F5E6E, 0x005A004B, 0x00000000, 0x00000519, 0x014E0538, +}; diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vp9_const_def.h intel-vaapi-driver-1.7.1/src/gen9_vp9_const_def.h --- intel-vaapi-driver-1.0.15/src/gen9_vp9_const_def.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vp9_const_def.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,44 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWAR + * + * Authors: + * Zhao, Yakui + * + */ + +#ifndef _GEN9_VP9_CONST_H +#define _GEN9_VP9_CONST_H + +extern const unsigned int vp9_fullspiral_ime_search_path_delta[14]; + +extern const unsigned int vp9_diamond_ime_search_path_delta[14]; + +extern const int vp9_brc_const_data_p_g9[4448]; +extern const int vp9_brc_const_data_i_g9[4448]; + +extern const unsigned int gen9_vp9_avs_coeffs[256]; + +extern const unsigned int intel_vp9_costlut_key[4096]; +extern const unsigned int intel_vp9_costlut_p[4096]; + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vp9_encapi.h intel-vaapi-driver-1.7.1/src/gen9_vp9_encapi.h --- intel-vaapi-driver-1.0.15/src/gen9_vp9_encapi.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vp9_encapi.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,52 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * + */ + +#ifndef _INTEL_VP9_ENC_API_H_ +#define _INTEL_VP9_ENC_API_H_ + +#include + +struct intel_encoder_context; +struct hw_context; + +extern Bool +gen9_vp9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +extern Bool +gen9_vp9_pak_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +/* buffer points to the start address of coded_buffer. It is also + * interpreted as i965_coded_buffer_segment. + */ +extern VAStatus +gen9_vp9_get_coded_status(VADriverContextP ctx, + char *buffer, + struct hw_context *hw_context); + + +#endif // _INTE_VP9_ENC_API_H_ diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder.c intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder.c --- intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder.c 2016-06-17 01:06:24.000000000 +0000 @@ -0,0 +1,6065 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWAR + * + * Authors: + * Zhao, Yakui + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_encoder.h" +#include "gen9_vp9_encapi.h" +#include "gen9_vp9_encoder.h" +#include "gen9_vp9_encoder_kernels.h" +#include "vp9_probs.h" +#include "gen9_vp9_const_def.h" + +#define MAX_VP9_ENCODER_SURFACES 64 + +#define MAX_URB_SIZE 4096 /* In register */ +#define NUM_KERNELS_PER_GPE_CONTEXT 1 + +#define VP9_BRC_KBPS 1000 + +#define BRC_KERNEL_CBR 0x0010 +#define BRC_KERNEL_VBR 0x0020 +#define BRC_KERNEL_AVBR 0x0040 +#define BRC_KERNEL_CQL 0x0080 + +#define DEFAULT_MOCS 0x02 +#define VP9_PIC_STATE_BUFFER_SIZE 192 + +typedef struct _intel_kernel_header_ +{ + uint32_t reserved : 6; + uint32_t kernel_start_pointer : 26; +} intel_kernel_header; + +typedef struct _intel_vp9_kernel_header { + int nKernelCount; + intel_kernel_header PLY_DSCALE; + intel_kernel_header VP9_ME_P; + intel_kernel_header VP9_Enc_I_32x32; + intel_kernel_header VP9_Enc_I_16x16; + intel_kernel_header VP9_Enc_P; + intel_kernel_header VP9_Enc_TX; + intel_kernel_header VP9_DYS; + + intel_kernel_header VP9BRC_Intra_Distortion; + intel_kernel_header VP9BRC_Init; + intel_kernel_header VP9BRC_Reset; + intel_kernel_header VP9BRC_Update; +} intel_vp9_kernel_header; + +#define DYS_1X_FLAG 0x01 +#define DYS_4X_FLAG 0x02 +#define DYS_16X_FLAG 0x04 + +struct vp9_surface_param { + uint32_t frame_width; + uint32_t frame_height; +}; + +static uint32_t intel_convert_sign_mag(int val, int sign_bit_pos) +{ + uint32_t ret_val = 0; + if (val < 0) + { + val = -val; + ret_val = ((1 << (sign_bit_pos - 1)) | (val & ((1 << (sign_bit_pos - 1)) - 1))); + } + else + { + ret_val = val & ((1 << (sign_bit_pos - 1)) - 1); + } + return ret_val; +} + +static bool +intel_vp9_get_kernel_header_and_size( + void *pvbinary, + int binary_size, + INTEL_VP9_ENC_OPERATION operation, + int krnstate_idx, + struct i965_kernel *ret_kernel) +{ + typedef uint32_t BIN_PTR[4]; + + char *bin_start; + intel_vp9_kernel_header *pkh_table; + intel_kernel_header *pcurr_header, *pinvalid_entry, *pnext_header; + int next_krnoffset; + + if (!pvbinary || !ret_kernel) + return false; + + bin_start = (char *)pvbinary; + pkh_table = (intel_vp9_kernel_header *)pvbinary; + pinvalid_entry = &(pkh_table->VP9BRC_Update) + 1; + next_krnoffset = binary_size; + + if ((operation == INTEL_VP9_ENC_SCALING4X) || (operation == INTEL_VP9_ENC_SCALING2X)) + { + pcurr_header = &pkh_table->PLY_DSCALE; + } + else if (operation == INTEL_VP9_ENC_ME) + { + pcurr_header = &pkh_table->VP9_ME_P; + } + else if (operation == INTEL_VP9_ENC_MBENC) + { + pcurr_header = &pkh_table->VP9_Enc_I_32x32; + } + else if (operation == INTEL_VP9_ENC_DYS) + { + pcurr_header = &pkh_table->VP9_DYS; + } + else if (operation == INTEL_VP9_ENC_BRC) + { + pcurr_header = &pkh_table->VP9BRC_Intra_Distortion; + } + else + { + return false; + } + + pcurr_header += krnstate_idx; + ret_kernel->bin = (const BIN_PTR *)(bin_start + (pcurr_header->kernel_start_pointer << 6)); + + pnext_header = (pcurr_header + 1); + if (pnext_header < pinvalid_entry) + { + next_krnoffset = pnext_header->kernel_start_pointer << 6; + } + ret_kernel->size = next_krnoffset - (pcurr_header->kernel_start_pointer << 6); + + return true; +} + + +static void +gen9_free_surfaces_vp9(void **data) +{ + struct gen9_surface_vp9 *vp9_surface; + + if (!data || !*data) + return; + + vp9_surface = *data; + + if (vp9_surface->scaled_4x_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->scaled_4x_surface_id, 1); + vp9_surface->scaled_4x_surface_id = VA_INVALID_SURFACE; + vp9_surface->scaled_4x_surface_obj = NULL; + } + + if (vp9_surface->scaled_16x_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->scaled_16x_surface_id, 1); + vp9_surface->scaled_16x_surface_id = VA_INVALID_SURFACE; + vp9_surface->scaled_16x_surface_obj = NULL; + } + + if (vp9_surface->dys_4x_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->dys_4x_surface_id, 1); + vp9_surface->dys_4x_surface_id = VA_INVALID_SURFACE; + vp9_surface->dys_4x_surface_obj = NULL; + } + + if (vp9_surface->dys_16x_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->dys_16x_surface_id, 1); + vp9_surface->dys_16x_surface_id = VA_INVALID_SURFACE; + vp9_surface->dys_16x_surface_obj = NULL; + } + + if (vp9_surface->dys_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->dys_surface_id, 1); + vp9_surface->dys_surface_id = VA_INVALID_SURFACE; + vp9_surface->dys_surface_obj = NULL; + } + + free(vp9_surface); + + *data = NULL; + + return; +} + +static VAStatus +gen9_vp9_init_check_surfaces(VADriverContextP ctx, + struct object_surface *obj_surface, + struct vp9_surface_param *surface_param) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_surface_vp9 *vp9_surface; + int downscaled_width_4x, downscaled_height_4x; + int downscaled_width_16x, downscaled_height_16x; + + if (!obj_surface || !obj_surface->bo) + return VA_STATUS_ERROR_INVALID_SURFACE; + + if (obj_surface->private_data && + obj_surface->free_private_data != gen9_free_surfaces_vp9) { + obj_surface->free_private_data(&obj_surface->private_data); + obj_surface->private_data = NULL; + } + + if (obj_surface->private_data) { + /* if the frame width/height is already the same as the expected, + * it is unncessary to reallocate it. + */ + vp9_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + if (vp9_surface->frame_width >= surface_param->frame_width || + vp9_surface->frame_height >= surface_param->frame_height) + return VA_STATUS_SUCCESS; + + obj_surface->free_private_data(&obj_surface->private_data); + obj_surface->private_data = NULL; + vp9_surface = NULL; + } + + vp9_surface = calloc(1, sizeof(struct gen9_surface_vp9)); + + if (!vp9_surface) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + vp9_surface->ctx = ctx; + obj_surface->private_data = vp9_surface; + obj_surface->free_private_data = gen9_free_surfaces_vp9; + + vp9_surface->frame_width = surface_param->frame_width; + vp9_surface->frame_height = surface_param->frame_height; + + downscaled_width_4x = ALIGN(surface_param->frame_width / 4, 16); + downscaled_height_4x = ALIGN(surface_param->frame_height / 4, 16); + + i965_CreateSurfaces(ctx, + downscaled_width_4x, + downscaled_height_4x, + VA_RT_FORMAT_YUV420, + 1, + &vp9_surface->scaled_4x_surface_id); + + vp9_surface->scaled_4x_surface_obj = SURFACE(vp9_surface->scaled_4x_surface_id); + + if (!vp9_surface->scaled_4x_surface_obj) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + i965_check_alloc_surface_bo(ctx, vp9_surface->scaled_4x_surface_obj, 1, + VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); + + downscaled_width_16x = ALIGN(surface_param->frame_width / 16, 16); + downscaled_height_16x = ALIGN(surface_param->frame_height / 16, 16); + i965_CreateSurfaces(ctx, + downscaled_width_16x, + downscaled_height_16x, + VA_RT_FORMAT_YUV420, + 1, + &vp9_surface->scaled_16x_surface_id); + vp9_surface->scaled_16x_surface_obj = SURFACE(vp9_surface->scaled_16x_surface_id); + + if (!vp9_surface->scaled_16x_surface_obj) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + i965_check_alloc_surface_bo(ctx, vp9_surface->scaled_16x_surface_obj, 1, + VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vp9_check_dys_surfaces(VADriverContextP ctx, + struct object_surface *obj_surface, + struct vp9_surface_param *surface_param) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_surface_vp9 *vp9_surface; + int dys_width_4x, dys_height_4x; + int dys_width_16x, dys_height_16x; + + /* As this is handled after the surface checking, it is unnecessary + * to check the surface bo and vp9_priv_surface again + */ + + vp9_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + if (!vp9_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + /* if the frame_width/height of dys_surface is the same as + * the expected, it is unnecessary to allocate it again + */ + if (vp9_surface->dys_frame_width == surface_param->frame_width && + vp9_surface->dys_frame_width == surface_param->frame_width) + return VA_STATUS_SUCCESS; + + if (vp9_surface->dys_4x_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->dys_4x_surface_id, 1); + vp9_surface->dys_4x_surface_id = VA_INVALID_SURFACE; + vp9_surface->dys_4x_surface_obj = NULL; + } + + if (vp9_surface->dys_16x_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->dys_16x_surface_id, 1); + vp9_surface->dys_16x_surface_id = VA_INVALID_SURFACE; + vp9_surface->dys_16x_surface_obj = NULL; + } + + if (vp9_surface->dys_surface_obj) { + i965_DestroySurfaces(vp9_surface->ctx, &vp9_surface->dys_surface_id, 1); + vp9_surface->dys_surface_id = VA_INVALID_SURFACE; + vp9_surface->dys_surface_obj = NULL; + } + + vp9_surface->dys_frame_width = surface_param->frame_width; + vp9_surface->dys_frame_height = surface_param->frame_height; + + i965_CreateSurfaces(ctx, + surface_param->frame_width, + surface_param->frame_height, + VA_RT_FORMAT_YUV420, + 1, + &vp9_surface->dys_surface_id); + vp9_surface->dys_surface_obj = SURFACE(vp9_surface->dys_surface_id); + + if (!vp9_surface->dys_surface_obj) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + i965_check_alloc_surface_bo(ctx, vp9_surface->dys_surface_obj, 1, + VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); + + dys_width_4x = ALIGN(surface_param->frame_width / 4, 16); + dys_height_4x = ALIGN(surface_param->frame_width / 4, 16); + + i965_CreateSurfaces(ctx, + dys_width_4x, + dys_height_4x, + VA_RT_FORMAT_YUV420, + 1, + &vp9_surface->dys_4x_surface_id); + + vp9_surface->dys_4x_surface_obj = SURFACE(vp9_surface->dys_4x_surface_id); + + if (!vp9_surface->dys_4x_surface_obj) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + i965_check_alloc_surface_bo(ctx, vp9_surface->dys_4x_surface_obj, 1, + VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); + + dys_width_16x = ALIGN(surface_param->frame_width / 16, 16); + dys_height_16x = ALIGN(surface_param->frame_width / 16, 16); + i965_CreateSurfaces(ctx, + dys_width_16x, + dys_height_16x, + VA_RT_FORMAT_YUV420, + 1, + &vp9_surface->dys_16x_surface_id); + vp9_surface->dys_16x_surface_obj = SURFACE(vp9_surface->dys_16x_surface_id); + + if (!vp9_surface->dys_16x_surface_obj) { + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + i965_check_alloc_surface_bo(ctx, vp9_surface->dys_16x_surface_obj, 1, + VA_FOURCC('N', 'V', '1', '2'), SUBSAMPLE_YUV420); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vp9_allocate_resources(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int allocate) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct gen9_vp9_state *vp9_state; + int allocate_flag, i; + int res_size; + uint32_t frame_width_in_sb, frame_height_in_sb, frame_sb_num; + unsigned int width, height; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + /* the buffer related with BRC is not changed. So it is allocated + * based on the input parameter + */ + if (allocate) { + i965_free_gpe_resource(&vme_context->res_brc_history_buffer); + i965_free_gpe_resource(&vme_context->res_brc_const_data_buffer); + i965_free_gpe_resource(&vme_context->res_brc_mbenc_curbe_write_buffer); + i965_free_gpe_resource(&vme_context->res_pic_state_brc_read_buffer); + i965_free_gpe_resource(&vme_context->res_pic_state_brc_write_hfw_read_buffer); + i965_free_gpe_resource(&vme_context->res_pic_state_hfw_write_buffer); + i965_free_gpe_resource(&vme_context->res_seg_state_brc_read_buffer); + i965_free_gpe_resource(&vme_context->res_seg_state_brc_write_buffer); + i965_free_gpe_resource(&vme_context->res_brc_bitstream_size_buffer); + i965_free_gpe_resource(&vme_context->res_brc_hfw_data_buffer); + i965_free_gpe_resource(&vme_context->res_brc_mmdk_pak_buffer); + + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_brc_history_buffer, + VP9_BRC_HISTORY_BUFFER_SIZE, + "Brc History buffer"); + if (!allocate_flag) + goto failed_allocation; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_brc_const_data_buffer, + VP9_BRC_CONSTANTSURFACE_SIZE, + "Brc Constant buffer"); + if (!allocate_flag) + goto failed_allocation; + + res_size = ALIGN(sizeof(vp9_mbenc_curbe_data), 64) + 128 + + ALIGN(sizeof(struct gen8_interface_descriptor_data), 64) * NUM_VP9_MBENC; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_brc_mbenc_curbe_write_buffer, + res_size, + "Brc Curbe write"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_PIC_STATE_BUFFER_SIZE * 4; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_pic_state_brc_read_buffer, + res_size, + "Pic State Brc_read"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_PIC_STATE_BUFFER_SIZE * 4; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_pic_state_brc_write_hfw_read_buffer, + res_size, + "Pic State Brc_write Hfw_Read"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_PIC_STATE_BUFFER_SIZE * 4; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_pic_state_hfw_write_buffer, + res_size, + "Pic State Hfw Write"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_SEGMENT_STATE_BUFFER_SIZE; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_seg_state_brc_read_buffer, + res_size, + "Segment state brc_read"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_SEGMENT_STATE_BUFFER_SIZE; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_seg_state_brc_write_buffer, + res_size, + "Segment state brc_write"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_BRC_BITSTREAM_SIZE_BUFFER_SIZE; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_brc_bitstream_size_buffer, + res_size, + "Brc bitstream buffer"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_HFW_BRC_DATA_BUFFER_SIZE; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_brc_hfw_data_buffer, + res_size, + "mfw Brc data"); + if (!allocate_flag) + goto failed_allocation; + + res_size = VP9_BRC_MMDK_PAK_BUFFER_SIZE; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_brc_mmdk_pak_buffer, + res_size, + "Brc mmdk_pak"); + if (!allocate_flag) + goto failed_allocation; + } + + /* If the width/height of allocated buffer is greater than the expected, + * it is unnecessary to allocate it again + */ + if (vp9_state->res_width >= vp9_state->frame_width && + vp9_state->res_height >= vp9_state->frame_height) { + + return VA_STATUS_SUCCESS; + } + frame_width_in_sb = ALIGN(vp9_state->frame_width, 64) / 64; + frame_height_in_sb = ALIGN(vp9_state->frame_height, 64) / 64; + frame_sb_num = frame_width_in_sb * frame_height_in_sb; + + i965_free_gpe_resource(&vme_context->res_hvd_line_buffer); + res_size = frame_width_in_sb * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_hvd_line_buffer, + res_size, + "VP9 hvd line line"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_hvd_tile_line_buffer); + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_hvd_tile_line_buffer, + res_size, + "VP9 hvd tile_line line"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_deblocking_filter_line_buffer); + res_size = frame_width_in_sb * 18 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_deblocking_filter_line_buffer, + res_size, + "VP9 deblocking filter line"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_deblocking_filter_tile_line_buffer); + res_size = frame_width_in_sb * 18 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_deblocking_filter_tile_line_buffer, + res_size, + "VP9 deblocking tile line"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_deblocking_filter_tile_col_buffer); + res_size = frame_height_in_sb * 17 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_deblocking_filter_tile_col_buffer, + res_size, + "VP9 deblocking tile col"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_metadata_line_buffer); + res_size = frame_width_in_sb * 5 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_metadata_line_buffer, + res_size, + "VP9 metadata line"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_metadata_tile_line_buffer); + res_size = frame_width_in_sb * 5 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_metadata_tile_line_buffer, + res_size, + "VP9 metadata tile line"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_metadata_tile_col_buffer); + res_size = frame_height_in_sb * 5 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_metadata_tile_col_buffer, + res_size, + "VP9 metadata tile col"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_prob_buffer); + res_size = 2048; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_prob_buffer, + res_size, + "VP9 prob"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_segmentid_buffer); + res_size = frame_sb_num * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_segmentid_buffer, + res_size, + "VP9 segment id"); + if (!allocate_flag) + goto failed_allocation; + + i965_zero_gpe_resource(&vme_context->res_segmentid_buffer); + + i965_free_gpe_resource(&vme_context->res_prob_delta_buffer); + res_size = 29 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_prob_delta_buffer, + res_size, + "VP9 prob delta"); + if (!allocate_flag) + goto failed_allocation; + + i965_zero_gpe_resource(&vme_context->res_segmentid_buffer); + + i965_free_gpe_resource(&vme_context->res_prob_delta_buffer); + res_size = 29 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_prob_delta_buffer, + res_size, + "VP9 prob delta"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_compressed_input_buffer); + res_size = 32 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_compressed_input_buffer, + res_size, + "VP9 compressed_input buffer"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_prob_counter_buffer); + res_size = 193 * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_prob_counter_buffer, + res_size, + "VP9 prob counter"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_tile_record_streamout_buffer); + res_size = frame_sb_num * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_tile_record_streamout_buffer, + res_size, + "VP9 tile record stream_out"); + if (!allocate_flag) + goto failed_allocation; + + i965_free_gpe_resource(&vme_context->res_cu_stat_streamout_buffer); + res_size = frame_sb_num * 64; + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_cu_stat_streamout_buffer, + res_size, + "VP9 CU stat stream_out"); + if (!allocate_flag) + goto failed_allocation; + + width = vp9_state->downscaled_width_4x_in_mb * 32; + height = vp9_state->downscaled_height_4x_in_mb * 16; + i965_free_gpe_resource(&vme_context->s4x_memv_data_buffer); + allocate_flag = i965_gpe_allocate_2d_resource(i965->intel.bufmgr, + &vme_context->s4x_memv_data_buffer, + width, height, + ALIGN(width, 64), + "VP9 4x MEMV data"); + if (!allocate_flag) + goto failed_allocation; + + width = vp9_state->downscaled_width_4x_in_mb * 8; + height = vp9_state->downscaled_height_4x_in_mb * 16; + i965_free_gpe_resource(&vme_context->s4x_memv_distortion_buffer); + allocate_flag = i965_gpe_allocate_2d_resource(i965->intel.bufmgr, + &vme_context->s4x_memv_distortion_buffer, + width, height, + ALIGN(width, 64), + "VP9 4x MEMV distorion"); + if (!allocate_flag) + goto failed_allocation; + + width = ALIGN(vp9_state->downscaled_width_16x_in_mb * 32, 64); + height = vp9_state->downscaled_height_16x_in_mb * 16; + i965_free_gpe_resource(&vme_context->s16x_memv_data_buffer); + allocate_flag = i965_gpe_allocate_2d_resource(i965->intel.bufmgr, + &vme_context->s16x_memv_data_buffer, + width, height, + width, + "VP9 16x MEMV data"); + if (!allocate_flag) + goto failed_allocation; + + width = vp9_state->frame_width_in_mb * 16; + height = vp9_state->frame_height_in_mb * 8; + i965_free_gpe_resource(&vme_context->res_output_16x16_inter_modes); + allocate_flag = i965_gpe_allocate_2d_resource(i965->intel.bufmgr, + &vme_context->res_output_16x16_inter_modes, + width, height, + ALIGN(width, 64), + "VP9 output inter_mode"); + if (!allocate_flag) + goto failed_allocation; + + res_size = vp9_state->frame_width_in_mb * vp9_state->frame_height_in_mb * + 16 * 4; + for (i = 0; i < 2; i++) { + i965_free_gpe_resource(&vme_context->res_mode_decision[i]); + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_mode_decision[i], + res_size, + "VP9 mode decision"); + if (!allocate_flag) + goto failed_allocation; + + } + + res_size = frame_sb_num * 9 * 64; + for (i = 0; i < 2; i++) { + i965_free_gpe_resource(&vme_context->res_mv_temporal_buffer[i]); + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_mv_temporal_buffer[i], + res_size, + "VP9 temporal mv"); + if (!allocate_flag) + goto failed_allocation; + } + + vp9_state->mb_data_offset = ALIGN(frame_sb_num * 16, 4096) + 4096; + res_size = vp9_state->mb_data_offset + frame_sb_num * 64 * 64 + 1000; + i965_free_gpe_resource(&vme_context->res_mb_code_surface); + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_mb_code_surface, + ALIGN(res_size, 4096), + "VP9 mb_code surface"); + if (!allocate_flag) + goto failed_allocation; + + res_size = 128; + i965_free_gpe_resource(&vme_context->res_pak_uncompressed_input_buffer); + allocate_flag = i965_allocate_gpe_resource(i965->intel.bufmgr, + &vme_context->res_pak_uncompressed_input_buffer, + ALIGN(res_size, 4096), + "VP9 pak_uncompressed_input"); + if (!allocate_flag) + goto failed_allocation; + + if (!vme_context->frame_header_data) { + /* allocate 512 bytes for generating the uncompressed header */ + vme_context->frame_header_data = calloc(1, 512); + } + + vp9_state->res_width = vp9_state->frame_width; + vp9_state->res_height = vp9_state->frame_height; + + return VA_STATUS_SUCCESS; + +failed_allocation: + return VA_STATUS_ERROR_ALLOCATION_FAILED; +} + +static void +gen9_vp9_free_resources(struct gen9_encoder_context_vp9 *vme_context) +{ + int i; + struct gen9_vp9_state *vp9_state = (struct gen9_vp9_state *) vme_context->enc_priv_state; + + if (vp9_state->brc_enabled) { + i965_free_gpe_resource(&vme_context->res_brc_history_buffer); + i965_free_gpe_resource(&vme_context->res_brc_const_data_buffer); + i965_free_gpe_resource(&vme_context->res_brc_mbenc_curbe_write_buffer); + i965_free_gpe_resource(&vme_context->res_pic_state_brc_read_buffer); + i965_free_gpe_resource(&vme_context->res_pic_state_brc_write_hfw_read_buffer); + i965_free_gpe_resource(&vme_context->res_pic_state_hfw_write_buffer); + i965_free_gpe_resource(&vme_context->res_seg_state_brc_read_buffer); + i965_free_gpe_resource(&vme_context->res_seg_state_brc_write_buffer); + i965_free_gpe_resource(&vme_context->res_brc_bitstream_size_buffer); + i965_free_gpe_resource(&vme_context->res_brc_hfw_data_buffer); + i965_free_gpe_resource(&vme_context->res_brc_mmdk_pak_buffer); + } + + i965_free_gpe_resource(&vme_context->res_hvd_line_buffer); + i965_free_gpe_resource(&vme_context->res_hvd_tile_line_buffer); + i965_free_gpe_resource(&vme_context->res_deblocking_filter_line_buffer); + i965_free_gpe_resource(&vme_context->res_deblocking_filter_tile_line_buffer); + i965_free_gpe_resource(&vme_context->res_deblocking_filter_tile_col_buffer); + i965_free_gpe_resource(&vme_context->res_metadata_line_buffer); + i965_free_gpe_resource(&vme_context->res_metadata_tile_line_buffer); + i965_free_gpe_resource(&vme_context->res_metadata_tile_col_buffer); + i965_free_gpe_resource(&vme_context->res_prob_buffer); + i965_free_gpe_resource(&vme_context->res_segmentid_buffer); + i965_free_gpe_resource(&vme_context->res_prob_delta_buffer); + i965_free_gpe_resource(&vme_context->res_prob_counter_buffer); + i965_free_gpe_resource(&vme_context->res_tile_record_streamout_buffer); + i965_free_gpe_resource(&vme_context->res_cu_stat_streamout_buffer); + i965_free_gpe_resource(&vme_context->s4x_memv_data_buffer); + i965_free_gpe_resource(&vme_context->s4x_memv_distortion_buffer); + i965_free_gpe_resource(&vme_context->s16x_memv_data_buffer); + i965_free_gpe_resource(&vme_context->res_output_16x16_inter_modes); + for (i = 0; i < 2; i++) { + i965_free_gpe_resource(&vme_context->res_mode_decision[i]); + } + + for (i = 0; i < 2; i++) { + i965_free_gpe_resource(&vme_context->res_mv_temporal_buffer[i]); + } + + i965_free_gpe_resource(&vme_context->res_compressed_input_buffer); + i965_free_gpe_resource(&vme_context->res_mb_code_surface); + i965_free_gpe_resource(&vme_context->res_pak_uncompressed_input_buffer); + + if (vme_context->frame_header_data) { + free(vme_context->frame_header_data); + vme_context->frame_header_data = NULL; + } + return; +} + +static void +gen9_init_media_object_walker_parameter(struct intel_encoder_context *encoder_context, + struct vp9_encoder_kernel_walker_parameter *kernel_walker_param, + struct gpe_media_object_walker_parameter *walker_param) +{ + memset(walker_param, 0, sizeof(*walker_param)); + + walker_param->use_scoreboard = kernel_walker_param->use_scoreboard; + + walker_param->block_resolution.x = kernel_walker_param->resolution_x; + walker_param->block_resolution.y = kernel_walker_param->resolution_y; + + walker_param->global_resolution.x = kernel_walker_param->resolution_x; + walker_param->global_resolution.y = kernel_walker_param->resolution_y; + + walker_param->global_outer_loop_stride.x = kernel_walker_param->resolution_x; + walker_param->global_outer_loop_stride.y = 0; + + walker_param->global_inner_loop_unit.x = 0; + walker_param->global_inner_loop_unit.y = kernel_walker_param->resolution_y; + + walker_param->local_loop_exec_count = 0xFFFF; //MAX VALUE + walker_param->global_loop_exec_count = 0xFFFF; //MAX VALUE + + if (kernel_walker_param->no_dependency) { + walker_param->scoreboard_mask = 0; + walker_param->use_scoreboard = 0; + // Raster scan walking pattern + walker_param->local_outer_loop_stride.x = 0; + walker_param->local_outer_loop_stride.y = 1; + walker_param->local_inner_loop_unit.x = 1; + walker_param->local_inner_loop_unit.y = 0; + walker_param->local_end.x = kernel_walker_param->resolution_x - 1; + walker_param->local_end.y = 0; + } else { + walker_param->local_end.x = 0; + walker_param->local_end.y = 0; + + if (kernel_walker_param->walker_degree == VP9_45Z_DEGREE) { + // 45z degree + walker_param->scoreboard_mask = 0x0F; + + walker_param->global_loop_exec_count = 0x3FF; + walker_param->local_loop_exec_count = 0x3FF; + + walker_param->global_resolution.x = (unsigned int)(kernel_walker_param->resolution_x / 2.f) + 1; + walker_param->global_resolution.y = 2 * kernel_walker_param->resolution_y; + + walker_param->global_start.x = 0; + walker_param->global_start.y = 0; + + walker_param->global_outer_loop_stride.x = walker_param->global_resolution.x; + walker_param->global_outer_loop_stride.y = 0; + + walker_param->global_inner_loop_unit.x = 0; + walker_param->global_inner_loop_unit.y = walker_param->global_resolution.y; + + walker_param->block_resolution.x = walker_param->global_resolution.x; + walker_param->block_resolution.y = walker_param->global_resolution.y; + + walker_param->local_start.x = 0; + walker_param->local_start.y = 0; + + walker_param->local_outer_loop_stride.x = 1; + walker_param->local_outer_loop_stride.y = 0; + + walker_param->local_inner_loop_unit.x = -1; + walker_param->local_inner_loop_unit.y = 4; + + walker_param->middle_loop_extra_steps = 3; + walker_param->mid_loop_unit_x = 0; + walker_param->mid_loop_unit_y = 1; + } else { + // 26 degree + walker_param->scoreboard_mask = 0x0F; + walker_param->local_outer_loop_stride.x = 1; + walker_param->local_outer_loop_stride.y = 0; + walker_param->local_inner_loop_unit.x = -2; + walker_param->local_inner_loop_unit.y = 1; + } + } +} + +static void +gen9_add_2d_gpe_surface(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + int is_uv_surface, + int is_media_block_rw, + unsigned int format, + int index) +{ + struct i965_gpe_resource gpe_resource; + struct i965_gpe_surface gpe_surface; + + memset(&gpe_surface, 0, sizeof(gpe_surface)); + + i965_object_surface_to_2d_gpe_resource(&gpe_resource, obj_surface); + gpe_surface.gpe_resource = &gpe_resource; + gpe_surface.is_2d_surface = 1; + gpe_surface.is_uv_surface = !!is_uv_surface; + gpe_surface.is_media_block_rw = !!is_media_block_rw; + + gpe_surface.cacheability_control = DEFAULT_MOCS; + gpe_surface.format = format; + + gen9_gpe_context_add_surface(gpe_context, &gpe_surface, index); + i965_free_gpe_resource(&gpe_resource); +} + +static void +gen9_add_adv_gpe_surface(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + int index) +{ + struct i965_gpe_resource gpe_resource; + struct i965_gpe_surface gpe_surface; + + memset(&gpe_surface, 0, sizeof(gpe_surface)); + + i965_object_surface_to_2d_gpe_resource(&gpe_resource, obj_surface); + gpe_surface.gpe_resource = &gpe_resource; + gpe_surface.is_adv_surface = 1; + gpe_surface.cacheability_control = DEFAULT_MOCS; + gpe_surface.v_direction = 2; + + gen9_gpe_context_add_surface(gpe_context, &gpe_surface, index); + i965_free_gpe_resource(&gpe_resource); +} + +static void +gen9_add_buffer_gpe_surface(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_gpe_resource *gpe_buffer, + int is_raw_buffer, + unsigned int size, + unsigned int offset, + int index) +{ + struct i965_gpe_surface gpe_surface; + + memset(&gpe_surface, 0, sizeof(gpe_surface)); + + gpe_surface.gpe_resource = gpe_buffer; + gpe_surface.is_buffer = 1; + gpe_surface.is_raw_buffer = !!is_raw_buffer; + gpe_surface.cacheability_control = DEFAULT_MOCS; + gpe_surface.size = size; + gpe_surface.offset = offset; + + gen9_gpe_context_add_surface(gpe_context, &gpe_surface, index); +} + +static void +gen9_add_buffer_2d_gpe_surface(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_gpe_resource *gpe_buffer, + int is_media_block_rw, + unsigned int format, + int index) +{ + struct i965_gpe_surface gpe_surface; + + memset(&gpe_surface, 0, sizeof(gpe_surface)); + + gpe_surface.gpe_resource = gpe_buffer; + gpe_surface.is_2d_surface = 1; + gpe_surface.is_media_block_rw = !!is_media_block_rw; + gpe_surface.cacheability_control = DEFAULT_MOCS; + gpe_surface.format = format; + + gen9_gpe_context_add_surface(gpe_context, &gpe_surface, index); +} + +static void +gen9_add_dri_buffer_gpe_surface(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + dri_bo *bo, + int is_raw_buffer, + unsigned int size, + unsigned int offset, + int index) +{ + struct i965_gpe_resource gpe_resource; + + i965_dri_object_to_buffer_gpe_resource(&gpe_resource, bo); + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + &gpe_resource, + is_raw_buffer, + size, + offset, + index); + + i965_free_gpe_resource(&gpe_resource); +} + +/* +static void +gen9_add_dri_buffer_2d_gpe_surface(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + dri_bo *bo, + unsigned int width, + unsigned int height, + unsigned int pitch, + int is_media_block_rw, + unsigned int format, + int index) +{ + struct i965_gpe_resource gpe_resource; + + i965_gpe_dri_object_to_2d_gpe_resource(&gpe_resource, bo, width, height, pitch); + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + &gpe_resource, + is_media_block_rw, + format, + index); + + i965_free_gpe_resource(&gpe_resource); +} +*/ + +static void +gen9_run_kernel_media_object(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_context *gpe_context, + int media_function, + struct gpe_media_object_parameter *param) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct vp9_encode_status_buffer_internal *status_buffer; + struct gen9_vp9_state *vp9_state; + struct gpe_mi_store_data_imm_parameter mi_store_data_imm; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + if (!vp9_state || !batch) + return; + + intel_batchbuffer_start_atomic(batch, 0x1000); + + status_buffer = &(vp9_state->status_buffer); + memset(&mi_store_data_imm, 0, sizeof(mi_store_data_imm)); + mi_store_data_imm.bo = status_buffer->bo; + mi_store_data_imm.offset = status_buffer->media_index_offset; + mi_store_data_imm.dw0 = media_function; + gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm); + + intel_batchbuffer_emit_mi_flush(batch); + gen9_gpe_pipeline_setup(ctx, gpe_context, batch); + gen8_gpe_media_object(ctx, gpe_context, batch, param); + gen8_gpe_media_state_flush(ctx, gpe_context, batch); + + gen9_gpe_pipeline_end(ctx, gpe_context, batch); + + intel_batchbuffer_end_atomic(batch); + + intel_batchbuffer_flush(batch); +} + +static void +gen9_run_kernel_media_object_walker(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_context *gpe_context, + int media_function, + struct gpe_media_object_walker_parameter *param) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct vp9_encode_status_buffer_internal *status_buffer; + struct gen9_vp9_state *vp9_state; + struct gpe_mi_store_data_imm_parameter mi_store_data_imm; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + if (!vp9_state || !batch) + return; + + intel_batchbuffer_start_atomic(batch, 0x1000); + + intel_batchbuffer_emit_mi_flush(batch); + + status_buffer = &(vp9_state->status_buffer); + memset(&mi_store_data_imm, 0, sizeof(mi_store_data_imm)); + mi_store_data_imm.bo = status_buffer->bo; + mi_store_data_imm.offset = status_buffer->media_index_offset; + mi_store_data_imm.dw0 = media_function; + gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm); + + gen9_gpe_pipeline_setup(ctx, gpe_context, batch); + gen9_gpe_media_object_walker(ctx, gpe_context, batch, param); + gen8_gpe_media_state_flush(ctx, gpe_context, batch); + + gen9_gpe_pipeline_end(ctx, gpe_context, batch); + + intel_batchbuffer_end_atomic(batch); + + intel_batchbuffer_flush(batch); +} + +static +void gen9_vp9_set_curbe_brc(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_brc_curbe_param *param) +{ + VAEncSequenceParameterBufferVP9 *seq_param; + VAEncPictureParameterBufferVP9 *pic_param; + VAEncMiscParameterTypeVP9PerSegmantParam *segment_param; + vp9_brc_curbe_data *cmd; + double dbps_ratio, dInputBitsPerFrame; + struct gen9_vp9_state *vp9_state; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + pic_param = param->ppic_param; + seq_param = param->pseq_param; + segment_param = param->psegment_param; + + cmd = gen8p_gpe_context_map_curbe(gpe_context); + + if (!cmd) + return; + + memset(cmd, 0, sizeof(vp9_brc_curbe_data)); + + if (!vp9_state->dys_enabled) + { + cmd->dw0.frame_width = pic_param->frame_width_src; + cmd->dw0.frame_height = pic_param->frame_height_src; + } + else + { + cmd->dw0.frame_width = pic_param->frame_width_dst; + cmd->dw0.frame_height = pic_param->frame_height_dst; + } + + cmd->dw1.frame_type = vp9_state->picture_coding_type; + cmd->dw1.segmentation_enable = 0; + cmd->dw1.ref_frame_flags = vp9_state->ref_frame_flag; + cmd->dw1.num_tlevels = 1; + + switch(param->media_state_type) + { + case VP9_MEDIA_STATE_BRC_INIT_RESET: + { + cmd->dw3.max_level_ratiot0 = 0; + cmd->dw3.max_level_ratiot1 = 0; + cmd->dw3.max_level_ratiot2 = 0; + cmd->dw3.max_level_ratiot3 = 0; + + cmd->dw4.profile_level_max_frame = seq_param->max_frame_width * + seq_param->max_frame_height; + cmd->dw5.init_buf_fullness = vp9_state->init_vbv_buffer_fullness_in_bit; + cmd->dw6.buf_size = vp9_state->vbv_buffer_size_in_bit; + cmd->dw7.target_bit_rate = (vp9_state->target_bit_rate + VP9_BRC_KBPS - 1) / VP9_BRC_KBPS * + VP9_BRC_KBPS; + cmd->dw8.max_bit_rate = (vp9_state->max_bit_rate + VP9_BRC_KBPS - 1) / VP9_BRC_KBPS * + VP9_BRC_KBPS; + cmd->dw9.min_bit_rate = (vp9_state->min_bit_rate + VP9_BRC_KBPS - 1) / VP9_BRC_KBPS * + VP9_BRC_KBPS; + cmd->dw10.frame_ratem = vp9_state->frame_rate; + cmd->dw11.frame_rated = 1; + + cmd->dw14.avbr_accuracy = 30; + cmd->dw14.avbr_convergence = 150; + + if (encoder_context->rate_control_mode == VA_RC_CBR) + { + cmd->dw12.brc_flag = BRC_KERNEL_CBR; + cmd->dw8.max_bit_rate = cmd->dw7.target_bit_rate; + cmd->dw9.min_bit_rate = 0; + } + else if (encoder_context->rate_control_mode == VA_RC_VBR) + { + cmd->dw12.brc_flag = BRC_KERNEL_VBR; + } + else + { + cmd->dw12.brc_flag = BRC_KERNEL_CQL; + cmd->dw16.cq_level = 30; + } + cmd->dw12.gopp = seq_param->intra_period - 1; + + cmd->dw13.init_frame_width = pic_param->frame_width_src; + cmd->dw13.init_frame_height = pic_param->frame_height_src; + + cmd->dw15.min_qp = 0; + cmd->dw15.max_qp = 255; + + cmd->dw16.cq_level = 30; + + cmd->dw17.enable_dynamic_scaling = vp9_state->dys_in_use; + cmd->dw17.brc_overshoot_cbr_pct = 150; + + dInputBitsPerFrame = (double)(cmd->dw8.max_bit_rate) / (vp9_state->frame_rate); + dbps_ratio = dInputBitsPerFrame / ((double)(vp9_state->vbv_buffer_size_in_bit) / 30); + if (dbps_ratio < 0.1) + dbps_ratio = 0.1; + if (dbps_ratio > 3.5) + dbps_ratio = 3.5; + + *param->pbrc_init_reset_buf_size_in_bits = cmd->dw6.buf_size; + *param->pbrc_init_reset_input_bits_per_frame = dInputBitsPerFrame; + + cmd->dw18.pframe_deviation_threshold0 = (uint32_t)(-50 * pow(0.90, dbps_ratio)); + cmd->dw18.pframe_deviation_threshold1 = (uint32_t)(-50 * pow(0.66, dbps_ratio)); + cmd->dw18.pframe_deviation_threshold2 = (uint32_t)(-50 * pow(0.46, dbps_ratio)); + cmd->dw18.pframe_deviation_threshold3 = (uint32_t)(-50 * pow(0.3, dbps_ratio)); + cmd->dw19.pframe_deviation_threshold4 = (uint32_t)(50 * pow(0.3, dbps_ratio)); + cmd->dw19.pframe_deviation_threshold5 = (uint32_t)(50 * pow(0.46, dbps_ratio)); + cmd->dw19.pframe_deviation_threshold6 = (uint32_t)(50 * pow(0.7, dbps_ratio)); + cmd->dw19.pframe_deviation_threshold7 = (uint32_t)(50 * pow(0.9, dbps_ratio)); + + cmd->dw20.vbr_deviation_threshold0 = (uint32_t)(-50 * pow(0.9, dbps_ratio)); + cmd->dw20.vbr_deviation_threshold1 = (uint32_t)(-50 * pow(0.7, dbps_ratio)); + cmd->dw20.vbr_deviation_threshold2 = (uint32_t)(-50 * pow(0.5, dbps_ratio)); + cmd->dw20.vbr_deviation_threshold3 = (uint32_t)(-50 * pow(0.3, dbps_ratio)); + cmd->dw21.vbr_deviation_threshold4 = (uint32_t)(100 * pow(0.4, dbps_ratio)); + cmd->dw21.vbr_deviation_threshold5 = (uint32_t)(100 * pow(0.5, dbps_ratio)); + cmd->dw21.vbr_deviation_threshold6 = (uint32_t)(100 * pow(0.75, dbps_ratio)); + cmd->dw21.vbr_deviation_threshold7 = (uint32_t)(100 * pow(0.9, dbps_ratio)); + + cmd->dw22.kframe_deviation_threshold0 = (uint32_t)(-50 * pow(0.8, dbps_ratio)); + cmd->dw22.kframe_deviation_threshold1 = (uint32_t)(-50 * pow(0.6, dbps_ratio)); + cmd->dw22.kframe_deviation_threshold2 = (uint32_t)(-50 * pow(0.34, dbps_ratio)); + cmd->dw22.kframe_deviation_threshold3 = (uint32_t)(-50 * pow(0.2, dbps_ratio)); + cmd->dw23.kframe_deviation_threshold4 = (uint32_t)(50 * pow(0.2, dbps_ratio)); + cmd->dw23.kframe_deviation_threshold5 = (uint32_t)(50 * pow(0.4, dbps_ratio)); + cmd->dw23.kframe_deviation_threshold6 = (uint32_t)(50 * pow(0.66, dbps_ratio)); + cmd->dw23.kframe_deviation_threshold7 = (uint32_t)(50 * pow(0.9, dbps_ratio)); + + break; + } + case VP9_MEDIA_STATE_BRC_UPDATE: + { + cmd->dw15.min_qp = 0; + cmd->dw15.max_qp = 255; + + cmd->dw25.frame_number = param->frame_number; + + // Used in dynamic scaling. set to zero for now + cmd->dw27.hrd_buffer_fullness_upper_limit = 0; + cmd->dw28.hrd_buffer_fullness_lower_limit = 0; + + if (pic_param->pic_flags.bits.segmentation_enabled) { + cmd->dw32.seg_delta_qp0 = segment_param->seg_data[0].segment_qindex_delta; + cmd->dw32.seg_delta_qp1 = segment_param->seg_data[1].segment_qindex_delta; + cmd->dw32.seg_delta_qp2 = segment_param->seg_data[2].segment_qindex_delta; + cmd->dw32.seg_delta_qp3 = segment_param->seg_data[3].segment_qindex_delta; + + cmd->dw33.seg_delta_qp4 = segment_param->seg_data[4].segment_qindex_delta; + cmd->dw33.seg_delta_qp5 = segment_param->seg_data[5].segment_qindex_delta; + cmd->dw33.seg_delta_qp6 = segment_param->seg_data[6].segment_qindex_delta; + cmd->dw33.seg_delta_qp7 = segment_param->seg_data[7].segment_qindex_delta; + } + + //cmd->dw34.temporal_id = pPicParams->temporal_idi; + cmd->dw34.temporal_id = 0; + cmd->dw34.multi_ref_qp_check = param->multi_ref_qp_check; + + cmd->dw35.max_num_pak_passes = param->brc_num_pak_passes; + cmd->dw35.sync_async = 0; + cmd->dw35.mbrc = param->mbbrc_enabled; + if (*param->pbrc_init_current_target_buf_full_in_bits > + ((double)(*param->pbrc_init_reset_buf_size_in_bits))) { + *param->pbrc_init_current_target_buf_full_in_bits -= + (double)(*param->pbrc_init_reset_buf_size_in_bits); + cmd->dw35.overflow = 1; + } + else + cmd->dw35.overflow = 0; + + cmd->dw24.target_size = (uint32_t)(*param->pbrc_init_current_target_buf_full_in_bits); + + cmd->dw36.segmentation = pic_param->pic_flags.bits.segmentation_enabled; + + *param->pbrc_init_current_target_buf_full_in_bits += *param->pbrc_init_reset_input_bits_per_frame; + + cmd->dw38.qdelta_ydc = pic_param->luma_dc_qindex_delta; + cmd->dw38.qdelta_uvdc = pic_param->chroma_dc_qindex_delta; + cmd->dw38.qdelta_uvac = pic_param->chroma_ac_qindex_delta; + + break; + } + case VP9_MEDIA_STATE_ENC_I_FRAME_DIST: + cmd->dw2.intra_mode_disable = 0; + break; + default: + break; + } + + cmd->dw48.brc_y4x_input_bti = VP9_BTI_BRC_SRCY4X_G9; + cmd->dw49.brc_vme_coarse_intra_input_bti = VP9_BTI_BRC_VME_COARSE_INTRA_G9; + cmd->dw50.brc_history_buffer_bti = VP9_BTI_BRC_HISTORY_G9; + cmd->dw51.brc_const_data_input_bti = VP9_BTI_BRC_CONSTANT_DATA_G9; + cmd->dw52.brc_distortion_bti = VP9_BTI_BRC_DISTORTION_G9; + cmd->dw53.brc_mmdk_pak_output_bti = VP9_BTI_BRC_MMDK_PAK_OUTPUT_G9; + cmd->dw54.brc_enccurbe_input_bti = VP9_BTI_BRC_MBENC_CURBE_INPUT_G9; + cmd->dw55.brc_enccurbe_output_bti = VP9_BTI_BRC_MBENC_CURBE_OUTPUT_G9; + cmd->dw56.brc_pic_state_input_bti = VP9_BTI_BRC_PIC_STATE_INPUT_G9; + cmd->dw57.brc_pic_state_output_bti = VP9_BTI_BRC_PIC_STATE_OUTPUT_G9; + cmd->dw58.brc_seg_state_input_bti = VP9_BTI_BRC_SEGMENT_STATE_INPUT_G9; + cmd->dw59.brc_seg_state_output_bti = VP9_BTI_BRC_SEGMENT_STATE_OUTPUT_G9; + cmd->dw60.brc_bitstream_size_data_bti = VP9_BTI_BRC_BITSTREAM_SIZE_G9; + cmd->dw61.brc_hfw_data_output_bti = VP9_BTI_BRC_HFW_DATA_G9; + + gen8p_gpe_context_unmap_curbe(gpe_context); + return; +} + +static void +gen9_brc_init_reset_add_surfaces_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct i965_gpe_context *gpe_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + &vme_context->res_brc_history_buffer, + 0, + vme_context->res_brc_history_buffer.size, + 0, + VP9_BTI_BRC_HISTORY_G9); + + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + &vme_context->s4x_memv_distortion_buffer, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_BRC_DISTORTION_G9); +} + +/* The function related with BRC */ +static VAStatus +gen9_vp9_brc_init_reset_kernel(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct vp9_brc_context *brc_context = &vme_context->brc_context; + struct gpe_media_object_parameter media_object_param; + struct i965_gpe_context *gpe_context; + int gpe_index = VP9_BRC_INIT; + int media_function = VP9_MEDIA_STATE_BRC_INIT_RESET; + struct gen9_vp9_brc_curbe_param brc_initreset_curbe; + VAEncPictureParameterBufferVP9 *pic_param; + struct gen9_vp9_state *vp9_state; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = vp9_state->pic_param; + + if (vp9_state->brc_inited) + gpe_index = VP9_BRC_RESET; + + gpe_context = &brc_context->gpe_contexts[gpe_index]; + + gen8_gpe_context_init(ctx, gpe_context); + gen9_gpe_reset_binding_table(ctx, gpe_context); + + brc_initreset_curbe.media_state_type = media_function; + brc_initreset_curbe.curr_frame = pic_param->reconstructed_frame; + brc_initreset_curbe.ppic_param = vp9_state->pic_param; + brc_initreset_curbe.pseq_param = vp9_state->seq_param; + brc_initreset_curbe.psegment_param = vp9_state->segment_param; + brc_initreset_curbe.frame_width = vp9_state->frame_width; + brc_initreset_curbe.frame_height = vp9_state->frame_height; + brc_initreset_curbe.pbrc_init_current_target_buf_full_in_bits = + &vp9_state->brc_init_current_target_buf_full_in_bits; + brc_initreset_curbe.pbrc_init_reset_buf_size_in_bits = + &vp9_state->brc_init_reset_buf_size_in_bits; + brc_initreset_curbe.pbrc_init_reset_input_bits_per_frame = + &vp9_state->brc_init_reset_input_bits_per_frame; + brc_initreset_curbe.picture_coding_type = vp9_state->picture_coding_type; + brc_initreset_curbe.initbrc = !vp9_state->brc_inited; + brc_initreset_curbe.mbbrc_enabled = 0; + brc_initreset_curbe.ref_frame_flag = vp9_state->ref_frame_flag; + brc_initreset_curbe.frame_rate = vp9_state->frame_rate; + + vme_context->pfn_set_curbe_brc(ctx, encode_state, + gpe_context, + encoder_context, + &brc_initreset_curbe); + + gen9_brc_init_reset_add_surfaces_vp9(ctx, encode_state, encoder_context, gpe_context); + gen8_gpe_setup_interface_data(ctx, gpe_context); + + memset(&media_object_param, 0, sizeof(media_object_param)); + gen9_run_kernel_media_object(ctx, encoder_context, gpe_context, media_function, &media_object_param); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_brc_intra_dist_add_surfaces_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct i965_gpe_context *gpe_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + + struct object_surface *obj_surface; + struct gen9_surface_vp9 *vp9_priv_surface; + + /* sScaled4xSurface surface */ + obj_surface = encode_state->reconstructed_object; + + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + obj_surface = vp9_priv_surface->scaled_4x_surface_obj; + gen9_add_2d_gpe_surface(ctx, gpe_context, + obj_surface, + 0, 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_BRC_SRCY4X_G9 + ); + + gen9_add_adv_gpe_surface(ctx, gpe_context, + obj_surface, + VP9_BTI_BRC_VME_COARSE_INTRA_G9); + + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + &vme_context->s4x_memv_distortion_buffer, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_BRC_DISTORTION_G9); + + return; +} + +/* The function related with BRC */ +static VAStatus +gen9_vp9_brc_intra_dist_kernel(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct vp9_brc_context *brc_context = &vme_context->brc_context; + struct i965_gpe_context *gpe_context; + int gpe_index = VP9_BRC_INTRA_DIST; + int media_function = VP9_MEDIA_STATE_ENC_I_FRAME_DIST; + struct gen9_vp9_brc_curbe_param brc_intra_dist_curbe; + VAEncPictureParameterBufferVP9 *pic_param; + struct gen9_vp9_state *vp9_state; + struct gpe_media_object_walker_parameter media_object_walker_param; + struct vp9_encoder_kernel_walker_parameter kernel_walker_param; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = vp9_state->pic_param; + + gpe_context = &brc_context->gpe_contexts[gpe_index]; + + gen8_gpe_context_init(ctx, gpe_context); + gen9_gpe_reset_binding_table(ctx, gpe_context); + + brc_intra_dist_curbe.media_state_type = media_function; + brc_intra_dist_curbe.curr_frame = pic_param->reconstructed_frame; + brc_intra_dist_curbe.ppic_param = vp9_state->pic_param; + brc_intra_dist_curbe.pseq_param = vp9_state->seq_param; + brc_intra_dist_curbe.psegment_param = vp9_state->segment_param; + brc_intra_dist_curbe.frame_width = vp9_state->frame_width; + brc_intra_dist_curbe.frame_height = vp9_state->frame_height; + brc_intra_dist_curbe.pbrc_init_current_target_buf_full_in_bits = + &vp9_state->brc_init_current_target_buf_full_in_bits; + brc_intra_dist_curbe.pbrc_init_reset_buf_size_in_bits = + &vp9_state->brc_init_reset_buf_size_in_bits; + brc_intra_dist_curbe.pbrc_init_reset_input_bits_per_frame = + &vp9_state->brc_init_reset_input_bits_per_frame; + brc_intra_dist_curbe.picture_coding_type = vp9_state->picture_coding_type; + brc_intra_dist_curbe.initbrc = !vp9_state->brc_inited; + brc_intra_dist_curbe.mbbrc_enabled = 0; + brc_intra_dist_curbe.ref_frame_flag = vp9_state->ref_frame_flag; + brc_intra_dist_curbe.frame_rate = vp9_state->frame_rate; + + vme_context->pfn_set_curbe_brc(ctx, encode_state, + gpe_context, + encoder_context, + &brc_intra_dist_curbe); + + /* zero distortion buffer */ + i965_zero_gpe_resource(&vme_context->s4x_memv_distortion_buffer); + + gen9_brc_intra_dist_add_surfaces_vp9(ctx, encode_state, encoder_context, gpe_context); + gen8_gpe_setup_interface_data(ctx, gpe_context); + + memset(&kernel_walker_param, 0, sizeof(kernel_walker_param)); + kernel_walker_param.resolution_x = vme_context->downscaled_width_in_mb4x; + kernel_walker_param.resolution_y = vme_context->downscaled_height_in_mb4x; + kernel_walker_param.no_dependency = 1; + + gen9_init_media_object_walker_parameter(encoder_context, &kernel_walker_param, &media_object_walker_param); + + gen9_run_kernel_media_object_walker(ctx, encoder_context, + gpe_context, + media_function, + &media_object_walker_param); + + return VA_STATUS_SUCCESS; +} + +static void +intel_vp9enc_construct_picstate_batchbuf(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct i965_gpe_resource *gpe_resource) +{ + struct gen9_vp9_state *vp9_state; + VAEncPictureParameterBufferVP9 *pic_param; + int frame_width_minus1, frame_height_minus1; + int is_lossless = 0; + int is_intra_only = 0; + unsigned int last_frame_type; + unsigned int ref_flags; + unsigned int use_prev_frame_mvs, adapt_flag; + struct gen9_surface_vp9 *vp9_surface = NULL; + struct object_surface *obj_surface = NULL; + uint32_t scale_h = 0; + uint32_t scale_w = 0; + + char *pdata; + int i, j; + unsigned int *cmd_ptr, cmd_value, tmp; + + pdata = i965_map_gpe_resource(gpe_resource); + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param || !pdata) + return; + + pic_param = vp9_state->pic_param; + frame_width_minus1 = ALIGN(pic_param->frame_width_dst, 8) - 1; + frame_height_minus1 = ALIGN(pic_param->frame_height_dst, 8) - 1; + if ((pic_param->luma_ac_qindex == 0) && + (pic_param->luma_dc_qindex_delta == 0) && + (pic_param->chroma_ac_qindex_delta == 0) && + (pic_param->chroma_dc_qindex_delta == 0)) + is_lossless = 1; + + if (pic_param->pic_flags.bits.frame_type) + is_intra_only = pic_param->pic_flags.bits.intra_only; + + last_frame_type = vp9_state->vp9_last_frame.frame_type; + + use_prev_frame_mvs = 0; + if (pic_param->pic_flags.bits.frame_type == HCP_VP9_KEY_FRAME) { + last_frame_type = 0; + ref_flags = 0; + } else { + ref_flags = ((pic_param->ref_flags.bits.ref_arf_sign_bias << 9) | + (pic_param->ref_flags.bits.ref_gf_sign_bias << 8) | + (pic_param->ref_flags.bits.ref_last_sign_bias << 7) + ); + if (!pic_param->pic_flags.bits.error_resilient_mode && + (pic_param->frame_width_dst == vp9_state->vp9_last_frame.frame_width) && + (pic_param->frame_height_dst == vp9_state->vp9_last_frame.frame_height) && + !pic_param->pic_flags.bits.intra_only && + vp9_state->vp9_last_frame.show_frame && + ((vp9_state->vp9_last_frame.frame_type == HCP_VP9_INTER_FRAME) && + !vp9_state->vp9_last_frame.intra_only) + ) + use_prev_frame_mvs = 1; + } + adapt_flag = 0; + if (!pic_param->pic_flags.bits.error_resilient_mode && + !pic_param->pic_flags.bits.frame_parallel_decoding_mode) + adapt_flag = 1; + + for (i = 0; i < 4; i++) { + uint32_t non_first_pass; + non_first_pass = 1; + if (i == 0) + non_first_pass = 0; + + cmd_ptr =(unsigned int *)(pdata + i * VP9_PIC_STATE_BUFFER_SIZE); + + *cmd_ptr++ = (HCP_VP9_PIC_STATE | (33 - 2)); + *cmd_ptr++ = (frame_height_minus1 << 16 | + frame_width_minus1); + /* dw2 */ + *cmd_ptr++ = ( 0 << 31 | /* disable segment_in */ + 0 << 30 | /* disable segment_out */ + is_lossless << 29 | /* loseless */ + (pic_param->pic_flags.bits.segmentation_enabled && pic_param->pic_flags.bits.segmentation_temporal_update) << 28 | /* temporal update */ + (pic_param->pic_flags.bits.segmentation_enabled && pic_param->pic_flags.bits.segmentation_update_map) << 27 | /* temporal update */ + (pic_param->pic_flags.bits.segmentation_enabled << 26) | + (pic_param->sharpness_level << 23) | + (pic_param->filter_level << 17) | + (pic_param->pic_flags.bits.frame_parallel_decoding_mode << 16) | + (pic_param->pic_flags.bits.error_resilient_mode << 15) | + (pic_param->pic_flags.bits.refresh_frame_context << 14) | + (last_frame_type << 13) | + (vp9_state->tx_mode == TX_MODE_SELECT) << 12 | + (pic_param->pic_flags.bits.comp_prediction_mode == REFERENCE_MODE_SELECT) << 11 | + (use_prev_frame_mvs) << 10 | + ref_flags | + (pic_param->pic_flags.bits.mcomp_filter_type << 4) | + (pic_param->pic_flags.bits.allow_high_precision_mv << 3) | + (is_intra_only << 2) | + (adapt_flag << 1) | + (pic_param->pic_flags.bits.frame_type) << 0); + + *cmd_ptr++ =((0 << 28) | /* VP9Profile0 */ + (0 << 24) | /* 8-bit depth */ + (0 << 22) | /* only 420 format */ + (0 << 0) | /* sse statistics */ + (pic_param->log2_tile_rows << 8) | + (pic_param->log2_tile_columns << 0)); + + /* dw4..6 */ + if (pic_param->pic_flags.bits.frame_type && + !pic_param->pic_flags.bits.intra_only) { + for (j = 0; j < 3; j++) { + obj_surface = encode_state->reference_objects[j]; + scale_w = 0; + scale_h = 0; + if (obj_surface && obj_surface->private_data) { + vp9_surface = obj_surface->private_data; + scale_w = (vp9_surface->frame_width << 14) / pic_param->frame_width_dst; + scale_h = (vp9_surface->frame_height << 14) / pic_param->frame_height_dst; + *cmd_ptr++ = (scale_w << 16 | + scale_h); + } else + *cmd_ptr++ = 0; + } + } else { + *cmd_ptr++ = 0; + *cmd_ptr++ = 0; + *cmd_ptr++ = 0; + } + /* dw7..9 */ + for(j = 0; j < 3; j++) { + obj_surface = encode_state->reference_objects[j]; + vp9_surface = NULL; + + if (obj_surface && obj_surface->private_data) { + vp9_surface = obj_surface->private_data; + *cmd_ptr++ = (vp9_surface->frame_height - 1) << 16 | + (vp9_surface->frame_width - 1); + } else + *cmd_ptr++ = 0; + } + /* dw10 */ + *cmd_ptr++ = 0; + /* dw11 */ + *cmd_ptr++ = (1 << 1); + *cmd_ptr++ = 0; + + /* dw13 */ + *cmd_ptr++ = ((1 << 25) | /* header insertation for VP9 */ + (0 << 24) | /* tail insertation */ + (pic_param->luma_ac_qindex << 16) | + 0 /* compressed header bin count */); + + /* dw14 */ + tmp = intel_convert_sign_mag(pic_param->luma_dc_qindex_delta, 5); + cmd_value = (tmp << 16); + tmp = intel_convert_sign_mag(pic_param->chroma_dc_qindex_delta, 5); + cmd_value |= (tmp << 8); + tmp = intel_convert_sign_mag(pic_param->chroma_ac_qindex_delta, 5); + cmd_value |= tmp; + *cmd_ptr++ = cmd_value; + + tmp = intel_convert_sign_mag(pic_param->ref_lf_delta[0], 7); + cmd_value = tmp; + tmp = intel_convert_sign_mag(pic_param->ref_lf_delta[1], 7); + cmd_value |= (tmp << 8); + tmp = intel_convert_sign_mag(pic_param->ref_lf_delta[2], 7); + cmd_value |= (tmp << 16); + tmp = intel_convert_sign_mag(pic_param->ref_lf_delta[3], 7); + cmd_value |= (tmp << 24); + *cmd_ptr++ = cmd_value; + + /* dw16 */ + tmp = intel_convert_sign_mag(pic_param->mode_lf_delta[0], 7); + cmd_value = tmp; + tmp = intel_convert_sign_mag(pic_param->mode_lf_delta[1], 7); + cmd_value |= (tmp << 8); + *cmd_ptr++ = cmd_value; + + /* dw17 */ + *cmd_ptr++ = vp9_state->frame_header.bit_offset_ref_lf_delta | + (vp9_state->frame_header.bit_offset_mode_lf_delta << 16); + *cmd_ptr++ = vp9_state->frame_header.bit_offset_qindex | + (vp9_state->frame_header.bit_offset_lf_level << 16); + + /* dw19 */ + *cmd_ptr++ = (1 << 26 | (1 << 25) | + non_first_pass << 16); + /* dw20 */ + *cmd_ptr++ = (1 << 31) | (256); + + /* dw21 */ + *cmd_ptr++ = (0 << 31) | 1; + + /* dw22-dw24. Frame_delta_qindex_range */ + *cmd_ptr++ = 0; + *cmd_ptr++ = 0; + *cmd_ptr++ = 0; + + /* dw25-26. frame_delta_lf_range */ + *cmd_ptr++ = 0; + *cmd_ptr++ = 0; + + /* dw27. frame_delta_lf_min */ + *cmd_ptr++ = 0; + + /* dw28..30 */ + *cmd_ptr++ = 0; + *cmd_ptr++ = 0; + *cmd_ptr++ = 0; + + /* dw31 */ + *cmd_ptr++ = (0 << 30) | 1; + /* dw32 */ + *cmd_ptr++ = vp9_state->frame_header.bit_offset_first_partition_size; + + *cmd_ptr++ = 0; + *cmd_ptr++ = MI_BATCH_BUFFER_END; + } + + i965_unmap_gpe_resource(gpe_resource); +} + +static void +gen9_brc_update_add_surfaces_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct i965_gpe_context *brc_gpe_context, + struct i965_gpe_context *mbenc_gpe_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + + /* 0. BRC history buffer */ + gen9_add_buffer_gpe_surface(ctx, + brc_gpe_context, + &vme_context->res_brc_history_buffer, + 0, + vme_context->res_brc_history_buffer.size, + 0, + VP9_BTI_BRC_HISTORY_G9); + + /* 1. Constant data buffer */ + gen9_add_buffer_gpe_surface(ctx, + brc_gpe_context, + &vme_context->res_brc_const_data_buffer, + 0, + vme_context->res_brc_const_data_buffer.size, + 0, + VP9_BTI_BRC_CONSTANT_DATA_G9); + + /* 2. Distortion 2D surface buffer */ + gen9_add_buffer_2d_gpe_surface(ctx, + brc_gpe_context, + &vme_context->s4x_memv_distortion_buffer, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_BRC_DISTORTION_G9); + + /* 3. pak buffer */ + gen9_add_buffer_gpe_surface(ctx, + brc_gpe_context, + &vme_context->res_brc_mmdk_pak_buffer, + 0, + vme_context->res_brc_mmdk_pak_buffer.size, + 0, + VP9_BTI_BRC_MMDK_PAK_OUTPUT_G9); + /* 4. Mbenc curbe input buffer */ + gen9_add_dri_buffer_gpe_surface(ctx, + brc_gpe_context, + mbenc_gpe_context->dynamic_state.bo, + 0, + ALIGN(mbenc_gpe_context->curbe_size, 64), + mbenc_gpe_context->curbe_offset, + VP9_BTI_BRC_MBENC_CURBE_INPUT_G9); + /* 5. Mbenc curbe output buffer */ + gen9_add_dri_buffer_gpe_surface(ctx, + brc_gpe_context, + mbenc_gpe_context->dynamic_state.bo, + 0, + ALIGN(mbenc_gpe_context->curbe_size, 64), + mbenc_gpe_context->curbe_offset, + VP9_BTI_BRC_MBENC_CURBE_OUTPUT_G9); + + /* 6. BRC_PIC_STATE read buffer */ + gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + &vme_context->res_pic_state_brc_read_buffer, + 0, + vme_context->res_pic_state_brc_read_buffer.size, + 0, + VP9_BTI_BRC_PIC_STATE_INPUT_G9); + + /* 7. BRC_PIC_STATE write buffer */ + gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + &vme_context->res_pic_state_brc_write_hfw_read_buffer, + 0, + vme_context->res_pic_state_brc_write_hfw_read_buffer.size, + 0, + VP9_BTI_BRC_PIC_STATE_OUTPUT_G9); + + /* 8. SEGMENT_STATE read buffer */ + gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + &vme_context->res_seg_state_brc_read_buffer, + 0, + vme_context->res_seg_state_brc_read_buffer.size, + 0, + VP9_BTI_BRC_SEGMENT_STATE_INPUT_G9); + + /* 9. SEGMENT_STATE write buffer */ + gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + &vme_context->res_seg_state_brc_write_buffer, + 0, + vme_context->res_seg_state_brc_write_buffer.size, + 0, + VP9_BTI_BRC_SEGMENT_STATE_OUTPUT_G9); + + /* 10. Bitstream size buffer */ + gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + &vme_context->res_brc_bitstream_size_buffer, + 0, + vme_context->res_brc_bitstream_size_buffer.size, + 0, + VP9_BTI_BRC_BITSTREAM_SIZE_G9); + + gen9_add_buffer_gpe_surface(ctx, brc_gpe_context, + &vme_context->res_brc_hfw_data_buffer, + 0, + vme_context->res_brc_hfw_data_buffer.size, + 0, + VP9_BTI_BRC_HFW_DATA_G9); + + return; +} + +static VAStatus +gen9_vp9_brc_update_kernel(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct vp9_brc_context *brc_context = &vme_context->brc_context; + struct i965_gpe_context *brc_gpe_context, *mbenc_gpe_context; + int mbenc_index, gpe_index = VP9_BRC_UPDATE; + int media_function = VP9_MEDIA_STATE_BRC_UPDATE; + int mbenc_function; + struct gen9_vp9_brc_curbe_param brc_update_curbe_param; + VAEncPictureParameterBufferVP9 *pic_param; + struct gen9_vp9_state *vp9_state; + struct gen9_vp9_mbenc_curbe_param mbenc_curbe_param; + struct gpe_media_object_parameter media_object_param; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = vp9_state->pic_param; + // Setup VP9 MbEnc Curbe + if (vp9_state->picture_coding_type) { + mbenc_function = VP9_MEDIA_STATE_MBENC_P; + mbenc_index = VP9_MBENC_IDX_INTER; + } else { + mbenc_function = VP9_MEDIA_STATE_MBENC_I_32x32; + mbenc_index = VP9_MBENC_IDX_KEY_32x32; + } + + mbenc_gpe_context = &(vme_context->mbenc_context.gpe_contexts[mbenc_index]); + + memset(&mbenc_curbe_param, 0, sizeof(mbenc_curbe_param)); + + mbenc_curbe_param.ppic_param = vp9_state->pic_param; + mbenc_curbe_param.pseq_param = vp9_state->seq_param; + mbenc_curbe_param.psegment_param = vp9_state->segment_param; + //mbenc_curbe_param.ppRefList = &(vp9_state->pRefList[0]); + mbenc_curbe_param.last_ref_obj = vp9_state->last_ref_obj; + mbenc_curbe_param.golden_ref_obj = vp9_state->golden_ref_obj; + mbenc_curbe_param.alt_ref_obj = vp9_state->alt_ref_obj; + mbenc_curbe_param.frame_width_in_mb = ALIGN(vp9_state->frame_width, 16) / 16; + mbenc_curbe_param.frame_height_in_mb = ALIGN(vp9_state->frame_height, 16) / 16; + mbenc_curbe_param.hme_enabled = vp9_state->hme_enabled; + mbenc_curbe_param.ref_frame_flag = vp9_state->ref_frame_flag; + mbenc_curbe_param.multi_ref_qp_check = vp9_state->multi_ref_qp_check; + mbenc_curbe_param.picture_coding_type = vp9_state->picture_coding_type; + mbenc_curbe_param.media_state_type = mbenc_function; + + vme_context->pfn_set_curbe_mbenc(ctx, encode_state, + mbenc_gpe_context, + encoder_context, + &mbenc_curbe_param); + + vp9_state->mbenc_curbe_set_in_brc_update = true; + + brc_gpe_context = &brc_context->gpe_contexts[gpe_index]; + + gen8_gpe_context_init(ctx, brc_gpe_context); + gen9_gpe_reset_binding_table(ctx, brc_gpe_context); + + memset(&brc_update_curbe_param, 0, sizeof(brc_update_curbe_param)); + + // Setup BRC Update Curbe + brc_update_curbe_param.media_state_type = media_function; + brc_update_curbe_param.curr_frame = pic_param->reconstructed_frame; + brc_update_curbe_param.ppic_param = vp9_state->pic_param; + brc_update_curbe_param.pseq_param = vp9_state->seq_param; + brc_update_curbe_param.psegment_param = vp9_state->segment_param; + brc_update_curbe_param.picture_coding_type = vp9_state->picture_coding_type; + brc_update_curbe_param.frame_width_in_mb = ALIGN(vp9_state->frame_width, 16) / 16; + brc_update_curbe_param.frame_height_in_mb = ALIGN(vp9_state->frame_height, 16) / 16; + brc_update_curbe_param.hme_enabled = vp9_state->hme_enabled; + brc_update_curbe_param.b_used_ref = 1; + brc_update_curbe_param.frame_number = vp9_state->frame_number; + brc_update_curbe_param.ref_frame_flag = vp9_state->ref_frame_flag; + brc_update_curbe_param.mbbrc_enabled = 0; + brc_update_curbe_param.multi_ref_qp_check = vp9_state->multi_ref_qp_check; + brc_update_curbe_param.brc_num_pak_passes = vp9_state->num_pak_passes; + + brc_update_curbe_param.pbrc_init_current_target_buf_full_in_bits = + &vp9_state->brc_init_current_target_buf_full_in_bits; + brc_update_curbe_param.pbrc_init_reset_buf_size_in_bits = + &vp9_state->brc_init_reset_buf_size_in_bits; + brc_update_curbe_param.pbrc_init_reset_input_bits_per_frame = + &vp9_state->brc_init_reset_input_bits_per_frame; + + vme_context->pfn_set_curbe_brc(ctx, encode_state, + brc_gpe_context, + encoder_context, + &brc_update_curbe_param); + + + // Check if the constant data surface is present + if (vp9_state->brc_constant_buffer_supported) + { + char *brc_const_buffer; + brc_const_buffer = i965_map_gpe_resource(&vme_context->res_brc_const_data_buffer); + + if (!brc_const_buffer) + return VA_STATUS_ERROR_OPERATION_FAILED; + + if (vp9_state->picture_coding_type) + memcpy(brc_const_buffer, vp9_brc_const_data_p_g9, + sizeof(vp9_brc_const_data_p_g9)); + else + memcpy(brc_const_buffer, vp9_brc_const_data_i_g9, + sizeof(vp9_brc_const_data_i_g9)); + + i965_unmap_gpe_resource(&vme_context->res_brc_const_data_buffer); + } + + if (pic_param->pic_flags.bits.segmentation_enabled) + { + //reallocate the vme_state->mb_segment_map_surface + /* this will be added later */ + } + + { + pic_param->filter_level = 0; + // clear the filter level value in picParams ebfore programming pic state, as this value will be determined and updated by BRC. + intel_vp9enc_construct_picstate_batchbuf(ctx, encode_state, + encoder_context, &vme_context->res_pic_state_brc_read_buffer); + } + + gen9_brc_update_add_surfaces_vp9(ctx, encode_state, + encoder_context, + brc_gpe_context, + mbenc_gpe_context); + + gen8_gpe_setup_interface_data(ctx, brc_gpe_context); + memset(&media_object_param, 0, sizeof(media_object_param)); + gen9_run_kernel_media_object(ctx, encoder_context, + brc_gpe_context, + media_function, + &media_object_param); + return VA_STATUS_SUCCESS; +} + +static +void gen9_vp9_set_curbe_me(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_me_curbe_param *param) +{ + vp9_me_curbe_data *me_cmd; + int enc_media_state; + int me_mode; + unsigned int width, height; + uint32_t l0_ref_frames; + uint32_t scale_factor; + + if (param->b16xme_enabled) { + if (param->use_16x_me) + me_mode = VP9_ENC_ME16X_BEFORE_ME4X; + else + me_mode = VP9_ENC_ME4X_AFTER_ME16X; + } else { + me_mode = VP9_ENC_ME4X_ONLY; + } + + if (me_mode == VP9_ENC_ME16X_BEFORE_ME4X) + scale_factor = 16; + else + scale_factor = 4; + + if (param->use_16x_me) + enc_media_state = VP9_MEDIA_STATE_16X_ME; + else + enc_media_state = VP9_MEDIA_STATE_4X_ME; + + me_cmd = gen8p_gpe_context_map_curbe(gpe_context); + + if (!me_cmd) + return; + + memset(me_cmd, 0, sizeof(vp9_me_curbe_data)); + + me_cmd->dw1.max_num_mvs = 0x10; + me_cmd->dw1.bi_weight = 0x00; + + me_cmd->dw2.max_num_su = 0x39; + me_cmd->dw2.max_len_sp = 0x39; + + me_cmd->dw3.sub_mb_part_mask = 0x77; + me_cmd->dw3.inter_sad = 0x00; + me_cmd->dw3.intra_sad = 0x00; + me_cmd->dw3.bme_disable_fbr = 0x01; + me_cmd->dw3.sub_pel_mode = 0x03; + + width = param->frame_width / scale_factor; + height = param->frame_height / scale_factor; + + me_cmd->dw4.picture_width = ALIGN(width, 16) / 16; + me_cmd->dw4.picture_height_minus1 = ALIGN(height, 16) / 16 - 1; + + me_cmd->dw5.ref_width = 0x30; + me_cmd->dw5.ref_height = 0x28; + + if (enc_media_state == VP9_MEDIA_STATE_4X_ME) + me_cmd->dw6.write_distortions = 0x01; + + me_cmd->dw6.use_mv_from_prev_step = me_mode == VP9_ENC_ME4X_AFTER_ME16X ? 1 : 0; + me_cmd->dw6.super_combine_dist = 0x5; + me_cmd->dw6.max_vmvr = 0x7fc; + + l0_ref_frames = (param->ref_frame_flag & 0x01) + + !!(param->ref_frame_flag & 0x02) + + !!(param->ref_frame_flag & 0x04); + me_cmd->dw13.num_ref_idx_l0_minus1 = (l0_ref_frames > 0) ? l0_ref_frames - 1 : 0; + me_cmd->dw13.num_ref_idx_l1_minus1 = 0; + + me_cmd->dw14.l0_ref_pic_polarity_bits = 0; + me_cmd->dw14.l1_ref_pic_polarity_bits = 0; + + me_cmd->dw15.mv_shift_factor = 0x02; + + { + memcpy((void *)((char *)me_cmd + 64), + vp9_diamond_ime_search_path_delta, + sizeof(vp9_diamond_ime_search_path_delta)); + } + + + me_cmd->dw32._4x_memv_output_data_surf_index = VP9_BTI_ME_MV_DATA_SURFACE; + me_cmd->dw33._16x_32x_memv_input_data_surf_index = VP9_BTI_16XME_MV_DATA_SURFACE; + me_cmd->dw34._4x_me_output_dist_surf_index = VP9_BTI_ME_DISTORTION_SURFACE; + me_cmd->dw35._4x_me_output_brc_dist_surf_index = VP9_BTI_ME_BRC_DISTORTION_SURFACE; + me_cmd->dw36.vme_fwd_inter_pred_surf_index = VP9_BTI_ME_CURR_PIC_L0; + me_cmd->dw37.vme_bdw_inter_pred_surf_index = VP9_BTI_ME_CURR_PIC_L1; + + gen8p_gpe_context_unmap_curbe(gpe_context); +} + +static void +gen9_vp9_send_me_surface(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_me_surface_param *param) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + struct gen9_surface_vp9 *vp9_priv_surface; + struct object_surface *input_surface; + struct i965_gpe_resource *gpe_resource; + int ref_bti; + + obj_surface = SURFACE(param->curr_pic); + + if (!obj_surface || !obj_surface->private_data) + return; + + vp9_priv_surface = obj_surface->private_data; + if (param->use_16x_me) + { + gpe_resource = param->pres_16x_memv_data_buffer; + } + else + { + gpe_resource = param->pres_4x_memv_data_buffer; + } + + gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + gpe_resource, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_ME_MV_DATA_SURFACE); + + if (param->b16xme_enabled) { + gpe_resource = param->pres_16x_memv_data_buffer; + gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + gpe_resource, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_16XME_MV_DATA_SURFACE); + } + + if (!param->use_16x_me) { + gpe_resource = param->pres_me_brc_distortion_buffer; + + gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + gpe_resource, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_ME_BRC_DISTORTION_SURFACE); + + gpe_resource = param->pres_me_distortion_buffer; + + gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + gpe_resource, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_ME_DISTORTION_SURFACE); + } + + if (param->use_16x_me) + input_surface = vp9_priv_surface->scaled_16x_surface_obj; + else + input_surface = vp9_priv_surface->scaled_4x_surface_obj; + + gen9_add_adv_gpe_surface(ctx, gpe_context, + input_surface, + VP9_BTI_ME_CURR_PIC_L0); + + ref_bti = VP9_BTI_ME_CURR_PIC_L0 + 1; + + + if (param->last_ref_pic) { + obj_surface = param->last_ref_pic; + vp9_priv_surface = obj_surface->private_data; + + if (param->use_16x_me) + input_surface = vp9_priv_surface->scaled_16x_surface_obj; + else + input_surface = vp9_priv_surface->scaled_4x_surface_obj; + + if (param->dys_enabled && + ((vp9_priv_surface->frame_width != param->frame_width) || + (vp9_priv_surface->frame_height != param->frame_height))) { + if (param->use_16x_me) + input_surface = vp9_priv_surface->dys_16x_surface_obj; + else + input_surface = vp9_priv_surface->dys_4x_surface_obj; + } + gen9_add_adv_gpe_surface(ctx, gpe_context, + input_surface, + ref_bti); + gen9_add_adv_gpe_surface(ctx, gpe_context, + input_surface, + ref_bti + 1); + ref_bti += 2; + } + + if (param->golden_ref_pic) { + obj_surface = param->golden_ref_pic; + vp9_priv_surface = obj_surface->private_data; + + if (param->use_16x_me) + input_surface = vp9_priv_surface->scaled_16x_surface_obj; + else + input_surface = vp9_priv_surface->scaled_4x_surface_obj; + + if (param->dys_enabled && + ((vp9_priv_surface->frame_width != param->frame_width) || + (vp9_priv_surface->frame_height != param->frame_height))) { + if (param->use_16x_me) + input_surface = vp9_priv_surface->dys_16x_surface_obj; + else + input_surface = vp9_priv_surface->dys_4x_surface_obj; + } + + gen9_add_adv_gpe_surface(ctx, gpe_context, + input_surface, + ref_bti); + gen9_add_adv_gpe_surface(ctx, gpe_context, + input_surface, + ref_bti + 1); + ref_bti += 2; + } + + if (param->alt_ref_pic) { + obj_surface = param->alt_ref_pic; + vp9_priv_surface = obj_surface->private_data; + + if (param->use_16x_me) + input_surface = vp9_priv_surface->scaled_16x_surface_obj; + else + input_surface = vp9_priv_surface->scaled_4x_surface_obj; + + if (param->dys_enabled && + ((vp9_priv_surface->frame_width != param->frame_width) || + (vp9_priv_surface->frame_height != param->frame_height))) { + if (param->use_16x_me) + input_surface = vp9_priv_surface->dys_16x_surface_obj; + else + input_surface = vp9_priv_surface->dys_4x_surface_obj; + } + gen9_add_adv_gpe_surface(ctx, gpe_context, + input_surface, + ref_bti); + gen9_add_adv_gpe_surface(ctx, gpe_context, + input_surface, + ref_bti + 1); + ref_bti += 2; + } + + return; +} + +static +void gen9_me_add_surfaces_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct i965_gpe_context *gpe_context, + int use_16x_me) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct gen9_vp9_me_surface_param me_surface_param; + struct gen9_vp9_state *vp9_state; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + /* sScaled4xSurface surface */ + memset(&me_surface_param, 0, sizeof(me_surface_param)); + me_surface_param.last_ref_pic = vp9_state->last_ref_obj; + me_surface_param.golden_ref_pic = vp9_state->golden_ref_obj; + me_surface_param.alt_ref_pic = vp9_state->alt_ref_obj; + me_surface_param.curr_pic = vp9_state->curr_frame; + me_surface_param.pres_4x_memv_data_buffer = &vme_context->s4x_memv_data_buffer; + me_surface_param.pres_16x_memv_data_buffer = &vme_context->s16x_memv_data_buffer; + me_surface_param.pres_me_distortion_buffer = &vme_context->s4x_memv_distortion_buffer; + me_surface_param.pres_me_brc_distortion_buffer = &vme_context->s4x_memv_distortion_buffer; + + if (use_16x_me) { + me_surface_param.downscaled_width_in_mb = vp9_state->downscaled_width_16x_in_mb; + me_surface_param.downscaled_height_in_mb = vp9_state->downscaled_height_16x_in_mb; + } else { + me_surface_param.downscaled_width_in_mb = vp9_state->downscaled_width_4x_in_mb; + me_surface_param.downscaled_height_in_mb = vp9_state->downscaled_height_4x_in_mb; + } + me_surface_param.frame_width = vp9_state->frame_width; + me_surface_param.frame_height = vp9_state->frame_height; + + me_surface_param.use_16x_me = use_16x_me; + me_surface_param.b16xme_enabled = vp9_state->b16xme_enabled; + me_surface_param.dys_enabled = vp9_state->dys_in_use; + + vme_context->pfn_send_me_surface(ctx, encode_state, + gpe_context, + encoder_context, + &me_surface_param); + return; +} + +static VAStatus +gen9_vp9_me_kernel(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int use_16x_me) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct i965_gpe_context *gpe_context; + int media_function; + struct gen9_vp9_me_curbe_param me_curbe_param; + struct gen9_vp9_state *vp9_state; + struct gpe_media_object_walker_parameter media_object_walker_param; + struct vp9_encoder_kernel_walker_parameter kernel_walker_param; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if (use_16x_me) + media_function = VP9_MEDIA_STATE_16X_ME; + else + media_function = VP9_MEDIA_STATE_4X_ME; + + gpe_context = &(vme_context->me_context.gpe_context); + + gen8_gpe_context_init(ctx, gpe_context); + gen9_gpe_reset_binding_table(ctx, gpe_context); + + memset(&me_curbe_param, 0, sizeof(me_curbe_param)); + me_curbe_param.ppic_param = vp9_state->pic_param; + me_curbe_param.pseq_param = vp9_state->seq_param; + me_curbe_param.frame_width = vp9_state->frame_width; + me_curbe_param.frame_height = vp9_state->frame_height; + me_curbe_param.ref_frame_flag = vp9_state->ref_frame_flag; + me_curbe_param.use_16x_me = use_16x_me; + me_curbe_param.b16xme_enabled = vp9_state->b16xme_enabled; + vme_context->pfn_set_curbe_me(ctx, encode_state, + gpe_context, + encoder_context, + &me_curbe_param); + + gen9_me_add_surfaces_vp9(ctx, encode_state, + encoder_context, + gpe_context, + use_16x_me); + + gen8_gpe_setup_interface_data(ctx, gpe_context); + + memset(&kernel_walker_param, 0, sizeof(kernel_walker_param)); + if (use_16x_me) { + kernel_walker_param.resolution_x = vp9_state->downscaled_width_16x_in_mb; + kernel_walker_param.resolution_y = vp9_state->downscaled_height_16x_in_mb; + } else { + kernel_walker_param.resolution_x = vp9_state->downscaled_width_4x_in_mb; + kernel_walker_param.resolution_y = vp9_state->downscaled_height_4x_in_mb; + } + kernel_walker_param.no_dependency = 1; + + gen9_init_media_object_walker_parameter(encoder_context, &kernel_walker_param, &media_object_walker_param); + + gen9_run_kernel_media_object_walker(ctx, encoder_context, + gpe_context, + media_function, + &media_object_walker_param); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vp9_set_curbe_scaling_cm(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_scaling_curbe_param *curbe_param) +{ + vp9_scaling4x_curbe_data_cm *curbe_cmd; + + curbe_cmd = gen8p_gpe_context_map_curbe(gpe_context); + + if (!curbe_cmd) + return; + + memset(curbe_cmd, 0, sizeof(vp9_scaling4x_curbe_data_cm)); + + curbe_cmd->dw0.input_picture_width = curbe_param->input_picture_width; + curbe_cmd->dw0.input_picture_height = curbe_param->input_picture_height; + + curbe_cmd->dw1.input_y_bti = VP9_BTI_SCALING_FRAME_SRC_Y; + curbe_cmd->dw2.output_y_bti = VP9_BTI_SCALING_FRAME_DST_Y; + + + curbe_cmd->dw6.enable_mb_variance_output = 0; + curbe_cmd->dw6.enable_mb_pixel_average_output = 0; + curbe_cmd->dw6.enable_blk8x8_stat_output = 0; + + if (curbe_param->mb_variance_output_enabled || + curbe_param->mb_pixel_average_output_enabled) + { + curbe_cmd->dw10.mbv_proc_stat_bti = VP9_BTI_SCALING_FRAME_MBVPROCSTATS_DST_CM; + } + + gen8p_gpe_context_unmap_curbe(gpe_context); + return; +} + +static void +gen9_vp9_send_scaling_surface(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_scaling_surface_param *scaling_surface_param) +{ + vp9_bti_scaling_offset *scaling_bti; + unsigned int surface_format; + + scaling_bti = scaling_surface_param->p_scaling_bti; + + if (scaling_surface_param->scaling_out_use_32unorm_surf_fmt) + surface_format = I965_SURFACEFORMAT_R32_UNORM; + else if (scaling_surface_param->scaling_out_use_16unorm_surf_fmt) + surface_format = I965_SURFACEFORMAT_R16_UNORM; + else + surface_format = I965_SURFACEFORMAT_R8_UNORM; + + gen9_add_2d_gpe_surface(ctx, gpe_context, + scaling_surface_param->input_surface, + 0, 1, surface_format, + scaling_bti->scaling_frame_src_y); + + gen9_add_2d_gpe_surface(ctx, gpe_context, + scaling_surface_param->output_surface, + 0, 1, surface_format, + scaling_bti->scaling_frame_dst_y); + + + return; +} + +static VAStatus +gen9_vp9_scaling_kernel(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int use_16x_scaling) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct i965_gpe_context *gpe_context; + int media_function; + struct gen9_vp9_scaling_curbe_param scaling_curbe_param; + struct gen9_vp9_scaling_surface_param scaling_surface_param; + struct gen9_vp9_state *vp9_state; + VAEncPictureParameterBufferVP9 *pic_param; + struct gpe_media_object_walker_parameter media_object_walker_param; + struct vp9_encoder_kernel_walker_parameter kernel_walker_param; + struct object_surface *obj_surface; + struct object_surface *input_surface, *output_surface; + struct gen9_surface_vp9 *vp9_priv_surface; + unsigned int downscaled_width_in_mb, downscaled_height_in_mb; + unsigned int input_frame_width, input_frame_height; + unsigned int output_frame_width, output_frame_height; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = vp9_state->pic_param; + + if (use_16x_scaling) + media_function = VP9_MEDIA_STATE_16X_SCALING; + else + media_function = VP9_MEDIA_STATE_4X_SCALING; + + gpe_context = &(vme_context->scaling_context.gpe_contexts[0]); + + gen8_gpe_context_init(ctx, gpe_context); + gen9_gpe_reset_binding_table(ctx, gpe_context); + + obj_surface = encode_state->reconstructed_object; + vp9_priv_surface = obj_surface->private_data; + + if (use_16x_scaling) + { + downscaled_width_in_mb = vp9_state->downscaled_width_16x_in_mb; + downscaled_height_in_mb = vp9_state->downscaled_height_16x_in_mb; + + input_surface = vp9_priv_surface->scaled_4x_surface_obj; + input_frame_width = vp9_state->frame_width_4x; + input_frame_height = vp9_state->frame_height_4x; + + output_surface = vp9_priv_surface->scaled_16x_surface_obj; + output_frame_width = vp9_state->frame_width_16x; + output_frame_height = vp9_state->frame_height_16x; + } else { + downscaled_width_in_mb = vp9_state->downscaled_width_4x_in_mb; + downscaled_height_in_mb = vp9_state->downscaled_height_4x_in_mb; + + if (vp9_state->dys_in_use && + ((pic_param->frame_width_src != pic_param->frame_width_dst) || + (pic_param->frame_height_src != pic_param->frame_height_dst))) + input_surface = vp9_priv_surface->dys_surface_obj; + else + input_surface = encode_state->input_yuv_object; + + input_frame_width = vp9_state->frame_width; + input_frame_height = vp9_state->frame_height; + + output_surface = vp9_priv_surface->scaled_4x_surface_obj; + output_frame_width = vp9_state->frame_width_4x; + output_frame_height = vp9_state->frame_height_4x; + } + + memset(&scaling_curbe_param, 0, sizeof(scaling_curbe_param)); + + scaling_curbe_param.input_picture_width = input_frame_width; + scaling_curbe_param.input_picture_height = input_frame_height; + + scaling_curbe_param.use_16x_scaling = use_16x_scaling; + scaling_curbe_param.use_32x_scaling = 0; + + if (use_16x_scaling) + scaling_curbe_param.mb_variance_output_enabled = 0; + else + scaling_curbe_param.mb_variance_output_enabled = vp9_state->adaptive_transform_decision_enabled; + + scaling_curbe_param.blk8x8_stat_enabled = 0; + + vme_context->pfn_set_curbe_scaling(ctx, encode_state, + gpe_context, + encoder_context, + &scaling_curbe_param); + + memset(&scaling_surface_param, 0, sizeof(scaling_surface_param)); + scaling_surface_param.p_scaling_bti = (void *)(&vme_context->scaling_context.scaling_4x_bti); + scaling_surface_param.input_surface = input_surface; + scaling_surface_param.input_frame_width = input_frame_width; + scaling_surface_param.input_frame_height = input_frame_height; + + scaling_surface_param.output_surface = output_surface; + scaling_surface_param.output_frame_width = output_frame_width; + scaling_surface_param.output_frame_height = output_frame_height; + scaling_surface_param.scaling_out_use_16unorm_surf_fmt = 0; + scaling_surface_param.scaling_out_use_32unorm_surf_fmt = 1; + + vme_context->pfn_send_scaling_surface(ctx, encode_state, + gpe_context, + encoder_context, + &scaling_surface_param); + + gen8_gpe_setup_interface_data(ctx, gpe_context); + + memset(&kernel_walker_param, 0, sizeof(kernel_walker_param)); + /* the scaling is based on 8x8 blk level */ + kernel_walker_param.resolution_x = downscaled_width_in_mb * 2; + kernel_walker_param.resolution_y = downscaled_height_in_mb * 2; + kernel_walker_param.no_dependency = 1; + + gen9_init_media_object_walker_parameter(encoder_context, &kernel_walker_param, &media_object_walker_param); + + gen9_run_kernel_media_object_walker(ctx, encoder_context, + gpe_context, + media_function, + &media_object_walker_param); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vp9_dys_set_sampler_state(struct i965_gpe_context *gpe_context) +{ + struct gen9_sampler_8x8_avs *sampler_cmd; + + if (!gpe_context) + return; + + dri_bo_map(gpe_context->dynamic_state.bo, 1); + + if (!gpe_context->dynamic_state.bo->virtual) + return; + + sampler_cmd = (struct gen9_sampler_8x8_avs *) + (gpe_context->dynamic_state.bo->virtual + gpe_context->sampler_offset); + + memset(sampler_cmd, 0, sizeof(struct gen9_sampler_8x8_avs)); + + sampler_cmd->dw0.r3c_coefficient = 15; + sampler_cmd->dw0.r3x_coefficient = 6; + sampler_cmd->dw0.strong_edge_threshold = 8; + sampler_cmd->dw0.weak_edge_threshold = 1; + sampler_cmd->dw0.gain_factor = 32; + + sampler_cmd->dw2.r5c_coefficient = 3; + sampler_cmd->dw2.r5cx_coefficient = 8; + sampler_cmd->dw2.r5x_coefficient = 9; + sampler_cmd->dw2.strong_edge_weight = 6; + sampler_cmd->dw2.regular_weight = 3; + sampler_cmd->dw2.non_edge_weight = 2; + sampler_cmd->dw2.global_noise_estimation = 255; + + sampler_cmd->dw3.enable_8tap_adaptive_filter = 0; + sampler_cmd->dw3.cos_alpha = 79; + sampler_cmd->dw3.sin_alpha = 101; + + sampler_cmd->dw5.diamond_du = 0; + sampler_cmd->dw5.hs_margin = 3; + sampler_cmd->dw5.diamond_alpha = 100; + + sampler_cmd->dw7.inv_margin_vyl = 3300; + + sampler_cmd->dw8.inv_margin_vyu = 1600; + + sampler_cmd->dw10.y_slope2 = 24; + sampler_cmd->dw10.s0l = 1792; + + sampler_cmd->dw12.y_slope1 = 24; + + sampler_cmd->dw14.s0u = 256; + + sampler_cmd->dw15.s2u = 1792; + sampler_cmd->dw15.s1u = 0; + + memcpy(sampler_cmd->coefficients, + &gen9_vp9_avs_coeffs[0], + 17 * sizeof(struct gen8_sampler_8x8_avs_coefficients)); + + sampler_cmd->dw152.default_sharpness_level = 255; + sampler_cmd->dw152.max_derivative_4_pixels = 7; + sampler_cmd->dw152.max_derivative_8_pixels = 20; + sampler_cmd->dw152.transition_area_with_4_pixels = 4; + sampler_cmd->dw152.transition_area_with_8_pixels = 5; + + sampler_cmd->dw153.bypass_x_adaptive_filtering = 1; + sampler_cmd->dw153.bypass_y_adaptive_filtering = 1; + sampler_cmd->dw153.adaptive_filter_for_all_channel = 0; + + memcpy(sampler_cmd->extra_coefficients, + &gen9_vp9_avs_coeffs[17 * 8], + 15 * sizeof(struct gen8_sampler_8x8_avs_coefficients)); + + dri_bo_unmap(gpe_context->dynamic_state.bo); +} + +static void +gen9_vp9_set_curbe_dys(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_dys_curbe_param *curbe_param) +{ + vp9_dys_curbe_data *curbe_cmd; + + curbe_cmd = gen8p_gpe_context_map_curbe(gpe_context); + + if (!curbe_cmd) + return; + + memset(curbe_cmd, 0, sizeof(vp9_dys_curbe_data)); + + curbe_cmd->dw0.input_frame_width = curbe_param->input_width; + curbe_cmd->dw0.input_frame_height = curbe_param->input_height; + + curbe_cmd->dw1.output_frame_width = curbe_param->output_width; + curbe_cmd->dw1.output_frame_height = curbe_param->output_height; + + curbe_cmd->dw2.delta_u = 1.0f / curbe_param->output_width; + curbe_cmd->dw3.delta_v = 1.0f / curbe_param->output_height; + + curbe_cmd->dw16.input_frame_nv12_bti = VP9_BTI_DYS_INPUT_NV12; + curbe_cmd->dw17.output_frame_y_bti = VP9_BTI_DYS_OUTPUT_Y; + curbe_cmd->dw18.avs_sample_idx = 0; + + gen8p_gpe_context_unmap_curbe(gpe_context); +} + +static void +gen9_vp9_send_dys_surface(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_dys_surface_param *surface_param) +{ + + if (surface_param->input_frame) + gen9_add_adv_gpe_surface(ctx, + gpe_context, + surface_param->input_frame, + VP9_BTI_DYS_INPUT_NV12); + + if (surface_param->output_frame) { + gen9_add_2d_gpe_surface(ctx, + gpe_context, + surface_param->output_frame, + 0, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_DYS_OUTPUT_Y); + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + surface_param->output_frame, + 1, + 1, + I965_SURFACEFORMAT_R16_UINT, + VP9_BTI_DYS_OUTPUT_UV); + } + + return; +} + +static VAStatus +gen9_vp9_dys_kernel(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + gen9_vp9_dys_kernel_param *dys_kernel_param) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct i965_gpe_context *gpe_context; + int media_function; + struct gen9_vp9_dys_curbe_param curbe_param; + struct gen9_vp9_dys_surface_param surface_param; + struct gpe_media_object_walker_parameter media_object_walker_param; + struct vp9_encoder_kernel_walker_parameter kernel_walker_param; + unsigned int resolution_x, resolution_y; + + media_function = VP9_MEDIA_STATE_DYS; + gpe_context = &vme_context->dys_context.gpe_context; + + //gen8_gpe_context_init(ctx, gpe_context); + gen9_gpe_reset_binding_table(ctx, gpe_context); + + /* sampler state is configured only when initializing the GPE context */ + + memset(&curbe_param, 0, sizeof(curbe_param)); + curbe_param.input_width = dys_kernel_param->input_width; + curbe_param.input_height = dys_kernel_param->input_height; + curbe_param.output_width = dys_kernel_param->output_width; + curbe_param.output_height = dys_kernel_param->output_height; + vme_context->pfn_set_curbe_dys(ctx, encode_state, + gpe_context, + encoder_context, + &curbe_param); + + // Add surface states + memset(&surface_param, 0, sizeof(surface_param)); + surface_param.input_frame = dys_kernel_param->input_surface; + surface_param.output_frame = dys_kernel_param->output_surface; + surface_param.vert_line_stride = 0; + surface_param.vert_line_stride_offset = 0; + + vme_context->pfn_send_dys_surface(ctx, + encode_state, + gpe_context, + encoder_context, + &surface_param); + + resolution_x = ALIGN(dys_kernel_param->output_width, 16) / 16; + resolution_y = ALIGN(dys_kernel_param->output_height, 16) / 16; + + gen8_gpe_setup_interface_data(ctx, gpe_context); + + memset(&kernel_walker_param, 0, sizeof(kernel_walker_param)); + kernel_walker_param.resolution_x = resolution_x; + kernel_walker_param.resolution_y = resolution_y; + kernel_walker_param.no_dependency = 1; + + gen9_init_media_object_walker_parameter(encoder_context, &kernel_walker_param, &media_object_walker_param); + + gen9_run_kernel_media_object_walker(ctx, encoder_context, + gpe_context, + media_function, + &media_object_walker_param); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vp9_run_dys_refframes(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_vp9_state *vp9_state; + VAEncPictureParameterBufferVP9 *pic_param; + gen9_vp9_dys_kernel_param dys_kernel_param; + struct object_surface *obj_surface; + struct object_surface *input_surface, *output_surface; + struct gen9_surface_vp9 *vp9_priv_surface; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = vp9_state->pic_param; + + if ((pic_param->frame_width_src != pic_param->frame_width_dst) || + (pic_param->frame_height_src != pic_param->frame_height_dst)) { + input_surface = encode_state->input_yuv_object; + obj_surface = encode_state->reconstructed_object; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + output_surface = vp9_priv_surface->dys_surface_obj; + + memset(&dys_kernel_param, 0, sizeof(dys_kernel_param)); + dys_kernel_param.input_width = pic_param->frame_width_src; + dys_kernel_param.input_height = pic_param->frame_height_src; + dys_kernel_param.input_surface = input_surface; + dys_kernel_param.output_width = pic_param->frame_width_dst; + dys_kernel_param.output_height = pic_param->frame_height_dst; + dys_kernel_param.output_surface = output_surface; + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + } + + if ((vp9_state->dys_ref_frame_flag & VP9_LAST_REF) && + vp9_state->last_ref_obj) { + obj_surface = vp9_state->last_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + input_surface = obj_surface; + output_surface = vp9_priv_surface->dys_surface_obj; + + dys_kernel_param.input_width = vp9_priv_surface->frame_width; + dys_kernel_param.input_height = vp9_priv_surface->frame_height; + dys_kernel_param.input_surface = input_surface; + + dys_kernel_param.output_width = pic_param->frame_width_dst; + dys_kernel_param.output_height = pic_param->frame_height_dst; + dys_kernel_param.output_surface = output_surface; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + + if (vp9_state->hme_enabled) { + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 4), 16); + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_height / 4), 16); + dys_kernel_param.input_surface = vp9_priv_surface->scaled_4x_surface_obj; + + dys_kernel_param.output_width = vp9_state->frame_width_4x; + dys_kernel_param.output_height = vp9_state->frame_height_4x; + dys_kernel_param.output_surface = vp9_priv_surface->dys_4x_surface_obj; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + + /* Does it really need to do the 16x HME if the + * resolution is different? + * Maybe it should be restricted + */ + if (vp9_state->b16xme_enabled) { + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 16), 16); + dys_kernel_param.input_height = ALIGN((vp9_priv_surface->frame_height / 16), 16); + dys_kernel_param.input_surface = vp9_priv_surface->scaled_16x_surface_obj; + + dys_kernel_param.output_width = vp9_state->frame_width_16x; + dys_kernel_param.output_height = vp9_state->frame_height_16x; + dys_kernel_param.output_surface = vp9_priv_surface->dys_16x_surface_obj; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + } + } + } + + if ((vp9_state->dys_ref_frame_flag & VP9_GOLDEN_REF) && + vp9_state->golden_ref_obj) { + obj_surface = vp9_state->golden_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + input_surface = obj_surface; + output_surface = vp9_priv_surface->dys_surface_obj; + + dys_kernel_param.input_width = vp9_priv_surface->frame_width; + dys_kernel_param.input_height = vp9_priv_surface->frame_height; + dys_kernel_param.input_surface = input_surface; + + dys_kernel_param.output_width = pic_param->frame_width_dst; + dys_kernel_param.output_height = pic_param->frame_height_dst; + dys_kernel_param.output_surface = output_surface; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + + if (vp9_state->hme_enabled) { + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 4), 16); + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_height / 4), 16); + dys_kernel_param.input_surface = vp9_priv_surface->scaled_4x_surface_obj; + + dys_kernel_param.output_width = vp9_state->frame_width_4x; + dys_kernel_param.output_height = vp9_state->frame_height_4x; + dys_kernel_param.output_surface = vp9_priv_surface->dys_4x_surface_obj; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + + /* Does it really need to do the 16x HME if the + * resolution is different? + * Maybe it should be restricted + */ + if (vp9_state->b16xme_enabled) { + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 16), 16); + dys_kernel_param.input_height = ALIGN((vp9_priv_surface->frame_height / 16), 16); + dys_kernel_param.input_surface = vp9_priv_surface->scaled_16x_surface_obj; + + dys_kernel_param.output_width = vp9_state->frame_width_16x; + dys_kernel_param.output_height = vp9_state->frame_height_16x; + dys_kernel_param.output_surface = vp9_priv_surface->dys_16x_surface_obj; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + } + } + } + + if ((vp9_state->dys_ref_frame_flag & VP9_ALT_REF) && + vp9_state->alt_ref_obj) { + obj_surface = vp9_state->alt_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + input_surface = obj_surface; + output_surface = vp9_priv_surface->dys_surface_obj; + + dys_kernel_param.input_width = vp9_priv_surface->frame_width; + dys_kernel_param.input_height = vp9_priv_surface->frame_height; + dys_kernel_param.input_surface = input_surface; + + dys_kernel_param.output_width = pic_param->frame_width_dst; + dys_kernel_param.output_height = pic_param->frame_height_dst; + dys_kernel_param.output_surface = output_surface; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + + if (vp9_state->hme_enabled) { + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 4), 16); + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_height / 4), 16); + dys_kernel_param.input_surface = vp9_priv_surface->scaled_4x_surface_obj; + + dys_kernel_param.output_width = vp9_state->frame_width_4x; + dys_kernel_param.output_height = vp9_state->frame_height_4x; + dys_kernel_param.output_surface = vp9_priv_surface->dys_4x_surface_obj; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + + /* Does it really need to do the 16x HME if the + * resolution is different? + * Maybe it should be restricted + */ + if (vp9_state->b16xme_enabled) { + dys_kernel_param.input_width = ALIGN((vp9_priv_surface->frame_width / 16), 16); + dys_kernel_param.input_height = ALIGN((vp9_priv_surface->frame_height / 16), 16); + dys_kernel_param.input_surface = vp9_priv_surface->scaled_16x_surface_obj; + + dys_kernel_param.output_width = vp9_state->frame_width_16x; + dys_kernel_param.output_height = vp9_state->frame_height_16x; + dys_kernel_param.output_surface = vp9_priv_surface->dys_16x_surface_obj; + + gen9_vp9_dys_kernel(ctx, encode_state, + encoder_context, + &dys_kernel_param); + } + } + } + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vp9_set_curbe_mbenc(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_mbenc_curbe_param *curbe_param) +{ + struct gen9_vp9_state *vp9_state; + VAEncMiscParameterTypeVP9PerSegmantParam *seg_param, tmp_seg_param; + vp9_mbenc_curbe_data *curbe_cmd; + VAEncPictureParameterBufferVP9 *pic_param; + int i, segment_count; + int seg_qindex; + struct object_surface *obj_surface; + struct gen9_surface_vp9 *vp9_priv_surface; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return; + + pic_param = curbe_param->ppic_param; + seg_param = curbe_param->psegment_param; + + if (!seg_param) { + memset(&tmp_seg_param, 0, sizeof(tmp_seg_param)); + seg_param = &tmp_seg_param; + } + + curbe_cmd = gen8p_gpe_context_map_curbe(gpe_context); + + if (!curbe_cmd) + return; + + memset(curbe_cmd, 0, sizeof(vp9_mbenc_curbe_data)); + + if (vp9_state->dys_in_use) + { + curbe_cmd->dw0.frame_width = pic_param->frame_width_dst; + curbe_cmd->dw0.frame_height = pic_param->frame_height_dst; + } + else + { + curbe_cmd->dw0.frame_width = pic_param->frame_width_src; + curbe_cmd->dw0.frame_height = pic_param->frame_height_src; + } + + curbe_cmd->dw1.frame_type = curbe_param->picture_coding_type; + + curbe_cmd->dw1.segmentation_enable = pic_param->pic_flags.bits.segmentation_enabled; + if (pic_param->pic_flags.bits.segmentation_enabled) + segment_count = 8; + else + segment_count = 1; + + curbe_cmd->dw1.ref_frame_flags = curbe_param->ref_frame_flag; + + //right now set them to normal settings + if (curbe_param->picture_coding_type) + { + switch (vp9_state->target_usage) + { + case INTEL_ENC_VP9_TU_QUALITY: + curbe_cmd->dw1.min_16for32_check = 0x00; + curbe_cmd->dw2.multi_pred = 0x02; + curbe_cmd->dw2.len_sp = 0x39; + curbe_cmd->dw2.search_x = 0x30; + curbe_cmd->dw2.search_y = 0x28; + curbe_cmd->dw3.min_ref_for32_check = 0x01; + curbe_cmd->dw4.skip16_threshold = 0x000A; + curbe_cmd->dw4.disable_mr_threshold = 0x000C; + + memcpy(&curbe_cmd->dw16, + vp9_diamond_ime_search_path_delta, + 14 * sizeof(unsigned int)); + break; + case INTEL_ENC_VP9_TU_PERFORMANCE: + curbe_cmd->dw1.min_16for32_check = 0x02; + curbe_cmd->dw2.multi_pred = 0x00; + curbe_cmd->dw2.len_sp = 0x10; + curbe_cmd->dw2.search_x = 0x20; + curbe_cmd->dw2.search_y = 0x20; + curbe_cmd->dw3.min_ref_for32_check = 0x03; + curbe_cmd->dw4.skip16_threshold = 0x0014; + curbe_cmd->dw4.disable_mr_threshold = 0x0016; + + memcpy(&curbe_cmd->dw16, + vp9_fullspiral_ime_search_path_delta, + 14 * sizeof(unsigned int)); + + break; + default: // normal settings + curbe_cmd->dw1.min_16for32_check = 0x01; + curbe_cmd->dw2.multi_pred = 0x00; + curbe_cmd->dw2.len_sp = 0x19; + curbe_cmd->dw2.search_x = 0x30; + curbe_cmd->dw2.search_y = 0x28; + curbe_cmd->dw3.min_ref_for32_check = 0x02; + curbe_cmd->dw4.skip16_threshold = 0x000F; + curbe_cmd->dw4.disable_mr_threshold = 0x0011; + + memcpy(&curbe_cmd->dw16, + vp9_diamond_ime_search_path_delta, + 14 * sizeof(unsigned int)); + break; + } + + curbe_cmd->dw3.hme_enabled = curbe_param->hme_enabled; + curbe_cmd->dw3.multi_ref_qp_check = curbe_param->multi_ref_qp_check; + // co-located predictor must be disabled when dynamic scaling is enabled + curbe_cmd->dw3.disable_temp_pred = vp9_state->dys_in_use; + } + + curbe_cmd->dw5.inter_round = 0; + curbe_cmd->dw5.intra_round = 4; + curbe_cmd->dw5.frame_qpindex = pic_param->luma_ac_qindex; + + for (i = 0; i < segment_count; i++) + { + seg_qindex = pic_param->luma_ac_qindex + pic_param->luma_dc_qindex_delta + + seg_param->seg_data[i].segment_qindex_delta; + + seg_qindex = CLAMP(0, 255, seg_qindex); + + if (curbe_param->picture_coding_type) + memcpy(&curbe_cmd->segments[i], + &intel_vp9_costlut_p[seg_qindex * 16], + 16 * sizeof(unsigned int)); + else + memcpy(&curbe_cmd->segments[i], + &intel_vp9_costlut_key[seg_qindex * 16], + 16 * sizeof(unsigned int)); + } + + if (curbe_param->picture_coding_type) + { + if (curbe_cmd->dw3.multi_ref_qp_check) + { + if (curbe_param->ref_frame_flag & 0x01) + { + obj_surface = curbe_param->last_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + curbe_cmd->dw8.last_ref_qp = vp9_quant_dc[vp9_priv_surface->qp_value]; + } + + if (curbe_param->ref_frame_flag & 0x02) + { + obj_surface = curbe_param->golden_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + curbe_cmd->dw8.golden_ref_qp = vp9_quant_dc[vp9_priv_surface->qp_value]; + } + + if (curbe_param->ref_frame_flag & 0x04) + { + obj_surface = curbe_param->alt_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + curbe_cmd->dw9.alt_ref_qp = vp9_quant_dc[vp9_priv_surface->qp_value]; + } + } + } + curbe_cmd->dw160.enc_curr_y_surf_bti = VP9_BTI_MBENC_CURR_Y_G9; + curbe_cmd->dw162.enc_curr_nv12_surf_bti = VP9_BTI_MBENC_CURR_NV12_G9; + curbe_cmd->dw166.segmentation_map_bti = VP9_BTI_MBENC_SEGMENTATION_MAP_G9; + curbe_cmd->dw172.mode_decision_bti = VP9_BTI_MBENC_MODE_DECISION_G9; + curbe_cmd->dw167.tx_curbe_bti = VP9_BTI_MBENC_TX_CURBE_G9; + curbe_cmd->dw168.hme_mvdata_bti = VP9_BTI_MBENC_HME_MV_DATA_G9; + curbe_cmd->dw169.hme_distortion_bti = VP9_BTI_MBENC_HME_DISTORTION_G9; + curbe_cmd->dw171.mode_decision_prev_bti = VP9_BTI_MBENC_MODE_DECISION_PREV_G9; + curbe_cmd->dw172.mode_decision_bti = VP9_BTI_MBENC_MODE_DECISION_G9; + curbe_cmd->dw173.output_16x16_inter_modes_bti = VP9_BTI_MBENC_OUT_16x16_INTER_MODES_G9; + curbe_cmd->dw174.cu_record_bti = VP9_BTI_MBENC_CU_RECORDS_G9; + curbe_cmd->dw175.pak_data_bti = VP9_BTI_MBENC_PAK_DATA_G9; + + gen8p_gpe_context_unmap_curbe(gpe_context); + return; +} + +static void +gen9_vp9_send_mbenc_surface(VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_mbenc_surface_param *mbenc_param) +{ + struct gen9_vp9_state *vp9_state; + unsigned int res_size; + unsigned int frame_width_in_sb, frame_height_in_sb; + struct object_surface *obj_surface, *tmp_input; + struct gen9_surface_vp9 *vp9_priv_surface; + int media_function; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return; + + frame_width_in_sb = ALIGN(mbenc_param->frame_width, 64) / 64; + frame_height_in_sb = ALIGN(mbenc_param->frame_height, 64) / 64; + media_function = mbenc_param->media_state_type; + + switch (media_function) + { + case VP9_MEDIA_STATE_MBENC_I_32x32: + { + obj_surface = mbenc_param->curr_frame_obj; + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + obj_surface, + 0, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_CURR_Y_G9); + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + obj_surface, + 1, + 1, + I965_SURFACEFORMAT_R16_UINT, + VP9_BTI_MBENC_CURR_UV_G9); + + + if (mbenc_param->segmentation_enabled) + { + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_segmentation_map, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_SEGMENTATION_MAP_G9); + + } + + res_size = 16 * mbenc_param->frame_width_in_mb * + mbenc_param->frame_height_in_mb * sizeof(unsigned int); + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_mode_decision, + 0, + res_size / 4, + 0, + VP9_BTI_MBENC_MODE_DECISION_G9); + + break; + } + case VP9_MEDIA_STATE_MBENC_I_16x16: + { + obj_surface = mbenc_param->curr_frame_obj; + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + obj_surface, + 0, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_CURR_Y_G9); + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + obj_surface, + 1, + 1, + I965_SURFACEFORMAT_R16_UINT, + VP9_BTI_MBENC_CURR_UV_G9); + + gen9_add_adv_gpe_surface(ctx, gpe_context, + obj_surface, + VP9_BTI_MBENC_CURR_NV12_G9); + + if (mbenc_param->segmentation_enabled) + { + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_segmentation_map, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_SEGMENTATION_MAP_G9); + + } + + res_size = 16 * mbenc_param->frame_width_in_mb * + mbenc_param->frame_height_in_mb * sizeof(unsigned int); + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_mode_decision, + 0, + res_size / 4, + 0, + VP9_BTI_MBENC_MODE_DECISION_G9); + + res_size = 160; + + gen9_add_dri_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->gpe_context_tx->dynamic_state.bo, + 0, + ALIGN(res_size, 64), + mbenc_param->gpe_context_tx->curbe_offset, + VP9_BTI_MBENC_TX_CURBE_G9); + + break; + } + case VP9_MEDIA_STATE_MBENC_P: + { + obj_surface = mbenc_param->curr_frame_obj; + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + obj_surface, + 0, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_CURR_Y_G9); + + gen9_add_2d_gpe_surface(ctx, gpe_context, + obj_surface, + 1, + 1, + I965_SURFACEFORMAT_R16_UINT, + VP9_BTI_MBENC_CURR_UV_G9); + + gen9_add_adv_gpe_surface(ctx, gpe_context, + obj_surface, + VP9_BTI_MBENC_CURR_NV12_G9); + + if (mbenc_param->last_ref_obj) + { + obj_surface = mbenc_param->last_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + if (vp9_state->dys_in_use && + ((vp9_priv_surface->frame_width != vp9_state->frame_width) || + (vp9_priv_surface->frame_height != vp9_state->frame_height))) + tmp_input = vp9_priv_surface->dys_surface_obj; + else + tmp_input = obj_surface; + + gen9_add_adv_gpe_surface(ctx, gpe_context, + tmp_input, + VP9_BTI_MBENC_LAST_NV12_G9); + + gen9_add_adv_gpe_surface(ctx, gpe_context, + tmp_input, + VP9_BTI_MBENC_LAST_NV12_G9 + 1); + + } + + if (mbenc_param->golden_ref_obj) + { + obj_surface = mbenc_param->golden_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + if (vp9_state->dys_in_use && + ((vp9_priv_surface->frame_width != vp9_state->frame_width) || + (vp9_priv_surface->frame_height != vp9_state->frame_height))) + tmp_input = vp9_priv_surface->dys_surface_obj; + else + tmp_input = obj_surface; + + gen9_add_adv_gpe_surface(ctx, gpe_context, + tmp_input, + VP9_BTI_MBENC_GOLD_NV12_G9); + + gen9_add_adv_gpe_surface(ctx, gpe_context, + tmp_input, + VP9_BTI_MBENC_GOLD_NV12_G9 + 1); + + } + + if (mbenc_param->alt_ref_obj) + { + obj_surface = mbenc_param->alt_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + if (vp9_state->dys_in_use && + ((vp9_priv_surface->frame_width != vp9_state->frame_width) || + (vp9_priv_surface->frame_height != vp9_state->frame_height))) + tmp_input = vp9_priv_surface->dys_surface_obj; + else + tmp_input = obj_surface; + + gen9_add_adv_gpe_surface(ctx, gpe_context, + tmp_input, + VP9_BTI_MBENC_ALTREF_NV12_G9); + + gen9_add_adv_gpe_surface(ctx, gpe_context, + tmp_input, + VP9_BTI_MBENC_ALTREF_NV12_G9 + 1); + + } + + if (mbenc_param->hme_enabled) + { + gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + mbenc_param->ps4x_memv_data_buffer, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_HME_MV_DATA_G9); + + gen9_add_buffer_2d_gpe_surface(ctx, gpe_context, + mbenc_param->ps4x_memv_distortion_buffer, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_HME_DISTORTION_G9); + } + + if (mbenc_param->segmentation_enabled) + { + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_segmentation_map, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_SEGMENTATION_MAP_G9); + + } + + res_size = 16 * mbenc_param->frame_width_in_mb * + mbenc_param->frame_height_in_mb * sizeof(unsigned int); + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_mode_decision_prev, + 0, + res_size / 4, + 0, + VP9_BTI_MBENC_MODE_DECISION_PREV_G9); + + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_mode_decision, + 0, + res_size / 4, + 0, + VP9_BTI_MBENC_MODE_DECISION_G9); + + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_output_16x16_inter_modes, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_OUT_16x16_INTER_MODES_G9); + + res_size = 160; + + gen9_add_dri_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->gpe_context_tx->dynamic_state.bo, + 0, + ALIGN(res_size, 64), + mbenc_param->gpe_context_tx->curbe_offset, + VP9_BTI_MBENC_TX_CURBE_G9); + + + break; + } + case VP9_MEDIA_STATE_MBENC_TX: + { + obj_surface = mbenc_param->curr_frame_obj; + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + obj_surface, + 0, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_CURR_Y_G9); + + gen9_add_2d_gpe_surface(ctx, + gpe_context, + obj_surface, + 1, + 1, + I965_SURFACEFORMAT_R16_UINT, + VP9_BTI_MBENC_CURR_UV_G9); + + if (mbenc_param->segmentation_enabled) + { + gen9_add_buffer_2d_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_segmentation_map, + 1, + I965_SURFACEFORMAT_R8_UNORM, + VP9_BTI_MBENC_SEGMENTATION_MAP_G9); + + } + + res_size = 16 * mbenc_param->frame_width_in_mb * + mbenc_param->frame_height_in_mb * sizeof(unsigned int); + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_mode_decision, + 0, + res_size / 4, + 0, + VP9_BTI_MBENC_MODE_DECISION_G9); + + res_size = frame_width_in_sb * frame_height_in_sb * 4 * sizeof(unsigned int); + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_mb_code_surface, + 0, + res_size / 4, + 0, + VP9_BTI_MBENC_PAK_DATA_G9); + + // CU Record + res_size = frame_width_in_sb * frame_height_in_sb * + 64 * 16 * sizeof(unsigned int); + + gen9_add_buffer_gpe_surface(ctx, + gpe_context, + mbenc_param->pres_mb_code_surface, + 0, + res_size / 4, + mbenc_param->mb_data_offset, + VP9_BTI_MBENC_CU_RECORDS_G9); + } + default: + break; + } + + return; +} + +static VAStatus +gen9_vp9_mbenc_kernel(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + int media_function) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct i965_gpe_context *gpe_context, *tx_gpe_context; + struct gpe_media_object_walker_parameter media_object_walker_param; + struct vp9_encoder_kernel_walker_parameter kernel_walker_param; + unsigned int resolution_x, resolution_y; + struct gen9_vp9_state *vp9_state; + VAEncPictureParameterBufferVP9 *pic_param; + struct gen9_vp9_mbenc_curbe_param curbe_param; + struct gen9_vp9_mbenc_surface_param surface_param; + VAStatus va_status = VA_STATUS_SUCCESS; + int mbenc_gpe_index = 0; + struct object_surface *obj_surface; + struct gen9_surface_vp9 *vp9_priv_surface; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_ENCODING_ERROR; + + pic_param = vp9_state->pic_param; + + switch (media_function) + { + case VP9_MEDIA_STATE_MBENC_I_32x32: + mbenc_gpe_index = VP9_MBENC_IDX_KEY_32x32; + break; + + case VP9_MEDIA_STATE_MBENC_I_16x16: + mbenc_gpe_index = VP9_MBENC_IDX_KEY_16x16; + break; + + case VP9_MEDIA_STATE_MBENC_P: + mbenc_gpe_index = VP9_MBENC_IDX_INTER; + break; + + case VP9_MEDIA_STATE_MBENC_TX: + mbenc_gpe_index = VP9_MBENC_IDX_TX; + break; + + default: + va_status = VA_STATUS_ERROR_OPERATION_FAILED; + return va_status; + } + + gpe_context = &(vme_context->mbenc_context.gpe_contexts[mbenc_gpe_index]); + tx_gpe_context = &(vme_context->mbenc_context.gpe_contexts[VP9_MBENC_IDX_TX]); + + gen9_gpe_reset_binding_table(ctx, gpe_context); + + // Set curbe + if (!vp9_state->mbenc_curbe_set_in_brc_update) + { + if(media_function == VP9_MEDIA_STATE_MBENC_I_32x32 || + media_function == VP9_MEDIA_STATE_MBENC_P) + { + memset(&curbe_param, 0, sizeof(curbe_param)); + curbe_param.ppic_param = vp9_state->pic_param; + curbe_param.pseq_param = vp9_state->seq_param; + curbe_param.psegment_param = vp9_state->segment_param; + curbe_param.frame_width_in_mb = vp9_state->frame_width_in_mb; + curbe_param.frame_height_in_mb = vp9_state->frame_height_in_mb; + curbe_param.last_ref_obj = vp9_state->last_ref_obj; + curbe_param.golden_ref_obj = vp9_state->golden_ref_obj; + curbe_param.alt_ref_obj = vp9_state->alt_ref_obj; + curbe_param.hme_enabled = vp9_state->hme_enabled; + curbe_param.ref_frame_flag = vp9_state->ref_frame_flag; + curbe_param.picture_coding_type = vp9_state->picture_coding_type; + curbe_param.media_state_type = media_function; + curbe_param.mbenc_curbe_set_in_brc_update = vp9_state->mbenc_curbe_set_in_brc_update; + + vme_context->pfn_set_curbe_mbenc(ctx, + encode_state, + gpe_context, + encoder_context, + &curbe_param); + } + } + + memset(&surface_param, 0, sizeof(surface_param)); + surface_param.media_state_type = media_function; + surface_param.picture_coding_type = vp9_state->picture_coding_type; + surface_param.frame_width = vp9_state->frame_width; + surface_param.frame_height = vp9_state->frame_height; + surface_param.frame_width_in_mb = vp9_state->frame_width_in_mb; + surface_param.frame_height_in_mb = vp9_state->frame_height_in_mb; + surface_param.hme_enabled = vp9_state->hme_enabled; + surface_param.segmentation_enabled = pic_param->pic_flags.bits.segmentation_enabled; + surface_param.pres_segmentation_map = &vme_context->mb_segment_map_surface; + surface_param.ps4x_memv_data_buffer = &vme_context->s4x_memv_data_buffer; + surface_param.ps4x_memv_distortion_buffer = &vme_context->s4x_memv_distortion_buffer; + surface_param.pres_mode_decision = + &vme_context->res_mode_decision[vp9_state->curr_mode_decision_index]; + surface_param.pres_mode_decision_prev = + &vme_context->res_mode_decision[!vp9_state->curr_mode_decision_index]; + surface_param.pres_output_16x16_inter_modes = &vme_context->res_output_16x16_inter_modes; + surface_param.pres_mbenc_curbe_buffer = NULL; + surface_param.last_ref_obj = vp9_state->last_ref_obj; + surface_param.golden_ref_obj = vp9_state->golden_ref_obj; + surface_param.alt_ref_obj = vp9_state->alt_ref_obj; + surface_param.pres_mb_code_surface = &vme_context->res_mb_code_surface; + surface_param.gpe_context_tx = tx_gpe_context; + surface_param.mb_data_offset = vp9_state->mb_data_offset; + + obj_surface = encode_state->reconstructed_object; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + if (vp9_state->dys_in_use && + (pic_param->frame_width_src != pic_param->frame_height_dst || + pic_param->frame_height_src != pic_param->frame_height_dst)) { + obj_surface = vp9_priv_surface->dys_surface_obj; + } else + obj_surface = encode_state->input_yuv_object; + + surface_param.curr_frame_obj = obj_surface; + + vme_context->pfn_send_mbenc_surface(ctx, + encode_state, + gpe_context, + encoder_context, + &surface_param); + + if (media_function == VP9_MEDIA_STATE_MBENC_I_32x32) { + resolution_x = ALIGN(vp9_state->frame_width, 32) / 32; + resolution_y = ALIGN(vp9_state->frame_height, 32) / 32; + } else { + resolution_x = ALIGN(vp9_state->frame_width, 16) / 16; + resolution_y = ALIGN(vp9_state->frame_height, 16) / 16; + } + + memset(&kernel_walker_param, 0, sizeof(kernel_walker_param)); + kernel_walker_param.resolution_x = resolution_x; + kernel_walker_param.resolution_y = resolution_y; + + if (media_function == VP9_MEDIA_STATE_MBENC_P || + media_function == VP9_MEDIA_STATE_MBENC_I_16x16) { + kernel_walker_param.use_scoreboard = 1; + kernel_walker_param.no_dependency = 0; + kernel_walker_param.walker_degree = VP9_45Z_DEGREE; + } else { + kernel_walker_param.use_scoreboard = 0; + kernel_walker_param.no_dependency = 1; + } + + gen8_gpe_setup_interface_data(ctx, gpe_context); + + gen9_init_media_object_walker_parameter(encoder_context, &kernel_walker_param, &media_object_walker_param); + + gen9_run_kernel_media_object_walker(ctx, encoder_context, + gpe_context, + media_function, + &media_object_walker_param); + return va_status; +} + +static void +gen9_init_gpe_context_vp9(struct i965_gpe_context *gpe_context, + struct vp9_encoder_kernel_parameter *kernel_param) +{ + gpe_context->curbe.length = kernel_param->curbe_size; // in bytes + + gpe_context->curbe_size = ALIGN(kernel_param->curbe_size, 64); + + gpe_context->sampler_size = 0; + if (kernel_param->sampler_size) { + gpe_context->sampler_size = ALIGN(kernel_param->sampler_size, 64); + } + + gpe_context->idrt.entry_size = ALIGN(sizeof(struct gen8_interface_descriptor_data), 64); // 8 dws, 1 register + gpe_context->idrt.max_entries = NUM_KERNELS_PER_GPE_CONTEXT; + gpe_context->idrt_size = ALIGN(sizeof(struct gen8_interface_descriptor_data), 64) * + NUM_KERNELS_PER_GPE_CONTEXT; + + gpe_context->surface_state_binding_table.max_entries = MAX_VP9_ENCODER_SURFACES; + gpe_context->surface_state_binding_table.binding_table_offset = 0; + gpe_context->surface_state_binding_table.surface_state_offset = ALIGN(MAX_VP9_ENCODER_SURFACES * 4, 64); + gpe_context->surface_state_binding_table.length = ALIGN(MAX_VP9_ENCODER_SURFACES * 4, 64) + ALIGN(MAX_VP9_ENCODER_SURFACES * SURFACE_STATE_PADDED_SIZE_GEN9, 64); + + gpe_context->vfe_state.max_num_threads = 112; // 16 EU * 7 threads + gpe_context->vfe_state.curbe_allocation_size = MAX(1, ALIGN(gpe_context->curbe.length, 32) >> 5); // in registers + gpe_context->vfe_state.urb_entry_size = MAX(1, ALIGN(kernel_param->inline_data_size, 32) >> 5); // in registers + gpe_context->vfe_state.num_urb_entries = (MAX_URB_SIZE - + gpe_context->vfe_state.curbe_allocation_size - + ((gpe_context->idrt.entry_size >> 5) * + gpe_context->idrt.max_entries)) / gpe_context->vfe_state.urb_entry_size; + gpe_context->vfe_state.num_urb_entries = CLAMP(1, 127, gpe_context->vfe_state.num_urb_entries); + gpe_context->vfe_state.gpgpu_mode = 0; +} + +static void +gen9_init_vfe_scoreboard_vp9(struct i965_gpe_context *gpe_context, + struct vp9_encoder_scoreboard_parameter *scoreboard_param) +{ + gpe_context->vfe_desc5.scoreboard0.mask = scoreboard_param->mask; + gpe_context->vfe_desc5.scoreboard0.type = scoreboard_param->type; + gpe_context->vfe_desc5.scoreboard0.enable = scoreboard_param->enable; + + if (scoreboard_param->walkpat_flag) { + gpe_context->vfe_desc5.scoreboard0.mask = 0x0F; + gpe_context->vfe_desc5.scoreboard0.type = 1; + + gpe_context->vfe_desc6.scoreboard1.delta_x0 = 0x0; + gpe_context->vfe_desc6.scoreboard1.delta_y0 = 0xF; + + gpe_context->vfe_desc6.scoreboard1.delta_x1 = 0x0; + gpe_context->vfe_desc6.scoreboard1.delta_y1 = 0xE; + + gpe_context->vfe_desc6.scoreboard1.delta_x2 = 0xF; + gpe_context->vfe_desc6.scoreboard1.delta_y2 = 0x3; + + gpe_context->vfe_desc6.scoreboard1.delta_x3 = 0xF; + gpe_context->vfe_desc6.scoreboard1.delta_y3 = 0x1; + } else { + // Scoreboard 0 + gpe_context->vfe_desc6.scoreboard1.delta_x0 = 0xF; + gpe_context->vfe_desc6.scoreboard1.delta_y0 = 0x0; + + // Scoreboard 1 + gpe_context->vfe_desc6.scoreboard1.delta_x1 = 0x0; + gpe_context->vfe_desc6.scoreboard1.delta_y1 = 0xF; + + // Scoreboard 2 + gpe_context->vfe_desc6.scoreboard1.delta_x2 = 0x1; + gpe_context->vfe_desc6.scoreboard1.delta_y2 = 0xF; + + // Scoreboard 3 + gpe_context->vfe_desc6.scoreboard1.delta_x3 = 0xF; + gpe_context->vfe_desc6.scoreboard1.delta_y3 = 0xF; + + // Scoreboard 4 + gpe_context->vfe_desc7.scoreboard2.delta_x4 = 0xF; + gpe_context->vfe_desc7.scoreboard2.delta_y4 = 0x1; + + // Scoreboard 5 + gpe_context->vfe_desc7.scoreboard2.delta_x5 = 0x0; + gpe_context->vfe_desc7.scoreboard2.delta_y5 = 0xE; + + // Scoreboard 6 + gpe_context->vfe_desc7.scoreboard2.delta_x6 = 0x1; + gpe_context->vfe_desc7.scoreboard2.delta_y6 = 0xE; + + // Scoreboard 7 + gpe_context->vfe_desc7.scoreboard2.delta_x6 = 0xF; + gpe_context->vfe_desc7.scoreboard2.delta_y6 = 0xE; + } +} + +#define VP9_MI_BLOCK_MASK 0x07 +#define VP9_VME_REF_WIN 48 + +static VAStatus +gen9_encode_vp9_check_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_vp9_state *vp9_state; + VAEncPictureParameterBufferVP9 *pic_param; + VAEncMiscParameterTypeVP9PerSegmantParam *seg_param; + VAEncSequenceParameterBufferVP9 *seq_param; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + struct gen9_surface_vp9 *vp9_priv_surface; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!encode_state->pic_param_ext || + !encode_state->pic_param_ext->buffer) { + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + pic_param = (VAEncPictureParameterBufferVP9 *)encode_state->pic_param_ext->buffer; + + if (pic_param->frame_width_src & VP9_MI_BLOCK_MASK || + pic_param->frame_height_src & VP9_MI_BLOCK_MASK || + pic_param->frame_width_dst & VP9_MI_BLOCK_MASK || + pic_param->frame_height_dst & VP9_MI_BLOCK_MASK) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + obj_buffer = BUFFER(pic_param->coded_buf); + + if (!obj_buffer || + !obj_buffer->buffer_store || + !obj_buffer->buffer_store->bo) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + encode_state->coded_buf_object = obj_buffer; + + vp9_state->status_buffer.bo = obj_buffer->buffer_store->bo; + + encode_state->reconstructed_object = SURFACE(pic_param->reconstructed_frame); + encode_state->input_yuv_object = SURFACE(encode_state->current_render_target); + + if (!encode_state->reconstructed_object || + !encode_state->input_yuv_object) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + vp9_state->curr_frame = pic_param->reconstructed_frame; + vp9_state->ref_frame_flag = 0; + if (pic_param->pic_flags.bits.frame_type == KEY_FRAME || + pic_param->pic_flags.bits.intra_only) { + /* this will be regarded as I-frame type */ + vp9_state->picture_coding_type = 0; + vp9_state->last_ref_obj = NULL; + vp9_state->golden_ref_obj = NULL; + vp9_state->alt_ref_obj = NULL; + } else { + vp9_state->picture_coding_type = 1; + vp9_state->ref_frame_flag = pic_param->ref_flags.bits.ref_frame_ctrl_l0 | + pic_param->ref_flags.bits.ref_frame_ctrl_l1; + + obj_surface = SURFACE(pic_param->reference_frames[pic_param->ref_flags.bits.ref_last_idx]); + vp9_state->last_ref_obj = obj_surface; + if (!obj_surface || + !obj_surface->bo || + !obj_surface->private_data) { + vp9_state->last_ref_obj = NULL; + vp9_state->ref_frame_flag &= ~(VP9_LAST_REF); + } + + obj_surface = SURFACE(pic_param->reference_frames[pic_param->ref_flags.bits.ref_gf_idx]); + vp9_state->golden_ref_obj = obj_surface; + if (!obj_surface || + !obj_surface->bo || + !obj_surface->private_data) { + vp9_state->golden_ref_obj = NULL; + vp9_state->ref_frame_flag &= ~(VP9_GOLDEN_REF); + } + + obj_surface = SURFACE(pic_param->reference_frames[pic_param->ref_flags.bits.ref_arf_idx]); + vp9_state->alt_ref_obj = obj_surface; + if (!obj_surface || + !obj_surface->bo || + !obj_surface->private_data) { + vp9_state->alt_ref_obj = NULL; + vp9_state->ref_frame_flag &= ~(VP9_ALT_REF); + } + + /* remove the duplicated flag and ref frame list */ + if (vp9_state->ref_frame_flag & VP9_LAST_REF) { + if (pic_param->reference_frames[pic_param->ref_flags.bits.ref_last_idx] == + pic_param->reference_frames[pic_param->ref_flags.bits.ref_gf_idx]) { + vp9_state->ref_frame_flag &= ~(VP9_GOLDEN_REF); + vp9_state->golden_ref_obj = NULL; + } + + if (pic_param->reference_frames[pic_param->ref_flags.bits.ref_last_idx] == + pic_param->reference_frames[pic_param->ref_flags.bits.ref_arf_idx]) { + vp9_state->ref_frame_flag &= ~(VP9_ALT_REF); + vp9_state->alt_ref_obj = NULL; + } + } + + if (vp9_state->ref_frame_flag & VP9_GOLDEN_REF) { + if (pic_param->reference_frames[pic_param->ref_flags.bits.ref_gf_idx] == + pic_param->reference_frames[pic_param->ref_flags.bits.ref_arf_idx]) { + vp9_state->ref_frame_flag &= ~(VP9_ALT_REF); + vp9_state->alt_ref_obj = NULL; + } + } + + if (vp9_state->ref_frame_flag == 0) + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + + seg_param = NULL; + if (pic_param->pic_flags.bits.segmentation_enabled) { + if (!encode_state->q_matrix || + !encode_state->q_matrix->buffer) { + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + seg_param = (VAEncMiscParameterTypeVP9PerSegmantParam *) + encode_state->q_matrix->buffer; + } + + seq_param = NULL; + if (encode_state->seq_param_ext && + encode_state->seq_param_ext->buffer) + seq_param = (VAEncSequenceParameterBufferVP9 *)encode_state->seq_param_ext->buffer; + + if (!seq_param) { + seq_param = &vp9_state->bogus_seq_param; + } + + vp9_state->pic_param = pic_param; + vp9_state->segment_param = seg_param; + vp9_state->seq_param = seq_param; + + obj_surface = encode_state->reconstructed_object; + if (pic_param->frame_width_dst > obj_surface->orig_width || + pic_param->frame_height_dst > obj_surface->orig_height) + return VA_STATUS_ERROR_INVALID_SURFACE; + + if (!vp9_state->dys_enabled && + ((pic_param->frame_width_src != pic_param->frame_width_dst) || + (pic_param->frame_height_src != pic_param->frame_height_dst))) + return VA_STATUS_ERROR_UNIMPLEMENTED; + + if (vp9_state->brc_enabled) { + if (vp9_state->brc_flag_check & VP9_BRC_FAILURE) { + WARN_ONCE("Rate control misc_parameter is required for BRC\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + + if (vp9_state->first_frame) { + unsigned int brc_flag; + VAEncMiscParameterBuffer *misc_param; + + brc_flag = VP9_BRC_SEQ | VP9_BRC_RC; + if ((vp9_state->brc_flag_check & brc_flag) != brc_flag) { + WARN_ONCE("SPS/RC misc is required for BRC\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + + /* check the corresponding BRC parameter for CBR and VBR */ + if (encoder_context->rate_control_mode == VA_RC_CBR) { + vp9_state->target_bit_rate = seq_param->bits_per_second; + vp9_state->gop_size = seq_param->intra_period; + + if (vp9_state->brc_flag_check & VP9_BRC_HRD) { + VAEncMiscParameterHRD *misc_param_hrd; + + misc_param = (VAEncMiscParameterBuffer *) + encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer; + misc_param_hrd = (VAEncMiscParameterHRD *)misc_param->data; + + vp9_state->init_vbv_buffer_fullness_in_bit = misc_param_hrd->initial_buffer_fullness; + vp9_state->vbv_buffer_size_in_bit = misc_param_hrd->buffer_size; + } + + if (vp9_state->brc_flag_check & VP9_BRC_FR) { + VAEncMiscParameterFrameRate *misc_param_fr; + + misc_param = (VAEncMiscParameterBuffer *) + encode_state->misc_param[VAEncMiscParameterTypeFrameRate]->buffer; + misc_param_fr = (VAEncMiscParameterFrameRate *)misc_param->data; + + vp9_state->frame_rate = misc_param_fr->framerate; + } else { + /* Assign the default frame rate */ + vp9_state->frame_rate = 30; + } + + /* RC misc will override HRD parameter */ + if (vp9_state->brc_flag_check & VP9_BRC_RC) { + VAEncMiscParameterRateControl *misc_param_rc; + + misc_param = (VAEncMiscParameterBuffer *) + encode_state->misc_param[VAEncMiscParameterTypeRateControl]->buffer; + misc_param_rc = (VAEncMiscParameterRateControl *)misc_param->data; + + vp9_state->target_bit_rate = misc_param_rc->bits_per_second; + vp9_state->vbv_buffer_size_in_bit = (misc_param_rc->bits_per_second / 1000) * + misc_param_rc->window_size; + vp9_state->init_vbv_buffer_fullness_in_bit = vp9_state->vbv_buffer_size_in_bit / 2; + vp9_state->window_size = misc_param_rc->window_size; + } + vp9_state->max_bit_rate = vp9_state->target_bit_rate; + vp9_state->min_bit_rate = vp9_state->target_bit_rate; + } else { + /* VBR mode */ + brc_flag = VP9_BRC_SEQ | VP9_BRC_RC; + vp9_state->target_bit_rate = seq_param->bits_per_second; + vp9_state->gop_size = seq_param->intra_period; + + if (vp9_state->brc_flag_check & VP9_BRC_FR) { + VAEncMiscParameterFrameRate *misc_param_fr; + + misc_param = (VAEncMiscParameterBuffer *) + encode_state->misc_param[VAEncMiscParameterTypeFrameRate]->buffer; + misc_param_fr = (VAEncMiscParameterFrameRate *)misc_param->data; + + vp9_state->frame_rate = misc_param_fr->framerate; + } else { + /* Assign the default frame rate */ + vp9_state->frame_rate = 30; + } + + if (vp9_state->brc_flag_check & VP9_BRC_RC) { + VAEncMiscParameterRateControl *misc_param_rc; + + misc_param = (VAEncMiscParameterBuffer *) + encode_state->misc_param[VAEncMiscParameterTypeRateControl]->buffer; + misc_param_rc = (VAEncMiscParameterRateControl *)misc_param->data; + + vp9_state->max_bit_rate = misc_param_rc->bits_per_second; + vp9_state->vbv_buffer_size_in_bit = (misc_param_rc->bits_per_second / 1000) * + misc_param_rc->window_size; + vp9_state->init_vbv_buffer_fullness_in_bit = vp9_state->vbv_buffer_size_in_bit / 2; + vp9_state->target_bit_rate = (misc_param_rc->bits_per_second / 100) * + misc_param_rc->target_percentage; + vp9_state->min_bit_rate = (misc_param_rc->bits_per_second / 100) * + (2 * misc_param_rc->target_percentage - 100); + vp9_state->target_percentage = misc_param_rc->target_percentage; + vp9_state->window_size = misc_param_rc->window_size; + } + } + } + else if (vp9_state->picture_coding_type == KEY_FRAME){ + VAEncMiscParameterBuffer *misc_param; + /* update the BRC parameter only when it is key-frame */ + /* If the parameter related with RC is changed. Reset BRC */ + if (vp9_state->brc_flag_check & VP9_BRC_FR) { + VAEncMiscParameterFrameRate *misc_param_fr; + + misc_param = (VAEncMiscParameterBuffer *) + encode_state->misc_param[VAEncMiscParameterTypeFrameRate]->buffer; + misc_param_fr = (VAEncMiscParameterFrameRate *)misc_param->data; + + if (vp9_state->frame_rate != misc_param_fr->framerate) { + vp9_state->brc_reset = 1; + vp9_state->frame_rate = misc_param_fr->framerate; + } + } + + /* check the GOP size. And bit_per_second in SPS is ignored */ + if (vp9_state->brc_flag_check & VP9_BRC_SEQ) { + if (vp9_state->gop_size != seq_param->intra_period) { + vp9_state->brc_reset = 1; + vp9_state->gop_size = seq_param->intra_period; + } + } + + /* update the bit_per_second */ + if (vp9_state->brc_flag_check & VP9_BRC_RC) { + VAEncMiscParameterRateControl *misc_param_rc; + + misc_param = (VAEncMiscParameterBuffer *) + encode_state->misc_param[VAEncMiscParameterTypeRateControl]->buffer; + misc_param_rc = (VAEncMiscParameterRateControl *)misc_param->data; + + if (encoder_context->rate_control_mode == VA_RC_CBR) { + if (vp9_state->target_bit_rate != misc_param_rc->bits_per_second || + vp9_state->window_size != misc_param_rc->window_size) { + vp9_state->target_bit_rate = misc_param_rc->bits_per_second; + vp9_state->vbv_buffer_size_in_bit = (misc_param_rc->bits_per_second / 1000) * + misc_param_rc->window_size; + vp9_state->init_vbv_buffer_fullness_in_bit = vp9_state->vbv_buffer_size_in_bit * 2; + vp9_state->window_size = misc_param_rc->window_size; + vp9_state->max_bit_rate = vp9_state->target_bit_rate; + vp9_state->min_bit_rate = vp9_state->target_bit_rate; + vp9_state->brc_reset = 1; + } + } else { + /* VBR mode */ + if (vp9_state->max_bit_rate != misc_param_rc->bits_per_second || + vp9_state->target_percentage != misc_param_rc->target_percentage) { + + vp9_state->target_bit_rate = (misc_param_rc->bits_per_second / 100) * + misc_param_rc->target_percentage; + vp9_state->min_bit_rate = (misc_param_rc->bits_per_second / 100) * + (2 * misc_param_rc->target_percentage - 100); + vp9_state->max_bit_rate = misc_param_rc->bits_per_second; + vp9_state->vbv_buffer_size_in_bit = (misc_param_rc->bits_per_second / 1000) * + misc_param_rc->window_size; + vp9_state->init_vbv_buffer_fullness_in_bit = vp9_state->vbv_buffer_size_in_bit / 2; + vp9_state->target_percentage = misc_param_rc->target_percentage; + vp9_state->window_size = misc_param_rc->window_size; + vp9_state->brc_reset = 1; + } + } + } + } + } + + vp9_state->frame_width = pic_param->frame_width_dst; + vp9_state->frame_height = pic_param->frame_height_dst; + + vp9_state->frame_width_4x = ALIGN(vp9_state->frame_width / 4, 16); + vp9_state->frame_height_4x = ALIGN(vp9_state->frame_height / 4, 16); + + vp9_state->frame_width_16x = ALIGN(vp9_state->frame_width / 16, 16); + vp9_state->frame_height_16x = ALIGN(vp9_state->frame_height / 16, 16); + + vp9_state->frame_width_in_mb = ALIGN(vp9_state->frame_width, 16) / 16; + vp9_state->frame_height_in_mb = ALIGN(vp9_state->frame_height, 16) / 16; + + vp9_state->downscaled_width_4x_in_mb = vp9_state->frame_width_4x / 16; + vp9_state->downscaled_height_4x_in_mb = vp9_state->frame_height_4x / 16; + vp9_state->downscaled_width_16x_in_mb = vp9_state->frame_width_16x / 16; + vp9_state->downscaled_height_16x_in_mb = vp9_state->frame_height_16x / 16; + + vp9_state->dys_in_use = 0; + if(pic_param->frame_width_src != pic_param->frame_width_dst || + pic_param->frame_height_src != pic_param->frame_height_dst) + vp9_state->dys_in_use = 1; + vp9_state->dys_ref_frame_flag = 0; + /* check the dys setting. The dys is supported by default. */ + if (pic_param->pic_flags.bits.frame_type != KEY_FRAME && + !pic_param->pic_flags.bits.intra_only) { + vp9_state->dys_ref_frame_flag = vp9_state->ref_frame_flag; + + if ((vp9_state->ref_frame_flag & VP9_LAST_REF) && + vp9_state->last_ref_obj) { + obj_surface = vp9_state->last_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + if (vp9_state->frame_width == vp9_priv_surface->frame_width && + vp9_state->frame_height == vp9_priv_surface->frame_height) + vp9_state->dys_ref_frame_flag &= ~(VP9_LAST_REF); + } + if ((vp9_state->ref_frame_flag & VP9_GOLDEN_REF) && + vp9_state->golden_ref_obj) { + obj_surface = vp9_state->golden_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + if (vp9_state->frame_width == vp9_priv_surface->frame_width && + vp9_state->frame_height == vp9_priv_surface->frame_height) + vp9_state->dys_ref_frame_flag &= ~(VP9_GOLDEN_REF); + } + if ((vp9_state->ref_frame_flag & VP9_ALT_REF) && + vp9_state->alt_ref_obj) { + obj_surface = vp9_state->alt_ref_obj; + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + + if (vp9_state->frame_width == vp9_priv_surface->frame_width && + vp9_state->frame_height == vp9_priv_surface->frame_height) + vp9_state->dys_ref_frame_flag &= ~(VP9_ALT_REF); + } + if (vp9_state->dys_ref_frame_flag) + vp9_state->dys_in_use = 1; + } + + if (vp9_state->hme_supported) { + vp9_state->hme_enabled = 1; + } else { + vp9_state->hme_enabled = 0; + } + + if (vp9_state->b16xme_supported) { + vp9_state->b16xme_enabled = 1; + } else { + vp9_state->b16xme_enabled = 0; + } + + /* disable HME/16xME if the size is too small */ + if (vp9_state->frame_width_4x <= VP9_VME_REF_WIN || + vp9_state->frame_height_4x <= VP9_VME_REF_WIN) { + vp9_state->hme_enabled = 0; + vp9_state->b16xme_enabled = 0; + } + + if (vp9_state->frame_width_16x < VP9_VME_REF_WIN || + vp9_state->frame_height_16x < VP9_VME_REF_WIN) + vp9_state->b16xme_enabled = 0; + + if (pic_param->pic_flags.bits.frame_type == HCP_VP9_KEY_FRAME || + pic_param->pic_flags.bits.intra_only) { + vp9_state->hme_enabled = 0; + vp9_state->b16xme_enabled = 0; + } + + vp9_state->mbenc_keyframe_dist_enabled = 0; + if ((vp9_state->picture_coding_type == KEY_FRAME) && + vp9_state->brc_distortion_buffer_supported) + vp9_state->mbenc_keyframe_dist_enabled = 1; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vme_gpe_kernel_prepare_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct vp9_surface_param surface_param; + struct gen9_vp9_state *vp9_state; + VAEncPictureParameterBufferVP9 *pic_param; + struct object_surface *obj_surface; + struct gen9_surface_vp9 *vp9_surface; + int driver_header_flag = 0; + VAStatus va_status; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = vp9_state->pic_param; + + /* this is to check whether the driver should generate the uncompressed header */ + driver_header_flag = 1; + if (encode_state->packed_header_data_ext && + encode_state->packed_header_data_ext[0] && + pic_param->bit_offset_first_partition_size) { + VAEncPackedHeaderParameterBuffer *param = NULL; + + param = (VAEncPackedHeaderParameterBuffer *)encode_state->packed_header_params_ext[0]->buffer; + + if (param->type == VAEncPackedHeaderRawData) { + char *header_data; + unsigned int length_in_bits; + + header_data = (char *)encode_state->packed_header_data_ext[0]->buffer; + length_in_bits = param->bit_length; + driver_header_flag = 0; + + vp9_state->frame_header.bit_offset_first_partition_size = + pic_param->bit_offset_first_partition_size; + vp9_state->header_length = ALIGN(length_in_bits, 8) >> 3; + vp9_state->alias_insert_data = header_data; + + vp9_state->frame_header.bit_offset_ref_lf_delta = pic_param->bit_offset_ref_lf_delta; + vp9_state->frame_header.bit_offset_mode_lf_delta = pic_param->bit_offset_mode_lf_delta; + vp9_state->frame_header.bit_offset_lf_level = pic_param->bit_offset_lf_level; + vp9_state->frame_header.bit_offset_qindex = pic_param->bit_offset_qindex; + vp9_state->frame_header.bit_offset_segmentation = pic_param->bit_offset_segmentation; + vp9_state->frame_header.bit_size_segmentation = pic_param->bit_size_segmentation; + } + } + + if (driver_header_flag) { + memset(&vp9_state->frame_header, 0, sizeof(vp9_state->frame_header)); + intel_write_uncompressed_header(encode_state, + VAProfileVP9Profile0, + vme_context->frame_header_data, + &vp9_state->header_length, + &vp9_state->frame_header); + vp9_state->alias_insert_data = vme_context->frame_header_data; + } + + va_status = i965_check_alloc_surface_bo(ctx, encode_state->input_yuv_object, + 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = i965_check_alloc_surface_bo(ctx, encode_state->reconstructed_object, + 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + surface_param.frame_width = vp9_state->frame_width; + surface_param.frame_height = vp9_state->frame_height; + va_status = gen9_vp9_init_check_surfaces(ctx, + encode_state->reconstructed_object, + &surface_param); + + { + vp9_surface = (struct gen9_surface_vp9*)encode_state->reconstructed_object; + + vp9_surface->qp_value = pic_param->luma_ac_qindex + pic_param->luma_dc_qindex_delta; + } + if (vp9_state->dys_in_use && + (pic_param->frame_width_src != pic_param->frame_width_dst || + pic_param->frame_height_src != pic_param->frame_height_dst)) { + surface_param.frame_width = pic_param->frame_width_dst; + surface_param.frame_height = pic_param->frame_height_dst; + va_status = gen9_vp9_check_dys_surfaces(ctx, + encode_state->reconstructed_object, + &surface_param); + + if (va_status) + return va_status; + } + + if (vp9_state->dys_ref_frame_flag) { + if ((vp9_state->dys_ref_frame_flag & VP9_LAST_REF) && + vp9_state->last_ref_obj) { + obj_surface = vp9_state->last_ref_obj; + surface_param.frame_width = vp9_state->frame_width; + surface_param.frame_height = vp9_state->frame_height; + va_status = gen9_vp9_check_dys_surfaces(ctx, + obj_surface, + &surface_param); + + if (va_status) + return va_status; + } + if ((vp9_state->dys_ref_frame_flag & VP9_GOLDEN_REF) && + vp9_state->golden_ref_obj) { + obj_surface = vp9_state->golden_ref_obj; + surface_param.frame_width = vp9_state->frame_width; + surface_param.frame_height = vp9_state->frame_height; + va_status = gen9_vp9_check_dys_surfaces(ctx, + obj_surface, + &surface_param); + + if (va_status) + return va_status; + } + if ((vp9_state->dys_ref_frame_flag & VP9_ALT_REF) && + vp9_state->alt_ref_obj) { + obj_surface = vp9_state->alt_ref_obj; + surface_param.frame_width = vp9_state->frame_width; + surface_param.frame_height = vp9_state->frame_height; + va_status = gen9_vp9_check_dys_surfaces(ctx, + obj_surface, + &surface_param); + + if (va_status) + return va_status; + } + } + + if (va_status != VA_STATUS_SUCCESS) + return va_status; + /* check the corresponding ref_frame_flag && dys_ref_frame_flag */ + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vme_gpe_kernel_init_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct vp9_mbenc_context *mbenc_context = &vme_context->mbenc_context; + struct vp9_dys_context *dys_context = &vme_context->dys_context; + struct gpe_dynamic_state_parameter ds_param; + int i; + + /* + * BRC will update MBEnc curbe data buffer, so initialize GPE context for + * MBEnc first + */ + for (i = 0; i < NUM_VP9_MBENC; i++) { + gen8_gpe_context_init(ctx, &mbenc_context->gpe_contexts[i]); + } + + /* + * VP9_MBENC_XXX uses the same dynamic state buffer as they share the same + * curbe_buffer. + */ + ds_param.bo_size = ALIGN(sizeof(vp9_mbenc_curbe_data), 64) + 128 + + ALIGN(sizeof(struct gen8_interface_descriptor_data), 64) * NUM_VP9_MBENC; + mbenc_context->mbenc_bo_dys = dri_bo_alloc(i965->intel.bufmgr, + "mbenc_dys", + ds_param.bo_size, + 0x1000); + mbenc_context->mbenc_bo_size = ds_param.bo_size; + + ds_param.bo = mbenc_context->mbenc_bo_dys; + ds_param.curbe_offset = 0; + ds_param.sampler_offset = ALIGN(sizeof(vp9_mbenc_curbe_data), 64); + for (i = 0; i < NUM_VP9_MBENC; i++) { + ds_param.idrt_offset = ds_param.sampler_offset + 128 + + ALIGN(sizeof(struct gen8_interface_descriptor_data), 64) * i; + + gen8_gpe_context_set_dynamic_buffer(ctx, + &mbenc_context->gpe_contexts[i], + &ds_param); + } + + gen8_gpe_context_init(ctx, &dys_context->gpe_context); + gen9_vp9_dys_set_sampler_state(&dys_context->gpe_context); + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vme_gpe_kernel_final_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct vp9_mbenc_context *mbenc_context = &vme_context->mbenc_context; + + dri_bo_unreference(mbenc_context->mbenc_bo_dys); + mbenc_context->mbenc_bo_dys = NULL; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vme_gpe_kernel_run_vp9(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *vme_context = encoder_context->vme_context; + struct gen9_vp9_state *vp9_state; + int i; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state || !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if (vp9_state->dys_in_use) { + gen9_vp9_run_dys_refframes(ctx, encode_state, encoder_context); + } + + if (vp9_state->brc_enabled && (vp9_state->brc_reset || !vp9_state->brc_inited)) { + gen9_vp9_brc_init_reset_kernel(ctx, encode_state, encoder_context); + } + + if (vp9_state->picture_coding_type == KEY_FRAME) { + for (i = 0; i < 2; i++) + i965_zero_gpe_resource(&vme_context->res_mode_decision[i]); + } + + if (vp9_state->hme_supported) { + gen9_vp9_scaling_kernel(ctx, encode_state, + encoder_context, + 0); + if (vp9_state->b16xme_supported) { + gen9_vp9_scaling_kernel(ctx, encode_state, + encoder_context, + 1); + } + } + + if (vp9_state->picture_coding_type && vp9_state->hme_enabled) { + if (vp9_state->b16xme_enabled) + gen9_vp9_me_kernel(ctx, encode_state, + encoder_context, + 1); + + gen9_vp9_me_kernel(ctx, encode_state, + encoder_context, + 0); + } + + if (vp9_state->brc_enabled) { + if (vp9_state->mbenc_keyframe_dist_enabled) + gen9_vp9_brc_intra_dist_kernel(ctx, + encode_state, + encoder_context); + + gen9_vp9_brc_update_kernel(ctx, encode_state, + encoder_context); + } + + if (vp9_state->picture_coding_type == KEY_FRAME) { + gen9_vp9_mbenc_kernel(ctx, encode_state, + encoder_context, + VP9_MEDIA_STATE_MBENC_I_32x32); + gen9_vp9_mbenc_kernel(ctx, encode_state, + encoder_context, + VP9_MEDIA_STATE_MBENC_I_16x16); + } else { + gen9_vp9_mbenc_kernel(ctx, encode_state, + encoder_context, + VP9_MEDIA_STATE_MBENC_P); + } + + gen9_vp9_mbenc_kernel(ctx, encode_state, + encoder_context, + VP9_MEDIA_STATE_MBENC_TX); + + vp9_state->curr_mode_decision_index ^= 1; + if (vp9_state->brc_enabled) { + vp9_state->brc_inited = 1; + vp9_state->brc_reset = 0; + } + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen9_vme_pipeline_vp9(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + VAStatus va_status; + struct gen9_vp9_state *vp9_state; + + vp9_state = (struct gen9_vp9_state *) encoder_context->enc_priv_state; + + if (!vp9_state) + return VA_STATUS_ERROR_INVALID_CONTEXT; + + va_status = gen9_encode_vp9_check_parameter(ctx, encode_state, encoder_context); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = gen9_vp9_allocate_resources(ctx, encode_state, + encoder_context, + !vp9_state->brc_allocated); + + if (va_status != VA_STATUS_SUCCESS) + return va_status; + vp9_state->brc_allocated = 1; + + va_status = gen9_vme_gpe_kernel_prepare_vp9(ctx, encode_state, encoder_context); + + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = gen9_vme_gpe_kernel_init_vp9(ctx, encode_state, encoder_context); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = gen9_vme_gpe_kernel_run_vp9(ctx, encode_state, encoder_context); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + gen9_vme_gpe_kernel_final_vp9(ctx, encode_state, encoder_context); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vme_brc_context_destroy_vp9(struct vp9_brc_context *brc_context) +{ + int i; + + for (i = 0; i < NUM_VP9_BRC; i++) + gen8_gpe_context_destroy(&brc_context->gpe_contexts[i]); +} + +static void +gen9_vme_scaling_context_destroy_vp9(struct vp9_scaling_context *scaling_context) +{ + int i; + + for (i = 0; i < NUM_VP9_SCALING; i++) + gen8_gpe_context_destroy(&scaling_context->gpe_contexts[i]); +} + +static void +gen9_vme_me_context_destroy_vp9(struct vp9_me_context *me_context) +{ + gen8_gpe_context_destroy(&me_context->gpe_context); +} + +static void +gen9_vme_mbenc_context_destroy_vp9(struct vp9_mbenc_context *mbenc_context) +{ + int i; + + for (i = 0; i < NUM_VP9_MBENC; i++) + gen8_gpe_context_destroy(&mbenc_context->gpe_contexts[i]); + dri_bo_unreference(mbenc_context->mbenc_bo_dys); + mbenc_context->mbenc_bo_size = 0; +} + +static void +gen9_vme_dys_context_destroy_vp9(struct vp9_dys_context *dys_context) +{ + gen8_gpe_context_destroy(&dys_context->gpe_context); +} + +static void +gen9_vme_kernel_context_destroy_vp9(struct gen9_encoder_context_vp9 *vme_context) +{ + gen9_vp9_free_resources(vme_context); + gen9_vme_scaling_context_destroy_vp9(&vme_context->scaling_context); + gen9_vme_me_context_destroy_vp9(&vme_context->me_context); + gen9_vme_mbenc_context_destroy_vp9(&vme_context->mbenc_context); + gen9_vme_brc_context_destroy_vp9(&vme_context->brc_context); + gen9_vme_dys_context_destroy_vp9(&vme_context->dys_context); + + return; +} + +static void +gen9_vme_context_destroy_vp9(void *context) +{ + struct gen9_encoder_context_vp9 *vme_context = context; + + if (!vme_context) + return; + + gen9_vme_kernel_context_destroy_vp9(vme_context); + + free(vme_context); + + return; +} + +static void +gen9_vme_scaling_context_init_vp9(VADriverContextP ctx, + struct gen9_encoder_context_vp9 *vme_context, + struct vp9_scaling_context *scaling_context) +{ + struct i965_gpe_context *gpe_context = NULL; + struct vp9_encoder_kernel_parameter kernel_param; + struct vp9_encoder_scoreboard_parameter scoreboard_param; + struct i965_kernel scale_kernel; + + kernel_param.curbe_size = sizeof(vp9_scaling4x_curbe_data_cm); + kernel_param.inline_data_size = sizeof(vp9_scaling4x_inline_data_cm); + kernel_param.sampler_size = 0; + + memset(&scoreboard_param, 0, sizeof(scoreboard_param)); + scoreboard_param.mask = 0xFF; + scoreboard_param.enable = vme_context->use_hw_scoreboard; + scoreboard_param.type = vme_context->use_hw_non_stalling_scoreboard; + scoreboard_param.walkpat_flag = 0; + + gpe_context = &scaling_context->gpe_contexts[0]; + gen9_init_gpe_context_vp9(gpe_context, &kernel_param); + gen9_init_vfe_scoreboard_vp9(gpe_context, &scoreboard_param); + + scaling_context->scaling_4x_bti.scaling_frame_src_y = VP9_BTI_SCALING_FRAME_SRC_Y; + scaling_context->scaling_4x_bti.scaling_frame_dst_y = VP9_BTI_SCALING_FRAME_DST_Y; + scaling_context->scaling_4x_bti.scaling_frame_mbv_proc_stat_dst = + VP9_BTI_SCALING_FRAME_MBVPROCSTATS_DST_CM; + + memset(&scale_kernel, 0, sizeof(scale_kernel)); + + intel_vp9_get_kernel_header_and_size((void *)media_vp9_kernels, + sizeof(media_vp9_kernels), + INTEL_VP9_ENC_SCALING4X, + 0, + &scale_kernel); + + gen8_gpe_load_kernels(ctx, + gpe_context, + &scale_kernel, + 1); + + kernel_param.curbe_size = sizeof(vp9_scaling2x_curbe_data_cm); + kernel_param.inline_data_size = 0; + kernel_param.sampler_size = 0; + + gpe_context = &scaling_context->gpe_contexts[1]; + gen9_init_gpe_context_vp9(gpe_context, &kernel_param); + gen9_init_vfe_scoreboard_vp9(gpe_context, &scoreboard_param); + + memset(&scale_kernel, 0, sizeof(scale_kernel)); + + intel_vp9_get_kernel_header_and_size((void *)media_vp9_kernels, + sizeof(media_vp9_kernels), + INTEL_VP9_ENC_SCALING2X, + 0, + &scale_kernel); + + gen8_gpe_load_kernels(ctx, + gpe_context, + &scale_kernel, + 1); + + scaling_context->scaling_2x_bti.scaling_frame_src_y = VP9_BTI_SCALING_FRAME_SRC_Y; + scaling_context->scaling_2x_bti.scaling_frame_dst_y = VP9_BTI_SCALING_FRAME_DST_Y; + return; +} + +static void +gen9_vme_me_context_init_vp9(VADriverContextP ctx, + struct gen9_encoder_context_vp9 *vme_context, + struct vp9_me_context *me_context) +{ + struct i965_gpe_context *gpe_context = NULL; + struct vp9_encoder_kernel_parameter kernel_param; + struct vp9_encoder_scoreboard_parameter scoreboard_param; + struct i965_kernel scale_kernel; + + kernel_param.curbe_size = sizeof(vp9_me_curbe_data); + kernel_param.inline_data_size = 0; + kernel_param.sampler_size = 0; + + memset(&scoreboard_param, 0, sizeof(scoreboard_param)); + scoreboard_param.mask = 0xFF; + scoreboard_param.enable = vme_context->use_hw_scoreboard; + scoreboard_param.type = vme_context->use_hw_non_stalling_scoreboard; + scoreboard_param.walkpat_flag = 0; + + gpe_context = &me_context->gpe_context; + gen9_init_gpe_context_vp9(gpe_context, &kernel_param); + gen9_init_vfe_scoreboard_vp9(gpe_context, &scoreboard_param); + + memset(&scale_kernel, 0, sizeof(scale_kernel)); + + intel_vp9_get_kernel_header_and_size((void *)media_vp9_kernels, + sizeof(media_vp9_kernels), + INTEL_VP9_ENC_ME, + 0, + &scale_kernel); + + gen8_gpe_load_kernels(ctx, + gpe_context, + &scale_kernel, + 1); + + return; +} + +static void +gen9_vme_mbenc_context_init_vp9(VADriverContextP ctx, + struct gen9_encoder_context_vp9 *vme_context, + struct vp9_mbenc_context *mbenc_context) +{ + struct i965_gpe_context *gpe_context = NULL; + struct vp9_encoder_kernel_parameter kernel_param; + struct vp9_encoder_scoreboard_parameter scoreboard_param; + int i; + struct i965_kernel scale_kernel; + + kernel_param.curbe_size = sizeof(vp9_mbenc_curbe_data); + kernel_param.inline_data_size = 0; + kernel_param.sampler_size = 0; + + memset(&scoreboard_param, 0, sizeof(scoreboard_param)); + scoreboard_param.mask = 0xFF; + scoreboard_param.enable = vme_context->use_hw_scoreboard; + scoreboard_param.type = vme_context->use_hw_non_stalling_scoreboard; + + for (i = 0; i < NUM_VP9_MBENC; i++) { + gpe_context = &mbenc_context->gpe_contexts[i]; + + if ((i == VP9_MBENC_IDX_KEY_16x16) || + (i == VP9_MBENC_IDX_INTER)) { + scoreboard_param.walkpat_flag = 1; + } else + scoreboard_param.walkpat_flag = 0; + + gen9_init_gpe_context_vp9(gpe_context, &kernel_param); + gen9_init_vfe_scoreboard_vp9(gpe_context, &scoreboard_param); + + memset(&scale_kernel, 0, sizeof(scale_kernel)); + + intel_vp9_get_kernel_header_and_size((void *)media_vp9_kernels, + sizeof(media_vp9_kernels), + INTEL_VP9_ENC_MBENC, + i, + &scale_kernel); + + gen8_gpe_load_kernels(ctx, + gpe_context, + &scale_kernel, + 1); + } +} + +static void +gen9_vme_brc_context_init_vp9(VADriverContextP ctx, + struct gen9_encoder_context_vp9 *vme_context, + struct vp9_brc_context *brc_context) +{ + struct i965_gpe_context *gpe_context = NULL; + struct vp9_encoder_kernel_parameter kernel_param; + struct vp9_encoder_scoreboard_parameter scoreboard_param; + int i; + struct i965_kernel scale_kernel; + + kernel_param.curbe_size = sizeof(vp9_brc_curbe_data); + kernel_param.inline_data_size = 0; + kernel_param.sampler_size = 0; + + memset(&scoreboard_param, 0, sizeof(scoreboard_param)); + scoreboard_param.mask = 0xFF; + scoreboard_param.enable = vme_context->use_hw_scoreboard; + scoreboard_param.type = vme_context->use_hw_non_stalling_scoreboard; + + for (i = 0; i < NUM_VP9_BRC; i++) { + gpe_context = &brc_context->gpe_contexts[i]; + gen9_init_gpe_context_vp9(gpe_context, &kernel_param); + gen9_init_vfe_scoreboard_vp9(gpe_context, &scoreboard_param); + + memset(&scale_kernel, 0, sizeof(scale_kernel)); + + intel_vp9_get_kernel_header_and_size((void *)media_vp9_kernels, + sizeof(media_vp9_kernels), + INTEL_VP9_ENC_BRC, + i, + &scale_kernel); + + gen8_gpe_load_kernels(ctx, + gpe_context, + &scale_kernel, + 1); + } +} + +static void +gen9_vme_dys_context_init_vp9(VADriverContextP ctx, + struct gen9_encoder_context_vp9 *vme_context, + struct vp9_dys_context *dys_context) +{ + struct i965_gpe_context *gpe_context = NULL; + struct vp9_encoder_kernel_parameter kernel_param; + struct vp9_encoder_scoreboard_parameter scoreboard_param; + struct i965_kernel scale_kernel; + + kernel_param.curbe_size = sizeof(vp9_dys_curbe_data); + kernel_param.inline_data_size = 0; + kernel_param.sampler_size = sizeof(struct gen9_sampler_8x8_avs); + + memset(&scoreboard_param, 0, sizeof(scoreboard_param)); + scoreboard_param.mask = 0xFF; + scoreboard_param.enable = vme_context->use_hw_scoreboard; + scoreboard_param.type = vme_context->use_hw_non_stalling_scoreboard; + scoreboard_param.walkpat_flag = 0; + + gpe_context = &dys_context->gpe_context; + gen9_init_gpe_context_vp9(gpe_context, &kernel_param); + gen9_init_vfe_scoreboard_vp9(gpe_context, &scoreboard_param); + + memset(&scale_kernel, 0, sizeof(scale_kernel)); + + intel_vp9_get_kernel_header_and_size((void *)media_vp9_kernels, + sizeof(media_vp9_kernels), + INTEL_VP9_ENC_DYS, + 0, + &scale_kernel); + + gen8_gpe_load_kernels(ctx, + gpe_context, + &scale_kernel, + 1); + + return; +} + +static Bool +gen9_vme_kernels_context_init_vp9(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct gen9_encoder_context_vp9 *vme_context) +{ + gen9_vme_scaling_context_init_vp9(ctx, vme_context, &vme_context->scaling_context); + gen9_vme_me_context_init_vp9(ctx, vme_context, &vme_context->me_context); + gen9_vme_mbenc_context_init_vp9(ctx, vme_context, &vme_context->mbenc_context); + gen9_vme_dys_context_init_vp9(ctx, vme_context, &vme_context->dys_context); + gen9_vme_brc_context_init_vp9(ctx, vme_context, &vme_context->brc_context); + + vme_context->pfn_set_curbe_brc = gen9_vp9_set_curbe_brc; + vme_context->pfn_set_curbe_me = gen9_vp9_set_curbe_me; + vme_context->pfn_send_me_surface = gen9_vp9_send_me_surface; + vme_context->pfn_send_scaling_surface = gen9_vp9_send_scaling_surface; + + vme_context->pfn_set_curbe_scaling = gen9_vp9_set_curbe_scaling_cm; + + vme_context->pfn_send_dys_surface = gen9_vp9_send_dys_surface; + vme_context->pfn_set_curbe_dys = gen9_vp9_set_curbe_dys; + vme_context->pfn_set_curbe_mbenc = gen9_vp9_set_curbe_mbenc; + vme_context->pfn_send_mbenc_surface = gen9_vp9_send_mbenc_surface; + return true; +} + +static +void gen9_vp9_write_compressed_element(char *buffer, + int index, + int prob, + bool value) +{ + struct vp9_compressed_element *base_element, *vp9_element; + base_element = (struct vp9_compressed_element *)buffer; + + vp9_element = base_element + (index >> 1); + if (index % 2) { + vp9_element->b_valid = 1; + vp9_element->b_probdiff_select = 1; + vp9_element->b_prob_select = (prob == 252) ? 1: 0; + vp9_element->b_bin = value; + } else { + vp9_element->a_valid = 1; + vp9_element->a_probdiff_select = 1; + vp9_element->a_prob_select = (prob == 252) ? 1: 0; + vp9_element->a_bin = value; + } +} + +static void +intel_vp9enc_refresh_frame_internal_buffers(VADriverContextP ctx, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + VAEncPictureParameterBufferVP9 *pic_param; + struct gen9_vp9_state *vp9_state; + char *buffer; + int i; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + if (!pak_context || !vp9_state || !vp9_state->pic_param) + return; + + pic_param = vp9_state->pic_param; + if ((pic_param->pic_flags.bits.frame_type == HCP_VP9_KEY_FRAME) || + (pic_param->pic_flags.bits.intra_only) || + pic_param->pic_flags.bits.error_resilient_mode) { + /* reset current frame_context */ + intel_init_default_vp9_probs(&vp9_state->vp9_current_fc); + if ((pic_param->pic_flags.bits.frame_type == HCP_VP9_KEY_FRAME) || + pic_param->pic_flags.bits.error_resilient_mode || + (pic_param->pic_flags.bits.reset_frame_context == 3)) { + for (i = 0; i < 4; i++) + memcpy(&vp9_state->vp9_frame_ctx[i], + &vp9_state->vp9_current_fc, + sizeof(FRAME_CONTEXT)); + } else if (pic_param->pic_flags.bits.reset_frame_context == 2) { + i = pic_param->pic_flags.bits.frame_context_idx; + memcpy(&vp9_state->vp9_frame_ctx[i], + &vp9_state->vp9_current_fc, sizeof(FRAME_CONTEXT)); + } + /* reset the frame_ctx_idx = 0 */ + vp9_state->frame_ctx_idx = 0; + } else { + vp9_state->frame_ctx_idx = pic_param->pic_flags.bits.frame_context_idx; + } + + i965_zero_gpe_resource(&pak_context->res_compressed_input_buffer); + buffer = i965_map_gpe_resource(&pak_context->res_compressed_input_buffer); + + if (!buffer) + return; + + /* write tx_size */ + if ((pic_param->luma_ac_qindex == 0) && + (pic_param->luma_dc_qindex_delta == 0) && + (pic_param->chroma_ac_qindex_delta == 0) && + (pic_param->chroma_dc_qindex_delta == 0)) { + /* lossless flag */ + /* nothing is needed */ + gen9_vp9_write_compressed_element(buffer, + 0, 128, 0); + gen9_vp9_write_compressed_element(buffer, + 1, 128, 0); + gen9_vp9_write_compressed_element(buffer, + 2, 128, 0); + } else { + if (vp9_state->tx_mode == TX_MODE_SELECT) { + gen9_vp9_write_compressed_element(buffer, + 0, 128, 1); + gen9_vp9_write_compressed_element(buffer, + 1, 128, 1); + gen9_vp9_write_compressed_element(buffer, + 2, 128, 1); + } else if (vp9_state->tx_mode == ALLOW_32X32) { + gen9_vp9_write_compressed_element(buffer, + 0, 128, 1); + gen9_vp9_write_compressed_element(buffer, + 1, 128, 1); + gen9_vp9_write_compressed_element(buffer, + 2, 128, 0); + } else { + unsigned int tx_mode; + + tx_mode = vp9_state->tx_mode; + gen9_vp9_write_compressed_element(buffer, + 0, 128, ((tx_mode) & 2)); + gen9_vp9_write_compressed_element(buffer, + 1, 128, ((tx_mode) & 1)); + gen9_vp9_write_compressed_element(buffer, + 2, 128, 0); + } + + if (vp9_state->tx_mode == TX_MODE_SELECT) { + + gen9_vp9_write_compressed_element(buffer, + 3, 128, 0); + + gen9_vp9_write_compressed_element(buffer, + 7, 128, 0); + + gen9_vp9_write_compressed_element(buffer, + 15, 128, 0); + } + } + /*Setup all the input&output object*/ + + { + /* update the coeff_update flag */ + gen9_vp9_write_compressed_element(buffer, + 27, 128, 0); + gen9_vp9_write_compressed_element(buffer, + 820, 128, 0); + gen9_vp9_write_compressed_element(buffer, + 1613, 128, 0); + gen9_vp9_write_compressed_element(buffer, + 2406, 128, 0); + } + + + if (pic_param->pic_flags.bits.frame_type && !pic_param->pic_flags.bits.intra_only) + { + bool allow_comp = !( + (pic_param->ref_flags.bits.ref_last_sign_bias && pic_param->ref_flags.bits.ref_gf_sign_bias && pic_param->ref_flags.bits.ref_arf_sign_bias) || + (!pic_param->ref_flags.bits.ref_last_sign_bias && !pic_param->ref_flags.bits.ref_gf_sign_bias && !pic_param->ref_flags.bits.ref_arf_sign_bias) + ); + + if (allow_comp) + { + if (pic_param->pic_flags.bits.comp_prediction_mode == REFERENCE_MODE_SELECT) { + gen9_vp9_write_compressed_element(buffer, + 3271, 128, 1); + gen9_vp9_write_compressed_element(buffer, + 3272, 128, 1); + } + else if (pic_param->pic_flags.bits.comp_prediction_mode == COMPOUND_REFERENCE) { + gen9_vp9_write_compressed_element(buffer, + 3271, 128, 1); + gen9_vp9_write_compressed_element(buffer, + 3272, 128, 0); + } + else { + + gen9_vp9_write_compressed_element(buffer, + 3271, 128, 0); + gen9_vp9_write_compressed_element(buffer, + 3272, 128, 0); + } + } + } + + i965_unmap_gpe_resource(&pak_context->res_compressed_input_buffer); +} + + +static void +gen9_pak_vp9_pipe_mode_select(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + struct gen9_hcpe_pipe_mode_select_param *pipe_mode_param) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (6 - 2)); + OUT_BCS_BATCH(batch, + (pipe_mode_param->stream_out << 12) | + (pipe_mode_param->codec_mode << 5) | + (0 << 3) | /* disable Pic Status / Error Report */ + (pipe_mode_param->stream_out << 2) | + HCP_CODEC_SELECT_ENCODE); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, (1 << 6)); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_vp9_add_surface_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + hcp_surface_state *hcp_state) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + if (!hcp_state) + return; + + BEGIN_BCS_BATCH(batch, 3); + OUT_BCS_BATCH(batch, HCP_SURFACE_STATE | (3 - 2)); + OUT_BCS_BATCH(batch, + (hcp_state->dw1.surface_id << 28) | + (hcp_state->dw1.surface_pitch - 1) + ); + OUT_BCS_BATCH(batch, + (hcp_state->dw2.surface_format << 28) | + (hcp_state->dw2.y_cb_offset) + ); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_pak_vp9_pipe_buf_addr_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + struct gen9_vp9_state *vp9_state; + unsigned int i; + struct object_surface *obj_surface; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + if (!vp9_state || !vp9_state->pic_param) + return; + + + BEGIN_BCS_BATCH(batch, 104); + + OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (104 - 2)); + + obj_surface = encode_state->reconstructed_object; + + /* reconstructed obj_surface is already checked. So this is skipped */ + /* DW 1..3 decoded surface */ + OUT_RELOC64(batch, + obj_surface->bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 4..6 deblocking line */ + OUT_RELOC64(batch, + pak_context->res_deblocking_filter_line_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 7..9 deblocking tile line */ + OUT_RELOC64(batch, + pak_context->res_deblocking_filter_tile_line_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 10..12 deblocking tile col */ + OUT_RELOC64(batch, + pak_context->res_deblocking_filter_tile_col_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 13..15 metadata line */ + OUT_RELOC64(batch, + pak_context->res_metadata_line_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 16..18 metadata tile line */ + OUT_RELOC64(batch, + pak_context->res_metadata_tile_line_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 19..21 metadata tile col */ + OUT_RELOC64(batch, + pak_context->res_metadata_tile_col_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 22..30 SAO is not used for VP9 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 31..33 Current Motion vector temporal buffer */ + OUT_RELOC64(batch, + pak_context->res_mv_temporal_buffer[vp9_state->curr_mv_temporal_index].bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 34..36 Not used */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* Only the first three reference_frame is used for VP9 */ + /* DW 37..52 for reference_frame */ + i = 0; + if (vp9_state->picture_coding_type) { + for (i = 0; i < 3; i++) { + + if (pak_context->reference_surfaces[i].bo) { + OUT_RELOC64(batch, + pak_context->reference_surfaces[i].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + } + } + + for (; i < 8; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + OUT_BCS_BATCH(batch, 0); + + /* DW 54..56 for source input */ + OUT_RELOC64(batch, + pak_context->uncompressed_picture_source.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 57..59 StreamOut is not used */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 60..62. Not used for encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 63..65. ILDB Not used for encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 66..81 For the collocated motion vector temporal buffer */ + if (vp9_state->picture_coding_type) { + int prev_index = vp9_state->curr_mv_temporal_index ^ 0x01; + OUT_RELOC64(batch, + pak_context->res_mv_temporal_buffer[prev_index].bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + + for (i = 1; i < 8; i++) { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + OUT_BCS_BATCH(batch, 0); + + /* DW 83..85 VP9 prob buffer */ + OUT_RELOC64(batch, + pak_context->res_prob_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + + OUT_BCS_BATCH(batch, 0); + + /* DW 86..88 Segment id buffer */ + if (pak_context->res_segmentid_buffer.bo) { + OUT_RELOC64(batch, + pak_context->res_segmentid_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + } else { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + OUT_BCS_BATCH(batch, 0); + + /* DW 89..91 HVD line rowstore buffer */ + OUT_RELOC64(batch, + pak_context->res_hvd_line_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 92..94 HVD tile line rowstore buffer */ + OUT_RELOC64(batch, + pak_context->res_hvd_tile_line_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 95..97 SAO streamout. Not used for VP9 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* reserved for KBL. 98..100 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* 101..103 */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_pak_vp9_ind_obj_base_addr_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + struct gen9_vp9_state *vp9_state; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + /* to do */ + BEGIN_BCS_BATCH(batch, 29); + + OUT_BCS_BATCH(batch, HCP_IND_OBJ_BASE_ADDR_STATE | (29 - 2)); + + /* indirect bitstream object base */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + /* the upper bound of indirect bitstream object */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 6: Indirect CU object base address */ + OUT_RELOC64(batch, + pak_context->res_mb_code_surface.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, /* No write domain */ + vp9_state->mb_data_offset); + /* default attribute */ + OUT_BCS_BATCH(batch, 0); + + /* DW 9..11, PAK-BSE */ + OUT_RELOC64(batch, + pak_context->indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + pak_context->indirect_pak_bse_object.offset); + OUT_BCS_BATCH(batch, 0); + + /* DW 12..13 upper bound */ + OUT_RELOC64(batch, + pak_context->indirect_pak_bse_object.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + pak_context->indirect_pak_bse_object.end_offset); + + /* DW 14..16 compressed header buffer */ + OUT_RELOC64(batch, + pak_context->res_compressed_input_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 17..19 prob counter streamout */ + OUT_RELOC64(batch, + pak_context->res_prob_counter_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 20..22 prob delta streamin */ + OUT_RELOC64(batch, + pak_context->res_prob_delta_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 23..25 Tile record streamout */ + OUT_RELOC64(batch, + pak_context->res_tile_record_streamout_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 26..28 CU record streamout */ + OUT_RELOC64(batch, + pak_context->res_cu_stat_streamout_buffer.bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BCS_BATCH(batch, 0); + + ADVANCE_BCS_BATCH(batch); +} + +static void +gen9_pak_vp9_segment_state(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context, + VAEncSegParamVP9 *seg_param, uint8_t seg_id) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + uint32_t batch_value, tmp; + VAEncPictureParameterBufferVP9 *pic_param; + + if (!encode_state->pic_param_ext || + !encode_state->pic_param_ext->buffer) { + return; + } + + pic_param = (VAEncPictureParameterBufferVP9 *)encode_state->pic_param_ext->buffer; + + batch_value = seg_param->seg_flags.bits.segment_reference; + if (pic_param->pic_flags.bits.frame_type == HCP_VP9_KEY_FRAME || + pic_param->pic_flags.bits.intra_only) + batch_value = 0; + + BEGIN_BCS_BATCH(batch, 8); + + OUT_BCS_BATCH(batch, HCP_VP9_SEGMENT_STATE | (8 - 2)); + OUT_BCS_BATCH(batch, seg_id << 0); /* DW 1 - SegmentID */ + OUT_BCS_BATCH(batch, + (seg_param->seg_flags.bits.segment_reference_enabled << 3) | + (batch_value << 1) | + (seg_param->seg_flags.bits.segment_reference_skipped <<0) + ); + + /* DW 3..6 is not used for encoder */ + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + + /* DW 7 Mode */ + tmp = intel_convert_sign_mag(seg_param->segment_qindex_delta, 9); + batch_value = tmp; + tmp = intel_convert_sign_mag(seg_param->segment_lf_level_delta, 7); + batch_value |= (tmp << 16); + OUT_BCS_BATCH(batch, batch_value); + + ADVANCE_BCS_BATCH(batch); + +} + +static void +intel_vp9enc_construct_pak_insertobj_batchbuffer(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_gpe_resource *obj_batch_buffer) +{ + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + struct gen9_vp9_state *vp9_state; + int uncompressed_header_length; + unsigned int *cmd_ptr; + unsigned int dw_length, bits_in_last_dw; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + if (!pak_context || !vp9_state || !vp9_state->pic_param) + return; + + uncompressed_header_length = vp9_state->header_length; + cmd_ptr = i965_map_gpe_resource(obj_batch_buffer); + + if (!cmd_ptr) + return; + + bits_in_last_dw = uncompressed_header_length % 4; + bits_in_last_dw *= 8; + + if (bits_in_last_dw == 0) + bits_in_last_dw = 32; + + /* get the DWORD length of the inserted_data */ + dw_length = ALIGN(uncompressed_header_length, 4) / 4; + *cmd_ptr++ = HCP_INSERT_PAK_OBJECT | dw_length; + + *cmd_ptr++ = ((0 << 31) | /* indirect payload */ + (0 << 16) | /* the start offset in first DW */ + (0 << 15) | + (bits_in_last_dw << 8) | /* bits_in_last_dw */ + (0 << 4) | /* skip emulation byte count. 0 for VP9 */ + (0 << 3) | /* emulation flag. 0 for VP9 */ + (1 << 2) | /* last header flag. */ + (0 << 1)); + memcpy(cmd_ptr, vp9_state->alias_insert_data, dw_length * sizeof(unsigned int)); + + cmd_ptr += dw_length; + + *cmd_ptr++ = MI_NOOP; + *cmd_ptr++ = MI_BATCH_BUFFER_END; + i965_unmap_gpe_resource(obj_batch_buffer); +} + +static void +gen9_vp9_pak_picture_level(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + VAEncPictureParameterBufferVP9 *pic_param; + VAEncMiscParameterTypeVP9PerSegmantParam *seg_param, tmp_seg_param; + struct gen9_vp9_state *vp9_state; + struct gen9_surface_vp9 *vp9_priv_surface; + int i; + struct gen9_hcpe_pipe_mode_select_param mode_param; + hcp_surface_state hcp_surface; + struct gpe_mi_batch_buffer_start_parameter second_level_batch; + int segment_count; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + if (!pak_context || !vp9_state || !vp9_state->pic_param) + return; + + pic_param = vp9_state->pic_param; + seg_param = vp9_state->segment_param; + + if (vp9_state->curr_pak_pass == 0) + { + intel_vp9enc_construct_pak_insertobj_batchbuffer(ctx, encoder_context, + &pak_context->res_pak_uncompressed_input_buffer); + + // Check if driver already programmed pic state as part of BRC update kernel programming. + if (!vp9_state->brc_enabled) + { + intel_vp9enc_construct_picstate_batchbuf(ctx, encode_state, + encoder_context, &pak_context->res_pic_state_brc_write_hfw_read_buffer); + } + } + + if (vp9_state->curr_pak_pass == 0) + { + intel_vp9enc_refresh_frame_internal_buffers(ctx, encoder_context); + } + + { + /* copy the frame_context[frame_idx] into curr_frame_context */ + memcpy(&vp9_state->vp9_current_fc, + &(vp9_state->vp9_frame_ctx[vp9_state->frame_ctx_idx]), + sizeof(FRAME_CONTEXT)); + { + uint8_t *prob_ptr; + + prob_ptr = i965_map_gpe_resource(&pak_context->res_prob_buffer); + + if (!prob_ptr) + return; + + /* copy the current fc to vp9_prob buffer */ + memcpy(prob_ptr, &vp9_state->vp9_current_fc, sizeof(FRAME_CONTEXT)); + if ((pic_param->pic_flags.bits.frame_type == HCP_VP9_KEY_FRAME) || + pic_param->pic_flags.bits.intra_only) { + FRAME_CONTEXT *frame_ptr = (FRAME_CONTEXT *)prob_ptr; + + memcpy(frame_ptr->partition_prob, vp9_kf_partition_probs, + sizeof(vp9_kf_partition_probs)); + memcpy(frame_ptr->uv_mode_prob, vp9_kf_uv_mode_prob, + sizeof(vp9_kf_uv_mode_prob)); + } + i965_unmap_gpe_resource(&pak_context->res_prob_buffer); + } + } + + if (vp9_state->brc_enabled && vp9_state->curr_pak_pass) { + /* read image status and insert the conditional end cmd */ + /* image ctrl/status is already accessed */ + struct gpe_mi_conditional_batch_buffer_end_parameter mi_cond_end; + struct vp9_encode_status_buffer_internal *status_buffer; + + status_buffer = &vp9_state->status_buffer; + memset(&mi_cond_end, 0, sizeof(mi_cond_end)); + mi_cond_end.offset = status_buffer->image_status_mask_offset; + mi_cond_end.bo = status_buffer->bo; + mi_cond_end.compare_data = 0; + mi_cond_end.compare_mask_mode_disabled = 1; + gen9_gpe_mi_conditional_batch_buffer_end(ctx, batch, + &mi_cond_end); + } + + mode_param.codec_mode = 1; + mode_param.stream_out = 0; + gen9_pak_vp9_pipe_mode_select(ctx, encode_state, encoder_context, &mode_param); + + /* reconstructed surface */ + memset(&hcp_surface, 0, sizeof(hcp_surface)); + obj_surface = encode_state->reconstructed_object; + hcp_surface.dw1.surface_id = 0; + hcp_surface.dw1.surface_pitch = obj_surface->width; + hcp_surface.dw2.surface_format = SURFACE_FORMAT_PLANAR_420_8; + hcp_surface.dw2.y_cb_offset = obj_surface->y_cb_offset; + gen9_vp9_add_surface_state(ctx, encode_state, encoder_context, + &hcp_surface); + + /* Input surface */ + if (vp9_state->dys_in_use && + ((pic_param->frame_width_src != pic_param->frame_width_dst) || + (pic_param->frame_height_src != pic_param->frame_height_dst))) { + vp9_priv_surface = (struct gen9_surface_vp9 *)(obj_surface->private_data); + obj_surface = vp9_priv_surface->dys_surface_obj; + } else { + obj_surface = encode_state->input_yuv_object; + } + + hcp_surface.dw1.surface_id = 1; + hcp_surface.dw1.surface_pitch = obj_surface->width; + hcp_surface.dw2.surface_format = SURFACE_FORMAT_PLANAR_420_8; + hcp_surface.dw2.y_cb_offset = obj_surface->y_cb_offset; + gen9_vp9_add_surface_state(ctx, encode_state, encoder_context, + &hcp_surface); + + if (vp9_state->picture_coding_type) { + /* Add surface for last */ + if (vp9_state->last_ref_obj) { + obj_surface = vp9_state->last_ref_obj; + hcp_surface.dw1.surface_id = 2; + hcp_surface.dw1.surface_pitch = obj_surface->width; + hcp_surface.dw2.surface_format = SURFACE_FORMAT_PLANAR_420_8; + hcp_surface.dw2.y_cb_offset = obj_surface->y_cb_offset; + gen9_vp9_add_surface_state(ctx, encode_state, encoder_context, + &hcp_surface); + } + if (vp9_state->golden_ref_obj) { + obj_surface = vp9_state->golden_ref_obj; + hcp_surface.dw1.surface_id = 3; + hcp_surface.dw1.surface_pitch = obj_surface->width; + hcp_surface.dw2.surface_format = SURFACE_FORMAT_PLANAR_420_8; + hcp_surface.dw2.y_cb_offset = obj_surface->y_cb_offset; + gen9_vp9_add_surface_state(ctx, encode_state, encoder_context, + &hcp_surface); + } + if (vp9_state->alt_ref_obj) { + obj_surface = vp9_state->alt_ref_obj; + hcp_surface.dw1.surface_id = 4; + hcp_surface.dw1.surface_pitch = obj_surface->width; + hcp_surface.dw2.surface_format = SURFACE_FORMAT_PLANAR_420_8; + hcp_surface.dw2.y_cb_offset = obj_surface->y_cb_offset; + gen9_vp9_add_surface_state(ctx, encode_state, encoder_context, + &hcp_surface); + } + } + + gen9_pak_vp9_pipe_buf_addr_state(ctx, encode_state, encoder_context); + + gen9_pak_vp9_ind_obj_base_addr_state(ctx, encode_state, encoder_context); + + // Using picstate zero with updated QP and LF deltas by HuC for repak, irrespective of how many Pak passes were run in multi-pass mode. + memset(&second_level_batch, 0, sizeof(second_level_batch)); + + if (vp9_state->curr_pak_pass == 0) { + second_level_batch.offset = 0; + } else + second_level_batch.offset = vp9_state->curr_pak_pass * VP9_PIC_STATE_BUFFER_SIZE; + + second_level_batch.is_second_level = 1; + second_level_batch.bo = pak_context->res_pic_state_brc_write_hfw_read_buffer.bo; + + gen9_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch); + + if (pic_param->pic_flags.bits.segmentation_enabled && + seg_param) + segment_count = 8; + else { + segment_count = 1; + memset(&tmp_seg_param, 0, sizeof(tmp_seg_param)); + seg_param = &tmp_seg_param; + } + for (i = 0; i < segment_count; i++) + { + gen9_pak_vp9_segment_state(ctx, encode_state, + encoder_context, + &seg_param->seg_data[i], i); + } + + /* Insert the uncompressed header buffer */ + second_level_batch.is_second_level = 1; + second_level_batch.offset = 0; + second_level_batch.bo = pak_context->res_pak_uncompressed_input_buffer.bo; + + gen9_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch); + + /* PAK_OBJECT */ + second_level_batch.is_second_level = 1; + second_level_batch.offset = 0; + second_level_batch.bo = pak_context->res_mb_code_surface.bo; + gen9_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch); + + return; +} + +static void +gen9_vp9_read_mfc_status(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + struct gpe_mi_store_register_mem_parameter mi_store_reg_mem_param; + struct gpe_mi_flush_dw_parameter mi_flush_dw_param; + //struct gpe_mi_copy_mem_parameter mi_copy_mem_param; + struct vp9_encode_status_buffer_internal *status_buffer; + struct gen9_vp9_state *vp9_state; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + if (!vp9_state || !pak_context || !batch) + return; + + status_buffer = &(vp9_state->status_buffer); + + memset(&mi_flush_dw_param, 0, sizeof(mi_flush_dw_param)); + gen9_gpe_mi_flush_dw(ctx, batch, &mi_flush_dw_param); + + memset(&mi_store_reg_mem_param, 0, sizeof(mi_store_reg_mem_param)); + mi_store_reg_mem_param.bo = status_buffer->bo; + mi_store_reg_mem_param.offset = status_buffer->bs_byte_count_offset; + mi_store_reg_mem_param.mmio_offset = status_buffer->vp9_bs_frame_reg_offset; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_reg_mem_param); + + mi_store_reg_mem_param.bo = pak_context->res_brc_bitstream_size_buffer.bo; + mi_store_reg_mem_param.offset = 0; + mi_store_reg_mem_param.mmio_offset = status_buffer->vp9_bs_frame_reg_offset; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_reg_mem_param); + + /* Read HCP Image status */ + mi_store_reg_mem_param.bo = status_buffer->bo; + mi_store_reg_mem_param.offset = status_buffer->image_status_mask_offset; + mi_store_reg_mem_param.mmio_offset = + status_buffer->vp9_image_mask_reg_offset; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_reg_mem_param); + + mi_store_reg_mem_param.bo = status_buffer->bo; + mi_store_reg_mem_param.offset = status_buffer->image_status_ctrl_offset; + mi_store_reg_mem_param.mmio_offset = + status_buffer->vp9_image_ctrl_reg_offset; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_reg_mem_param); + + mi_store_reg_mem_param.bo = pak_context->res_brc_bitstream_size_buffer.bo; + mi_store_reg_mem_param.offset = 4; + mi_store_reg_mem_param.mmio_offset = + status_buffer->vp9_image_ctrl_reg_offset; + gen9_gpe_mi_store_register_mem(ctx, batch, &mi_store_reg_mem_param); + + gen9_gpe_mi_flush_dw(ctx, batch, &mi_flush_dw_param); + + return; +} + +static VAStatus +gen9_vp9_pak_pipeline_prepare(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + struct i965_coded_buffer_segment *coded_buffer_segment; + VAEncPictureParameterBufferVP9 *pic_param; + struct gen9_vp9_state *vp9_state; + dri_bo *bo; + int i; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + if (!vp9_state || + !vp9_state->pic_param) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = vp9_state->pic_param; + + /* reconstructed surface */ + obj_surface = encode_state->reconstructed_object; + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + pak_context->reconstructed_object.bo = obj_surface->bo; + dri_bo_reference(pak_context->reconstructed_object.bo); + + /* set vp9 reference frames */ + for (i = 0; i < ARRAY_ELEMS(pak_context->reference_surfaces); i++) { + if (pak_context->reference_surfaces[i].bo) + dri_bo_unreference(pak_context->reference_surfaces[i].bo); + pak_context->reference_surfaces[i].bo = NULL; + } + + /* Three reference frames are enough for VP9 */ + if (pic_param->pic_flags.bits.frame_type && + !pic_param->pic_flags.bits.intra_only) { + for (i = 0; i < 3; i++) { + obj_surface = encode_state->reference_objects[i]; + if (obj_surface && obj_surface->bo) { + pak_context->reference_surfaces[i].bo = obj_surface->bo; + dri_bo_reference(obj_surface->bo); + } + } + } + + /* input YUV surface */ + dri_bo_unreference(pak_context->uncompressed_picture_source.bo); + pak_context->uncompressed_picture_source.bo = NULL; + obj_surface = encode_state->reconstructed_object; + if (vp9_state->dys_in_use && + ((pic_param->frame_width_src != pic_param->frame_width_dst) || + (pic_param->frame_height_src != pic_param->frame_height_dst))) { + struct gen9_surface_vp9 *vp9_priv_surface = + (struct gen9_surface_vp9 *)(obj_surface->private_data); + obj_surface = vp9_priv_surface->dys_surface_obj; + } else + obj_surface = encode_state->input_yuv_object; + + pak_context->uncompressed_picture_source.bo = obj_surface->bo; + dri_bo_reference(pak_context->uncompressed_picture_source.bo); + + /* coded buffer */ + dri_bo_unreference(pak_context->indirect_pak_bse_object.bo); + pak_context->indirect_pak_bse_object.bo = NULL; + obj_buffer = encode_state->coded_buf_object; + bo = obj_buffer->buffer_store->bo; + pak_context->indirect_pak_bse_object.offset = I965_CODEDBUFFER_HEADER_SIZE; + pak_context->indirect_pak_bse_object.end_offset = ALIGN((obj_buffer->size_element - 0x1000), 0x1000); + pak_context->indirect_pak_bse_object.bo = bo; + dri_bo_reference(pak_context->indirect_pak_bse_object.bo); + + /* set the internal flag to 0 to indicate the coded size is unknown */ + dri_bo_map(bo, 1); + coded_buffer_segment = (struct i965_coded_buffer_segment *)bo->virtual; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = encoder_context->codec; + dri_bo_unmap(bo); + + return VA_STATUS_SUCCESS; +} + +static void +gen9_vp9_pak_brc_prepare(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + struct gen9_vp9_state *vp9_state; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + if (!vp9_state || !pak_context) + return; + + if (vp9_state->brc_enabled) { + /* check the buffer related with BRC */ + vp9_state->brc_flag_check = 0; + if (encode_state->seq_param_ext && encode_state->seq_param_ext->buffer) { + vp9_state->brc_flag_check |= VP9_BRC_SEQ; + } + + /* Frame_rate */ + if (encode_state->misc_param[VAEncMiscParameterTypeFrameRate] && + encode_state->misc_param[VAEncMiscParameterTypeFrameRate]->buffer) { + vp9_state->brc_flag_check |= VP9_BRC_FR; + } + + /* HRD */ + if (encode_state->misc_param[VAEncMiscParameterTypeRateControl] && + encode_state->misc_param[VAEncMiscParameterTypeRateControl]->buffer) { + vp9_state->brc_flag_check |= VP9_BRC_RC; + } + + if (encode_state->misc_param[VAEncMiscParameterTypeHRD] && + encode_state->misc_param[VAEncMiscParameterTypeHRD]->buffer) { + vp9_state->brc_flag_check |= VP9_BRC_HRD; + } + + /* + * If user-app doesn't pass the buffer related with BRC for the first + * frame, the error flag is returned. + */ + if (vp9_state->brc_flag_check == 0 && vp9_state->first_frame) { + vp9_state->brc_flag_check |= VP9_BRC_FAILURE; + } + } + return; +} + +static void +gen9_vp9_pak_context_destroy(void *context) +{ + struct gen9_encoder_context_vp9 *pak_context = context; + int i; + + dri_bo_unreference(pak_context->reconstructed_object.bo); + pak_context->reconstructed_object.bo = NULL; + + dri_bo_unreference(pak_context->uncompressed_picture_source.bo); + pak_context->uncompressed_picture_source.bo = NULL; + + dri_bo_unreference(pak_context->indirect_pak_bse_object.bo); + pak_context->indirect_pak_bse_object.bo = NULL; + + for (i = 0; i < 8; i++){ + dri_bo_unreference(pak_context->reference_surfaces[i].bo); + pak_context->reference_surfaces[i].bo = NULL; + } + + /* vme & pak same the same structure, so don't free the context here */ +} + +static VAStatus +gen9_vp9_pak_pipeline(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = encoder_context->base.batch; + struct gen9_encoder_context_vp9 *pak_context = encoder_context->mfc_context; + VAStatus va_status; + struct gen9_vp9_state *vp9_state; + VAEncPictureParameterBufferVP9 *pic_param; + int i; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + + if (!vp9_state || !vp9_state->pic_param || !pak_context) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + va_status = gen9_vp9_pak_pipeline_prepare(ctx, encode_state, encoder_context); + + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + if (i965->intel.has_bsd2) + intel_batchbuffer_start_atomic_bcs_override(batch, 0x1000, BSD_RING0); + else + intel_batchbuffer_start_atomic_bcs(batch, 0x1000); + + intel_batchbuffer_emit_mi_flush(batch); + + BEGIN_BCS_BATCH(batch, 64); + for (i = 0; i < 64; i++) + OUT_BCS_BATCH(batch, MI_NOOP); + + ADVANCE_BCS_BATCH(batch); + + for (vp9_state->curr_pak_pass = 0; + vp9_state->curr_pak_pass < vp9_state->num_pak_passes; + vp9_state->curr_pak_pass++) { + + if (vp9_state->curr_pak_pass == 0) { + /* Initialize the VP9 Image Ctrl reg for the first pass */ + struct gpe_mi_load_register_imm_parameter mi_load_reg_imm; + struct vp9_encode_status_buffer_internal *status_buffer; + + status_buffer = &(vp9_state->status_buffer); + memset(&mi_load_reg_imm, 0, sizeof(mi_load_reg_imm)); + mi_load_reg_imm.mmio_offset = status_buffer->vp9_image_ctrl_reg_offset; + mi_load_reg_imm.data = 0; + gen9_gpe_mi_load_register_imm(ctx, batch, &mi_load_reg_imm); + } + gen9_vp9_pak_picture_level(ctx, encode_state, encoder_context); + gen9_vp9_read_mfc_status(ctx, encoder_context); + } + + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + + pic_param = vp9_state->pic_param; + vp9_state->vp9_last_frame.frame_width = pic_param->frame_width_dst; + vp9_state->vp9_last_frame.frame_height = pic_param->frame_height_dst; + vp9_state->vp9_last_frame.frame_type = pic_param->pic_flags.bits.frame_type; + vp9_state->vp9_last_frame.show_frame = pic_param->pic_flags.bits.show_frame; + vp9_state->vp9_last_frame.refresh_frame_context = pic_param->pic_flags.bits.refresh_frame_context; + vp9_state->vp9_last_frame.frame_context_idx = pic_param->pic_flags.bits.frame_context_idx; + vp9_state->vp9_last_frame.intra_only = pic_param->pic_flags.bits.intra_only; + vp9_state->frame_number++; + vp9_state->curr_mv_temporal_index ^= 1; + vp9_state->first_frame = 0; + + return VA_STATUS_SUCCESS; +} + +Bool +gen9_vp9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + struct gen9_encoder_context_vp9 *vme_context = NULL; + struct gen9_vp9_state *vp9_state = NULL; + + vme_context = calloc(1, sizeof(struct gen9_encoder_context_vp9)); + vp9_state = calloc(1, sizeof(struct gen9_vp9_state)); + + if (!vme_context || !vp9_state) { + if (vme_context) + free(vme_context); + if (vp9_state) + free(vp9_state); + return false; + } + + encoder_context->enc_priv_state = vp9_state; + vme_context->enc_priv_state = vp9_state; + + /* Initialize the features that are supported by VP9 */ + vme_context->hme_supported = 1; + vme_context->use_hw_scoreboard = 1; + vme_context->use_hw_non_stalling_scoreboard = 1; + + vp9_state->tx_mode = TX_MODE_SELECT; + vp9_state->multi_ref_qp_check = 0; + vp9_state->target_usage = INTEL_ENC_VP9_TU_NORMAL; + vp9_state->num_pak_passes = 1; + vp9_state->hme_supported = vme_context->hme_supported; + vp9_state->b16xme_supported = 1; + + if (encoder_context->rate_control_mode != VA_RC_NONE && + encoder_context->rate_control_mode != VA_RC_CQP) { + vp9_state->brc_enabled = 1; + vp9_state->brc_distortion_buffer_supported = 1; + vp9_state->brc_constant_buffer_supported = 1; + vp9_state->num_pak_passes = 4; + } + vp9_state->dys_enabled = 1; /* this is supported by default */ + vp9_state->first_frame = 1; + + /* the definition of status buffer offset for VP9 */ + { + struct vp9_encode_status_buffer_internal *status_buffer; + + status_buffer = &vp9_state->status_buffer; + memset(status_buffer, 0, + sizeof(struct vp9_encode_status_buffer_internal)); + + status_buffer->bs_byte_count_offset = 2048; + status_buffer->image_status_mask_offset = 2052; + status_buffer->image_status_ctrl_offset = 2056; + status_buffer->media_index_offset = 2060; + + status_buffer->vp9_bs_frame_reg_offset = 0x1E9E0; + status_buffer->vp9_image_mask_reg_offset = 0x1E9F0; + status_buffer->vp9_image_ctrl_reg_offset = 0x1E9F4; + } + + gen9_vme_kernels_context_init_vp9(ctx, encoder_context, vme_context); + + encoder_context->vme_context = vme_context; + encoder_context->vme_pipeline = gen9_vme_pipeline_vp9; + encoder_context->vme_context_destroy = gen9_vme_context_destroy_vp9; + + return true; +} + +Bool +gen9_vp9_pak_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context) +{ + /* VME & PAK share the same context */ + struct gen9_encoder_context_vp9 *pak_context = encoder_context->vme_context; + + if (!pak_context) + return false; + + encoder_context->mfc_context = pak_context; + encoder_context->mfc_context_destroy = gen9_vp9_pak_context_destroy; + encoder_context->mfc_pipeline = gen9_vp9_pak_pipeline; + encoder_context->mfc_brc_prepare = gen9_vp9_pak_brc_prepare; + + return true; +} + +VAStatus +gen9_vp9_get_coded_status(VADriverContextP ctx, + char *buffer, + struct hw_context *hw_context) +{ + struct intel_encoder_context *encoder_context = + (struct intel_encoder_context *)hw_context; + struct gen9_vp9_state *vp9_state = NULL; + struct vp9_encode_status_buffer_internal *status_buffer; + struct i965_coded_buffer_segment *coded_buf_seg; + unsigned int *buf_ptr; + + if (!encoder_context || !buffer) + return VA_STATUS_ERROR_INVALID_BUFFER; + + vp9_state = (struct gen9_vp9_state *)(encoder_context->enc_priv_state); + coded_buf_seg = (struct i965_coded_buffer_segment *) buffer; + + if (!vp9_state) + return VA_STATUS_ERROR_INVALID_BUFFER; + + status_buffer = &vp9_state->status_buffer; + + buf_ptr = (unsigned int *)(buffer + status_buffer->bs_byte_count_offset); + coded_buf_seg->base.buf = buffer + I965_CODEDBUFFER_HEADER_SIZE; + coded_buf_seg->base.next = NULL; + + /* the stream size is writen into the bs_byte_count_offset address of buffer */ + coded_buf_seg->base.size = *buf_ptr; + + coded_buf_seg->mapped = 1; + + /* One VACodedBufferSegment for VP9 will be added later. + * It will be linked to the next element of coded_buf_seg->base.next + */ + + return VA_STATUS_SUCCESS; +} diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder.h intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder.h --- intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder.h 2016-06-17 01:06:24.000000000 +0000 @@ -0,0 +1,1979 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWAR + * + * Authors: + * Zhao, Yakui + * + */ + +#ifndef GEN9_VP9_ENCODER_H +#define GEN9_VP9_ENCODER_H + +#include +#include +#include + +#include +#include "i965_gpe_utils.h" + +#include "vp9_probs.h" + +struct encode_state; +struct intel_encoder_context; + +#define KEY_FRAME 0 +#define INTER_FRAME 1 + +#define INTEL_BRC_NONE 0 +#define INTEL_BRC_CBR 1 +#define INTEL_BRC_VBR 2 +#define INTEL_BRC_CQP 3 + +typedef enum _VP9_MEDIA_STATE_TYPE +{ + VP9_MEDIA_STATE_ENC_I_FRAME_DIST = 0, + VP9_MEDIA_STATE_32X_SCALING , + VP9_MEDIA_STATE_16X_SCALING , + VP9_MEDIA_STATE_4X_SCALING , + VP9_MEDIA_STATE_32X_ME , + VP9_MEDIA_STATE_16X_ME , + VP9_MEDIA_STATE_4X_ME , + VP9_MEDIA_STATE_BRC_INIT_RESET , + VP9_MEDIA_STATE_BRC_UPDATE , + VP9_MEDIA_STATE_MBENC_I_32x32 , + VP9_MEDIA_STATE_MBENC_I_16x16 , + VP9_MEDIA_STATE_MBENC_P , + VP9_MEDIA_STATE_MBENC_TX , + VP9_MEDIA_STATE_DYS , + VP9_NUM_MEDIA_STATES +} VP9_MEDIA_STATE_TYPE; + + +enum vp9_walker_degree +{ + VP9_NO_DEGREE = 0, + VP9_26_DEGREE, + VP9_45Z_DEGREE +}; + +struct vp9_encoder_kernel_parameter +{ + unsigned int curbe_size; + unsigned int inline_data_size; + unsigned int sampler_size; +}; + +struct vp9_encoder_kernel_walker_parameter +{ + unsigned int walker_degree; + unsigned int use_scoreboard; + unsigned int scoreboard_mask; + unsigned int no_dependency; + unsigned int resolution_x; + unsigned int resolution_y; +}; + +struct vp9_encoder_scoreboard_parameter +{ + unsigned int mask; + unsigned int type; + unsigned int enable; + unsigned int walkpat_flag; +}; + +typedef enum _INTEL_VP9_ENC_OPERATION +{ + INTEL_VP9_ENC_SCALING4X = 0, + INTEL_VP9_ENC_SCALING2X, + INTEL_VP9_ENC_ME, + INTEL_VP9_ENC_BRC, + INTEL_VP9_ENC_MBENC, + INTEL_VP9_ENC_DYS +} INTEL_VP9_ENC_OPERATION; + +struct gen9_surface_vp9 +{ + VADriverContextP ctx; + VASurfaceID scaled_4x_surface_id; + struct object_surface *scaled_4x_surface_obj; + VASurfaceID scaled_16x_surface_id; + struct object_surface *scaled_16x_surface_obj; + + VASurfaceID dys_surface_id; + struct object_surface *dys_surface_obj; + VASurfaceID dys_4x_surface_id; + struct object_surface *dys_4x_surface_obj; + VASurfaceID dys_16x_surface_id; + struct object_surface *dys_16x_surface_obj; + int dys_frame_width; + int dys_frame_height; + int frame_width; + int frame_height; + unsigned int qp_value; + uint8_t dys_hme_flag; +}; + +/* The definition for Scaling */ +enum vp9_binding_table_offset_scaling +{ + VP9_BTI_SCALING_FRAME_SRC_Y = 0, + VP9_BTI_SCALING_FRAME_DST_Y = 1, + VP9_BTI_SCALING_FRAME_MBVPROCSTATS_DST_CM = 6, + VP9_BTI_SCALING_NUM_SURFACES = 8 +}; + + +typedef struct _vp9_scaling4x_curbe_data_cm +{ + struct + { + uint32_t input_picture_width :16; + uint32_t input_picture_height :16; + } dw0; + + struct { + uint32_t input_y_bti; + } dw1; + + struct { + uint32_t output_y_bti; + } dw2; + + struct { + uint32_t reserved; + } dw3; + + struct { + uint32_t reserved; + } dw4; + + struct { + uint32_t reserved; + } dw5; + + struct + { + uint32_t reserved0 : 1; + uint32_t enable_mb_variance_output : 1; + uint32_t enable_mb_pixel_average_output : 1; + uint32_t enable_blk8x8_stat_output : 1; + uint32_t reserved1 : 28; + } dw6; + + struct { + uint32_t reserved; + } dw7; + + struct { + uint32_t reserved; + } dw8; + + struct { + uint32_t reserved; + } dw9; + + struct { + uint32_t mbv_proc_stat_bti; + } dw10; + + struct { + uint32_t reserved; + } dw11; +} vp9_scaling4x_curbe_data_cm; + +typedef struct _vp9_scaling2x_curbe_data_cm +{ + struct + { + uint32_t input_picture_width :16; + uint32_t input_picture_height :16; + } dw0; + + /* dw1-dw7 */ + uint32_t reserved1[7]; + + struct { + uint32_t input_y_bti; + } dw8; + + struct { + uint32_t output_y_bti; + } dw9; + + uint32_t reserved2[2]; +} vp9_scaling2x_curbe_data_cm; + +typedef struct _vp9_scaling4x_inline_data_cm +{ + struct + { + uint32_t dstblk_hori_origin : 16; + uint32_t dstblk_vert_origin : 16; + } dw0; + + struct + { + uint32_t horiblk_compmask_layer0 : 16; + uint32_t vertblk_compmask_layer0 : 16; + } dw1; + + struct + { + uint32_t horiblk_compmask_layer1 : 16; + uint32_t vertblk_compmask_layer1 : 16; + } dw2; + + struct + { + uint32_t horiblk_compmask_layer2 : 16; + uint32_t vertblk_compmask_layer2 : 16; + } dw3; + + struct + { + float video_xscaling_step; + } dw4; + + struct + { + float video_step_delta; + } dw5; + + + struct + { + uint32_t vert_blk_num :17; + uint32_t area_interest :1; + uint32_t reserved :14; + } dw6; + + struct + { + uint32_t grp_id_num; + } dw7; + + struct + { + uint32_t horiblk_compmask_layer3 : 16; + uint32_t vertblk_compmask_layer3 : 16; + } dw8; + + struct + { + uint32_t horiblk_compmask_layer4 : 16; + uint32_t vertblk_compmask_layer4 : 16; + } dw9; + + struct + { + uint32_t horiblk_compmask_layer5 : 16; + uint32_t vertblk_compmask_layer5 : 16; + } dw10; + + struct + { + uint32_t horiblk_compmask_layer6 : 16; + uint32_t vertblk_compmask_layer6 : 16; + } dw11; + + struct + { + uint32_t horiblk_compmask_layer7 : 16; + uint32_t vertblk_compmask_layer7 : 16; + } dw12; + + struct { + uint32_t reserved; + } dw13; + + struct { + uint32_t reserved; + } dw14; + + struct { + uint32_t reserved; + } dw15; +} vp9_scaling4x_inline_data_cm; + +#define VP9_SCALING_4X 0 +#define VP9_SCALING_2X 1 +#define NUM_VP9_SCALING 2 + +typedef struct _vp9_bti_scaling_offset +{ + uint32_t scaling_frame_src_y; + uint32_t scaling_frame_dst_y; + uint32_t reserved; + uint32_t scaling_frame_mbv_proc_stat_dst; +} vp9_bti_scaling_offset; + +struct vp9_scaling_context +{ + struct i965_gpe_context gpe_contexts[NUM_VP9_SCALING]; + vp9_bti_scaling_offset scaling_4x_bti; + vp9_bti_scaling_offset scaling_2x_bti; +}; + +struct gen9_search_path_delta +{ + char search_path_delta_x:4; + char search_path_delta_y:4; +}; + +struct vp9_binding_table_me +{ + uint32_t memv_data_surface_offset; + uint32_t memv16x_data_surface_offset; + uint32_t me_dist_offset; + uint32_t me_brc_dist_offset; + uint32_t me_curr_picl0_offset; + uint32_t me_curr_picl1_offset; +}; + +enum vp9_binding_table_offset_me +{ + VP9_BTI_ME_MV_DATA_SURFACE = 0, + VP9_BTI_16XME_MV_DATA_SURFACE = 1, + VP9_BTI_ME_DISTORTION_SURFACE = 2, + VP9_BTI_ME_BRC_DISTORTION_SURFACE = 3, + VP9_BTI_ME_CURR_PIC_L0 = 4, + VP9_BTI_ME_CURR_PIC_L1 = VP9_BTI_ME_CURR_PIC_L0 + 17, + VP9_BTI_ME_NUM_SURFACES = VP9_BTI_ME_CURR_PIC_L1 + 5 +}; + +enum VP9_ENC_ME_MODES +{ + VP9_ENC_ME16X_BEFORE_ME4X = 0, + VP9_ENC_ME16X_ONLY = 1, + VP9_ENC_ME4X_ONLY = 2, + VP9_ENC_ME4X_AFTER_ME16X = 3 +}; + +typedef struct _vp9_me_curbe_data +{ + struct + { + uint32_t skip_mode_enable:1; + uint32_t adaptive_enable:1; + uint32_t bi_mix_dis:1; + uint32_t reserved0:2; + uint32_t early_ime_success_enable:1; + uint32_t reserved1:1; + uint32_t t8x8_flag_for_inter_enable:1; + uint32_t reserved2:16; + uint32_t early_ime_stop:8; + } dw0; + + struct { + uint32_t max_num_mvs:6; + uint32_t reserved0:10; + uint32_t bi_weight:6; + uint32_t reserved1:6; + uint32_t uni_mix_disable:1; + uint32_t reserved2:3; + } dw1; + + struct { + uint32_t max_len_sp:8; + uint32_t max_num_su:8; + uint32_t reserved0:16; + } dw2; + + struct { + uint32_t src_size:2; + uint32_t reserved0:2; + uint32_t mb_type_remap:2; + uint32_t src_Access:1; + uint32_t ref_access:1; + uint32_t search_ctrl:3; + uint32_t dual_search_path_option:1; + uint32_t sub_pel_mode:2; + uint32_t skip_type:1; + uint32_t disable_field_cache_allocation:1; + uint32_t inter_chroma_mode:1; + uint32_t ft_enable:1; + uint32_t bme_disable_fbr:1; + uint32_t block_based_skip_enable:1; + uint32_t inter_sad:2; + uint32_t intra_sad:2; + uint32_t sub_mb_part_mask:7; + uint32_t reserved1:1; + } dw3; + + struct { + uint32_t reserved0:8; + uint32_t picture_height_minus1:8; + uint32_t picture_width:8; + uint32_t reserved1:8; + } dw4; + + struct { + uint32_t reserved0:8; + uint32_t qp_prime_y:8; + uint32_t ref_width:8; + uint32_t ref_height:8; + } dw5; + + struct { + uint32_t reserved0:3; + uint32_t write_distortions:1; + uint32_t use_mv_from_prev_step:1; + uint32_t reserved1:3; + uint32_t super_combine_dist:8; + uint32_t max_vmvr:16; + } dw6; + + struct { + uint32_t reserved0:16; + uint32_t mv_cost_scale_factor:2; + uint32_t bilinear_enable:1; + uint32_t src_field_polarity:1; + uint32_t weightedsad_harr:1; + uint32_t ac_only_haar:1; + uint32_t ref_id_cost_mode:1; + uint32_t reserved1:1; + uint32_t skip_center_mask:8; + } dw7; + + struct { + uint32_t mode_0_cost:8; + uint32_t mode_1_cost:8; + uint32_t mode_2_cost:8; + uint32_t mode_3_cost:8; + } dw8; + + struct { + uint32_t mode_4_cost:8; + uint32_t mode_5_cost:8; + uint32_t mode_6_cost:8; + uint32_t mode_7_cost:8; + } dw9; + + struct { + uint32_t mode_8_cost:8; + uint32_t mode_9_cost:8; + uint32_t ref_id_cost:8; + uint32_t chroma_intra_mode_cost:8; + } dw10; + + struct { + uint32_t mv_0_cost:8; + uint32_t mv_1_cost:8; + uint32_t mv_2_cost:8; + uint32_t mv_3_cost:8; + } dw11; + + struct { + uint32_t mv_4_cost:8; + uint32_t mv_5_cost:8; + uint32_t mv_6_cost:8; + uint32_t mv_7_cost:8; + } dw12; + + struct { + uint32_t num_ref_idx_l0_minus1:8; + uint32_t num_ref_idx_l1_minus1:8; + uint32_t actual_mb_width:8; + uint32_t actual_mb_height:8; + } dw13; + + struct { + uint32_t l0_ref_pic_polarity_bits:8; + uint32_t l1_ref_pic_polarity_bits:2; + uint32_t reserved:22; + } dw14; + + struct { + uint32_t prev_mv_read_pos_factor : 8; + uint32_t mv_shift_factor : 8; + uint32_t reserved:16; + } dw15; + + struct { + struct gen9_search_path_delta sp_delta_0; + struct gen9_search_path_delta sp_delta_1; + struct gen9_search_path_delta sp_delta_2; + struct gen9_search_path_delta sp_delta_3; + } dw16; + + struct { + struct gen9_search_path_delta sp_delta_4; + struct gen9_search_path_delta sp_delta_5; + struct gen9_search_path_delta sp_delta_6; + struct gen9_search_path_delta sp_delta_7; + } dw17; + + struct { + struct gen9_search_path_delta sp_delta_8; + struct gen9_search_path_delta sp_delta_9; + struct gen9_search_path_delta sp_delta_10; + struct gen9_search_path_delta sp_delta_11; + } dw18; + + struct { + struct gen9_search_path_delta sp_delta_12; + struct gen9_search_path_delta sp_delta_13; + struct gen9_search_path_delta sp_delta_14; + struct gen9_search_path_delta sp_delta_15; + } dw19; + + struct { + struct gen9_search_path_delta sp_delta_16; + struct gen9_search_path_delta sp_delta_17; + struct gen9_search_path_delta sp_delta_18; + struct gen9_search_path_delta sp_delta_19; + } dw20; + + struct { + struct gen9_search_path_delta sp_delta_20; + struct gen9_search_path_delta sp_delta_21; + struct gen9_search_path_delta sp_delta_22; + struct gen9_search_path_delta sp_delta_23; + } dw21; + + struct { + struct gen9_search_path_delta sp_delta_24; + struct gen9_search_path_delta sp_delta_25; + struct gen9_search_path_delta sp_delta_26; + struct gen9_search_path_delta sp_delta_27; + } dw22; + + struct { + struct gen9_search_path_delta sp_delta_28; + struct gen9_search_path_delta sp_delta_29; + struct gen9_search_path_delta sp_delta_30; + struct gen9_search_path_delta sp_delta_31; + } dw23; + + struct { + struct gen9_search_path_delta sp_delta_32; + struct gen9_search_path_delta sp_delta_33; + struct gen9_search_path_delta sp_delta_34; + struct gen9_search_path_delta sp_delta_35; + } dw24; + + struct { + struct gen9_search_path_delta sp_delta_36; + struct gen9_search_path_delta sp_delta_37; + struct gen9_search_path_delta sp_delta_38; + struct gen9_search_path_delta sp_delta_39; + } dw25; + + struct { + struct gen9_search_path_delta sp_delta_40; + struct gen9_search_path_delta sp_delta_41; + struct gen9_search_path_delta sp_delta_42; + struct gen9_search_path_delta sp_delta_43; + } dw26; + + struct { + struct gen9_search_path_delta sp_delta_44; + struct gen9_search_path_delta sp_delta_45; + struct gen9_search_path_delta sp_delta_46; + struct gen9_search_path_delta sp_delta_47; + } dw27; + + struct { + struct gen9_search_path_delta sp_delta_48; + struct gen9_search_path_delta sp_delta_49; + struct gen9_search_path_delta sp_delta_50; + struct gen9_search_path_delta sp_delta_51; + } dw28; + + struct { + struct gen9_search_path_delta sp_delta_52; + struct gen9_search_path_delta sp_delta_53; + struct gen9_search_path_delta sp_delta_54; + struct gen9_search_path_delta sp_delta_55; + } dw29; + + struct { + uint32_t reserved0; + } dw30; + + struct { + uint32_t reserved0; + } dw31; + + struct { + uint32_t _4x_memv_output_data_surf_index; + } dw32; + + struct { + uint32_t _16x_32x_memv_input_data_surf_index; + } dw33; + + struct { + uint32_t _4x_me_output_dist_surf_index; + } dw34; + + struct { + uint32_t _4x_me_output_brc_dist_surf_index; + } dw35; + + struct { + uint32_t vme_fwd_inter_pred_surf_index; + } dw36; + + struct { + uint32_t vme_bdw_inter_pred_surf_index; + } dw37; + + /* reserved */ + struct { + uint32_t reserved; + } dw38; +} vp9_me_curbe_data; + +struct vp9_me_context +{ + struct i965_gpe_context gpe_context; + struct vp9_binding_table_me vp9_me_bti; +}; + + +enum vp9_binding_table_offset_mbenc +{ + VP9_BTI_MBENC_CURR_Y_G9 = 0, + VP9_BTI_MBENC_CURR_UV_G9 = 1, + VP9_BTI_MBENC_CURR_NV12_G9 = 2, + VP9_BTI_MBENC_LAST_NV12_G9 = 3, + VP9_BTI_MBENC_GOLD_NV12_G9 = 5, + VP9_BTI_MBENC_ALTREF_NV12_G9 = 7, + VP9_BTI_MBENC_SEGMENTATION_MAP_G9 = 8, + VP9_BTI_MBENC_TX_CURBE_G9 = 9, + VP9_BTI_MBENC_HME_MV_DATA_G9 = 10, + VP9_BTI_MBENC_HME_DISTORTION_G9 = 11, + VP9_BTI_MBENC_MODE_DECISION_PREV_G9 = 12, + VP9_BTI_MBENC_MODE_DECISION_G9 = 13, + VP9_BTI_MBENC_OUT_16x16_INTER_MODES_G9 = 14, + VP9_BTI_MBENC_CU_RECORDS_G9 = 15, + VP9_BTI_MBENC_PAK_DATA_G9 = 16, + VP9_BTI_MBENC_NUM_SURFACES_G9 = 17, +}; + +struct vp9_binding_table_mbenc_i32 +{ + uint32_t mbenc_curr_y; + uint32_t mbenc_curr_uv; + uint32_t mbenc_segmentation_map; + uint32_t mbenc_mode_decision; +}; + +struct vp9_binding_table_mbenc_i16 +{ + uint32_t mbenc_curr_y; + uint32_t mbenc_curr_uv; + uint32_t mbenc_curr_nv12; + uint32_t mbenc_segmentation_map; + uint32_t mbenc_tx_curbe; + uint32_t mbenc_mode_decision; +}; + +struct vp9_binding_table_mbenc_p +{ + uint32_t mbenc_curr_y; + uint32_t mbenc_curr_uv; + uint32_t mbenc_curr_nv12; + uint32_t mbenc_lastref_pic; + uint32_t mbenc_goldref_pic; + uint32_t mbenc_altref_pic; + uint32_t mbenc_hme_mvdata; + uint32_t mbenc_hme_distortion; + uint32_t mbenc_segmentation_map; + uint32_t mbenc_tx_curbe; + uint32_t mbenc_mode_decision_prev; + uint32_t mbenc_mode_decision; + uint32_t mbenc_output_intermodes16x16; +}; + +struct vp9_binding_table_mbenc_tx +{ + uint32_t mbenc_curr_y; + uint32_t mbenc_curr_uv; + uint32_t mbenc_segmentation_map; + uint32_t mbenc_mode_decision; + uint32_t mbenc_cu_records; + uint32_t mbenc_pak_data; +}; + +typedef struct _vp9_mbenc_curbe_data +{ + struct { + uint32_t frame_width:16; + uint32_t frame_height:16; + } dw0; + + struct { + uint32_t frame_type : 8; + uint32_t segmentation_enable : 8; + uint32_t ref_frame_flags : 8; + uint32_t min_16for32_check : 8; + } dw1; + + struct { + uint32_t multi_pred : 8; + uint32_t len_sp : 8; + uint32_t search_x : 8; + uint32_t search_y : 8; + } dw2; + + struct { + uint32_t hme_enabled : 8; + uint32_t multi_ref_qp_check : 8; + uint32_t disable_temp_pred : 8; + uint32_t min_ref_for32_check : 8; + } dw3; + + struct { + uint32_t skip16_threshold : 16; + uint32_t disable_mr_threshold : 16; + } dw4; + + struct { + uint32_t enable_mbrc : 8; + uint32_t inter_round : 8; + uint32_t intra_round : 8; + uint32_t frame_qpindex : 8; + } dw5; + + struct { + uint32_t reserved; + } dw6; + + struct { + uint32_t reserved; + } dw7; + + struct { + uint32_t last_ref_qp : 16; + uint32_t golden_ref_qp : 16; + } dw8; + + struct { + uint32_t alt_ref_qp : 16; + uint32_t reserved : 16; + } dw9; + + struct { + uint32_t sum_intra_dist; + } dw10; + + struct { + uint32_t sum_inter_dist; + } dw11; + + struct { + uint32_t num_intra; + } dw12; + + struct { + uint32_t num_lastref; + } dw13; + + struct { + uint32_t num_goldref; + } dw14; + + struct { + uint32_t num_altref; + } dw15; + + struct { + uint32_t ime_search_path_delta03; + } dw16; + + struct { + uint32_t ime_search_path_delta47; + } dw17; + + struct { + uint32_t ime_search_path_delta811; + } dw18; + + struct { + uint32_t ime_search_path_delta1215; + } dw19; + + struct { + uint32_t ime_search_path_delta1619; + } dw20; + + struct { + uint32_t ime_search_path_delta2023; + } dw21; + + struct { + uint32_t ime_search_path_delta2427; + } dw22; + + struct { + uint32_t ime_search_path_delta2831; + } dw23; + + struct { + uint32_t ime_search_path_delta3235; + } dw24; + + struct { + uint32_t ime_search_path_delta3639; + } dw25; + + struct { + uint32_t ime_search_path_delta4043; + } dw26; + + struct { + uint32_t ime_search_path_delta4447; + } dw27; + + struct { + uint32_t ime_search_path_delta4851; + } dw28; + + struct { + uint32_t ime_search_path_delta5255; + } dw29; + + struct { + uint32_t reserved; + } dw30; + + struct { + uint32_t reserved; + } dw31; + + /* DW 32 */ + struct { + struct { + uint32_t segment_qpindex : 8; + uint32_t intra_non_dcpenalty_16x16 : 8; + uint32_t intra_non_dcpenalty_8x8 : 8; + uint32_t intra_non_dcpenalty_4x4 : 8; + } dw32; + + struct { + uint32_t intra_non_dcpenalty_32x32 : 16; + uint32_t reserved : 16; + } dw33; + + + struct { + uint32_t zero_cost : 16; + uint32_t near_cost : 16; + } dw34; + + struct { + uint32_t nearest_cost : 16; + uint32_t refid_cost : 16; + } dw35; + + struct { + uint32_t mv_cost0 : 16; + uint32_t mv_cost1 : 16; + } dw36; + + struct { + uint32_t mv_cost2 : 16; + uint32_t mv_cost3 : 16; + } dw37; + + struct { + uint32_t mv_cost4 : 16; + uint32_t mv_cost5 : 16; + } dw38; + + struct { + uint32_t mv_cost6 : 16; + uint32_t mv_cost7 : 16; + } dw39; + + struct { + uint32_t mv_cost0 : 8; + uint32_t mv_cost1 : 8; + uint32_t mv_cost2 : 8; + uint32_t mv_cost3 : 8; + } dw40; + + struct { + uint32_t mv_cost4 : 8; + uint32_t mv_cost5 : 8; + uint32_t mv_cost6 : 8; + uint32_t mv_cost7 : 8; + } dw41; + + struct { + uint32_t mode_cost0 : 8; + uint32_t mode_cost1 : 8; + uint32_t mode_cost2 : 8; + uint32_t mode_cost3 : 8; + } dw42; + + struct { + uint32_t mode_cost4 : 8; + uint32_t mode_cost5 : 8; + uint32_t mode_cost6 : 8; + uint32_t mode_cost7 : 8; + } dw43; + + struct { + uint32_t mode_cost8 : 8; + uint32_t mode_cost9 : 8; + uint32_t refid_cost : 8; + uint32_t reserved : 8; + } dw44; + + struct { + uint32_t mode_cost_intra32x32 : 16; + uint32_t mode_cost_inter32x32 : 16; + } dw45; + + struct { + uint32_t mode_cost_intra32x16 : 16; + uint32_t reserved : 16; + } dw46; + + struct { + uint32_t lambda_intra : 16; + uint32_t lambda_inter : 16; + } dw47; + } segments[8]; + + /* + Segment 0: dw32 - dw47 + Segment 1 : dw48 - dw63 + Segment 2 : dw64 - dw79 + Segment 3 : dw80 - dw95 + Segment 4 : dw96 - dw111 + Segment 5 : dw112 - dw127 + Segment 6 : dw128 - dw143 + Segment 7 : dw144 - dw159 + */ + + // dw160 + struct { + uint32_t enc_curr_y_surf_bti; + } dw160; + + struct { + uint32_t reserved; + } dw161; + + struct { + uint32_t enc_curr_nv12_surf_bti; + } dw162; + + struct { + uint32_t reserved; + } dw163; + + struct { + uint32_t reserved; + } dw164; + + struct { + uint32_t reserved; + } dw165; + + struct { + uint32_t segmentation_map_bti; + } dw166; + + struct { + uint32_t tx_curbe_bti; + } dw167; + + struct { + uint32_t hme_mvdata_bti; + } dw168; + + struct { + uint32_t hme_distortion_bti; + } dw169; + + struct { + uint32_t reserved; + } dw170; + + struct { + uint32_t mode_decision_prev_bti; + } dw171; + + struct { + uint32_t mode_decision_bti; + } dw172; + + struct { + uint32_t output_16x16_inter_modes_bti; + } dw173; + + struct { + uint32_t cu_record_bti; + } dw174; + + struct { + uint32_t pak_data_bti; + } dw175; +} vp9_mbenc_curbe_data; + + + +#define VP9_MBENC_IDX_KEY_32x32 0 +#define VP9_MBENC_IDX_KEY_16x16 1 +#define VP9_MBENC_IDX_INTER 2 +#define VP9_MBENC_IDX_TX 3 +#define NUM_VP9_MBENC 4 + +struct vp9_mbenc_context +{ + struct i965_gpe_context gpe_contexts[NUM_VP9_MBENC]; + struct vp9_binding_table_mbenc_tx vp9_mbenc_tx_bti; + struct vp9_binding_table_mbenc_i32 vp9_mbenc_i32_bti; + struct vp9_binding_table_mbenc_i16 vp9_mbenc_i16_bti; + struct vp9_binding_table_mbenc_p vp9_mbenc_p_bti; + dri_bo *mbenc_bo_dys; + int mbenc_bo_size; +}; + +enum vp9_binding_table_offset_dys +{ + VP9_BTI_DYS_INPUT_NV12 = 0, + VP9_BTI_DYS_OUTPUT_Y = 1, + VP9_BTI_DYS_OUTPUT_UV = 2, + VP9_BTI_DYS_NUM_SURFACES = 3 +}; + +struct vp9_binding_table_dys +{ + uint32_t dys_input_frame_nv12; + uint32_t dys_output_frame_y; + uint32_t dys_output_frame_uv; +}; + +typedef struct _vp9_dys_curbe_data +{ + struct { + uint32_t input_frame_width : 16; + uint32_t input_frame_height: 16; + } dw0; + + struct { + uint32_t output_frame_width : 16; + uint32_t output_frame_height: 16; + } dw1; + + struct { + float delta_u; + } dw2; + + struct { + float delta_v; + } dw3; + + /* DW4-15 */ + uint32_t reserved[12]; + + struct { + uint32_t input_frame_nv12_bti; + } dw16; + + struct { + uint32_t output_frame_y_bti; + } dw17; + + struct { + uint32_t avs_sample_idx; + } dw18; +} vp9_dys_curbe_data; + +// DYS kernel parameters +typedef struct _gen9_vp9_dys_kernel_param +{ + uint32_t input_width; + uint32_t input_height; + uint32_t output_width; + uint32_t output_height; + struct object_surface *input_surface; + struct object_surface *output_surface; +} gen9_vp9_dys_kernel_param; + +struct vp9_dys_context { + struct i965_gpe_context gpe_context; + struct vp9_binding_table_dys vp9_dys_bti; +}; + +enum vp9_binding_table_offset_brc +{ + VP9_BTI_BRC_SRCY4X_G9 = 0, + VP9_BTI_BRC_VME_COARSE_INTRA_G9 = 1, + VP9_BTI_BRC_HISTORY_G9 = 2, + VP9_BTI_BRC_CONSTANT_DATA_G9 = 3, + VP9_BTI_BRC_DISTORTION_G9 = 4, + VP9_BTI_BRC_MMDK_PAK_OUTPUT_G9 = 5, + VP9_BTI_BRC_MBENC_CURBE_INPUT_G9 = 6, + VP9_BTI_BRC_MBENC_CURBE_OUTPUT_G9 = 7, + VP9_BTI_BRC_PIC_STATE_INPUT_G9 = 8, + VP9_BTI_BRC_PIC_STATE_OUTPUT_G9 = 9, + VP9_BTI_BRC_SEGMENT_STATE_INPUT_G9 = 10, + VP9_BTI_BRC_SEGMENT_STATE_OUTPUT_G9 = 11, + VP9_BTI_BRC_BITSTREAM_SIZE_G9 = 12, + VP9_BTI_BRC_HFW_DATA_G9 = 13, + VP9_BTI_BRC_NUM_SURFACES_G9 = 14, +}; + +struct vp9_binding_table_brc_intra_dist +{ + uint32_t intra_dist_src_y4xsurface; + uint32_t brc_intra_dist_vme_coarse_intra; + uint32_t brc_intra_dist_distortion_buffer; +}; + +struct vp9_binding_table_brc_init +{ + uint32_t brc_history_buffer; + uint32_t brc_distortion_buffer; +}; + + +typedef struct _vp9_brc_curbe_data +{ + struct { + uint32_t frame_width : 16; + uint32_t frame_height : 16; + } dw0; + + struct { + uint32_t frame_type : 8; + uint32_t segmentation_enable : 8; + uint32_t ref_frame_flags : 8; + uint32_t num_tlevels : 8; + } dw1; + + struct { + uint32_t reserved : 16; + uint32_t intra_mode_disable : 8; + uint32_t loop_filter_type : 8; + } dw2; + + struct { + uint32_t max_level_ratiot0 : 8; + uint32_t max_level_ratiot1 : 8; + uint32_t max_level_ratiot2 : 8; + uint32_t max_level_ratiot3 : 8; + } dw3; + + struct { + uint32_t profile_level_max_frame; + } dw4; + + struct { + uint32_t init_buf_fullness; + } dw5; + + struct { + uint32_t buf_size; + } dw6; + + struct { + uint32_t target_bit_rate; + } dw7; + + struct { + uint32_t max_bit_rate; + } dw8; + + struct { + uint32_t min_bit_rate; + } dw9; + + struct { + uint32_t frame_ratem; + } dw10; + + struct { + uint32_t frame_rated; + } dw11; + + struct { + uint32_t brc_flag : 16; + uint32_t gopp : 16; + } dw12; + + struct { + uint32_t init_frame_width : 16; + uint32_t init_frame_height : 16; + } dw13; + + struct { + uint32_t avbr_accuracy : 16; + uint32_t avbr_convergence : 16; + } dw14; + + struct { + uint32_t min_qp : 16; + uint32_t max_qp : 16; + } dw15; + + struct { + uint32_t cq_level : 16; + uint32_t reserved : 16; + } dw16; + + struct { + uint32_t enable_dynamic_scaling : 16; + uint32_t brc_overshoot_cbr_pct : 16; + } dw17; + + struct { + uint32_t pframe_deviation_threshold0 : 8; + uint32_t pframe_deviation_threshold1 : 8; + uint32_t pframe_deviation_threshold2 : 8; + uint32_t pframe_deviation_threshold3 : 8; + } dw18; + + struct { + uint32_t pframe_deviation_threshold4 : 8; + uint32_t pframe_deviation_threshold5 : 8; + uint32_t pframe_deviation_threshold6 : 8; + uint32_t pframe_deviation_threshold7 : 8; + } dw19; + + struct { + uint32_t vbr_deviation_threshold0 : 8; + uint32_t vbr_deviation_threshold1 : 8; + uint32_t vbr_deviation_threshold2 : 8; + uint32_t vbr_deviation_threshold3 : 8; + } dw20; + + struct { + uint32_t vbr_deviation_threshold4 : 8; + uint32_t vbr_deviation_threshold5 : 8; + uint32_t vbr_deviation_threshold6 : 8; + uint32_t vbr_deviation_threshold7 : 8; + } dw21; + + struct { + uint32_t kframe_deviation_threshold0 : 8; + uint32_t kframe_deviation_threshold1 : 8; + uint32_t kframe_deviation_threshold2 : 8; + uint32_t kframe_deviation_threshold3 : 8; + } dw22; + + struct { + uint32_t kframe_deviation_threshold4 : 8; + uint32_t kframe_deviation_threshold5 : 8; + uint32_t kframe_deviation_threshold6 : 8; + uint32_t kframe_deviation_threshold7 : 8; + } dw23; + + struct { + uint32_t target_size; + } dw24; + + struct { + uint32_t frame_number; + } dw25; + + struct { + uint32_t reserved; + } dw26; + + struct { + uint32_t hrd_buffer_fullness_upper_limit; + } dw27; + + struct { + uint32_t hrd_buffer_fullness_lower_limit; + } dw28; + + struct { + uint32_t reserved; + } dw29; + + struct { + uint32_t reserved; + } dw30; + + struct { + uint32_t reserved; + } dw31; + + struct { + uint32_t seg_delta_qp0 : 8; + uint32_t seg_delta_qp1 : 8; + uint32_t seg_delta_qp2 : 8; + uint32_t seg_delta_qp3 : 8; + } dw32; + + struct { + uint32_t seg_delta_qp4 : 8; + uint32_t seg_delta_qp5 : 8; + uint32_t seg_delta_qp6 : 8; + uint32_t seg_delta_qp7 : 8; + } dw33; + + struct { + uint32_t temporal_id : 8; + uint32_t multi_ref_qp_check : 8; + uint32_t reserved : 16; + } dw34; + + struct { + uint32_t max_num_pak_passes : 8; + uint32_t sync_async : 8; + uint32_t overflow : 8; + uint32_t mbrc : 8; + } dw35; + + struct { + uint32_t reserved : 16; + uint32_t segmentation : 8; + uint32_t reserved1 : 8; + } dw36; + + struct { + uint32_t cur_qpindex : 8; + uint32_t lastref_qpindex : 8; + uint32_t goldref_qpindex : 8; + uint32_t altref_qpindex : 8; + } dw37; + + struct { + uint32_t qdelta_ydc : 8; + uint32_t qdelta_uvac : 8; + uint32_t qdelta_uvdc : 8; + uint32_t reserved : 8; + } dw38; + + struct { + uint32_t reserved; + } dw39; + + struct { + uint32_t reserved; + } dw40; + + struct { + uint32_t reserved; + } dw41; + + struct { + uint32_t reserved; + } dw42; + + struct { + uint32_t reserved; + } dw43; + + struct { + uint32_t reserved; + } dw44; + + struct { + uint32_t reserved; + } dw45; + + struct { + uint32_t reserved; + } dw46; + + struct { + uint32_t reserved; + } dw47; + + struct { + uint32_t brc_y4x_input_bti; + } dw48; + + struct { + uint32_t brc_vme_coarse_intra_input_bti; + } dw49; + + struct { + uint32_t brc_history_buffer_bti; + } dw50; + + struct { + uint32_t brc_const_data_input_bti; + } dw51; + + struct { + uint32_t brc_distortion_bti; + } dw52; + + struct { + uint32_t brc_mmdk_pak_output_bti; + } dw53; + + struct { + uint32_t brc_enccurbe_input_bti; + } dw54; + + struct { + uint32_t brc_enccurbe_output_bti; + } dw55; + + struct { + uint32_t brc_pic_state_input_bti; + } dw56; + + struct { + uint32_t brc_pic_state_output_bti; + } dw57; + + struct { + uint32_t brc_seg_state_input_bti; + } dw58; + + struct { + uint32_t brc_seg_state_output_bti; + } dw59; + + struct { + uint32_t brc_bitstream_size_data_bti; + } dw60; + + struct { + uint32_t brc_hfw_data_output_bti; + } dw61; + + struct { + uint32_t reserved; + } dw62; + + struct { + uint32_t reserved; + } dw63; +} vp9_brc_curbe_data; + + +#define VP9_BRC_INTRA_DIST 0 +#define VP9_BRC_INIT 1 +#define VP9_BRC_RESET 2 +#define VP9_BRC_UPDATE 3 +#define NUM_VP9_BRC 4 + +struct vp9_brc_context { + struct i965_gpe_context gpe_contexts[NUM_VP9_BRC]; +}; + +struct gen9_vp9_scaling_curbe_param +{ + uint32_t input_picture_width; + uint32_t input_picture_height; + bool use_16x_scaling; + bool use_32x_scaling; + bool mb_variance_output_enabled; + bool mb_pixel_average_output_enabled; + bool blk8x8_stat_enabled; +}; + +struct gen9_vp9_me_curbe_param +{ + VAEncSequenceParameterBufferVP9 *pseq_param; + VAEncPictureParameterBufferVP9 *ppic_param; + uint32_t frame_width; + uint32_t frame_height; + uint32_t ref_frame_flag; + bool use_16x_me; + bool b16xme_enabled; +}; + +struct gen9_vp9_mbenc_curbe_param +{ + VAEncSequenceParameterBufferVP9 *pseq_param; + VAEncPictureParameterBufferVP9 *ppic_param; + VAEncMiscParameterTypeVP9PerSegmantParam *psegment_param; + + uint16_t frame_width_in_mb; + uint16_t frame_height_in_mb; + uint16_t frame_type; + bool hme_enabled; + uint8_t ref_frame_flag; + VP9_MEDIA_STATE_TYPE media_state_type; + struct object_surface *curr_obj; + struct object_surface *last_ref_obj; + struct object_surface *golden_ref_obj; + struct object_surface *alt_ref_obj; + int picture_coding_type; + bool mbenc_curbe_set_in_brc_update; + bool multi_ref_qp_check; +}; + +struct gen9_vp9_dys_curbe_param +{ + uint32_t input_width; + uint32_t input_height; + uint32_t output_width; + uint32_t output_height; +}; + +struct gen9_vp9_brc_curbe_param +{ + VAEncSequenceParameterBufferVP9 *pseq_param; + VAEncPictureParameterBufferVP9 *ppic_param; + VAEncMiscParameterTypeVP9PerSegmantParam *psegment_param; + + VASurfaceID curr_frame; + uint32_t picture_coding_type; + /* the unit is in bits */ + double *pbrc_init_current_target_buf_full_in_bits; + double *pbrc_init_reset_input_bits_per_frame; + uint32_t *pbrc_init_reset_buf_size_in_bits; + uint32_t frame_width; + uint32_t frame_height; + uint32_t frame_width_in_mb; + uint32_t frame_height_in_mb; + uint32_t ref_frame_flag; + bool hme_enabled; + bool initbrc; + bool mbbrc_enabled; + bool b_used_ref; + int32_t brc_num_pak_passes; + bool multi_ref_qp_check; + int16_t frame_number; + int32_t frame_rate; + VP9_MEDIA_STATE_TYPE media_state_type; +}; + +struct gen9_vp9_scaling_surface_param +{ + VASurfaceID curr_pic; + void *p_scaling_bti; + struct object_surface *input_surface; + struct object_surface *output_surface; + uint32_t input_frame_width; + uint32_t input_frame_height; + uint32_t output_frame_width; + uint32_t output_frame_height; + uint32_t vert_line_stride; + uint32_t vert_line_stride_offset; + bool scaling_out_use_16unorm_surf_fmt; + bool scaling_out_use_32unorm_surf_fmt; + bool mbv_proc_stat_enabled; + struct i965_gpe_resource *pres_mbv_proc_stat_buffer; +}; + +struct gen9_vp9_brc_init_constant_buffer_param +{ + struct i965_gpe_resource *pres_brc_const_data_buffer; + uint16_t picture_coding_type; +}; + +struct gen9_vp9_dys_surface_param +{ + struct object_surface *input_frame; + struct object_surface *output_frame; + uint32_t vert_line_stride; + uint32_t vert_line_stride_offset; +}; + +struct gen9_vp9_me_surface_param +{ + VASurfaceID curr_pic; + struct object_surface *last_ref_pic; + struct object_surface *golden_ref_pic; + struct object_surface *alt_ref_pic; + + struct i965_gpe_resource *pres_4x_memv_data_buffer; + struct i965_gpe_resource *pres_16x_memv_data_buffer; + struct i965_gpe_resource *pres_me_distortion_buffer; + struct i965_gpe_resource *pres_me_brc_distortion_buffer; + uint32_t downscaled_width_in_mb; + uint32_t downscaled_height_in_mb; + uint32_t frame_width; + uint32_t frame_height; + bool use_16x_me; + bool b16xme_enabled; + bool dys_enabled; +}; + +struct gen9_vp9_mbenc_surface_param +{ + int media_state_type; + struct object_surface *last_ref_obj; + struct object_surface *golden_ref_obj; + struct object_surface *alt_ref_obj; + struct object_surface *curr_frame_obj; + unsigned short picture_coding_type; + unsigned int curr_surface_offset; + struct i965_gpe_resource *ps4x_memv_data_buffer; + struct i965_gpe_resource *ps4x_memv_distortion_buffer; + struct i965_gpe_resource *ps_me_brc_distortion_buffer; + uint32_t frame_width; + uint32_t frame_height; + uint32_t frame_width_in_mb; + uint32_t frame_height_in_mb; + bool hme_enabled; + bool segmentation_enabled; + uint32_t mb_data_offset; + struct i965_gpe_resource *pres_mb_code_surface; + struct i965_gpe_resource *pres_segmentation_map; + struct i965_gpe_resource *pres_mode_decision_prev; + struct i965_gpe_resource *pres_mode_decision; + struct i965_gpe_resource *pres_mbenc_curbe_buffer; + struct i965_gpe_resource *pres_output_16x16_inter_modes; + struct i965_gpe_resource *pres_mode_decision_i32; + + struct i965_gpe_context *gpe_context_tx; +}; + +typedef struct _vp9_frame_status_ +{ + uint16_t frame_width; + uint16_t frame_height; + uint8_t frame_type; + uint8_t show_frame; + uint8_t refresh_frame_context; + uint8_t frame_context_idx; + uint8_t intra_only; +} vp9_frame_status; + +#define VP9_BRC_SEQ 0x01 +#define VP9_BRC_HRD 0x02 +#define VP9_BRC_RC 0x04 +#define VP9_BRC_FR 0x08 +#define VP9_BRC_FAILURE (1 << 31) + +struct gen9_hcpe_pipe_mode_select_param +{ + uint32_t codec_mode; + uint32_t stream_out; +}; + +typedef struct _hcp_surface_state { + struct { + uint32_t surface_pitch : 17; + uint32_t reserved : 11; + uint32_t surface_id : 4; + } dw1; + + struct { + uint32_t y_cb_offset : 15; + uint32_t reserved : 12; + uint32_t surface_format : 5; + } dw2; + + struct { + uint32_t default_alpha : 16; + uint32_t y_cr_offset : 16; + } dw3; + + struct { + uint32_t auxilary_index : 11; + uint32_t reserved0 : 1; + uint32_t memory_compression : 1; + uint32_t reserved1 : 18; + } dw4; +} hcp_surface_state; + +struct gen9_encoder_context_vp9 +{ + struct vp9_scaling_context scaling_context; + struct vp9_me_context me_context; + struct vp9_mbenc_context mbenc_context; + struct vp9_brc_context brc_context; + struct vp9_dys_context dys_context; + void *enc_priv_state; + + struct i965_gpe_resource res_brc_history_buffer; + struct i965_gpe_resource res_brc_const_data_buffer; + struct i965_gpe_resource res_brc_mmdk_pak_buffer; + struct i965_gpe_resource res_brc_mbenc_curbe_write_buffer; + struct i965_gpe_resource res_pic_state_brc_read_buffer; + struct i965_gpe_resource res_pic_state_brc_write_hfw_read_buffer; + struct i965_gpe_resource res_pic_state_hfw_write_buffer; + struct i965_gpe_resource res_seg_state_brc_read_buffer; + struct i965_gpe_resource res_seg_state_brc_write_buffer; + struct i965_gpe_resource res_brc_bitstream_size_buffer; + struct i965_gpe_resource res_brc_hfw_data_buffer; + + struct i965_gpe_resource s4x_memv_distortion_buffer; + struct i965_gpe_resource mb_segment_map_surface; + struct i965_gpe_resource s4x_memv_data_buffer; + struct i965_gpe_resource s16x_memv_data_buffer; + struct i965_gpe_resource res_mode_decision[2]; + struct i965_gpe_resource res_output_16x16_inter_modes; + struct i965_gpe_resource res_mb_code_surface; + + /* PAK resource */ + struct i965_gpe_resource res_hvd_line_buffer; + struct i965_gpe_resource res_hvd_tile_line_buffer; + struct i965_gpe_resource res_deblocking_filter_line_buffer; + struct i965_gpe_resource res_deblocking_filter_tile_line_buffer; + struct i965_gpe_resource res_deblocking_filter_tile_col_buffer; + + struct i965_gpe_resource res_metadata_line_buffer; + struct i965_gpe_resource res_metadata_tile_line_buffer; + struct i965_gpe_resource res_metadata_tile_col_buffer; + + struct i965_gpe_resource res_segmentid_buffer; + struct i965_gpe_resource res_prob_buffer; + struct i965_gpe_resource res_prob_delta_buffer; + struct i965_gpe_resource res_prob_counter_buffer; + + struct i965_gpe_resource res_compressed_input_buffer; + struct i965_gpe_resource res_tile_record_streamout_buffer; + struct i965_gpe_resource res_cu_stat_streamout_buffer; + struct i965_gpe_resource res_mv_temporal_buffer[2]; + struct i965_gpe_resource res_pak_uncompressed_input_buffer; + + char *frame_header_data; + + unsigned int use_hw_scoreboard; + unsigned int use_hw_non_stalling_scoreboard; + unsigned int mb_stats_supported; + unsigned int hme_supported; + unsigned int b32xme_supported; + + unsigned int downscaled_width_in_mb4x; + unsigned int downscaled_height_in_mb4x; + + void (*pfn_set_sample_state_dys)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context); + + void (*pfn_set_curbe_mbenc)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_mbenc_curbe_param *param); + + void (*pfn_set_curbe_me)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_me_curbe_param *param); + + void (*pfn_set_curbe_scaling)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_scaling_curbe_param *param); + + void (*pfn_set_curbe_dys)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_dys_curbe_param *param); + + void (*pfn_set_curbe_brc)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_brc_curbe_param *param); + + void (*pfn_send_me_surface)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_me_surface_param *param); + + void (*pfn_send_mbenc_surface)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_mbenc_surface_param *mbenc_param); + + void (*pfn_send_scaling_surface)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_scaling_surface_param *param); + + void (*pfn_send_dys_surface)( + VADriverContextP ctx, + struct encode_state *encode_state, + struct i965_gpe_context *gpe_context, + struct intel_encoder_context *encoder_context, + struct gen9_vp9_dys_surface_param *param); + + struct { + dri_bo *bo; + } reconstructed_object; + + struct { + dri_bo *bo; + } uncompressed_picture_source; + + struct { + dri_bo *bo; + int offset; + int end_offset; + int status_offset; + } indirect_pak_bse_object; + + struct { + dri_bo *bo; + } reference_surfaces[8]; +}; + +enum INTEL_ENC_VP9_TU_MODE +{ + INTEL_ENC_VP9_TU_QUALITY = 0, + INTEL_ENC_VP9_TU_NORMAL, + INTEL_ENC_VP9_TU_PERFORMANCE +}; + +#define VP9_LAST_REF 0x01 +#define VP9_GOLDEN_REF 0x02 +#define VP9_ALT_REF 0x04 + +/* the vp9_encode_status_buffer is the shadow + * of vp9_encode_status_buffer_internal. + */ +struct vp9_encode_status_buffer_internal +{ + uint32_t bs_byte_count_offset; + uint32_t reserved[15]; + + /* the above is shared with the gen9_encode_status_buffer */ + uint32_t image_status_mask_offset; + uint32_t image_status_ctrl_offset; + + uint32_t vp9_image_mask_reg_offset; + uint32_t vp9_image_ctrl_reg_offset; + uint32_t vp9_bs_frame_reg_offset; + dri_bo *bo; + + uint32_t media_index_offset; +}; + + +struct gen9_vp9_state { + unsigned int brc_inited; + unsigned int brc_reset; + unsigned int brc_enabled; + unsigned int use_hw_scoreboard; + unsigned int use_hw_non_stalling_scoreborad; + unsigned int hme_supported; + unsigned int b16xme_supported; + unsigned int hme_enabled; + unsigned int b16xme_enabled; + + unsigned int frame_width; + unsigned int frame_height; + unsigned int frame_width_in_mb; + unsigned int frame_height_in_mb; + unsigned int frame_width_4x; + unsigned int frame_height_4x; + unsigned int frame_width_16x; + unsigned int frame_height_16x; + unsigned int downscaled_width_4x_in_mb; + unsigned int downscaled_height_4x_in_mb; + unsigned int downscaled_width_16x_in_mb; + unsigned int downscaled_height_16x_in_mb; + + unsigned int res_width; + unsigned int res_height; + int brc_allocated; + VASurfaceID curr_frame; + VASurfaceID last_ref_pic; + VASurfaceID alt_ref_pic; + VASurfaceID golden_ref_pic; + + struct object_surface *input_surface_obj; + struct object_surface *last_ref_obj; + struct object_surface *golden_ref_obj; + struct object_surface *alt_ref_obj; + + VAEncSequenceParameterBufferVP9 *seq_param; + VAEncSequenceParameterBufferVP9 bogus_seq_param; + VAEncPictureParameterBufferVP9 *pic_param; + VAEncMiscParameterTypeVP9PerSegmantParam *segment_param; + double brc_init_current_target_buf_full_in_bits; + double brc_init_reset_input_bits_per_frame; + uint32_t brc_init_reset_buf_size_in_bits; + unsigned int gop_size; + unsigned int target_bit_rate; + unsigned int max_bit_rate; + unsigned int min_bit_rate; + unsigned long init_vbv_buffer_fullness_in_bit; + unsigned long vbv_buffer_size_in_bit; + int frame_number; + uint32_t frame_rate; + uint8_t ref_frame_flag; + uint8_t dys_ref_frame_flag; + uint8_t picture_coding_type; + unsigned int adaptive_transform_decision_enabled; + int curr_mode_decision_index; + int target_usage; + int window_size; + int target_percentage; + unsigned int mb_data_offset; + int curr_pak_pass; + unsigned int brc_flag_check; + bool first_frame; + bool dys_enabled; + bool dys_in_use; + bool mbenc_curbe_set_in_brc_update; + bool multi_ref_qp_check; + bool brc_distortion_buffer_supported; + bool brc_constant_buffer_supported; + bool mbenc_keyframe_dist_enabled; + unsigned int curr_mv_temporal_index; + int tx_mode; + int num_pak_passes; + char *alias_insert_data; + int header_length; + vp9_header_bitoffset frame_header; + + struct vp9_encode_status_buffer_internal status_buffer; + + /* the frame context related with VP9 encoding */ + FRAME_CONTEXT vp9_frame_ctx[FRAME_CONTEXTS]; + FRAME_CONTEXT vp9_current_fc; + int frame_ctx_idx; + + vp9_frame_status vp9_last_frame; +}; + +struct vp9_compressed_element { + uint8_t a_valid : 1; + uint8_t a_probdiff_select: 1; + uint8_t a_prob_select : 1; + uint8_t a_bin : 1; + uint8_t b_valid : 1; + uint8_t b_probdiff_select: 1; + uint8_t b_prob_select : 1; + uint8_t b_bin : 1; +}; + +#define VP9_BRC_HISTORY_BUFFER_SIZE 768 +#define VP9_BRC_CONSTANTSURFACE_SIZE 17792 +#define VP9_BRC_BITSTREAM_SIZE_BUFFER_SIZE 16 +#define VP9_BRC_MMDK_PAK_BUFFER_SIZE 64 +#define VP9_SEGMENT_STATE_BUFFER_SIZE 256 +#define VP9_HFW_BRC_DATA_BUFFER_SIZE 32 + +#endif /* GEN9_VP9_ENCODER_H */ diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder_kernels.c intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder_kernels.c --- intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder_kernels.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder_kernels.c 2016-06-17 01:06:24.000000000 +0000 @@ -0,0 +1,4955 @@ +/* + * * Copyright (c) 2016, Intel Corporation + * + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * No reverse engineering, decompilation, or disassembly of this software is permitted. + * Limited patent license. Intel Corporation grants a world-wide, royalty-free, + * nonexclusive license under patents it now or hereafter owns or controls to make, have made, + * use, import, offer to sell and sell (.Utilize.) this software, but solely to the extent that any + * such patent is necessary to Utilize the software alone. The patent license shall not apply + * to any combinations which include this software. No hardware per se is licensed here under. + + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include "gen9_vp9_encoder_kernels.h" + + +const unsigned int media_vp9_kernels[AllVP9ENC_SZ] = { +0x0000000b,0x00000048,0x00001c48,0x00002b08,0x00009c88,0x0000b5c8,0x00011c88,0x00017d08, +0x000183c8,0x00018ac8,0x0001a748,0x0001bac8,0x00000000,0x00000000,0x00000000,0x00000000, +0x00000005,0x2f82124c,0x16000004,0x07ff07ff,0x00000005,0x2f80124c,0x16000006,0x07ff07ff, +0x00000001,0x2f861648,0x00000000,0x00000000,0x00000009,0x2f841248,0x16000f82,0x00030003, +0x00000009,0x2f881248,0x16000f80,0x00030003,0x00000001,0x202c1248,0x00000f88,0x00000000, +0x00000040,0x202e1248,0x16000f88,0x00080008,0x0000000c,0x20301248,0x16000022,0x00020002, +0x00000040,0x203c1248,0x1200002e,0x00004030,0x03000010,0x20001240,0x1200002e,0x00000030, +0x00010001,0x2f861248,0x0000003c,0x00000000,0x00000040,0x20441248,0x1e000030,0xffffffff, +0x04000010,0x20001240,0x12000f88,0x00000030,0x00010001,0x202c1248,0x00000044,0x00000000, +0x00010001,0x2f861648,0x00000000,0x00070007,0x00000009,0x20601248,0x1600002c,0x00020002, +0x20004d01,0x00000407,0x00000009,0x20801228,0x16000f84,0x00020002,0x00000001,0x20841208, +0x00000060,0x00000000,0x00000001,0x2088060c,0x00000000,0x0007001f,0x00000040,0x22000204, +0x06000024,0x02890000,0x0c600031,0x2b803a0c,0x00000080,0x00000200,0x00000040,0x20841228, +0x16000060,0x00080008,0x0c600031,0x2c803a0c,0x00000080,0x00000200,0x00000040,0x20841228, +0x16000060,0x00100010,0x0c600031,0x2d803a0c,0x00000080,0x00000200,0x00000040,0x20841228, +0x16000060,0x00180018,0x0c600031,0x2e803a0c,0x00000080,0x00000200,0x00800040,0x20a02248, +0x228d0b80,0x008d0ba0,0x00800040,0x20e02248,0x228d0bc0,0x008d0be0,0x00800040,0x21202248, +0x228d0c00,0x008d0c20,0x00800040,0x21602248,0x228d0c40,0x008d0c60,0x00800040,0x21a02248, +0x228d0c80,0x008d0ca0,0x00800040,0x21e02248,0x228d0cc0,0x008d0ce0,0x00800040,0x22202248, +0x228d0d00,0x008d0d20,0x00800040,0x22602248,0x228d0d40,0x008d0d60,0x00600040,0x22a01248, +0x124000a0,0x004000a2,0x00600040,0x22b01248,0x124000e0,0x004000e2,0x00600040,0x22c01248, +0x12400120,0x00400122,0x00600040,0x22d01248,0x12400160,0x00400162,0x00600040,0x22e01248, +0x124001a0,0x004001a2,0x00600040,0x22f01248,0x124001e0,0x004001e2,0x00600040,0x23001248, +0x12400220,0x00400222,0x00600040,0x23101248,0x12400260,0x00400262,0x00a00040,0x22a01248, +0x168d02a0,0x00020002,0x00a00040,0x22e01248,0x168d02e0,0x00020002,0x00a0000c,0x22a01248, +0x168d02a0,0x00020002,0x00a0000c,0x22e01248,0x168d02e0,0x00020002,0x00600040,0x22a01248, +0x128d02a0,0x008d02b0,0x00600040,0x22c01248,0x128d02c0,0x008d02d0,0x00600040,0x22e01248, +0x128d02e0,0x008d02f0,0x00600040,0x23001248,0x128d0300,0x008d0310,0x00600040,0x20601248, +0x12aa02a0,0x00aa02a2,0x00600040,0x20701248,0x12aa02e0,0x00aa02e2,0x00800040,0x20601248, +0x168d0060,0x00020002,0x0080000c,0x40801288,0x168d0060,0x00020002,0x00400001,0x23402288, +0x00400080,0x00000000,0x00400001,0x23482288,0x00400088,0x00000000,0x00400001,0x23502288, +0x00400090,0x00000000,0x00400001,0x23582288,0x00400098,0x00000000,0x00800040,0x20a02248, +0x228d0b90,0x008d0bb0,0x00800040,0x20e02248,0x228d0bd0,0x008d0bf0,0x00800040,0x21202248, +0x228d0c10,0x008d0c30,0x00800040,0x21602248,0x228d0c50,0x008d0c70,0x00800040,0x21a02248, +0x228d0c90,0x008d0cb0,0x00800040,0x21e02248,0x228d0cd0,0x008d0cf0,0x00800040,0x22202248, +0x228d0d10,0x008d0d30,0x00800040,0x22602248,0x228d0d50,0x008d0d70,0x00600040,0x22a01248, +0x124000a0,0x004000a2,0x00600040,0x22b01248,0x124000e0,0x004000e2,0x00600040,0x22c01248, +0x12400120,0x00400122,0x00600040,0x22d01248,0x12400160,0x00400162,0x00600040,0x22e01248, +0x124001a0,0x004001a2,0x00600040,0x22f01248,0x124001e0,0x004001e2,0x00600040,0x23001248, +0x12400220,0x00400222,0x00600040,0x23101248,0x12400260,0x00400262,0x00a00040,0x22a01248, +0x168d02a0,0x00020002,0x00a00040,0x22e01248,0x168d02e0,0x00020002,0x00a0000c,0x22a01248, +0x168d02a0,0x00020002,0x00a0000c,0x22e01248,0x168d02e0,0x00020002,0x00600040,0x22a01248, +0x128d02a0,0x008d02b0,0x00600040,0x22c01248,0x128d02c0,0x008d02d0,0x00600040,0x22e01248, +0x128d02e0,0x008d02f0,0x00600040,0x23001248,0x128d0300,0x008d0310,0x00600040,0x20601248, +0x12aa02a0,0x00aa02a2,0x00600040,0x20701248,0x12aa02e0,0x00aa02e2,0x00800040,0x20601248, +0x168d0060,0x00020002,0x0080000c,0x40801288,0x168d0060,0x00020002,0x00400001,0x23442288, +0x00400080,0x00000000,0x00400001,0x234c2288,0x00400088,0x00000000,0x00400001,0x23542288, +0x00400090,0x00000000,0x00400001,0x235c2288,0x00400098,0x00000000,0x00800040,0x20a02248, +0x228d0d80,0x008d0da0,0x00800040,0x20e02248,0x228d0dc0,0x008d0de0,0x00800040,0x21202248, +0x228d0e00,0x008d0e20,0x00800040,0x21602248,0x228d0e40,0x008d0e60,0x00800040,0x21a02248, +0x228d0e80,0x008d0ea0,0x00800040,0x21e02248,0x228d0ec0,0x008d0ee0,0x00800040,0x22202248, +0x228d0f00,0x008d0f20,0x00800040,0x22602248,0x228d0f40,0x008d0f60,0x00600040,0x22a01248, +0x124000a0,0x004000a2,0x00600040,0x22b01248,0x124000e0,0x004000e2,0x00600040,0x22c01248, +0x12400120,0x00400122,0x00600040,0x22d01248,0x12400160,0x00400162,0x00600040,0x22e01248, +0x124001a0,0x004001a2,0x00600040,0x22f01248,0x124001e0,0x004001e2,0x00600040,0x23001248, +0x12400220,0x00400222,0x00600040,0x23101248,0x12400260,0x00400262,0x00a00040,0x22a01248, +0x168d02a0,0x00020002,0x00a00040,0x22e01248,0x168d02e0,0x00020002,0x00a0000c,0x22a01248, +0x168d02a0,0x00020002,0x00a0000c,0x22e01248,0x168d02e0,0x00020002,0x00600040,0x22a01248, +0x128d02a0,0x008d02b0,0x00600040,0x22c01248,0x128d02c0,0x008d02d0,0x00600040,0x22e01248, +0x128d02e0,0x008d02f0,0x00600040,0x23001248,0x128d0300,0x008d0310,0x00600040,0x20601248, +0x12aa02a0,0x00aa02a2,0x00600040,0x20701248,0x12aa02e0,0x00aa02e2,0x00800040,0x20601248, +0x168d0060,0x00020002,0x0080000c,0x40801288,0x168d0060,0x00020002,0x00400001,0x23602288, +0x00400080,0x00000000,0x00400001,0x23682288,0x00400088,0x00000000,0x00400001,0x23702288, +0x00400090,0x00000000,0x00400001,0x23782288,0x00400098,0x00000000,0x00800040,0x20a02248, +0x228d0d90,0x008d0db0,0x00800040,0x20e02248,0x228d0dd0,0x008d0df0,0x00800040,0x21202248, +0x228d0e10,0x008d0e30,0x00800040,0x21602248,0x228d0e50,0x008d0e70,0x00800040,0x21a02248, +0x228d0e90,0x008d0eb0,0x00800040,0x21e02248,0x228d0ed0,0x008d0ef0,0x00800040,0x22202248, +0x228d0f10,0x008d0f30,0x00800040,0x22602248,0x228d0f50,0x008d0f70,0x00600040,0x22a01248, +0x124000a0,0x004000a2,0x00600040,0x22b01248,0x124000e0,0x004000e2,0x00600040,0x22c01248, +0x12400120,0x00400122,0x00600040,0x22d01248,0x12400160,0x00400162,0x00600040,0x22e01248, +0x124001a0,0x004001a2,0x00600040,0x22f01248,0x124001e0,0x004001e2,0x00600040,0x23001248, +0x12400220,0x00400222,0x00600040,0x23101248,0x12400260,0x00400262,0x00a00040,0x22a01248, +0x168d02a0,0x00020002,0x00a00040,0x22e01248,0x168d02e0,0x00020002,0x00a0000c,0x22a01248, +0x168d02a0,0x00020002,0x00a0000c,0x22e01248,0x168d02e0,0x00020002,0x00600040,0x22a01248, +0x128d02a0,0x008d02b0,0x00600040,0x22c01248,0x128d02c0,0x008d02d0,0x00600040,0x22e01248, +0x128d02e0,0x008d02f0,0x00600040,0x23001248,0x128d0300,0x008d0310,0x00600040,0x20601248, +0x12aa02a0,0x00aa02a2,0x00600040,0x20701248,0x12aa02e0,0x00aa02e2,0x00800040,0x20601248, +0x168d0060,0x00020002,0x0080000c,0x40801288,0x168d0060,0x00020002,0x00400001,0x23642288, +0x00400080,0x00000000,0x00400001,0x236c2288,0x00400088,0x00000000,0x00400001,0x23742288, +0x00400090,0x00000000,0x00400001,0x237c2288,0x00400098,0x00000000,0x02000010,0x20001260, +0x1e000f86,0x00000000,0x00010020,0x34000004,0x0e001400,0x00000068,0x20004d01,0x00000307, +0x00000001,0x20601208,0x00000f84,0x00000000,0x00000001,0x20641208,0x00000f88,0x00000000, +0x00000001,0x2068060c,0x00000000,0x00070007,0x00000040,0x22000204,0x06000028,0x020a8000, +0x0c600033,0x0001a014,0x00002062,0x00000000,0x00000020,0x34000004,0x0e001400,0x00000268, +0x00000040,0x20241228,0x16004f86,0x00070007,0x00000041,0x202c1248,0x16000024,0x00080008, +0x00000040,0x22001240,0x1600002c,0x03400340,0x00600001,0x20502288,0x00208000,0x00000000, +0x05000010,0x20000200,0x16000024,0x00010001,0x00000001,0x20441e68,0x00000000,0x00010001, +0x00010002,0x404c1a88,0x1e000044,0x00000000,0x02600005,0x20002260,0x1600004c,0x00010001, +0x00610001,0x23482288,0x008d0050,0x00000000,0x05000010,0x20000200,0x16000024,0x00020002, +0x00010002,0x404c1a88,0x1e000044,0x00000000,0x02600005,0x20002260,0x1600004c,0x00010001, +0x00610001,0x23502288,0x008d0050,0x00000000,0x05000010,0x20000200,0x16000024,0x00030003, +0x00010002,0x404c1a88,0x1e000044,0x00000000,0x02600005,0x20002260,0x1600004c,0x00010001, +0x00610001,0x23582288,0x008d0050,0x00000000,0x05000010,0x20000200,0x16000024,0x00040004, +0x00010002,0x404c1a88,0x1e000044,0x00000000,0x02600005,0x20002260,0x1600004c,0x00010001, +0x00610001,0x23602288,0x008d0050,0x00000000,0x05000010,0x20000200,0x16000024,0x00050005, +0x00010002,0x404c1a88,0x1e000044,0x00000000,0x02600005,0x20002260,0x1600004c,0x00010001, +0x00610001,0x23682288,0x008d0050,0x00000000,0x05000010,0x20000200,0x16000024,0x00060006, +0x00010002,0x404c1a88,0x1e000044,0x00000000,0x02600005,0x20002260,0x1600004c,0x00010001, +0x00610001,0x23702288,0x008d0050,0x00000000,0x05000010,0x20000200,0x16000024,0x00070007, +0x00010002,0x404c1a88,0x1e000044,0x00000000,0x02600005,0x20002260,0x1600004c,0x00010001, +0x00610001,0x23782288,0x008d0050,0x00000000,0x20004d01,0x00000307,0x00000001,0x20601208, +0x00000f84,0x00000000,0x00000001,0x20641208,0x00000f88,0x00000000,0x00000001,0x2068060c, +0x00000000,0x00070007,0x00000040,0x22000204,0x06000028,0x020a8000,0x0c600033,0x0001a014, +0x00002062,0x00000000,0x00000005,0x4f840248,0x16000038,0x00010001,0x00000005,0x4f880248, +0x16000038,0x00020002,0x00000005,0x4f8c0248,0x16000038,0x00040004,0x01000010,0x20000200, +0x16000038,0x00000000,0x00010020,0x34000004,0x0e001400,0x00000ed8,0x00a00041,0x20602248, +0x228d0b80,0x008d0b80,0x00a00041,0x20a02248,0x228d0ba0,0x008d0ba0,0x00a00041,0x20e02248, +0x228d0bc0,0x008d0bc0,0x00a00041,0x21202248,0x228d0be0,0x008d0be0,0x00a00041,0x21602248, +0x228d0c00,0x008d0c00,0x00a00041,0x21a02248,0x228d0c20,0x008d0c20,0x00a00041,0x21e02248, +0x228d0c40,0x008d0c40,0x00a00041,0x22202248,0x228d0c60,0x008d0c60,0x00a00041,0x22602248, +0x228d0c80,0x008d0c80,0x00a00041,0x22a02248,0x228d0ca0,0x008d0ca0,0x00a00041,0x22e02248, +0x228d0cc0,0x008d0cc0,0x00a00041,0x23202248,0x228d0ce0,0x008d0ce0,0x00a00041,0x23602248, +0x228d0d00,0x008d0d00,0x00a00041,0x23a02248,0x228d0d20,0x008d0d20,0x00a00041,0x23e02248, +0x228d0d40,0x008d0d40,0x00a00041,0x24202248,0x228d0d60,0x008d0d60,0x00a00041,0x24602248, +0x228d0d80,0x008d0d80,0x00a00041,0x24a02248,0x228d0da0,0x008d0da0,0x00a00041,0x24e02248, +0x228d0dc0,0x008d0dc0,0x00a00041,0x25202248,0x228d0de0,0x008d0de0,0x00a00041,0x25602248, +0x228d0e00,0x008d0e00,0x00a00041,0x25a02248,0x228d0e20,0x008d0e20,0x00a00041,0x25e02248, +0x228d0e40,0x008d0e40,0x00a00041,0x26202248,0x228d0e60,0x008d0e60,0x00a00041,0x26602248, +0x228d0e80,0x008d0e80,0x00a00041,0x26a02248,0x228d0ea0,0x008d0ea0,0x00a00041,0x26e02248, +0x228d0ec0,0x008d0ec0,0x00a00041,0x27202248,0x228d0ee0,0x008d0ee0,0x00a00041,0x27602248, +0x228d0f00,0x008d0f00,0x00a00041,0x27a02248,0x228d0f20,0x008d0f20,0x00a00041,0x27e02248, +0x228d0f40,0x008d0f40,0x00a00041,0x28202248,0x228d0f60,0x008d0f60,0x00800040,0x28602248, +0x228d0b80,0x008d0ba0,0x00800040,0x28802248,0x228d0bc0,0x008d0be0,0x00800040,0x28a02248, +0x228d0c00,0x008d0c20,0x00800040,0x28c02248,0x228d0c40,0x008d0c60,0x00800040,0x28e02248, +0x228d0c80,0x008d0ca0,0x00800040,0x29002248,0x228d0cc0,0x008d0ce0,0x00800040,0x29202248, +0x228d0d00,0x008d0d20,0x00800040,0x29402248,0x228d0d40,0x008d0d60,0x00a00040,0x28601248, +0x128d0860,0x008d08a0,0x00a00040,0x28a01248,0x128d08e0,0x008d0920,0x00a00040,0x28601248, +0x128d0860,0x008d08a0,0x00800040,0x28601248,0x128d0860,0x008d0880,0x00600040,0x28601248, +0x128d0860,0x008d0870,0x00400040,0x28601248,0x12690860,0x00690868,0x00200040,0x28601248, +0x12450860,0x00450864,0x80000040,0x20501208,0x12000860,0x00000862,0x00800040,0x29601208, +0x128d0060,0x008d00a0,0x00800040,0x29a01208,0x128d00e0,0x008d0120,0x00800040,0x29e01208, +0x128d0160,0x008d01a0,0x00800040,0x2a201208,0x128d01e0,0x008d0220,0x00800040,0x2a601208, +0x128d0260,0x008d02a0,0x00800040,0x2aa01208,0x128d02e0,0x008d0320,0x00800040,0x2ae01208, +0x128d0360,0x008d03a0,0x00800040,0x2b201208,0x128d03e0,0x008d0420,0x20013640,0x4d4b4be7, +0x20013640,0x514f4de7,0x20013640,0x55534fe7,0x20013640,0x595751e7,0x20013640,0x4d4b4be7, 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+0x00000008,0x21a80a08,0x1e0000e4,0x00040004,0x00000040,0x22000204,0x060000e8,0x020a0400, +0x05000010,0x20000a20,0x1e000040,0x00060006,0x0a800033,0x00009054,0x000021a4,0x00000000, +0x00010020,0x34000004,0x0e001400,0xffffff20,0x20004d01,0x00007f07,0x07000031,0x20003a00, +0x06000fe0,0x82000010,0x0000007e,0x20000000,0x00000000,0x00000000,0x00000000,0x00000000, +0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, +0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, +0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000, +0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000 +}; diff -Nru intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder_kernels.h intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder_kernels.h --- intel-vaapi-driver-1.0.15/src/gen9_vp9_encoder_kernels.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/gen9_vp9_encoder_kernels.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,35 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWAR + * + * Authors: + * Zhao, Yakui + * + */ + +#ifndef _GEN9_VP9_ENCODER_KERNELS_H +#define _GEN9_VP9_ENCODER_KERNELS_H + +#define AllVP9ENC_SZ 39334 +extern const unsigned int media_vp9_kernels[AllVP9ENC_SZ]; + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/i965_avc_bsd.c intel-vaapi-driver-1.7.1/src/i965_avc_bsd.c --- intel-vaapi-driver-1.0.15/src/i965_avc_bsd.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_avc_bsd.c 2016-06-03 06:05:58.000000000 +0000 @@ -25,10 +25,7 @@ * Xiang Haihao * */ -#include -#include -#include -#include +#include "sysdeps.h" #include "intel_batchbuffer.h" #include "intel_driver.h" @@ -38,23 +35,8 @@ #include "i965_avc_bsd.h" #include "i965_media_h264.h" #include "i965_media.h" - -static void -i965_avc_bsd_free_avc_bsd_surface(void **data) -{ - struct i965_avc_bsd_surface *avc_bsd_surface = *data; - - if (!avc_bsd_surface) - return; - - dri_bo_unreference(avc_bsd_surface->dmv_top); - avc_bsd_surface->dmv_top = NULL; - dri_bo_unreference(avc_bsd_surface->dmv_bottom); - avc_bsd_surface->dmv_bottom = NULL; - - free(avc_bsd_surface); - *data = NULL; -} +#include "i965_decoder_utils.h" +#include "intel_media.h" static void i965_avc_bsd_init_avc_bsd_surface(VADriverContextP ctx, @@ -63,18 +45,18 @@ struct i965_h264_context *i965_h264_context) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_avc_bsd_context *i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context; - struct i965_avc_bsd_surface *avc_bsd_surface = obj_surface->private_data; + GenAvcSurface *avc_bsd_surface = obj_surface->private_data; - obj_surface->free_private_data = i965_avc_bsd_free_avc_bsd_surface; + obj_surface->free_private_data = gen_free_avc_surface; if (!avc_bsd_surface) { - avc_bsd_surface = calloc(sizeof(struct i965_avc_bsd_surface), 1); + avc_bsd_surface = calloc(sizeof(GenAvcSurface), 1); + assert(avc_bsd_surface); + avc_bsd_surface->base.frame_store_id = -1; assert((obj_surface->size & 0x3f) == 0); obj_surface->private_data = avc_bsd_surface; } - avc_bsd_surface->ctx = i965_avc_bsd_context; avc_bsd_surface->dmv_bottom_flag = (pic_param->pic_fields.bits.field_pic_flag && !pic_param->seq_fields.bits.direct_8x8_inference_flag); @@ -135,8 +117,6 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; - assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); - if (pic_param->CurrPic.flags & VA_PICTURE_H264_TOP_FIELD) img_struct = 1; else if (pic_param->CurrPic.flags & VA_PICTURE_H264_BOTTOM_FIELD) @@ -259,13 +239,7 @@ { struct intel_batchbuffer *batch = i965_h264_context->batch; int present_flag, cmd_len, list, j; - struct { - unsigned char bottom_idc:1; - unsigned char frame_store_index:4; - unsigned char field_picture:1; - unsigned char long_term:1; - unsigned char non_exist:1; - } refs[32]; + uint8_t ref_idx_state[32]; char weightoffsets[32 * 6]; /* don't issue SLICE_STATE for intra-prediction decoding */ @@ -302,53 +276,28 @@ OUT_BCS_BATCH(batch, present_flag); for (list = 0; list < 2; list++) { - int flag; + int flag, num_va_pics; VAPictureH264 *va_pic; if (list == 0) { - flag = PRESENT_REF_LIST0; - va_pic = slice_param->RefPicList0; + flag = PRESENT_REF_LIST0; + va_pic = slice_param->RefPicList0; + num_va_pics = slice_param->num_ref_idx_l0_active_minus1 + 1; } else { - flag = PRESENT_REF_LIST1; - va_pic = slice_param->RefPicList1; + flag = PRESENT_REF_LIST1; + va_pic = slice_param->RefPicList1; + num_va_pics = slice_param->num_ref_idx_l1_active_minus1 + 1; } if (!(present_flag & flag)) continue; - for (j = 0; j < 32; j++) { - if (va_pic->flags & VA_PICTURE_H264_INVALID) { - refs[j].non_exist = 1; - refs[j].long_term = 1; - refs[j].field_picture = 1; - refs[j].frame_store_index = 0xf; - refs[j].bottom_idc = 1; - } else { - int frame_idx; - - for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) { - if (i965_h264_context->fsid_list[frame_idx].surface_id != VA_INVALID_ID && - va_pic->picture_id == i965_h264_context->fsid_list[frame_idx].surface_id) { - assert(frame_idx == i965_h264_context->fsid_list[frame_idx].frame_store_id); - break; - } - } - - assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list)); - - refs[j].non_exist = 0; - refs[j].long_term = !!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE); - refs[j].field_picture = !!(va_pic->flags & - (VA_PICTURE_H264_TOP_FIELD | - VA_PICTURE_H264_BOTTOM_FIELD)); - refs[j].frame_store_index = frame_idx; - refs[j].bottom_idc = !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); - } - - va_pic++; - } - - intel_batchbuffer_data(batch, refs, sizeof(refs)); + gen5_fill_avc_ref_idx_state( + ref_idx_state, + va_pic, num_va_pics, + i965_h264_context->fsid_list + ); + intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state)); } i965_h264_context->weight128_luma_l0 = 0; @@ -424,17 +373,17 @@ static void i965_avc_bsd_buf_base_state(VADriverContextP ctx, + struct decode_state *decode_state, VAPictureParameterBufferH264 *pic_param, VASliceParameterBufferH264 *slice_param, struct i965_h264_context *i965_h264_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965_h264_context->batch; struct i965_avc_bsd_context *i965_avc_bsd_context; - int i, j; + int i; VAPictureH264 *va_pic; struct object_surface *obj_surface; - struct i965_avc_bsd_surface *avc_bsd_surface; + GenAvcSurface *avc_bsd_surface; i965_avc_bsd_context = &i965_h264_context->i965_avc_bsd_context; @@ -461,45 +410,22 @@ OUT_BCS_BATCH(batch, 0); for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { - if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) { - int found = 0; - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - va_pic = &pic_param->ReferenceFrames[j]; - - if (va_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) { - found = 1; - break; - } - } - - assert(found == 1); - - if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) { - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface); - avc_bsd_surface = obj_surface->private_data; + obj_surface = i965_h264_context->fsid_list[i].obj_surface; + if (obj_surface && obj_surface->private_data) { + avc_bsd_surface = obj_surface->private_data; - if (avc_bsd_surface == NULL) { - OUT_BCS_BATCH(batch, 0); - OUT_BCS_BATCH(batch, 0); - } else { - OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - - if (avc_bsd_surface->dmv_bottom_flag == 1) - OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - else - OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - } - } + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + + if (avc_bsd_surface->dmv_bottom_flag == 1) + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_bottom, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + else + OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); } else { OUT_BCS_BATCH(batch, 0); OUT_BCS_BATCH(batch, 0); @@ -507,14 +433,25 @@ } va_pic = &pic_param->CurrPic; - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface); - obj_surface->flags &= ~SURFACE_REF_DIS_MASK; - obj_surface->flags |= (pic_param->pic_fields.bits.reference_pic_flag ? SURFACE_REFERENCED : 0); + obj_surface = decode_state->render_object; + if (pic_param->pic_fields.bits.reference_pic_flag) + obj_surface->flags |= SURFACE_REFERENCED; + else + obj_surface->flags &= ~SURFACE_REFERENCED; + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + /* initial uv component for YUV400 case */ + if (pic_param->seq_fields.bits.chroma_format_idc == 0) { + unsigned int uv_offset = obj_surface->width * obj_surface->height; + unsigned int uv_size = obj_surface->width * obj_surface->height / 2; + + dri_bo_map(obj_surface->bo, 1); + memset(obj_surface->bo->virtual + uv_offset, 0x80, uv_size); + dri_bo_unmap(obj_surface->bo); + } + i965_avc_bsd_init_avc_bsd_surface(ctx, obj_surface, pic_param, i965_h264_context); avc_bsd_surface = obj_surface->private_data; - i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); OUT_BCS_RELOC(batch, avc_bsd_surface->dmv_top, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, @@ -531,26 +468,16 @@ /* POC List */ for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { - if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) { - int found = 0; - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - va_pic = &pic_param->ReferenceFrames[j]; - - if (va_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) { - found = 1; - break; - } - } + obj_surface = i965_h264_context->fsid_list[i].obj_surface; - assert(found == 1); - - if (!(va_pic->flags & VA_PICTURE_H264_INVALID)) { - OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); - OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); - } + if (obj_surface) { + const VAPictureH264 * const va_pic = avc_find_picture( + obj_surface->base.id, pic_param->ReferenceFrames, + ARRAY_ELEMS(pic_param->ReferenceFrames)); + + assert(va_pic != NULL); + OUT_BCS_BATCH(batch, va_pic->TopFieldOrderCnt); + OUT_BCS_BATCH(batch, va_pic->BottomFieldOrderCnt); } else { OUT_BCS_BATCH(batch, 0); OUT_BCS_BATCH(batch, 0); @@ -564,35 +491,6 @@ ADVANCE_BCS_BATCH(batch); } -/* - * Return the bit offset to the first bit of the slice data - * - * VASliceParameterBufferH264.slice_data_bit_offset will point into the part - * of slice header if there are some escaped bytes in the slice header. The offset - * to slice data is needed for BSD unit so that BSD unit can fetch right slice data - * for processing. This fixes conformance case BASQP1_Sony_C.jsv - */ -static int -i965_avc_bsd_get_slice_bit_offset(uint8_t *buf, int mode_flag, int in_slice_data_bit_offset) -{ - int out_slice_data_bit_offset; - int slice_header_size = in_slice_data_bit_offset / 8; - int i, j; - - for (i = 0, j = 0; i < slice_header_size; i++, j++) { - if (!buf[j] && !buf[j + 1] && buf[j + 2] == 3) { - i++, j += 2; - } - } - - out_slice_data_bit_offset = 8 * j + in_slice_data_bit_offset % 8; - - if (mode_flag == ENTROPY_CABAC) - out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8); - - return out_slice_data_bit_offset; -} - static void g4x_avc_bsd_object(VADriverContextP ctx, struct decode_state *decode_state, @@ -611,11 +509,10 @@ int num_ref_idx_l0, num_ref_idx_l1; int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); - int slice_data_bit_offset; + unsigned int slice_data_bit_offset; int weighted_pred_idc = 0; int first_mb_in_slice = 0; int slice_type; - uint8_t *slice_data = NULL; encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */ @@ -625,12 +522,12 @@ } else cmd_len = 8; - dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0); - slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset); - slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data, - pic_param->pic_fields.bits.entropy_coding_mode_flag, - slice_param->slice_data_bit_offset); - dri_bo_unmap(decode_state->slice_datas[slice_index]->bo); + + slice_data_bit_offset = avc_get_first_mb_bit_offset_with_epb( + decode_state->slice_datas[slice_index]->bo, + slice_param, + pic_param->pic_fields.bits.entropy_coding_mode_flag + ); if (slice_param->slice_type == SLICE_TYPE_I || slice_param->slice_type == SLICE_TYPE_SI) @@ -700,7 +597,7 @@ (slice_hor_pos << 16) | (first_mb_in_slice << 0)); OUT_BCS_BATCH(batch, - (0 << 7) | /* FIXME: ??? */ + (1 << 7) | ((0x7 - (slice_data_bit_offset & 0x7)) << 0)); if (encrypted) { @@ -740,11 +637,10 @@ int num_ref_idx_l0, num_ref_idx_l1; int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); - int slice_data_bit_offset; + unsigned int slice_data_bit_offset; int weighted_pred_idc = 0; int first_mb_in_slice; int slice_type; - uint8_t *slice_data = NULL; encrypted = 0; /* FIXME: which flag in VAAPI is used for encryption? */ @@ -753,12 +649,11 @@ } else counter_value = 0; - dri_bo_map(decode_state->slice_datas[slice_index]->bo, 0); - slice_data = (uint8_t *)(decode_state->slice_datas[slice_index]->bo->virtual + slice_param->slice_data_offset); - slice_data_bit_offset = i965_avc_bsd_get_slice_bit_offset(slice_data, - pic_param->pic_fields.bits.entropy_coding_mode_flag, - slice_param->slice_data_bit_offset); - dri_bo_unmap(decode_state->slice_datas[slice_index]->bo); + slice_data_bit_offset = avc_get_first_mb_bit_offset_with_epb( + decode_state->slice_datas[slice_index]->bo, + slice_param, + pic_param->pic_fields.bits.entropy_coding_mode_flag + ); if (slice_param->slice_type == SLICE_TYPE_I || slice_param->slice_type == SLICE_TYPE_SI) @@ -830,7 +725,7 @@ (slice_hor_pos << 16) | (first_mb_in_slice << 0)); OUT_BCS_BATCH(batch, - (0 << 7) | /* FIXME: ??? */ + (1 << 7) | ((0x7 - (slice_data_bit_offset & 0x7)) << 0)); OUT_BCS_BATCH(batch, counter_value); @@ -876,7 +771,7 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); - if (IS_IRONLAKE(i965->intel.device_id)) + if (IS_IRONLAKE(i965->intel.device_info)) ironlake_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context); else g4x_avc_bsd_object(ctx, decode_state, pic_param, slice_param, slice_index, i965_h264_context); @@ -891,120 +786,6 @@ i965_avc_bsd_object(ctx, decode_state, pic_param, NULL, 0, i965_h264_context); } -static void -i965_avc_bsd_frame_store_index(VADriverContextP ctx, - VAPictureParameterBufferH264 *pic_param, - struct i965_h264_context *i965_h264_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - int i, j; - - assert(ARRAY_ELEMS(i965_h264_context->fsid_list) == ARRAY_ELEMS(pic_param->ReferenceFrames)); - - for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { - int found = 0; - - if (i965_h264_context->fsid_list[i].surface_id == VA_INVALID_ID) - continue; - - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[j]; - if (ref_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - if (i965_h264_context->fsid_list[i].surface_id == ref_pic->picture_id) { - found = 1; - break; - } - } - - if (!found) { - struct object_surface *obj_surface = SURFACE(i965_h264_context->fsid_list[i].surface_id); - obj_surface->flags &= ~SURFACE_REFERENCED; - - if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { - dri_bo_unreference(obj_surface->bo); - obj_surface->bo = NULL; - obj_surface->flags &= ~SURFACE_REF_DIS_MASK; - } - - if (obj_surface->free_private_data) - obj_surface->free_private_data(&obj_surface->private_data); - - i965_h264_context->fsid_list[i].surface_id = VA_INVALID_ID; - i965_h264_context->fsid_list[i].frame_store_id = -1; - } - } - - for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { - VAPictureH264 *ref_pic = &pic_param->ReferenceFrames[i]; - int found = 0; - - if (ref_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { - if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) - continue; - - if (i965_h264_context->fsid_list[j].surface_id == ref_pic->picture_id) { - found = 1; - break; - } - } - - if (!found) { - int frame_idx; - struct object_surface *obj_surface = SURFACE(ref_pic->picture_id); - assert(obj_surface); - i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); - - for (frame_idx = 0; frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list); frame_idx++) { - for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { - if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) - continue; - - if (i965_h264_context->fsid_list[j].frame_store_id == frame_idx) - break; - } - - if (j == ARRAY_ELEMS(i965_h264_context->fsid_list)) - break; - } - - assert(frame_idx < ARRAY_ELEMS(i965_h264_context->fsid_list)); - - for (j = 0; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { - if (i965_h264_context->fsid_list[j].surface_id == VA_INVALID_ID) { - i965_h264_context->fsid_list[j].surface_id = ref_pic->picture_id; - i965_h264_context->fsid_list[j].frame_store_id = frame_idx; - break; - } - } - } - } - - for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list) - 1; i++) { - if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID && - i965_h264_context->fsid_list[i].frame_store_id == i) - continue; - - for (j = i + 1; j < ARRAY_ELEMS(i965_h264_context->fsid_list); j++) { - if (i965_h264_context->fsid_list[j].surface_id != VA_INVALID_ID && - i965_h264_context->fsid_list[j].frame_store_id == i) { - VASurfaceID id = i965_h264_context->fsid_list[i].surface_id; - int frame_idx = i965_h264_context->fsid_list[i].frame_store_id; - - i965_h264_context->fsid_list[i].surface_id = i965_h264_context->fsid_list[j].surface_id; - i965_h264_context->fsid_list[i].frame_store_id = i965_h264_context->fsid_list[j].frame_store_id; - i965_h264_context->fsid_list[j].surface_id = id; - i965_h264_context->fsid_list[j].frame_store_id = frame_idx; - break; - } - } - } -} - void i965_avc_bsd_pipeline(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context) { @@ -1016,7 +797,8 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; - i965_avc_bsd_frame_store_index(ctx, pic_param, i965_h264_context); + intel_update_avc_frame_store_index(ctx, decode_state, pic_param, + i965_h264_context->fsid_list, &i965_h264_context->fs_ctx); i965_h264_context->enable_avc_ildb = 0; i965_h264_context->picture.i_flag = 1; @@ -1067,7 +849,7 @@ i965_h264_context->picture.i_flag = 0; i965_avc_bsd_slice_state(ctx, pic_param, slice_param, i965_h264_context); - i965_avc_bsd_buf_base_state(ctx, pic_param, slice_param, i965_h264_context); + i965_avc_bsd_buf_base_state(ctx, decode_state, pic_param, slice_param, i965_h264_context); i965_avc_bsd_object(ctx, decode_state, pic_param, slice_param, j, i965_h264_context); slice_param++; } diff -Nru intel-vaapi-driver-1.0.15/src/i965_avc_bsd.h intel-vaapi-driver-1.7.1/src/i965_avc_bsd.h --- intel-vaapi-driver-1.0.15/src/i965_avc_bsd.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_avc_bsd.h 2016-06-03 06:05:58.000000000 +0000 @@ -42,14 +42,6 @@ } mpr_row_store; }; -struct i965_avc_bsd_surface -{ - struct i965_avc_bsd_context *ctx; - dri_bo *dmv_top; - dri_bo *dmv_bottom; - int dmv_bottom_flag; -}; - void i965_avc_bsd_pipeline(VADriverContextP, struct decode_state *, void *h264_context); void i965_avc_bsd_decode_init(VADriverContextP, void *h264_context); Bool i965_avc_bsd_ternimate(struct i965_avc_bsd_context *); diff -Nru intel-vaapi-driver-1.0.15/src/i965_avc_hw_scoreboard.c intel-vaapi-driver-1.7.1/src/i965_avc_hw_scoreboard.c --- intel-vaapi-driver-1.0.15/src/i965_avc_hw_scoreboard.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_avc_hw_scoreboard.c 2016-06-03 06:05:58.000000000 +0000 @@ -217,7 +217,7 @@ unsigned int vfe_fence, cs_fence; vfe_fence = avc_hw_scoreboard_context->urb.cs_start; - cs_fence = URB_SIZE((&i965->intel)); + cs_fence = i965->intel.device_info->urb_size; BEGIN_BATCH(batch, 3); OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); @@ -429,7 +429,7 @@ avc_hw_scoreboard_context->urb.cs_start = avc_hw_scoreboard_context->urb.vfe_start + avc_hw_scoreboard_context->urb.num_vfe_entries * avc_hw_scoreboard_context->urb.size_vfe_entry; assert(avc_hw_scoreboard_context->urb.cs_start + - avc_hw_scoreboard_context->urb.num_cs_entries * avc_hw_scoreboard_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + avc_hw_scoreboard_context->urb.num_cs_entries * avc_hw_scoreboard_context->urb.size_cs_entry <= i965->intel.device_info->urb_size); } } diff -Nru intel-vaapi-driver-1.0.15/src/i965_avc_ildb.c intel-vaapi-driver-1.7.1/src/i965_avc_ildb.c --- intel-vaapi-driver-1.0.15/src/i965_avc_ildb.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_avc_ildb.c 2016-06-03 06:05:58.000000000 +0000 @@ -130,7 +130,6 @@ struct decode_state *decode_state, struct i965_h264_context *i965_h264_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context; struct i965_surface_state *ss; struct object_surface *obj_surface; @@ -142,9 +141,7 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; va_pic = &pic_param->CurrPic; - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface); + obj_surface = decode_state->render_object; avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].s_bo = i965_h264_context->avc_ildb_data.bo; dri_bo_reference(avc_ildb_context->surface[SURFACE_EDGE_CONTROL_DATA].s_bo); @@ -345,7 +342,7 @@ assert(avc_ildb_context->curbe.bo->virtual); root_input = avc_ildb_context->curbe.bo->virtual; - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { root_input->max_concurrent_threads = 76; /* 72 - 2 + 8 - 2 */ } else { root_input->max_concurrent_threads = 54; /* 50 - 2 + 8 - 2 */ @@ -413,7 +410,7 @@ unsigned int vfe_fence, cs_fence; vfe_fence = avc_ildb_context->urb.cs_start; - cs_fence = URB_SIZE((&i965->intel)); + cs_fence = i965->intel.device_info->urb_size; BEGIN_BATCH(batch, 3); OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); @@ -430,7 +427,7 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965_h264_context->batch; - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { BEGIN_BATCH(batch, 8); OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); @@ -600,7 +597,7 @@ avc_ildb_context->urb.cs_start = avc_ildb_context->urb.vfe_start + avc_ildb_context->urb.num_vfe_entries * avc_ildb_context->urb.size_vfe_entry; assert(avc_ildb_context->urb.cs_start + - avc_ildb_context->urb.num_cs_entries * avc_ildb_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + avc_ildb_context->urb.num_cs_entries * avc_ildb_context->urb.size_cs_entry <= i965->intel.device_info->urb_size); for (i = 0; i < NUM_AVC_ILDB_SURFACES; i++) { dri_bo_unreference(avc_ildb_context->surface[i].s_bo); @@ -617,7 +614,7 @@ /* kernel offset */ assert(NUM_AVC_ILDB_INTERFACES == ARRAY_ELEMS(avc_ildb_kernel_offset_gen5)); - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { avc_ildb_kernel_offset = avc_ildb_kernel_offset_gen5; } else { avc_ildb_kernel_offset = avc_ildb_kernel_offset_gen4; diff -Nru intel-vaapi-driver-1.0.15/src/i965_decoder.h intel-vaapi-driver-1.7.1/src/i965_decoder.h --- intel-vaapi-driver-1.0.15/src/i965_decoder.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_decoder.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef I965_DECODER_H +#define I965_DECODER_H + +#include +#include + +#include +#include +#include +#include + +#define MAX_GEN_REFERENCE_FRAMES 16 +#define MAX_GEN_HCP_REFERENCE_FRAMES 8 + +#define ALLOC_GEN_BUFFER(gen_buffer, string, size) do { \ + dri_bo_unreference(gen_buffer->bo); \ + gen_buffer->bo = dri_bo_alloc(i965->intel.bufmgr, \ + string, \ + size, \ + 0x1000); \ + assert(gen_buffer->bo); \ + gen_buffer->valid = 1; \ + } while (0); + +#define FREE_GEN_BUFFER(gen_buffer) do { \ + dri_bo_unreference(gen_buffer->bo); \ + gen_buffer->bo = NULL; \ + gen_buffer->valid = 0; \ + } while (0) + +typedef struct gen_frame_store GenFrameStore; +struct gen_frame_store { + VASurfaceID surface_id; + int frame_store_id; + struct object_surface *obj_surface; + + /* This represents the time when this frame store was last used to + hold a reference frame. This is not connected to a presentation + timestamp (PTS), and this is not a common decoding time stamp + (DTS) either. It serves the purpose of tracking retired + reference frame candidates. + + This is only used for H.264 decoding on platforms before Haswell */ + uint64_t ref_age; +}; + +typedef struct gen_frame_store_context GenFrameStoreContext; +struct gen_frame_store_context { + uint64_t age; + int prev_poc; +}; + +typedef struct gen_buffer GenBuffer; +struct gen_buffer { + dri_bo *bo; + int valid; +}; + +struct hw_context * +gen75_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config); + +extern struct hw_context * +gen8_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config); +#endif /* I965_DECODER_H */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_decoder_utils.c intel-vaapi-driver-1.7.1/src/i965_decoder_utils.c --- intel-vaapi-driver-1.0.15/src/i965_decoder_utils.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_decoder_utils.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,1541 @@ +/* + * Copyright (C) 2006-2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include "sysdeps.h" +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_media.h" +#include "i965_drv_video.h" +#include "i965_decoder_utils.h" +#include "i965_defines.h" + +/* Set reference surface if backing store exists */ +static inline int +set_ref_frame( + struct i965_driver_data *i965, + GenFrameStore *ref_frame, + VASurfaceID va_surface, + struct object_surface *obj_surface +) +{ + if (va_surface == VA_INVALID_ID) + return 0; + + if (!obj_surface || !obj_surface->bo) + return 0; + + ref_frame->surface_id = va_surface; + ref_frame->obj_surface = obj_surface; + return 1; +} + +/* Check wether codec layer incorrectly fills in slice_vertical_position */ +int +mpeg2_wa_slice_vertical_position( + struct decode_state *decode_state, + VAPictureParameterBufferMPEG2 *pic_param +) +{ + unsigned int i, j, mb_height, vpos, last_vpos = 0; + + /* Assume progressive sequence if we got a progressive frame */ + if (pic_param->picture_coding_extension.bits.progressive_frame) + return 0; + + /* Wait for a field coded picture */ + if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_FRAME) + return -1; + + assert(decode_state && decode_state->slice_params); + + mb_height = (pic_param->vertical_size + 31) / 32; + + for (j = 0; j < decode_state->num_slice_params; j++) { + struct buffer_store * const buffer_store = + decode_state->slice_params[j]; + + for (i = 0; i < buffer_store->num_elements; i++) { + VASliceParameterBufferMPEG2 * const slice_param = + ((VASliceParameterBufferMPEG2 *)buffer_store->buffer) + i; + + vpos = slice_param->slice_vertical_position; + if (vpos >= mb_height || vpos == last_vpos + 2) { + WARN_ONCE("codec layer incorrectly fills in MPEG-2 slice_vertical_position. Workaround applied\n"); + return 1; + } + last_vpos = vpos; + } + } + return 0; +} + +/* Build MPEG-2 reference frames array */ +void +mpeg2_set_reference_surfaces( + VADriverContextP ctx, + GenFrameStore ref_frames[MAX_GEN_REFERENCE_FRAMES], + struct decode_state *decode_state, + VAPictureParameterBufferMPEG2 *pic_param +) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + VASurfaceID va_surface; + unsigned pic_structure, is_second_field, n = 0; + struct object_surface *obj_surface; + + pic_structure = pic_param->picture_coding_extension.bits.picture_structure; + is_second_field = pic_structure != MPEG_FRAME && + !pic_param->picture_coding_extension.bits.is_first_field; + + ref_frames[0].surface_id = VA_INVALID_ID; + ref_frames[0].obj_surface = NULL; + + /* Reference frames are indexed by frame store ID (0:top, 1:bottom) */ + switch (pic_param->picture_coding_type) { + case MPEG_P_PICTURE: + if (is_second_field && pic_structure == MPEG_BOTTOM_FIELD) { + va_surface = decode_state->current_render_target; + obj_surface = decode_state->render_object; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + } + va_surface = pic_param->forward_reference_picture; + obj_surface = decode_state->reference_objects[0]; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + break; + + case MPEG_B_PICTURE: + va_surface = pic_param->forward_reference_picture; + obj_surface = decode_state->reference_objects[0]; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + va_surface = pic_param->backward_reference_picture; + obj_surface = decode_state->reference_objects[1]; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + break; + } + + while (n != 2) { + ref_frames[n].obj_surface = ref_frames[0].obj_surface; + ref_frames[n++].surface_id = ref_frames[0].surface_id; + } + + if (pic_param->picture_coding_extension.bits.frame_pred_frame_dct) + return; + + ref_frames[2].surface_id = VA_INVALID_ID; + ref_frames[2].obj_surface = NULL; + + /* Bottom field pictures used as reference */ + switch (pic_param->picture_coding_type) { + case MPEG_P_PICTURE: + if (is_second_field && pic_structure == MPEG_TOP_FIELD) { + va_surface = decode_state->current_render_target; + obj_surface = decode_state->render_object; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + } + va_surface = pic_param->forward_reference_picture; + obj_surface = decode_state->reference_objects[0]; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + break; + + case MPEG_B_PICTURE: + va_surface = pic_param->forward_reference_picture; + obj_surface = decode_state->reference_objects[0]; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + va_surface = pic_param->backward_reference_picture; + obj_surface = decode_state->reference_objects[1]; + n += set_ref_frame(i965, &ref_frames[n], va_surface, obj_surface); + break; + } + + while (n != 4) { + ref_frames[n].obj_surface = ref_frames[2].obj_surface; + ref_frames[n++].surface_id = ref_frames[2].surface_id; + } +} + +/* Ensure the supplied VA surface has valid storage for decoding the + current picture */ +VAStatus +avc_ensure_surface_bo( + VADriverContextP ctx, + struct decode_state *decode_state, + struct object_surface *obj_surface, + const VAPictureParameterBufferH264 *pic_param +) +{ + VAStatus va_status; + uint32_t hw_fourcc, fourcc, subsample, chroma_format; + + /* Validate chroma format */ + switch (pic_param->seq_fields.bits.chroma_format_idc) { + case 0: // Grayscale + fourcc = VA_FOURCC_Y800; + subsample = SUBSAMPLE_YUV400; + chroma_format = VA_RT_FORMAT_YUV400; + break; + case 1: // YUV 4:2:0 + fourcc = VA_FOURCC_NV12; + subsample = SUBSAMPLE_YUV420; + chroma_format = VA_RT_FORMAT_YUV420; + break; + default: + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + + /* Determine the HW surface format, bound to VA config needs */ + if ((decode_state->base.chroma_formats & chroma_format) == chroma_format) + hw_fourcc = fourcc; + else { + hw_fourcc = 0; + switch (fourcc) { + case VA_FOURCC_Y800: // Implement with an NV12 surface + if (decode_state->base.chroma_formats & VA_RT_FORMAT_YUV420) { + hw_fourcc = VA_FOURCC_NV12; + subsample = SUBSAMPLE_YUV420; + } + break; + } + } + if (!hw_fourcc) + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + + /* (Re-)allocate the underlying surface buffer store, if necessary */ + if (!obj_surface->bo || obj_surface->fourcc != hw_fourcc) { + struct i965_driver_data * const i965 = i965_driver_data(ctx); + + i965_destroy_surface_storage(obj_surface); + va_status = i965_check_alloc_surface_bo(ctx, obj_surface, + i965->codec_info->has_tiled_surface, hw_fourcc, subsample); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + } + + /* Fake chroma components if grayscale is implemented on top of NV12 */ + if (fourcc == VA_FOURCC_Y800 && hw_fourcc == VA_FOURCC_NV12) { + const uint32_t uv_offset = obj_surface->width * obj_surface->height; + const uint32_t uv_size = obj_surface->width * obj_surface->height / 2; + + drm_intel_gem_bo_map_gtt(obj_surface->bo); + memset(obj_surface->bo->virtual + uv_offset, 0x80, uv_size); + drm_intel_gem_bo_unmap_gtt(obj_surface->bo); + } + return VA_STATUS_SUCCESS; +} + +/* Generate flat scaling matrices for H.264 decoding */ +void +avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix) +{ + /* Flat_4x4_16 */ + memset(&iq_matrix->ScalingList4x4, 16, sizeof(iq_matrix->ScalingList4x4)); + + /* Flat_8x8_16 */ + memset(&iq_matrix->ScalingList8x8, 16, sizeof(iq_matrix->ScalingList8x8)); +} + +/* Returns the POC of the supplied VA picture */ +static int +avc_get_picture_poc(const VAPictureH264 *va_pic) +{ + int structure, field_poc[2]; + + structure = va_pic->flags & + (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD); + field_poc[0] = structure != VA_PICTURE_H264_BOTTOM_FIELD ? + va_pic->TopFieldOrderCnt : INT_MAX; + field_poc[1] = structure != VA_PICTURE_H264_TOP_FIELD ? + va_pic->BottomFieldOrderCnt : INT_MAX; + return MIN(field_poc[0], field_poc[1]); +} + +/* Returns a unique picture ID that represents the supplied VA surface object */ +int +avc_get_picture_id(struct object_surface *obj_surface) +{ + int pic_id; + + /* This highly depends on how the internal VA objects are organized. + + Theory of operations: + The VA objects are maintained in heaps so that any released VA + surface will become free again for future allocation. This means + that holes in there are filled in for subsequent allocations. + So, this ultimately means that we could just use the Heap ID of + the VA surface as the resulting picture ID (16 bits) */ + pic_id = 1 + (obj_surface->base.id & OBJECT_HEAP_ID_MASK); + return (pic_id <= 0xffff) ? pic_id : -1; +} + +/* Finds the VA/H264 picture associated with the specified VA surface id */ +VAPictureH264 * +avc_find_picture(VASurfaceID id, VAPictureH264 *pic_list, int pic_list_count) +{ + int i; + + if (id != VA_INVALID_ID) { + for (i = 0; i < pic_list_count; i++) { + VAPictureH264 * const va_pic = &pic_list[i]; + if (va_pic->picture_id == id && + !(va_pic->flags & VA_PICTURE_H264_INVALID)) + return va_pic; + } + } + return NULL; +} + +/* Get first macroblock bit offset for BSD, minus EPB count (AVC) */ +/* XXX: slice_data_bit_offset does not account for EPB */ +unsigned int +avc_get_first_mb_bit_offset( + dri_bo *slice_data_bo, + VASliceParameterBufferH264 *slice_param, + unsigned int mode_flag +) +{ + unsigned int slice_data_bit_offset = slice_param->slice_data_bit_offset; + + if (mode_flag == ENTROPY_CABAC) + slice_data_bit_offset = ALIGN(slice_data_bit_offset, 0x8); + return slice_data_bit_offset; +} + +/* Get first macroblock bit offset for BSD, with EPB count (AVC) */ +/* XXX: slice_data_bit_offset does not account for EPB */ +unsigned int +avc_get_first_mb_bit_offset_with_epb( + dri_bo *slice_data_bo, + VASliceParameterBufferH264 *slice_param, + unsigned int mode_flag +) +{ + unsigned int in_slice_data_bit_offset = slice_param->slice_data_bit_offset; + unsigned int out_slice_data_bit_offset; + unsigned int i, j, n, buf_size, data_size, header_size; + uint8_t *buf; + int ret; + + header_size = slice_param->slice_data_bit_offset / 8; + data_size = slice_param->slice_data_size - slice_param->slice_data_offset; + buf_size = (header_size * 3 + 1) / 2; // Max possible header size (x1.5) + + if (buf_size > data_size) + buf_size = data_size; + + buf = alloca(buf_size); + ret = dri_bo_get_subdata( + slice_data_bo, slice_param->slice_data_offset, + buf_size, buf + ); + assert(ret == 0); + + for (i = 2, j = 2, n = 0; i < buf_size && j < header_size; i++, j++) { + if (buf[i] == 0x03 && buf[i - 1] == 0x00 && buf[i - 2] == 0x00) + i += 2, j++, n++; + } + + out_slice_data_bit_offset = in_slice_data_bit_offset + n * 8; + + if (mode_flag == ENTROPY_CABAC) + out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8); + return out_slice_data_bit_offset; +} + +static inline uint8_t +get_ref_idx_state_1(const VAPictureH264 *va_pic, unsigned int frame_store_id) +{ + /* The H.264 standard, and the VA-API specification, allows for at + least 3 states for a picture: "used for short-term reference", + "used for long-term reference", or considered as not used for + reference. + + The latter is used in the MVC inter prediction and inter-view + prediction process (H.8.4). This has an incidence on the + colZeroFlag variable, as defined in 8.4.1.2. + + Since it is not possible to directly program that flag, let's + make the hardware derive this value by assimilating "considered + as not used for reference" to a "not used for short-term + reference", and subsequently making it "used for long-term + reference" to fit the definition of Bit6 here */ + const unsigned int ref_flags = VA_PICTURE_H264_SHORT_TERM_REFERENCE | + VA_PICTURE_H264_LONG_TERM_REFERENCE; + const unsigned int is_long_term = + ((va_pic->flags & ref_flags) != VA_PICTURE_H264_SHORT_TERM_REFERENCE); + const unsigned int is_top_field = + !!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD); + const unsigned int is_bottom_field = + !!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD); + + return ((is_long_term << 6) | + ((is_top_field ^ is_bottom_field ^ 1) << 5) | + (frame_store_id << 1) | + ((is_top_field ^ 1) & is_bottom_field)); +} + +/* Fill in Reference List Entries (Gen5+: ILK, SNB, IVB) */ +void +gen5_fill_avc_ref_idx_state( + uint8_t state[32], + const VAPictureH264 ref_list[32], + unsigned int ref_list_count, + const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +) +{ + int i, j; + + for (i = 0; i < ref_list_count; i++) { + const VAPictureH264 * const va_pic = &ref_list[i]; + + if ((va_pic->flags & VA_PICTURE_H264_INVALID) || + va_pic->picture_id == VA_INVALID_ID) { + state[i] = 0xff; + continue; + } + + for (j = 0; j < MAX_GEN_REFERENCE_FRAMES; j++) { + if (frame_store[j].surface_id == va_pic->picture_id) + break; + } + + if (j != MAX_GEN_REFERENCE_FRAMES) { // Found picture in the Frame Store + const GenFrameStore * const fs = &frame_store[j]; + assert(fs->frame_store_id == j); // Current architecture/assumption + state[i] = get_ref_idx_state_1(va_pic, fs->frame_store_id); + } + else { + WARN_ONCE("Invalid RefPicListX[] entry!!! It is not included in DPB\n"); + state[i] = get_ref_idx_state_1(va_pic, 0) | 0x80; + } + } + + for (; i < 32; i++) + state[i] = 0xff; +} + +/* Emit Reference List Entries (Gen6+: SNB, IVB) */ +static void +gen6_send_avc_ref_idx_state_1( + struct intel_batchbuffer *batch, + unsigned int list, + const VAPictureH264 *ref_list, + unsigned int ref_list_count, + const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +) +{ + uint8_t ref_idx_state[32]; + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2)); + OUT_BCS_BATCH(batch, list); + gen5_fill_avc_ref_idx_state( + ref_idx_state, + ref_list, ref_list_count, + frame_store + ); + intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state)); + ADVANCE_BCS_BATCH(batch); +} + +void +gen6_send_avc_ref_idx_state( + struct intel_batchbuffer *batch, + const VASliceParameterBufferH264 *slice_param, + const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +) +{ + if (slice_param->slice_type == SLICE_TYPE_I || + slice_param->slice_type == SLICE_TYPE_SI) + return; + + /* RefPicList0 */ + gen6_send_avc_ref_idx_state_1( + batch, 0, + slice_param->RefPicList0, slice_param->num_ref_idx_l0_active_minus1 + 1, + frame_store + ); + + if (slice_param->slice_type != SLICE_TYPE_B) + return; + + /* RefPicList1 */ + gen6_send_avc_ref_idx_state_1( + batch, 1, + slice_param->RefPicList1, slice_param->num_ref_idx_l1_active_minus1 + 1, + frame_store + ); +} + +static void +gen6_mfd_avc_phantom_slice_state(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *next_slice_param, + struct intel_batchbuffer *batch) +{ + int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1; + int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */ + int slice_hor_pos, slice_ver_pos, slice_start_mb_num, next_slice_hor_pos, next_slice_ver_pos; + int mbaff_picture = (!pic_param->pic_fields.bits.field_pic_flag && + pic_param->seq_fields.bits.mb_adaptive_frame_field_flag); + + if (next_slice_param) { + int first_mb_in_next_slice; + + slice_hor_pos = 0; + slice_ver_pos = 0; + slice_start_mb_num = 0; + first_mb_in_next_slice = next_slice_param->first_mb_in_slice << mbaff_picture; + next_slice_hor_pos = first_mb_in_next_slice % width_in_mbs; + next_slice_ver_pos = first_mb_in_next_slice / width_in_mbs; + } else { + slice_hor_pos = 0; + slice_ver_pos = height_in_mbs; + slice_start_mb_num = width_in_mbs * height_in_mbs / (1 + !!pic_param->pic_fields.bits.field_pic_flag); + next_slice_hor_pos = 0; + next_slice_ver_pos = 0; + } + + BEGIN_BCS_BATCH(batch, 11); + OUT_BCS_BATCH(batch, MFX_AVC_SLICE_STATE | (11 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, + slice_ver_pos << 24 | + slice_hor_pos << 16 | + slice_start_mb_num << 0); + OUT_BCS_BATCH(batch, + next_slice_ver_pos << 16 | + next_slice_hor_pos << 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +static void +gen6_mfd_avc_phantom_slice_bsd_object(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + struct intel_batchbuffer *batch) +{ + + BEGIN_BCS_BATCH(batch, 6); + OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2)); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + ADVANCE_BCS_BATCH(batch); +} + +void +gen6_mfd_avc_phantom_slice(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *next_slice_param, + struct intel_batchbuffer *batch) +{ + gen6_mfd_avc_phantom_slice_state(ctx, pic_param, next_slice_param, batch); + gen6_mfd_avc_phantom_slice_bsd_object(ctx, pic_param, batch); +} + +/* Comparison function for sorting out the array of free frame store entries */ +static int +compare_avc_ref_store_func(const void *p1, const void *p2) +{ + const GenFrameStore * const fs1 = *((GenFrameStore **)p1); + const GenFrameStore * const fs2 = *((GenFrameStore **)p2); + + return fs1->ref_age - fs2->ref_age; +} + +static void +intel_update_codec_frame_store_index( + VADriverContextP ctx, + struct decode_state *decode_state, + int poc, + GenFrameStore frame_store[], + int num_elements, + GenFrameStoreContext *fs_ctx +) +{ + GenFrameStore **free_refs = calloc(num_elements, sizeof(GenFrameStore *)); + uint32_t used_refs = 0, add_refs = 0; + uint64_t age; + int i, n, num_free_refs; + + if (!free_refs) + return; + + /* Detect changes of access unit */ + if (fs_ctx->age == 0 || fs_ctx->prev_poc != poc) + fs_ctx->age++; + fs_ctx->prev_poc = poc; + age = fs_ctx->age; + + /* Tag entries that are still available in our Frame Store */ + for (i = 0; i < ARRAY_ELEMS(decode_state->reference_objects); i++) { + struct object_surface * const obj_surface = + decode_state->reference_objects[i]; + if (!obj_surface) + continue; + + GenCodecSurface * const codec_surface = obj_surface->private_data; + if (!codec_surface) + continue; + if (codec_surface->frame_store_id >= 0) { + GenFrameStore * const fs = + &frame_store[codec_surface->frame_store_id]; + if (fs->surface_id == obj_surface->base.id) { + fs->obj_surface = obj_surface; + fs->ref_age = age; + used_refs |= 1 << fs->frame_store_id; + continue; + } + } + add_refs |= 1 << i; + } + + /* Build and sort out the list of retired candidates. The resulting + list is ordered by increasing age when they were last used */ + for (i = 0, n = 0; i < num_elements; i++) { + if (!(used_refs & (1 << i))) { + GenFrameStore * const fs = &frame_store[i]; + fs->obj_surface = NULL; + free_refs[n++] = fs; + } + } + num_free_refs = n; + qsort(&free_refs[0], n, sizeof(free_refs[0]), compare_avc_ref_store_func); + + /* Append the new reference frames */ + for (i = 0, n = 0; i < ARRAY_ELEMS(decode_state->reference_objects); i++) { + struct object_surface * const obj_surface = + decode_state->reference_objects[i]; + if (!obj_surface || !(add_refs & (1 << i))) + continue; + + GenCodecSurface * const codec_surface = obj_surface->private_data; + if (!codec_surface) + continue; + if (n < num_free_refs) { + GenFrameStore * const fs = free_refs[n++]; + fs->surface_id = obj_surface->base.id; + fs->obj_surface = obj_surface; + fs->frame_store_id = fs - frame_store; + fs->ref_age = age; + codec_surface->frame_store_id = fs->frame_store_id; + continue; + } + WARN_ONCE("No free slot found for DPB reference list!!!\n"); + } + + free(free_refs); +} + +void +intel_update_avc_frame_store_index( + VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES], + GenFrameStoreContext *fs_ctx +) +{ + intel_update_codec_frame_store_index(ctx, + decode_state, + avc_get_picture_poc(&pic_param->CurrPic), + frame_store, + MAX_GEN_REFERENCE_FRAMES, + fs_ctx); +} + +void +intel_update_hevc_frame_store_index( + VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferHEVC *pic_param, + GenFrameStore frame_store[MAX_GEN_HCP_REFERENCE_FRAMES], + GenFrameStoreContext *fs_ctx + ) +{ + int i, n = 0; + + for (i = 0; i < ARRAY_ELEMS(decode_state->reference_objects); i++) { + struct object_surface * const obj_surface = decode_state->reference_objects[i]; + + if (!obj_surface) + continue; + + GenFrameStore * const fs = &frame_store[n]; + fs->surface_id = obj_surface->base.id; + fs->obj_surface = obj_surface; + fs->frame_store_id = n++; + + if (n == MAX_GEN_HCP_REFERENCE_FRAMES) + break; + } + + for (; n < MAX_GEN_HCP_REFERENCE_FRAMES; n++) { + GenFrameStore * const fs = &frame_store[n]; + + fs->surface_id = VA_INVALID_ID; + fs->obj_surface = NULL; + fs->frame_store_id = -1; + } +} + +void +gen75_update_avc_frame_store_index( + VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +) +{ + int i, n; + + /* Construct the Frame Store array, in compact form. i.e. empty or + invalid entries are discarded. */ + for (i = 0, n = 0; i < ARRAY_ELEMS(decode_state->reference_objects); i++) { + struct object_surface * const obj_surface = + decode_state->reference_objects[i]; + if (!obj_surface) + continue; + + GenFrameStore * const fs = &frame_store[n]; + fs->surface_id = obj_surface->base.id; + fs->obj_surface = obj_surface; + fs->frame_store_id = n++; + } + + /* Any remaining entry is marked as invalid */ + for (; n < MAX_GEN_REFERENCE_FRAMES; n++) { + GenFrameStore * const fs = &frame_store[n]; + fs->surface_id = VA_INVALID_ID; + fs->obj_surface = NULL; + fs->frame_store_id = -1; + } +} + +bool +gen75_fill_avc_picid_list( + uint16_t pic_ids[16], + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +) +{ + int i, pic_id; + + /* Fill in with known picture IDs. The Frame Store array is in + compact form, i.e. empty entries are only to be found at the + end of the array: there are no holes in the set of active + reference frames */ + for (i = 0; i < MAX_GEN_REFERENCE_FRAMES; i++) { + GenFrameStore * const fs = &frame_store[i]; + if (!fs->obj_surface) + break; + pic_id = avc_get_picture_id(fs->obj_surface); + if (pic_id < 0) + return false; + pic_ids[i] = pic_id; + } + + /* When an element of the list is not relevant the value of the + picture ID shall be set to 0 */ + for (; i < MAX_GEN_REFERENCE_FRAMES; i++) + pic_ids[i] = 0; + return true; +} + +bool +gen75_send_avc_picid_state( + struct intel_batchbuffer *batch, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +) +{ + uint16_t pic_ids[16]; + + if (!gen75_fill_avc_picid_list(pic_ids, frame_store)) + return false; + + BEGIN_BCS_BATCH(batch, 10); + OUT_BCS_BATCH(batch, MFD_AVC_PICID_STATE | (10 - 2)); + OUT_BCS_BATCH(batch, 0); // enable Picture ID Remapping + intel_batchbuffer_data(batch, pic_ids, sizeof(pic_ids)); + ADVANCE_BCS_BATCH(batch); + return true; +} + +void +intel_update_vc1_frame_store_index(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferVC1 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]) +{ + struct object_surface *obj_surface; + int i; + + obj_surface = decode_state->reference_objects[0]; + + if (pic_param->forward_reference_picture == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[0].surface_id = VA_INVALID_ID; + frame_store[0].obj_surface = NULL; + } else { + frame_store[0].surface_id = pic_param->forward_reference_picture; + frame_store[0].obj_surface = obj_surface; + } + + obj_surface = decode_state->reference_objects[1]; + + if (pic_param->backward_reference_picture == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[1].surface_id = frame_store[0].surface_id; + frame_store[1].obj_surface = frame_store[0].obj_surface; + } else { + frame_store[1].surface_id = pic_param->backward_reference_picture; + frame_store[1].obj_surface = obj_surface; + } + for (i = 2; i < MAX_GEN_REFERENCE_FRAMES; i++) { + frame_store[i].surface_id = frame_store[i % 2].surface_id; + frame_store[i].obj_surface = frame_store[i % 2].obj_surface; + } + +} + +void +intel_update_vp8_frame_store_index(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferVP8 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]) +{ + struct object_surface *obj_surface; + int i; + + obj_surface = decode_state->reference_objects[0]; + + if (pic_param->last_ref_frame == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[0].surface_id = VA_INVALID_ID; + frame_store[0].obj_surface = NULL; + } else { + frame_store[0].surface_id = pic_param->last_ref_frame; + frame_store[0].obj_surface = obj_surface; + } + + obj_surface = decode_state->reference_objects[1]; + + if (pic_param->golden_ref_frame == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[1].surface_id = frame_store[0].surface_id; + frame_store[1].obj_surface = frame_store[0].obj_surface; + } else { + frame_store[1].surface_id = pic_param->golden_ref_frame; + frame_store[1].obj_surface = obj_surface; + } + + obj_surface = decode_state->reference_objects[2]; + + if (pic_param->alt_ref_frame == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[2].surface_id = frame_store[0].surface_id; + frame_store[2].obj_surface = frame_store[0].obj_surface; + } else { + frame_store[2].surface_id = pic_param->alt_ref_frame; + frame_store[2].obj_surface = obj_surface; + } + + for (i = 3; i < MAX_GEN_REFERENCE_FRAMES; i++) { + frame_store[i].surface_id = frame_store[i % 2].surface_id; + frame_store[i].obj_surface = frame_store[i % 2].obj_surface; + } + +} + +//Obtain the reference frames from the decode state and store them in frame store. +void +intel_update_vp9_frame_store_index(VADriverContextP ctx, + struct decode_state *decode_state, + VADecPictureParameterBufferVP9 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]) +{ + struct object_surface *obj_surface; + int i=0, index=0; + + //Check for the validity of the last reference frame + obj_surface = decode_state->reference_objects[0]; + + index = pic_param->pic_fields.bits.last_ref_frame; + if (pic_param->reference_frames[index] == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[0].surface_id = VA_INVALID_ID; + frame_store[0].obj_surface = NULL; + } else { + frame_store[0].surface_id = pic_param->reference_frames[index]; + frame_store[0].obj_surface = obj_surface; + } + + //Check for the validity of the golden reference frame + obj_surface = decode_state->reference_objects[1]; + + index = pic_param->pic_fields.bits.golden_ref_frame; + if (pic_param->reference_frames[index] == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[1].surface_id = frame_store[0].surface_id; + frame_store[1].obj_surface = frame_store[0].obj_surface; + } else { + frame_store[1].surface_id = pic_param->reference_frames[index]; + frame_store[1].obj_surface = obj_surface; + } + + //Check for the validity of the altref reference frame + obj_surface = decode_state->reference_objects[2]; + + index = pic_param->pic_fields.bits.alt_ref_frame; + if (pic_param->reference_frames[index] == VA_INVALID_ID || + !obj_surface || + !obj_surface->bo) { + frame_store[2].surface_id = frame_store[0].surface_id; + frame_store[2].obj_surface = frame_store[0].obj_surface; + } else { + frame_store[2].surface_id = pic_param->reference_frames[index]; + frame_store[2].obj_surface = obj_surface; + } + + //Set the remaining framestores to either last/golden/altref + for (i = 3; i < MAX_GEN_REFERENCE_FRAMES; i++) { + frame_store[i].surface_id = frame_store[i % 2].surface_id; + frame_store[i].obj_surface = frame_store[i % 2].obj_surface; + } + +} + +static VAStatus +intel_decoder_check_avc_parameter(VADriverContextP ctx, + VAProfile h264_profile, + struct decode_state *decode_state) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAPictureParameterBufferH264 *pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer; + VAStatus va_status; + struct object_surface *obj_surface; + int i; + VASliceParameterBufferH264 *slice_param, *next_slice_param, *next_slice_group_param; + int j; + + assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); + assert(pic_param->CurrPic.picture_id != VA_INVALID_SURFACE); + + if (pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID || + pic_param->CurrPic.picture_id == VA_INVALID_SURFACE) + goto error; + + assert(pic_param->CurrPic.picture_id == decode_state->current_render_target); + + if (pic_param->CurrPic.picture_id != decode_state->current_render_target) + goto error; + + if ((h264_profile != VAProfileH264Baseline)) { + if (pic_param->num_slice_groups_minus1 || + pic_param->pic_fields.bits.redundant_pic_cnt_present_flag) { + WARN_ONCE("Unsupported the FMO/ASO constraints!!!\n"); + goto error; + } + } + + /* Fill in the reference objects array with the actual VA surface + objects with 1:1 correspondance with any entry in ReferenceFrames[], + i.e. including "holes" for invalid entries, that are expanded + to NULL in the reference_objects[] array */ + for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { + const VAPictureH264 * const va_pic = &pic_param->ReferenceFrames[i]; + + obj_surface = NULL; + if (!(va_pic->flags & VA_PICTURE_H264_INVALID) && + va_pic->picture_id != VA_INVALID_ID) { + obj_surface = SURFACE(pic_param->ReferenceFrames[i].picture_id); + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + /* + * Sometimes a dummy frame comes from the upper layer + * library, call i965_check_alloc_surface_bo() to make + * sure the store buffer is allocated for this reference + * frame + */ + va_status = avc_ensure_surface_bo(ctx, decode_state, obj_surface, + pic_param); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + } + decode_state->reference_objects[i] = obj_surface; + } + + for (j = 0; j < decode_state->num_slice_params; j++) { + assert(decode_state->slice_params && decode_state->slice_params[j]->buffer); + slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer; + + if (j == decode_state->num_slice_params - 1) + next_slice_group_param = NULL; + else + next_slice_group_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer; + + for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { + + if (i < decode_state->slice_params[j]->num_elements - 1) + next_slice_param = slice_param + 1; + else + next_slice_param = next_slice_group_param; + + if (next_slice_param != NULL) { + /* If the mb position of next_slice is less than or equal to the current slice, + * discard the current frame. + */ + if (next_slice_param->first_mb_in_slice <= slice_param->first_mb_in_slice) { + next_slice_param = NULL; + WARN_ONCE("!!!incorrect slice_param. The first_mb_in_slice of next_slice is less" + " than or equal to that in current slice\n"); + goto error; + } + } + } + } + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_decoder_check_mpeg2_parameter(VADriverContextP ctx, + struct decode_state *decode_state) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAPictureParameterBufferMPEG2 *pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + struct object_surface *obj_surface; + int i = 0; + + if (pic_param->picture_coding_type == MPEG_I_PICTURE) { + } else if (pic_param->picture_coding_type == MPEG_P_PICTURE) { + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (!obj_surface || !obj_surface->bo) + decode_state->reference_objects[i++] = NULL; + else + decode_state->reference_objects[i++] = obj_surface; + } else if (pic_param->picture_coding_type == MPEG_B_PICTURE) { + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (!obj_surface || !obj_surface->bo) + decode_state->reference_objects[i++] = NULL; + else + decode_state->reference_objects[i++] = obj_surface; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (!obj_surface || !obj_surface->bo) + decode_state->reference_objects[i++] = NULL; + else + decode_state->reference_objects[i++] = obj_surface; + } else + goto error; + + for ( ; i < 16; i++) + decode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_decoder_check_vc1_parameter(VADriverContextP ctx, + struct decode_state *decode_state) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAPictureParameterBufferVC1 *pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer; + struct object_surface *obj_surface; + int i = 0; + + if (pic_param->sequence_fields.bits.interlace == 1 && + pic_param->picture_fields.bits.frame_coding_mode != 0) { /* frame-interlace or field-interlace */ + return VA_STATUS_ERROR_DECODING_ERROR; + } + + if (pic_param->picture_fields.bits.picture_type == 0 || + pic_param->picture_fields.bits.picture_type == 3) { + } else if (pic_param->picture_fields.bits.picture_type == 1 || + pic_param->picture_fields.bits.picture_type == 4) { + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (!obj_surface || !obj_surface->bo) + decode_state->reference_objects[i++] = NULL; + else + decode_state->reference_objects[i++] = obj_surface; + } else if (pic_param->picture_fields.bits.picture_type == 2) { + obj_surface = SURFACE(pic_param->forward_reference_picture); + + if (!obj_surface || !obj_surface->bo) + decode_state->reference_objects[i++] = NULL; + else + decode_state->reference_objects[i++] = obj_surface; + + obj_surface = SURFACE(pic_param->backward_reference_picture); + + if (!obj_surface || !obj_surface->bo) + decode_state->reference_objects[i++] = NULL; + else + decode_state->reference_objects[i++] = obj_surface; + } else + goto error; + + for ( ; i < 16; i++) + decode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_decoder_check_vp8_parameter(VADriverContextP ctx, + struct decode_state *decode_state) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAPictureParameterBufferVP8 *pic_param = (VAPictureParameterBufferVP8 *)decode_state->pic_param->buffer; + struct object_surface *obj_surface; + int i = 0; + + if (pic_param->last_ref_frame != VA_INVALID_SURFACE) { + obj_surface = SURFACE(pic_param->last_ref_frame); + + if (obj_surface && obj_surface->bo) + decode_state->reference_objects[i++] = obj_surface; + else + decode_state->reference_objects[i++] = NULL; + } + + if (pic_param->golden_ref_frame != VA_INVALID_SURFACE) { + obj_surface = SURFACE(pic_param->golden_ref_frame); + + if (obj_surface && obj_surface->bo) + decode_state->reference_objects[i++] = obj_surface; + else + decode_state->reference_objects[i++] = NULL; + } + + if (pic_param->alt_ref_frame != VA_INVALID_SURFACE) { + obj_surface = SURFACE(pic_param->alt_ref_frame); + + if (obj_surface && obj_surface->bo) + decode_state->reference_objects[i++] = obj_surface; + else + decode_state->reference_objects[i++] = NULL; + } + + for ( ; i < 16; i++) + decode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; +} + +VAStatus +hevc_ensure_surface_bo( + VADriverContextP ctx, + struct decode_state *decode_state, + struct object_surface *obj_surface, + const VAPictureParameterBufferHEVC *pic_param +) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + int update = 0; + unsigned int fourcc = VA_FOURCC_NV12; + + if((pic_param->bit_depth_luma_minus8 > 0) + || (pic_param->bit_depth_chroma_minus8 > 0)) + { + if(obj_surface->fourcc != VA_FOURCC_P010) + { + update = 1; + fourcc = VA_FOURCC_P010; + } + } + else if(obj_surface->fourcc != VA_FOURCC_NV12) + { + update = 1; + fourcc = VA_FOURCC_NV12; + } + + /* (Re-)allocate the underlying surface buffer store, if necessary */ + if (!obj_surface->bo || update) { + struct i965_driver_data * const i965 = i965_driver_data(ctx); + + i965_destroy_surface_storage(obj_surface); + + va_status = i965_check_alloc_surface_bo(ctx, + obj_surface, + i965->codec_info->has_tiled_surface, + fourcc, + SUBSAMPLE_YUV420); + } + + return va_status; +} + +//Ensure there is a tiled render surface in NV12 format. If not, create one. +VAStatus +vp9_ensure_surface_bo( + VADriverContextP ctx, + struct decode_state *decode_state, + struct object_surface *obj_surface, + const VADecPictureParameterBufferVP9 *pic_param +) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + int update = 0; + unsigned int fourcc = VA_FOURCC_NV12; + + if(pic_param->profile >= 2) + { + if(obj_surface->fourcc != VA_FOURCC_P010) + { + update = 1; + fourcc = VA_FOURCC_P010; + } + } + else if(obj_surface->fourcc != VA_FOURCC_NV12) + { + update = 1; + fourcc = VA_FOURCC_NV12; + } + + /* (Re-)allocate the underlying surface buffer store, if necessary */ + if (!obj_surface->bo || update) { + struct i965_driver_data * const i965 = i965_driver_data(ctx); + + i965_destroy_surface_storage(obj_surface); + + va_status = i965_check_alloc_surface_bo(ctx, + obj_surface, + i965->codec_info->has_tiled_surface, + fourcc, + SUBSAMPLE_YUV420); + } + + return va_status; +} + +static VAStatus +intel_decoder_check_hevc_parameter(VADriverContextP ctx, + struct decode_state *decode_state) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAPictureParameterBufferHEVC *pic_param = (VAPictureParameterBufferHEVC *)decode_state->pic_param->buffer; + VAStatus va_status = VA_STATUS_ERROR_INVALID_PARAMETER; + struct object_surface *obj_surface; + int i; + int min_cb_size; + + if (pic_param->CurrPic.flags & VA_PICTURE_HEVC_INVALID || + pic_param->CurrPic.picture_id == VA_INVALID_SURFACE) + goto error; + + if (pic_param->CurrPic.picture_id != decode_state->current_render_target) + goto error; + + min_cb_size = (1 << (pic_param->log2_min_luma_coding_block_size_minus3 + 3)); + + if (pic_param->pic_width_in_luma_samples % min_cb_size || + pic_param->pic_height_in_luma_samples % min_cb_size) + goto error; + + /* Fill in the reference objects array with the actual VA surface + objects with 1:1 correspondance with any entry in ReferenceFrames[], + i.e. including "holes" for invalid entries, that are expanded + to NULL in the reference_objects[] array */ + for (i = 0; i < ARRAY_ELEMS(pic_param->ReferenceFrames); i++) { + const VAPictureHEVC * const va_pic = &pic_param->ReferenceFrames[i]; + + obj_surface = NULL; + + /* + * Only the index with (VA_PICTURE_HEVC_RPS_ST_CURR_BEFORE | + * VA_PICTURE_HEVC_RPS_ST_CURR_AFTER | VA_PICTURE_HEVC_RPS_LT_CURR) + * is valid + */ + if (!(va_pic->flags & VA_PICTURE_HEVC_INVALID) && + (va_pic->picture_id != VA_INVALID_ID) && + (va_pic->flags & (VA_PICTURE_HEVC_RPS_ST_CURR_BEFORE | + VA_PICTURE_HEVC_RPS_ST_CURR_AFTER | + VA_PICTURE_HEVC_RPS_LT_CURR))) { + + obj_surface = SURFACE(pic_param->ReferenceFrames[i].picture_id); + + if (!obj_surface) { + va_status = VA_STATUS_ERROR_INVALID_SURFACE; + goto error; + } + + va_status = hevc_ensure_surface_bo(ctx, decode_state, obj_surface, + pic_param); + + if (va_status != VA_STATUS_SUCCESS) + goto error; + } + + decode_state->reference_objects[i] = obj_surface; + } + + va_status = VA_STATUS_SUCCESS; + +error: + return va_status; +} + +//Obtains reference frames from the picture parameter and +//then sets the reference frames in the decode_state +static VAStatus +intel_decoder_check_vp9_parameter(VADriverContextP ctx, + VAProfile profile, + struct decode_state *decode_state) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VADecPictureParameterBufferVP9 *pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + VAStatus va_status = VA_STATUS_ERROR_INVALID_PARAMETER; + struct object_surface *obj_surface; + int i=0, index=0; + + if((profile - VAProfileVP9Profile0) < pic_param->profile) + return va_status; + + //Max support upto 4k for BXT + if ((pic_param->frame_width-1 < 0) || (pic_param->frame_width-1 > 4095)) + return va_status; + + if ((pic_param->frame_height-1 < 0) || (pic_param->frame_height-1 > 4095)) + return va_status; + + //Set the reference object in decode state for last reference + index = pic_param->pic_fields.bits.last_ref_frame; + if (pic_param->reference_frames[index] != VA_INVALID_SURFACE) { + obj_surface = SURFACE(pic_param->reference_frames[index]); + + if (obj_surface && obj_surface->bo) + decode_state->reference_objects[i++] = obj_surface; + else + decode_state->reference_objects[i++] = NULL; + } + + //Set the reference object in decode state for golden reference + index = pic_param->pic_fields.bits.golden_ref_frame; + if (pic_param->reference_frames[index] != VA_INVALID_SURFACE) { + obj_surface = SURFACE(pic_param->reference_frames[index]); + + if (obj_surface && obj_surface->bo) + decode_state->reference_objects[i++] = obj_surface; + else + decode_state->reference_objects[i++] = NULL; + } + + //Set the reference object in decode state for altref reference + index = pic_param->pic_fields.bits.alt_ref_frame; + if (pic_param->reference_frames[index] != VA_INVALID_SURFACE) { + obj_surface = SURFACE(pic_param->reference_frames[index]); + + if (obj_surface && obj_surface->bo) + decode_state->reference_objects[i++] = obj_surface; + else + decode_state->reference_objects[i++] = NULL; + } + + for ( ; i < 16; i++) + decode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; +} + +VAStatus +intel_decoder_sanity_check_input(VADriverContextP ctx, + VAProfile profile, + struct decode_state *decode_state) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + VAStatus vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + + if (decode_state->current_render_target == VA_INVALID_SURFACE) + goto out; + + obj_surface = SURFACE(decode_state->current_render_target); + + if (!obj_surface) + goto out; + + decode_state->render_object = obj_surface; + + switch (profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + vaStatus = intel_decoder_check_mpeg2_parameter(ctx, decode_state); + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264StereoHigh: + case VAProfileH264MultiviewHigh: + vaStatus = intel_decoder_check_avc_parameter(ctx, profile, decode_state); + break; + + case VAProfileVC1Simple: + case VAProfileVC1Main: + case VAProfileVC1Advanced: + vaStatus = intel_decoder_check_vc1_parameter(ctx, decode_state); + break; + + case VAProfileJPEGBaseline: + vaStatus = VA_STATUS_SUCCESS; + break; + + case VAProfileVP8Version0_3: + vaStatus = intel_decoder_check_vp8_parameter(ctx, decode_state); + break; + + case VAProfileHEVCMain: + case VAProfileHEVCMain10: + vaStatus = intel_decoder_check_hevc_parameter(ctx, decode_state); + break; + + case VAProfileVP9Profile0: + case VAProfileVP9Profile2: + vaStatus = intel_decoder_check_vp9_parameter(ctx, profile, decode_state); + break; + + default: + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + break; + } + +out: + return vaStatus; +} + +/* + * Return the next slice paramter + * + * Input: + * slice_param: the current slice + * *group_idx & *element_idx the current slice position in slice groups + * Output: + * Return the next slice parameter + * *group_idx & *element_idx the next slice position in slice groups, + * if the next slice is NULL, *group_idx & *element_idx will be ignored + */ +VASliceParameterBufferMPEG2 * +intel_mpeg2_find_next_slice(struct decode_state *decode_state, + VAPictureParameterBufferMPEG2 *pic_param, + VASliceParameterBufferMPEG2 *slice_param, + int *group_idx, + int *element_idx) +{ + VASliceParameterBufferMPEG2 *next_slice_param; + unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16; + int j = *group_idx, i = *element_idx + 1; + + for (; j < decode_state->num_slice_params; j++) { + for (; i < decode_state->slice_params[j]->num_elements; i++) { + next_slice_param = ((VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer) + i; + + if ((next_slice_param->slice_vertical_position * width_in_mbs + next_slice_param->slice_horizontal_position) >= + (slice_param->slice_vertical_position * width_in_mbs + slice_param->slice_horizontal_position)) { + *group_idx = j; + *element_idx = i; + + return next_slice_param; + } + } + + i = 0; + } + + return NULL; +} + +/* Ensure the segmentation buffer is large enough for the supplied + number of MBs, or re-allocate it */ +bool +intel_ensure_vp8_segmentation_buffer(VADriverContextP ctx, GenBuffer *buf, + unsigned int mb_width, unsigned int mb_height) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + /* The segmentation map is a 64-byte aligned linear buffer, with + each cache line holding only 8 bits for 4 continuous MBs */ + const unsigned int buf_size = ((mb_width + 3) / 4) * 64 * mb_height; + + if (buf->valid) { + if (buf->bo && buf->bo->size >= buf_size) + return true; + drm_intel_bo_unreference(buf->bo); + buf->valid = false; + } + + buf->bo = drm_intel_bo_alloc(i965->intel.bufmgr, "segmentation map", + buf_size, 0x1000); + buf->valid = buf->bo != NULL; + return buf->valid; +} + +void +hevc_gen_default_iq_matrix(VAIQMatrixBufferHEVC *iq_matrix) +{ + /* Flat_4x4_16 */ + memset(&iq_matrix->ScalingList4x4, 16, sizeof(iq_matrix->ScalingList4x4)); + + /* Flat_8x8_16 */ + memset(&iq_matrix->ScalingList8x8, 16, sizeof(iq_matrix->ScalingList8x8)); + + /* Flat_16x16_16 */ + memset(&iq_matrix->ScalingList16x16, 16, sizeof(iq_matrix->ScalingList16x16)); + + /* Flat_32x32_16 */ + memset(&iq_matrix->ScalingList32x32, 16, sizeof(iq_matrix->ScalingList32x32)); + + /* Flat_16x16_dc_16 */ + memset(&iq_matrix->ScalingListDC16x16, 16, sizeof(iq_matrix->ScalingListDC16x16)); + + /* Flat_32x32_dc_16 */ + memset(&iq_matrix->ScalingListDC32x32, 16, sizeof(iq_matrix->ScalingListDC32x32)); +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_decoder_utils.h intel-vaapi-driver-1.7.1/src/i965_decoder_utils.h --- intel-vaapi-driver-1.0.15/src/i965_decoder_utils.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_decoder_utils.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,190 @@ +/* + * Copyright (C) 2006-2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef I965_DECODER_UTILS_H +#define I965_DECODER_UTILS_H + +#include "i965_decoder.h" +#include "intel_batchbuffer.h" + +struct decode_state; + +int +mpeg2_wa_slice_vertical_position( + struct decode_state *decode_state, + VAPictureParameterBufferMPEG2 *pic_param +); + +void +mpeg2_set_reference_surfaces( + VADriverContextP ctx, + GenFrameStore ref_frames[MAX_GEN_REFERENCE_FRAMES], + struct decode_state *decode_state, + VAPictureParameterBufferMPEG2 *pic_param +); + +VAStatus +avc_ensure_surface_bo( + VADriverContextP ctx, + struct decode_state *decode_state, + struct object_surface *obj_surface, + const VAPictureParameterBufferH264 *pic_param +); + +void +avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix); + +int +avc_get_picture_id(struct object_surface *obj_surface); + +VAPictureH264 * +avc_find_picture(VASurfaceID id, VAPictureH264 *pic_list, int pic_list_count); + +unsigned int +avc_get_first_mb_bit_offset( + dri_bo *slice_data_bo, + VASliceParameterBufferH264 *slice_param, + unsigned int mode_flag +); + +unsigned int +avc_get_first_mb_bit_offset_with_epb( + dri_bo *slice_data_bo, + VASliceParameterBufferH264 *slice_param, + unsigned int mode_flag +); + +void +gen5_fill_avc_ref_idx_state( + uint8_t state[32], + const VAPictureH264 ref_list[32], + unsigned int ref_list_count, + const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +); + +void +gen6_send_avc_ref_idx_state( + struct intel_batchbuffer *batch, + const VASliceParameterBufferH264 *slice_param, + const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +); + +void +gen6_mfd_avc_phantom_slice(VADriverContextP ctx, + VAPictureParameterBufferH264 *pic_param, + VASliceParameterBufferH264 *next_slice_param, + struct intel_batchbuffer *batch +); + +VAStatus +intel_decoder_sanity_check_input(VADriverContextP ctx, + VAProfile profile, + struct decode_state *decode_state); + +void +intel_update_avc_frame_store_index( + VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES], + GenFrameStoreContext *fs_ctx +); + +void +intel_update_hevc_frame_store_index( + VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferHEVC *pic_param, + GenFrameStore frame_store[MAX_GEN_HCP_REFERENCE_FRAMES], + GenFrameStoreContext *fs_ctx +); + +void +gen75_update_avc_frame_store_index( + VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferH264 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +); + +bool +gen75_fill_avc_picid_list( + uint16_t pic_ids[16], + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +); + +bool +gen75_send_avc_picid_state( + struct intel_batchbuffer *batch, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES] +); + +void +intel_update_vc1_frame_store_index(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferVC1 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]); + +VASliceParameterBufferMPEG2 * +intel_mpeg2_find_next_slice(struct decode_state *decode_state, + VAPictureParameterBufferMPEG2 *pic_param, + VASliceParameterBufferMPEG2 *slice_param, + int *group_idx, + int *element_idx); + + +void +intel_update_vp8_frame_store_index(VADriverContextP ctx, + struct decode_state *decode_state, + VAPictureParameterBufferVP8 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]); + +void +intel_update_vp9_frame_store_index(VADriverContextP ctx, + struct decode_state *decode_state, + VADecPictureParameterBufferVP9 *pic_param, + GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]); + +bool +intel_ensure_vp8_segmentation_buffer(VADriverContextP ctx, GenBuffer *buf, + unsigned int mb_width, unsigned int mb_height); + +void +hevc_gen_default_iq_matrix(VAIQMatrixBufferHEVC *iq_matrix); + +VAStatus +hevc_ensure_surface_bo( + VADriverContextP ctx, + struct decode_state *decode_state, + struct object_surface *obj_surface, + const VAPictureParameterBufferHEVC *pic_param +); + +VAStatus +vp9_ensure_surface_bo( + VADriverContextP ctx, + struct decode_state *decode_state, + struct object_surface *obj_surface, + const VADecPictureParameterBufferVP9 *pic_param +); +#endif /* I965_DECODER_UTILS_H */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_defines.h intel-vaapi-driver-1.7.1/src/i965_defines.h --- intel-vaapi-driver-1.0.15/src/i965_defines.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_defines.h 2016-06-21 01:35:12.000000000 +0000 @@ -106,6 +106,11 @@ # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 +#define GEN8_3DSTATE_RASTER CMD(3, 0, 0x50) +# define GEN8_3DSTATE_RASTER_CULL_BOTH (0 << 16) +# define GEN8_3DSTATE_RASTER_CULL_NONE (1 << 16) +# define GEN8_3DSTATE_RASTER_CULL_FRONT (2 << 16) +# define GEN8_3DSTATE_RASTER_CULL_BACK (3 << 16) #define GEN6_3DSTATE_WM CMD(3, 0, 0x14) /* DW2 */ @@ -173,6 +178,10 @@ #define GEN6_3DSTATE_CONSTANT_GS CMD(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS CMD(3, 0, 0x17) +/* Gen8 WM_HZ_OP */ +#define GEN8_3DSTATE_WM_HZ_OP CMD(3, 0, 0x52) + + # define GEN6_3DSTATE_CONSTANT_BUFFER_3_ENABLE (1 << 15) # define GEN6_3DSTATE_CONSTANT_BUFFER_2_ENABLE (1 << 14) # define GEN6_3DSTATE_CONSTANT_BUFFER_1_ENABLE (1 << 13) @@ -188,9 +197,13 @@ # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) +#define GEN8_3DSTATE_MULTISAMPLE CMD(3, 0, 0x0d) +#define GEN8_3DSTATE_SAMPLE_PATTERN CMD(3, 1, 0x1C) + /* GEN7 */ #define GEN7_3DSTATE_CLEAR_PARAMS CMD(3, 0, 0x04) #define GEN7_3DSTATE_DEPTH_BUFFER CMD(3, 0, 0x05) +#define GEN7_3DSTATE_HIER_DEPTH_BUFFER CMD(3, 0, 0x07) #define GEN7_3DSTATE_URB_VS CMD(3, 0, 0x30) #define GEN7_3DSTATE_URB_HS CMD(3, 0, 0x31) @@ -203,8 +216,14 @@ #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS CMD(3, 1, 0x12) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS CMD(3, 1, 0x16) + +#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS CMD(3, 1, 0x14) +#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS CMD(3, 1, 0x13) +#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS CMD(3, 1, 0x15) /* DW1 */ # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 +# define GEN8_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 +# define GEN8_PUSH_CONSTANT_BUFFER_SIZE_SHIFT 0 #define GEN7_3DSTATE_CONSTANT_HS CMD(3, 0, 0x19) #define GEN7_3DSTATE_CONSTANT_DS CMD(3, 0, 0x1a) @@ -222,6 +241,11 @@ # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 +# define GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH (1 << 29) +# define GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET (1 << 28) + +# define GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT 5 +#define GEN8_3DSTATE_SBE_SWIZ CMD(3, 0, 0x51) #define GEN7_3DSTATE_PS CMD(3, 0, 0x20) /* DW1: kernel pointer */ @@ -234,7 +258,9 @@ # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ -# define GEN7_PS_MAX_THREADS_SHIFT 23 +# define GEN7_PS_MAX_THREADS_SHIFT_IVB 24 +# define GEN7_PS_MAX_THREADS_SHIFT_HSW 23 +# define GEN7_PS_SAMPLE_MASK_SHIFT_HSW 12 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) @@ -252,6 +278,37 @@ /* DW6: kernel 1 pointer */ /* DW7: kernel 2 pointer */ +# define GEN8_PS_MAX_THREADS_SHIFT 23 + +#define GEN8_3DSTATE_PSEXTRA CMD(3, 0, 0x4f) +/* DW1 */ +# define GEN8_PSX_PIXEL_SHADER_VALID (1 << 31) +# define GEN8_PSX_PSCDEPTH_OFF (0 << 26) +# define GEN8_PSX_PSCDEPTH_ON (1 << 26) +# define GEN8_PSX_PSCDEPTH_ON_GE (2 << 26) +# define GEN8_PSX_PSCDEPTH_ON_LE (3 << 26) +# define GEN8_PSX_ATTRIBUTE_ENABLE (1 << 8) + +#define GEN8_3DSTATE_PSBLEND CMD(3, 0, 0x4d) +/* DW1 */ +# define GEN8_PS_BLEND_ALPHA_TO_COVERAGE_ENABLE (1 << 31) +# define GEN8_PS_BLEND_HAS_WRITEABLE_RT (1 << 30) +# define GEN8_PS_BLEND_COLOR_BUFFER_BLEND_ENABLE (1 << 29) +# define GEN8_PS_BLEND_SRC_ALPHA_BLEND_FACTOR_MASK INTEL_MASK(28, 24) +# define GEN8_PS_BLEND_SRC_ALPHA_BLEND_FACTOR_SHIFT 24 +# define GEN8_PS_BLEND_DST_ALPHA_BLEND_FACTOR_MASK INTEL_MASK(23, 19) +# define GEN8_PS_BLEND_DST_ALPHA_BLEND_FACTOR_SHIFT 19 +# define GEN8_PS_BLEND_SRC_BLEND_FACTOR_MASK INTEL_MASK(18, 14) +# define GEN8_PS_BLEND_SRC_BLEND_FACTOR_SHIFT 14 +# define GEN8_PS_BLEND_DST_BLEND_FACTOR_MASK INTEL_MASK(13, 9) +# define GEN8_PS_BLEND_DST_BLEND_FACTOR_SHIFT 9 +# define GEN8_PS_BLEND_ALPHA_TEST_ENABLE (1 << 8) +# define GEN8_PS_BLEND_INDEPENDENT_ALPHA_BLEND_ENABLE (1 << 7) + + +#define GEN7_3DSTATE_STENCIL_BUFFER CMD(3, 0, 0x06) +#define GEN8_3DSTATE_WM_DEPTH_STENCIL CMD(3, 0, 0x4e) + #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL CMD(3, 0, 0x21) #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC CMD(3, 0, 0x23) @@ -267,6 +324,14 @@ #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS CMD(3, 0, 0x2b) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS CMD(3, 0, 0x2e) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS CMD(3, 0, 0x2f) +#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS CMD(3, 0, 0x2c) +#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS CMD(3, 0, 0x2d) + +#define GEN7_3DSTATE_VF CMD(3, 0, 0x0c) +#define GEN8_3DSTATE_VF_INSTANCING CMD(3, 0, 0x49) + +#define GEN7_3DSTATE_VF CMD(3, 0, 0x0c) +#define GEN8_3DSTATE_VF_INSTANCING CMD(3, 0, 0x49) #define MFX(pipeline, op, sub_opa, sub_opb) \ (3 << 29 | \ @@ -285,6 +350,8 @@ #define MFX_QM_STATE MFX(2, 0, 0, 7) #define MFX_FQM_STATE MFX(2, 0, 0, 8) +#define MFX_INSERT_OBJECT MFX(2, 0, 2, 8) + #define MFX_WAIT MFX(1, 0, 0, 0) #define MFX_AVC_IMG_STATE MFX(2, 1, 0, 0) @@ -294,6 +361,7 @@ #define MFX_AVC_REF_IDX_STATE MFX(2, 1, 0, 4) #define MFX_AVC_WEIGHTOFFSET_STATE MFX(2, 1, 0, 5) +#define MFD_AVC_PICID_STATE MFX(2, 1, 1, 5) #define MFD_AVC_BSD_OBJECT MFX(2, 1, 1, 8) #define MFC_AVC_FQM_STATE MFX(2, 1, 2, 2) @@ -305,6 +373,9 @@ #define MFD_MPEG2_BSD_OBJECT MFX(2, 3, 1, 8) +#define MFC_MPEG2_SLICEGROUP_STATE MFX(2, 3, 2, 3) +#define MFC_MPEG2_PAK_OBJECT MFX(2, 3, 2, 9) + #define MFX_VC1_PIC_STATE MFX(2, 2, 0, 0) #define MFX_VC1_PRED_PIPE_STATE MFX(2, 2, 0, 1) #define MFX_VC1_DIRECTMODE_STATE MFX(2, 2, 0, 2) @@ -314,6 +385,61 @@ #define MFD_VC1_BSD_OBJECT MFX(2, 2, 1, 8) +//MFX_JPEG #defines for JPEG decoder only +#define MFX_JPEG_PIC_STATE MFX(2, 7, 0, 0) +#define MFX_JPEG_HUFF_TABLE_STATE MFX(2, 7, 0, 2) + +//MFC_JPEG #defines for JPEG encoder only +#define MFC_JPEG_SCAN_OBJECT MFX(2, 7, 2, 9) +#define MFC_JPEG_HUFF_TABLE_STATE MFX(2, 7, 2, 3) + +#define MFD_JPEG_BSD_OBJECT MFX(2, 7, 1, 8) + +#define MFX_VP8_PIC_STATE MFX(2, 4, 0, 0) + +#define MFD_VP8_BSD_OBJECT MFX(2, 4, 1, 8) + +#define MFX_VP8_ENCODER_CFG MFX(2, 4, 2, 1) + +#define MFX_VP8_BSP_BUF_BASE_ADDR_STATE MFX(2, 4, 2, 3) + +#define MFX_VP8_PAK_OBJECT MFX(2, 4, 2, 9) + +#define VEB(pipeline, op, sub_opa, sub_opb) \ + (3 << 29 | \ + (pipeline) << 27 | \ + (op) << 24 | \ + (sub_opa) << 21 | \ + (sub_opb) << 16) + +#define VEB_SURFACE_STATE VEB(2, 4, 0, 0) +#define VEB_STATE VEB(2, 4, 0, 2) +#define VEB_DNDI_IECP_STATE VEB(2, 4, 0, 3) + +#define HCP(command) \ + (3 << 29 | \ + 2 << 27 | \ + 7 << 23 | \ + (command << 16)) + +#define HCP_PIPE_MODE_SELECT HCP(0x00) +#define HCP_SURFACE_STATE HCP(0x01) +#define HCP_PIPE_BUF_ADDR_STATE HCP(0x02) +#define HCP_IND_OBJ_BASE_ADDR_STATE HCP(0x03) +#define HCP_QM_STATE HCP(0x04) +#define HCP_FQM_STATE HCP(0x05) +#define HCP_PIC_STATE HCP(0x10) +#define HCP_TILE_STATE HCP(0x11) +#define HCP_REF_IDX_STATE HCP(0x12) +#define HCP_WEIGHTOFFSET HCP(0x13) +#define HCP_SLICE_STATE HCP(0x14) +#define HCP_BSD_OBJECT HCP(0x20) +#define HCP_PAK_OBJECT HCP(0x21) +#define HCP_INSERT_PAK_OBJECT HCP(0x22) + +#define HCP_VP9_SEGMENT_STATE HCP(0x32) +#define HCP_VP9_PIC_STATE HCP(0x30) + #define I965_DEPTHFORMAT_D32_FLOAT 1 #define BASE_ADDRESS_MODIFY (1 << 0) @@ -467,6 +593,8 @@ #define I965_SURFACEFORMAT_R8G8_USCALED 0x11D #define I965_SURFACEFORMAT_R16_SSCALED 0x11E #define I965_SURFACEFORMAT_R16_USCALED 0x11F +#define I965_SURFACEFORMAT_P8A8_UNORM 0x122 +#define I965_SURFACEFORMAT_A8P8_UNORM 0x123 #define I965_SURFACEFORMAT_R8_UNORM 0x140 #define I965_SURFACEFORMAT_R8_SNORM 0x141 #define I965_SURFACEFORMAT_R8_SINT 0x142 @@ -507,6 +635,8 @@ #define I965_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define I965_SURFACEFORMAT_R16G16B16_USCALED 0x19F +#define I965_SURFACEFORMAT_RAW 0x1FF + #define I965_CULLMODE_BOTH 0 #define I965_CULLMODE_NONE 1 #define I965_CULLMODE_FRONT 2 @@ -520,6 +650,13 @@ #define I965_MIPFILTER_NEAREST 1 #define I965_MIPFILTER_LINEAR 3 +#define HSW_SCS_ZERO 0 +#define HSW_SCS_ONE 1 +#define HSW_SCS_RED 4 +#define HSW_SCS_GREEN 5 +#define HSW_SCS_BLUE 6 +#define HSW_SCS_ALPHA 7 + #define I965_TEXCOORDMODE_WRAP 0 #define I965_TEXCOORDMODE_MIRROR 1 #define I965_TEXCOORDMODE_CLAMP 2 @@ -576,6 +713,8 @@ #define VE1_VFCOMPONENT_2_SHIFT 20 #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 +#define GEN8_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN8 */ +#define GEN8_VE0_VALID (1 << 25) /* for GEN8 */ #define VB0_BUFFER_INDEX_SHIFT 27 #define GEN6_VB0_BUFFER_INDEX_SHIFT 26 @@ -585,6 +724,8 @@ #define GEN6_VB0_INSTANCEDATA (1 << 20) #define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) #define VB0_BUFFER_PITCH_SHIFT 0 +#define GEN8_VB0_BUFFER_INDEX_SHIFT 26 +#define GEN8_VB0_MOCS_SHIFT 16 #define _3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define _3DPRIMITIVE_VERTEX_RANDOM (1 << 15) @@ -615,6 +756,10 @@ #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 +#define GEN8_3DSTATE_VF_INSTANCING CMD(3, 0, 0x49) +#define GEN8_3DSTATE_VF_SGVS CMD(3, 0, 0x4a) +#define GEN8_3DSTATE_VF_TOPOLOGY CMD(3, 0, 0x4b) + #define I965_TILEWALK_XMAJOR 0 #define I965_TILEWALK_YMAJOR 1 @@ -657,6 +802,8 @@ #define SURFACE_FORMAT_R8B8_UNORM 10 #define SURFACE_FORMAT_R8_UNORM 11 #define SURFACE_FORMAT_Y8_UNORM 12 +#define SURFACE_FORMAT_P010 13 +#define SURFACE_FORMAT_P016 14 #define AVS_FILTER_ADAPTIVE_8_TAP 0 #define AVS_FILTER_NEAREST 1 @@ -671,6 +818,8 @@ #define MFX_FORMAT_VC1 1 #define MFX_FORMAT_AVC 2 #define MFX_FORMAT_JPEG 3 +#define MFX_FORMAT_SVC 4 +#define MFX_FORMAT_VP8 5 #define MFX_SHORT_MODE 0 #define MFX_LONG_MODE 1 @@ -689,20 +838,144 @@ #define MFX_QM_JPEG_LUMA_Y_QUANTIZER_MATRIX 0 #define MFX_QM_JPEG_CHROMA_CB_QUANTIZER_MATRIX 1 #define MFX_QM_JPEG_CHROMA_CR_QUANTIZER_MATRIX 2 +#define MFX_QM_JPEG_ALPHA_QUANTIZER_MATRIX 3 /* for new device */ + +#define MFX_HUFFTABLE_ID_Y 0 +#define MFX_HUFFTABLE_ID_UV 1 /* UV on Ivybridge */ #define MFD_MODE_VLD 0 #define MFD_MODE_IT 1 +#define MFX_SURFACE_YCRCB_NORMAL 0 +#define MFX_SURFACE_YCRCB_SWAPY 3 #define MFX_SURFACE_PLANAR_420_8 4 +#define MFX_SURFACE_PLANAR_411_8 5 +#define MFX_SURFACE_PLANAR_422_8 6 +#define MFX_SURFACE_R8G8B8A8_UNORM 9 #define MFX_SURFACE_MONOCHROME 12 +#define MPEG_I_PICTURE 1 +#define MPEG_P_PICTURE 2 +#define MPEG_B_PICTURE 3 + #define MPEG_TOP_FIELD 1 #define MPEG_BOTTOM_FIELD 2 #define MPEG_FRAME 3 -#define URB_SIZE(intel) (IS_GEN7(intel->device_id) ? 4096 : \ - IS_GEN6(intel->device_id) ? 1024 : \ - IS_IRONLAKE(intel->device_id) ? 1024 : \ - IS_G4X(intel->device_id) ? 384 : 256) +#define SUBSAMPLE_YUV400 0 +#define SUBSAMPLE_YUV420 1 +#define SUBSAMPLE_YUV422H 2 +#define SUBSAMPLE_YUV422V 3 +#define SUBSAMPLE_YUV444 4 +#define SUBSAMPLE_YUV411 5 +#define SUBSAMPLE_RGBX 6 +#define JPEG_ENC_SURFACE_NV12 1 +#define JPEG_ENC_SURFACE_UYVY 2 +#define JPEG_ENC_SURFACE_YUY2 3 +#define JPEG_ENC_SURFACE_Y8 4 +#define JPEG_ENC_SURFACE_RGB 5 + +#define JPEG_ENC_MCU_YUV400 0 +#define JPEG_ENC_MCU_YUV420 1 +#define JPEG_ENC_MCU_YUV422H_2Y 2 +#define JPEG_ENC_MCU_RGB 3 + +#define JPEG_ENC_ROUND_QUANT_DEFAULT 0 +#define JPEG_ENC_ROUND_QUANT_MINUS_128TH 1 +#define JPEG_ENC_ROUND_QUANT_PLUS_128TH 2 +#define JPEG_ENC_ROUND_QUANT_MINUS_64TH 3 +#define JPEG_ENC_ROUND_QUANT_PLUS_64TH 4 +#define JPEG_ENC_ROUND_QUANT_MINUS_32TH 5 +#define JPEG_ENC_ROUND_QUANT_MINUS_16TH 6 +#define JPEG_ENC_ROUND_QUANT_MINUS_8TH 7 + + + +#define GEN9_PIPELINE_SELECTION_MASK (0x3 << 8) +#define GEN9_FORCE_MEDIA_AWAKE_MASK (1 << 13) +#define GEN9_FORCE_MEDIA_AWAKE_ON (1 << 5) +#define GEN9_FORCE_MEDIA_AWAKE_OFF (0 << 5) + +#define GEN9_MEDIA_DOP_GATE_MASK (1 << 12) +#define GEN9_MEDIA_DOP_GATE_ON (1 << 4) +#define GEN9_MEDIA_DOP_GATE_OFF (0 << 4) + +#define GEN9_SBE_ACTIVE_COMPONENT_NONE 0 +#define GEN9_SBE_ACTIVE_COMPONENT_XY 1 +#define GEN9_SBE_ACTIVE_COMPONENT_XYZ 2 +#define GEN9_SBE_ACTIVE_COMPONENT_XYZW 3 + +#define HEVC_SLICE_B 0 +#define HEVC_SLICE_P 1 +#define HEVC_SLICE_I 2 + +#define HCP_CODEC_HEVC 0 + +#define HCP_CODEC_VP9 1 +#define HCP_VP9_KEY_FRAME 0 +#define HCP_VP9_INTER_FRAME 1 +#define HCP_VP9_PROFILE0 0 /* 8 bit 420 only */ +#define HCP_VP9_PROFILE2 2 /* 10 bits 420 only */ + +#define HCP_CODEC_SELECT_DECODE 0 +#define HCP_CODEC_SELECT_ENCODE 1 + +/* VDEnc/HuC */ +/* HuC commands */ +#define HUC(command) \ + (3 << 29 | \ + 2 << 27 | \ + 11 << 23 | \ + (command << 16)) + +#define HUC_PIPE_MODE_SELECT HUC(0) +#define HUC_IMEM_STATE HUC(1) +#define HUC_DMEM_STATE HUC(2) +#define HUC_CFG_STATE HUC(3) +#define HUC_VIRTUAL_ADDR_STATE HUC(4) +#define HUC_IND_OBJ_BASE_ADDR_STATE HUC(5) +#define HUC_STREAM_OBJECT HUC(32) +#define HUC_START HUC(33) + +/* HuC registers */ +#define VCS0_HUC_STATUS 0xD000 +#define VCS0_HUC_STATUS2 0xD3B0 + +/* VDEnc commands */ +#define VDENC(opcode, sub_opcode_a, sub_opcode_b) \ + (3 << 29 | \ + 2 << 27 | \ + opcode << 23 | \ + sub_opcode_a << 21 | \ + sub_opcode_b << 16) + +#define VD_PIPELINE_FLUSH VDENC(15, 0, 0) + +#define VDENC_PIPE_MODE_SELECT VDENC(1, 0, 0) +#define VDENC_SRC_SURFACE_STATE VDENC(1, 0, 1) +#define VDENC_REF_SURFACE_STATE VDENC(1, 0, 2) +#define VDENC_DS_REF_SURFACE_STATE VDENC(1, 0, 3) +#define VDENC_PIPE_BUF_ADDR_STATE VDENC(1, 0, 4) +#define VDENC_IMG_STATE VDENC(1, 0, 5) +#define VDENC_CONST_QPT_STATE VDENC(1, 0, 6) +#define VDENC_WALKER_STATE VDENC(1, 0, 7) + +#define VDENC_CODEC_AVC 2 + +#define VDENC_SURFACE_YUV422 0 +#define VDENC_SURFACE_RGBA444 1 +#define VDENC_SURFACE_YUV444 2 +#define VDENC_SURFACE_Y8_UNORM 3 +#define VDENC_SURFACE_PLANAR_420_8 4 +#define VDENC_SURFACE_YCBCR_SWAP_Y 5 +#define VDENC_SURFACE_YCBCR_SWAP_UV 6 +#define VDENC_SURFACE_YCBCR_SWAP_UVY 7 +#define VDENC_SURFACE_P010 8 +#define VDENC_SURFACE_RGBA10 9 +#define VDENC_SURFACE_Y410 10 +#define VDENC_SURFACE_NV21 11 + +#define MFC_BITSTREAM_BYTECOUNT_FRAME_REG 0x128A0 +#define MFC_IMAGE_STATUS_CTRL_REG 0x128B8 #endif /* _I965_DEFINES_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_device_info.c intel-vaapi-driver-1.7.1/src/i965_device_info.c --- intel-vaapi-driver-1.0.15/src/i965_device_info.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_device_info.c 2016-06-21 01:35:12.000000000 +0000 @@ -0,0 +1,865 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include +#include +#include "i965_drv_video.h" + +#include +#include +#include +#include + +/* Extra set of chroma formats supported for H.264 decoding (beyond YUV 4:2:0) */ +#define EXTRA_H264_DEC_CHROMA_FORMATS \ + (VA_RT_FORMAT_YUV400) + +/* Extra set of chroma formats supported for JPEG decoding (beyond YUV 4:2:0) */ +#define EXTRA_JPEG_DEC_CHROMA_FORMATS \ + (VA_RT_FORMAT_YUV400 | VA_RT_FORMAT_YUV411 | VA_RT_FORMAT_YUV422 | \ + VA_RT_FORMAT_YUV444) + +/* Extra set of chroma formats supported for JPEG encoding (beyond YUV 4:2:0) */ +#define EXTRA_JPEG_ENC_CHROMA_FORMATS \ + (VA_RT_FORMAT_YUV400| VA_RT_FORMAT_YUV422 | VA_RT_FORMAT_YUV444 | VA_RT_FORMAT_RGB32) + +#define EXTRA_HEVC_DEC_CHROMA_FORMATS \ + (VA_RT_FORMAT_YUV420_10BPP) + +#define EXTRA_VP9_DEC_CHROMA_FORMATS \ + (VA_RT_FORMAT_YUV420_10BPP) + +/* Defines VA profile as a 32-bit unsigned integer mask */ +#define VA_PROFILE_MASK(PROFILE) \ + (1U << VAProfile##PROFILE) + +#define VP9_PROFILE_MASK(PROFILE) \ + (1U << PROFILE) + +extern struct hw_context *i965_proc_context_init(VADriverContextP, struct object_config *); +extern struct hw_context *g4x_dec_hw_context_init(VADriverContextP, struct object_config *); +extern bool genx_render_init(VADriverContextP); + +static struct hw_codec_info g4x_hw_codec_info = { + .dec_hw_context_init = g4x_dec_hw_context_init, + .enc_hw_context_init = NULL, + .proc_hw_context_init = NULL, + .render_init = genx_render_init, + .post_processing_context_init = NULL, + + .max_width = 2048, + .max_height = 2048, + .min_linear_wpitch = 16, + .min_linear_hpitch = 16, + + .has_mpeg2_decoding = 1, + + .num_filters = 0, +}; + +extern struct hw_context *ironlake_dec_hw_context_init(VADriverContextP, struct object_config *); +extern void i965_post_processing_context_init(VADriverContextP, void *, struct intel_batchbuffer *); + +static struct hw_codec_info ilk_hw_codec_info = { + .dec_hw_context_init = ironlake_dec_hw_context_init, + .enc_hw_context_init = NULL, + .proc_hw_context_init = i965_proc_context_init, + .render_init = genx_render_init, + .post_processing_context_init = i965_post_processing_context_init, + + .max_width = 2048, + .max_height = 2048, + .min_linear_wpitch = 16, + .min_linear_hpitch = 16, + + .has_mpeg2_decoding = 1, + .has_h264_decoding = 1, + .has_vpp = 1, + .has_accelerated_putimage = 1, + + .num_filters = 0, +}; + +static void gen6_hw_codec_preinit(VADriverContextP ctx, struct hw_codec_info *codec_info); + +extern struct hw_context *gen6_dec_hw_context_init(VADriverContextP, struct object_config *); +extern struct hw_context *gen6_enc_hw_context_init(VADriverContextP, struct object_config *); +static struct hw_codec_info snb_hw_codec_info = { + .dec_hw_context_init = gen6_dec_hw_context_init, + .enc_hw_context_init = gen6_enc_hw_context_init, + .proc_hw_context_init = i965_proc_context_init, + .render_init = genx_render_init, + .post_processing_context_init = i965_post_processing_context_init, + .preinit_hw_codec = gen6_hw_codec_preinit, + + .max_width = 2048, + .max_height = 2048, + .min_linear_wpitch = 16, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = VA_PROFILE_MASK(H264StereoHigh), + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + + .num_filters = 2, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_NULL }, + { VAProcFilterDeinterlacing, I965_RING_NULL }, + }, +}; + +static void gen7_hw_codec_preinit(VADriverContextP ctx, struct hw_codec_info *codec_info); + +extern struct hw_context *gen7_dec_hw_context_init(VADriverContextP, struct object_config *); +extern struct hw_context *gen7_enc_hw_context_init(VADriverContextP, struct object_config *); +static struct hw_codec_info ivb_hw_codec_info = { + .dec_hw_context_init = gen7_dec_hw_context_init, + .enc_hw_context_init = gen7_enc_hw_context_init, + .proc_hw_context_init = i965_proc_context_init, + .render_init = genx_render_init, + .post_processing_context_init = i965_post_processing_context_init, + .preinit_hw_codec = gen7_hw_codec_preinit, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 64, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = VA_PROFILE_MASK(H264StereoHigh), + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_mpeg2_encoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + + .num_filters = 2, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_NULL }, + { VAProcFilterDeinterlacing, I965_RING_NULL }, + }, +}; + +static void hsw_hw_codec_preinit(VADriverContextP ctx, struct hw_codec_info *codec_info); + +extern struct hw_context *gen75_dec_hw_context_init(VADriverContextP, struct object_config *); +extern struct hw_context *gen75_enc_hw_context_init(VADriverContextP, struct object_config *); +extern struct hw_context *gen75_proc_context_init(VADriverContextP, struct object_config *); +static struct hw_codec_info hsw_hw_codec_info = { + .dec_hw_context_init = gen75_dec_hw_context_init, + .enc_hw_context_init = gen75_enc_hw_context_init, + .proc_hw_context_init = gen75_proc_context_init, + .render_init = genx_render_init, + .post_processing_context_init = i965_post_processing_context_init, + .preinit_hw_codec = hsw_hw_codec_preinit, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 64, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | + VA_PROFILE_MASK(H264MultiviewHigh)), + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_mpeg2_encoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + .has_h264_mvc_encoding = 1, + + .num_filters = 5, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_VEBOX }, + { VAProcFilterDeinterlacing, I965_RING_VEBOX }, + { VAProcFilterSharpening, I965_RING_NULL }, + { VAProcFilterColorBalance, I965_RING_VEBOX}, + { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX}, + }, +}; + +extern struct hw_context *gen8_dec_hw_context_init(VADriverContextP, struct object_config *); +extern struct hw_context *gen8_enc_hw_context_init(VADriverContextP, struct object_config *); +extern void gen8_post_processing_context_init(VADriverContextP, void *, struct intel_batchbuffer *); +static struct hw_codec_info bdw_hw_codec_info = { + .dec_hw_context_init = gen8_dec_hw_context_init, + .enc_hw_context_init = gen8_enc_hw_context_init, + .proc_hw_context_init = gen75_proc_context_init, + .render_init = gen8_render_init, + .post_processing_context_init = gen8_post_processing_context_init, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 128, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | + VA_PROFILE_MASK(H264MultiviewHigh)), + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_mpeg2_encoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + .has_vp8_decoding = 1, + .has_h264_mvc_encoding = 1, + + .num_filters = 5, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_VEBOX }, + { VAProcFilterDeinterlacing, I965_RING_VEBOX }, + { VAProcFilterSharpening, I965_RING_NULL }, /* need to rebuild the shader for BDW */ + { VAProcFilterColorBalance, I965_RING_VEBOX}, + { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX}, + }, +}; + +extern struct hw_context *gen9_dec_hw_context_init(VADriverContextP, struct object_config *); +static struct hw_codec_info chv_hw_codec_info = { + .dec_hw_context_init = gen9_dec_hw_context_init, + .enc_hw_context_init = gen8_enc_hw_context_init, + .proc_hw_context_init = gen75_proc_context_init, + .render_init = gen8_render_init, + .post_processing_context_init = gen8_post_processing_context_init, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 128, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | + VA_PROFILE_MASK(H264MultiviewHigh)), + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_mpeg2_encoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_jpeg_encoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + .has_vp8_decoding = 1, + .has_vp8_encoding = 1, + .has_h264_mvc_encoding = 1, + .has_hevc_decoding = 1, + + .num_filters = 5, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_VEBOX }, + { VAProcFilterDeinterlacing, I965_RING_VEBOX }, + { VAProcFilterSharpening, I965_RING_NULL }, /* need to rebuild the shader for BDW */ + { VAProcFilterColorBalance, I965_RING_VEBOX}, + { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX}, + }, +}; + +extern struct hw_context *gen9_enc_hw_context_init(VADriverContextP, struct object_config *); +extern void gen9_post_processing_context_init(VADriverContextP, void *, struct intel_batchbuffer *); +static struct hw_codec_info skl_hw_codec_info = { + .dec_hw_context_init = gen9_dec_hw_context_init, + .enc_hw_context_init = gen9_enc_hw_context_init, + .proc_hw_context_init = gen75_proc_context_init, + .render_init = gen9_render_init, + .post_processing_context_init = gen9_post_processing_context_init, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 128, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | + VA_PROFILE_MASK(H264MultiviewHigh)), + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_mpeg2_encoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_jpeg_encoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + .has_vp8_decoding = 1, + .has_vp8_encoding = 1, + .has_h264_mvc_encoding = 1, + .has_hevc_decoding = 1, + .has_hevc_encoding = 1, + .has_lp_h264_encoding = 1, + + .lp_h264_brc_mode = VA_RC_CQP, + + .num_filters = 5, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_VEBOX }, + { VAProcFilterDeinterlacing, I965_RING_VEBOX }, + { VAProcFilterSharpening, I965_RING_NULL }, /* need to rebuild the shader for BDW */ + { VAProcFilterColorBalance, I965_RING_VEBOX}, + { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX}, + }, +}; + + +static struct hw_codec_info bxt_hw_codec_info = { + .dec_hw_context_init = gen9_dec_hw_context_init, + .enc_hw_context_init = gen9_enc_hw_context_init, + .proc_hw_context_init = gen75_proc_context_init, + .render_init = gen9_render_init, + .post_processing_context_init = gen9_post_processing_context_init, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 128, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | + VA_PROFILE_MASK(H264MultiviewHigh)), + .vp9_dec_profiles = VP9_PROFILE_MASK(0), + + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS, + .hevc_dec_chroma_formats = EXTRA_HEVC_DEC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_jpeg_encoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + .has_vp8_decoding = 1, + .has_vp8_encoding = 1, + .has_h264_mvc_encoding = 1, + .has_hevc_decoding = 1, + .has_hevc_encoding = 1, + .has_hevc10_decoding = 1, + .has_vp9_decoding = 1, + .has_vpp_p010 = 1, + + .num_filters = 5, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_VEBOX }, + { VAProcFilterDeinterlacing, I965_RING_VEBOX }, + { VAProcFilterSharpening, I965_RING_NULL }, + { VAProcFilterColorBalance, I965_RING_VEBOX}, + { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX}, + }, +}; + +static struct hw_codec_info kbl_hw_codec_info = { + .dec_hw_context_init = gen9_dec_hw_context_init, + .enc_hw_context_init = gen9_enc_hw_context_init, + .proc_hw_context_init = gen75_proc_context_init, + .render_init = gen9_render_init, + .post_processing_context_init = gen9_post_processing_context_init, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 128, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | + VA_PROFILE_MASK(H264MultiviewHigh)), + .vp9_dec_profiles = VP9_PROFILE_MASK(0) | + VP9_PROFILE_MASK(2), + + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS, + .hevc_dec_chroma_formats = EXTRA_HEVC_DEC_CHROMA_FORMATS, + .vp9_dec_chroma_formats = EXTRA_VP9_DEC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_mpeg2_encoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_jpeg_encoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + .has_vp8_decoding = 1, + .has_vp8_encoding = 1, + .has_h264_mvc_encoding = 1, + .has_hevc_decoding = 1, + .has_hevc_encoding = 1, + .has_hevc10_decoding = 1, + .has_vp9_decoding = 1, + .has_vpp_p010 = 1, + .has_vp9_encoding = 1, + + .num_filters = 5, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_VEBOX }, + { VAProcFilterDeinterlacing, I965_RING_VEBOX }, + { VAProcFilterSharpening, I965_RING_NULL }, + { VAProcFilterColorBalance, I965_RING_VEBOX}, + { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX}, + }, +}; + +struct hw_codec_info * +i965_get_codec_info(int devid) +{ + switch (devid) { +#undef CHIPSET +#define CHIPSET(id, family, dev, str) case id: return &family##_hw_codec_info; +#include "i965_pciids.h" + default: + return NULL; + } +} + +static const struct intel_device_info g4x_device_info = { + .gen = 4, + + .urb_size = 384, + .max_wm_threads = 50, /* 10 * 5 */ + + .is_g4x = 1, +}; + +static const struct intel_device_info ilk_device_info = { + .gen = 5, + + .urb_size = 1024, + .max_wm_threads = 72, /* 12 * 6 */ +}; + +static const struct intel_device_info snb_gt1_device_info = { + .gen = 6, + .gt = 1, + + .urb_size = 1024, + .max_wm_threads = 40, +}; + +static const struct intel_device_info snb_gt2_device_info = { + .gen = 6, + .gt = 2, + + .urb_size = 1024, + .max_wm_threads = 80, +}; + +static const struct intel_device_info ivb_gt1_device_info = { + .gen = 7, + .gt = 1, + + .urb_size = 4096, + .max_wm_threads = 48, + + .is_ivybridge = 1, +}; + +static const struct intel_device_info ivb_gt2_device_info = { + .gen = 7, + .gt = 2, + + .urb_size = 4096, + .max_wm_threads = 172, + + .is_ivybridge = 1, +}; + +static const struct intel_device_info byt_device_info = { + .gen = 7, + .gt = 1, + + .urb_size = 4096, + .max_wm_threads = 48, + + .is_ivybridge = 1, + .is_baytrail = 1, +}; + +static const struct intel_device_info hsw_gt1_device_info = { + .gen = 7, + .gt = 1, + + .urb_size = 4096, + .max_wm_threads = 102, + + .is_haswell = 1, +}; + +static const struct intel_device_info hsw_gt2_device_info = { + .gen = 7, + .gt = 2, + + .urb_size = 4096, + .max_wm_threads = 204, + + .is_haswell = 1, +}; + +static const struct intel_device_info hsw_gt3_device_info = { + .gen = 7, + .gt = 3, + + .urb_size = 4096, + .max_wm_threads = 408, + + .is_haswell = 1, +}; + +static const struct intel_device_info bdw_device_info = { + .gen = 8, + + .urb_size = 4096, + .max_wm_threads = 64, /* per PSD */ +}; + +static const struct intel_device_info chv_device_info = { + .gen = 8, + + .urb_size = 4096, + .max_wm_threads = 64, /* per PSD */ + + .is_cherryview = 1, +}; + +static const struct intel_device_info skl_device_info = { + .gen = 9, + + .urb_size = 4096, + .max_wm_threads = 64, /* per PSD */ + + .is_skylake = 1, +}; + +static const struct intel_device_info bxt_device_info = { + .gen = 9, + + .urb_size = 4096, + .max_wm_threads = 64, /* per PSD */ + .is_broxton = 1, +}; + +static const struct intel_device_info kbl_device_info = { + .gen = 9, + + .urb_size = 4096, + .max_wm_threads = 64, /* per PSD */ + + .is_kabylake = 1, +}; + +const struct intel_device_info * +i965_get_device_info(int devid) +{ + switch (devid) { +#undef CHIPSET +#define CHIPSET(id, family, dev, str) case id: return &dev##_device_info; +#include "i965_pciids.h" + default: + return NULL; + } +} + +static void cpuid(unsigned int op, + uint32_t *eax, uint32_t *ebx, + uint32_t *ecx, uint32_t *edx) +{ + __cpuid_count(op, 0, *eax, *ebx, *ecx, *edx); +} + +/* + * This function doesn't check the length. And the caller should + * assure that the length of input string should be greater than 48. + */ +static int intel_driver_detect_cpustring(char *model_id) +{ + uint32_t *rdata; + + if (model_id == NULL) + return -EINVAL; + + rdata = (uint32_t *)model_id; + + /* obtain the max supported extended CPUID info */ + cpuid(0x80000000, &rdata[0], &rdata[1], &rdata[2], &rdata[3]); + + /* If the max extended CPUID info is less than 0x80000004, fail */ + if (rdata[0] < 0x80000004) + return -EINVAL; + + /* obtain the CPUID string */ + cpuid(0x80000002, &rdata[0], &rdata[1], &rdata[2], &rdata[3]); + cpuid(0x80000003, &rdata[4], &rdata[5], &rdata[6], &rdata[7]); + cpuid(0x80000004, &rdata[8], &rdata[9], &rdata[10], &rdata[11]); + + *(model_id + 48) = '\0'; + return 0; +} + +/* + * the hook_list for HSW. + * It is captured by /proc/cpuinfo and the space character is stripped. + */ +const static char *hsw_cpu_hook_list[] = { +"Intel(R)Pentium(R)3556U", +"Intel(R)Pentium(R)3560Y", +"Intel(R)Pentium(R)3550M", +"Intel(R)Celeron(R)2980U", +"Intel(R)Celeron(R)2955U", +"Intel(R)Celeron(R)2950M", +}; + +static void hsw_hw_codec_preinit(VADriverContextP ctx, struct hw_codec_info *codec_info) +{ + char model_string[64]; + char *model_ptr, *tmp_ptr; + int i, model_len, list_len; + bool found; + + memset(model_string, 0, sizeof(model_string)); + + /* If it can't detect cpu model_string, leave it alone */ + if (intel_driver_detect_cpustring(model_string)) + return; + + /* strip the cpufreq info */ + model_ptr = model_string; + tmp_ptr = strstr(model_ptr, "@"); + + if (tmp_ptr) + *tmp_ptr = '\0'; + + /* strip the space character and convert to the lower case */ + model_ptr = model_string; + model_len = strlen(model_string); + for (i = 0; i < model_len; i++) { + if (model_string[i] != ' ') { + *model_ptr = model_string[i]; + model_ptr++; + } + } + *model_ptr = '\0'; + + found = false; + list_len = sizeof(hsw_cpu_hook_list) / sizeof(char *); + model_len = strlen(model_string); + for (i = 0; i < list_len; i++) { + model_ptr = (char *)hsw_cpu_hook_list[i]; + + if (strlen(model_ptr) != model_len) + continue; + + if (strncasecmp(model_string, model_ptr, model_len) == 0) { + found = true; + break; + } + } + + if (found) { + codec_info->has_h264_encoding = 0; + codec_info->has_h264_mvc_encoding = 0; + codec_info->has_mpeg2_encoding = 0; + } + return; +} + +/* + * the hook_list for Sandybride. + * It is captured by /proc/cpuinfo and the space character is stripped. + */ +const static char *gen6_cpu_hook_list[] = { +"Intel(R)Celeron(R)CPU847", +"Intel(R)Celeron(R)CPU867", +}; + +static void gen6_hw_codec_preinit(VADriverContextP ctx, struct hw_codec_info *codec_info) +{ + char model_string[64]; + char *model_ptr, *tmp_ptr; + int i, model_len, list_len; + bool found; + + memset(model_string, 0, sizeof(model_string)); + + /* If it can't detect cpu model_string, leave it alone */ + if (intel_driver_detect_cpustring(model_string)) + return; + + /* strip the cpufreq info */ + model_ptr = model_string; + tmp_ptr = strstr(model_ptr, "@"); + + if (tmp_ptr) + *tmp_ptr = '\0'; + + /* strip the space character and convert to the lower case */ + model_ptr = model_string; + model_len = strlen(model_string); + for (i = 0; i < model_len; i++) { + if (model_string[i] != ' ') { + *model_ptr = model_string[i]; + model_ptr++; + } + } + *model_ptr = '\0'; + + found = false; + list_len = sizeof(gen6_cpu_hook_list) / sizeof(char *); + model_len = strlen(model_string); + for (i = 0; i < list_len; i++) { + model_ptr = (char *)gen6_cpu_hook_list[i]; + + if (strlen(model_ptr) != model_len) + continue; + + if (strncasecmp(model_string, model_ptr, model_len) == 0) { + found = true; + break; + } + } + + if (found) { + codec_info->has_h264_encoding = 0; + } + return; +} + +/* + * the hook_list for Ivybridge. + * It is captured by /proc/cpuinfo and the space character is stripped. + */ +const static char *gen7_cpu_hook_list[] = { +"Intel(R)Celeron(R)CPU1007U", +}; + +static void gen7_hw_codec_preinit(VADriverContextP ctx, struct hw_codec_info *codec_info) +{ + char model_string[64]; + char *model_ptr, *tmp_ptr; + int i, model_len, list_len; + bool found; + + memset(model_string, 0, sizeof(model_string)); + + /* If it can't detect cpu model_string, leave it alone */ + if (intel_driver_detect_cpustring(model_string)) + return; + + /* strip the cpufreq info */ + model_ptr = model_string; + tmp_ptr = strstr(model_ptr, "@"); + + if (tmp_ptr) + *tmp_ptr = '\0'; + + /* strip the space character and convert to the lower case */ + model_ptr = model_string; + model_len = strlen(model_string); + for (i = 0; i < model_len; i++) { + if (model_string[i] != ' ') { + *model_ptr = model_string[i]; + model_ptr++; + } + } + *model_ptr = '\0'; + + found = false; + list_len = sizeof(gen7_cpu_hook_list) / sizeof(char *); + model_len = strlen(model_string); + for (i = 0; i < list_len; i++) { + model_ptr = (char *)gen7_cpu_hook_list[i]; + + if (strlen(model_ptr) != model_len) + continue; + + if (strncasecmp(model_string, model_ptr, model_len) == 0) { + found = true; + break; + } + } + + if (found) { + codec_info->has_h264_encoding = 0; + codec_info->has_mpeg2_encoding = 0; + } + return; +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_drv_video.c intel-vaapi-driver-1.7.1/src/i965_drv_video.c --- intel-vaapi-driver-1.0.15/src/i965_drv_video.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_drv_video.c 2016-06-21 01:35:12.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2009 Intel Corporation + * Copyright ?2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the @@ -27,19 +27,28 @@ * */ -#include "config.h" -#include -#include -#include -#include +#include "sysdeps.h" +#include +#include -#include +#ifdef HAVE_VA_X11 +# include "i965_output_dri.h" +#endif + +#ifdef HAVE_VA_WAYLAND +# include "i965_output_wayland.h" +#endif +#include "intel_version.h" #include "intel_driver.h" #include "intel_memman.h" #include "intel_batchbuffer.h" #include "i965_defines.h" #include "i965_drv_video.h" +#include "i965_decoder.h" +#include "i965_encoder.h" + +#include "gen9_vp9_encapi.h" #define CONFIG_ID_OFFSET 0x01000000 #define CONTEXT_ID_OFFSET 0x02000000 @@ -48,35 +57,256 @@ #define IMAGE_ID_OFFSET 0x0a000000 #define SUBPIC_ID_OFFSET 0x10000000 -#define HAS_MPEG2(ctx) (IS_G4X((ctx)->intel.device_id) || \ - IS_IRONLAKE((ctx)->intel.device_id) || \ - ((IS_GEN6((ctx)->intel.device_id) || \ - IS_GEN7((ctx)->intel.device_id)) && \ - (ctx)->intel.has_bsd)) - -#define HAS_H264(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ - IS_GEN6((ctx)->intel.device_id) || \ - IS_IRONLAKE((ctx)->intel.device_id)) && \ - (ctx)->intel.has_bsd) - -#define HAS_VC1(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ - IS_GEN6((ctx)->intel.device_id)) && \ - (ctx)->intel.has_bsd) - -#define HAS_TILED_SURFACE(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ - IS_GEN6((ctx)->intel.device_id)) && \ - (ctx)->render_state.interleaved_uv) +#define HAS_MPEG2_DECODING(ctx) ((ctx)->codec_info->has_mpeg2_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_MPEG2_ENCODING(ctx) ((ctx)->codec_info->has_mpeg2_encoding && \ + (ctx)->intel.has_bsd) + +#define HAS_H264_DECODING(ctx) ((ctx)->codec_info->has_h264_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_H264_ENCODING(ctx) ((ctx)->codec_info->has_h264_encoding && \ + (ctx)->intel.has_bsd) + +#define HAS_LP_H264_ENCODING(ctx) ((ctx)->codec_info->has_lp_h264_encoding && \ + (ctx)->intel.has_bsd) + +#define HAS_VC1_DECODING(ctx) ((ctx)->codec_info->has_vc1_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_JPEG_DECODING(ctx) ((ctx)->codec_info->has_jpeg_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_JPEG_ENCODING(ctx) ((ctx)->codec_info->has_jpeg_encoding && \ + (ctx)->intel.has_bsd) + +#define HAS_VPP(ctx) ((ctx)->codec_info->has_vpp) + +#define HAS_ACCELERATED_GETIMAGE(ctx) ((ctx)->codec_info->has_accelerated_getimage) -#define HAS_ENCODER(ctx) ((IS_GEN7((ctx)->intel.device_id) || \ - IS_GEN6((ctx)->intel.device_id)) && \ +#define HAS_ACCELERATED_PUTIMAGE(ctx) ((ctx)->codec_info->has_accelerated_putimage) + +#define HAS_TILED_SURFACE(ctx) ((ctx)->codec_info->has_tiled_surface) + +#define HAS_VP8_DECODING(ctx) ((ctx)->codec_info->has_vp8_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_VP8_ENCODING(ctx) ((ctx)->codec_info->has_vp8_encoding && \ (ctx)->intel.has_bsd) +#define HAS_H264_MVC_DECODING(ctx) \ + (HAS_H264_DECODING(ctx) && (ctx)->codec_info->h264_mvc_dec_profiles) + +#define HAS_H264_MVC_DECODING_PROFILE(ctx, profile) \ + (HAS_H264_MVC_DECODING(ctx) && \ + ((ctx)->codec_info->h264_mvc_dec_profiles & (1U << profile))) + +#define HAS_H264_MVC_ENCODING(ctx) ((ctx)->codec_info->has_h264_mvc_encoding && \ + (ctx)->intel.has_bsd) + +#define HAS_HEVC_DECODING(ctx) ((ctx)->codec_info->has_hevc_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_HEVC_ENCODING(ctx) ((ctx)->codec_info->has_hevc_encoding && \ + (ctx)->intel.has_bsd) + +#define HAS_VP9_DECODING(ctx) ((ctx)->codec_info->has_vp9_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_VP9_DECODING_PROFILE(ctx, profile) \ + (HAS_VP9_DECODING(ctx) && \ + ((ctx)->codec_info->vp9_dec_profiles & (1U << (profile - VAProfileVP9Profile0)))) + +#define HAS_HEVC10_DECODING(ctx) ((ctx)->codec_info->has_hevc10_decoding && \ + (ctx)->intel.has_bsd) + +#define HAS_VPP_P010(ctx) ((ctx)->codec_info->has_vpp_p010 && \ + (ctx)->intel.has_bsd) + +#define HAS_VP9_ENCODING(ctx) ((ctx)->codec_info->has_vp9_encoding && \ + (ctx)->intel.has_bsd) + +static int get_sampling_from_fourcc(unsigned int fourcc); + +/* Check whether we are rendering to X11 (VA/X11 or VA/GLX API) */ +#define IS_VA_X11(ctx) \ + (((ctx)->display_type & VA_DISPLAY_MAJOR_MASK) == VA_DISPLAY_X11) + +/* Check whether we are rendering to Wayland */ +#define IS_VA_WAYLAND(ctx) \ + (((ctx)->display_type & VA_DISPLAY_MAJOR_MASK) == VA_DISPLAY_WAYLAND) + +#define I965_BIT 1 +#define I965_2BITS (I965_BIT << 1) +#define I965_4BITS (I965_BIT << 2) +#define I965_8BITS (I965_BIT << 3) +#define I965_16BITS (I965_BIT << 4) +#define I965_32BITS (I965_BIT << 5) + +#define PLANE_0 0 +#define PLANE_1 1 +#define PLANE_2 2 + +#define OFFSET_0 0 +#define OFFSET_4 4 +#define OFFSET_8 8 +#define OFFSET_16 16 +#define OFFSET_24 24 + +/* hfactor, vfactor, num_planes, bpp[], num_components, components[] */ +#define I_NV12 2, 2, 2, {I965_8BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_1, OFFSET_8} } +#define I_I420 2, 2, 3, {I965_8BITS, I965_2BITS, I965_2BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } +#define I_IYUV I_I420 +#define I_IMC3 I_I420 +#define I_YV12 2, 2, 3, {I965_8BITS, I965_2BITS, I965_2BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_2, OFFSET_0}, {PLANE_1, OFFSET_0} } +#define I_IMC1 I_YV12 + +#define I_P010 2, 2, 2, {I965_16BITS, I965_8BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_1, OFFSET_16} } + +#define I_422H 2, 1, 3, {I965_8BITS, I965_4BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } +#define I_422V 1, 2, 3, {I965_8BITS, I965_4BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } +#define I_YV16 2, 1, 3, {I965_8BITS, I965_4BITS, I965_4BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_2, OFFSET_0}, {PLANE_1, OFFSET_0} } +#define I_YUY2 2, 1, 1, {I965_16BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_24} } +#define I_UYVY 2, 1, 1, {I965_16BITS}, 3, { {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_0}, {PLANE_0, OFFSET_16} } + +#define I_444P 1, 1, 3, {I965_8BITS, I965_8BITS, I965_8BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } + +#define I_411P 4, 1, 3, {I965_8BITS, I965_2BITS, I965_2BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_1, OFFSET_0}, {PLANE_2, OFFSET_0} } + +#define I_Y800 1, 1, 1, {I965_8BITS}, 1, { {PLANE_0, OFFSET_0} } + +#define I_RGBA 1, 1, 1, {I965_32BITS}, 4, { {PLANE_0, OFFSET_0}, {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_16}, {PLANE_0, OFFSET_24} } +#define I_RGBX 1, 1, 1, {I965_32BITS}, 3, { {PLANE_0, OFFSET_0}, {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_16} } +#define I_BGRA 1, 1, 1, {I965_32BITS}, 4, { {PLANE_0, OFFSET_16}, {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_0}, {PLANE_0, OFFSET_24} } +#define I_BGRX 1, 1, 1, {I965_32BITS}, 3, { {PLANE_0, OFFSET_16}, {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_0} } + +#define I_ARGB 1, 1, 1, {I965_32BITS}, 4, { {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_16}, {PLANE_0, OFFSET_24}, {PLANE_0, OFFSET_0} } +#define I_ABGR 1, 1, 1, {I965_32BITS}, 4, { {PLANE_0, OFFSET_24}, {PLANE_0, OFFSET_16}, {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_0} } + +#define I_IA88 1, 1, 1, {I965_16BITS}, 2, { {PLANE_0, OFFSET_0}, {PLANE_0, OFFSET_8} } +#define I_AI88 1, 1, 1, {I965_16BITS}, 2, { {PLANE_0, OFFSET_8}, {PLANE_0, OFFSET_0} } + +#define I_IA44 1, 1, 1, {I965_8BITS}, 2, { {PLANE_0, OFFSET_0}, {PLANE_0, OFFSET_4} } +#define I_AI44 1, 1, 1, {I965_8BITS}, 2, { {PLANE_0, OFFSET_4}, {PLANE_0, OFFSET_0} } + +/* flag */ +#define I_S 1 +#define I_I 2 +#define I_SI (I_S | I_I) + +#define DEF_FOUCC_INFO(FOURCC, FORMAT, SUB, FLAG) { VA_FOURCC_##FOURCC, I965_COLOR_##FORMAT, SUBSAMPLE_##SUB, FLAG, I_##FOURCC } +#define DEF_YUV(FOURCC, SUB, FLAG) DEF_FOUCC_INFO(FOURCC, YUV, SUB, FLAG) +#define DEF_RGB(FOURCC, SUB, FLAG) DEF_FOUCC_INFO(FOURCC, RGB, SUB, FLAG) +#define DEF_INDEX(FOURCC, SUB, FLAG) DEF_FOUCC_INFO(FOURCC, INDEX, SUB, FLAG) + +static const i965_fourcc_info i965_fourcc_infos[] = { + DEF_YUV(NV12, YUV420, I_SI), + DEF_YUV(I420, YUV420, I_SI), + DEF_YUV(IYUV, YUV420, I_S), + DEF_YUV(IMC3, YUV420, I_S), + DEF_YUV(YV12, YUV420, I_SI), + DEF_YUV(IMC1, YUV420, I_S), + + DEF_YUV(P010, YUV420, I_SI), + + DEF_YUV(422H, YUV422H, I_SI), + DEF_YUV(422V, YUV422V, I_S), + DEF_YUV(YV16, YUV422H, I_S), + DEF_YUV(YUY2, YUV422H, I_SI), + DEF_YUV(UYVY, YUV422H, I_SI), + + DEF_YUV(444P, YUV444, I_S), + + DEF_YUV(411P, YUV411, I_S), + + DEF_YUV(Y800, YUV400, I_S), + + DEF_RGB(RGBA, RGBX, I_SI), + DEF_RGB(RGBX, RGBX, I_SI), + DEF_RGB(BGRA, RGBX, I_SI), + DEF_RGB(BGRX, RGBX, I_SI), + + DEF_RGB(ARGB, RGBX, I_I), + DEF_RGB(ABGR, RGBX, I_I), + + DEF_INDEX(IA88, RGBX, I_I), + DEF_INDEX(AI88, RGBX, I_I), + + DEF_INDEX(IA44, RGBX, I_I), + DEF_INDEX(AI44, RGBX, I_I) +}; + +const i965_fourcc_info * +get_fourcc_info(unsigned int fourcc) +{ + unsigned int i; + + for (i = 0; i < ARRAY_ELEMS(i965_fourcc_infos); i++) { + const i965_fourcc_info * const info = &i965_fourcc_infos[i]; + + if (info->fourcc == fourcc) + return info; + } + + return NULL; +} + +static int +get_bpp_from_fourcc(unsigned int fourcc) +{ + const i965_fourcc_info *info = get_fourcc_info(fourcc); + unsigned int i = 0; + unsigned int bpp = 0; + + if (!info) + return 0; + + for (i = 0; i < info->num_planes; i++) + bpp += info->bpp[i]; + + return bpp; +} + enum { I965_SURFACETYPE_RGBA = 1, I965_SURFACETYPE_YUV, I965_SURFACETYPE_INDEXED }; +/* List of supported display attributes */ +static const VADisplayAttribute i965_display_attributes[] = { + { + VADisplayAttribBrightness, + -100, 100, DEFAULT_BRIGHTNESS, + VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE + }, + + { + VADisplayAttribContrast, + 0, 100, DEFAULT_CONTRAST, + VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE + }, + + { + VADisplayAttribHue, + -180, 180, DEFAULT_HUE, + VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE + }, + + { + VADisplayAttribSaturation, + 0, 100, DEFAULT_SATURATION, + VA_DISPLAY_ATTRIB_GETTABLE | VA_DISPLAY_ATTRIB_SETTABLE + }, + + { + VADisplayAttribRotation, + 0, 3, VA_ROTATION_NONE, + VA_DISPLAY_ATTRIB_GETTABLE|VA_DISPLAY_ATTRIB_SETTABLE + }, +}; + /* List of supported image formats */ typedef struct { unsigned int type; @@ -86,11 +316,23 @@ static const i965_image_format_map_t i965_image_formats_map[I965_MAX_IMAGE_FORMATS + 1] = { { I965_SURFACETYPE_YUV, - { VA_FOURCC('Y','V','1','2'), VA_LSB_FIRST, 12, } }, + { VA_FOURCC_YV12, VA_LSB_FIRST, 12, } }, + { I965_SURFACETYPE_YUV, + { VA_FOURCC_I420, VA_LSB_FIRST, 12, } }, + { I965_SURFACETYPE_YUV, + { VA_FOURCC_NV12, VA_LSB_FIRST, 12, } }, + { I965_SURFACETYPE_YUV, + { VA_FOURCC_YUY2, VA_LSB_FIRST, 16, } }, + { I965_SURFACETYPE_YUV, + { VA_FOURCC_UYVY, VA_LSB_FIRST, 16, } }, { I965_SURFACETYPE_YUV, - { VA_FOURCC('I','4','2','0'), VA_LSB_FIRST, 12, } }, + { VA_FOURCC_422H, VA_LSB_FIRST, 16, } }, + { I965_SURFACETYPE_RGBA, + { VA_FOURCC_RGBX, VA_LSB_FIRST, 32, 24, 0x000000ff, 0x0000ff00, 0x00ff0000 } }, + { I965_SURFACETYPE_RGBA, + { VA_FOURCC_BGRX, VA_LSB_FIRST, 32, 24, 0x00ff0000, 0x0000ff00, 0x000000ff } }, { I965_SURFACETYPE_YUV, - { VA_FOURCC('N','V','1','2'), VA_LSB_FIRST, 12, } }, + { VA_FOURCC_P010, VA_LSB_FIRST, 24, } }, }; /* List of supported subpicture formats */ @@ -101,22 +343,32 @@ unsigned int va_flags; } i965_subpic_format_map_t; +#define COMMON_SUBPICTURE_FLAGS \ + (VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD| \ + VA_SUBPICTURE_GLOBAL_ALPHA) + static const i965_subpic_format_map_t i965_subpic_formats_map[I965_MAX_SUBPIC_FORMATS + 1] = { { I965_SURFACETYPE_INDEXED, I965_SURFACEFORMAT_P4A4_UNORM, - { VA_FOURCC('I','A','4','4'), VA_MSB_FIRST, 8, }, - VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, + { VA_FOURCC_IA44, VA_MSB_FIRST, 8, }, + COMMON_SUBPICTURE_FLAGS }, { I965_SURFACETYPE_INDEXED, I965_SURFACEFORMAT_A4P4_UNORM, - { VA_FOURCC('A','I','4','4'), VA_MSB_FIRST, 8, }, - VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, - { I965_SURFACETYPE_RGBA, I965_SURFACEFORMAT_B8G8R8A8_UNORM, - { VA_FOURCC('B','G','R','A'), VA_LSB_FIRST, 32, + { VA_FOURCC_AI44, VA_MSB_FIRST, 8, }, + COMMON_SUBPICTURE_FLAGS }, + { I965_SURFACETYPE_INDEXED, I965_SURFACEFORMAT_P8A8_UNORM, + { VA_FOURCC_IA88, VA_MSB_FIRST, 16, }, + COMMON_SUBPICTURE_FLAGS }, + { I965_SURFACETYPE_INDEXED, I965_SURFACEFORMAT_A8P8_UNORM, + { VA_FOURCC_AI88, VA_MSB_FIRST, 16, }, + COMMON_SUBPICTURE_FLAGS }, + { I965_SURFACETYPE_RGBA, I965_SURFACEFORMAT_B8G8R8A8_UNORM, + { VA_FOURCC_BGRA, VA_LSB_FIRST, 32, 32, 0x00ff0000, 0x0000ff00, 0x000000ff, 0xff000000 }, - VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, + COMMON_SUBPICTURE_FLAGS }, { I965_SURFACETYPE_RGBA, I965_SURFACEFORMAT_R8G8B8A8_UNORM, - { VA_FOURCC('R','G','B','A'), VA_LSB_FIRST, 32, + { VA_FOURCC_RGBA, VA_LSB_FIRST, 32, 32, 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 }, - VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD }, + COMMON_SUBPICTURE_FLAGS }, }; static const i965_subpic_format_map_t * @@ -137,30 +389,168 @@ return NULL; } -extern struct hw_context *g4x_dec_hw_context_init(VADriverContextP, VAProfile); -static struct hw_codec_info g4x_hw_codec_info = { - .dec_hw_context_init = g4x_dec_hw_context_init, - .enc_hw_context_init = NULL, -}; +/* Checks whether the surface is in busy state */ +static bool +is_surface_busy(struct i965_driver_data *i965, + struct object_surface *obj_surface) +{ + assert(obj_surface != NULL); -extern struct hw_context *ironlake_dec_hw_context_init(VADriverContextP, VAProfile); -static struct hw_codec_info ironlake_hw_codec_info = { - .dec_hw_context_init = ironlake_dec_hw_context_init, - .enc_hw_context_init = NULL, -}; + if (obj_surface->locked_image_id != VA_INVALID_ID) + return true; + if (obj_surface->derived_image_id != VA_INVALID_ID) + return true; + return false; +} -extern struct hw_context *gen6_dec_hw_context_init(VADriverContextP, VAProfile); -extern struct hw_context *gen6_enc_hw_context_init(VADriverContextP, VAProfile); -static struct hw_codec_info gen6_hw_codec_info = { - .dec_hw_context_init = gen6_dec_hw_context_init, - .enc_hw_context_init = gen6_enc_hw_context_init, -}; +/* Checks whether the image is in busy state */ +static bool +is_image_busy(struct i965_driver_data *i965, struct object_image *obj_image, VASurfaceID surface) +{ + struct object_buffer *obj_buffer; -extern struct hw_context *gen7_dec_hw_context_init(VADriverContextP, VAProfile); -static struct hw_codec_info gen7_hw_codec_info = { - .dec_hw_context_init = gen7_dec_hw_context_init, - .enc_hw_context_init = gen6_enc_hw_context_init, -}; + assert(obj_image != NULL); + + if (obj_image->derived_surface != VA_INVALID_ID && + obj_image->derived_surface == surface) + return true; + + obj_buffer = BUFFER(obj_image->image.buf); + if (obj_buffer && obj_buffer->export_refcount > 0) + return true; + return false; +} + +#define I965_PACKED_HEADER_BASE 0 +#define I965_SEQ_PACKED_HEADER_BASE 0 +#define I965_SEQ_PACKED_HEADER_END 2 +#define I965_PIC_PACKED_HEADER_BASE 2 +#define I965_PACKED_MISC_HEADER_BASE 4 + +int +va_enc_packed_type_to_idx(int packed_type) +{ + int idx = 0; + + if (packed_type & VAEncPackedHeaderMiscMask) { + idx = I965_PACKED_MISC_HEADER_BASE; + packed_type = (~VAEncPackedHeaderMiscMask & packed_type); + ASSERT_RET(packed_type > 0, 0); + idx += (packed_type - 1); + } else { + idx = I965_PACKED_HEADER_BASE; + + switch (packed_type) { + case VAEncPackedHeaderSequence: + idx = I965_SEQ_PACKED_HEADER_BASE + 0; + break; + + case VAEncPackedHeaderPicture: + idx = I965_PIC_PACKED_HEADER_BASE + 0; + break; + + case VAEncPackedHeaderSlice: + idx = I965_PIC_PACKED_HEADER_BASE + 1; + break; + + default: + /* Should not get here */ + ASSERT_RET(0, 0); + break; + } + } + + ASSERT_RET(idx < 5, 0); + return idx; +} + +#define CALL_VTABLE(vawr, status, param) status = (vawr->vtable->param) + +static VAStatus +i965_surface_wrapper(VADriverContextP ctx, VASurfaceID surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = SURFACE(surface); + VAStatus va_status = VA_STATUS_SUCCESS; + + if (!obj_surface) { + return VA_STATUS_ERROR_INVALID_SURFACE; + } + + if (obj_surface->wrapper_surface != VA_INVALID_ID) { + /* the wrapped surface already exists. just return it */ + return va_status; + } + + if (obj_surface->fourcc == 0) + i965_check_alloc_surface_bo(ctx, obj_surface, + 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + /* + * TBD: Support more surface formats. + * Currently only NV12 is support as NV12 is used by decoding. + */ + if (obj_surface->fourcc != VA_FOURCC_NV12 ) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if ((i965->wrapper_pdrvctx == NULL) || + (obj_surface->bo == NULL)) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + { + int fd_handle; + VASurfaceAttrib attrib_list[2]; + VASurfaceAttribExternalBuffers buffer_descriptor; + VAGenericID wrapper_surface; + + if (drm_intel_bo_gem_export_to_prime(obj_surface->bo, &fd_handle) != 0) + return VA_STATUS_ERROR_OPERATION_FAILED; + + obj_surface->exported_primefd = fd_handle; + + memset(&attrib_list, 0, sizeof(attrib_list)); + memset(&buffer_descriptor, 0, sizeof(buffer_descriptor)); + + attrib_list[0].type = VASurfaceAttribExternalBufferDescriptor; + attrib_list[0].flags = VA_SURFACE_ATTRIB_SETTABLE; + attrib_list[0].value.value.p = &buffer_descriptor; + attrib_list[0].value.type = VAGenericValueTypePointer; + + attrib_list[1].type = VASurfaceAttribMemoryType; + attrib_list[1].flags = VA_SURFACE_ATTRIB_SETTABLE; + attrib_list[1].value.value.i = VA_SURFACE_ATTRIB_MEM_TYPE_DRM_PRIME; + attrib_list[1].value.type = VAGenericValueTypeInteger; + + buffer_descriptor.num_buffers = 1; + buffer_descriptor.num_planes = 2; + buffer_descriptor.width = obj_surface->orig_width; + buffer_descriptor.height = obj_surface->orig_height; + buffer_descriptor.pixel_format = obj_surface->fourcc; + buffer_descriptor.data_size = obj_surface->size; + buffer_descriptor.pitches[0] = obj_surface->width; + buffer_descriptor.pitches[1] = obj_surface->cb_cr_pitch; + buffer_descriptor.offsets[0] = 0; + buffer_descriptor.offsets[1] = obj_surface->width * obj_surface->height; + buffer_descriptor.buffers = (void *)&fd_handle; + + CALL_VTABLE(i965->wrapper_pdrvctx, va_status, + vaCreateSurfaces2(i965->wrapper_pdrvctx, + VA_RT_FORMAT_YUV420, + obj_surface->orig_width, + obj_surface->orig_height, + &wrapper_surface, 1, + attrib_list, 2)); + + if (va_status == VA_STATUS_SUCCESS) { + obj_surface->wrapper_surface = wrapper_surface; + } else { + /* This needs to be checked */ + va_status = VA_STATUS_ERROR_OPERATION_FAILED; + } + return va_status; + } + +} VAStatus i965_QueryConfigProfiles(VADriverContextP ctx, @@ -170,25 +560,85 @@ struct i965_driver_data * const i965 = i965_driver_data(ctx); int i = 0; - if (HAS_MPEG2(i965)) { + if (HAS_MPEG2_DECODING(i965) || + HAS_MPEG2_ENCODING(i965)) { profile_list[i++] = VAProfileMPEG2Simple; profile_list[i++] = VAProfileMPEG2Main; } - if (HAS_H264(i965)) { - profile_list[i++] = VAProfileH264Baseline; + if (HAS_H264_DECODING(i965) || + HAS_H264_ENCODING(i965) || + HAS_LP_H264_ENCODING(i965)) { + profile_list[i++] = VAProfileH264ConstrainedBaseline; profile_list[i++] = VAProfileH264Main; profile_list[i++] = VAProfileH264High; } + if (HAS_H264_MVC_DECODING_PROFILE(i965, VAProfileH264MultiviewHigh) || + HAS_H264_MVC_ENCODING(i965)) + profile_list[i++] = VAProfileH264MultiviewHigh; + if (HAS_H264_MVC_DECODING_PROFILE(i965, VAProfileH264StereoHigh) || + HAS_H264_MVC_ENCODING(i965)) + profile_list[i++] = VAProfileH264StereoHigh; - if (HAS_VC1(i965)) { + if (HAS_VC1_DECODING(i965)) { profile_list[i++] = VAProfileVC1Simple; profile_list[i++] = VAProfileVC1Main; profile_list[i++] = VAProfileVC1Advanced; } + if (HAS_VPP(i965)) { + profile_list[i++] = VAProfileNone; + } + + if (HAS_JPEG_DECODING(i965) || + HAS_JPEG_ENCODING(i965)) { + profile_list[i++] = VAProfileJPEGBaseline; + } + + if (HAS_VP8_DECODING(i965) || + HAS_VP8_ENCODING(i965)) { + profile_list[i++] = VAProfileVP8Version0_3; + } + + if (HAS_HEVC_DECODING(i965)|| + HAS_HEVC_ENCODING(i965)) { + profile_list[i++] = VAProfileHEVCMain; + } + + if (HAS_HEVC10_DECODING(i965)) { + profile_list[i++] = VAProfileHEVCMain10; + } + + if(HAS_VP9_DECODING_PROFILE(i965, VAProfileVP9Profile0) || + HAS_VP9_ENCODING(i965)) { + profile_list[i++] = VAProfileVP9Profile0; + } + + if(HAS_VP9_DECODING_PROFILE(i965, VAProfileVP9Profile2)) { + profile_list[i++] = VAProfileVP9Profile2; + } + + if (i965->wrapper_pdrvctx) { + VAProfile wrapper_list[4]; + int wrapper_num; + VADriverContextP pdrvctx; + VAStatus va_status; + + pdrvctx = i965->wrapper_pdrvctx; + CALL_VTABLE(pdrvctx, va_status, + vaQueryConfigProfiles(pdrvctx, + wrapper_list, &wrapper_num)); + + if (va_status == VA_STATUS_SUCCESS) { + int j; + for (j = 0; j < wrapper_num; j++) + if (wrapper_list[j] != VAProfileNone) + profile_list[i++] = wrapper_list[j]; + } + } + /* If the assert fails then I965_MAX_PROFILES needs to be bigger */ - assert(i <= I965_MAX_PROFILES); + ASSERT_RET(i <= I965_MAX_PROFILES, VA_STATUS_ERROR_OPERATION_FAILED); *num_profiles = i; return VA_STATUS_SUCCESS; @@ -206,159 +656,491 @@ switch (profile) { case VAProfileMPEG2Simple: case VAProfileMPEG2Main: - if (HAS_MPEG2(i965)) + if (HAS_MPEG2_DECODING(i965)) entrypoint_list[n++] = VAEntrypointVLD; + + if (HAS_MPEG2_ENCODING(i965)) + entrypoint_list[n++] = VAEntrypointEncSlice; + break; - case VAProfileH264Baseline: + case VAProfileH264ConstrainedBaseline: case VAProfileH264Main: case VAProfileH264High: - if (HAS_H264(i965)) + if (HAS_H264_DECODING(i965)) entrypoint_list[n++] = VAEntrypointVLD; - - if (HAS_ENCODER(i965)) + + if (HAS_H264_ENCODING(i965)) entrypoint_list[n++] = VAEntrypointEncSlice; + if (HAS_LP_H264_ENCODING(i965)) + entrypoint_list[n++] = VAEntrypointEncSliceLP; + + break; + case VAProfileH264MultiviewHigh: + case VAProfileH264StereoHigh: + if (HAS_H264_MVC_DECODING_PROFILE(i965, profile)) + entrypoint_list[n++] = VAEntrypointVLD; + + if (HAS_H264_MVC_ENCODING(i965)) + entrypoint_list[n++] = VAEntrypointEncSlice; break; case VAProfileVC1Simple: case VAProfileVC1Main: case VAProfileVC1Advanced: - if (HAS_VC1(i965)) + if (HAS_VC1_DECODING(i965)) entrypoint_list[n++] = VAEntrypointVLD; break; - default: + case VAProfileNone: + if (HAS_VPP(i965)) + entrypoint_list[n++] = VAEntrypointVideoProc; break; - } - /* If the assert fails then I965_MAX_ENTRYPOINTS needs to be bigger */ - assert(n <= I965_MAX_ENTRYPOINTS); - *num_entrypoints = n; - return n > 0 ? VA_STATUS_SUCCESS : VA_STATUS_ERROR_UNSUPPORTED_PROFILE; -} + case VAProfileJPEGBaseline: + if (HAS_JPEG_DECODING(i965)) + entrypoint_list[n++] = VAEntrypointVLD; + + if (HAS_JPEG_ENCODING(i965)) + entrypoint_list[n++] = VAEntrypointEncPicture; + break; -VAStatus -i965_GetConfigAttributes(VADriverContextP ctx, - VAProfile profile, - VAEntrypoint entrypoint, - VAConfigAttrib *attrib_list, /* in/out */ - int num_attribs) -{ - int i; + case VAProfileVP8Version0_3: + if (HAS_VP8_DECODING(i965)) + entrypoint_list[n++] = VAEntrypointVLD; + + if (HAS_VP8_ENCODING(i965)) + entrypoint_list[n++] = VAEntrypointEncSlice; - /* Other attributes don't seem to be defined */ - /* What to do if we don't know the attribute? */ - for (i = 0; i < num_attribs; i++) { - switch (attrib_list[i].type) { - case VAConfigAttribRTFormat: - attrib_list[i].value = VA_RT_FORMAT_YUV420; - break; + break; - case VAConfigAttribRateControl: - attrib_list[i].value = VA_RC_VBR; - break; + case VAProfileHEVCMain: + if (HAS_HEVC_DECODING(i965)) + entrypoint_list[n++] = VAEntrypointVLD; - default: - /* Do nothing */ - attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED; - break; - } - } + if (HAS_HEVC_ENCODING(i965)) + entrypoint_list[n++] = VAEntrypointEncSlice; - return VA_STATUS_SUCCESS; -} + break; -static void -i965_destroy_config(struct object_heap *heap, struct object_base *obj) -{ - object_heap_free(heap, obj); -} + case VAProfileHEVCMain10: + if (HAS_HEVC10_DECODING(i965)) + entrypoint_list[n++] = VAEntrypointVLD; -static VAStatus -i965_update_attribute(struct object_config *obj_config, VAConfigAttrib *attrib) -{ - int i; + break; + + case VAProfileVP9Profile0: + case VAProfileVP9Profile2: + if(HAS_VP9_DECODING_PROFILE(i965, profile)) + entrypoint_list[n++] = VAEntrypointVLD; + + if (HAS_VP9_ENCODING(i965) && (profile == VAProfileVP9Profile0)) + entrypoint_list[n++] = VAEntrypointEncSlice; - /* Check existing attrbiutes */ - for (i = 0; obj_config->num_attribs < i; i++) { - if (obj_config->attrib_list[i].type == attrib->type) { - /* Update existing attribute */ - obj_config->attrib_list[i].value = attrib->value; - return VA_STATUS_SUCCESS; + if(profile == VAProfileVP9Profile0) { + if (i965->wrapper_pdrvctx) { + VAStatus va_status = VA_STATUS_SUCCESS; + VADriverContextP pdrvctx = i965->wrapper_pdrvctx; + + CALL_VTABLE(pdrvctx, va_status, + vaQueryConfigEntrypoints(pdrvctx, profile, + entrypoint_list, + num_entrypoints)); + return va_status; + } } - } - if (obj_config->num_attribs < I965_MAX_CONFIG_ATTRIBUTES) { - i = obj_config->num_attribs; - obj_config->attrib_list[i].type = attrib->type; - obj_config->attrib_list[i].value = attrib->value; - obj_config->num_attribs++; - return VA_STATUS_SUCCESS; + break; + + default: + break; } - return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + /* If the assert fails then I965_MAX_ENTRYPOINTS needs to be bigger */ + ASSERT_RET(n <= I965_MAX_ENTRYPOINTS, VA_STATUS_ERROR_OPERATION_FAILED); + *num_entrypoints = n; + return n > 0 ? VA_STATUS_SUCCESS : VA_STATUS_ERROR_UNSUPPORTED_PROFILE; } -VAStatus -i965_CreateConfig(VADriverContextP ctx, - VAProfile profile, - VAEntrypoint entrypoint, - VAConfigAttrib *attrib_list, - int num_attribs, - VAConfigID *config_id) /* out */ +static VAStatus +i965_validate_config(VADriverContextP ctx, VAProfile profile, + VAEntrypoint entrypoint) { struct i965_driver_data * const i965 = i965_driver_data(ctx); - struct object_config *obj_config; - int configID; - int i; - VAStatus vaStatus; + VAStatus va_status; /* Validate profile & entrypoint */ switch (profile) { case VAProfileMPEG2Simple: case VAProfileMPEG2Main: - if (HAS_MPEG2(i965) && VAEntrypointVLD == entrypoint) { - vaStatus = VA_STATUS_SUCCESS; + if ((HAS_MPEG2_DECODING(i965) && entrypoint == VAEntrypointVLD) || + (HAS_MPEG2_ENCODING(i965) && entrypoint == VAEntrypointEncSlice)) { + va_status = VA_STATUS_SUCCESS; } else { - vaStatus = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; } break; - case VAProfileH264Baseline: + case VAProfileH264ConstrainedBaseline: case VAProfileH264Main: case VAProfileH264High: - if ((HAS_H264(i965) && VAEntrypointVLD == entrypoint) || - (HAS_ENCODER(i965) && VAEntrypointEncSlice == entrypoint)) { - vaStatus = VA_STATUS_SUCCESS; + if ((HAS_H264_DECODING(i965) && entrypoint == VAEntrypointVLD) || + (HAS_H264_ENCODING(i965) && entrypoint == VAEntrypointEncSlice) || + (HAS_LP_H264_ENCODING(i965) && entrypoint == VAEntrypointEncSliceLP)) { + va_status = VA_STATUS_SUCCESS; } else { - vaStatus = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; } - break; case VAProfileVC1Simple: case VAProfileVC1Main: case VAProfileVC1Advanced: - if (HAS_VC1(i965) && VAEntrypointVLD == entrypoint) { - vaStatus = VA_STATUS_SUCCESS; + if (HAS_VC1_DECODING(i965) && entrypoint == VAEntrypointVLD) { + va_status = VA_STATUS_SUCCESS; } else { - vaStatus = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; } + break; + case VAProfileNone: + if (HAS_VPP(i965) && VAEntrypointVideoProc == entrypoint) { + va_status = VA_STATUS_SUCCESS; + } else { + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } break; - default: - vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + case VAProfileJPEGBaseline: + if ((HAS_JPEG_DECODING(i965) && entrypoint == VAEntrypointVLD) || + (HAS_JPEG_ENCODING(i965) && entrypoint == VAEntrypointEncPicture)) { + va_status = VA_STATUS_SUCCESS; + } else { + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } break; - } - if (VA_STATUS_SUCCESS != vaStatus) { - return vaStatus; - } + case VAProfileVP8Version0_3: + if ((HAS_VP8_DECODING(i965) && entrypoint == VAEntrypointVLD) || + (HAS_VP8_ENCODING(i965) && entrypoint == VAEntrypointEncSlice)) { + va_status = VA_STATUS_SUCCESS; + } else { + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } + break; - configID = NEW_CONFIG_ID(); - obj_config = CONFIG(configID); + case VAProfileH264MultiviewHigh: + case VAProfileH264StereoHigh: + if ((HAS_H264_MVC_DECODING_PROFILE(i965, profile) && + entrypoint == VAEntrypointVLD) || + (HAS_H264_MVC_ENCODING(i965) && entrypoint == VAEntrypointEncSlice)) { + va_status = VA_STATUS_SUCCESS; + } else { + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + } + + break; + + case VAProfileHEVCMain: + if ((HAS_HEVC_DECODING(i965) && (entrypoint == VAEntrypointVLD))|| + (HAS_HEVC_ENCODING(i965) && (entrypoint == VAEntrypointEncSlice))) + va_status = VA_STATUS_SUCCESS; + else + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + + break; + + case VAProfileHEVCMain10: + if (HAS_HEVC10_DECODING(i965) && (entrypoint == VAEntrypointVLD)) + va_status = VA_STATUS_SUCCESS; + else + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + + break; + + case VAProfileVP9Profile0: + case VAProfileVP9Profile2: + if ((HAS_VP9_DECODING_PROFILE(i965, profile)) && (entrypoint == VAEntrypointVLD)) + va_status = VA_STATUS_SUCCESS; + else if ((HAS_VP9_ENCODING(i965)) && (entrypoint == VAEntrypointEncSlice)) + va_status = VA_STATUS_SUCCESS; + else if ((profile == VAProfileVP9Profile0) && i965->wrapper_pdrvctx) + va_status = VA_STATUS_SUCCESS; + else + va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; + break; + + default: + va_status = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } + return va_status; +} + +static uint32_t +i965_get_default_chroma_formats(VADriverContextP ctx, VAProfile profile, + VAEntrypoint entrypoint) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + uint32_t chroma_formats = VA_RT_FORMAT_YUV420; + + switch (profile) { + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + if (HAS_H264_DECODING(i965) && entrypoint == VAEntrypointVLD) + chroma_formats |= i965->codec_info->h264_dec_chroma_formats; + break; + + case VAProfileH264MultiviewHigh: + case VAProfileH264StereoHigh: + if (HAS_H264_MVC_DECODING(i965) && entrypoint == VAEntrypointVLD) + chroma_formats |= i965->codec_info->h264_dec_chroma_formats; + break; + + case VAProfileJPEGBaseline: + if (HAS_JPEG_DECODING(i965) && entrypoint == VAEntrypointVLD) + chroma_formats |= i965->codec_info->jpeg_dec_chroma_formats; + if (HAS_JPEG_ENCODING(i965) && entrypoint == VAEntrypointEncPicture) + chroma_formats |= i965->codec_info->jpeg_enc_chroma_formats; + break; + + case VAProfileHEVCMain10: + if (HAS_HEVC10_DECODING(i965) && entrypoint == VAEntrypointVLD) + chroma_formats |= i965->codec_info->hevc_dec_chroma_formats; + break; + + case VAProfileNone: + if(HAS_VPP_P010(i965)) + chroma_formats |= VA_RT_FORMAT_YUV420_10BPP; + break; + + case VAProfileVP9Profile0: + case VAProfileVP9Profile2: + if (HAS_VP9_DECODING_PROFILE(i965, profile) && entrypoint == VAEntrypointVLD) + chroma_formats |= i965->codec_info->vp9_dec_chroma_formats; + break; + + default: + break; + } + return chroma_formats; +} + +VAStatus +i965_GetConfigAttributes(VADriverContextP ctx, + VAProfile profile, + VAEntrypoint entrypoint, + VAConfigAttrib *attrib_list, /* in/out */ + int num_attribs) +{ + VAStatus va_status; + int i; + + va_status = i965_validate_config(ctx, profile, entrypoint); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + /* Other attributes don't seem to be defined */ + /* What to do if we don't know the attribute? */ + for (i = 0; i < num_attribs; i++) { + attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED; + switch (attrib_list[i].type) { + case VAConfigAttribRTFormat: + attrib_list[i].value = i965_get_default_chroma_formats(ctx, + profile, entrypoint); + break; + + case VAConfigAttribRateControl: + if (entrypoint == VAEntrypointEncSlice) { + attrib_list[i].value = VA_RC_CQP; + + if (profile != VAProfileMPEG2Main && + profile != VAProfileMPEG2Simple) + attrib_list[i].value |= VA_RC_CBR; + + if (profile == VAProfileVP9Profile0) + attrib_list[i].value |= VA_RC_VBR; + + break; + } else if (entrypoint == VAEntrypointEncSliceLP) { + struct i965_driver_data * const i965 = i965_driver_data(ctx); + + /* Support low power encoding for H.264 only by now */ + if (profile == VAProfileH264ConstrainedBaseline || + profile == VAProfileH264Main || + profile == VAProfileH264High) + attrib_list[i].value = i965->codec_info->lp_h264_brc_mode; + else + attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED; + } else + attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED; + + break; + + case VAConfigAttribEncPackedHeaders: + if (entrypoint == VAEntrypointEncSlice || + entrypoint == VAEntrypointEncSliceLP) { + attrib_list[i].value = VA_ENC_PACKED_HEADER_SEQUENCE | VA_ENC_PACKED_HEADER_PICTURE | VA_ENC_PACKED_HEADER_MISC; + if (profile == VAProfileH264ConstrainedBaseline || + profile == VAProfileH264Main || + profile == VAProfileH264High || + profile == VAProfileH264StereoHigh || + profile == VAProfileH264MultiviewHigh || + profile == VAProfileHEVCMain) { + attrib_list[i].value |= (VA_ENC_PACKED_HEADER_RAW_DATA | + VA_ENC_PACKED_HEADER_SLICE); + } + else if (profile == VAProfileVP9Profile0) + attrib_list[i].value = VA_ENC_PACKED_HEADER_RAW_DATA; + break; + } + else if (entrypoint == VAEntrypointEncPicture) { + if (profile == VAProfileJPEGBaseline) + attrib_list[i].value = VA_ENC_PACKED_HEADER_RAW_DATA; + } + break; + + case VAConfigAttribEncMaxRefFrames: + if (entrypoint == VAEntrypointEncSlice) + attrib_list[i].value = (1 << 16) | (1 << 0); + else if (entrypoint == VAEntrypointEncSliceLP) { + /* Don't support B frame for low power mode */ + if (profile == VAProfileH264ConstrainedBaseline || + profile == VAProfileH264Main || + profile == VAProfileH264High) + attrib_list[i].value = (1 << 0); + else + attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED; + } + + break; + + case VAConfigAttribEncQualityRange: + if (entrypoint == VAEntrypointEncSlice || + entrypoint == VAEntrypointEncSliceLP) { + attrib_list[i].value = 1; + if (profile == VAProfileH264ConstrainedBaseline || + profile == VAProfileH264Main || + profile == VAProfileH264High ) + attrib_list[i].value = ENCODER_QUALITY_RANGE; + break; + } + break; + + case VAConfigAttribEncJPEG: + if( entrypoint == VAEntrypointEncPicture) { + VAConfigAttribValEncJPEG *configVal = (VAConfigAttribValEncJPEG*)&(attrib_list[i].value); + (configVal->bits).arithmatic_coding_mode = 0; // Huffman coding is used + (configVal->bits).progressive_dct_mode = 0; // Only Sequential DCT is supported + (configVal->bits).non_interleaved_mode = 1; // Support both interleaved and non-interleaved + (configVal->bits).differential_mode = 0; // Baseline DCT is non-differential + (configVal->bits).max_num_components = 3; // Only 3 components supported + (configVal->bits).max_num_scans = 1; // Only 1 scan per frame + (configVal->bits).max_num_huffman_tables = 3; // Max 3 huffman tables + (configVal->bits).max_num_quantization_tables = 3; // Max 3 quantization tables + } + break; + + case VAConfigAttribDecSliceMode: + attrib_list[i].value = VA_DEC_SLICE_MODE_NORMAL; + break; + + case VAConfigAttribEncROI: + if ((entrypoint == VAEntrypointEncSliceLP) && + (profile == VAProfileH264ConstrainedBaseline || + profile == VAProfileH264Main || + profile == VAProfileH264High)) + attrib_list[i].value = 3; + else + attrib_list[i].value = 0; + + break; + + default: + /* Do nothing */ + attrib_list[i].value = VA_ATTRIB_NOT_SUPPORTED; + break; + } + } + + return VA_STATUS_SUCCESS; +} + +static void +i965_destroy_config(struct object_heap *heap, struct object_base *obj) +{ + object_heap_free(heap, obj); +} + +static VAConfigAttrib * +i965_lookup_config_attribute(struct object_config *obj_config, + VAConfigAttribType type) +{ + int i; + + for (i = 0; i < obj_config->num_attribs; i++) { + VAConfigAttrib * const attrib = &obj_config->attrib_list[i]; + if (attrib->type == type) + return attrib; + } + return NULL; +} + +static VAStatus +i965_append_config_attribute(struct object_config *obj_config, + const VAConfigAttrib *new_attrib) +{ + VAConfigAttrib *attrib; + + if (obj_config->num_attribs >= I965_MAX_CONFIG_ATTRIBUTES) + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + + attrib = &obj_config->attrib_list[obj_config->num_attribs++]; + attrib->type = new_attrib->type; + attrib->value = new_attrib->value; + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_ensure_config_attribute(struct object_config *obj_config, + const VAConfigAttrib *new_attrib) +{ + VAConfigAttrib *attrib; + + /* Check for existing attributes */ + attrib = i965_lookup_config_attribute(obj_config, new_attrib->type); + if (attrib) { + /* Update existing attribute */ + attrib->value = new_attrib->value; + return VA_STATUS_SUCCESS; + } + return i965_append_config_attribute(obj_config, new_attrib); +} + +VAStatus +i965_CreateConfig(VADriverContextP ctx, + VAProfile profile, + VAEntrypoint entrypoint, + VAConfigAttrib *attrib_list, + int num_attribs, + VAConfigID *config_id) /* out */ +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_config *obj_config; + int configID; + int i; + VAStatus vaStatus; + + vaStatus = i965_validate_config(ctx, profile, entrypoint); + + if (VA_STATUS_SUCCESS != vaStatus) { + return vaStatus; + } + + configID = NEW_CONFIG_ID(); + obj_config = CONFIG(configID); if (NULL == obj_config) { vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; @@ -367,15 +1149,41 @@ obj_config->profile = profile; obj_config->entrypoint = entrypoint; - obj_config->attrib_list[0].type = VAConfigAttribRTFormat; - obj_config->attrib_list[0].value = VA_RT_FORMAT_YUV420; - obj_config->num_attribs = 1; + obj_config->num_attribs = 0; + obj_config->wrapper_config = VA_INVALID_ID; - for(i = 0; i < num_attribs; i++) { - vaStatus = i965_update_attribute(obj_config, &(attrib_list[i])); - - if (VA_STATUS_SUCCESS != vaStatus) { + for (i = 0; i < num_attribs; i++) { + vaStatus = i965_ensure_config_attribute(obj_config, &attrib_list[i]); + if (vaStatus != VA_STATUS_SUCCESS) break; + } + + if (vaStatus == VA_STATUS_SUCCESS) { + VAConfigAttrib attrib, *attrib_found; + attrib.type = VAConfigAttribRTFormat; + attrib.value = i965_get_default_chroma_formats(ctx, profile, entrypoint); + attrib_found = i965_lookup_config_attribute(obj_config, attrib.type); + if (!attrib_found || !attrib_found->value) + vaStatus = i965_append_config_attribute(obj_config, &attrib); + else if (!(attrib_found->value & attrib.value)) + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + + if ((vaStatus == VA_STATUS_SUCCESS) && + (profile == VAProfileVP9Profile0) && + (entrypoint == VAEntrypointVLD) && + !HAS_VP9_DECODING(i965)) { + + if (i965->wrapper_pdrvctx) { + VAGenericID wrapper_config; + + CALL_VTABLE(i965->wrapper_pdrvctx, vaStatus, + vaCreateConfig(i965->wrapper_pdrvctx, profile, + entrypoint, attrib_list, + num_attribs, &wrapper_config)); + + if (vaStatus == VA_STATUS_SUCCESS) + obj_config->wrapper_config = wrapper_config; } } @@ -401,6 +1209,14 @@ return vaStatus; } + if ((obj_config->wrapper_config != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + CALL_VTABLE(i965->wrapper_pdrvctx, vaStatus, + vaDestroyConfig(i965->wrapper_pdrvctx, + obj_config->wrapper_config)); + obj_config->wrapper_config = VA_INVALID_ID; + } + i965_destroy_config(&i965->config_heap, (struct object_base *)obj_config); return VA_STATUS_SUCCESS; } @@ -417,7 +1233,7 @@ VAStatus vaStatus = VA_STATUS_SUCCESS; int i; - assert(obj_config); + ASSERT_RET(obj_config, VA_STATUS_ERROR_INVALID_CONFIG); *profile = obj_config->profile; *entrypoint = obj_config->entrypoint; *num_attribs = obj_config->num_attribs; @@ -429,10 +1245,11 @@ return vaStatus; } -static void -i965_destroy_surface(struct object_heap *heap, struct object_base *obj) +void +i965_destroy_surface_storage(struct object_surface *obj_surface) { - struct object_surface *obj_surface = (struct object_surface *)obj; + if (!obj_surface) + return; dri_bo_unreference(obj_surface->bo); obj_surface->bo = NULL; @@ -441,24 +1258,305 @@ obj_surface->free_private_data(&obj_surface->private_data); obj_surface->private_data = NULL; } +} + +static void +i965_destroy_surface(struct object_heap *heap, struct object_base *obj) +{ + struct object_surface *obj_surface = (struct object_surface *)obj; + i965_destroy_surface_storage(obj_surface); object_heap_free(heap, obj); } -VAStatus -i965_CreateSurfaces(VADriverContextP ctx, - int width, - int height, - int format, - int num_surfaces, - VASurfaceID *surfaces) /* out */ +static VAStatus +i965_surface_native_memory(VADriverContextP ctx, + struct object_surface *obj_surface, + int format, + int expected_fourcc) { struct i965_driver_data *i965 = i965_driver_data(ctx); - int i; + int tiling = HAS_TILED_SURFACE(i965); + + if (!expected_fourcc) + return VA_STATUS_SUCCESS; + + // todo, should we disable tiling for 422 format? + if (expected_fourcc == VA_FOURCC_I420 || + expected_fourcc == VA_FOURCC_IYUV || + expected_fourcc == VA_FOURCC_YV12 || + expected_fourcc == VA_FOURCC_YV16) + tiling = 0; + + return i965_check_alloc_surface_bo(ctx, obj_surface, tiling, expected_fourcc, get_sampling_from_fourcc(expected_fourcc)); +} + +static VAStatus +i965_suface_external_memory(VADriverContextP ctx, + struct object_surface *obj_surface, + int external_memory_type, + VASurfaceAttribExternalBuffers *memory_attibute, + int index) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + if (!memory_attibute || + !memory_attibute->buffers || + index > memory_attibute->num_buffers) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + ASSERT_RET(obj_surface->orig_width == memory_attibute->width, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(obj_surface->orig_height == memory_attibute->height, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->num_planes >= 1, VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->fourcc = memory_attibute->pixel_format; + obj_surface->width = memory_attibute->pitches[0]; + obj_surface->size = memory_attibute->data_size; + + if (memory_attibute->num_planes == 1) + obj_surface->height = memory_attibute->data_size / obj_surface->width; + else + obj_surface->height = memory_attibute->offsets[1] / obj_surface->width; + + obj_surface->x_cb_offset = 0; /* X offset is always 0 */ + obj_surface->x_cr_offset = 0; + + switch (obj_surface->fourcc) { + case VA_FOURCC_NV12: + case VA_FOURCC_P010: + ASSERT_RET(memory_attibute->num_planes == 2, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->pitches[0] == memory_attibute->pitches[1], VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV420; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->height; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + case VA_FOURCC_YV12: + case VA_FOURCC_IMC1: + ASSERT_RET(memory_attibute->num_planes == 3, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->pitches[1] == memory_attibute->pitches[2], VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV420; + obj_surface->y_cr_offset = obj_surface->height; + obj_surface->y_cb_offset = memory_attibute->offsets[2] / obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + case VA_FOURCC_I420: + case VA_FOURCC_IYUV: + case VA_FOURCC_IMC3: + ASSERT_RET(memory_attibute->num_planes == 3, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->pitches[1] == memory_attibute->pitches[2], VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV420; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = memory_attibute->offsets[2] / obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + ASSERT_RET(memory_attibute->num_planes == 1, VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV422H; + obj_surface->y_cb_offset = 0; + obj_surface->y_cr_offset = 0; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->cb_cr_pitch = memory_attibute->pitches[0]; + + break; + + case VA_FOURCC_RGBA: + case VA_FOURCC_RGBX: + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + ASSERT_RET(memory_attibute->num_planes == 1, VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_RGBX; + obj_surface->y_cb_offset = 0; + obj_surface->y_cr_offset = 0; + obj_surface->cb_cr_width = 0; + obj_surface->cb_cr_height = 0; + obj_surface->cb_cr_pitch = 0; + + break; + + case VA_FOURCC_Y800: /* monochrome surface */ + ASSERT_RET(memory_attibute->num_planes == 1, VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV400; + obj_surface->y_cb_offset = 0; + obj_surface->y_cr_offset = 0; + obj_surface->cb_cr_width = 0; + obj_surface->cb_cr_height = 0; + obj_surface->cb_cr_pitch = 0; + + break; + + case VA_FOURCC_411P: + ASSERT_RET(memory_attibute->num_planes == 3, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->pitches[1] == memory_attibute->pitches[2], VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV411; + obj_surface->y_cb_offset = 0; + obj_surface->y_cr_offset = 0; + obj_surface->cb_cr_width = obj_surface->orig_width / 4; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + case VA_FOURCC_422H: + ASSERT_RET(memory_attibute->num_planes == 3, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->pitches[1] == memory_attibute->pitches[2], VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV422H; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = memory_attibute->offsets[2] / obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + case VA_FOURCC_YV16: + assert(memory_attibute->num_planes == 3); + assert(memory_attibute->pitches[1] == memory_attibute->pitches[2]); + + obj_surface->subsampling = SUBSAMPLE_YUV422H; + obj_surface->y_cr_offset = memory_attibute->offsets[1] / obj_surface->width; + obj_surface->y_cb_offset = memory_attibute->offsets[2] / obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + case VA_FOURCC_422V: + ASSERT_RET(memory_attibute->num_planes == 3, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->pitches[1] == memory_attibute->pitches[2], VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV422H; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = memory_attibute->offsets[2] / obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + case VA_FOURCC_444P: + ASSERT_RET(memory_attibute->num_planes == 3, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(memory_attibute->pitches[1] == memory_attibute->pitches[2], VA_STATUS_ERROR_INVALID_PARAMETER); + + obj_surface->subsampling = SUBSAMPLE_YUV444; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = memory_attibute->offsets[2] / obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->cb_cr_pitch = memory_attibute->pitches[1]; + + break; + + default: + + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + + if (external_memory_type == I965_SURFACE_MEM_GEM_FLINK) + obj_surface->bo = drm_intel_bo_gem_create_from_name(i965->intel.bufmgr, + "gem flinked vaapi surface", + memory_attibute->buffers[index]); + else if (external_memory_type == I965_SURFACE_MEM_DRM_PRIME) + obj_surface->bo = drm_intel_bo_gem_create_from_prime(i965->intel.bufmgr, + memory_attibute->buffers[index], + obj_surface->size); + + if (!obj_surface->bo) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + return VA_STATUS_SUCCESS; +} + +/* byte-per-pixel of the first plane */ +static int +bpp_1stplane_by_fourcc(unsigned int fourcc) +{ + const i965_fourcc_info *info = get_fourcc_info(fourcc); + + if (info && (info->flag & I_S)) + return info->bpp[0] / 8; + else + return 0; +} + +static VAStatus +i965_CreateSurfaces2( + VADriverContextP ctx, + unsigned int format, + unsigned int width, + unsigned int height, + VASurfaceID *surfaces, + unsigned int num_surfaces, + VASurfaceAttrib *attrib_list, + unsigned int num_attribs + ) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i,j; VAStatus vaStatus = VA_STATUS_SUCCESS; + int expected_fourcc = 0; + int memory_type = I965_SURFACE_MEM_NATIVE; /* native */ + VASurfaceAttribExternalBuffers *memory_attibute = NULL; + + for (i = 0; i < num_attribs && attrib_list; i++) { + if ((attrib_list[i].type == VASurfaceAttribPixelFormat) && + (attrib_list[i].flags & VA_SURFACE_ATTRIB_SETTABLE)) { + ASSERT_RET(attrib_list[i].value.type == VAGenericValueTypeInteger, VA_STATUS_ERROR_INVALID_PARAMETER); + expected_fourcc = attrib_list[i].value.value.i; + } + + if ((attrib_list[i].type == VASurfaceAttribMemoryType) && + (attrib_list[i].flags & VA_SURFACE_ATTRIB_SETTABLE)) { + + ASSERT_RET(attrib_list[i].value.type == VAGenericValueTypeInteger, VA_STATUS_ERROR_INVALID_PARAMETER); - /* We only support one format */ - if (VA_RT_FORMAT_YUV420 != format) { + if (attrib_list[i].value.value.i == VA_SURFACE_ATTRIB_MEM_TYPE_KERNEL_DRM) + memory_type = I965_SURFACE_MEM_GEM_FLINK; /* flinked GEM handle */ + else if (attrib_list[i].value.value.i == VA_SURFACE_ATTRIB_MEM_TYPE_DRM_PRIME) + memory_type = I965_SURFACE_MEM_DRM_PRIME; /* drm prime fd */ + else if (attrib_list[i].value.value.i == VA_SURFACE_ATTRIB_MEM_TYPE_VA) + memory_type = I965_SURFACE_MEM_NATIVE; /* va native memory, to be allocated */ + } + + if ((attrib_list[i].type == VASurfaceAttribExternalBufferDescriptor) && + (attrib_list[i].flags == VA_SURFACE_ATTRIB_SETTABLE)) { + ASSERT_RET(attrib_list[i].value.type == VAGenericValueTypePointer, VA_STATUS_ERROR_INVALID_PARAMETER); + memory_attibute = (VASurfaceAttribExternalBuffers *)attrib_list[i].value.value.p; + } + } + + /* support 420 & 422 & RGB32 format, 422 and RGB32 are only used + * for post-processing (including color conversion) */ + if (VA_RT_FORMAT_YUV420 != format && + VA_RT_FORMAT_YUV420_10BPP != format && + VA_RT_FORMAT_YUV422 != format && + VA_RT_FORMAT_YUV444 != format && + VA_RT_FORMAT_YUV411 != format && + VA_RT_FORMAT_YUV400 != format && + VA_RT_FORMAT_RGB32 != format) { return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; } @@ -473,37 +1571,95 @@ surfaces[i] = surfaceID; obj_surface->status = VASurfaceReady; - obj_surface->subpic = VA_INVALID_ID; obj_surface->orig_width = width; obj_surface->orig_height = height; - - if (IS_GEN6(i965->intel.device_id) || - IS_GEN7(i965->intel.device_id)) { - obj_surface->width = ALIGN(obj_surface->orig_width, 128); - obj_surface->height = ALIGN(obj_surface->orig_height, 32); - } else { - obj_surface->width = ALIGN(obj_surface->orig_width, 16); - obj_surface->height = ALIGN(obj_surface->orig_height, 16); + obj_surface->user_disable_tiling = false; + obj_surface->user_h_stride_set = false; + obj_surface->user_v_stride_set = false; + + obj_surface->subpic_render_idx = 0; + for(j = 0; j < I965_MAX_SUBPIC_SUM; j++){ + obj_surface->subpic[j] = VA_INVALID_ID; + obj_surface->obj_subpic[j] = NULL; } - obj_surface->size = SIZE_YUV420(obj_surface->width, obj_surface->height); + assert(i965->codec_info->min_linear_wpitch); + assert(i965->codec_info->min_linear_hpitch); + obj_surface->width = ALIGN(width, i965->codec_info->min_linear_wpitch); + obj_surface->height = ALIGN(height, i965->codec_info->min_linear_hpitch); obj_surface->flags = SURFACE_REFERENCED; obj_surface->fourcc = 0; + obj_surface->expected_format = format; obj_surface->bo = NULL; obj_surface->locked_image_id = VA_INVALID_ID; + obj_surface->derived_image_id = VA_INVALID_ID; obj_surface->private_data = NULL; obj_surface->free_private_data = NULL; - } + obj_surface->subsampling = SUBSAMPLE_YUV420; - /* Error recovery */ - if (VA_STATUS_SUCCESS != vaStatus) { - /* surfaces[i-1] was the last successful allocation */ - for (; i--; ) { - struct object_surface *obj_surface = SURFACE(surfaces[i]); + obj_surface->wrapper_surface = VA_INVALID_ID; + obj_surface->exported_primefd = -1; - surfaces[i] = VA_INVALID_SURFACE; - assert(obj_surface); - i965_destroy_surface(&i965->surface_heap, (struct object_base *)obj_surface); + switch (memory_type) { + case I965_SURFACE_MEM_NATIVE: + if (memory_attibute) { + if (!(memory_attibute->flags & VA_SURFACE_EXTBUF_DESC_ENABLE_TILING)) + obj_surface->user_disable_tiling = true; + + if (memory_attibute->pixel_format) { + if (expected_fourcc) + ASSERT_RET(memory_attibute->pixel_format == expected_fourcc, VA_STATUS_ERROR_INVALID_PARAMETER); + else + expected_fourcc = memory_attibute->pixel_format; + } + ASSERT_RET(expected_fourcc, VA_STATUS_ERROR_INVALID_PARAMETER); + if (memory_attibute->pitches[0]) { + int bpp_1stplane = bpp_1stplane_by_fourcc(expected_fourcc); + ASSERT_RET(bpp_1stplane, VA_STATUS_ERROR_INVALID_PARAMETER); + obj_surface->width = memory_attibute->pitches[0]; + obj_surface->user_h_stride_set = true; + ASSERT_RET(IS_ALIGNED(obj_surface->width, 16), VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(obj_surface->width >= width * bpp_1stplane, VA_STATUS_ERROR_INVALID_PARAMETER); + + if (memory_attibute->offsets[1]) { + ASSERT_RET(!memory_attibute->offsets[0], VA_STATUS_ERROR_INVALID_PARAMETER); + obj_surface->height = memory_attibute->offsets[1]/memory_attibute->pitches[0]; + obj_surface->user_v_stride_set = true; + ASSERT_RET(IS_ALIGNED(obj_surface->height, 16), VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(obj_surface->height >= height, VA_STATUS_ERROR_INVALID_PARAMETER); + } + } + } + vaStatus = i965_surface_native_memory(ctx, + obj_surface, + format, + expected_fourcc); + break; + + case I965_SURFACE_MEM_GEM_FLINK: + case I965_SURFACE_MEM_DRM_PRIME: + vaStatus = i965_suface_external_memory(ctx, + obj_surface, + memory_type, + memory_attibute, + i); + break; + } + if (VA_STATUS_SUCCESS != vaStatus) { + i965_destroy_surface(&i965->surface_heap, (struct object_base *)obj_surface); + break; + } + } + + /* Error recovery */ + if (VA_STATUS_SUCCESS != vaStatus) { + /* surfaces[i-1] was the last successful allocation */ + for (; i--; ) { + struct object_surface *obj_surface = SURFACE(surfaces[i]); + + surfaces[i] = VA_INVALID_SURFACE; + assert(obj_surface); + i965_destroy_surface(&i965->surface_heap, (struct object_base *)obj_surface); } } @@ -511,21 +1667,54 @@ } VAStatus +i965_CreateSurfaces(VADriverContextP ctx, + int width, + int height, + int format, + int num_surfaces, + VASurfaceID *surfaces) /* out */ +{ + return i965_CreateSurfaces2(ctx, + format, + width, + height, + surfaces, + num_surfaces, + NULL, + 0); +} + +VAStatus i965_DestroySurfaces(VADriverContextP ctx, VASurfaceID *surface_list, int num_surfaces) { struct i965_driver_data *i965 = i965_driver_data(ctx); int i; + VAStatus va_status = VA_STATUS_SUCCESS; for (i = num_surfaces; i--; ) { struct object_surface *obj_surface = SURFACE(surface_list[i]); - assert(obj_surface); + ASSERT_RET(obj_surface, VA_STATUS_ERROR_INVALID_SURFACE); + + if ((obj_surface->wrapper_surface != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + CALL_VTABLE(i965->wrapper_pdrvctx, va_status, + vaDestroySurfaces(i965->wrapper_pdrvctx, + &(obj_surface->wrapper_surface), + 1)); + obj_surface->wrapper_surface = VA_INVALID_ID; + } + if (obj_surface->exported_primefd >= 0) { + close(obj_surface->exported_primefd); + obj_surface->exported_primefd = -1; + } + i965_destroy_surface(&i965->surface_heap, (struct object_base *)obj_surface); } - return VA_STATUS_SUCCESS; + return va_status; } VAStatus @@ -547,20 +1736,61 @@ return VA_STATUS_SUCCESS; } -VAStatus -i965_PutImage(VADriverContextP ctx, - VASurfaceID surface, - VAImageID image, - int src_x, - int src_y, - unsigned int src_width, - unsigned int src_height, - int dest_x, - int dest_y, - unsigned int dest_width, - unsigned int dest_height) +/* + * Guess the format when the usage of a VA surface is unknown + * 1. Without a valid context: YV12 + * 2. The current context is valid: + * a) always NV12 on GEN6 and later + * b) I420 for MPEG-2 and NV12 for other codec on GEN4 & GEN5 + */ +static void +i965_guess_surface_format(VADriverContextP ctx, + VASurfaceID surface, + unsigned int *fourcc, + unsigned int *is_tiled) { - return VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = NULL; + struct object_config *obj_config = NULL; + + *fourcc = VA_FOURCC_YV12; + *is_tiled = 0; + + if (i965->current_context_id == VA_INVALID_ID) + return; + + obj_context = CONTEXT(i965->current_context_id); + + if (!obj_context) + return; + + obj_config = obj_context->obj_config; + assert(obj_config); + + if (!obj_config) + return; + + if (IS_GEN6(i965->intel.device_info) || + IS_GEN7(i965->intel.device_info) || + IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) { + *fourcc = VA_FOURCC_NV12; + *is_tiled = 1; + return; + } + + switch (obj_config->profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + *fourcc = VA_FOURCC_I420; + *is_tiled = 0; + break; + + default: + *fourcc = VA_FOURCC_NV12; + *is_tiled = 0; + break; + } } VAStatus @@ -615,11 +1845,14 @@ *subpicture = subpicID; obj_subpic->image = image; + obj_subpic->obj_image = obj_image; obj_subpic->format = m->format; obj_subpic->width = obj_image->image.width; obj_subpic->height = obj_image->image.height; obj_subpic->pitch = obj_image->image.pitches[0]; obj_subpic->bo = obj_image->bo; + obj_subpic->global_alpha = 1.0; + return VA_STATUS_SUCCESS; } @@ -629,6 +1862,11 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_subpic *obj_subpic = SUBPIC(subpicture); + + if (!obj_subpic) + return VA_STATUS_ERROR_INVALID_SUBPICTURE; + + ASSERT_RET(obj_subpic->obj_image, VA_STATUS_ERROR_INVALID_SUBPICTURE); i965_destroy_subpic(&i965->subpic_heap, (struct object_base *)obj_subpic); return VA_STATUS_SUCCESS; } @@ -658,8 +1896,19 @@ VASubpictureID subpicture, float global_alpha) { - /* TODO */ - return VA_STATUS_ERROR_UNIMPLEMENTED; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_subpic *obj_subpic = SUBPIC(subpicture); + + if(global_alpha > 1.0 || global_alpha < 0.0){ + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + + if (!obj_subpic) + return VA_STATUS_ERROR_INVALID_SUBPICTURE; + + obj_subpic->global_alpha = global_alpha; + + return VA_STATUS_SUCCESS; } VAStatus @@ -683,7 +1932,12 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_subpic *obj_subpic = SUBPIC(subpicture); - int i; + int i, j; + + if (!obj_subpic) + return VA_STATUS_ERROR_INVALID_SUBPICTURE; + + ASSERT_RET(obj_subpic->obj_image, VA_STATUS_ERROR_INVALID_SUBPICTURE); obj_subpic->src_rect.x = src_x; obj_subpic->src_rect.y = src_y; @@ -699,7 +1953,20 @@ struct object_surface *obj_surface = SURFACE(target_surfaces[i]); if (!obj_surface) return VA_STATUS_ERROR_INVALID_SURFACE; - obj_surface->subpic = subpicture; + + for(j = 0; j < I965_MAX_SUBPIC_SUM; j ++){ + if(obj_surface->subpic[j] == VA_INVALID_ID){ + assert(obj_surface->obj_subpic[j] == NULL); + obj_surface->subpic[j] = subpicture; + obj_surface->obj_subpic[j] = obj_subpic; + break; + } + } + + if(j == I965_MAX_SUBPIC_SUM){ + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + } + } return VA_STATUS_SUCCESS; } @@ -712,14 +1979,29 @@ int num_surfaces) { struct i965_driver_data *i965 = i965_driver_data(ctx); - int i; + struct object_subpic *obj_subpic = SUBPIC(subpicture); + int i, j; + + if (!obj_subpic) + return VA_STATUS_ERROR_INVALID_SUBPICTURE; for (i = 0; i < num_surfaces; i++) { struct object_surface *obj_surface = SURFACE(target_surfaces[i]); if (!obj_surface) return VA_STATUS_ERROR_INVALID_SURFACE; - if (obj_surface->subpic == subpicture) - obj_surface->subpic = VA_INVALID_ID; + + for(j = 0; j < I965_MAX_SUBPIC_SUM; j ++){ + if (obj_surface->subpic[j] == subpicture) { + assert(obj_surface->obj_subpic[j] == obj_subpic); + obj_surface->subpic[j] = VA_INVALID_ID; + obj_surface->obj_subpic[j] = NULL; + break; + } + } + + if(j == I965_MAX_SUBPIC_SUM){ + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + } } return VA_STATUS_SUCCESS; } @@ -770,26 +2052,78 @@ obj_context->hw_context = NULL; } - if (obj_context->codec_type == CODEC_ENC) { - assert(obj_context->codec_state.enc.num_slice_params <= obj_context->codec_state.enc.max_slice_params); - i965_release_buffer_store(&obj_context->codec_state.enc.pic_param); - i965_release_buffer_store(&obj_context->codec_state.enc.seq_param); + if (obj_context->codec_type == CODEC_PROC) { + i965_release_buffer_store(&obj_context->codec_state.proc.pipeline_param); + + } else if (obj_context->codec_type == CODEC_ENC) { + assert(obj_context->codec_state.encode.num_slice_params <= obj_context->codec_state.encode.max_slice_params); + i965_release_buffer_store(&obj_context->codec_state.encode.pic_param); + i965_release_buffer_store(&obj_context->codec_state.encode.seq_param); + + i965_release_buffer_store(&obj_context->codec_state.encode.q_matrix); + i965_release_buffer_store(&obj_context->codec_state.encode.huffman_table); + + for (i = 0; i < obj_context->codec_state.encode.num_slice_params; i++) + i965_release_buffer_store(&obj_context->codec_state.encode.slice_params[i]); + + free(obj_context->codec_state.encode.slice_params); + + assert(obj_context->codec_state.encode.num_slice_params_ext <= obj_context->codec_state.encode.max_slice_params_ext); + i965_release_buffer_store(&obj_context->codec_state.encode.pic_param_ext); + i965_release_buffer_store(&obj_context->codec_state.encode.seq_param_ext); + + for (i = 0; i < ARRAY_ELEMS(obj_context->codec_state.encode.packed_header_param); i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_param[i]); + + for (i = 0; i < ARRAY_ELEMS(obj_context->codec_state.encode.packed_header_data); i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_data[i]); + + for (i = 0; i < ARRAY_ELEMS(obj_context->codec_state.encode.misc_param); i++) + i965_release_buffer_store(&obj_context->codec_state.encode.misc_param[i]); + + for (i = 0; i < obj_context->codec_state.encode.num_slice_params_ext; i++) + i965_release_buffer_store(&obj_context->codec_state.encode.slice_params_ext[i]); + + free(obj_context->codec_state.encode.slice_params_ext); + if (obj_context->codec_state.encode.slice_rawdata_index) { + free(obj_context->codec_state.encode.slice_rawdata_index); + obj_context->codec_state.encode.slice_rawdata_index = NULL; + } + if (obj_context->codec_state.encode.slice_rawdata_count) { + free(obj_context->codec_state.encode.slice_rawdata_count); + obj_context->codec_state.encode.slice_rawdata_count = NULL; + } + + if (obj_context->codec_state.encode.slice_header_index) { + free(obj_context->codec_state.encode.slice_header_index); + obj_context->codec_state.encode.slice_header_index = NULL; + } + + for (i = 0; i < obj_context->codec_state.encode.num_packed_header_params_ext; i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_params_ext[i]); + free(obj_context->codec_state.encode.packed_header_params_ext); + + for (i = 0; i < obj_context->codec_state.encode.num_packed_header_data_ext; i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_data_ext[i]); + free(obj_context->codec_state.encode.packed_header_data_ext); + + i965_release_buffer_store(&obj_context->codec_state.encode.encmb_map); } else { - assert(obj_context->codec_state.dec.num_slice_params <= obj_context->codec_state.dec.max_slice_params); - assert(obj_context->codec_state.dec.num_slice_datas <= obj_context->codec_state.dec.max_slice_datas); + assert(obj_context->codec_state.decode.num_slice_params <= obj_context->codec_state.decode.max_slice_params); + assert(obj_context->codec_state.decode.num_slice_datas <= obj_context->codec_state.decode.max_slice_datas); - i965_release_buffer_store(&obj_context->codec_state.dec.pic_param); - i965_release_buffer_store(&obj_context->codec_state.dec.iq_matrix); - i965_release_buffer_store(&obj_context->codec_state.dec.bit_plane); + i965_release_buffer_store(&obj_context->codec_state.decode.pic_param); + i965_release_buffer_store(&obj_context->codec_state.decode.iq_matrix); + i965_release_buffer_store(&obj_context->codec_state.decode.bit_plane); - for (i = 0; i < obj_context->codec_state.dec.num_slice_params; i++) - i965_release_buffer_store(&obj_context->codec_state.dec.slice_params[i]); + for (i = 0; i < obj_context->codec_state.decode.num_slice_params; i++) + i965_release_buffer_store(&obj_context->codec_state.decode.slice_params[i]); - for (i = 0; i < obj_context->codec_state.dec.num_slice_datas; i++) - i965_release_buffer_store(&obj_context->codec_state.dec.slice_datas[i]); + for (i = 0; i < obj_context->codec_state.decode.num_slice_datas; i++) + i965_release_buffer_store(&obj_context->codec_state.decode.slice_datas[i]); - free(obj_context->codec_state.dec.slice_params); - free(obj_context->codec_state.dec.slice_datas); + free(obj_context->codec_state.decode.slice_params); + free(obj_context->codec_state.decode.slice_datas); } free(obj_context->render_targets); @@ -807,9 +2141,9 @@ VAContextID *context) /* out */ { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_render_state *render_state = &i965->render_state; struct object_config *obj_config = CONFIG(config_id); struct object_context *obj_context = NULL; + VAConfigAttrib *attrib; VAStatus vaStatus = VA_STATUS_SUCCESS; int contextID; int i; @@ -819,6 +2153,12 @@ return vaStatus; } + if (picture_width > i965->codec_info->max_width || + picture_height > i965->codec_info->max_height) { + vaStatus = VA_STATUS_ERROR_RESOLUTION_NOT_SUPPORTED; + return vaStatus; + } + /* Validate flag */ /* Validate picture dimensions */ contextID = NEW_CONTEXT_ID(); @@ -829,31 +2169,20 @@ return vaStatus; } - render_state->inited = 1; - - switch (obj_config->profile) { - case VAProfileH264Baseline: - case VAProfileH264Main: - case VAProfileH264High: - if (!HAS_H264(i965)) - return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; - render_state->interleaved_uv = 1; - break; - default: - render_state->interleaved_uv = !!(IS_GEN6(i965->intel.device_id) || IS_GEN7(i965->intel.device_id)); - break; - } - *context = contextID; obj_context->flags = flag; obj_context->context_id = contextID; - obj_context->config_id = config_id; + obj_context->obj_config = obj_config; obj_context->picture_width = picture_width; obj_context->picture_height = picture_height; obj_context->num_render_targets = num_render_targets; obj_context->render_targets = (VASurfaceID *)calloc(num_render_targets, sizeof(VASurfaceID)); obj_context->hw_context = NULL; + obj_context->wrapper_context = VA_INVALID_ID; + + if (!obj_context->render_targets) + return VA_STATUS_ERROR_ALLOCATION_FAILED; for(i = 0; i < num_render_targets; i++) { if (NULL == SURFACE(render_targets[i])) { @@ -865,36 +2194,117 @@ } if (VA_STATUS_SUCCESS == vaStatus) { - if (VAEntrypointEncSlice == obj_config->entrypoint ) { /*encode routin only*/ + if (VAEntrypointVideoProc == obj_config->entrypoint) { + obj_context->codec_type = CODEC_PROC; + memset(&obj_context->codec_state.proc, 0, sizeof(obj_context->codec_state.proc)); + obj_context->codec_state.proc.current_render_target = VA_INVALID_ID; + assert(i965->codec_info->proc_hw_context_init); + obj_context->hw_context = i965->codec_info->proc_hw_context_init(ctx, obj_config); + } else if ((VAEntrypointEncSlice == obj_config->entrypoint) || + (VAEntrypointEncPicture == obj_config->entrypoint) || + (VAEntrypointEncSliceLP == obj_config->entrypoint)) { + VAConfigAttrib *packed_attrib; obj_context->codec_type = CODEC_ENC; - memset(&obj_context->codec_state.enc, 0, sizeof(obj_context->codec_state.enc)); - obj_context->codec_state.enc.current_render_target = VA_INVALID_ID; - obj_context->codec_state.enc.max_slice_params = NUM_SLICES; - obj_context->codec_state.enc.slice_params = calloc(obj_context->codec_state.enc.max_slice_params, - sizeof(*obj_context->codec_state.enc.slice_params)); + memset(&obj_context->codec_state.encode, 0, sizeof(obj_context->codec_state.encode)); + obj_context->codec_state.encode.current_render_target = VA_INVALID_ID; + obj_context->codec_state.encode.max_slice_params = NUM_SLICES; + obj_context->codec_state.encode.slice_params = calloc(obj_context->codec_state.encode.max_slice_params, + sizeof(*obj_context->codec_state.encode.slice_params)); + obj_context->codec_state.encode.max_packed_header_params_ext = NUM_SLICES; + obj_context->codec_state.encode.packed_header_params_ext = + calloc(obj_context->codec_state.encode.max_packed_header_params_ext, + sizeof(struct buffer_store *)); + + obj_context->codec_state.encode.max_packed_header_data_ext = NUM_SLICES; + obj_context->codec_state.encode.packed_header_data_ext = + calloc(obj_context->codec_state.encode.max_packed_header_data_ext, + sizeof(struct buffer_store *)); + + obj_context->codec_state.encode.max_slice_num = NUM_SLICES; + obj_context->codec_state.encode.slice_rawdata_index = + calloc(obj_context->codec_state.encode.max_slice_num, sizeof(int)); + obj_context->codec_state.encode.slice_rawdata_count = + calloc(obj_context->codec_state.encode.max_slice_num, sizeof(int)); + + obj_context->codec_state.encode.slice_header_index = + calloc(obj_context->codec_state.encode.max_slice_num, sizeof(int)); + + obj_context->codec_state.encode.vps_sps_seq_index = 0; + + obj_context->codec_state.encode.slice_index = 0; + packed_attrib = i965_lookup_config_attribute(obj_config, VAConfigAttribEncPackedHeaders); + if (packed_attrib) { + obj_context->codec_state.encode.packed_header_flag = packed_attrib->value; + if (obj_config->profile == VAProfileVP9Profile0) + obj_context->codec_state.encode.packed_header_flag = + packed_attrib->value & VA_ENC_PACKED_HEADER_RAW_DATA; + } else { + /* use the default value. SPS/PPS/RAWDATA is passed from user + * while Slice_header data is generated by driver. + */ + obj_context->codec_state.encode.packed_header_flag = + VA_ENC_PACKED_HEADER_SEQUENCE | + VA_ENC_PACKED_HEADER_PICTURE | + VA_ENC_PACKED_HEADER_RAW_DATA; + + /* it is not used for VP9 */ + if (obj_config->profile == VAProfileVP9Profile0) + obj_context->codec_state.encode.packed_header_flag = 0; + } assert(i965->codec_info->enc_hw_context_init); - obj_context->hw_context = i965->codec_info->enc_hw_context_init(ctx, obj_config->profile); + obj_context->hw_context = i965->codec_info->enc_hw_context_init(ctx, obj_config); } else { obj_context->codec_type = CODEC_DEC; - memset(&obj_context->codec_state.dec, 0, sizeof(obj_context->codec_state.dec)); - obj_context->codec_state.dec.current_render_target = -1; - obj_context->codec_state.dec.max_slice_params = NUM_SLICES; - obj_context->codec_state.dec.max_slice_datas = NUM_SLICES; - obj_context->codec_state.dec.slice_params = calloc(obj_context->codec_state.dec.max_slice_params, - sizeof(*obj_context->codec_state.dec.slice_params)); - obj_context->codec_state.dec.slice_datas = calloc(obj_context->codec_state.dec.max_slice_datas, - sizeof(*obj_context->codec_state.dec.slice_datas)); + memset(&obj_context->codec_state.decode, 0, sizeof(obj_context->codec_state.decode)); + obj_context->codec_state.decode.current_render_target = -1; + obj_context->codec_state.decode.max_slice_params = NUM_SLICES; + obj_context->codec_state.decode.max_slice_datas = NUM_SLICES; + obj_context->codec_state.decode.slice_params = calloc(obj_context->codec_state.decode.max_slice_params, + sizeof(*obj_context->codec_state.decode.slice_params)); + obj_context->codec_state.decode.slice_datas = calloc(obj_context->codec_state.decode.max_slice_datas, + sizeof(*obj_context->codec_state.decode.slice_datas)); assert(i965->codec_info->dec_hw_context_init); - obj_context->hw_context = i965->codec_info->dec_hw_context_init(ctx, obj_config->profile); + obj_context->hw_context = i965->codec_info->dec_hw_context_init(ctx, obj_config); } } + attrib = i965_lookup_config_attribute(obj_config, VAConfigAttribRTFormat); + if (!attrib) + return VA_STATUS_ERROR_INVALID_CONFIG; + obj_context->codec_state.base.chroma_formats = attrib->value; + + if (obj_config->wrapper_config != VA_INVALID_ID) { + /* The wrapper_pdrvctx should exist when wrapper_config is valid. + * So it won't check i965->wrapper_pdrvctx again. + * Fixme if it is incorrect. + */ + VAGenericID wrapper_context; + + /* + * The render_surface is not passed when calling + * vaCreateContext. + * If it is needed, we must get the wrapped surface + * for the corresponding Surface_list. + * So the wrapped surface conversion is deferred. + */ + CALL_VTABLE(i965->wrapper_pdrvctx, vaStatus, + vaCreateContext(i965->wrapper_pdrvctx, + obj_config->wrapper_config, + picture_width, picture_height, + flag, NULL, 0, + &wrapper_context)); + + if (vaStatus == VA_STATUS_SUCCESS) + obj_context->wrapper_context = wrapper_context; + } /* Error recovery */ if (VA_STATUS_SUCCESS != vaStatus) { i965_destroy_context(&i965->context_heap, (struct object_base *)obj_context); } + i965->current_context_id = contextID; + return vaStatus; } @@ -903,11 +2313,25 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_context *obj_context = CONTEXT(context); + VAStatus va_status = VA_STATUS_SUCCESS; + + ASSERT_RET(obj_context, VA_STATUS_ERROR_INVALID_CONTEXT); + + if (i965->current_context_id == context) + i965->current_context_id = VA_INVALID_ID; + + if ((obj_context->wrapper_context != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + CALL_VTABLE(i965->wrapper_pdrvctx, va_status, + vaDestroyContext(i965->wrapper_pdrvctx, + obj_context->wrapper_context)); + + obj_context->wrapper_context = VA_INVALID_ID; + } - assert(obj_context); i965_destroy_context(&i965->context_heap, (struct object_base *)obj_context); - return VA_STATUS_SUCCESS; + return va_status; } static void @@ -934,11 +2358,15 @@ struct object_buffer *obj_buffer = NULL; struct buffer_store *buffer_store = NULL; int bufferID; + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + struct object_context *obj_context = CONTEXT(context); + int wrapper_flag = 0; /* Validate type */ switch (type) { case VAPictureParameterBufferType: case VAIQMatrixBufferType: + case VAQMatrixBufferType: case VABitPlaneBufferType: case VASliceGroupMapBufferType: case VASliceParameterBufferType: @@ -951,6 +2379,14 @@ case VAEncSequenceParameterBufferType: case VAEncPictureParameterBufferType: case VAEncSliceParameterBufferType: + case VAEncPackedHeaderParameterBufferType: + case VAEncPackedHeaderDataBufferType: + case VAEncMiscParameterBufferType: + case VAProcPipelineParameterBufferType: + case VAProcFilterParameterBufferType: + case VAHuffmanTableBufferType: + case VAProbabilityBufferType: + case VAEncMacroblockMapBufferType: /* Ok */ break; @@ -966,49 +2402,105 @@ } if (type == VAEncCodedBufferType) { - size += ALIGN(sizeof(VACodedBufferSegment), 64); + size += I965_CODEDBUFFER_HEADER_SIZE; + size += 0x1000; /* for upper bound check */ } obj_buffer->max_num_elements = num_elements; obj_buffer->num_elements = num_elements; obj_buffer->size_element = size; obj_buffer->type = type; + obj_buffer->export_refcount = 0; obj_buffer->buffer_store = NULL; + obj_buffer->wrapper_buffer = VA_INVALID_ID; + obj_buffer->context_id = context; + buffer_store = calloc(1, sizeof(struct buffer_store)); assert(buffer_store); buffer_store->ref_count = 1; + if (obj_context && + (obj_context->wrapper_context != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + VAGenericID wrapper_buffer; + VADriverContextP pdrvctx = i965->wrapper_pdrvctx; + + CALL_VTABLE(pdrvctx, vaStatus, + vaCreateBuffer(pdrvctx, obj_context->wrapper_context, type, size, num_elements, + data, &wrapper_buffer)); + if (vaStatus == VA_STATUS_SUCCESS) { + obj_buffer->wrapper_buffer = wrapper_buffer; + } else { + free(buffer_store); + return vaStatus; + } + wrapper_flag = 1; + } + if (store_bo != NULL) { buffer_store->bo = store_bo; dri_bo_reference(buffer_store->bo); - - if (data) + + /* If the buffer is wrapped, the buffer_store is bogus. Unnecessary to copy it */ + if (data && !wrapper_flag) dri_bo_subdata(buffer_store->bo, 0, size * num_elements, data); - } else if (type == VASliceDataBufferType || type == VAImageBufferType || type == VAEncCodedBufferType) { - buffer_store->bo = dri_bo_alloc(i965->intel.bufmgr, - "Buffer", - size * num_elements, 64); + } else if (type == VASliceDataBufferType || + type == VAImageBufferType || + type == VAEncCodedBufferType || + type == VAEncMacroblockMapBufferType || + type == VAProbabilityBufferType) { + + /* If the buffer is wrapped, the bo/buffer of buffer_store is bogus. + * So it is enough to allocate one 64 byte bo + */ + if (wrapper_flag) + buffer_store->bo = dri_bo_alloc(i965->intel.bufmgr, "Bogus buffer", + 64, 64); + else + buffer_store->bo = dri_bo_alloc(i965->intel.bufmgr, + "Buffer", + size * num_elements, 64); assert(buffer_store->bo); - if (type == VAEncCodedBufferType) { - VACodedBufferSegment *coded_buffer_segment; + /* If the buffer is wrapped, the bo/buffer of buffer_store is bogus. + * In fact it can be skipped. But it is still allocated and it is + * only to follow the normal flowchart of buffer_allocation/release. + */ + if (!wrapper_flag) { + if (type == VAEncCodedBufferType) { + struct i965_coded_buffer_segment *coded_buffer_segment; + dri_bo_map(buffer_store->bo, 1); - coded_buffer_segment = (VACodedBufferSegment *)buffer_store->bo->virtual; - coded_buffer_segment->size = size - ALIGN(sizeof(VACodedBufferSegment), 64); - coded_buffer_segment->bit_offset = 0; - coded_buffer_segment->status = 0; - coded_buffer_segment->buf = NULL; - coded_buffer_segment->next = NULL; + coded_buffer_segment = (struct i965_coded_buffer_segment *)buffer_store->bo->virtual; + coded_buffer_segment->base.size = size - I965_CODEDBUFFER_HEADER_SIZE; + coded_buffer_segment->base.bit_offset = 0; + coded_buffer_segment->base.status = 0; + coded_buffer_segment->base.buf = NULL; + coded_buffer_segment->base.next = NULL; + coded_buffer_segment->mapped = 0; + coded_buffer_segment->codec = 0; + coded_buffer_segment->status_support = 0; dri_bo_unmap(buffer_store->bo); - } else if (data) { - dri_bo_subdata(buffer_store->bo, 0, size * num_elements, data); - } + } else if (data) { + dri_bo_subdata(buffer_store->bo, 0, size * num_elements, data); + } + } } else { - buffer_store->buffer = malloc(size * num_elements); + int msize = size; + + if (type == VAEncPackedHeaderDataBufferType) { + msize = ALIGN(size, 4); + } + + /* If the buffer is wrapped, it is enough to allocate 4 bytes */ + if (wrapper_flag) + buffer_store->buffer = malloc(4); + else + buffer_store->buffer = malloc(msize * num_elements); assert(buffer_store->buffer); - if (data) + if (data && (!wrapper_flag)) memcpy(buffer_store->buffer, data, size * num_elements); } @@ -1042,11 +2534,24 @@ struct object_buffer *obj_buffer = BUFFER(buf_id); VAStatus vaStatus = VA_STATUS_SUCCESS; - assert(obj_buffer); + ASSERT_RET(obj_buffer, VA_STATUS_ERROR_INVALID_BUFFER); + + /* When the wrapper_buffer exists, it will wrapper to the + * buffer allocated from backend driver. + */ + if ((obj_buffer->wrapper_buffer != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + VADriverContextP pdrvctx = i965->wrapper_pdrvctx; + + CALL_VTABLE(pdrvctx, vaStatus, + vaBufferSetNumElements(pdrvctx, obj_buffer->wrapper_buffer, + num_elements)); + return vaStatus; + } if ((num_elements < 0) || (num_elements > obj_buffer->max_num_elements)) { - vaStatus = VA_STATUS_ERROR_UNKNOWN; + vaStatus = VA_STATUS_ERROR_MAX_NUM_EXCEEDED; } else { obj_buffer->num_elements = num_elements; if (obj_buffer->buffer_store != NULL) { @@ -1065,10 +2570,29 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_buffer *obj_buffer = BUFFER(buf_id); VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + struct object_context *obj_context; + + ASSERT_RET(obj_buffer && obj_buffer->buffer_store, VA_STATUS_ERROR_INVALID_BUFFER); + + obj_context = CONTEXT(obj_buffer->context_id); + + /* When the wrapper_buffer exists, it will wrapper to the + * buffer allocated from backend driver. + */ + if ((obj_buffer->wrapper_buffer != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + VADriverContextP pdrvctx = i965->wrapper_pdrvctx; + + CALL_VTABLE(pdrvctx, vaStatus, + vaMapBuffer(pdrvctx, obj_buffer->wrapper_buffer, pbuf)); + return vaStatus; + } - assert(obj_buffer && obj_buffer->buffer_store); - assert(obj_buffer->buffer_store->bo || obj_buffer->buffer_store->buffer); - assert(!(obj_buffer->buffer_store->bo && obj_buffer->buffer_store->buffer)); + ASSERT_RET(obj_buffer->buffer_store->bo || obj_buffer->buffer_store->buffer, VA_STATUS_ERROR_INVALID_BUFFER); + ASSERT_RET(!(obj_buffer->buffer_store->bo && obj_buffer->buffer_store->buffer), VA_STATUS_ERROR_INVALID_BUFFER); + + if (obj_buffer->export_refcount > 0) + return VA_STATUS_ERROR_INVALID_BUFFER; if (NULL != obj_buffer->buffer_store->bo) { unsigned int tiling, swizzle; @@ -1080,15 +2604,104 @@ else dri_bo_map(obj_buffer->buffer_store->bo, 1); - assert(obj_buffer->buffer_store->bo->virtual); + ASSERT_RET(obj_buffer->buffer_store->bo->virtual, VA_STATUS_ERROR_OPERATION_FAILED); *pbuf = obj_buffer->buffer_store->bo->virtual; + vaStatus = VA_STATUS_SUCCESS; if (obj_buffer->type == VAEncCodedBufferType) { - VACodedBufferSegment *coded_buffer_segment = (VACodedBufferSegment *)(obj_buffer->buffer_store->bo->virtual); - coded_buffer_segment->buf = (unsigned char *)(obj_buffer->buffer_store->bo->virtual) + ALIGN(sizeof(VACodedBufferSegment), 64); + int i; + unsigned char *buffer = NULL; + unsigned int header_offset = I965_CODEDBUFFER_HEADER_SIZE; + struct i965_coded_buffer_segment *coded_buffer_segment = (struct i965_coded_buffer_segment *)(obj_buffer->buffer_store->bo->virtual); + + if (!coded_buffer_segment->mapped) { + unsigned char delimiter0, delimiter1, delimiter2, delimiter3, delimiter4; + + coded_buffer_segment->base.buf = buffer = (unsigned char *)(obj_buffer->buffer_store->bo->virtual) + I965_CODEDBUFFER_HEADER_SIZE; + + if (obj_context && + obj_context->hw_context && + obj_context->hw_context->get_status && + coded_buffer_segment->status_support) { + vaStatus = obj_context->hw_context->get_status(ctx, obj_context->hw_context, coded_buffer_segment); + } else { + + if (coded_buffer_segment->codec == CODEC_VP9) { + + if (obj_context == NULL) + return VA_STATUS_ERROR_ENCODING_ERROR; + + gen9_vp9_get_coded_status(ctx, (char *)coded_buffer_segment, + obj_context->hw_context); + } + else if (coded_buffer_segment->codec == CODEC_H264 || + coded_buffer_segment->codec == CODEC_H264_MVC) { + delimiter0 = H264_DELIMITER0; + delimiter1 = H264_DELIMITER1; + delimiter2 = H264_DELIMITER2; + delimiter3 = H264_DELIMITER3; + delimiter4 = H264_DELIMITER4; + } else if (coded_buffer_segment->codec == CODEC_MPEG2) { + delimiter0 = MPEG2_DELIMITER0; + delimiter1 = MPEG2_DELIMITER1; + delimiter2 = MPEG2_DELIMITER2; + delimiter3 = MPEG2_DELIMITER3; + delimiter4 = MPEG2_DELIMITER4; + } else if(coded_buffer_segment->codec == CODEC_JPEG) { + //In JPEG End of Image (EOI = 0xDDF9) marker can be used for delimiter. + delimiter0 = 0xFF; + delimiter1 = 0xD9; + } else if (coded_buffer_segment->codec == CODEC_HEVC) { + delimiter0 = HEVC_DELIMITER0; + delimiter1 = HEVC_DELIMITER1; + delimiter2 = HEVC_DELIMITER2; + delimiter3 = HEVC_DELIMITER3; + delimiter4 = HEVC_DELIMITER4; + } else if (coded_buffer_segment->codec != CODEC_VP8) { + ASSERT_RET(0, VA_STATUS_ERROR_UNSUPPORTED_PROFILE); + } + + if(coded_buffer_segment->codec == CODEC_VP9) { + /* it is already handled */ + } else + if(coded_buffer_segment->codec == CODEC_JPEG) { + for(i = 0; i < obj_buffer->size_element - header_offset - 1 - 0x1000; i++) { + if( (buffer[i] == 0xFF) && (buffer[i + 1] == 0xD9)) { + break; + } + } + coded_buffer_segment->base.size = i + 2; + } else if (coded_buffer_segment->codec != CODEC_VP8) { + /* vp8 coded buffer size can be told by vp8 internal statistics buffer, + so it don't need to traversal the coded buffer */ + for (i = 0; i < obj_buffer->size_element - header_offset - 3 - 0x1000; i++) { + if ((buffer[i] == delimiter0) && + (buffer[i + 1] == delimiter1) && + (buffer[i + 2] == delimiter2) && + (buffer[i + 3] == delimiter3) && + (buffer[i + 4] == delimiter4)) + break; + } + + if (i == obj_buffer->size_element - header_offset - 3 - 0x1000) { + coded_buffer_segment->base.status |= VA_CODED_BUF_STATUS_SLICE_OVERFLOW_MASK; + } + coded_buffer_segment->base.size = i; + } + + if (coded_buffer_segment->base.size >= obj_buffer->size_element - header_offset - 0x1000) { + coded_buffer_segment->base.status |= VA_CODED_BUF_STATUS_SLICE_OVERFLOW_MASK; + } + + vaStatus = VA_STATUS_SUCCESS; + } + + coded_buffer_segment->mapped = 1; + } else { + assert(coded_buffer_segment->base.buf); + vaStatus = VA_STATUS_SUCCESS; + } } - - vaStatus = VA_STATUS_SUCCESS; } else if (NULL != obj_buffer->buffer_store->buffer) { *pbuf = obj_buffer->buffer_store->buffer; vaStatus = VA_STATUS_SUCCESS; @@ -1104,9 +2717,24 @@ struct object_buffer *obj_buffer = BUFFER(buf_id); VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; - assert(obj_buffer && obj_buffer->buffer_store); - assert(obj_buffer->buffer_store->bo || obj_buffer->buffer_store->buffer); - assert(!(obj_buffer->buffer_store->bo && obj_buffer->buffer_store->buffer)); + if ((buf_id & OBJECT_HEAP_OFFSET_MASK) != BUFFER_ID_OFFSET) + return VA_STATUS_ERROR_INVALID_BUFFER; + + ASSERT_RET(obj_buffer && obj_buffer->buffer_store, VA_STATUS_ERROR_INVALID_BUFFER); + /* When the wrapper_buffer exists, it will wrapper to the + * buffer allocated from backend driver. + */ + if ((obj_buffer->wrapper_buffer != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + VADriverContextP pdrvctx = i965->wrapper_pdrvctx; + + CALL_VTABLE(pdrvctx, vaStatus, + vaUnmapBuffer(pdrvctx, obj_buffer->wrapper_buffer)); + return vaStatus; + } + + ASSERT_RET(obj_buffer->buffer_store->bo || obj_buffer->buffer_store->buffer, VA_STATUS_ERROR_OPERATION_FAILED); + ASSERT_RET(!(obj_buffer->buffer_store->bo && obj_buffer->buffer_store->buffer), VA_STATUS_ERROR_OPERATION_FAILED); if (NULL != obj_buffer->buffer_store->bo) { unsigned int tiling, swizzle; @@ -1132,11 +2760,21 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_buffer *obj_buffer = BUFFER(buffer_id); + VAStatus va_status = VA_STATUS_SUCCESS; + + ASSERT_RET(obj_buffer, VA_STATUS_ERROR_INVALID_BUFFER); + + if ((obj_buffer->wrapper_buffer != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + CALL_VTABLE(i965->wrapper_pdrvctx, va_status, + vaDestroyBuffer(i965->wrapper_pdrvctx, + obj_buffer->wrapper_buffer)); + obj_buffer->wrapper_buffer = VA_INVALID_ID; + } - assert(obj_buffer); i965_destroy_buffer(&i965->buffer_heap, (struct object_base *)obj_buffer); - return VA_STATUS_SUCCESS; + return va_status; } VAStatus @@ -1148,135 +2786,257 @@ struct object_context *obj_context = CONTEXT(context); struct object_surface *obj_surface = SURFACE(render_target); struct object_config *obj_config; - VAContextID config; - VAStatus vaStatus; + VAStatus vaStatus = VA_STATUS_SUCCESS; + int i; - assert(obj_context); - assert(obj_surface); + ASSERT_RET(obj_context, VA_STATUS_ERROR_INVALID_CONTEXT); + ASSERT_RET(obj_surface, VA_STATUS_ERROR_INVALID_SURFACE); + obj_config = obj_context->obj_config; + ASSERT_RET(obj_config, VA_STATUS_ERROR_INVALID_CONFIG); + + if (is_surface_busy(i965, obj_surface)) + return VA_STATUS_ERROR_SURFACE_BUSY; + + if (obj_context->codec_type == CODEC_PROC) { + obj_context->codec_state.proc.current_render_target = render_target; + } else if (obj_context->codec_type == CODEC_ENC) { + i965_release_buffer_store(&obj_context->codec_state.encode.pic_param); - config = obj_context->config_id; - obj_config = CONFIG(config); - assert(obj_config); + for (i = 0; i < obj_context->codec_state.encode.num_slice_params; i++) { + i965_release_buffer_store(&obj_context->codec_state.encode.slice_params[i]); + } - switch (obj_config->profile) { - case VAProfileMPEG2Simple: - case VAProfileMPEG2Main: - vaStatus = VA_STATUS_SUCCESS; - break; + obj_context->codec_state.encode.num_slice_params = 0; - case VAProfileH264Baseline: - case VAProfileH264Main: - case VAProfileH264High: - vaStatus = VA_STATUS_SUCCESS; - break; + /* ext */ + i965_release_buffer_store(&obj_context->codec_state.encode.pic_param_ext); - case VAProfileVC1Simple: - case VAProfileVC1Main: - case VAProfileVC1Advanced: - vaStatus = VA_STATUS_SUCCESS; - break; + for (i = 0; i < ARRAY_ELEMS(obj_context->codec_state.encode.packed_header_param); i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_param[i]); - default: - assert(0); - vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; - break; - } + for (i = 0; i < ARRAY_ELEMS(obj_context->codec_state.encode.packed_header_data); i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_data[i]); + + for (i = 0; i < obj_context->codec_state.encode.num_slice_params_ext; i++) + i965_release_buffer_store(&obj_context->codec_state.encode.slice_params_ext[i]); + + obj_context->codec_state.encode.num_slice_params_ext = 0; + obj_context->codec_state.encode.current_render_target = render_target; /*This is input new frame*/ + obj_context->codec_state.encode.last_packed_header_type = 0; + memset(obj_context->codec_state.encode.slice_rawdata_index, 0, + sizeof(int) * obj_context->codec_state.encode.max_slice_num); + memset(obj_context->codec_state.encode.slice_rawdata_count, 0, + sizeof(int) * obj_context->codec_state.encode.max_slice_num); + memset(obj_context->codec_state.encode.slice_header_index, 0, + sizeof(int) * obj_context->codec_state.encode.max_slice_num); + + for (i = 0; i < obj_context->codec_state.encode.num_packed_header_params_ext; i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_params_ext[i]); + for (i = 0; i < obj_context->codec_state.encode.num_packed_header_data_ext; i++) + i965_release_buffer_store(&obj_context->codec_state.encode.packed_header_data_ext[i]); + obj_context->codec_state.encode.num_packed_header_params_ext = 0; + obj_context->codec_state.encode.num_packed_header_data_ext = 0; + obj_context->codec_state.encode.slice_index = 0; + obj_context->codec_state.encode.vps_sps_seq_index = 0; + i965_release_buffer_store(&obj_context->codec_state.encode.encmb_map); + + if (obj_config->profile == VAProfileVP9Profile0) { + for (i = 0; i < ARRAY_ELEMS(obj_context->codec_state.encode.misc_param); i++) + i965_release_buffer_store(&obj_context->codec_state.encode.misc_param[i]); - if (obj_context->codec_type == CODEC_ENC) - obj_context->codec_state.enc.current_render_target = render_target; /*This is input new frame*/ - else - obj_context->codec_state.dec.current_render_target = render_target; + i965_release_buffer_store(&obj_context->codec_state.encode.seq_param_ext); + } + } else { + obj_context->codec_state.decode.current_render_target = render_target; + i965_release_buffer_store(&obj_context->codec_state.decode.pic_param); + i965_release_buffer_store(&obj_context->codec_state.decode.iq_matrix); + i965_release_buffer_store(&obj_context->codec_state.decode.bit_plane); + i965_release_buffer_store(&obj_context->codec_state.decode.huffman_table); + + for (i = 0; i < obj_context->codec_state.decode.num_slice_params; i++) { + i965_release_buffer_store(&obj_context->codec_state.decode.slice_params[i]); + i965_release_buffer_store(&obj_context->codec_state.decode.slice_datas[i]); + } + + obj_context->codec_state.decode.num_slice_params = 0; + obj_context->codec_state.decode.num_slice_datas = 0; + + if ((obj_context->wrapper_context != VA_INVALID_ID) && + i965->wrapper_pdrvctx) { + if (obj_surface->wrapper_surface == VA_INVALID_ID) + vaStatus = i965_surface_wrapper(ctx, render_target); + + if (vaStatus != VA_STATUS_SUCCESS) + return vaStatus; + + CALL_VTABLE(i965->wrapper_pdrvctx, vaStatus, + vaBeginPicture(i965->wrapper_pdrvctx, + obj_context->wrapper_context, + obj_surface->wrapper_surface)); + } + } return vaStatus; } -static VAStatus -i965_render_picture_parameter_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.dec.pic_param); - i965_reference_buffer_store(&obj_context->codec_state.dec.pic_param, - obj_buffer->buffer_store); +#define I965_RENDER_BUFFER(category, name) i965_render_##category##_##name##_buffer(ctx, obj_context, obj_buffer) + +#define DEF_RENDER_SINGLE_BUFFER_FUNC(category, name, member) \ + static VAStatus \ + i965_render_##category##_##name##_buffer(VADriverContextP ctx, \ + struct object_context *obj_context, \ + struct object_buffer *obj_buffer) \ + { \ + struct category##_state *category = &obj_context->codec_state.category; \ + i965_release_buffer_store(&category->member); \ + i965_reference_buffer_store(&category->member, obj_buffer->buffer_store); \ + return VA_STATUS_SUCCESS; \ + } + +#define DEF_RENDER_MULTI_BUFFER_FUNC(category, name, member) \ + static VAStatus \ + i965_render_##category##_##name##_buffer(VADriverContextP ctx, \ + struct object_context *obj_context, \ + struct object_buffer *obj_buffer) \ + { \ + struct category##_state *category = &obj_context->codec_state.category; \ + if (category->num_##member == category->max_##member) { \ + category->member = realloc(category->member, (category->max_##member + NUM_SLICES) * sizeof(*category->member)); \ + memset(category->member + category->max_##member, 0, NUM_SLICES * sizeof(*category->member)); \ + category->max_##member += NUM_SLICES; \ + } \ + i965_release_buffer_store(&category->member[category->num_##member]); \ + i965_reference_buffer_store(&category->member[category->num_##member], obj_buffer->buffer_store); \ + category->num_##member++; \ + return VA_STATUS_SUCCESS; \ + } + +#define I965_RENDER_DECODE_BUFFER(name) I965_RENDER_BUFFER(decode, name) + +#define DEF_RENDER_DECODE_SINGLE_BUFFER_FUNC(name, member) DEF_RENDER_SINGLE_BUFFER_FUNC(decode, name, member) +DEF_RENDER_DECODE_SINGLE_BUFFER_FUNC(picture_parameter, pic_param) +DEF_RENDER_DECODE_SINGLE_BUFFER_FUNC(iq_matrix, iq_matrix) +DEF_RENDER_DECODE_SINGLE_BUFFER_FUNC(bit_plane, bit_plane) +DEF_RENDER_DECODE_SINGLE_BUFFER_FUNC(huffman_table, huffman_table) +DEF_RENDER_DECODE_SINGLE_BUFFER_FUNC(probability_data, probability_data) + +#define DEF_RENDER_DECODE_MULTI_BUFFER_FUNC(name, member) DEF_RENDER_MULTI_BUFFER_FUNC(decode, name, member) +DEF_RENDER_DECODE_MULTI_BUFFER_FUNC(slice_parameter, slice_params) +DEF_RENDER_DECODE_MULTI_BUFFER_FUNC(slice_data, slice_datas) - return VA_STATUS_SUCCESS; -} static VAStatus -i965_render_iq_matrix_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) +i965_decoder_vp9_wrapper_picture(VADriverContextP ctx, + VABufferID *buffers, + int num_buffers) { - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.dec.iq_matrix); - i965_reference_buffer_store(&obj_context->codec_state.dec.iq_matrix, - obj_buffer->buffer_store); + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAStatus vaStatus = VA_STATUS_SUCCESS; + int i; + VADecPictureParameterBufferVP9 *pVp9PicParams; + VADriverContextP pdrvctx; + struct object_buffer *obj_buffer; + + pdrvctx = i965->wrapper_pdrvctx; + /* do the conversion of VADecPictureParameterBufferVP9 */ + for (i = 0; i < num_buffers; i++) { + obj_buffer = BUFFER(buffers[i]); + + if (!obj_buffer) + continue; + + if (obj_buffer->wrapper_buffer == VA_INVALID_ID) + continue; + + if (obj_buffer->type == VAPictureParameterBufferType) { + int j; + VASurfaceID surface_id; + struct object_surface *obj_surface; + + pdrvctx = i965->wrapper_pdrvctx; + + CALL_VTABLE(pdrvctx, vaStatus, + vaMapBuffer(pdrvctx, obj_buffer->wrapper_buffer, + (void **)(&pVp9PicParams))); + + if (vaStatus != VA_STATUS_SUCCESS) + return vaStatus; + + for (j = 0; j < 8; j++) { + surface_id = pVp9PicParams->reference_frames[j]; + obj_surface = SURFACE(surface_id); + + if (!obj_surface) + continue; + + if (obj_surface->wrapper_surface == VA_INVALID_ID) { + vaStatus = i965_surface_wrapper(ctx, surface_id); + if (vaStatus != VA_STATUS_SUCCESS) { + pdrvctx->vtable->vaUnmapBuffer(pdrvctx, + obj_buffer->wrapper_buffer); + goto fail_out; + } + } + + pVp9PicParams->reference_frames[j] = obj_surface->wrapper_surface; + } + CALL_VTABLE(pdrvctx, vaStatus, + vaUnmapBuffer(pdrvctx, obj_buffer->wrapper_buffer)); + break; + } + } return VA_STATUS_SUCCESS; -} -static VAStatus -i965_render_bit_plane_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.dec.bit_plane); - i965_reference_buffer_store(&obj_context->codec_state.dec.bit_plane, - obj_buffer->buffer_store); - - return VA_STATUS_SUCCESS; +fail_out: + return vaStatus; } static VAStatus -i965_render_slice_parameter_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) +i965_decoder_wrapper_picture(VADriverContextP ctx, + VAContextID context, + VABufferID *buffers, + int num_buffers) { - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - - if (obj_context->codec_state.dec.num_slice_params == obj_context->codec_state.dec.max_slice_params) { - obj_context->codec_state.dec.slice_params = realloc(obj_context->codec_state.dec.slice_params, - (obj_context->codec_state.dec.max_slice_params + NUM_SLICES) * sizeof(*obj_context->codec_state.dec.slice_params)); - memset(obj_context->codec_state.dec.slice_params + obj_context->codec_state.dec.max_slice_params, 0, NUM_SLICES * sizeof(*obj_context->codec_state.dec.slice_params)); - obj_context->codec_state.dec.max_slice_params += NUM_SLICES; - } - - i965_release_buffer_store(&obj_context->codec_state.dec.slice_params[obj_context->codec_state.dec.num_slice_params]); - i965_reference_buffer_store(&obj_context->codec_state.dec.slice_params[obj_context->codec_state.dec.num_slice_params], - obj_buffer->buffer_store); - obj_context->codec_state.dec.num_slice_params++; - - return VA_STATUS_SUCCESS; -} + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = CONTEXT(context); + VAStatus vaStatus = VA_STATUS_SUCCESS; + int i; + VADriverContextP pdrvctx; + struct object_buffer *obj_buffer; -static VAStatus -i965_render_slice_data_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - assert(obj_buffer->buffer_store->buffer == NULL); - assert(obj_buffer->buffer_store->bo); - - if (obj_context->codec_state.dec.num_slice_datas == obj_context->codec_state.dec.max_slice_datas) { - obj_context->codec_state.dec.slice_datas = realloc(obj_context->codec_state.dec.slice_datas, - (obj_context->codec_state.dec.max_slice_datas + NUM_SLICES) * sizeof(*obj_context->codec_state.dec.slice_datas)); - memset(obj_context->codec_state.dec.slice_datas + obj_context->codec_state.dec.max_slice_datas, 0, NUM_SLICES * sizeof(*obj_context->codec_state.dec.slice_datas)); - obj_context->codec_state.dec.max_slice_datas += NUM_SLICES; - } - - i965_release_buffer_store(&obj_context->codec_state.dec.slice_datas[obj_context->codec_state.dec.num_slice_datas]); - i965_reference_buffer_store(&obj_context->codec_state.dec.slice_datas[obj_context->codec_state.dec.num_slice_datas], - obj_buffer->buffer_store); - obj_context->codec_state.dec.num_slice_datas++; - - return VA_STATUS_SUCCESS; -} + if (obj_context == NULL) + return VA_STATUS_ERROR_INVALID_CONTEXT; + + /* When it is not wrapped context, continue the normal flowchart */ + if (obj_context->wrapper_context == VA_INVALID_ID) + return vaStatus; + + if (obj_context->obj_config && + (obj_context->obj_config->profile == VAProfileVP9Profile0)) { + vaStatus = i965_decoder_vp9_wrapper_picture(ctx, buffers, num_buffers); + } else + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pdrvctx = i965->wrapper_pdrvctx; + + for (i = 0; i < num_buffers && vaStatus == VA_STATUS_SUCCESS; i++) { + obj_buffer = BUFFER(buffers[i]); + + if (!obj_buffer) + continue; + + if (obj_buffer->wrapper_buffer == VA_INVALID_ID) { + vaStatus = VA_STATUS_ERROR_INVALID_BUFFER; + break; + } + + CALL_VTABLE(pdrvctx, vaStatus, + vaRenderPicture(pdrvctx, obj_context->wrapper_context, + &(obj_buffer->wrapper_buffer), 1)); + } + return vaStatus; +} static VAStatus i965_decoder_render_picture(VADriverContextP ctx, @@ -1288,30 +3048,42 @@ struct object_context *obj_context = CONTEXT(context); VAStatus vaStatus = VA_STATUS_SUCCESS; int i; + + ASSERT_RET(obj_context, VA_STATUS_ERROR_INVALID_CONTEXT); for (i = 0; i < num_buffers && vaStatus == VA_STATUS_SUCCESS; i++) { struct object_buffer *obj_buffer = BUFFER(buffers[i]); - assert(obj_buffer); + + if (!obj_buffer) + return VA_STATUS_ERROR_INVALID_BUFFER; switch (obj_buffer->type) { case VAPictureParameterBufferType: - vaStatus = i965_render_picture_parameter_buffer(ctx, obj_context, obj_buffer); + vaStatus = I965_RENDER_DECODE_BUFFER(picture_parameter); break; case VAIQMatrixBufferType: - vaStatus = i965_render_iq_matrix_buffer(ctx, obj_context, obj_buffer); + vaStatus = I965_RENDER_DECODE_BUFFER(iq_matrix); break; case VABitPlaneBufferType: - vaStatus = i965_render_bit_plane_buffer(ctx, obj_context, obj_buffer); + vaStatus = I965_RENDER_DECODE_BUFFER(bit_plane); break; case VASliceParameterBufferType: - vaStatus = i965_render_slice_parameter_buffer(ctx, obj_context, obj_buffer); + vaStatus = I965_RENDER_DECODE_BUFFER(slice_parameter); break; case VASliceDataBufferType: - vaStatus = i965_render_slice_data_buffer(ctx, obj_context, obj_buffer); + vaStatus = I965_RENDER_DECODE_BUFFER(slice_data); + break; + + case VAHuffmanTableBufferType: + vaStatus = I965_RENDER_DECODE_BUFFER(huffman_table); + break; + + case VAProbabilityBufferType: + vaStatus = I965_RENDER_DECODE_BUFFER(probability_data); break; default: @@ -1320,96 +3092,84 @@ } } + if ((vaStatus == VA_STATUS_SUCCESS) && + (obj_context->wrapper_context != VA_INVALID_ID)) + vaStatus = i965_decoder_wrapper_picture(ctx, context, buffers, num_buffers); + return vaStatus; } -static VAStatus -i965_encoder_render_squence_parameter_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.enc.seq_param); - i965_reference_buffer_store(&obj_context->codec_state.enc.seq_param, - obj_buffer->buffer_store); +#define I965_RENDER_ENCODE_BUFFER(name) I965_RENDER_BUFFER(encode, name) - return VA_STATUS_SUCCESS; -} +#define DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(name, member) DEF_RENDER_SINGLE_BUFFER_FUNC(encode, name, member) +// DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(sequence_parameter, seq_param) +// DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_parameter, pic_param) +// DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_control, pic_control) +DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(qmatrix, q_matrix) +DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(iqmatrix, iq_matrix) +DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(huffman_table, huffman_table) +/* extended buffer */ +DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(sequence_parameter_ext, seq_param_ext) +DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(picture_parameter_ext, pic_param_ext) +DEF_RENDER_ENCODE_SINGLE_BUFFER_FUNC(encmb_map, encmb_map) + +#define DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(name, member) DEF_RENDER_MULTI_BUFFER_FUNC(encode, name, member) +// DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(slice_parameter, slice_params) +DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(slice_parameter_ext, slice_params_ext) +DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(packed_header_params_ext, packed_header_params_ext) +DEF_RENDER_ENCODE_MULTI_BUFFER_FUNC(packed_header_data_ext, packed_header_data_ext) static VAStatus -i965_encoder_render_picture_parameter_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.enc.pic_param); - i965_reference_buffer_store(&obj_context->codec_state.enc.pic_param, - obj_buffer->buffer_store); +i965_encoder_render_packed_header_parameter_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer, + int type_index) +{ + struct encode_state *encode = &obj_context->codec_state.encode; + + ASSERT_RET(obj_buffer->buffer_store->bo == NULL, VA_STATUS_ERROR_INVALID_BUFFER); + ASSERT_RET(obj_buffer->buffer_store->buffer, VA_STATUS_ERROR_INVALID_BUFFER); + i965_release_buffer_store(&encode->packed_header_param[type_index]); + i965_reference_buffer_store(&encode->packed_header_param[type_index], obj_buffer->buffer_store); return VA_STATUS_SUCCESS; } static VAStatus -i965_encoder_render_slice_parameter_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - if (obj_context->codec_state.enc.num_slice_params == obj_context->codec_state.enc.max_slice_params) { - obj_context->codec_state.enc.slice_params = realloc(obj_context->codec_state.enc.slice_params, - (obj_context->codec_state.enc.max_slice_params + NUM_SLICES) * sizeof(*obj_context->codec_state.enc.slice_params)); - memset(obj_context->codec_state.enc.slice_params + obj_context->codec_state.enc.max_slice_params, 0, NUM_SLICES * sizeof(*obj_context->codec_state.enc.slice_params)); - obj_context->codec_state.enc.max_slice_params += NUM_SLICES; - } +i965_encoder_render_packed_header_data_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer, + int type_index) +{ + struct encode_state *encode = &obj_context->codec_state.encode; + + ASSERT_RET(obj_buffer->buffer_store->bo == NULL, VA_STATUS_ERROR_INVALID_BUFFER); + ASSERT_RET(obj_buffer->buffer_store->buffer, VA_STATUS_ERROR_INVALID_BUFFER); + i965_release_buffer_store(&encode->packed_header_data[type_index]); + i965_reference_buffer_store(&encode->packed_header_data[type_index], obj_buffer->buffer_store); - i965_release_buffer_store(&obj_context->codec_state.enc.slice_params[obj_context->codec_state.enc.num_slice_params]); - i965_reference_buffer_store(&obj_context->codec_state.enc.slice_params[obj_context->codec_state.enc.num_slice_params], - obj_buffer->buffer_store); - obj_context->codec_state.enc.num_slice_params++; - return VA_STATUS_SUCCESS; } static VAStatus -i965_encoder_render_picture_control_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) +i965_encoder_render_misc_parameter_buffer(VADriverContextP ctx, + struct object_context *obj_context, + struct object_buffer *obj_buffer) { - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.enc.pic_control); - i965_reference_buffer_store(&obj_context->codec_state.enc.pic_control, - obj_buffer->buffer_store); + struct encode_state *encode = &obj_context->codec_state.encode; + VAEncMiscParameterBuffer *param = NULL; - return VA_STATUS_SUCCESS; -} + ASSERT_RET(obj_buffer->buffer_store->bo == NULL, VA_STATUS_ERROR_INVALID_BUFFER); + ASSERT_RET(obj_buffer->buffer_store->buffer, VA_STATUS_ERROR_INVALID_BUFFER); -static VAStatus -i965_encoder_render_qmatrix_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.enc.q_matrix); - i965_reference_buffer_store(&obj_context->codec_state.enc.iq_matrix, - obj_buffer->buffer_store); - - return VA_STATUS_SUCCESS; -} + param = (VAEncMiscParameterBuffer *)obj_buffer->buffer_store->buffer; -static VAStatus -i965_encoder_render_iqmatrix_buffer(VADriverContextP ctx, - struct object_context *obj_context, - struct object_buffer *obj_buffer) -{ - assert(obj_buffer->buffer_store->bo == NULL); - assert(obj_buffer->buffer_store->buffer); - i965_release_buffer_store(&obj_context->codec_state.enc.iq_matrix); - i965_reference_buffer_store(&obj_context->codec_state.enc.iq_matrix, - obj_buffer->buffer_store); + if (param->type >= ARRAY_ELEMS(encode->misc_param)) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + i965_release_buffer_store(&encode->misc_param[param->type]); + i965_reference_buffer_store(&encode->misc_param[param->type], obj_buffer->buffer_store); return VA_STATUS_SUCCESS; } @@ -1422,36 +3182,213 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_context *obj_context = CONTEXT(context); - VAStatus vaStatus = VA_STATUS_SUCCESS; + struct object_config *obj_config; + VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; + struct encode_state *encode; int i; - for (i = 0; i < num_buffers && vaStatus == VA_STATUS_SUCCESS; i++) { + ASSERT_RET(obj_context, VA_STATUS_ERROR_INVALID_CONTEXT); + obj_config = obj_context->obj_config; + ASSERT_RET(obj_config, VA_STATUS_ERROR_INVALID_CONFIG); + + encode = &obj_context->codec_state.encode; + for (i = 0; i < num_buffers; i++) { struct object_buffer *obj_buffer = BUFFER(buffers[i]); - assert(obj_buffer); + + if (!obj_buffer) + return VA_STATUS_ERROR_INVALID_BUFFER; switch (obj_buffer->type) { + case VAQMatrixBufferType: + vaStatus = I965_RENDER_ENCODE_BUFFER(qmatrix); + break; + + case VAIQMatrixBufferType: + vaStatus = I965_RENDER_ENCODE_BUFFER(iqmatrix); + break; + case VAEncSequenceParameterBufferType: - vaStatus = i965_encoder_render_squence_parameter_buffer(ctx, obj_context, obj_buffer); + vaStatus = I965_RENDER_ENCODE_BUFFER(sequence_parameter_ext); break; case VAEncPictureParameterBufferType: - vaStatus = i965_encoder_render_picture_parameter_buffer(ctx, obj_context, obj_buffer); - break; + vaStatus = I965_RENDER_ENCODE_BUFFER(picture_parameter_ext); + break; - case VAEncSliceParameterBufferType: - vaStatus = i965_encoder_render_slice_parameter_buffer(ctx, obj_context, obj_buffer); + case VAHuffmanTableBufferType: + vaStatus = I965_RENDER_ENCODE_BUFFER(huffman_table); break; - case VAPictureParameterBufferType: - vaStatus = i965_encoder_render_picture_control_buffer(ctx, obj_context, obj_buffer); + case VAEncSliceParameterBufferType: + vaStatus = I965_RENDER_ENCODE_BUFFER(slice_parameter_ext); + if (vaStatus == VA_STATUS_SUCCESS) { + /* When the max number of slices is updated, it also needs + * to reallocate the arrays that is used to store + * the packed data index/count for the slice + */ + if (!(encode->packed_header_flag & VA_ENC_PACKED_HEADER_SLICE)) { + encode->slice_index++; + } + if (encode->slice_index == encode->max_slice_num) { + int slice_num = encode->max_slice_num; + encode->slice_rawdata_index = realloc(encode->slice_rawdata_index, + (slice_num + NUM_SLICES) * sizeof(int)); + encode->slice_rawdata_count = realloc(encode->slice_rawdata_count, + (slice_num + NUM_SLICES) * sizeof(int)); + encode->slice_header_index = realloc(encode->slice_header_index, + (slice_num + NUM_SLICES) * sizeof(int)); + memset(encode->slice_rawdata_index + slice_num, 0, + sizeof(int) * NUM_SLICES); + memset(encode->slice_rawdata_count + slice_num, 0, + sizeof(int) * NUM_SLICES); + memset(encode->slice_header_index + slice_num, 0, + sizeof(int) * NUM_SLICES); + + encode->max_slice_num += NUM_SLICES; + if ((encode->slice_rawdata_index == NULL) || + (encode->slice_header_index == NULL) || + (encode->slice_rawdata_count == NULL)) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + return vaStatus; + } + } + } break; - case VAQMatrixBufferType: - vaStatus = i965_encoder_render_qmatrix_buffer(ctx, obj_context, obj_buffer); + case VAEncPackedHeaderParameterBufferType: + { + VAEncPackedHeaderParameterBuffer *param = (VAEncPackedHeaderParameterBuffer *)obj_buffer->buffer_store->buffer; + encode->last_packed_header_type = param->type; + + if ((param->type == VAEncPackedHeaderRawData) || + (param->type == VAEncPackedHeaderSlice)) { + vaStatus = I965_RENDER_ENCODE_BUFFER(packed_header_params_ext); + } else if((obj_config->profile == VAProfileHEVCMain) && + (encode->last_packed_header_type == VAEncPackedHeaderSequence)) { + vaStatus = i965_encoder_render_packed_header_parameter_buffer(ctx, + obj_context, + obj_buffer, + va_enc_packed_type_to_idx(encode->last_packed_header_type) + encode->vps_sps_seq_index); + } else { + vaStatus = i965_encoder_render_packed_header_parameter_buffer(ctx, + obj_context, + obj_buffer, + va_enc_packed_type_to_idx(encode->last_packed_header_type)); + } break; + } - case VAIQMatrixBufferType: - vaStatus = i965_encoder_render_iqmatrix_buffer(ctx, obj_context, obj_buffer); + case VAEncPackedHeaderDataBufferType: + { + if (encode->last_packed_header_type == 0) { + WARN_ONCE("the packed header data is passed without type!\n"); + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + return vaStatus; + } + + if (encode->last_packed_header_type == VAEncPackedHeaderRawData || + encode->last_packed_header_type == VAEncPackedHeaderSlice) { + vaStatus = I965_RENDER_ENCODE_BUFFER(packed_header_data_ext); + + if (obj_config->profile == VAProfileVP9Profile0) + break; + + /* When the PACKED_SLICE_HEADER flag is passed, it will use + * the packed_slice_header as the delimeter to decide how + * the packed rawdata is inserted for the given slice. + * Otherwise it will use the VAEncSequenceParameterBuffer + * as the delimeter + */ + if (encode->packed_header_flag & VA_ENC_PACKED_HEADER_SLICE) { + /* store the first index of the packed header data for current slice */ + if (encode->slice_rawdata_index[encode->slice_index] == 0) { + encode->slice_rawdata_index[encode->slice_index] = + SLICE_PACKED_DATA_INDEX_TYPE | (encode->num_packed_header_data_ext - 1); + } + encode->slice_rawdata_count[encode->slice_index]++; + if (encode->last_packed_header_type == VAEncPackedHeaderSlice) { + /* find one packed slice_header delimeter. And the following + * packed data is for the next slice + */ + encode->slice_header_index[encode->slice_index] = + SLICE_PACKED_DATA_INDEX_TYPE | (encode->num_packed_header_data_ext - 1); + encode->slice_index++; + /* Reallocate the buffer to record the index/count of + * packed_data for one slice. + */ + if (encode->slice_index == encode->max_slice_num) { + int slice_num = encode->max_slice_num; + + encode->slice_rawdata_index = realloc(encode->slice_rawdata_index, + (slice_num + NUM_SLICES) * sizeof(int)); + encode->slice_rawdata_count = realloc(encode->slice_rawdata_count, + (slice_num + NUM_SLICES) * sizeof(int)); + encode->slice_header_index = realloc(encode->slice_header_index, + (slice_num + NUM_SLICES) * sizeof(int)); + memset(encode->slice_rawdata_index + slice_num, 0, + sizeof(int) * NUM_SLICES); + memset(encode->slice_rawdata_count + slice_num, 0, + sizeof(int) * NUM_SLICES); + memset(encode->slice_header_index + slice_num, 0, + sizeof(int) * NUM_SLICES); + encode->max_slice_num += NUM_SLICES; + } + } + } else { + if (vaStatus == VA_STATUS_SUCCESS) { + /* store the first index of the packed header data for current slice */ + if (encode->slice_rawdata_index[encode->slice_index] == 0) { + encode->slice_rawdata_index[encode->slice_index] = + SLICE_PACKED_DATA_INDEX_TYPE | (encode->num_packed_header_data_ext - 1); + } + encode->slice_rawdata_count[encode->slice_index]++; + if (encode->last_packed_header_type == VAEncPackedHeaderSlice) { + if (encode->slice_header_index[encode->slice_index] == 0) { + encode->slice_header_index[encode->slice_index] = + SLICE_PACKED_DATA_INDEX_TYPE | (encode->num_packed_header_data_ext - 1); + } else { + WARN_ONCE("Multi slice header data is passed for" + " slice %d!\n", encode->slice_index); + } + } + } + } + } else { + ASSERT_RET(encode->last_packed_header_type == VAEncPackedHeaderSequence || + encode->last_packed_header_type == VAEncPackedHeaderPicture || + encode->last_packed_header_type == VAEncPackedHeaderSlice || + (((encode->last_packed_header_type & VAEncPackedHeaderMiscMask) == VAEncPackedHeaderMiscMask) && + ((encode->last_packed_header_type & (~VAEncPackedHeaderMiscMask)) != 0)), + VA_STATUS_ERROR_ENCODING_ERROR); + + if((obj_config->profile == VAProfileHEVCMain) && + (encode->last_packed_header_type == VAEncPackedHeaderSequence)) { + + vaStatus = i965_encoder_render_packed_header_data_buffer(ctx, + obj_context, + obj_buffer, + va_enc_packed_type_to_idx(encode->last_packed_header_type) + encode->vps_sps_seq_index); + encode->vps_sps_seq_index = (encode->vps_sps_seq_index + 1) % I965_SEQ_PACKED_HEADER_END; + }else{ + vaStatus = i965_encoder_render_packed_header_data_buffer(ctx, + obj_context, + obj_buffer, + va_enc_packed_type_to_idx(encode->last_packed_header_type)); + + } + } + encode->last_packed_header_type = 0; + break; + } + + case VAEncMiscParameterBufferType: + vaStatus = i965_encoder_render_misc_parameter_buffer(ctx, + obj_context, + obj_buffer); + break; + + case VAEncMacroblockMapBufferType: + vaStatus = I965_RENDER_ENCODE_BUFFER(encmb_map); break; default: @@ -1463,6 +3400,44 @@ return vaStatus; } +#define I965_RENDER_PROC_BUFFER(name) I965_RENDER_BUFFER(proc, name) + +#define DEF_RENDER_PROC_SINGLE_BUFFER_FUNC(name, member) DEF_RENDER_SINGLE_BUFFER_FUNC(proc, name, member) +DEF_RENDER_PROC_SINGLE_BUFFER_FUNC(pipeline_parameter, pipeline_param) + +static VAStatus +i965_proc_render_picture(VADriverContextP ctx, + VAContextID context, + VABufferID *buffers, + int num_buffers) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_context *obj_context = CONTEXT(context); + VAStatus vaStatus = VA_STATUS_SUCCESS; + int i; + + ASSERT_RET(obj_context, VA_STATUS_ERROR_INVALID_CONTEXT); + + for (i = 0; i < num_buffers && vaStatus == VA_STATUS_SUCCESS; i++) { + struct object_buffer *obj_buffer = BUFFER(buffers[i]); + + if (!obj_buffer) + return VA_STATUS_ERROR_INVALID_BUFFER; + + switch (obj_buffer->type) { + case VAProcPipelineParameterBufferType: + vaStatus = I965_RENDER_PROC_BUFFER(pipeline_parameter); + break; + + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_BUFFERTYPE; + break; + } + } + + return vaStatus; +} + VAStatus i965_RenderPicture(VADriverContextP ctx, VAContextID context, @@ -1472,17 +3447,22 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_context *obj_context; struct object_config *obj_config; - VAContextID config; VAStatus vaStatus = VA_STATUS_ERROR_UNKNOWN; obj_context = CONTEXT(context); - assert(obj_context); + ASSERT_RET(obj_context, VA_STATUS_ERROR_INVALID_CONTEXT); - config = obj_context->config_id; - obj_config = CONFIG(config); - assert(obj_config); + if (num_buffers <= 0) + return VA_STATUS_ERROR_INVALID_PARAMETER; - if (VAEntrypointEncSlice == obj_config->entrypoint ){ + obj_config = obj_context->obj_config; + ASSERT_RET(obj_config, VA_STATUS_ERROR_INVALID_CONFIG); + + if (VAEntrypointVideoProc == obj_config->entrypoint) { + vaStatus = i965_proc_render_picture(ctx, context, buffers, num_buffers); + } else if ((VAEntrypointEncSlice == obj_config->entrypoint ) || + (VAEntrypointEncPicture == obj_config->entrypoint) || + (VAEntrypointEncSliceLP == obj_config->entrypoint)) { vaStatus = i965_encoder_render_picture(ctx, context, buffers, num_buffers); } else { vaStatus = i965_decoder_render_picture(ctx, context, buffers, num_buffers); @@ -1497,54 +3477,80 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_context *obj_context = CONTEXT(context); struct object_config *obj_config; - VAContextID config; - int i; - - assert(obj_context); - config = obj_context->config_id; - obj_config = CONFIG(config); - assert(obj_config); - if (obj_context->codec_type == CODEC_ENC) { - assert(VAEntrypointEncSlice == obj_config->entrypoint); + ASSERT_RET(obj_context, VA_STATUS_ERROR_INVALID_CONTEXT); + obj_config = obj_context->obj_config; + ASSERT_RET(obj_config, VA_STATUS_ERROR_INVALID_CONFIG); + + if (obj_context->codec_type == CODEC_PROC) { + ASSERT_RET(VAEntrypointVideoProc == obj_config->entrypoint, VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT); + } else if (obj_context->codec_type == CODEC_ENC) { + ASSERT_RET(((VAEntrypointEncSlice == obj_config->entrypoint) || + (VAEntrypointEncPicture == obj_config->entrypoint) || + (VAEntrypointEncSliceLP == obj_config->entrypoint)), + VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT); + + if (obj_context->codec_state.encode.num_packed_header_params_ext != + obj_context->codec_state.encode.num_packed_header_data_ext) { + WARN_ONCE("the packed header/data is not paired for encoding!\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + if (!(obj_context->codec_state.encode.pic_param || + obj_context->codec_state.encode.pic_param_ext)) { + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + if (!(obj_context->codec_state.encode.seq_param || + obj_context->codec_state.encode.seq_param_ext) && + (VAEntrypointEncPicture != obj_config->entrypoint)) { + /* The seq_param is not mandatory for VP9 encoding */ + if (obj_config->profile != VAProfileVP9Profile0) + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + if ((obj_context->codec_state.encode.num_slice_params <=0) && + (obj_context->codec_state.encode.num_slice_params_ext <=0) && + ((obj_config->profile != VAProfileVP8Version0_3) && + (obj_config->profile != VAProfileVP9Profile0))) { + return VA_STATUS_ERROR_INVALID_PARAMETER; + } - assert(obj_context->codec_state.enc.pic_param); - assert(obj_context->codec_state.enc.seq_param); - assert(obj_context->codec_state.enc.num_slice_params >= 1); + if ((obj_context->codec_state.encode.packed_header_flag & VA_ENC_PACKED_HEADER_SLICE) && + (obj_context->codec_state.encode.num_slice_params_ext != + obj_context->codec_state.encode.slice_index)) { + WARN_ONCE("packed slice_header data is missing for some slice" + " under packed SLICE_HEADER mode\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } } else { - assert(obj_context->codec_state.dec.pic_param); - assert(obj_context->codec_state.dec.num_slice_params >= 1); - assert(obj_context->codec_state.dec.num_slice_datas >= 1); - assert(obj_context->codec_state.dec.num_slice_params == obj_context->codec_state.dec.num_slice_datas); - } - - assert(obj_context->hw_context->run); - obj_context->hw_context->run(ctx, obj_config->profile, &obj_context->codec_state, obj_context->hw_context); - - if (obj_context->codec_type == CODEC_ENC) { - obj_context->codec_state.enc.current_render_target = VA_INVALID_SURFACE; - obj_context->codec_state.enc.num_slice_params = 0; - i965_release_buffer_store(&obj_context->codec_state.enc.pic_param); - i965_release_buffer_store(&obj_context->codec_state.enc.seq_param); + if (obj_context->codec_state.decode.pic_param == NULL) { + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + if (obj_context->codec_state.decode.num_slice_params <=0) { + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + if (obj_context->codec_state.decode.num_slice_datas <=0) { + return VA_STATUS_ERROR_INVALID_PARAMETER; + } - for (i = 0; i < obj_context->codec_state.enc.num_slice_params; i++) { - i965_release_buffer_store(&obj_context->codec_state.enc.slice_params[i]); + if (obj_context->codec_state.decode.num_slice_params != + obj_context->codec_state.decode.num_slice_datas) { + return VA_STATUS_ERROR_INVALID_PARAMETER; } - } else { - obj_context->codec_state.dec.current_render_target = -1; - i965_release_buffer_store(&obj_context->codec_state.dec.pic_param); - i965_release_buffer_store(&obj_context->codec_state.dec.iq_matrix); - i965_release_buffer_store(&obj_context->codec_state.dec.bit_plane); - - for (i = 0; i < obj_context->codec_state.dec.num_slice_params; i++) { - i965_release_buffer_store(&obj_context->codec_state.dec.slice_params[i]); - i965_release_buffer_store(&obj_context->codec_state.dec.slice_datas[i]); + + if (obj_context->wrapper_context != VA_INVALID_ID) { + /* call the vaEndPicture of wrapped driver */ + VADriverContextP pdrvctx; + VAStatus va_status; + + pdrvctx = i965->wrapper_pdrvctx; + CALL_VTABLE(pdrvctx, va_status, + vaEndPicture(pdrvctx, obj_context->wrapper_context)); + + return va_status; } - obj_context->codec_state.dec.num_slice_params = 0; - obj_context->codec_state.dec.num_slice_datas = 0; } - return VA_STATUS_SUCCESS; + ASSERT_RET(obj_context->hw_context->run, VA_STATUS_ERROR_OPERATION_FAILED); + return obj_context->hw_context->run(ctx, obj_config->profile, &obj_context->codec_state, obj_context->hw_context); } VAStatus @@ -1554,7 +3560,10 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface = SURFACE(render_target); - assert(obj_surface); + ASSERT_RET(obj_surface, VA_STATUS_ERROR_INVALID_SURFACE); + + if(obj_surface->bo) + drm_intel_bo_wait_rendering(obj_surface->bo); return VA_STATUS_SUCCESS; } @@ -1567,21 +3576,86 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface = SURFACE(render_target); - assert(obj_surface); + ASSERT_RET(obj_surface, VA_STATUS_ERROR_INVALID_SURFACE); - /* Usually GEM will handle synchronization with the graphics hardware */ -#if 0 if (obj_surface->bo) { - dri_bo_map(obj_surface->bo, 0); - dri_bo_unmap(obj_surface->bo); + if (drm_intel_bo_busy(obj_surface->bo)){ + *status = VASurfaceRendering; + } + else { + *status = VASurfaceReady; + } + } else { + *status = VASurfaceReady; } -#endif - - *status = obj_surface->status; return VA_STATUS_SUCCESS; } +static VADisplayAttribute * +get_display_attribute(VADriverContextP ctx, VADisplayAttribType type) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + unsigned int i; + + if (!i965->display_attributes) + return NULL; + + for (i = 0; i < i965->num_display_attributes; i++) { + if (i965->display_attributes[i].type == type) + return &i965->display_attributes[i]; + } + return NULL; +} + +static void +i965_display_attributes_terminate(VADriverContextP ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + + if (i965->display_attributes) { + free(i965->display_attributes); + i965->display_attributes = NULL; + i965->num_display_attributes = 0; + } +} + +static bool +i965_display_attributes_init(VADriverContextP ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + + i965->num_display_attributes = ARRAY_ELEMS(i965_display_attributes); + i965->display_attributes = malloc( + i965->num_display_attributes * sizeof(i965->display_attributes[0])); + if (!i965->display_attributes) + goto error; + + memcpy( + i965->display_attributes, + i965_display_attributes, + sizeof(i965_display_attributes) + ); + + i965->rotation_attrib = get_display_attribute(ctx, VADisplayAttribRotation); + i965->brightness_attrib = get_display_attribute(ctx, VADisplayAttribBrightness); + i965->contrast_attrib = get_display_attribute(ctx, VADisplayAttribContrast); + i965->hue_attrib = get_display_attribute(ctx, VADisplayAttribHue); + i965->saturation_attrib = get_display_attribute(ctx, VADisplayAttribSaturation); + + if (!i965->rotation_attrib || + !i965->brightness_attrib || + !i965->contrast_attrib || + !i965->hue_attrib || + !i965->saturation_attrib) { + goto error; + } + return true; + +error: + i965_display_attributes_terminate(ctx); + return false; +} /* * Query display attributes @@ -1590,12 +3664,19 @@ * returned in "attr_list" is returned in "num_attributes". */ VAStatus -i965_QueryDisplayAttributes(VADriverContextP ctx, - VADisplayAttribute *attr_list, /* out */ - int *num_attributes) /* out */ +i965_QueryDisplayAttributes( + VADriverContextP ctx, + VADisplayAttribute *attribs, /* out */ + int *num_attribs_ptr /* out */ +) { - if (num_attributes) - *num_attributes = 0; + const int num_attribs = ARRAY_ELEMS(i965_display_attributes); + + if (attribs && num_attribs > 0) + memcpy(attribs, i965_display_attributes, sizeof(i965_display_attributes)); + + if (num_attribs_ptr) + *num_attribs_ptr = num_attribs; return VA_STATUS_SUCCESS; } @@ -1607,12 +3688,27 @@ * from vaQueryDisplayAttributes() can have their values retrieved. */ VAStatus -i965_GetDisplayAttributes(VADriverContextP ctx, - VADisplayAttribute *attr_list, /* in/out */ - int num_attributes) +i965_GetDisplayAttributes( + VADriverContextP ctx, + VADisplayAttribute *attribs, /* inout */ + int num_attribs /* in */ +) { - /* TODO */ - return VA_STATUS_ERROR_UNIMPLEMENTED; + int i; + + for (i = 0; i < num_attribs; i++) { + VADisplayAttribute *src_attrib, * const dst_attrib = &attribs[i]; + + src_attrib = get_display_attribute(ctx, dst_attrib->type); + if (src_attrib && (src_attrib->flags & VA_DISPLAY_ATTRIB_GETTABLE)) { + dst_attrib->min_value = src_attrib->min_value; + dst_attrib->max_value = src_attrib->max_value; + dst_attrib->value = src_attrib->value; + } + else + dst_attrib->flags = VA_DISPLAY_ATTRIB_NOT_SUPPORTED; + } + return VA_STATUS_SUCCESS; } /* @@ -1622,12 +3718,32 @@ * the value is out of range, the function returns VA_STATUS_ERROR_ATTR_NOT_SUPPORTED */ VAStatus -i965_SetDisplayAttributes(VADriverContextP ctx, - VADisplayAttribute *attr_list, - int num_attributes) +i965_SetDisplayAttributes( + VADriverContextP ctx, + VADisplayAttribute *attribs, /* in */ + int num_attribs /* in */ +) { - /* TODO */ - return VA_STATUS_ERROR_UNIMPLEMENTED; + int i; + + for (i = 0; i < num_attribs; i++) { + VADisplayAttribute *dst_attrib, * const src_attrib = &attribs[i]; + + dst_attrib = get_display_attribute(ctx, src_attrib->type); + if (!dst_attrib) + return VA_STATUS_ERROR_ATTR_NOT_SUPPORTED; + + if (!(dst_attrib->flags & VA_DISPLAY_ATTRIB_SETTABLE)) + continue; + + if (src_attrib->value < dst_attrib->min_value || + src_attrib->value > dst_attrib->max_value) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + dst_attrib->value = src_attrib->value; + /* XXX: track modified attributes through timestamps */ + } + return VA_STATUS_SUCCESS; } VAStatus @@ -1640,37 +3756,6 @@ return VA_STATUS_ERROR_UNIMPLEMENTED; } -static VAStatus -i965_Init(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - - if (intel_driver_init(ctx) == False) - return VA_STATUS_ERROR_UNKNOWN; - - if (IS_G4X(i965->intel.device_id)) - i965->codec_info = &g4x_hw_codec_info; - else if (IS_IRONLAKE(i965->intel.device_id)) - i965->codec_info = &ironlake_hw_codec_info; - else if (IS_GEN6(i965->intel.device_id)) - i965->codec_info = &gen6_hw_codec_info; - else if (IS_GEN7(i965->intel.device_id)) - i965->codec_info = &gen7_hw_codec_info; - else - return VA_STATUS_ERROR_UNKNOWN; - - if (i965_post_processing_init(ctx) == False) - return VA_STATUS_ERROR_UNKNOWN; - - if (i965_render_init(ctx) == False) - return VA_STATUS_ERROR_UNKNOWN; - - _i965InitMutex(&i965->render_mutex); - i965->batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER); - - return VA_STATUS_SUCCESS; -} - static void i965_destroy_heap(struct object_heap *heap, void (*func)(struct object_heap *heap, struct object_base *object)) @@ -1705,7 +3790,7 @@ struct object_image *obj_image; VAStatus va_status = VA_STATUS_ERROR_OPERATION_FAILED; VAImageID image_id; - unsigned int width2, height2, size2, size; + unsigned int size2, size, awidth, aheight; out_image->image_id = VA_INVALID_ID; out_image->buf = VA_INVALID_ID; @@ -1725,65 +3810,112 @@ image->image_id = image_id; image->buf = VA_INVALID_ID; - size = width * height; - width2 = (width + 1) / 2; - height2 = (height + 1) / 2; - size2 = width2 * height2; + awidth = ALIGN(width, i965->codec_info->min_linear_wpitch); + + if ((format->fourcc == VA_FOURCC_YV12) || + (format->fourcc == VA_FOURCC_I420)) { + if (awidth % 128 != 0) { + awidth = ALIGN(width, 128); + } + } + + aheight = ALIGN(height, i965->codec_info->min_linear_hpitch); + size = awidth * aheight; + size2 = (awidth / 2) * (aheight / 2); image->num_palette_entries = 0; image->entry_bytes = 0; memset(image->component_order, 0, sizeof(image->component_order)); switch (format->fourcc) { - case VA_FOURCC('I','A','4','4'): - case VA_FOURCC('A','I','4','4'): + case VA_FOURCC_IA44: + case VA_FOURCC_AI44: image->num_planes = 1; - image->pitches[0] = width; + image->pitches[0] = awidth; image->offsets[0] = 0; - image->data_size = image->offsets[0] + image->pitches[0] * height; + image->data_size = image->offsets[0] + image->pitches[0] * aheight; image->num_palette_entries = 16; image->entry_bytes = 3; image->component_order[0] = 'R'; image->component_order[1] = 'G'; image->component_order[2] = 'B'; break; - case VA_FOURCC('A','R','G','B'): - case VA_FOURCC('A','B','G','R'): - case VA_FOURCC('B','G','R','A'): - case VA_FOURCC('R','G','B','A'): + case VA_FOURCC_IA88: + case VA_FOURCC_AI88: + image->num_planes = 1; + image->pitches[0] = awidth * 2; + image->offsets[0] = 0; + image->data_size = image->offsets[0] + image->pitches[0] * aheight; + image->num_palette_entries = 256; + image->entry_bytes = 3; + image->component_order[0] = 'R'; + image->component_order[1] = 'G'; + image->component_order[2] = 'B'; + break; + case VA_FOURCC_ARGB: + case VA_FOURCC_ABGR: + case VA_FOURCC_BGRA: + case VA_FOURCC_RGBA: + case VA_FOURCC_BGRX: + case VA_FOURCC_RGBX: image->num_planes = 1; - image->pitches[0] = width * 4; + image->pitches[0] = awidth * 4; image->offsets[0] = 0; - image->data_size = image->offsets[0] + image->pitches[0] * height; + image->data_size = image->offsets[0] + image->pitches[0] * aheight; break; - case VA_FOURCC('Y','V','1','2'): + case VA_FOURCC_YV12: image->num_planes = 3; - image->pitches[0] = width; + image->pitches[0] = awidth; image->offsets[0] = 0; - image->pitches[1] = width2; - image->offsets[1] = size + size2; - image->pitches[2] = width2; - image->offsets[2] = size; + image->pitches[1] = awidth / 2; + image->offsets[1] = size; + image->pitches[2] = awidth / 2; + image->offsets[2] = size + size2; image->data_size = size + 2 * size2; break; - case VA_FOURCC('I','4','2','0'): + case VA_FOURCC_I420: image->num_planes = 3; - image->pitches[0] = width; + image->pitches[0] = awidth; image->offsets[0] = 0; - image->pitches[1] = width2; + image->pitches[1] = awidth / 2; image->offsets[1] = size; - image->pitches[2] = width2; + image->pitches[2] = awidth / 2; image->offsets[2] = size + size2; image->data_size = size + 2 * size2; break; - case VA_FOURCC('N','V','1','2'): + case VA_FOURCC_422H: + image->num_planes = 3; + image->pitches[0] = awidth; + image->offsets[0] = 0; + image->pitches[1] = awidth / 2; + image->offsets[1] = size; + image->pitches[2] = awidth / 2; + image->offsets[2] = size + (awidth / 2) * aheight; + image->data_size = size + 2 * ((awidth / 2) * aheight); + break; + case VA_FOURCC_NV12: image->num_planes = 2; - image->pitches[0] = width; + image->pitches[0] = awidth; image->offsets[0] = 0; - image->pitches[1] = width; + image->pitches[1] = awidth; image->offsets[1] = size; image->data_size = size + 2 * size2; break; + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + image->num_planes = 1; + image->pitches[0] = awidth * 2; + image->offsets[0] = 0; + image->data_size = size * 2; + break; + case VA_FOURCC_P010: + image->num_planes = 2; + image->pitches[0] = awidth * 2; + image->offsets[0] = 0; + image->pitches[1] = awidth * 2; + image->offsets[1] = size * 2; + image->data_size = size * 2 + 2 * size2 * 2; + break; default: goto error; } @@ -1793,11 +3925,18 @@ if (va_status != VA_STATUS_SUCCESS) goto error; - obj_image->bo = BUFFER(image->buf)->buffer_store->bo; + struct object_buffer *obj_buffer = BUFFER(image->buf); + + if (!obj_buffer || + !obj_buffer->buffer_store || + !obj_buffer->buffer_store->bo) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + obj_image->bo = obj_buffer->buffer_store->bo; dri_bo_reference(obj_image->bo); if (image->num_palette_entries > 0 && image->entry_bytes > 0) { - obj_image->palette = malloc(image->num_palette_entries * sizeof(obj_image->palette)); + obj_image->palette = malloc(image->num_palette_entries * sizeof(*obj_image->palette)); if (!obj_image->palette) goto error; } @@ -1815,64 +3954,307 @@ return va_status; } -void +VAStatus i965_check_alloc_surface_bo(VADriverContextP ctx, struct object_surface *obj_surface, int tiled, - unsigned int fourcc) + unsigned int fourcc, + unsigned int subsampling) { struct i965_driver_data *i965 = i965_driver_data(ctx); + int region_width, region_height; - if (obj_surface->bo) - return; - - if (tiled) { - uint32_t tiling_mode = I915_TILING_Y; /* always uses Y-tiled format */ - unsigned long pitch; - - obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr, - "vaapi surface", - obj_surface->width, - obj_surface->height + obj_surface->height / 2, - 1, - &tiling_mode, - &pitch, - 0); - assert(tiling_mode == I915_TILING_Y); - assert(pitch == obj_surface->width); - } else { - obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr, - "vaapi surface", - obj_surface->size, - 0x1000); + if (obj_surface->bo) { + ASSERT_RET(obj_surface->fourcc, VA_STATUS_ERROR_INVALID_SURFACE); + ASSERT_RET(obj_surface->fourcc == fourcc, VA_STATUS_ERROR_INVALID_SURFACE); + ASSERT_RET(obj_surface->subsampling == subsampling, VA_STATUS_ERROR_INVALID_SURFACE); + return VA_STATUS_SUCCESS; } - obj_surface->fourcc = fourcc; - assert(obj_surface->bo); -} + obj_surface->x_cb_offset = 0; /* X offset is always 0 */ + obj_surface->x_cr_offset = 0; -VAStatus i965_DeriveImage(VADriverContextP ctx, - VASurfaceID surface, - VAImage *out_image) /* out */ -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_render_state *render_state = &i965->render_state; - struct object_image *obj_image; - struct object_surface *obj_surface; - VAImageID image_id; - unsigned int w_pitch, h_pitch; - VAStatus va_status; + int bpp_1stplane = bpp_1stplane_by_fourcc(fourcc); - out_image->image_id = VA_INVALID_ID; - obj_surface = SURFACE(surface); + if ((tiled && !obj_surface->user_disable_tiling)) { + ASSERT_RET(fourcc != VA_FOURCC_I420 && + fourcc != VA_FOURCC_IYUV && + fourcc != VA_FOURCC_YV12, + VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT); + + if (obj_surface->user_h_stride_set) { + ASSERT_RET(IS_ALIGNED(obj_surface->width, 128), VA_STATUS_ERROR_INVALID_PARAMETER); + } else + obj_surface->width = ALIGN(obj_surface->orig_width * bpp_1stplane, 128); + + if (obj_surface->user_v_stride_set) { + ASSERT_RET(IS_ALIGNED(obj_surface->height, 32), VA_STATUS_ERROR_INVALID_PARAMETER); + }else + obj_surface->height = ALIGN(obj_surface->orig_height, 32); + + region_height = obj_surface->height; + + switch (fourcc) { + case VA_FOURCC_NV12: + case VA_FOURCC_P010: + assert(subsampling == SUBSAMPLE_YUV420); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->height; + region_width = obj_surface->width; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32); + + break; - if (!obj_surface) - return VA_STATUS_ERROR_INVALID_SURFACE; + case VA_FOURCC_IMC1: + assert(subsampling == SUBSAMPLE_YUV420); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->y_cr_offset = obj_surface->height; + obj_surface->y_cb_offset = obj_surface->y_cr_offset + ALIGN(obj_surface->cb_cr_height, 32); + region_width = obj_surface->width; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32) * 2; - w_pitch = obj_surface->width; - h_pitch = obj_surface->height; + break; - image_id = NEW_IMAGE_ID(); + case VA_FOURCC_IMC3: + assert(subsampling == SUBSAMPLE_YUV420); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->y_cb_offset + ALIGN(obj_surface->cb_cr_height, 32); + region_width = obj_surface->width; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32) * 2; + + break; + + case VA_FOURCC_422H: + assert(subsampling == SUBSAMPLE_YUV422H); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->y_cb_offset + ALIGN(obj_surface->cb_cr_height, 32); + region_width = obj_surface->width; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32) * 2; + + break; + + case VA_FOURCC_422V: + assert(subsampling == SUBSAMPLE_YUV422V); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->y_cb_offset + ALIGN(obj_surface->cb_cr_height, 32); + region_width = obj_surface->width; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32) * 2; + + break; + + case VA_FOURCC_411P: + assert(subsampling == SUBSAMPLE_YUV411); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width / 4; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->y_cb_offset + ALIGN(obj_surface->cb_cr_height, 32); + region_width = obj_surface->width; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32) * 2; + + break; + + case VA_FOURCC_444P: + assert(subsampling == SUBSAMPLE_YUV444); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->cb_cr_width = obj_surface->orig_width; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->y_cb_offset + ALIGN(obj_surface->cb_cr_height, 32); + region_width = obj_surface->width; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32) * 2; + + break; + + case VA_FOURCC_Y800: + assert(subsampling == SUBSAMPLE_YUV400); + obj_surface->cb_cr_pitch = 0; + obj_surface->cb_cr_width = 0; + obj_surface->cb_cr_height = 0; + obj_surface->y_cb_offset = 0; + obj_surface->y_cr_offset = 0; + region_width = obj_surface->width; + region_height = obj_surface->height; + + break; + + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + assert(subsampling == SUBSAMPLE_YUV422H); + obj_surface->width = ALIGN(obj_surface->orig_width * 2, 128); + obj_surface->cb_cr_pitch = obj_surface->width; + obj_surface->y_cb_offset = 0; + obj_surface->y_cr_offset = 0; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + region_width = obj_surface->width; + region_height = obj_surface->height; + + break; + + case VA_FOURCC_RGBA: + case VA_FOURCC_RGBX: + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + assert(subsampling == SUBSAMPLE_RGBX); + + obj_surface->width = ALIGN(obj_surface->orig_width * 4, 128); + region_width = obj_surface->width; + region_height = obj_surface->height; + break; + + default: + /* Never get here */ + ASSERT_RET(0, VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT); + break; + } + } else { + assert(subsampling == SUBSAMPLE_YUV420 || + subsampling == SUBSAMPLE_YUV422H || + subsampling == SUBSAMPLE_YUV422V || + subsampling == SUBSAMPLE_RGBX); + + region_width = obj_surface->width; + region_height = obj_surface->height; + + switch (fourcc) { + case VA_FOURCC_NV12: + case VA_FOURCC_P010: + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->height; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->cb_cr_pitch = obj_surface->width; + region_height = obj_surface->height + obj_surface->height / 2; + break; + + case VA_FOURCC_YV16: + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->y_cr_offset = obj_surface->height; + obj_surface->y_cb_offset = obj_surface->y_cr_offset + ALIGN(obj_surface->cb_cr_height, 32) / 2; + obj_surface->cb_cr_pitch = obj_surface->width / 2; + region_height = obj_surface->height + ALIGN(obj_surface->cb_cr_height, 32); + break; + + case VA_FOURCC_YV12: + case VA_FOURCC_I420: + if (fourcc == VA_FOURCC_YV12) { + obj_surface->y_cr_offset = obj_surface->height; + obj_surface->y_cb_offset = obj_surface->height + obj_surface->height / 4; + } else { + obj_surface->y_cb_offset = obj_surface->height; + obj_surface->y_cr_offset = obj_surface->height + obj_surface->height / 4; + } + + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height / 2; + obj_surface->cb_cr_pitch = obj_surface->width / 2; + region_height = obj_surface->height + obj_surface->height / 2; + break; + + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + obj_surface->width = ALIGN(obj_surface->orig_width * 2, i965->codec_info->min_linear_wpitch); + obj_surface->y_cb_offset = 0; + obj_surface->y_cr_offset = 0; + obj_surface->cb_cr_width = obj_surface->orig_width / 2; + obj_surface->cb_cr_height = obj_surface->orig_height; + obj_surface->cb_cr_pitch = obj_surface->width; + region_width = obj_surface->width; + region_height = obj_surface->height; + break; + case VA_FOURCC_RGBA: + case VA_FOURCC_RGBX: + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + obj_surface->width = ALIGN(obj_surface->orig_width * 4, i965->codec_info->min_linear_wpitch); + region_width = obj_surface->width; + region_height = obj_surface->height; + break; + + default: + /* Never get here */ + ASSERT_RET(0, VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT); + break; + } + } + + obj_surface->size = ALIGN(region_width * region_height, 0x1000); + + if ((tiled && !obj_surface->user_disable_tiling)) { + uint32_t tiling_mode = I915_TILING_Y; /* always uses Y-tiled format */ + unsigned long pitch; + + obj_surface->bo = drm_intel_bo_alloc_tiled(i965->intel.bufmgr, + "vaapi surface", + region_width, + region_height, + 1, + &tiling_mode, + &pitch, + 0); + assert(tiling_mode == I915_TILING_Y); + assert(pitch == obj_surface->width); + } else { + obj_surface->bo = dri_bo_alloc(i965->intel.bufmgr, + "vaapi surface", + obj_surface->size, + 0x1000); + } + + obj_surface->fourcc = fourcc; + obj_surface->subsampling = subsampling; + assert(obj_surface->bo); + return VA_STATUS_SUCCESS; +} + +VAStatus i965_DeriveImage(VADriverContextP ctx, + VASurfaceID surface, + VAImage *out_image) /* out */ +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_image *obj_image; + struct object_surface *obj_surface; + VAImageID image_id; + unsigned int w_pitch; + VAStatus va_status = VA_STATUS_ERROR_OPERATION_FAILED; + + out_image->image_id = VA_INVALID_ID; + obj_surface = SURFACE(surface); + + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + if (!obj_surface->bo) { + unsigned int is_tiled = 0; + unsigned int fourcc = VA_FOURCC_YV12; + i965_guess_surface_format(ctx, surface, &fourcc, &is_tiled); + int sampling = get_sampling_from_fourcc(fourcc); + va_status = i965_check_alloc_surface_bo(ctx, obj_surface, is_tiled, fourcc, sampling); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + } + + ASSERT_RET(obj_surface->fourcc, VA_STATUS_ERROR_INVALID_SURFACE); + + w_pitch = obj_surface->width; + + image_id = NEW_IMAGE_ID(); if (image_id == VA_INVALID_ID) return VA_STATUS_ERROR_ALLOCATION_FAILED; @@ -1897,52 +4279,126 @@ image->height = obj_surface->orig_height; image->data_size = obj_surface->size; - if (!render_state->inited) { - image->format.fourcc = VA_FOURCC('Y','V','1','2'); - image->format.byte_order = VA_LSB_FIRST; - image->format.bits_per_pixel = 12; - image->num_planes = 3; - image->pitches[0] = w_pitch; - image->offsets[0] = 0; - image->pitches[1] = w_pitch / 2; - image->offsets[1] = w_pitch * h_pitch; - image->pitches[2] = w_pitch / 2; - image->offsets[2] = w_pitch * h_pitch + (w_pitch / 2) * (h_pitch / 2); - } else { - if (render_state->interleaved_uv) { - image->format.fourcc = VA_FOURCC('N','V','1','2'); - image->format.byte_order = VA_LSB_FIRST; - image->format.bits_per_pixel = 12; - image->num_planes = 2; - image->pitches[0] = w_pitch; - image->offsets[0] = 0; - image->pitches[1] = w_pitch; - image->offsets[1] = w_pitch * h_pitch; - } else { - image->format.fourcc = VA_FOURCC('I','4','2','0'); - image->format.byte_order = VA_LSB_FIRST; - image->format.bits_per_pixel = 12; - image->num_planes = 3; - image->pitches[0] = w_pitch; - image->offsets[0] = 0; - image->pitches[1] = w_pitch / 2; - image->offsets[1] = w_pitch * h_pitch; - image->pitches[2] = w_pitch / 2; - image->offsets[2] = w_pitch * h_pitch + (w_pitch / 2) * (h_pitch / 2); + image->format.fourcc = obj_surface->fourcc; + image->format.byte_order = VA_LSB_FIRST; + image->format.bits_per_pixel = get_bpp_from_fourcc(obj_surface->fourcc); + + if (!image->format.bits_per_pixel) + goto error; + + switch (image->format.fourcc) { + case VA_FOURCC_YV12: + image->num_planes = 3; + image->pitches[0] = w_pitch; /* Y */ + image->offsets[0] = 0; + image->pitches[1] = obj_surface->cb_cr_pitch; /* V */ + image->offsets[1] = w_pitch * obj_surface->y_cr_offset; + image->pitches[2] = obj_surface->cb_cr_pitch; /* U */ + image->offsets[2] = w_pitch * obj_surface->y_cb_offset; + break; + + case VA_FOURCC_YV16: + image->num_planes = 3; + image->pitches[0] = w_pitch; /* Y */ + image->offsets[0] = 0; + image->pitches[1] = obj_surface->cb_cr_pitch; /* V */ + image->offsets[1] = w_pitch * obj_surface->y_cr_offset; + image->pitches[2] = obj_surface->cb_cr_pitch; /* U */ + image->offsets[2] = w_pitch * obj_surface->y_cb_offset; + break; + + case VA_FOURCC_NV12: + case VA_FOURCC_P010: + image->num_planes = 2; + image->pitches[0] = w_pitch; /* Y */ + image->offsets[0] = 0; + image->pitches[1] = obj_surface->cb_cr_pitch; /* UV */ + image->offsets[1] = w_pitch * obj_surface->y_cb_offset; + break; + + case VA_FOURCC_I420: + case VA_FOURCC_422H: + case VA_FOURCC_IMC3: + case VA_FOURCC_444P: + case VA_FOURCC_422V: + case VA_FOURCC_411P: + image->num_planes = 3; + image->pitches[0] = w_pitch; /* Y */ + image->offsets[0] = 0; + image->pitches[1] = obj_surface->cb_cr_pitch; /* U */ + image->offsets[1] = w_pitch * obj_surface->y_cb_offset; + image->pitches[2] = obj_surface->cb_cr_pitch; /* V */ + image->offsets[2] = w_pitch * obj_surface->y_cr_offset; + break; + + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + case VA_FOURCC_Y800: + image->num_planes = 1; + image->pitches[0] = obj_surface->width; /* Y, width is aligned already */ + image->offsets[0] = 0; + break; + case VA_FOURCC_RGBA: + case VA_FOURCC_RGBX: + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + image->num_planes = 1; + image->pitches[0] = obj_surface->width; + + switch (image->format.fourcc) { + case VA_FOURCC_RGBA: + case VA_FOURCC_RGBX: + image->format.red_mask = 0x000000ff; + image->format.green_mask = 0x0000ff00; + image->format.blue_mask = 0x00ff0000; + image->format.alpha_mask = 0x00000000; + break; + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + image->format.red_mask = 0x00ff0000; + image->format.green_mask = 0x0000ff00; + image->format.blue_mask = 0x000000ff; + image->format.alpha_mask = 0x00000000; + break; + default: + goto error; + } + + switch (image->format.fourcc) { + case VA_FOURCC_RGBA: + case VA_FOURCC_BGRA: + image->format.depth = 32; + break; + case VA_FOURCC_RGBX: + case VA_FOURCC_BGRX: + image->format.depth = 24; + break; + default: + goto error; } + + break; + default: + goto error; } - i965_check_alloc_surface_bo(ctx, obj_surface, HAS_TILED_SURFACE(i965), image->format.fourcc); va_status = i965_create_buffer_internal(ctx, 0, VAImageBufferType, obj_surface->size, 1, NULL, obj_surface->bo, &image->buf); if (va_status != VA_STATUS_SUCCESS) goto error; - obj_image->bo = BUFFER(image->buf)->buffer_store->bo; + struct object_buffer *obj_buffer = BUFFER(image->buf); + + if (!obj_buffer || + !obj_buffer->buffer_store || + !obj_buffer->buffer_store->bo) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + obj_image->bo = obj_buffer->buffer_store->bo; dri_bo_reference(obj_image->bo); if (image->num_palette_entries > 0 && image->entry_bytes > 0) { - obj_image->palette = malloc(image->num_palette_entries * sizeof(obj_image->palette)); + obj_image->palette = malloc(image->num_palette_entries * sizeof(*obj_image->palette)); if (!obj_image->palette) { va_status = VA_STATUS_ERROR_ALLOCATION_FAILED; goto error; @@ -1951,6 +4407,7 @@ *out_image = *image; obj_surface->flags |= SURFACE_DERIVED; + obj_surface->derived_image_id = image_id; obj_image->derived_surface = surface; return VA_STATUS_SUCCESS; @@ -1994,6 +4451,7 @@ if (obj_surface) { obj_surface->flags &= ~SURFACE_DERIVED; + obj_surface->derived_image_id = VA_INVALID_ID; } i965_destroy_image(&i965->image_heap, (struct object_base *)obj_image); @@ -2028,6 +4486,17 @@ return VA_STATUS_SUCCESS; } +static int +get_sampling_from_fourcc(unsigned int fourcc) +{ + const i965_fourcc_info *info = get_fourcc_info(fourcc); + + if (info && (info->flag & I_S)) + return info->subsampling; + else + return -1; +} + static inline void memcpy_pic(uint8_t *dst, unsigned int dst_stride, const uint8_t *src, unsigned int src_stride, @@ -2042,7 +4511,7 @@ } } -static void +static VAStatus get_image_i420(struct object_image *obj_image, uint8_t *image_data, struct object_surface *obj_surface, const VARectangle *rect) @@ -2052,11 +4521,12 @@ const int U = obj_image->image.format.fourcc == obj_surface->fourcc ? 1 : 2; const int V = obj_image->image.format.fourcc == obj_surface->fourcc ? 2 : 1; unsigned int tiling, swizzle; + VAStatus va_status = VA_STATUS_SUCCESS; if (!obj_surface->bo) - return; + return VA_STATUS_ERROR_INVALID_SURFACE; - assert(obj_surface->fourcc); + ASSERT_RET(obj_surface->fourcc, VA_STATUS_ERROR_INVALID_SURFACE); dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); if (tiling != I915_TILING_NONE) @@ -2065,7 +4535,7 @@ dri_bo_map(obj_surface->bo, 0); if (!obj_surface->bo->virtual) - return; + return VA_STATUS_ERROR_INVALID_SURFACE; /* Dest VA image has either I420 or YV12 format. Source VA surface alway has I420 format */ @@ -2101,18 +4571,21 @@ drm_intel_gem_bo_unmap_gtt(obj_surface->bo); else dri_bo_unmap(obj_surface->bo); + + return va_status; } -static void +static VAStatus get_image_nv12(struct object_image *obj_image, uint8_t *image_data, struct object_surface *obj_surface, const VARectangle *rect) { uint8_t *dst[2], *src[2]; unsigned int tiling, swizzle; + VAStatus va_status = VA_STATUS_SUCCESS; if (!obj_surface->bo) - return; + return VA_STATUS_ERROR_INVALID_SURFACE; assert(obj_surface->fourcc); dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); @@ -2123,7 +4596,7 @@ dri_bo_map(obj_surface->bo, 0); if (!obj_surface->bo->virtual) - return; + return VA_STATUS_ERROR_INVALID_SURFACE; /* Both dest VA image and source surface have NV12 format */ dst[0] = image_data + obj_image->image.offsets[0]; @@ -2149,6 +4622,107 @@ drm_intel_gem_bo_unmap_gtt(obj_surface->bo); else dri_bo_unmap(obj_surface->bo); + + return va_status; +} + +static VAStatus +get_image_yuy2(struct object_image *obj_image, uint8_t *image_data, + struct object_surface *obj_surface, + const VARectangle *rect) +{ + uint8_t *dst, *src; + unsigned int tiling, swizzle; + VAStatus va_status = VA_STATUS_SUCCESS; + + if (!obj_surface->bo) + return VA_STATUS_ERROR_INVALID_SURFACE; + + assert(obj_surface->fourcc); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_map_gtt(obj_surface->bo); + else + dri_bo_map(obj_surface->bo, 0); + + if (!obj_surface->bo->virtual) + return VA_STATUS_ERROR_INVALID_SURFACE; + + /* Both dest VA image and source surface have YUYV format */ + dst = image_data + obj_image->image.offsets[0]; + src = (uint8_t *)obj_surface->bo->virtual; + + /* Y plane */ + dst += rect->y * obj_image->image.pitches[0] + rect->x*2; + src += rect->y * obj_surface->width + rect->x*2; + memcpy_pic(dst, obj_image->image.pitches[0], + src, obj_surface->width*2, + rect->width*2, rect->height); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_unmap_gtt(obj_surface->bo); + else + dri_bo_unmap(obj_surface->bo); + + return va_status; +} + +static VAStatus +i965_sw_getimage(VADriverContextP ctx, + struct object_surface *obj_surface, struct object_image *obj_image, + const VARectangle *rect) +{ + void *image_data = NULL; + VAStatus va_status; + + if (obj_surface->fourcc != obj_image->image.format.fourcc) + return VA_STATUS_ERROR_INVALID_IMAGE_FORMAT; + + va_status = i965_MapBuffer(ctx, obj_image->image.buf, &image_data); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + switch (obj_image->image.format.fourcc) { + case VA_FOURCC_YV12: + case VA_FOURCC_I420: + get_image_i420(obj_image, image_data, obj_surface, rect); + break; + case VA_FOURCC_NV12: + get_image_nv12(obj_image, image_data, obj_surface, rect); + break; + case VA_FOURCC_YUY2: + /* YUY2 is the format supported by overlay plane */ + get_image_yuy2(obj_image, image_data, obj_surface, rect); + break; + default: + va_status = VA_STATUS_ERROR_OPERATION_FAILED; + break; + } + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = i965_UnmapBuffer(ctx, obj_image->image.buf); + return va_status; +} + +static VAStatus +i965_hw_getimage(VADriverContextP ctx, + struct object_surface *obj_surface, struct object_image *obj_image, + const VARectangle *rect) +{ + struct i965_surface src_surface; + struct i965_surface dst_surface; + + src_surface.base = (struct object_base *)obj_surface; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + + dst_surface.base = (struct object_base *)obj_image; + dst_surface.type = I965_SURFACE_TYPE_IMAGE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + return i965_image_processing(ctx, &src_surface, rect, &dst_surface, rect); } VAStatus @@ -2160,16 +4734,23 @@ unsigned int height, VAImageID image) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_render_state *render_state = &i965->render_state; + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_surface * const obj_surface = SURFACE(surface); + struct object_image * const obj_image = IMAGE(image); + VARectangle rect; + VAStatus va_status; - struct object_surface *obj_surface = SURFACE(surface); if (!obj_surface) return VA_STATUS_ERROR_INVALID_SURFACE; + if (!obj_surface->bo) /* don't get anything, keep previous data */ + return VA_STATUS_SUCCESS; + if (is_surface_busy(i965, obj_surface)) + return VA_STATUS_ERROR_SURFACE_BUSY; - struct object_image *obj_image = IMAGE(image); - if (!obj_image) + if (!obj_image || !obj_image->bo) return VA_STATUS_ERROR_INVALID_IMAGE; + if (is_image_busy(i965, obj_image, surface)) + return VA_STATUS_ERROR_SURFACE_BUSY; if (x < 0 || y < 0) return VA_STATUS_ERROR_INVALID_PARAMETER; @@ -2180,344 +4761,1907 @@ y + height > obj_image->image.height) return VA_STATUS_ERROR_INVALID_PARAMETER; - VAStatus va_status; - void *image_data = NULL; - - va_status = i965_MapBuffer(ctx, obj_image->image.buf, &image_data); - if (va_status != VA_STATUS_SUCCESS) - return va_status; - - VARectangle rect; rect.x = x; rect.y = y; rect.width = width; rect.height = height; - switch (obj_image->image.format.fourcc) { - case VA_FOURCC('Y','V','1','2'): - case VA_FOURCC('I','4','2','0'): - /* I420 is native format for MPEG-2 decoded surfaces */ - if (render_state->interleaved_uv) - goto operation_failed; - get_image_i420(obj_image, image_data, obj_surface, &rect); - break; - case VA_FOURCC('N','V','1','2'): - /* NV12 is native format for H.264 decoded surfaces */ - if (!render_state->interleaved_uv) - goto operation_failed; - get_image_nv12(obj_image, image_data, obj_surface, &rect); - break; - default: - operation_failed: - va_status = VA_STATUS_ERROR_OPERATION_FAILED; - break; - } + if (HAS_ACCELERATED_GETIMAGE(i965)) + va_status = i965_hw_getimage(ctx, obj_surface, obj_image, &rect); + else + va_status = i965_sw_getimage(ctx, obj_surface, obj_image, &rect); + + return va_status; +} + +static VAStatus +put_image_i420(struct object_surface *obj_surface, + const VARectangle *dst_rect, + struct object_image *obj_image, uint8_t *image_data, + const VARectangle *src_rect) +{ + uint8_t *dst[3], *src[3]; + const int Y = 0; + const int U = obj_image->image.format.fourcc == obj_surface->fourcc ? 1 : 2; + const int V = obj_image->image.format.fourcc == obj_surface->fourcc ? 2 : 1; + unsigned int tiling, swizzle; + VAStatus va_status = VA_STATUS_SUCCESS; + + ASSERT_RET(obj_surface->bo, VA_STATUS_ERROR_INVALID_SURFACE); + + ASSERT_RET(obj_surface->fourcc, VA_STATUS_ERROR_INVALID_SURFACE); + ASSERT_RET(dst_rect->width == src_rect->width, VA_STATUS_ERROR_UNIMPLEMENTED); + ASSERT_RET(dst_rect->height == src_rect->height, VA_STATUS_ERROR_UNIMPLEMENTED); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_map_gtt(obj_surface->bo); + else + dri_bo_map(obj_surface->bo, 0); + + if (!obj_surface->bo->virtual) + return VA_STATUS_ERROR_INVALID_SURFACE; + + /* Dest VA image has either I420 or YV12 format. + Source VA surface alway has I420 format */ + dst[0] = (uint8_t *)obj_surface->bo->virtual; + src[Y] = image_data + obj_image->image.offsets[Y]; + dst[1] = dst[0] + obj_surface->width * obj_surface->height; + src[U] = image_data + obj_image->image.offsets[U]; + dst[2] = dst[1] + (obj_surface->width / 2) * (obj_surface->height / 2); + src[V] = image_data + obj_image->image.offsets[V]; + + /* Y plane */ + dst[0] += dst_rect->y * obj_surface->width + dst_rect->x; + src[Y] += src_rect->y * obj_image->image.pitches[Y] + src_rect->x; + memcpy_pic(dst[0], obj_surface->width, + src[Y], obj_image->image.pitches[Y], + src_rect->width, src_rect->height); + + /* U plane */ + dst[1] += (dst_rect->y / 2) * obj_surface->width / 2 + dst_rect->x / 2; + src[U] += (src_rect->y / 2) * obj_image->image.pitches[U] + src_rect->x / 2; + memcpy_pic(dst[1], obj_surface->width / 2, + src[U], obj_image->image.pitches[U], + src_rect->width / 2, src_rect->height / 2); + + /* V plane */ + dst[2] += (dst_rect->y / 2) * obj_surface->width / 2 + dst_rect->x / 2; + src[V] += (src_rect->y / 2) * obj_image->image.pitches[V] + src_rect->x / 2; + memcpy_pic(dst[2], obj_surface->width / 2, + src[V], obj_image->image.pitches[V], + src_rect->width / 2, src_rect->height / 2); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_unmap_gtt(obj_surface->bo); + else + dri_bo_unmap(obj_surface->bo); + + return va_status; +} + +static VAStatus +put_image_nv12(struct object_surface *obj_surface, + const VARectangle *dst_rect, + struct object_image *obj_image, uint8_t *image_data, + const VARectangle *src_rect) +{ + uint8_t *dst[2], *src[2]; + unsigned int tiling, swizzle; + VAStatus va_status = VA_STATUS_SUCCESS; + + if (!obj_surface->bo) + return VA_STATUS_ERROR_INVALID_SURFACE; + + ASSERT_RET(obj_surface->fourcc, VA_STATUS_ERROR_INVALID_SURFACE); + ASSERT_RET(dst_rect->width == src_rect->width, VA_STATUS_ERROR_UNIMPLEMENTED); + ASSERT_RET(dst_rect->height == src_rect->height, VA_STATUS_ERROR_UNIMPLEMENTED); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_map_gtt(obj_surface->bo); + else + dri_bo_map(obj_surface->bo, 0); + + if (!obj_surface->bo->virtual) + return VA_STATUS_ERROR_INVALID_SURFACE; + + /* Both dest VA image and source surface have NV12 format */ + dst[0] = (uint8_t *)obj_surface->bo->virtual; + src[0] = image_data + obj_image->image.offsets[0]; + dst[1] = dst[0] + obj_surface->width * obj_surface->height; + src[1] = image_data + obj_image->image.offsets[1]; + + /* Y plane */ + dst[0] += dst_rect->y * obj_surface->width + dst_rect->x; + src[0] += src_rect->y * obj_image->image.pitches[0] + src_rect->x; + memcpy_pic(dst[0], obj_surface->width, + src[0], obj_image->image.pitches[0], + src_rect->width, src_rect->height); + + /* UV plane */ + dst[1] += (dst_rect->y / 2) * obj_surface->width + (dst_rect->x & -2); + src[1] += (src_rect->y / 2) * obj_image->image.pitches[1] + (src_rect->x & -2); + memcpy_pic(dst[1], obj_surface->width, + src[1], obj_image->image.pitches[1], + src_rect->width, src_rect->height / 2); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_unmap_gtt(obj_surface->bo); + else + dri_bo_unmap(obj_surface->bo); + + return va_status; +} + +static VAStatus +put_image_yuy2(struct object_surface *obj_surface, + const VARectangle *dst_rect, + struct object_image *obj_image, uint8_t *image_data, + const VARectangle *src_rect) +{ + uint8_t *dst, *src; + unsigned int tiling, swizzle; + VAStatus va_status = VA_STATUS_SUCCESS; + + ASSERT_RET(obj_surface->bo, VA_STATUS_ERROR_INVALID_SURFACE); + ASSERT_RET(obj_surface->fourcc, VA_STATUS_ERROR_INVALID_SURFACE); + ASSERT_RET(dst_rect->width == src_rect->width, VA_STATUS_ERROR_UNIMPLEMENTED); + ASSERT_RET(dst_rect->height == src_rect->height, VA_STATUS_ERROR_UNIMPLEMENTED); + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_map_gtt(obj_surface->bo); + else + dri_bo_map(obj_surface->bo, 0); + + if (!obj_surface->bo->virtual) + return VA_STATUS_ERROR_INVALID_SURFACE; + + /* Both dest VA image and source surface have YUY2 format */ + dst = (uint8_t *)obj_surface->bo->virtual; + src = image_data + obj_image->image.offsets[0]; + + /* YUYV packed plane */ + dst += dst_rect->y * obj_surface->width + dst_rect->x*2; + src += src_rect->y * obj_image->image.pitches[0] + src_rect->x*2; + memcpy_pic(dst, obj_surface->width*2, + src, obj_image->image.pitches[0], + src_rect->width*2, src_rect->height); + + if (tiling != I915_TILING_NONE) + drm_intel_gem_bo_unmap_gtt(obj_surface->bo); + else + dri_bo_unmap(obj_surface->bo); + + return va_status; +} + +static VAStatus +i965_sw_putimage(VADriverContextP ctx, + struct object_surface *obj_surface, struct object_image *obj_image, + const VARectangle *src_rect, const VARectangle *dst_rect) +{ + VAStatus va_status = VA_STATUS_SUCCESS; + void *image_data = NULL; + + /* XXX: don't allow scaling */ + if (src_rect->width != dst_rect->width || + src_rect->height != dst_rect->height) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if (obj_surface->fourcc) { + /* Don't allow format mismatch */ + if (obj_surface->fourcc != obj_image->image.format.fourcc) + return VA_STATUS_ERROR_INVALID_IMAGE_FORMAT; + } + + else { + /* VA is surface not used for decoding, use same VA image format */ + va_status = i965_check_alloc_surface_bo( + ctx, + obj_surface, + 0, /* XXX: don't use tiled surface */ + obj_image->image.format.fourcc, + get_sampling_from_fourcc (obj_image->image.format.fourcc)); + } + + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = i965_MapBuffer(ctx, obj_image->image.buf, &image_data); + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + switch (obj_image->image.format.fourcc) { + case VA_FOURCC_YV12: + case VA_FOURCC_I420: + va_status = put_image_i420(obj_surface, dst_rect, obj_image, image_data, src_rect); + break; + case VA_FOURCC_NV12: + va_status = put_image_nv12(obj_surface, dst_rect, obj_image, image_data, src_rect); + break; + case VA_FOURCC_YUY2: + va_status = put_image_yuy2(obj_surface, dst_rect, obj_image, image_data, src_rect); + break; + default: + va_status = VA_STATUS_ERROR_OPERATION_FAILED; + break; + } + if (va_status != VA_STATUS_SUCCESS) + return va_status; + + va_status = i965_UnmapBuffer(ctx, obj_image->image.buf); + return va_status; +} + +static VAStatus +i965_hw_putimage(VADriverContextP ctx, + struct object_surface *obj_surface, struct object_image *obj_image, + const VARectangle *src_rect, const VARectangle *dst_rect) +{ + struct i965_surface src_surface, dst_surface; + VAStatus va_status = VA_STATUS_SUCCESS; + + if (!obj_surface->bo) { + unsigned int tiling, swizzle; + int surface_sampling = get_sampling_from_fourcc (obj_image->image.format.fourcc);; + dri_bo_get_tiling(obj_image->bo, &tiling, &swizzle); + + i965_check_alloc_surface_bo(ctx, + obj_surface, + !!tiling, + obj_image->image.format.fourcc, + surface_sampling); + } + + ASSERT_RET(obj_surface->fourcc, VA_STATUS_ERROR_INVALID_SURFACE); + + src_surface.base = (struct object_base *)obj_image; + src_surface.type = I965_SURFACE_TYPE_IMAGE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + va_status = i965_image_processing(ctx, + &src_surface, + src_rect, + &dst_surface, + dst_rect); + + return va_status; +} + +static VAStatus +i965_PutImage(VADriverContextP ctx, + VASurfaceID surface, + VAImageID image, + int src_x, + int src_y, + unsigned int src_width, + unsigned int src_height, + int dest_x, + int dest_y, + unsigned int dest_width, + unsigned int dest_height) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_surface * const obj_surface = SURFACE(surface); + struct object_image * const obj_image = IMAGE(image); + VARectangle src_rect, dst_rect; + VAStatus va_status; + + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + if (is_surface_busy(i965, obj_surface)) + return VA_STATUS_ERROR_SURFACE_BUSY; + + if (!obj_image || !obj_image->bo) + return VA_STATUS_ERROR_INVALID_IMAGE; + if (is_image_busy(i965, obj_image, surface)) + return VA_STATUS_ERROR_SURFACE_BUSY; + + if (src_x < 0 || + src_y < 0 || + src_x + src_width > obj_image->image.width || + src_y + src_height > obj_image->image.height) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + src_rect.x = src_x; + src_rect.y = src_y; + src_rect.width = src_width; + src_rect.height = src_height; + + if (dest_x < 0 || + dest_y < 0 || + dest_x + dest_width > obj_surface->orig_width || + dest_y + dest_height > obj_surface->orig_height) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + dst_rect.x = dest_x; + dst_rect.y = dest_y; + dst_rect.width = dest_width; + dst_rect.height = dest_height; + + if (HAS_ACCELERATED_PUTIMAGE(i965)) + va_status = i965_hw_putimage(ctx, obj_surface, obj_image, + &src_rect, &dst_rect); + else + va_status = i965_sw_putimage(ctx, obj_surface, obj_image, + &src_rect, &dst_rect); + + return va_status; +} + +VAStatus +i965_PutSurface(VADriverContextP ctx, + VASurfaceID surface, + void *draw, /* X Drawable */ + short srcx, + short srcy, + unsigned short srcw, + unsigned short srch, + short destx, + short desty, + unsigned short destw, + unsigned short desth, + VARectangle *cliprects, /* client supplied clip list */ + unsigned int number_cliprects, /* number of clip rects in the clip list */ + unsigned int flags) /* de-interlacing flags */ +{ +#ifdef HAVE_VA_X11 + if (IS_VA_X11(ctx)) { + VARectangle src_rect, dst_rect; + + src_rect.x = srcx; + src_rect.y = srcy; + src_rect.width = srcw; + src_rect.height = srch; + + dst_rect.x = destx; + dst_rect.y = desty; + dst_rect.width = destw; + dst_rect.height = desth; + + return i965_put_surface_dri(ctx, surface, draw, &src_rect, &dst_rect, + cliprects, number_cliprects, flags); + } +#endif + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +static VAStatus +i965_BufferInfo( + VADriverContextP ctx, /* in */ + VABufferID buf_id, /* in */ + VABufferType *type, /* out */ + unsigned int *size, /* out */ + unsigned int *num_elements /* out */ +) +{ + struct i965_driver_data *i965 = NULL; + struct object_buffer *obj_buffer = NULL; + + i965 = i965_driver_data(ctx); + obj_buffer = BUFFER(buf_id); + + ASSERT_RET(obj_buffer, VA_STATUS_ERROR_INVALID_BUFFER); + + *type = obj_buffer->type; + *size = obj_buffer->size_element; + *num_elements = obj_buffer->num_elements; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +i965_LockSurface( + VADriverContextP ctx, /* in */ + VASurfaceID surface, /* in */ + unsigned int *fourcc, /* out */ + unsigned int *luma_stride, /* out */ + unsigned int *chroma_u_stride, /* out */ + unsigned int *chroma_v_stride, /* out */ + unsigned int *luma_offset, /* out */ + unsigned int *chroma_u_offset, /* out */ + unsigned int *chroma_v_offset, /* out */ + unsigned int *buffer_name, /* out */ + void **buffer /* out */ +) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface = NULL; + VAImage tmpImage; + + ASSERT_RET(fourcc, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(luma_stride, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(chroma_u_stride, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(chroma_v_stride, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(luma_offset, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(chroma_u_offset, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(chroma_v_offset, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(buffer_name, VA_STATUS_ERROR_INVALID_PARAMETER); + ASSERT_RET(buffer, VA_STATUS_ERROR_INVALID_PARAMETER); + + tmpImage.image_id = VA_INVALID_ID; + + obj_surface = SURFACE(surface); + if (obj_surface == NULL) { + // Surface is absent. + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + // Lock functionality is absent now. + if (obj_surface->locked_image_id != VA_INVALID_ID) { + // Surface is locked already. + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + vaStatus = i965_DeriveImage( + ctx, + surface, + &tmpImage); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + obj_surface->locked_image_id = tmpImage.image_id; + + vaStatus = i965_MapBuffer( + ctx, + tmpImage.buf, + buffer); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + *fourcc = tmpImage.format.fourcc; + *luma_offset = tmpImage.offsets[0]; + *luma_stride = tmpImage.pitches[0]; + *chroma_u_offset = tmpImage.offsets[1]; + *chroma_u_stride = tmpImage.pitches[1]; + *chroma_v_offset = tmpImage.offsets[2]; + *chroma_v_stride = tmpImage.pitches[2]; + *buffer_name = tmpImage.buf; + +error: + if (vaStatus != VA_STATUS_SUCCESS) { + buffer = NULL; + } + + return vaStatus; +} + +static VAStatus +i965_UnlockSurface( + VADriverContextP ctx, /* in */ + VASurfaceID surface /* in */ +) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_image *locked_img = NULL; + struct object_surface *obj_surface = NULL; + + obj_surface = SURFACE(surface); + + if (obj_surface == NULL) { + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; // Surface is absent + return vaStatus; + } + if (obj_surface->locked_image_id == VA_INVALID_ID) { + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; // Surface is not locked + return vaStatus; + } + + locked_img = IMAGE(obj_surface->locked_image_id); + if (locked_img == NULL || (locked_img->image.image_id == VA_INVALID_ID)) { + // Work image was deallocated before i965_UnlockSurface() + vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + vaStatus = i965_UnmapBuffer( + ctx, + locked_img->image.buf); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + vaStatus = i965_DestroyImage( + ctx, + locked_img->image.image_id); + if (vaStatus != VA_STATUS_SUCCESS) { + goto error; + } + + locked_img->image.image_id = VA_INVALID_ID; + + error: + obj_surface->locked_image_id = VA_INVALID_ID; + + return vaStatus; +} + +static VAStatus +i965_GetSurfaceAttributes( + VADriverContextP ctx, + VAConfigID config, + VASurfaceAttrib *attrib_list, + unsigned int num_attribs + ) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_config *obj_config; + int i; + + if (config == VA_INVALID_ID) + return VA_STATUS_ERROR_INVALID_CONFIG; + + obj_config = CONFIG(config); + + if (obj_config == NULL) + return VA_STATUS_ERROR_INVALID_CONFIG; + + if (attrib_list == NULL || num_attribs == 0) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + for (i = 0; i < num_attribs; i++) { + switch (attrib_list[i].type) { + case VASurfaceAttribPixelFormat: + attrib_list[i].value.type = VAGenericValueTypeInteger; + attrib_list[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + + if (attrib_list[i].value.value.i == 0) { + if (IS_G4X(i965->intel.device_info)) { + if (obj_config->profile == VAProfileMPEG2Simple || + obj_config->profile == VAProfileMPEG2Main) { + attrib_list[i].value.value.i = VA_FOURCC_I420; + } else { + assert(0); + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + } + } else if (IS_IRONLAKE(i965->intel.device_info)) { + if (obj_config->profile == VAProfileMPEG2Simple || + obj_config->profile == VAProfileMPEG2Main) { + attrib_list[i].value.value.i = VA_FOURCC_I420; + } else if (obj_config->profile == VAProfileH264ConstrainedBaseline || + obj_config->profile == VAProfileH264Main || + obj_config->profile == VAProfileH264High) { + attrib_list[i].value.value.i = VA_FOURCC_NV12; + } else if (obj_config->profile == VAProfileNone) { + attrib_list[i].value.value.i = VA_FOURCC_NV12; + } else { + assert(0); + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + } + } else if (IS_GEN6(i965->intel.device_info)) { + attrib_list[i].value.value.i = VA_FOURCC_NV12; + } else if (IS_GEN7(i965->intel.device_info) || + IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) { + if (obj_config->profile == VAProfileJPEGBaseline) + attrib_list[i].value.value.i = 0; /* internal format */ + else + attrib_list[i].value.value.i = VA_FOURCC_NV12; + } + } else { + if (IS_G4X(i965->intel.device_info)) { + if (obj_config->profile == VAProfileMPEG2Simple || + obj_config->profile == VAProfileMPEG2Main) { + if (attrib_list[i].value.value.i != VA_FOURCC_I420) { + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + } + } else { + assert(0); + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + } + } else if (IS_IRONLAKE(i965->intel.device_info)) { + if (obj_config->profile == VAProfileMPEG2Simple || + obj_config->profile == VAProfileMPEG2Main) { + if (attrib_list[i].value.value.i != VA_FOURCC_I420) { + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + } + } else if (obj_config->profile == VAProfileH264ConstrainedBaseline || + obj_config->profile == VAProfileH264Main || + obj_config->profile == VAProfileH264High) { + if (attrib_list[i].value.value.i != VA_FOURCC_NV12) { + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + } + } else if (obj_config->profile == VAProfileNone) { + switch (attrib_list[i].value.value.i) { + case VA_FOURCC_NV12: + case VA_FOURCC_I420: + case VA_FOURCC_YV12: + case VA_FOURCC_YUY2: + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + case VA_FOURCC_RGBX: + case VA_FOURCC_RGBA: + break; + default: + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + break; + } + } else { + assert(0); + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + } + } else if (IS_GEN6(i965->intel.device_info)) { + if (obj_config->entrypoint == VAEntrypointEncSlice || + obj_config->entrypoint == VAEntrypointVideoProc) { + switch (attrib_list[i].value.value.i) { + case VA_FOURCC_NV12: + case VA_FOURCC_I420: + case VA_FOURCC_YV12: + case VA_FOURCC_YUY2: + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + case VA_FOURCC_RGBX: + case VA_FOURCC_RGBA: + break; + default: + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + break; + } + } else { + if (attrib_list[i].value.value.i != VA_FOURCC_NV12) { + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + } + } + } else if (IS_GEN7(i965->intel.device_info) || + IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) { + if (obj_config->entrypoint == VAEntrypointEncSlice || + obj_config->entrypoint == VAEntrypointVideoProc || + obj_config->entrypoint == VAEntrypointEncSliceLP) { + switch (attrib_list[i].value.value.i) { + case VA_FOURCC_NV12: + case VA_FOURCC_I420: + case VA_FOURCC_YV12: + break; + default: + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + break; + } + } else { + if (obj_config->profile == VAProfileJPEGBaseline) { + attrib_list[i].value.value.i = 0; /* JPEG decoding always uses an internal format */ + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + } else { + if (attrib_list[i].value.value.i != VA_FOURCC_NV12) { + attrib_list[i].value.value.i = 0; + attrib_list[i].flags &= ~VA_SURFACE_ATTRIB_SETTABLE; + } + } + } + } + } + + break; + case VASurfaceAttribMinWidth: + /* FIXME: add support for it later */ + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + break; + case VASurfaceAttribMaxWidth: + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + break; + case VASurfaceAttribMinHeight: + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + break; + case VASurfaceAttribMaxHeight: + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + break; + default: + attrib_list[i].flags = VA_SURFACE_ATTRIB_NOT_SUPPORTED; + break; + } + } + + return vaStatus; +} + +static VAStatus +i965_QuerySurfaceAttributes(VADriverContextP ctx, + VAConfigID config, + VASurfaceAttrib *attrib_list, + unsigned int *num_attribs) +{ + VAStatus vaStatus = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_config *obj_config; + int i = 0; + VASurfaceAttrib *attribs = NULL; + + if (config == VA_INVALID_ID) + return VA_STATUS_ERROR_INVALID_CONFIG; + + obj_config = CONFIG(config); + + if (obj_config == NULL) + return VA_STATUS_ERROR_INVALID_CONFIG; + + if (!attrib_list && !num_attribs) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if (attrib_list == NULL) { + *num_attribs = I965_MAX_SURFACE_ATTRIBUTES; + return VA_STATUS_SUCCESS; + } + + attribs = malloc(I965_MAX_SURFACE_ATTRIBUTES *sizeof(*attribs)); + + if (attribs == NULL) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + if (IS_G4X(i965->intel.device_info)) { + if (obj_config->profile == VAProfileMPEG2Simple || + obj_config->profile == VAProfileMPEG2Main) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_I420; + i++; + } + } else if (IS_IRONLAKE(i965->intel.device_info)) { + switch (obj_config->profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_I420; + i++; + + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + + case VAProfileNone: + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_I420; + i++; + + break; + + default: + break; + } + } else if (IS_GEN6(i965->intel.device_info)) { + if (obj_config->entrypoint == VAEntrypointVLD) { /* decode */ + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + } else if (obj_config->entrypoint == VAEntrypointEncSlice || /* encode */ + obj_config->entrypoint == VAEntrypointVideoProc) { /* vpp */ + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_I420; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YV12; + i++; + + if (obj_config->entrypoint == VAEntrypointVideoProc) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YUY2; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_RGBA; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_RGBX; + i++; + } + } + } else if (IS_GEN7(i965->intel.device_info)) { + if (obj_config->entrypoint == VAEntrypointVLD) { /* decode */ + if (obj_config->profile == VAProfileJPEGBaseline) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_IMC3; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_IMC1; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_Y800; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_411P; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_422H; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_422V; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_444P; + i++; + } else if (obj_config->profile == VAProfileHEVCMain10) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_P010; + i++; + } else { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + } + } else if (obj_config->entrypoint == VAEntrypointEncSlice || /* encode */ + obj_config->entrypoint == VAEntrypointVideoProc) { /* vpp */ + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_I420; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YV12; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_IMC3; + i++; + + if (obj_config->entrypoint == VAEntrypointVideoProc) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YUY2; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_RGBA; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_RGBX; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_BGRA; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_BGRX; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YV16; + i++; + } + } + } else if (IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) { + if (obj_config->entrypoint == VAEntrypointVLD) { /* decode */ + if (obj_config->profile == VAProfileJPEGBaseline) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_IMC3; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_IMC1; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_Y800; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_411P; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_422H; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_422V; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_444P; + i++; + } else { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + } + } else if (obj_config->entrypoint == VAEntrypointEncSlice || /* encode */ + obj_config->entrypoint == VAEntrypointVideoProc || + obj_config->entrypoint == VAEntrypointEncSliceLP) { + + if (obj_config->profile == VAProfileHEVCMain10) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_P010; + i++; + } else { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_NV12; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_I420; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YV12; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_IMC3; + i++; + } + + if (obj_config->entrypoint == VAEntrypointVideoProc) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YUY2; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_RGBA; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_RGBX; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_BGRA; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_BGRX; + i++; + + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_YV16; + i++; + + if(HAS_VPP_P010(i965)) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_P010; + i++; + } + } + } + } + + attribs[i].type = VASurfaceAttribMemoryType; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_SURFACE_ATTRIB_MEM_TYPE_VA | + VA_SURFACE_ATTRIB_MEM_TYPE_KERNEL_DRM | + VA_SURFACE_ATTRIB_MEM_TYPE_DRM_PRIME; + i++; + + attribs[i].type = VASurfaceAttribExternalBufferDescriptor; + attribs[i].value.type = VAGenericValueTypePointer; + attribs[i].flags = VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.p = NULL; /* ignore */ + i++; + + attribs[i].type = VASurfaceAttribMaxWidth; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE; + attribs[i].value.value.i = i965->codec_info->max_width; + i++; + + attribs[i].type = VASurfaceAttribMaxHeight; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE; + attribs[i].value.value.i = i965->codec_info->max_height; + i++; + + if (i > *num_attribs) { + *num_attribs = i; + free(attribs); + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + } + + *num_attribs = i; + memcpy(attrib_list, attribs, i * sizeof(*attribs)); + free(attribs); + + return vaStatus; +} + +/* Acquires buffer handle for external API usage (internal implementation) */ +static VAStatus +i965_acquire_buffer_handle(struct object_buffer *obj_buffer, + uint32_t mem_type, VABufferInfo *out_buf_info) +{ + struct buffer_store *buffer_store; + + buffer_store = obj_buffer->buffer_store; + if (!buffer_store || !buffer_store->bo) + return VA_STATUS_ERROR_INVALID_BUFFER; + + /* Synchronization point */ + drm_intel_bo_wait_rendering(buffer_store->bo); + + if (obj_buffer->export_refcount > 0) { + if (obj_buffer->export_state.mem_type != mem_type) + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + else { + VABufferInfo * const buf_info = &obj_buffer->export_state; + + switch (mem_type) { + case VA_SURFACE_ATTRIB_MEM_TYPE_KERNEL_DRM: { + uint32_t name; + if (drm_intel_bo_flink(buffer_store->bo, &name) != 0) + return VA_STATUS_ERROR_INVALID_BUFFER; + buf_info->handle = name; + break; + } + case VA_SURFACE_ATTRIB_MEM_TYPE_DRM_PRIME: { + int fd; + if (drm_intel_bo_gem_export_to_prime(buffer_store->bo, &fd) != 0) + return VA_STATUS_ERROR_INVALID_BUFFER; + buf_info->handle = (intptr_t)fd; + break; + } + } + + buf_info->type = obj_buffer->type; + buf_info->mem_type = mem_type; + buf_info->mem_size = + obj_buffer->num_elements * obj_buffer->size_element; + } + + obj_buffer->export_refcount++; + *out_buf_info = obj_buffer->export_state; + return VA_STATUS_SUCCESS; +} + +/* Releases buffer handle after usage (internal implementation) */ +static VAStatus +i965_release_buffer_handle(struct object_buffer *obj_buffer) +{ + if (obj_buffer->export_refcount == 0) + return VA_STATUS_ERROR_INVALID_BUFFER; + + if (--obj_buffer->export_refcount == 0) { + VABufferInfo * const buf_info = &obj_buffer->export_state; + + switch (buf_info->mem_type) { + case VA_SURFACE_ATTRIB_MEM_TYPE_DRM_PRIME: { + close((intptr_t)buf_info->handle); + break; + } + } + buf_info->mem_type = 0; + } + return VA_STATUS_SUCCESS; +} + +/** Acquires buffer handle for external API usage */ +static VAStatus +i965_AcquireBufferHandle(VADriverContextP ctx, VABufferID buf_id, + VABufferInfo *buf_info) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_buffer * const obj_buffer = BUFFER(buf_id); + uint32_t i, mem_type; + + /* List of supported memory types, in preferred order */ + static const uint32_t mem_types[] = { + VA_SURFACE_ATTRIB_MEM_TYPE_DRM_PRIME, + VA_SURFACE_ATTRIB_MEM_TYPE_KERNEL_DRM, + 0 + }; + + if (!obj_buffer) + return VA_STATUS_ERROR_INVALID_BUFFER; + /* XXX: only VA surface|image like buffers are supported for now */ + if (obj_buffer->type != VAImageBufferType) + return VA_STATUS_ERROR_UNSUPPORTED_BUFFERTYPE; + + /* + * As the allocated buffer by calling vaCreateBuffer is related with + * the specific context, it is unnecessary to export it. + * So it is not supported when the buffer is allocated from wrapped + * backend dirver. + */ + if (obj_buffer->wrapper_buffer != VA_INVALID_ID) { + return VA_STATUS_ERROR_UNSUPPORTED_BUFFERTYPE; + } + + if (!buf_info) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if (!buf_info->mem_type) + mem_type = mem_types[0]; + else { + mem_type = 0; + for (i = 0; mem_types[i] != 0; i++) { + if (buf_info->mem_type & mem_types[i]) { + mem_type = buf_info->mem_type; + break; + } + } + if (!mem_type) + return VA_STATUS_ERROR_UNSUPPORTED_MEMORY_TYPE; + } + return i965_acquire_buffer_handle(obj_buffer, mem_type, buf_info); +} + +/** Releases buffer handle after usage from external API */ +static VAStatus +i965_ReleaseBufferHandle(VADriverContextP ctx, VABufferID buf_id) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_buffer * const obj_buffer = BUFFER(buf_id); + + if (!obj_buffer) + return VA_STATUS_ERROR_INVALID_BUFFER; + + if (obj_buffer->wrapper_buffer != VA_INVALID_ID) { + return VA_STATUS_ERROR_INVALID_BUFFER; + } + + return i965_release_buffer_handle(obj_buffer); +} + +static int +i965_os_has_ring_support(VADriverContextP ctx, + int ring) +{ + struct i965_driver_data *const i965 = i965_driver_data(ctx); + + switch (ring) { + case I965_RING_BSD: + return i965->intel.has_bsd; + + case I965_RING_BLT: + return i965->intel.has_blt; + + case I965_RING_VEBOX: + return i965->intel.has_vebox; + + case I965_RING_NULL: + return 1; /* Always support */ + + default: + /* should never get here */ + assert(0); + break; + } + + return 0; +} + +/* + * Query video processing pipeline + */ +VAStatus i965_QueryVideoProcFilters( + VADriverContextP ctx, + VAContextID context, + VAProcFilterType *filters, + unsigned int *num_filters + ) +{ + struct i965_driver_data *const i965 = i965_driver_data(ctx); + unsigned int i = 0, num = 0; + + if (!num_filters || !filters) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + for (i = 0; i < i965->codec_info->num_filters; i++) { + if (i965_os_has_ring_support(ctx, i965->codec_info->filters[i].ring)) { + if (num == *num_filters) { + *num_filters = i965->codec_info->num_filters; + + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + } + + filters[num++] = i965->codec_info->filters[i].type; + } + } + + *num_filters = num; - i965_UnmapBuffer(ctx, obj_image->image.buf); - return va_status; + return VA_STATUS_SUCCESS; } -VAStatus -i965_PutSurface(VADriverContextP ctx, - VASurfaceID surface, - void *draw, /* X Drawable */ - short srcx, - short srcy, - unsigned short srcw, - unsigned short srch, - short destx, - short desty, - unsigned short destw, - unsigned short desth, - VARectangle *cliprects, /* client supplied clip list */ - unsigned int number_cliprects, /* number of clip rects in the clip list */ - unsigned int flags) /* de-interlacing flags */ +VAStatus i965_QueryVideoProcFilterCaps( + VADriverContextP ctx, + VAContextID context, + VAProcFilterType type, + void *filter_caps, + unsigned int *num_filter_caps + ) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct dri_state *dri_state = (struct dri_state *)ctx->dri_state; - struct i965_render_state *render_state = &i965->render_state; - struct dri_drawable *dri_drawable; - union dri_buffer *buffer; - struct intel_region *dest_region; - struct object_surface *obj_surface; - VARectangle src_rect, dst_rect; - int ret; - uint32_t name; - Bool new_region = False; - int pp_flag = 0; + unsigned int i = 0; + struct i965_driver_data *const i965 = i965_driver_data(ctx); - /* Currently don't support DRI1 */ - if (dri_state->driConnectedFlag != VA_DRI2) - return VA_STATUS_ERROR_UNKNOWN; + if (!filter_caps || !num_filter_caps) + return VA_STATUS_ERROR_INVALID_PARAMETER; - /* Some broken sources such as H.264 conformance case FM2_SVA_C - * will get here - */ - obj_surface = SURFACE(surface); - if (!obj_surface || !obj_surface->bo) - return VA_STATUS_SUCCESS; + for (i = 0; i < i965->codec_info->num_filters; i++) { + if (type == i965->codec_info->filters[i].type && + i965_os_has_ring_support(ctx, i965->codec_info->filters[i].ring)) + break; + } - _i965LockMutex(&i965->render_mutex); + if (i == i965->codec_info->num_filters) + return VA_STATUS_ERROR_UNSUPPORTED_FILTER; - dri_drawable = dri_get_drawable(ctx, (Drawable)draw); - assert(dri_drawable); + i = 0; - buffer = dri_get_rendering_buffer(ctx, dri_drawable); - assert(buffer); - - dest_region = render_state->draw_region; + switch (type) { + case VAProcFilterNoiseReduction: + case VAProcFilterSharpening: + { + VAProcFilterCap *cap = filter_caps; + + if (*num_filter_caps < 1) { + *num_filter_caps = 1; + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + } + + cap->range.min_value = 0.0; + cap->range.max_value = 1.0; + cap->range.default_value = 0.5; + cap->range.step = 0.03125; /* 1.0 / 32 */ + i++; + } + + break; - if (dest_region) { - assert(dest_region->bo); - dri_bo_flink(dest_region->bo, &name); + case VAProcFilterDeinterlacing: + { + VAProcFilterCapDeinterlacing *cap = filter_caps; + + if (*num_filter_caps < VAProcDeinterlacingCount) { + *num_filter_caps = VAProcDeinterlacingCount; + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + } - if (buffer->dri2.name != name) { - new_region = True; - dri_bo_unreference(dest_region->bo); - } - } else { - dest_region = (struct intel_region *)calloc(1, sizeof(*dest_region)); - assert(dest_region); - render_state->draw_region = dest_region; - new_region = True; - } + cap->type = VAProcDeinterlacingBob; + i++; + cap++; + + + if (i965->codec_info->has_di_motion_adptive) { + cap->type = VAProcDeinterlacingMotionAdaptive; + i++; + cap++; + } + + if (i965->codec_info->has_di_motion_compensated) { + cap->type = VAProcDeinterlacingMotionCompensated; + i++; + cap++; + } + } - if (new_region) { - dest_region->x = dri_drawable->x; - dest_region->y = dri_drawable->y; - dest_region->width = dri_drawable->width; - dest_region->height = dri_drawable->height; - dest_region->cpp = buffer->dri2.cpp; - dest_region->pitch = buffer->dri2.pitch; + break; + + case VAProcFilterColorBalance: + { + VAProcFilterCapColorBalance *cap = filter_caps; + + if (*num_filter_caps < VAProcColorBalanceCount) { + *num_filter_caps = VAProcColorBalanceCount; + return VA_STATUS_ERROR_MAX_NUM_EXCEEDED; + } + + cap->type = VAProcColorBalanceHue; + cap->range.min_value = -180.0; + cap->range.max_value = 180.0; + cap->range.default_value = 0.0; + cap->range.step = 1.0; + i++; + cap++; + + cap->type = VAProcColorBalanceSaturation; + cap->range.min_value = 0.0; + cap->range.max_value = 10.0; + cap->range.default_value = 1.0; + cap->range.step = 0.1; + i++; + cap++; + + cap->type = VAProcColorBalanceBrightness; + cap->range.min_value = -100.0; + cap->range.max_value = 100.0; + cap->range.default_value = 0.0; + cap->range.step = 1.0; + i++; + cap++; + + cap->type = VAProcColorBalanceContrast; + cap->range.min_value = 0.0; + cap->range.max_value = 10.0; + cap->range.default_value = 1.0; + cap->range.step = 0.1; + i++; + cap++; + } - dest_region->bo = intel_bo_gem_create_from_name(i965->intel.bufmgr, "rendering buffer", buffer->dri2.name); - assert(dest_region->bo); + break; - ret = dri_bo_get_tiling(dest_region->bo, &(dest_region->tiling), &(dest_region->swizzle)); - assert(ret == 0); + default: + + break; } - if ((flags & VA_FILTER_SCALING_MASK) == VA_FILTER_SCALING_NL_ANAMORPHIC) - pp_flag |= I965_PP_FLAG_AVS; + *num_filter_caps = i; - if (flags & (VA_BOTTOM_FIELD | VA_TOP_FIELD)) - pp_flag |= I965_PP_FLAG_DEINTERLACING; + return VA_STATUS_SUCCESS; +} - src_rect.x = srcx; - src_rect.y = srcy; - src_rect.width = srcw; - src_rect.height = srch; +static VAProcColorStandardType vpp_input_color_standards[VAProcColorStandardCount] = { + VAProcColorStandardBT601, +}; - dst_rect.x = destx; - dst_rect.y = desty; - dst_rect.width = destw; - dst_rect.height = desth; +static VAProcColorStandardType vpp_output_color_standards[VAProcColorStandardCount] = { + VAProcColorStandardBT601, +}; - intel_render_put_surface(ctx, surface, &src_rect, &dst_rect, pp_flag); +VAStatus i965_QueryVideoProcPipelineCaps( + VADriverContextP ctx, + VAContextID context, + VABufferID *filters, + unsigned int num_filters, + VAProcPipelineCaps *pipeline_cap /* out */ + ) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + unsigned int i = 0; - if(obj_surface->subpic != VA_INVALID_ID) { - intel_render_put_subpicture(ctx, surface, &src_rect, &dst_rect); + pipeline_cap->pipeline_flags = 0; + pipeline_cap->filter_flags = 0; + pipeline_cap->num_forward_references = 0; + pipeline_cap->num_backward_references = 0; + pipeline_cap->num_input_color_standards = 1; + pipeline_cap->input_color_standards = vpp_input_color_standards; + pipeline_cap->num_output_color_standards = 1; + pipeline_cap->output_color_standards = vpp_output_color_standards; + + for (i = 0; i < num_filters; i++) { + struct object_buffer *obj_buffer = BUFFER(filters[i]); + + if (!obj_buffer || + !obj_buffer->buffer_store || + !obj_buffer->buffer_store->buffer) + return VA_STATUS_ERROR_INVALID_BUFFER; + + VAProcFilterParameterBufferBase *base = (VAProcFilterParameterBufferBase *)obj_buffer->buffer_store->buffer; + + if (base->type == VAProcFilterNoiseReduction) { + VAProcFilterParameterBuffer *denoise = (VAProcFilterParameterBuffer *)base; + (void)denoise; + } else if (base->type == VAProcFilterDeinterlacing) { + VAProcFilterParameterBufferDeinterlacing *deint = (VAProcFilterParameterBufferDeinterlacing *)base; + + ASSERT_RET(deint->algorithm == VAProcDeinterlacingBob || + deint->algorithm == VAProcDeinterlacingMotionAdaptive || + deint->algorithm == VAProcDeinterlacingMotionCompensated, + VA_STATUS_ERROR_INVALID_PARAMETER); + + if (deint->algorithm == VAProcDeinterlacingMotionAdaptive || + deint->algorithm == VAProcDeinterlacingMotionCompensated) + pipeline_cap->num_forward_references++; + } else if (base->type == VAProcFilterSkinToneEnhancement) { + VAProcFilterParameterBuffer *stde = (VAProcFilterParameterBuffer *)base; + (void)stde; + } } - dri_swap_buffer(ctx, dri_drawable); - obj_surface->flags |= SURFACE_DISPLAYED; + return VA_STATUS_SUCCESS; +} - if ((obj_surface->flags & SURFACE_ALL_MASK) == SURFACE_DISPLAYED) { - dri_bo_unreference(obj_surface->bo); - obj_surface->bo = NULL; - obj_surface->flags &= ~SURFACE_REF_DIS_MASK; +extern struct hw_codec_info *i965_get_codec_info(int devid); - if (obj_surface->free_private_data) - obj_surface->free_private_data(&obj_surface->private_data); - } +static bool +i965_driver_data_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); - _i965UnlockMutex(&i965->render_mutex); + i965->codec_info = i965_get_codec_info(i965->intel.device_id); - return VA_STATUS_SUCCESS; + if (!i965->codec_info) + return false; + + if (object_heap_init(&i965->config_heap, + sizeof(struct object_config), + CONFIG_ID_OFFSET)) + goto err_config_heap; + if (object_heap_init(&i965->context_heap, + sizeof(struct object_context), + CONTEXT_ID_OFFSET)) + goto err_context_heap; + + if (object_heap_init(&i965->surface_heap, + sizeof(struct object_surface), + SURFACE_ID_OFFSET)) + goto err_surface_heap; + if (object_heap_init(&i965->buffer_heap, + sizeof(struct object_buffer), + BUFFER_ID_OFFSET)) + goto err_buffer_heap; + if (object_heap_init(&i965->image_heap, + sizeof(struct object_image), + IMAGE_ID_OFFSET)) + goto err_image_heap; + if (object_heap_init(&i965->subpic_heap, + sizeof(struct object_subpic), + SUBPIC_ID_OFFSET)) + goto err_subpic_heap; + + i965->batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER, 0); + i965->pp_batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER, 0); + _i965InitMutex(&i965->render_mutex); + _i965InitMutex(&i965->pp_mutex); + + return true; + +err_subpic_heap: + object_heap_destroy(&i965->image_heap); +err_image_heap: + object_heap_destroy(&i965->buffer_heap); +err_buffer_heap: + object_heap_destroy(&i965->surface_heap); +err_surface_heap: + object_heap_destroy(&i965->context_heap); +err_context_heap: + object_heap_destroy(&i965->config_heap); +err_config_heap: + + return false; } -VAStatus -i965_Terminate(VADriverContextP ctx) +static void +i965_driver_data_terminate(VADriverContextP ctx) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - - if (i965->batch) - intel_batchbuffer_free(i965->batch); + struct i965_driver_data *i965 = i965_driver_data(ctx); + _i965DestroyMutex(&i965->pp_mutex); _i965DestroyMutex(&i965->render_mutex); - if (i965_render_terminate(ctx) == False) - return VA_STATUS_ERROR_UNKNOWN; - - if (i965_post_processing_terminate(ctx) == False) - return VA_STATUS_ERROR_UNKNOWN; + if (i965->batch) + intel_batchbuffer_free(i965->batch); - if (intel_driver_terminate(ctx) == False) - return VA_STATUS_ERROR_UNKNOWN; + if (i965->pp_batch) + intel_batchbuffer_free(i965->pp_batch); - i965_destroy_heap(&i965->buffer_heap, i965_destroy_buffer); - i965_destroy_heap(&i965->image_heap, i965_destroy_image); i965_destroy_heap(&i965->subpic_heap, i965_destroy_subpic); + i965_destroy_heap(&i965->image_heap, i965_destroy_image); + i965_destroy_heap(&i965->buffer_heap, i965_destroy_buffer); i965_destroy_heap(&i965->surface_heap, i965_destroy_surface); i965_destroy_heap(&i965->context_heap, i965_destroy_context); i965_destroy_heap(&i965->config_heap, i965_destroy_config); +} - free(ctx->pDriverData); - ctx->pDriverData = NULL; +struct { + bool (*init)(VADriverContextP ctx); + void (*terminate)(VADriverContextP ctx); + int display_type; +} i965_sub_ops[] = { + { + intel_driver_init, + intel_driver_terminate, + 0, + }, + + { + i965_driver_data_init, + i965_driver_data_terminate, + 0, + }, + + { + i965_display_attributes_init, + i965_display_attributes_terminate, + 0, + }, + + { + i965_post_processing_init, + i965_post_processing_terminate, + 0, + }, + + { + i965_render_init, + i965_render_terminate, + 0, + }, + +#ifdef HAVE_VA_WAYLAND + { + i965_output_wayland_init, + i965_output_wayland_terminate, + VA_DISPLAY_WAYLAND, + }, +#endif - return VA_STATUS_SUCCESS; -} +#ifdef HAVE_VA_X11 + { + i965_output_dri_init, + i965_output_dri_terminate, + VA_DISPLAY_X11, + }, +#endif +}; -static VAStatus -i965_BufferInfo( - VADriverContextP ctx, /* in */ - VABufferID buf_id, /* in */ - VABufferType *type, /* out */ - unsigned int *size, /* out */ - unsigned int *num_elements /* out */ -) +static bool +ensure_vendor_string(struct i965_driver_data *i965, const char *chipset) { - struct i965_driver_data *i965 = NULL; - struct object_buffer *obj_buffer = NULL; + int ret, len; - i965 = i965_driver_data(ctx); - obj_buffer = BUFFER(buf_id); + if (i965->va_vendor[0] != '\0') + return true; - *type = obj_buffer->type; - *size = obj_buffer->size_element; - *num_elements = obj_buffer->num_elements; + len = 0; + ret = snprintf(i965->va_vendor, sizeof(i965->va_vendor), + "%s %s driver for %s - %d.%d.%d", + INTEL_STR_DRIVER_VENDOR, INTEL_STR_DRIVER_NAME, chipset, + INTEL_DRIVER_MAJOR_VERSION, INTEL_DRIVER_MINOR_VERSION, + INTEL_DRIVER_MICRO_VERSION); + if (ret < 0 || ret >= sizeof(i965->va_vendor)) + goto error; + len = ret; - return VA_STATUS_SUCCESS; + if (INTEL_DRIVER_PRE_VERSION > 0) { + ret = snprintf(&i965->va_vendor[len], sizeof(i965->va_vendor) - len, + ".pre%d", INTEL_DRIVER_PRE_VERSION); + if (ret < 0 || ret >= sizeof(i965->va_vendor)) + goto error; + len += ret; + + ret = snprintf(&i965->va_vendor[len], sizeof(i965->va_vendor) - len, + " (%s)", INTEL_DRIVER_GIT_VERSION); + if (ret < 0 || ret >= sizeof(i965->va_vendor)) + goto error; + len += ret; + } + return true; + +error: + i965->va_vendor[0] = '\0'; + ASSERT_RET(ret > 0 && len < sizeof(i965->va_vendor), false); + return false; } +/* Only when the option of "enable-wrapper" is passed, it is possible + * to initialize/load the wrapper context of backend driver. + * Otherwise it is not loaded. + */ +#if HAVE_HYBRID_CODEC + static VAStatus -i965_LockSurface( - VADriverContextP ctx, /* in */ - VASurfaceID surface, /* in */ - unsigned int *fourcc, /* out */ - unsigned int *luma_stride, /* out */ - unsigned int *chroma_u_stride, /* out */ - unsigned int *chroma_v_stride, /* out */ - unsigned int *luma_offset, /* out */ - unsigned int *chroma_u_offset, /* out */ - unsigned int *chroma_v_offset, /* out */ - unsigned int *buffer_name, /* out */ - void **buffer /* out */ -) +i965_initialize_wrapper(VADriverContextP ctx, const char *driver_name) { - VAStatus vaStatus = VA_STATUS_SUCCESS; - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct object_surface *obj_surface = NULL; - VAImage tmpImage; +#define DRIVER_EXTENSION "_drv_video.so" - assert(fourcc); - assert(luma_stride); - assert(chroma_u_stride); - assert(chroma_v_stride); - assert(luma_offset); - assert(chroma_u_offset); - assert(chroma_v_offset); - assert(buffer_name); - assert(buffer); + struct i965_driver_data *i965 = i965_driver_data(ctx); - tmpImage.image_id = VA_INVALID_ID; + VADriverContextP wrapper_pdrvctx; + struct VADriverVTable *vtable; + char *search_path, *driver_dir; + char *saveptr; + char driver_path[256]; + void *handle = NULL; + VAStatus va_status = VA_STATUS_SUCCESS; + bool driver_loaded = false; - obj_surface = SURFACE(surface); - if (obj_surface == NULL) { - // Surface is absent. - vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; - goto error; + if (HAS_VP9_DECODING(i965)) { + i965->wrapper_pdrvctx = NULL; + return va_status; } - // Lock functionality is absent now. - if (obj_surface->locked_image_id != VA_INVALID_ID) { - // Surface is locked already. - vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; - goto error; - } + wrapper_pdrvctx = calloc(1, sizeof(*wrapper_pdrvctx)); + vtable = calloc(1, sizeof(*vtable)); - vaStatus = i965_DeriveImage( - ctx, - surface, - &tmpImage); - if (vaStatus != VA_STATUS_SUCCESS) { - goto error; + if (!wrapper_pdrvctx || !vtable) { + fprintf(stderr, "Failed to allocate memory for wrapper \n"); + free(wrapper_pdrvctx); + free(vtable); + return VA_STATUS_ERROR_ALLOCATION_FAILED; } - obj_surface->locked_image_id = tmpImage.image_id; + /* use the same drm_state with CTX */ + wrapper_pdrvctx->drm_state = ctx->drm_state; + wrapper_pdrvctx->display_type = ctx->display_type; + wrapper_pdrvctx->vtable = vtable; + + search_path = VA_DRIVERS_PATH; + search_path = strdup((const char *)search_path); + + driver_dir = strtok_r(search_path, ":", &saveptr); + while (driver_dir && !driver_loaded) { + memset(driver_path, 0, sizeof(driver_path)); + sprintf(driver_path, "%s/%s%s", driver_dir, driver_name, DRIVER_EXTENSION); + + handle = dlopen(driver_path, RTLD_NOW | RTLD_GLOBAL | RTLD_NODELETE); + if (!handle) { + fprintf(stderr, "failed to open %s\n", driver_path); + driver_dir = strtok_r(NULL, ":", &saveptr); + continue; + } + { + VADriverInit init_func = NULL; + char init_func_s[256]; + int i; + + static const struct { + int major; + int minor; + } compatible_versions[] = { + { VA_MAJOR_VERSION, VA_MINOR_VERSION }, + { 0, 37 }, + { 0, 36 }, + { 0, 35 }, + { 0, 34 }, + { 0, 33 }, + { 0, 32 }, + { -1, } + }; + for (i = 0; compatible_versions[i].major >= 0; i++) { + snprintf(init_func_s, sizeof(init_func_s), + "__vaDriverInit_%d_%d", + compatible_versions[i].major, + compatible_versions[i].minor); + init_func = (VADriverInit)dlsym(handle, init_func_s); + if (init_func) { + break; + } + } + if (compatible_versions[i].major < 0) { + dlclose(handle); + fprintf(stderr, "%s has no function %s\n", + driver_path, init_func_s); + driver_dir = strtok_r(NULL, ":", &saveptr); + continue; + } + + if (init_func) + va_status = (*init_func)(wrapper_pdrvctx); + + if (va_status != VA_STATUS_SUCCESS) { + dlclose(handle); + fprintf(stderr, "%s init failed\n", driver_path); + driver_dir = strtok_r(NULL, ":", &saveptr); + continue; + } - vaStatus = i965_MapBuffer( - ctx, - tmpImage.buf, - buffer); - if (vaStatus != VA_STATUS_SUCCESS) { - goto error; + wrapper_pdrvctx->handle = handle; + driver_loaded = true; + } } - *fourcc = tmpImage.format.fourcc; - *luma_offset = tmpImage.offsets[0]; - *luma_stride = tmpImage.pitches[0]; - *chroma_u_offset = tmpImage.offsets[1]; - *chroma_u_stride = tmpImage.pitches[1]; - *chroma_v_offset = tmpImage.offsets[2]; - *chroma_v_stride = tmpImage.pitches[2]; - *buffer_name = tmpImage.buf; + free(search_path); -error: - if (vaStatus != VA_STATUS_SUCCESS) { - buffer = NULL; + if (driver_loaded) { + i965->wrapper_pdrvctx = wrapper_pdrvctx; + return VA_STATUS_SUCCESS; + } else { + fprintf(stderr, "Failed to wrapper %s%s\n", driver_name, DRIVER_EXTENSION); + free(vtable); + free(wrapper_pdrvctx); + return VA_STATUS_ERROR_OPERATION_FAILED; } - - return vaStatus; } +#endif -static VAStatus -i965_UnlockSurface( - VADriverContextP ctx, /* in */ - VASurfaceID surface /* in */ -) +static VAStatus +i965_Init(VADriverContextP ctx) { - VAStatus vaStatus = VA_STATUS_SUCCESS; - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct object_image *locked_img = NULL; - struct object_surface *obj_surface = NULL; - - obj_surface = SURFACE(surface); + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + const char *chipset; - if (obj_surface == NULL) { - vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; // Surface is absent - goto error; - } - if (obj_surface->locked_image_id == VA_INVALID_ID) { - vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; // Surface is not locked - goto error; + for (i = 0; i < ARRAY_ELEMS(i965_sub_ops); i++) { + if ((i965_sub_ops[i].display_type == 0 || + i965_sub_ops[i].display_type == (ctx->display_type & VA_DISPLAY_MAJOR_MASK)) && + !i965_sub_ops[i].init(ctx)) + break; } - locked_img = IMAGE(obj_surface->locked_image_id); - if (locked_img == NULL || (locked_img->image.image_id == VA_INVALID_ID)) { - // Work image was deallocated before i965_UnlockSurface() - vaStatus = VA_STATUS_ERROR_INVALID_PARAMETER; - goto error; - } + if (i == ARRAY_ELEMS(i965_sub_ops)) { + switch (i965->intel.device_id) { +#undef CHIPSET +#define CHIPSET(id, family, dev, str) case id: chipset = str; break; +#include "i965_pciids.h" + default: + chipset = "Unknown Intel Chipset"; + break; + } - vaStatus = i965_UnmapBuffer( - ctx, - locked_img->image.buf); - if (vaStatus != VA_STATUS_SUCCESS) { - goto error; - } + if (!ensure_vendor_string(i965, chipset)) + return VA_STATUS_ERROR_ALLOCATION_FAILED; - vaStatus = i965_DestroyImage( - ctx, - locked_img->image.image_id); - if (vaStatus != VA_STATUS_SUCCESS) { - goto error; + i965->current_context_id = VA_INVALID_ID; + + if (i965->codec_info && i965->codec_info->preinit_hw_codec) + i965->codec_info->preinit_hw_codec(ctx, i965->codec_info); + +#if HAVE_HYBRID_CODEC + i965_initialize_wrapper(ctx, "hybrid"); +#endif + + return VA_STATUS_SUCCESS; + } else { + i--; + + for (; i >= 0; i--) { + if (i965_sub_ops[i].display_type == 0 || + i965_sub_ops[i].display_type == (ctx->display_type & VA_DISPLAY_MAJOR_MASK)) { + i965_sub_ops[i].terminate(ctx); + } + } + + return VA_STATUS_ERROR_UNKNOWN; } +} - locked_img->image.image_id = VA_INVALID_ID; +VAStatus +i965_Terminate(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; - error: - return vaStatus; + if (i965) { + if (i965->wrapper_pdrvctx) { + VADriverContextP pdrvctx; + pdrvctx = i965->wrapper_pdrvctx; + if (pdrvctx->handle) { + pdrvctx->vtable->vaTerminate(pdrvctx); + dlclose(pdrvctx->handle); + pdrvctx->handle = NULL; + } + free(pdrvctx->vtable); + free(pdrvctx); + i965->wrapper_pdrvctx = NULL; + } + + for (i = ARRAY_ELEMS(i965_sub_ops); i > 0; i--) + if (i965_sub_ops[i - 1].display_type == 0 || + i965_sub_ops[i - 1].display_type == (ctx->display_type & VA_DISPLAY_MAJOR_MASK)) { + i965_sub_ops[i - 1].terminate(ctx); + } + + free(i965); + ctx->pDriverData = NULL; + } + + return VA_STATUS_SUCCESS; } VAStatus DLL_EXPORT @@ -2527,8 +6671,10 @@ VA_DRIVER_INIT_FUNC( VADriverContextP ctx ) { struct VADriverVTable * const vtable = ctx->vtable; + struct VADriverVTableVPP * const vtable_vpp = ctx->vtable_vpp; + struct i965_driver_data *i965; - int result; + VAStatus ret = VA_STATUS_ERROR_UNKNOWN; ctx->version_major = VA_MAJOR_VERSION; ctx->version_minor = VA_MINOR_VERSION; @@ -2537,12 +6683,11 @@ ctx->max_attributes = I965_MAX_CONFIG_ATTRIBUTES; ctx->max_image_formats = I965_MAX_IMAGE_FORMATS; ctx->max_subpic_formats = I965_MAX_SUBPIC_FORMATS; - ctx->max_display_attributes = I965_MAX_DISPLAY_ATTRIBUTES; + ctx->max_display_attributes = 1 + ARRAY_ELEMS(i965_display_attributes); vtable->vaTerminate = i965_Terminate; vtable->vaQueryConfigEntrypoints = i965_QueryConfigEntrypoints; vtable->vaQueryConfigProfiles = i965_QueryConfigProfiles; - vtable->vaQueryConfigEntrypoints = i965_QueryConfigEntrypoints; vtable->vaQueryConfigAttributes = i965_QueryConfigAttributes; vtable->vaCreateConfig = i965_CreateConfig; vtable->vaDestroyConfig = i965_DestroyConfig; @@ -2583,54 +6728,36 @@ vtable->vaBufferInfo = i965_BufferInfo; vtable->vaLockSurface = i965_LockSurface; vtable->vaUnlockSurface = i965_UnlockSurface; - // vtable->vaDbgCopySurfaceToBuffer = i965_DbgCopySurfaceToBuffer; + vtable->vaGetSurfaceAttributes = i965_GetSurfaceAttributes; + vtable->vaQuerySurfaceAttributes = i965_QuerySurfaceAttributes; + vtable->vaCreateSurfaces2 = i965_CreateSurfaces2; + + /* 0.36.0 */ + vtable->vaAcquireBufferHandle = i965_AcquireBufferHandle; + vtable->vaReleaseBufferHandle = i965_ReleaseBufferHandle; + + vtable_vpp->vaQueryVideoProcFilters = i965_QueryVideoProcFilters; + vtable_vpp->vaQueryVideoProcFilterCaps = i965_QueryVideoProcFilterCaps; + vtable_vpp->vaQueryVideoProcPipelineCaps = i965_QueryVideoProcPipelineCaps; i965 = (struct i965_driver_data *)calloc(1, sizeof(*i965)); - assert(i965); - ctx->pDriverData = (void *)i965; - result = object_heap_init(&i965->config_heap, - sizeof(struct object_config), - CONFIG_ID_OFFSET); - assert(result == 0); - - result = object_heap_init(&i965->context_heap, - sizeof(struct object_context), - CONTEXT_ID_OFFSET); - assert(result == 0); - - result = object_heap_init(&i965->surface_heap, - sizeof(struct object_surface), - SURFACE_ID_OFFSET); - assert(result == 0); - - result = object_heap_init(&i965->buffer_heap, - sizeof(struct object_buffer), - BUFFER_ID_OFFSET); - assert(result == 0); - - result = object_heap_init(&i965->image_heap, - sizeof(struct object_image), - IMAGE_ID_OFFSET); - assert(result == 0); - - result = object_heap_init(&i965->subpic_heap, - sizeof(struct object_subpic), - SUBPIC_ID_OFFSET); - assert(result == 0); - - sprintf(i965->va_vendor, "%s %s driver - %d.%d.%d", - INTEL_STR_DRIVER_VENDOR, - INTEL_STR_DRIVER_NAME, - INTEL_DRIVER_MAJOR_VERSION, - INTEL_DRIVER_MINOR_VERSION, - INTEL_DRIVER_MICRO_VERSION); + if (i965 == NULL) { + ctx->pDriverData = NULL; - if (INTEL_DRIVER_PRE_VERSION > 0) { - const int len = strlen(i965->va_vendor); - sprintf(&i965->va_vendor[len], ".pre%d", INTEL_DRIVER_PRE_VERSION); + return VA_STATUS_ERROR_ALLOCATION_FAILED; + } + + i965->wrapper_pdrvctx = NULL; + ctx->pDriverData = (void *)i965; + ret = i965_Init(ctx); + + if (ret == VA_STATUS_SUCCESS) { + ctx->str_vendor = i965->va_vendor; + } else { + free(i965); + ctx->pDriverData = NULL; } - ctx->str_vendor = i965->va_vendor; - return i965_Init(ctx); + return ret; } diff -Nru intel-vaapi-driver-1.0.15/src/i965_drv_video.h intel-vaapi-driver-1.7.1/src/i965_drv_video.h --- intel-vaapi-driver-1.0.15/src/i965_drv_video.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_drv_video.h 2016-06-21 01:35:12.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2009 Intel Corporation + * Copyright ?2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the @@ -31,22 +31,57 @@ #define _I965_DRV_VIDEO_H_ #include +#include +#include +#include +#include +#include +#include #include +#include #include "i965_mutext.h" #include "object_heap.h" #include "intel_driver.h" +#include "i965_fourcc.h" -#define I965_MAX_PROFILES 11 +#define I965_MAX_PROFILES 20 #define I965_MAX_ENTRYPOINTS 5 -#define I965_MAX_CONFIG_ATTRIBUTES 10 -#define I965_MAX_IMAGE_FORMATS 3 -#define I965_MAX_SUBPIC_FORMATS 4 -#define I965_MAX_DISPLAY_ATTRIBUTES 4 +#define I965_MAX_CONFIG_ATTRIBUTES 32 +#define I965_MAX_IMAGE_FORMATS 10 +#define I965_MAX_SUBPIC_FORMATS 6 +#define I965_MAX_SUBPIC_SUM 4 +#define I965_MAX_SURFACE_ATTRIBUTES 16 #define INTEL_STR_DRIVER_VENDOR "Intel" #define INTEL_STR_DRIVER_NAME "i965" +#define I965_SURFACE_TYPE_IMAGE 0 +#define I965_SURFACE_TYPE_SURFACE 1 + +#define I965_SURFACE_FLAG_FRAME 0x00000000 +#define I965_SURFACE_FLAG_TOP_FIELD_FIRST 0x00000001 +#define I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST 0x00000002 + +#define DEFAULT_BRIGHTNESS 0 +#define DEFAULT_CONTRAST 50 +#define DEFAULT_HUE 0 +#define DEFAULT_SATURATION 50 + +#define ENCODER_QUALITY_RANGE 2 +#define ENCODER_DEFAULT_QUALITY 1 +#define ENCODER_HIGH_QUALITY ENCODER_DEFAULT_QUALITY +#define ENCODER_LOW_QUALITY 2 + +#define ENCODER_LP_QUALITY_RANGE 8 + +struct i965_surface +{ + struct object_base *base; + int type; + int flags; +}; + struct i965_kernel { char *name; @@ -54,6 +89,7 @@ const uint32_t (*bin)[4]; int size; dri_bo *bo; + unsigned int kernel_offset; }; struct buffer_store @@ -71,53 +107,136 @@ VAEntrypoint entrypoint; VAConfigAttrib attrib_list[I965_MAX_CONFIG_ATTRIBUTES]; int num_attribs; + + VAGenericID wrapper_config; }; #define NUM_SLICES 10 +struct codec_state_base { + uint32_t chroma_formats; +}; + struct decode_state { + struct codec_state_base base; struct buffer_store *pic_param; struct buffer_store **slice_params; struct buffer_store *iq_matrix; struct buffer_store *bit_plane; + struct buffer_store *huffman_table; struct buffer_store **slice_datas; + struct buffer_store *probability_data; VASurfaceID current_render_target; int max_slice_params; int max_slice_datas; int num_slice_params; int num_slice_datas; + + struct object_surface *render_object; + struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/ }; +#define SLICE_PACKED_DATA_INDEX_TYPE 0x80000000 +#define SLICE_PACKED_DATA_INDEX_MASK 0x00FFFFFF + struct encode_state { + struct codec_state_base base; struct buffer_store *seq_param; struct buffer_store *pic_param; struct buffer_store *pic_control; struct buffer_store *iq_matrix; struct buffer_store *q_matrix; struct buffer_store **slice_params; - VASurfaceID current_render_target; + struct buffer_store *huffman_table; int max_slice_params; int num_slice_params; + + /* for ext */ + struct buffer_store *seq_param_ext; + struct buffer_store *pic_param_ext; + struct buffer_store *packed_header_param[5]; + struct buffer_store *packed_header_data[5]; + struct buffer_store **slice_params_ext; + struct buffer_store *encmb_map; + int max_slice_params_ext; + int num_slice_params_ext; + + /* Check the user-configurable packed_header attribute. + * Currently it is mainly used to check whether the packed slice_header data + * is provided by user or the driver. + * TBD: It will check for the packed SPS/PPS/MISC/RAWDATA and so on. + */ + unsigned int packed_header_flag; + /* For the packed data that needs to be inserted into video clip */ + /* currently it is mainly to track packed raw data and packed slice_header data. */ + struct buffer_store **packed_header_params_ext; + int max_packed_header_params_ext; + int num_packed_header_params_ext; + struct buffer_store **packed_header_data_ext; + int max_packed_header_data_ext; + int num_packed_header_data_ext; + + /* the index of current vps and sps ,special for HEVC*/ + int vps_sps_seq_index; + /* the index of current slice */ + int slice_index; + /* the array is determined by max_slice_params_ext */ + int max_slice_num; + /* This is to store the first index of packed data for one slice */ + int *slice_rawdata_index; + /* This is to store the number of packed data for one slice. + * Both packed rawdata and slice_header data are tracked by this + * this variable. That is to say: When one packed slice_header is parsed, + * this variable will also be increased. + */ + int *slice_rawdata_count; + + /* This is to store the index of packed slice header for one slice */ + int *slice_header_index; + + int last_packed_header_type; + + struct buffer_store *misc_param[16]; + + VASurfaceID current_render_target; + struct object_surface *input_yuv_object; + struct object_surface *reconstructed_object; + struct object_buffer *coded_buf_object; + struct object_surface *reference_objects[16]; /* Up to 2 reference surfaces are valid for MPEG-2,*/ +}; + +struct proc_state +{ + struct codec_state_base base; + struct buffer_store *pipeline_param; + + VASurfaceID current_render_target; }; #define CODEC_DEC 0 #define CODEC_ENC 1 +#define CODEC_PROC 2 union codec_state { - struct decode_state dec; - struct encode_state enc; + struct codec_state_base base; + struct decode_state decode; + struct encode_state encode; + struct proc_state proc; }; struct hw_context { - void (*run)(VADriverContextP ctx, - VAProfile profile, - union codec_state *codec_state, - struct hw_context *hw_context); + VAStatus (*run)(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context); void (*destroy)(void *); + VAStatus (*get_status)(VADriverContextP ctx, + struct hw_context *hw_context, + void *buffer); struct intel_batchbuffer *batch; }; @@ -125,7 +244,7 @@ { struct object_base base; VAContextID context_id; - VAConfigID config_id; + struct object_config *obj_config; VASurfaceID *render_targets; //input->encode, output->decode int num_render_targets; int picture_width; @@ -134,33 +253,52 @@ int codec_type; union codec_state codec_state; struct hw_context *hw_context; + + VAGenericID wrapper_context; }; #define SURFACE_REFERENCED (1 << 0) -#define SURFACE_DISPLAYED (1 << 1) #define SURFACE_DERIVED (1 << 2) -#define SURFACE_REF_DIS_MASK ((SURFACE_REFERENCED) | \ - (SURFACE_DISPLAYED)) #define SURFACE_ALL_MASK ((SURFACE_REFERENCED) | \ - (SURFACE_DISPLAYED) | \ (SURFACE_DERIVED)) struct object_surface { struct object_base base; VASurfaceStatus status; - VASubpictureID subpic; - int width; - int height; + VASubpictureID subpic[I965_MAX_SUBPIC_SUM]; + struct object_subpic *obj_subpic[I965_MAX_SUBPIC_SUM]; + unsigned int subpic_render_idx; + + int width; /* the pitch of plane 0 in bytes in horizontal direction */ + int height; /* the pitch of plane 0 in bytes in vertical direction */ int size; - int orig_width; - int orig_height; + int orig_width; /* the width of plane 0 in pixels */ + int orig_height; /* the height of plane 0 in pixels */ int flags; unsigned int fourcc; dri_bo *bo; + unsigned int expected_format; VAImageID locked_image_id; + VAImageID derived_image_id; void (*free_private_data)(void **data); void *private_data; + unsigned int subsampling; + int x_cb_offset; + int y_cb_offset; + int x_cr_offset; + int y_cr_offset; + int cb_cr_width; + int cb_cr_height; + int cb_cr_pitch; + /* user specified attributes see: VASurfaceAttribExternalBuffers/VA_SURFACE_ATTRIB_MEM_TYPE_VA */ + uint32_t user_disable_tiling : 1; + uint32_t user_h_stride_set : 1; + uint32_t user_v_stride_set : 1; + + VAGenericID wrapper_surface; + + int exported_primefd; }; struct object_buffer @@ -171,6 +309,13 @@ int num_elements; int size_element; VABufferType type; + + /* Export state */ + unsigned int export_refcount; + VABufferInfo export_state; + + VAGenericID wrapper_buffer; + VAContextID context_id; }; struct object_image @@ -186,20 +331,81 @@ { struct object_base base; VAImageID image; + struct object_image *obj_image; VARectangle src_rect; VARectangle dst_rect; unsigned int format; int width; int height; int pitch; + float global_alpha; dri_bo *bo; unsigned int flags; }; +#define I965_RING_NULL 0 +#define I965_RING_BSD 1 +#define I965_RING_BLT 2 +#define I965_RING_VEBOX 3 + +struct i965_filter +{ + VAProcFilterType type; + int ring; +}; + struct hw_codec_info { - struct hw_context *(*dec_hw_context_init)(VADriverContextP, VAProfile); - struct hw_context *(*enc_hw_context_init)(VADriverContextP, VAProfile); + struct hw_context *(*dec_hw_context_init)(VADriverContextP, struct object_config *); + struct hw_context *(*enc_hw_context_init)(VADriverContextP, struct object_config *); + struct hw_context *(*proc_hw_context_init)(VADriverContextP, struct object_config *); + bool (*render_init)(VADriverContextP); + void (*post_processing_context_init)(VADriverContextP, void *, struct intel_batchbuffer *); + void (*preinit_hw_codec)(VADriverContextP, struct hw_codec_info *); + + int max_width; + int max_height; + int min_linear_wpitch; + int min_linear_hpitch; + + unsigned int h264_mvc_dec_profiles; + unsigned int vp9_dec_profiles; + + unsigned int h264_dec_chroma_formats; + unsigned int jpeg_dec_chroma_formats; + unsigned int jpeg_enc_chroma_formats; + unsigned int hevc_dec_chroma_formats; + unsigned int vp9_dec_chroma_formats; + + unsigned int has_mpeg2_decoding:1; + unsigned int has_mpeg2_encoding:1; + unsigned int has_h264_decoding:1; + unsigned int has_h264_encoding:1; + unsigned int has_vc1_decoding:1; + unsigned int has_vc1_encoding:1; + unsigned int has_jpeg_decoding:1; + unsigned int has_jpeg_encoding:1; + unsigned int has_vpp:1; + unsigned int has_accelerated_getimage:1; + unsigned int has_accelerated_putimage:1; + unsigned int has_tiled_surface:1; + unsigned int has_di_motion_adptive:1; + unsigned int has_di_motion_compensated:1; + unsigned int has_vp8_decoding:1; + unsigned int has_vp8_encoding:1; + unsigned int has_h264_mvc_encoding:1; + unsigned int has_hevc_decoding:1; + unsigned int has_hevc_encoding:1; + unsigned int has_hevc10_decoding:1; + unsigned int has_vp9_decoding:1; + unsigned int has_vpp_p010:1; + unsigned int has_lp_h264_encoding:1; + unsigned int has_vp9_encoding:1; + + unsigned int lp_h264_brc_mode; + + unsigned int num_filters; + struct i965_filter filters[VAProcFilterCount]; }; @@ -217,10 +423,29 @@ struct hw_codec_info *codec_info; _I965Mutex render_mutex; + _I965Mutex pp_mutex; struct intel_batchbuffer *batch; + struct intel_batchbuffer *pp_batch; struct i965_render_state render_state; void *pp_context; char va_vendor[256]; + + VADisplayAttribute *display_attributes; + unsigned int num_display_attributes; + VADisplayAttribute *rotation_attrib; + VADisplayAttribute *brightness_attrib; + VADisplayAttribute *contrast_attrib; + VADisplayAttribute *hue_attrib; + VADisplayAttribute *saturation_attrib; + VAContextID current_context_id; + + /* VA/DRI (X11) specific data */ + struct va_dri_output *dri_output; + + /* VA/Wayland specific data */ + struct va_wl_output *wl_output; + + VADriverContextP wrapper_pdrvctx; }; #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap); @@ -249,10 +474,82 @@ return (struct i965_driver_data *)(ctx->pDriverData); } -void +VAStatus i965_check_alloc_surface_bo(VADriverContextP ctx, struct object_surface *obj_surface, int tiled, - unsigned int fourcc); + unsigned int fourcc, + unsigned int subsampling); + +int +va_enc_packed_type_to_idx(int packed_type); + +/* reserve 2 byte for internal using */ +#define CODEC_H264 0 +#define CODEC_MPEG2 1 +#define CODEC_H264_MVC 2 +#define CODEC_JPEG 3 +#define CODEC_VP8 4 +#define CODEC_HEVC 5 +#define CODEC_VP9 6 + +#define H264_DELIMITER0 0x00 +#define H264_DELIMITER1 0x00 +#define H264_DELIMITER2 0x00 +#define H264_DELIMITER3 0x00 +#define H264_DELIMITER4 0x00 + +#define MPEG2_DELIMITER0 0x00 +#define MPEG2_DELIMITER1 0x00 +#define MPEG2_DELIMITER2 0x00 +#define MPEG2_DELIMITER3 0x00 +#define MPEG2_DELIMITER4 0xb0 + +#define HEVC_DELIMITER0 0x00 +#define HEVC_DELIMITER1 0x00 +#define HEVC_DELIMITER2 0x00 +#define HEVC_DELIMITER3 0x00 +#define HEVC_DELIMITER4 0x00 + +struct i965_coded_buffer_segment +{ + union { + VACodedBufferSegment base; + unsigned char pad0[64]; /* change the size if sizeof(VACodedBufferSegment) > 64 */ + }; + + unsigned int mapped; + unsigned int codec; + unsigned int status_support; + unsigned int pad1; + + unsigned int codec_private_data[512]; /* Store codec private data, must be 16-bytes aligned */ +}; + +#define I965_CODEDBUFFER_HEADER_SIZE ALIGN(sizeof(struct i965_coded_buffer_segment), 0x1000) + +extern VAStatus i965_MapBuffer(VADriverContextP ctx, + VABufferID buf_id, /* in */ + void **pbuf); /* out */ + +extern VAStatus i965_UnmapBuffer(VADriverContextP ctx, VABufferID buf_id); + +extern VAStatus i965_DestroySurfaces(VADriverContextP ctx, + VASurfaceID *surface_list, + int num_surfaces); + +extern VAStatus i965_CreateSurfaces(VADriverContextP ctx, + int width, + int height, + int format, + int num_surfaces, + VASurfaceID *surfaces); + +#define I965_SURFACE_MEM_NATIVE 0 +#define I965_SURFACE_MEM_GEM_FLINK 1 +#define I965_SURFACE_MEM_DRM_PRIME 2 + +void +i965_destroy_surface_storage(struct object_surface *obj_surface); #endif /* _I965_DRV_VIDEO_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_encoder.c intel-vaapi-driver-1.7.1/src/i965_encoder.c --- intel-vaapi-driver-1.0.15/src/i965_encoder.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_encoder.c 2016-06-17 01:56:44.000000000 +0000 @@ -31,53 +31,877 @@ #include #include -#include - #include "intel_batchbuffer.h" #include "intel_driver.h" #include "i965_defines.h" #include "i965_drv_video.h" #include "i965_encoder.h" +#include "gen6_vme.h" +#include "gen6_mfc.h" +#include "gen9_mfc.h" +#include "gen9_vdenc.h" + +#include "gen9_vp9_encapi.h" + +extern Bool gen6_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); +extern Bool gen6_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); +extern Bool gen7_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); +extern Bool gen9_hcpe_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context); + +static VAStatus +intel_encoder_check_yuv_surface(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_surface src_surface, dst_surface; + struct object_surface *obj_surface; + VAStatus status; + VARectangle rect; + + /* releae the temporary surface */ + if (encoder_context->is_tmp_id) { + i965_DestroySurfaces(ctx, &encoder_context->input_yuv_surface, 1); + encode_state->input_yuv_object = NULL; + } + + encoder_context->is_tmp_id = 0; + obj_surface = SURFACE(encode_state->current_render_target); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if (obj_surface->fourcc == VA_FOURCC_NV12) { + unsigned int tiling = 0, swizzle = 0; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling == I915_TILING_Y) { + encoder_context->input_yuv_surface = encode_state->current_render_target; + encode_state->input_yuv_object = obj_surface; + return VA_STATUS_SUCCESS; + } + } + + rect.x = 0; + rect.y = 0; + rect.width = obj_surface->orig_width; + rect.height = obj_surface->orig_height; + + src_surface.base = (struct object_base *)obj_surface; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + + status = i965_CreateSurfaces(ctx, + obj_surface->orig_width, + obj_surface->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &encoder_context->input_yuv_surface); + assert(status == VA_STATUS_SUCCESS); + + if (status != VA_STATUS_SUCCESS) + return status; + + obj_surface = SURFACE(encoder_context->input_yuv_surface); + encode_state->input_yuv_object = obj_surface; + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + status = i965_image_processing(ctx, + &src_surface, + &rect, + &dst_surface, + &rect); + assert(status == VA_STATUS_SUCCESS); + + encoder_context->is_tmp_id = 1; + + return VA_STATUS_SUCCESS; +} + + +static VAStatus +intel_encoder_check_jpeg_yuv_surface(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_surface src_surface, dst_surface; + struct object_surface *obj_surface; + VAStatus status; + VARectangle rect; + int format=0, fourcc=0, subsample=0; + + /* releae the temporary surface */ + if (encoder_context->is_tmp_id) { + i965_DestroySurfaces(ctx, &encoder_context->input_yuv_surface, 1); + encode_state->input_yuv_object = NULL; + } + + encoder_context->is_tmp_id = 0; + obj_surface = SURFACE(encode_state->current_render_target); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + unsigned int tiling = 0, swizzle = 0; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + if (tiling == I915_TILING_Y) { + if( (obj_surface->fourcc==VA_FOURCC_NV12) || (obj_surface->fourcc==VA_FOURCC_UYVY) || + (obj_surface->fourcc==VA_FOURCC_YUY2) || (obj_surface->fourcc==VA_FOURCC_Y800) || + (obj_surface->fourcc==VA_FOURCC_RGBA) || (obj_surface->fourcc==VA_FOURCC_444P) ) { + encoder_context->input_yuv_surface = encode_state->current_render_target; + encode_state->input_yuv_object = obj_surface; + return VA_STATUS_SUCCESS; + } + } + + rect.x = 0; + rect.y = 0; + rect.width = obj_surface->orig_width; + rect.height = obj_surface->orig_height; + + src_surface.base = (struct object_base *)obj_surface; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + + switch( obj_surface->fourcc) { + + case VA_FOURCC_YUY2: + fourcc = VA_FOURCC_YUY2; + format = VA_RT_FORMAT_YUV422; + subsample = SUBSAMPLE_YUV422H; + break; + + case VA_FOURCC_UYVY: + fourcc = VA_FOURCC_UYVY; + format = VA_RT_FORMAT_YUV422; + subsample = SUBSAMPLE_YUV422H; + break; + + case VA_FOURCC_Y800: + fourcc = VA_FOURCC_Y800; + format = VA_RT_FORMAT_YUV400; + subsample = SUBSAMPLE_YUV400; + break; + + case VA_FOURCC_444P: + fourcc = VA_FOURCC_444P; + format = VA_RT_FORMAT_YUV444; + subsample = SUBSAMPLE_YUV444; + break; + + case VA_FOURCC_RGBA: + fourcc = VA_FOURCC_RGBA; + format = VA_RT_FORMAT_RGB32; + subsample = SUBSAMPLE_RGBX; + break; + + default: //All other scenarios will have NV12 format + fourcc = VA_FOURCC_NV12; + format = VA_RT_FORMAT_YUV420; + subsample = SUBSAMPLE_YUV420; + break; + } + + status = i965_CreateSurfaces(ctx, + obj_surface->orig_width, + obj_surface->orig_height, + format, + 1, + &encoder_context->input_yuv_surface); + assert(status == VA_STATUS_SUCCESS); + + if (status != VA_STATUS_SUCCESS) + return status; + + obj_surface = SURFACE(encoder_context->input_yuv_surface); + encode_state->input_yuv_object = obj_surface; + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 1, fourcc, subsample); + + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + //The Y800 format is expected to be tiled. + //Linear Y800 is a corner case and needs code in the i965_image_processing. + if(obj_surface->fourcc != VA_FOURCC_Y800){ + status = i965_image_processing(ctx, + &src_surface, + &rect, + &dst_surface, + &rect); + assert(status == VA_STATUS_SUCCESS); + } + + encoder_context->is_tmp_id = 1; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +intel_encoder_check_misc_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + + if (encode_state->misc_param[VAEncMiscParameterTypeQualityLevel] && + encode_state->misc_param[VAEncMiscParameterTypeQualityLevel]->buffer) { + VAEncMiscParameterBuffer* pMiscParam = (VAEncMiscParameterBuffer*)encode_state->misc_param[VAEncMiscParameterTypeQualityLevel]->buffer; + VAEncMiscParameterBufferQualityLevel* param_quality_level = (VAEncMiscParameterBufferQualityLevel*)pMiscParam->data; + encoder_context->quality_level = param_quality_level->quality_level; + + if (encoder_context->quality_level == 0) + encoder_context->quality_level = ENCODER_DEFAULT_QUALITY; + else if (encoder_context->quality_level > encoder_context->quality_range) + goto error; + } + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_encoder_check_avc_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer; + int i; + + assert(!(pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID)); + + if (pic_param->CurrPic.flags & VA_PICTURE_H264_INVALID) + goto error; + + obj_surface = SURFACE(pic_param->CurrPic.picture_id); + assert(obj_surface); /* It is possible the store buffer isn't allocated yet */ + + if (!obj_surface) + goto error; + + encode_state->reconstructed_object = obj_surface; + obj_buffer = BUFFER(pic_param->coded_buf); + assert(obj_buffer && obj_buffer->buffer_store && obj_buffer->buffer_store->bo); + + if (!obj_buffer || !obj_buffer->buffer_store || !obj_buffer->buffer_store->bo) + goto error; + + encode_state->coded_buf_object = obj_buffer; + + for (i = 0; i < 16; i++) { + if (pic_param->ReferenceFrames[i].flags & VA_PICTURE_H264_INVALID || + pic_param->ReferenceFrames[i].picture_id == VA_INVALID_SURFACE) + break; + else { + obj_surface = SURFACE(pic_param->ReferenceFrames[i].picture_id); + assert(obj_surface); + + if (!obj_surface) + goto error; + + if (obj_surface->bo) + encode_state->reference_objects[i] = obj_surface; + else + encode_state->reference_objects[i] = NULL; /* FIXME: Warning or Error ??? */ + } + } + + for ( ; i < 16; i++) + encode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_encoder_check_mpeg2_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAEncPictureParameterBufferMPEG2 *pic_param = (VAEncPictureParameterBufferMPEG2 *)encode_state->pic_param_ext->buffer; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + int i = 0; + + obj_surface = SURFACE(pic_param->reconstructed_picture); + assert(obj_surface); /* It is possible the store buffer isn't allocated yet */ + + if (!obj_surface) + goto error; + + encode_state->reconstructed_object = obj_surface; + obj_buffer = BUFFER(pic_param->coded_buf); + assert(obj_buffer && obj_buffer->buffer_store && obj_buffer->buffer_store->bo); + + if (!obj_buffer || !obj_buffer->buffer_store || !obj_buffer->buffer_store->bo) + goto error; + + encode_state->coded_buf_object = obj_buffer; + + if (pic_param->picture_type == VAEncPictureTypeIntra) { + } else if (pic_param->picture_type == VAEncPictureTypePredictive) { + assert(pic_param->forward_reference_picture != VA_INVALID_SURFACE); + obj_surface = SURFACE(pic_param->forward_reference_picture); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + goto error; + + encode_state->reference_objects[i++] = obj_surface; + } else if (pic_param->picture_type == VAEncPictureTypeBidirectional) { + assert(pic_param->forward_reference_picture != VA_INVALID_SURFACE); + obj_surface = SURFACE(pic_param->forward_reference_picture); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + goto error; + + encode_state->reference_objects[i++] = obj_surface; + + assert(pic_param->backward_reference_picture != VA_INVALID_SURFACE); + obj_surface = SURFACE(pic_param->backward_reference_picture); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + goto error; + + encode_state->reference_objects[i++] = obj_surface; + } else + goto error; + + for ( ; i < 16; i++) + encode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_encoder_check_jpeg_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_buffer *obj_buffer; + VAEncPictureParameterBufferJPEG *pic_param = (VAEncPictureParameterBufferJPEG *)encode_state->pic_param_ext->buffer; + + + assert(!(pic_param->pic_flags.bits.profile)); //Baseline profile is 0. + + obj_buffer = BUFFER(pic_param->coded_buf); + assert(obj_buffer && obj_buffer->buffer_store && obj_buffer->buffer_store->bo); + + if (!obj_buffer || !obj_buffer->buffer_store || !obj_buffer->buffer_store->bo) + goto error; + + encode_state->coded_buf_object = obj_buffer; + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_encoder_check_vp8_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAEncPictureParameterBufferVP8 *pic_param = (VAEncPictureParameterBufferVP8 *)encode_state->pic_param_ext->buffer; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + int i = 0; + int is_key_frame = !pic_param->pic_flags.bits.frame_type; + + obj_surface = SURFACE(pic_param->reconstructed_frame); + assert(obj_surface); /* It is possible the store buffer isn't allocated yet */ + + if (!obj_surface) + goto error; + + encode_state->reconstructed_object = obj_surface; + obj_buffer = BUFFER(pic_param->coded_buf); + assert(obj_buffer && obj_buffer->buffer_store && obj_buffer->buffer_store->bo); + + if (!obj_buffer || !obj_buffer->buffer_store || !obj_buffer->buffer_store->bo) + goto error; + + encode_state->coded_buf_object = obj_buffer; + + if (!is_key_frame) { + assert(pic_param->ref_last_frame != VA_INVALID_SURFACE); + obj_surface = SURFACE(pic_param->ref_last_frame); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + goto error; + + encode_state->reference_objects[i++] = obj_surface; + + assert(pic_param->ref_gf_frame != VA_INVALID_SURFACE); + obj_surface = SURFACE(pic_param->ref_gf_frame); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + goto error; + + encode_state->reference_objects[i++] = obj_surface; + + assert(pic_param->ref_arf_frame != VA_INVALID_SURFACE); + obj_surface = SURFACE(pic_param->ref_arf_frame); + assert(obj_surface && obj_surface->bo); + + if (!obj_surface || !obj_surface->bo) + goto error; + + encode_state->reference_objects[i++] = obj_surface; + } + + for ( ; i < 16; i++) + encode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + +static VAStatus +intel_encoder_check_hevc_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + VAEncPictureParameterBufferHEVC *pic_param = (VAEncPictureParameterBufferHEVC *)encode_state->pic_param_ext->buffer; + VAEncSliceParameterBufferHEVC *slice_param; + int i; + + assert(!(pic_param->decoded_curr_pic.flags & VA_PICTURE_HEVC_INVALID)); + + if (pic_param->decoded_curr_pic.flags & VA_PICTURE_HEVC_INVALID) + goto error; + + obj_surface = SURFACE(pic_param->decoded_curr_pic.picture_id); + assert(obj_surface); /* It is possible the store buffer isn't allocated yet */ + + if (!obj_surface) + goto error; + + encode_state->reconstructed_object = obj_surface; + obj_buffer = BUFFER(pic_param->coded_buf); + assert(obj_buffer && obj_buffer->buffer_store && obj_buffer->buffer_store->bo); + + if (!obj_buffer || !obj_buffer->buffer_store || !obj_buffer->buffer_store->bo) + goto error; + + encode_state->coded_buf_object = obj_buffer; + + for (i = 0; i < 15; i++) { + if (pic_param->reference_frames[i].flags & VA_PICTURE_HEVC_INVALID || + pic_param->reference_frames[i].picture_id == VA_INVALID_SURFACE) + break; + else { + obj_surface = SURFACE(pic_param->reference_frames[i].picture_id); + assert(obj_surface); + + if (!obj_surface) + goto error; + + if (obj_surface->bo) + encode_state->reference_objects[i] = obj_surface; + else + encode_state->reference_objects[i] = NULL; /* FIXME: Warning or Error ??? */ + } + } + + for ( ; i < 15; i++) + encode_state->reference_objects[i] = NULL; + + for (i = 0; i < encode_state->num_slice_params_ext; i++) { + slice_param = (VAEncSliceParameterBufferHEVC *)encode_state->slice_params_ext[i]->buffer; + + if (slice_param->slice_type != HEVC_SLICE_I && + slice_param->slice_type != HEVC_SLICE_P && + slice_param->slice_type != HEVC_SLICE_B) + goto error; + + /* TODO: add more check here */ + } + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} -static void -gen6_encoder_end_picture(VADriverContextP ctx, - VAProfile profile, - union codec_state *codec_state, - struct hw_context *hw_context) +static VAStatus +intel_encoder_check_vp9_parameter(VADriverContextP ctx, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAEncPictureParameterBufferVP9 *pic_param; + struct object_surface *obj_surface; + struct object_buffer *obj_buffer; + int i = 0; + int is_key_frame = 0; + int index; + + if (encode_state->pic_param_ext == NULL || + encode_state->pic_param_ext->buffer == NULL) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + pic_param = (VAEncPictureParameterBufferVP9 *)encode_state->pic_param_ext->buffer; + + obj_surface = SURFACE(pic_param->reconstructed_frame); + + if (!obj_surface) + goto error; + + encode_state->reconstructed_object = obj_surface; + obj_buffer = BUFFER(pic_param->coded_buf); + + if (!obj_buffer || !obj_buffer->buffer_store || !obj_buffer->buffer_store->bo) + goto error; + + encode_state->coded_buf_object = obj_buffer; + + is_key_frame = !pic_param->pic_flags.bits.frame_type; + if (!is_key_frame && !pic_param->pic_flags.bits.intra_only) { + /* slot 0 is for last reference frame */ + index = pic_param->ref_flags.bits.ref_last_idx; + obj_surface = SURFACE(pic_param->reference_frames[index]); + if (obj_surface && obj_surface->bo) + encode_state->reference_objects[i++] = obj_surface; + else + encode_state->reference_objects[i++] = NULL; + + /* slot 1 is for golden reference frame */ + index = pic_param->ref_flags.bits.ref_gf_idx; + obj_surface = SURFACE(pic_param->reference_frames[index]); + if (obj_surface && obj_surface->bo) + encode_state->reference_objects[i++] = obj_surface; + else + encode_state->reference_objects[i++] = NULL; + + /* slot 2 is alt reference frame */ + index = pic_param->ref_flags.bits.ref_arf_idx; + obj_surface = SURFACE(pic_param->reference_frames[index]); + if (obj_surface && obj_surface->bo) + encode_state->reference_objects[i++] = obj_surface; + else + encode_state->reference_objects[i++] = NULL; + } + + for ( ; i < 16; i++) + encode_state->reference_objects[i] = NULL; + + return VA_STATUS_SUCCESS; + +error: + return VA_STATUS_ERROR_INVALID_PARAMETER; +} + + +static VAStatus +intel_encoder_sanity_check_input(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context) { - struct gen6_encoder_context *gen6_encoder_context = (struct gen6_encoder_context *)hw_context; - struct encode_state *encode_state = &codec_state->enc; VAStatus vaStatus; - vaStatus = gen6_vme_pipeline(ctx, profile, encode_state, gen6_encoder_context); + switch (profile) { + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + case VAProfileH264MultiviewHigh: + case VAProfileH264StereoHigh: { + vaStatus = intel_encoder_check_avc_parameter(ctx, encode_state, encoder_context); + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + vaStatus = intel_encoder_check_yuv_surface(ctx, profile, encode_state, encoder_context); + break; + } + + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: { + vaStatus = intel_encoder_check_mpeg2_parameter(ctx, encode_state, encoder_context); + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + vaStatus = intel_encoder_check_yuv_surface(ctx, profile, encode_state, encoder_context); + break; + } + + case VAProfileJPEGBaseline: { + vaStatus = intel_encoder_check_jpeg_parameter(ctx, encode_state, encoder_context); + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + vaStatus = intel_encoder_check_jpeg_yuv_surface(ctx, profile, encode_state, encoder_context); + break; + } + + case VAProfileVP8Version0_3: { + vaStatus = intel_encoder_check_vp8_parameter(ctx, encode_state, encoder_context); + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + vaStatus = intel_encoder_check_yuv_surface(ctx, profile, encode_state, encoder_context); + break; + } + + case VAProfileHEVCMain: { + vaStatus = intel_encoder_check_hevc_parameter(ctx, encode_state, encoder_context); + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + vaStatus = intel_encoder_check_yuv_surface(ctx, profile, encode_state, encoder_context); + break; + } + + case VAProfileVP9Profile0: { + vaStatus = intel_encoder_check_vp9_parameter(ctx, encode_state, encoder_context); + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + break; + } + default: + vaStatus = VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + break; + } if (vaStatus == VA_STATUS_SUCCESS) - gen6_mfc_pipeline(ctx, profile, encode_state, gen6_encoder_context); + vaStatus = intel_encoder_check_misc_parameter(ctx, encode_state, encoder_context); + +out: + return vaStatus; } + +static VAStatus +intel_encoder_end_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) +{ + struct intel_encoder_context *encoder_context = (struct intel_encoder_context *)hw_context; + struct encode_state *encode_state = &codec_state->encode; + VAStatus vaStatus; + + vaStatus = intel_encoder_sanity_check_input(ctx, profile, encode_state, encoder_context); + + if (vaStatus != VA_STATUS_SUCCESS) + return vaStatus; + + encoder_context->mfc_brc_prepare(encode_state, encoder_context); + + if((encoder_context->vme_context && encoder_context->vme_pipeline)) { + vaStatus = encoder_context->vme_pipeline(ctx, profile, encode_state, encoder_context); + } + + if (vaStatus == VA_STATUS_SUCCESS) + encoder_context->mfc_pipeline(ctx, profile, encode_state, encoder_context); + return VA_STATUS_SUCCESS; +} + static void -gen6_encoder_context_destroy(void *hw_context) +intel_encoder_context_destroy(void *hw_context) { - struct gen6_encoder_context *gen6_encoder_context = (struct gen6_encoder_context *)hw_context; + struct intel_encoder_context *encoder_context = (struct intel_encoder_context *)hw_context; + + encoder_context->mfc_context_destroy(encoder_context->mfc_context); - gen6_mfc_context_destroy(&gen6_encoder_context->mfc_context); - gen6_vme_context_destroy(&gen6_encoder_context->vme_context); - intel_batchbuffer_free(gen6_encoder_context->base.batch); - free(gen6_encoder_context); + if (encoder_context->vme_context_destroy && encoder_context->vme_context) + encoder_context->vme_context_destroy(encoder_context->vme_context); + + if (encoder_context->enc_priv_state) { + free(encoder_context->enc_priv_state); + encoder_context->enc_priv_state = NULL; + } + + intel_batchbuffer_free(encoder_context->base.batch); + free(encoder_context); } -struct hw_context * -gen6_enc_hw_context_init(VADriverContextP ctx, VAProfile profile) + +static VAStatus +intel_encoder_get_status(VADriverContextP ctx, struct hw_context *hw_context, void *buffer) +{ + struct intel_encoder_context *encoder_context = (struct intel_encoder_context *)hw_context; + struct i965_coded_buffer_segment *coded_buffer_segment = (struct i965_coded_buffer_segment *)buffer; + + if (encoder_context->get_status) + return encoder_context->get_status(ctx, encoder_context, coded_buffer_segment); + + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +typedef Bool (* hw_init_func)(VADriverContextP, struct intel_encoder_context *); + +static struct hw_context * +intel_enc_hw_context_init(VADriverContextP ctx, + struct object_config *obj_config, + hw_init_func vme_context_init, + hw_init_func mfc_context_init) { struct intel_driver_data *intel = intel_driver_data(ctx); - struct gen6_encoder_context *gen6_encoder_context = calloc(1, sizeof(struct gen6_encoder_context)); + struct intel_encoder_context *encoder_context = calloc(1, sizeof(struct intel_encoder_context)); + int i; + + assert(encoder_context); + encoder_context->base.destroy = intel_encoder_context_destroy; + encoder_context->base.run = intel_encoder_end_picture; + encoder_context->base.get_status = intel_encoder_get_status; + encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); + encoder_context->input_yuv_surface = VA_INVALID_SURFACE; + encoder_context->is_tmp_id = 0; + encoder_context->low_power_mode = 0; + encoder_context->rate_control_mode = VA_RC_NONE; + encoder_context->quality_level = ENCODER_DEFAULT_QUALITY; + encoder_context->quality_range = 1; + + switch (obj_config->profile) { + case VAProfileMPEG2Simple: + case VAProfileMPEG2Main: + encoder_context->codec = CODEC_MPEG2; + break; + + case VAProfileH264ConstrainedBaseline: + case VAProfileH264Main: + case VAProfileH264High: + encoder_context->codec = CODEC_H264; + + if (obj_config->entrypoint == VAEntrypointEncSliceLP) + encoder_context->quality_range = ENCODER_LP_QUALITY_RANGE; + else + encoder_context->quality_range = ENCODER_QUALITY_RANGE; + break; + + case VAProfileH264StereoHigh: + case VAProfileH264MultiviewHigh: + encoder_context->codec = CODEC_H264_MVC; + break; + + case VAProfileJPEGBaseline: + encoder_context->codec = CODEC_JPEG; + break; + + case VAProfileVP8Version0_3: + encoder_context->codec = CODEC_VP8; + break; + + case VAProfileHEVCMain: + encoder_context->codec = CODEC_HEVC; + break; + + case VAProfileVP9Profile0: + encoder_context->codec = CODEC_VP9; + break; + + default: + /* Never get here */ + assert(0); + break; + } + + for (i = 0; i < obj_config->num_attribs; i++) { + if (obj_config->attrib_list[i].type == VAConfigAttribRateControl) { + encoder_context->rate_control_mode = obj_config->attrib_list[i].value; + + if (encoder_context->codec == CODEC_MPEG2 && + encoder_context->rate_control_mode & VA_RC_CBR) { + WARN_ONCE("Don't support CBR for MPEG-2 encoding\n"); + encoder_context->rate_control_mode &= ~VA_RC_CBR; + } + + break; + } + } + + if (vme_context_init) { + vme_context_init(ctx, encoder_context); + + if (obj_config->profile != VAProfileJPEGBaseline) { + assert(encoder_context->vme_context); + assert(encoder_context->vme_context_destroy); + assert(encoder_context->vme_pipeline); + } + } else { + encoder_context->low_power_mode = 1; + } + + mfc_context_init(ctx, encoder_context); + assert(encoder_context->mfc_context); + assert(encoder_context->mfc_context_destroy); + assert(encoder_context->mfc_pipeline); + + return (struct hw_context *)encoder_context; +} + +struct hw_context * +gen6_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + return intel_enc_hw_context_init(ctx, obj_config, gen6_vme_context_init, gen6_mfc_context_init); +} + +struct hw_context * +gen7_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + + return intel_enc_hw_context_init(ctx, obj_config, gen7_vme_context_init, gen7_mfc_context_init); +} - gen6_encoder_context->base.destroy = gen6_encoder_context_destroy; - gen6_encoder_context->base.run = gen6_encoder_end_picture; - gen6_encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); +struct hw_context * +gen75_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + return intel_enc_hw_context_init(ctx, obj_config, gen75_vme_context_init, gen75_mfc_context_init); +} - gen6_vme_context_init(ctx, &gen6_encoder_context->vme_context); - gen6_mfc_context_init(ctx, &gen6_encoder_context->mfc_context); +struct hw_context * +gen8_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + return intel_enc_hw_context_init(ctx, obj_config, gen8_vme_context_init, gen8_mfc_context_init); +} - return (struct hw_context *)gen6_encoder_context; +struct hw_context * +gen9_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) +{ + if (obj_config->entrypoint == VAEntrypointEncSliceLP) { + return intel_enc_hw_context_init(ctx, obj_config, NULL, gen9_vdenc_context_init); + } else { + if (obj_config->profile == VAProfileHEVCMain) { + return intel_enc_hw_context_init(ctx, obj_config, gen9_vme_context_init, gen9_hcpe_context_init); + } else if (obj_config->profile == VAProfileJPEGBaseline) + return intel_enc_hw_context_init(ctx, obj_config, gen8_vme_context_init, gen8_mfc_context_init); + else if (obj_config->profile == VAProfileVP9Profile0) + return intel_enc_hw_context_init(ctx, obj_config, + gen9_vp9_vme_context_init, + gen9_vp9_pak_context_init); + else + return intel_enc_hw_context_init(ctx, obj_config, gen9_vme_context_init, gen9_mfc_context_init); + } } diff -Nru intel-vaapi-driver-1.0.15/src/i965_encoder.h intel-vaapi-driver-1.7.1/src/i965_encoder.h --- intel-vaapi-driver-1.0.15/src/i965_encoder.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_encoder.h 2016-06-17 01:56:44.000000000 +0000 @@ -29,23 +29,69 @@ #ifndef _I965_ENCODER_H_ #define _I965_ENCODER_H_ -#include #include #include #include + #include "i965_structs.h" #include "i965_drv_video.h" -#include "gen6_vme.h" -#include "gen6_mfc.h" +#define I965_BRC_NONE 0 +#define I965_BRC_CBR 1 +#define I965_BRC_VBR 2 +#define I965_BRC_CQP 3 -struct gen6_encoder_context +struct intel_roi +{ + short left; + short right; + short top; + short bottom; + + char value; +}; + +struct intel_encoder_context { struct hw_context base; - struct gen6_vme_context vme_context; - struct gen6_mfc_context mfc_context; + int codec; + VASurfaceID input_yuv_surface; + unsigned int rate_control_mode; + unsigned int quality_level; + unsigned int quality_range; + void *vme_context; + void *mfc_context; + void *enc_priv_state; + + unsigned int is_tmp_id:1; + unsigned int low_power_mode:1; + + void (*vme_context_destroy)(void *vme_context); + VAStatus (*vme_pipeline)(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + void (*mfc_context_destroy)(void *mfc_context); + VAStatus (*mfc_pipeline)(VADriverContextP ctx, + VAProfile profile, + struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + void (*mfc_brc_prepare)(struct encode_state *encode_state, + struct intel_encoder_context *encoder_context); + + VAStatus (*get_status)(VADriverContextP ctx, + struct intel_encoder_context *encoder_context, + struct i965_coded_buffer_segment *coded_buffer_segment); }; +extern struct hw_context * +gen75_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config); + +extern struct hw_context * +gen8_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config); + +extern struct hw_context * +gen9_enc_hw_context_init(VADriverContextP ctx, struct object_config *obj_config); #endif /* _I965_ENCODER_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_encoder_utils.c intel-vaapi-driver-1.7.1/src/i965_encoder_utils.c --- intel-vaapi-driver-1.0.15/src/i965_encoder_utils.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_encoder_utils.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,1189 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include +#include + +#include +#include +#include +#include +#include +#include +#include "gen6_mfc.h" +#include "i965_encoder_utils.h" + +#define BITSTREAM_ALLOCATE_STEPPING 4096 + +#define NAL_REF_IDC_NONE 0 +#define NAL_REF_IDC_LOW 1 +#define NAL_REF_IDC_MEDIUM 2 +#define NAL_REF_IDC_HIGH 3 + +#define NAL_NON_IDR 1 +#define NAL_IDR 5 +#define NAL_SPS 7 +#define NAL_PPS 8 +#define NAL_SEI 6 + +#define SLICE_TYPE_P 0 +#define SLICE_TYPE_B 1 +#define SLICE_TYPE_I 2 + +#define IS_I_SLICE(type) (SLICE_TYPE_I == (type) || SLICE_TYPE_I == (type - 5)) +#define IS_P_SLICE(type) (SLICE_TYPE_P == (type) || SLICE_TYPE_P == (type - 5)) +#define IS_B_SLICE(type) (SLICE_TYPE_B == (type) || SLICE_TYPE_B == (type - 5)) + +#define ENTROPY_MODE_CAVLC 0 +#define ENTROPY_MODE_CABAC 1 + +#define PROFILE_IDC_BASELINE 66 +#define PROFILE_IDC_MAIN 77 +#define PROFILE_IDC_HIGH 100 + +/*HEVC*/ +#define VPS_NUT 32 +#define SPS_NUT 33 +#define PPS_NUT 34 +#define IDR_WRADL_NUT 19 +#define IDR_NLP_NUT 20 +#define SLICE_TRAIL_N_NUT 0 +#define SLICE_TRAIL_R_NUT 1 +#define PREFIX_SEI_NUT 39 +#define SUFFIX_SEI_NUT 40 + +struct __avc_bitstream { + unsigned int *buffer; + int bit_offset; + int max_size_in_dword; +}; + +typedef struct __avc_bitstream avc_bitstream; + +static unsigned int +swap32(unsigned int val) +{ + unsigned char *pval = (unsigned char *)&val; + + return ((pval[0] << 24) | + (pval[1] << 16) | + (pval[2] << 8) | + (pval[3] << 0)); +} + +static void +avc_bitstream_start(avc_bitstream *bs) +{ + bs->max_size_in_dword = BITSTREAM_ALLOCATE_STEPPING; + bs->buffer = calloc(bs->max_size_in_dword * sizeof(int), 1); + bs->bit_offset = 0; +} + +static void +avc_bitstream_end(avc_bitstream *bs) +{ + int pos = (bs->bit_offset >> 5); + int bit_offset = (bs->bit_offset & 0x1f); + int bit_left = 32 - bit_offset; + + if (bit_offset) { + bs->buffer[pos] = swap32((bs->buffer[pos] << bit_left)); + } + + // free(bs->buffer); +} + +static void +avc_bitstream_put_ui(avc_bitstream *bs, unsigned int val, int size_in_bits) +{ + int pos = (bs->bit_offset >> 5); + int bit_offset = (bs->bit_offset & 0x1f); + int bit_left = 32 - bit_offset; + + if (!size_in_bits) + return; + + if (size_in_bits < 32) + val &= (( 1 << size_in_bits) - 1); + + bs->bit_offset += size_in_bits; + + if (bit_left > size_in_bits) { + bs->buffer[pos] = (bs->buffer[pos] << size_in_bits | val); + } else { + size_in_bits -= bit_left; + bs->buffer[pos] = (bs->buffer[pos] << bit_left) | (val >> size_in_bits); + bs->buffer[pos] = swap32(bs->buffer[pos]); + + if (pos + 1 == bs->max_size_in_dword) { + bs->max_size_in_dword += BITSTREAM_ALLOCATE_STEPPING; + bs->buffer = realloc(bs->buffer, bs->max_size_in_dword * sizeof(unsigned int)); + + if (!bs->buffer) + return; + } + + bs->buffer[pos + 1] = val; + } +} + +static void +avc_bitstream_put_ue(avc_bitstream *bs, unsigned int val) +{ + int size_in_bits = 0; + int tmp_val = ++val; + + while (tmp_val) { + tmp_val >>= 1; + size_in_bits++; + } + + avc_bitstream_put_ui(bs, 0, size_in_bits - 1); // leading zero + avc_bitstream_put_ui(bs, val, size_in_bits); +} + +static void +avc_bitstream_put_se(avc_bitstream *bs, int val) +{ + unsigned int new_val; + + if (val <= 0) + new_val = -2 * val; + else + new_val = 2 * val - 1; + + avc_bitstream_put_ue(bs, new_val); +} + +static void +avc_bitstream_byte_aligning(avc_bitstream *bs, int bit) +{ + int bit_offset = (bs->bit_offset & 0x7); + int bit_left = 8 - bit_offset; + int new_val; + + if (!bit_offset) + return; + + assert(bit == 0 || bit == 1); + + if (bit) + new_val = (1 << bit_left) - 1; + else + new_val = 0; + + avc_bitstream_put_ui(bs, new_val, bit_left); +} +static void avc_rbsp_trailing_bits(avc_bitstream *bs) +{ + avc_bitstream_put_ui(bs, 1, 1); + avc_bitstream_byte_aligning(bs, 0); +} +static void nal_start_code_prefix(avc_bitstream *bs) +{ + avc_bitstream_put_ui(bs, 0x00000001, 32); +} + +static void nal_header(avc_bitstream *bs, int nal_ref_idc, int nal_unit_type) +{ + avc_bitstream_put_ui(bs, 0, 1); /* forbidden_zero_bit: 0 */ + avc_bitstream_put_ui(bs, nal_ref_idc, 2); + avc_bitstream_put_ui(bs, nal_unit_type, 5); +} + +static void +slice_header(avc_bitstream *bs, + VAEncSequenceParameterBufferH264 *sps_param, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param) +{ + int first_mb_in_slice = slice_param->macroblock_address; + + avc_bitstream_put_ue(bs, first_mb_in_slice); /* first_mb_in_slice: 0 */ + avc_bitstream_put_ue(bs, slice_param->slice_type); /* slice_type */ + avc_bitstream_put_ue(bs, slice_param->pic_parameter_set_id); /* pic_parameter_set_id: 0 */ + avc_bitstream_put_ui(bs, pic_param->frame_num, sps_param->seq_fields.bits.log2_max_frame_num_minus4 + 4); /* frame_num */ + + /* frame_mbs_only_flag == 1 */ + if (!sps_param->seq_fields.bits.frame_mbs_only_flag) { + /* FIXME: */ + assert(0); + } + + if (pic_param->pic_fields.bits.idr_pic_flag) + avc_bitstream_put_ue(bs, slice_param->idr_pic_id); /* idr_pic_id: 0 */ + + if (sps_param->seq_fields.bits.pic_order_cnt_type == 0) { + avc_bitstream_put_ui(bs, pic_param->CurrPic.TopFieldOrderCnt, sps_param->seq_fields.bits.log2_max_pic_order_cnt_lsb_minus4 + 4); + /* pic_order_present_flag == 0 */ + } else { + /* FIXME: */ + assert(0); + } + + /* redundant_pic_cnt_present_flag == 0 */ + + /* slice type */ + if (IS_P_SLICE(slice_param->slice_type)) { + avc_bitstream_put_ui(bs, slice_param->num_ref_idx_active_override_flag, 1); /* num_ref_idx_active_override_flag: */ + + if (slice_param->num_ref_idx_active_override_flag) + avc_bitstream_put_ue(bs, slice_param->num_ref_idx_l0_active_minus1); + + /* ref_pic_list_reordering */ + avc_bitstream_put_ui(bs, 0, 1); /* ref_pic_list_reordering_flag_l0: 0 */ + } else if (IS_B_SLICE(slice_param->slice_type)) { + avc_bitstream_put_ui(bs, slice_param->direct_spatial_mv_pred_flag, 1); /* direct_spatial_mv_pred: 1 */ + + avc_bitstream_put_ui(bs, slice_param->num_ref_idx_active_override_flag, 1); /* num_ref_idx_active_override_flag: */ + + if (slice_param->num_ref_idx_active_override_flag) { + avc_bitstream_put_ue(bs, slice_param->num_ref_idx_l0_active_minus1); + avc_bitstream_put_ue(bs, slice_param->num_ref_idx_l1_active_minus1); + } + + /* ref_pic_list_reordering */ + avc_bitstream_put_ui(bs, 0, 1); /* ref_pic_list_reordering_flag_l0: 0 */ + avc_bitstream_put_ui(bs, 0, 1); /* ref_pic_list_reordering_flag_l1: 0 */ + } + + if ((pic_param->pic_fields.bits.weighted_pred_flag && + IS_P_SLICE(slice_param->slice_type)) || + ((pic_param->pic_fields.bits.weighted_bipred_idc == 1) && + IS_B_SLICE(slice_param->slice_type))) { + /* FIXME: fill weight/offset table */ + assert(0); + } + + /* dec_ref_pic_marking */ + if (pic_param->pic_fields.bits.reference_pic_flag) { /* nal_ref_idc != 0 */ + unsigned char no_output_of_prior_pics_flag = 0; + unsigned char long_term_reference_flag = 0; + unsigned char adaptive_ref_pic_marking_mode_flag = 0; + + if (pic_param->pic_fields.bits.idr_pic_flag) { + avc_bitstream_put_ui(bs, no_output_of_prior_pics_flag, 1); /* no_output_of_prior_pics_flag: 0 */ + avc_bitstream_put_ui(bs, long_term_reference_flag, 1); /* long_term_reference_flag: 0 */ + } else { + avc_bitstream_put_ui(bs, adaptive_ref_pic_marking_mode_flag, 1); /* adaptive_ref_pic_marking_mode_flag: 0 */ + } + } + + if (pic_param->pic_fields.bits.entropy_coding_mode_flag && + !IS_I_SLICE(slice_param->slice_type)) + avc_bitstream_put_ue(bs, slice_param->cabac_init_idc); /* cabac_init_idc: 0 */ + + avc_bitstream_put_se(bs, slice_param->slice_qp_delta); /* slice_qp_delta: 0 */ + + /* ignore for SP/SI */ + + if (pic_param->pic_fields.bits.deblocking_filter_control_present_flag) { + avc_bitstream_put_ue(bs, slice_param->disable_deblocking_filter_idc); /* disable_deblocking_filter_idc: 0 */ + + if (slice_param->disable_deblocking_filter_idc != 1) { + avc_bitstream_put_se(bs, slice_param->slice_alpha_c0_offset_div2); /* slice_alpha_c0_offset_div2: 2 */ + avc_bitstream_put_se(bs, slice_param->slice_beta_offset_div2); /* slice_beta_offset_div2: 2 */ + } + } + + if (pic_param->pic_fields.bits.entropy_coding_mode_flag) { + avc_bitstream_byte_aligning(bs, 1); + } +} + +int +build_avc_slice_header(VAEncSequenceParameterBufferH264 *sps_param, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param, + unsigned char **slice_header_buffer) +{ + avc_bitstream bs; + int is_idr = !!pic_param->pic_fields.bits.idr_pic_flag; + int is_ref = !!pic_param->pic_fields.bits.reference_pic_flag; + + avc_bitstream_start(&bs); + nal_start_code_prefix(&bs); + + if (IS_I_SLICE(slice_param->slice_type)) { + nal_header(&bs, NAL_REF_IDC_HIGH, is_idr ? NAL_IDR : NAL_NON_IDR); + } else if (IS_P_SLICE(slice_param->slice_type)) { + assert(!is_idr); + nal_header(&bs, NAL_REF_IDC_MEDIUM, NAL_NON_IDR); + } else { + assert(IS_B_SLICE(slice_param->slice_type)); + assert(!is_idr); + nal_header(&bs, is_ref ? NAL_REF_IDC_LOW : NAL_REF_IDC_NONE, NAL_NON_IDR); + } + + slice_header(&bs, sps_param, pic_param, slice_param); + + avc_bitstream_end(&bs); + *slice_header_buffer = (unsigned char *)bs.buffer; + + return bs.bit_offset; +} + +int +build_avc_sei_buffering_period(int cpb_removal_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned char **sei_buffer) +{ + unsigned char *byte_buf; + int byte_size, i; + + avc_bitstream nal_bs; + avc_bitstream sei_bs; + + avc_bitstream_start(&sei_bs); + avc_bitstream_put_ue(&sei_bs, 0); /*seq_parameter_set_id*/ + avc_bitstream_put_ui(&sei_bs, init_cpb_removal_delay, cpb_removal_length); + avc_bitstream_put_ui(&sei_bs, init_cpb_removal_delay_offset, cpb_removal_length); + if ( sei_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_bs, 1, 1); + } + avc_bitstream_end(&sei_bs); + byte_size = (sei_bs.bit_offset + 7) / 8; + + avc_bitstream_start(&nal_bs); + nal_start_code_prefix(&nal_bs); + nal_header(&nal_bs, NAL_REF_IDC_NONE, NAL_SEI); + + avc_bitstream_put_ui(&nal_bs, 0, 8); + avc_bitstream_put_ui(&nal_bs, byte_size, 8); + + byte_buf = (unsigned char *)sei_bs.buffer; + for(i = 0; i < byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + + avc_rbsp_trailing_bits(&nal_bs); + avc_bitstream_end(&nal_bs); + + *sei_buffer = (unsigned char *)nal_bs.buffer; + + return nal_bs.bit_offset; +} + +int +build_avc_sei_pic_timing(unsigned int cpb_removal_length, unsigned int cpb_removal_delay, + unsigned int dpb_output_length, unsigned int dpb_output_delay, + unsigned char **sei_buffer) +{ + unsigned char *byte_buf; + int byte_size, i; + + avc_bitstream nal_bs; + avc_bitstream sei_bs; + + avc_bitstream_start(&sei_bs); + avc_bitstream_put_ui(&sei_bs, cpb_removal_delay, cpb_removal_length); + avc_bitstream_put_ui(&sei_bs, dpb_output_delay, dpb_output_length); + if ( sei_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_bs, 1, 1); + } + avc_bitstream_end(&sei_bs); + byte_size = (sei_bs.bit_offset + 7) / 8; + + avc_bitstream_start(&nal_bs); + nal_start_code_prefix(&nal_bs); + nal_header(&nal_bs, NAL_REF_IDC_NONE, NAL_SEI); + + avc_bitstream_put_ui(&nal_bs, 0x01, 8); + avc_bitstream_put_ui(&nal_bs, byte_size, 8); + + byte_buf = (unsigned char *)sei_bs.buffer; + for(i = 0; i < byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + + avc_rbsp_trailing_bits(&nal_bs); + avc_bitstream_end(&nal_bs); + + *sei_buffer = (unsigned char *)nal_bs.buffer; + + return nal_bs.bit_offset; +} + + +int +build_avc_sei_buffer_timing(unsigned int init_cpb_removal_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned int cpb_removal_length, + unsigned int cpb_removal_delay, + unsigned int dpb_output_length, + unsigned int dpb_output_delay, + unsigned char **sei_buffer) +{ + unsigned char *byte_buf; + int bp_byte_size, i, pic_byte_size; + + avc_bitstream nal_bs; + avc_bitstream sei_bp_bs, sei_pic_bs; + + avc_bitstream_start(&sei_bp_bs); + avc_bitstream_put_ue(&sei_bp_bs, 0); /*seq_parameter_set_id*/ + avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay, cpb_removal_length); + avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay_offset, cpb_removal_length); + if ( sei_bp_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_bp_bs, 1, 1); + } + avc_bitstream_end(&sei_bp_bs); + bp_byte_size = (sei_bp_bs.bit_offset + 7) / 8; + + avc_bitstream_start(&sei_pic_bs); + avc_bitstream_put_ui(&sei_pic_bs, cpb_removal_delay, cpb_removal_length); + avc_bitstream_put_ui(&sei_pic_bs, dpb_output_delay, dpb_output_length); + if ( sei_pic_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_pic_bs, 1, 1); + } + avc_bitstream_end(&sei_pic_bs); + pic_byte_size = (sei_pic_bs.bit_offset + 7) / 8; + + avc_bitstream_start(&nal_bs); + nal_start_code_prefix(&nal_bs); + nal_header(&nal_bs, NAL_REF_IDC_NONE, NAL_SEI); + + /* Write the SEI buffer period data */ + avc_bitstream_put_ui(&nal_bs, 0, 8); + avc_bitstream_put_ui(&nal_bs, bp_byte_size, 8); + + byte_buf = (unsigned char *)sei_bp_bs.buffer; + for(i = 0; i < bp_byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + /* write the SEI timing data */ + avc_bitstream_put_ui(&nal_bs, 0x01, 8); + avc_bitstream_put_ui(&nal_bs, pic_byte_size, 8); + + byte_buf = (unsigned char *)sei_pic_bs.buffer; + for(i = 0; i < pic_byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + + avc_rbsp_trailing_bits(&nal_bs); + avc_bitstream_end(&nal_bs); + + *sei_buffer = (unsigned char *)nal_bs.buffer; + + return nal_bs.bit_offset; +} + +int +build_mpeg2_slice_header(VAEncSequenceParameterBufferMPEG2 *sps_param, + VAEncPictureParameterBufferMPEG2 *pic_param, + VAEncSliceParameterBufferMPEG2 *slice_param, + unsigned char **slice_header_buffer) +{ + avc_bitstream bs; + + avc_bitstream_start(&bs); + avc_bitstream_end(&bs); + *slice_header_buffer = (unsigned char *)bs.buffer; + + return bs.bit_offset; +} + +static void binarize_qindex_delta(avc_bitstream *bs, int qindex_delta) +{ + if (qindex_delta == 0) + avc_bitstream_put_ui(bs, 0, 1); + else { + avc_bitstream_put_ui(bs, 1, 1); + avc_bitstream_put_ui(bs, abs(qindex_delta), 4); + + if (qindex_delta < 0) + avc_bitstream_put_ui(bs, 1, 1); + else + avc_bitstream_put_ui(bs, 0, 1); + } +} + +void binarize_vp8_frame_header(VAEncSequenceParameterBufferVP8 *seq_param, + VAEncPictureParameterBufferVP8 *pic_param, + VAQMatrixBufferVP8 *q_matrix, + struct gen6_mfc_context *mfc_context, + struct intel_encoder_context *encoder_context) +{ + avc_bitstream bs; + int i, j; + int is_intra_frame = !pic_param->pic_flags.bits.frame_type; + int log2num = pic_param->pic_flags.bits.num_token_partitions; + + /* modify picture paramters */ + pic_param->pic_flags.bits.loop_filter_adj_enable = 1; + pic_param->pic_flags.bits.mb_no_coeff_skip = 1; + pic_param->pic_flags.bits.forced_lf_adjustment = 1; + pic_param->pic_flags.bits.refresh_entropy_probs = 1; + pic_param->pic_flags.bits.segmentation_enabled = 0; + + pic_param->pic_flags.bits.loop_filter_type = pic_param->pic_flags.bits.version / 2; + if (pic_param->pic_flags.bits.version > 1) + pic_param->loop_filter_level[0] = 0; + + avc_bitstream_start(&bs); + + if (is_intra_frame) { + avc_bitstream_put_ui(&bs, 0, 1); + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.clamping_type ,1); + } + + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.segmentation_enabled, 1); + + if (pic_param->pic_flags.bits.segmentation_enabled) { + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.update_mb_segmentation_map, 1); + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.update_segment_feature_data, 1); + if (pic_param->pic_flags.bits.update_segment_feature_data) { + /*add it later*/ + assert(0); + } + if (pic_param->pic_flags.bits.update_mb_segmentation_map) { + for (i = 0; i < 3; i++) { + if (mfc_context->vp8_state.mb_segment_tree_probs[i] == 255) + avc_bitstream_put_ui(&bs, 0, 1); + else { + avc_bitstream_put_ui(&bs, 1, 1); + avc_bitstream_put_ui(&bs, mfc_context->vp8_state.mb_segment_tree_probs[i], 8); + } + } + } + } + + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.loop_filter_type, 1); + avc_bitstream_put_ui(&bs, pic_param->loop_filter_level[0], 6); + avc_bitstream_put_ui(&bs, pic_param->sharpness_level, 3); + + mfc_context->vp8_state.frame_header_lf_update_pos = bs.bit_offset; + + if (pic_param->pic_flags.bits.forced_lf_adjustment) { + avc_bitstream_put_ui(&bs, 1, 1);//mode_ref_lf_delta_enable = 1 + avc_bitstream_put_ui(&bs, 1, 1);//mode_ref_lf_delta_update = 1 + + for (i =0; i < 4; i++) { + avc_bitstream_put_ui(&bs, 1, 1); + if (pic_param->ref_lf_delta[i] > 0) { + avc_bitstream_put_ui(&bs, (abs(pic_param->ref_lf_delta[i]) & 0x3F), 6); + avc_bitstream_put_ui(&bs, 0, 1); + } else { + avc_bitstream_put_ui(&bs, (abs(pic_param->ref_lf_delta[i]) & 0x3F), 6); + avc_bitstream_put_ui(&bs, 1, 1); + } + } + + for (i =0; i < 4; i++) { + avc_bitstream_put_ui(&bs, 1, 1); + if (pic_param->mode_lf_delta[i] > 0) { + avc_bitstream_put_ui(&bs, (abs(pic_param->mode_lf_delta[i]) & 0x3F), 6); + avc_bitstream_put_ui(&bs, 0, 1); + } else { + avc_bitstream_put_ui(&bs, (abs(pic_param->mode_lf_delta[i]) & 0x3F), 6); + avc_bitstream_put_ui(&bs, 1, 1); + } + } + + } else { + avc_bitstream_put_ui(&bs, 0, 1);//mode_ref_lf_delta_enable = 0 + } + + avc_bitstream_put_ui(&bs, log2num, 2); + + mfc_context->vp8_state.frame_header_qindex_update_pos = bs.bit_offset; + + avc_bitstream_put_ui(&bs, q_matrix->quantization_index[0], 7); + + for (i = 0; i < 5; i++) + binarize_qindex_delta(&bs, q_matrix->quantization_index_delta[i]); + + if (!is_intra_frame) { + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.refresh_golden_frame, 1); + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.refresh_alternate_frame, 1); + + if (!pic_param->pic_flags.bits.refresh_golden_frame) + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.copy_buffer_to_golden, 2); + + if (!pic_param->pic_flags.bits.refresh_alternate_frame) + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.copy_buffer_to_alternate, 2); + + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.sign_bias_golden, 1); + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.sign_bias_alternate, 1); + } + + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.refresh_entropy_probs, 1); + + if (!is_intra_frame) + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.refresh_last, 1); + + mfc_context->vp8_state.frame_header_token_update_pos = bs.bit_offset; + + for (i = 0; i < 4 * 8 * 3 * 11; i++) + avc_bitstream_put_ui(&bs, 0, 1); //don't update coeff_probs + + avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.mb_no_coeff_skip, 1); + if (pic_param->pic_flags.bits.mb_no_coeff_skip) + avc_bitstream_put_ui(&bs, mfc_context->vp8_state.prob_skip_false, 8); + + if (!is_intra_frame) { + avc_bitstream_put_ui(&bs, mfc_context->vp8_state.prob_intra, 8); + avc_bitstream_put_ui(&bs, mfc_context->vp8_state.prob_last, 8); + avc_bitstream_put_ui(&bs, mfc_context->vp8_state.prob_gf, 8); + + avc_bitstream_put_ui(&bs, 1, 1); //y_mode_update_flag = 1 + for (i = 0; i < 4; i++) { + avc_bitstream_put_ui(&bs, mfc_context->vp8_state.y_mode_probs[i], 8); + } + + avc_bitstream_put_ui(&bs, 1, 1); //uv_mode_update_flag = 1 + for (i = 0; i < 3; i++) { + avc_bitstream_put_ui(&bs, mfc_context->vp8_state.uv_mode_probs[i], 8); + } + + mfc_context->vp8_state.frame_header_bin_mv_upate_pos = bs.bit_offset; + + for (i = 0; i < 2 ; i++) { + for (j = 0; j < 19; j++) { + avc_bitstream_put_ui(&bs, 0, 1); + //avc_bitstream_put_ui(&bs, mfc_context->vp8_state.mv_probs[i][j], 7); + } + } + } + + avc_bitstream_end(&bs); + + mfc_context->vp8_state.vp8_frame_header = (unsigned char *)bs.buffer; + mfc_context->vp8_state.frame_header_bit_count = bs.bit_offset; +} + +/* HEVC to do for internal header generated*/ + +void nal_header_hevc(avc_bitstream *bs, int nal_unit_type, int temporalid) +{ + /* forbidden_zero_bit: 0 */ + avc_bitstream_put_ui(bs, 0, 1); + /* nal unit_type */ + avc_bitstream_put_ui(bs, nal_unit_type, 6); + /* layer_id. currently it is zero */ + avc_bitstream_put_ui(bs, 0, 6); + /* teporalid + 1 .*/ + avc_bitstream_put_ui(bs, temporalid + 1, 3); +} + +int build_hevc_sei_buffering_period(int init_cpb_removal_delay_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned char **sei_buffer) +{ + unsigned char *byte_buf; + int bp_byte_size, i; + //unsigned int cpb_removal_delay; + + avc_bitstream nal_bs; + avc_bitstream sei_bp_bs; + + avc_bitstream_start(&sei_bp_bs); + avc_bitstream_put_ue(&sei_bp_bs, 0); /*seq_parameter_set_id*/ + /* SEI buffer period info */ + /* NALHrdBpPresentFlag == 1 */ + avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay,init_cpb_removal_delay_length); + avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay_offset,init_cpb_removal_delay_length); + if ( sei_bp_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_bp_bs, 1, 1); + } + avc_bitstream_end(&sei_bp_bs); + bp_byte_size = (sei_bp_bs.bit_offset + 7) / 8; + + avc_bitstream_start(&nal_bs); + nal_start_code_prefix(&nal_bs); + nal_header_hevc(&nal_bs, PREFIX_SEI_NUT ,0); + + /* Write the SEI buffer period data */ + avc_bitstream_put_ui(&nal_bs, 0, 8); + avc_bitstream_put_ui(&nal_bs, bp_byte_size, 8); + + byte_buf = (unsigned char *)sei_bp_bs.buffer; + for(i = 0; i < bp_byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + + avc_rbsp_trailing_bits(&nal_bs); + avc_bitstream_end(&nal_bs); + + *sei_buffer = (unsigned char *)nal_bs.buffer; + + return nal_bs.bit_offset; +} + +int build_hevc_idr_sei_buffer_timing(unsigned int init_cpb_removal_delay_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned int cpb_removal_length, + unsigned int cpb_removal_delay, + unsigned int dpb_output_length, + unsigned int dpb_output_delay, + unsigned char **sei_buffer) +{ + unsigned char *byte_buf; + int bp_byte_size, i, pic_byte_size; + //unsigned int cpb_removal_delay; + + avc_bitstream nal_bs; + avc_bitstream sei_bp_bs, sei_pic_bs; + + avc_bitstream_start(&sei_bp_bs); + avc_bitstream_put_ue(&sei_bp_bs, 0); /*seq_parameter_set_id*/ + /* SEI buffer period info */ + /* NALHrdBpPresentFlag == 1 */ + avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay,init_cpb_removal_delay_length); + avc_bitstream_put_ui(&sei_bp_bs, init_cpb_removal_delay_offset,init_cpb_removal_delay_length); + if ( sei_bp_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_bp_bs, 1, 1); + } + avc_bitstream_end(&sei_bp_bs); + bp_byte_size = (sei_bp_bs.bit_offset + 7) / 8; + + /* SEI pic timing info */ + avc_bitstream_start(&sei_pic_bs); + /* The info of CPB and DPB delay is controlled by CpbDpbDelaysPresentFlag, + * which is derived as 1 if one of the following conditions is true: + * nal_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1, + * vcl_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1, + */ + //cpb_removal_delay = (hevc_context.current_cpb_removal - hevc_context.prev_idr_cpb_removal); + avc_bitstream_put_ui(&sei_pic_bs, cpb_removal_delay, cpb_removal_length); + avc_bitstream_put_ui(&sei_pic_bs, dpb_output_delay,dpb_output_length); + if ( sei_pic_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_pic_bs, 1, 1); + } + /* The pic_structure_present_flag determines whether the pic_structure + * info is written into the SEI pic timing info. + * Currently it is set to zero. + */ + avc_bitstream_end(&sei_pic_bs); + pic_byte_size = (sei_pic_bs.bit_offset + 7) / 8; + + avc_bitstream_start(&nal_bs); + nal_start_code_prefix(&nal_bs); + nal_header_hevc(&nal_bs, PREFIX_SEI_NUT ,0); + + /* Write the SEI buffer period data */ + avc_bitstream_put_ui(&nal_bs, 0, 8); + avc_bitstream_put_ui(&nal_bs, bp_byte_size, 8); + + byte_buf = (unsigned char *)sei_bp_bs.buffer; + for(i = 0; i < bp_byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + /* write the SEI pic timing data */ + avc_bitstream_put_ui(&nal_bs, 0x01, 8); + avc_bitstream_put_ui(&nal_bs, pic_byte_size, 8); + + byte_buf = (unsigned char *)sei_pic_bs.buffer; + for(i = 0; i < pic_byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + + avc_rbsp_trailing_bits(&nal_bs); + avc_bitstream_end(&nal_bs); + + *sei_buffer = (unsigned char *)nal_bs.buffer; + + return nal_bs.bit_offset; +} + +int build_hevc_sei_pic_timing(unsigned int cpb_removal_length, unsigned int cpb_removal_delay, + unsigned int dpb_output_length, unsigned int dpb_output_delay, + unsigned char **sei_buffer) +{ + unsigned char *byte_buf; + int i, pic_byte_size; + //unsigned int cpb_removal_delay; + + avc_bitstream nal_bs; + avc_bitstream sei_pic_bs; + + avc_bitstream_start(&sei_pic_bs); + /* The info of CPB and DPB delay is controlled by CpbDpbDelaysPresentFlag, + * which is derived as 1 if one of the following conditions is true: + * nal_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1, + * vcl_hrd_parameters_present_flag is present in the avc_bitstream and is equal to 1, + */ + //cpb_removal_delay = (hevc_context.current_cpb_removal - hevc_context.current_idr_cpb_removal); + avc_bitstream_put_ui(&sei_pic_bs, cpb_removal_delay, cpb_removal_length); + avc_bitstream_put_ui(&sei_pic_bs, dpb_output_delay, dpb_output_length); + if ( sei_pic_bs.bit_offset & 0x7) { + avc_bitstream_put_ui(&sei_pic_bs, 1, 1); + } + + /* The pic_structure_present_flag determines whether the pic_structure + * info is written into the SEI pic timing info. + * Currently it is set to zero. + */ + avc_bitstream_end(&sei_pic_bs); + pic_byte_size = (sei_pic_bs.bit_offset + 7) / 8; + + avc_bitstream_start(&nal_bs); + nal_start_code_prefix(&nal_bs); + nal_header_hevc(&nal_bs, PREFIX_SEI_NUT ,0); + + /* write the SEI Pic timing data */ + avc_bitstream_put_ui(&nal_bs, 0x01, 8); + avc_bitstream_put_ui(&nal_bs, pic_byte_size, 8); + + byte_buf = (unsigned char *)sei_pic_bs.buffer; + for(i = 0; i < pic_byte_size; i++) { + avc_bitstream_put_ui(&nal_bs, byte_buf[i], 8); + } + free(byte_buf); + + avc_rbsp_trailing_bits(&nal_bs); + avc_bitstream_end(&nal_bs); + + *sei_buffer = (unsigned char *)nal_bs.buffer; + + return nal_bs.bit_offset; +} + +typedef struct _RefPicSet +{ + unsigned char num_negative_pics; + unsigned char num_positive_pics; + unsigned char delta_poc_s0_minus1[8]; + unsigned char used_by_curr_pic_s0_flag[8]; + unsigned char delta_poc_s1_minus1[8]; + unsigned char used_by_curr_pic_s1_flag[8]; + unsigned int inter_ref_pic_set_prediction_flag; +}hevcRefPicSet; + +void hevc_short_term_ref_pic_set(avc_bitstream *bs,VAEncSliceParameterBufferHEVC *slice_param,int curPicOrderCnt) +{ + hevcRefPicSet hevc_rps; + int rps_idx = 1, ref_idx = 0; + int i = 0; + + hevc_rps.inter_ref_pic_set_prediction_flag = 0; + /* s0: between I and P/B; s1 : between P and B */ + hevc_rps.num_negative_pics = (slice_param->slice_type!=HEVC_SLICE_I) ? 1 : 0; + hevc_rps.num_positive_pics = (slice_param->slice_type==HEVC_SLICE_B) ? 1 : 0; + hevc_rps.delta_poc_s0_minus1[0] = 0; + hevc_rps.used_by_curr_pic_s0_flag[0] = 0; + hevc_rps.delta_poc_s1_minus1[0] = 0; + hevc_rps.used_by_curr_pic_s1_flag[0] = 0; + if(slice_param->num_ref_idx_l0_active_minus1==0 ) + { + hevc_rps.delta_poc_s0_minus1[0] = (slice_param->slice_type==HEVC_SLICE_I) ? 0 : ( curPicOrderCnt - slice_param->ref_pic_list0[0].pic_order_cnt-1); //0; + hevc_rps.used_by_curr_pic_s0_flag[0] = 1; + } + if(slice_param->num_ref_idx_l1_active_minus1==0 ) + { + hevc_rps.delta_poc_s1_minus1[0] = (slice_param->slice_type==HEVC_SLICE_I) ? 0 : ( slice_param->ref_pic_list1[0].pic_order_cnt -curPicOrderCnt -1); + hevc_rps.used_by_curr_pic_s1_flag[0] = 1; + } + + if (rps_idx) + avc_bitstream_put_ui(bs, hevc_rps.inter_ref_pic_set_prediction_flag, 1); + + if (hevc_rps.inter_ref_pic_set_prediction_flag) + { + /* not support */ + /* to do */ + } else { + avc_bitstream_put_ue(bs, hevc_rps.num_negative_pics); + avc_bitstream_put_ue(bs, hevc_rps.num_positive_pics); + + for (i = 0; i < hevc_rps.num_negative_pics; i++) + { + avc_bitstream_put_ue(bs, hevc_rps.delta_poc_s0_minus1[ref_idx]); + avc_bitstream_put_ui(bs, hevc_rps.used_by_curr_pic_s0_flag[ref_idx], 1); + } + for (i = 0; i < hevc_rps.num_positive_pics; i++) + { + avc_bitstream_put_ue(bs, hevc_rps.delta_poc_s1_minus1[ref_idx]); + avc_bitstream_put_ui(bs, hevc_rps.used_by_curr_pic_s1_flag[ref_idx], 1); + } + } + + return; +} + +static void slice_rbsp(avc_bitstream *bs, + int slice_index, + VAEncSequenceParameterBufferHEVC *seq_param, + VAEncPictureParameterBufferHEVC *pic_param, + VAEncSliceParameterBufferHEVC *slice_param) +{ + int log2_cu_size = seq_param->log2_min_luma_coding_block_size_minus3 + 3; + int log2_ctb_size = seq_param->log2_diff_max_min_luma_coding_block_size + log2_cu_size; + int ctb_size = 1 << log2_ctb_size; + + int picture_width_in_ctb = (seq_param->pic_width_in_luma_samples + ctb_size - 1) / ctb_size; + int picture_height_in_ctb = (seq_param->pic_height_in_luma_samples + ctb_size - 1) / ctb_size; + + /* first_slice_segment_in_pic_flag */ + if (slice_index == 0) + { + avc_bitstream_put_ui(bs, 1, 1); + } + else + { + avc_bitstream_put_ui(bs, 0, 1); + } + + /* no_output_of_prior_pics_flag */ + if (pic_param->pic_fields.bits.idr_pic_flag) + avc_bitstream_put_ui(bs, 1, 1); + + /* slice_pic_parameter_set_id */ + avc_bitstream_put_ue(bs, 0); + + /* not the first slice */ + if (slice_index) + { + /* TBD */ + int bit_size; + + float num_ctus; + + num_ctus = picture_width_in_ctb * picture_height_in_ctb; + bit_size = ceilf(log2f(num_ctus)); + + if (pic_param->pic_fields.bits.dependent_slice_segments_enabled_flag) + { + avc_bitstream_put_ui(bs, + slice_param->slice_fields.bits.dependent_slice_segment_flag, 1); + } + /* slice_segment_address is based on Ceil(log2(PictureSizeinCtbs)) */ + avc_bitstream_put_ui(bs, slice_param->slice_segment_address, bit_size); + } + if (!slice_param->slice_fields.bits.dependent_slice_segment_flag) + { + /* slice_reserved_flag */ + + /* slice_type */ + avc_bitstream_put_ue(bs, slice_param->slice_type); + /* use the inferred the value of pic_output_flag */ + + /* colour_plane_id */ + if (seq_param->seq_fields.bits.separate_colour_plane_flag) + { + avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.colour_plane_id, 1); + } + + if (!pic_param->pic_fields.bits.idr_pic_flag) + { + int Log2MaxPicOrderCntLsb = 8; + avc_bitstream_put_ui(bs, pic_param->decoded_curr_pic.pic_order_cnt, Log2MaxPicOrderCntLsb); + + //if (!slice_param->short_term_ref_pic_set_sps_flag) + { + /* short_term_ref_pic_set_sps_flag. + * Use zero and then pass the RPS from slice_header + */ + avc_bitstream_put_ui(bs, 0, 1); + /* TBD + * Add the short_term reference picture set + */ + hevc_short_term_ref_pic_set(bs,slice_param,pic_param->decoded_curr_pic.pic_order_cnt); + } + /* long term reference present flag. unpresent */ + /* TBD */ + + /* sps temporal MVP*/ + if (seq_param->seq_fields.bits.sps_temporal_mvp_enabled_flag) + { + avc_bitstream_put_ui(bs, + slice_param->slice_fields.bits.slice_temporal_mvp_enabled_flag, 1); + } + } + + /* long term reference present flag. unpresent */ + + /* sample adaptive offset enabled flag */ + if (seq_param->seq_fields.bits.sample_adaptive_offset_enabled_flag) + { + avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.slice_sao_luma_flag, 1); + avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.slice_sao_chroma_flag, 1); + } + + if (slice_param->slice_type != HEVC_SLICE_I) + { + /* num_ref_idx_active_override_flag. 0 */ + avc_bitstream_put_ui(bs, 0, 1); + /* lists_modification_flag is unpresent NumPocTotalCurr > 1 ,here it is 1*/ + + /* No reference picture set modification */ + + /* MVD_l1_zero_flag */ + if (slice_param->slice_type == HEVC_SLICE_B) + avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.mvd_l1_zero_flag, 1); + + /* cabac_init_present_flag. 0 */ + + /* slice_temporal_mvp_enabled_flag. */ + if (slice_param->slice_fields.bits.slice_temporal_mvp_enabled_flag) + { + if (slice_param->slice_type == HEVC_SLICE_B) + avc_bitstream_put_ui(bs, slice_param->slice_fields.bits.collocated_from_l0_flag, 1); + /* + * TBD: Add the collocated_ref_idx. + */ + } + if (((pic_param->pic_fields.bits.weighted_pred_flag) && + (slice_param->slice_type == HEVC_SLICE_P)) || + ((pic_param->pic_fields.bits.weighted_bipred_flag) && + (slice_param->slice_type == HEVC_SLICE_B))) + { + /* TBD: + * add the weighted table + */ + } + avc_bitstream_put_ue(bs, 5 - slice_param->max_num_merge_cand); + } + /* slice_qp_delta */ + avc_bitstream_put_ue(bs, slice_param->slice_qp_delta); + + /* slice_cb/cr_qp_offset is controlled by pps_slice_chroma_qp_offsets_present_flag + * The present flag is set to 1. + */ + avc_bitstream_put_ue(bs, slice_param->slice_cb_qp_offset); + avc_bitstream_put_ue(bs, slice_param->slice_cr_qp_offset); + + /* + * deblocking_filter_override_flag is controlled by + * deblocking_filter_override_enabled_flag. + * The override_enabled_flag is zero. + * deblocking_filter_override_flag is zero. then + * slice_deblocking_filter_disabled_flag is also zero + * (It is inferred to be equal to pps_deblocking_filter_disabled_flag. + */ + + /* slice_loop_filter_across_slices_enabled_flag is controlled + * by pps_loop_filter_across_slices_enabled_flag && + * (slice_sao_luma_flag | | slice_sao_chroma_flag | | + * !slice_deblocking_filter_disabled_flag )) + * + */ + } + + if (pic_param->pic_fields.bits.tiles_enabled_flag || + pic_param->pic_fields.bits.entropy_coding_sync_enabled_flag) + { + /* TBD. + * Add the Entry-points && tile definition. + */ + } + + /* slice_segment_header_extension_present_flag. Not present */ + + /* byte_alignment */ + avc_rbsp_trailing_bits(bs); +} + +int get_hevc_slice_nalu_type (VAEncPictureParameterBufferHEVC *pic_param) +{ + if (pic_param->pic_fields.bits.idr_pic_flag) + return IDR_WRADL_NUT; + else if (pic_param->pic_fields.bits.reference_pic_flag) + return SLICE_TRAIL_R_NUT; + else + return SLICE_TRAIL_N_NUT; +} + +int build_hevc_slice_header(VAEncSequenceParameterBufferHEVC *seq_param, + VAEncPictureParameterBufferHEVC *pic_param, + VAEncSliceParameterBufferHEVC *slice_param, + unsigned char **header_buffer, + int slice_index) +{ + avc_bitstream bs; + + avc_bitstream_start(&bs); + nal_start_code_prefix(&bs); + nal_header_hevc(&bs, get_hevc_slice_nalu_type(pic_param), 0); + slice_rbsp(&bs, slice_index, seq_param,pic_param,slice_param); + avc_bitstream_end(&bs); + + *header_buffer = (unsigned char *)bs.buffer; + return bs.bit_offset; +} + +int +intel_avc_find_skipemulcnt(unsigned char *buf, int bits_length) +{ + int i, found; + int leading_zero_cnt, byte_length, zero_byte; + int nal_unit_type; + int skip_cnt = 0; + +#define NAL_UNIT_TYPE_MASK 0x1f +#define HW_MAX_SKIP_LENGTH 15 + + byte_length = ALIGN(bits_length, 32) >> 3; + + + leading_zero_cnt = 0; + found = 0; + for(i = 0; i < byte_length - 4; i++) { + if (((buf[i] == 0) && (buf[i + 1] == 0) && (buf[i + 2] == 1)) || + ((buf[i] == 0) && (buf[i + 1] == 0) && (buf[i + 2] == 0) && (buf[i + 3] == 1))) { + found = 1; + break; + } + leading_zero_cnt++; + } + if (!found) { + /* warning message is complained. But anyway it will be inserted. */ + WARN_ONCE("Invalid packed header data. " + "Can't find the 000001 start_prefix code\n"); + return 0; + } + i = leading_zero_cnt; + + zero_byte = 0; + if (!((buf[i] == 0) && (buf[i + 1] == 0) && (buf[i + 2] == 1))) + zero_byte = 1; + + skip_cnt = leading_zero_cnt + zero_byte + 3; + + /* the unit header byte is accounted */ + nal_unit_type = (buf[skip_cnt]) & NAL_UNIT_TYPE_MASK; + skip_cnt += 1; + + if (nal_unit_type == 14 || nal_unit_type == 20 || nal_unit_type == 21) { + /* more unit header bytes are accounted for MVC/SVC */ + skip_cnt += 3; + } + if (skip_cnt > HW_MAX_SKIP_LENGTH) { + WARN_ONCE("Too many leading zeros are padded for packed data. " + "It is beyond the HW range.!!!\n"); + } + return skip_cnt; +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_encoder_utils.h intel-vaapi-driver-1.7.1/src/i965_encoder_utils.h --- intel-vaapi-driver-1.0.15/src/i965_encoder_utils.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_encoder_utils.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,68 @@ +#ifndef __I965_ENCODER_UTILS_H__ +#define __I965_ENCODER_UTILS_H__ + +int +build_avc_slice_header(VAEncSequenceParameterBufferH264 *sps_param, + VAEncPictureParameterBufferH264 *pic_param, + VAEncSliceParameterBufferH264 *slice_param, + unsigned char **slice_header_buffer); +int +build_avc_sei_buffering_period(int cpb_removal_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned char **sei_buffer); + +int +build_avc_sei_pic_timing(unsigned int cpb_removal_length, unsigned int cpb_removal_delay, + unsigned int dpb_output_length, unsigned int dpb_output_delay, + unsigned char **sei_buffer); + +int +build_avc_sei_buffer_timing(unsigned int init_cpb_removal_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned int cpb_removal_length, + unsigned int cpb_removal_delay, + unsigned int dpb_output_length, + unsigned int dpb_output_delay, + unsigned char **sei_buffer); + +int +build_mpeg2_slice_header(VAEncSequenceParameterBufferMPEG2 *sps_param, + VAEncPictureParameterBufferMPEG2 *pic_param, + VAEncSliceParameterBufferMPEG2 *slice_param, + unsigned char **slice_header_buffer); + +/* HEVC */ + +int +build_hevc_slice_header(VAEncSequenceParameterBufferHEVC *seq_param, + VAEncPictureParameterBufferHEVC *pic_param, + VAEncSliceParameterBufferHEVC *slice_param, + unsigned char **header_buffer, + int slice_index); +int +build_hevc_sei_buffering_period(int cpb_removal_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned char **sei_buffer); + +int +build_hevc_sei_pic_timing(unsigned int cpb_removal_length, unsigned int cpb_removal_delay, + unsigned int dpb_output_length, unsigned int dpb_output_delay, + unsigned char **sei_buffer); + +int +build_hevc_idr_sei_buffer_timing(unsigned int init_cpb_removal_delay_length, + unsigned int init_cpb_removal_delay, + unsigned int init_cpb_removal_delay_offset, + unsigned int cpb_removal_length, + unsigned int cpb_removal_delay, + unsigned int dpb_output_length, + unsigned int dpb_output_delay, + unsigned char **sei_buffer); + +int +intel_avc_find_skipemulcnt(unsigned char *buf, int bits_length); + +#endif /* __I965_ENCODER_UTILS_H__ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_fourcc.h intel-vaapi-driver-1.7.1/src/i965_fourcc.h --- intel-vaapi-driver-1.0.15/src/i965_fourcc.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_fourcc.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,68 @@ +#ifndef _I965_FOURCC_H_ +#define _I965_FOURCC_H_ + +#ifndef VA_FOURCC_YV16 +#define VA_FOURCC_YV16 VA_FOURCC('Y','V','1','6') +#endif + +#ifndef VA_FOURCC_I420 +#define VA_FOURCC_I420 VA_FOURCC('I','4','2','0') +#endif + +/* + * VA_FOURCC_IA44 is an exception because the va.h already + * defines the AI44 as VA_FOURCC('I', 'A', '4', '4'). + */ +#ifndef VA_FOURCC_IA44 +#define VA_FOURCC_IA44 VA_FOURCC('A','I','4','4') +#endif + +#ifndef VA_FOURCC_IA88 +#define VA_FOURCC_IA88 VA_FOURCC('I','A','8','8') +#endif + +#ifndef VA_FOURCC_AI88 +#define VA_FOURCC_AI88 VA_FOURCC('A','I','8','8') +#endif + +#ifndef VA_FOURCC_IMC1 +#define VA_FOURCC_IMC1 VA_FOURCC('I','M','C','1') +#endif + +#ifndef VA_FOURCC_YVY2 +#define VA_FOURCC_YVY2 VA_FOURCC('Y','V','Y','2') +#endif + +#define I965_MAX_PLANES 4 +#define I965_MAX_COMONENTS 4 + +#define I965_COLOR_YUV 0 +#define I965_COLOR_RGB 1 +#define I965_COLOR_INDEX 2 + +typedef struct { + uint8_t plane; /* the plane which the pixel belongs to */ + uint8_t offset; /* bits offset within a macro-pixel for packed YUV formats or pixel for other formats in the plane */ +} i965_component_info; + +typedef struct { + uint32_t fourcc; /* fourcc */ + uint32_t format; /* 0: YUV, 1: RGB, 2: Indexed format */ + uint32_t subsampling; /* Sub sampling */ + uint8_t flag; /* 1: only supported by vaCreateSurfaces(), 2: only supported by vaCreateImage(), 3: both */ + uint8_t hfactor; /* horizontal sampling factor */ + uint8_t vfactor; /* vertical sampling factor */ + uint8_t num_planes; /* number of planes */ + uint8_t bpp[I965_MAX_PLANES]; /* bits per pixel within a plane */ + uint8_t num_components; /* number of components */ + /* + * Components in the array are ordered in Y, U, V, A (up to 4 components) + * for YUV formats, R, G, B, A (up to 4 components) for RGB formats and + * I, A (2 components) for indexed formats + */ + i965_component_info components[I965_MAX_COMONENTS]; +} i965_fourcc_info; + +extern const i965_fourcc_info *get_fourcc_info(unsigned int); + +#endif /* _I965_FOURCC_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_gpe_utils.c intel-vaapi-driver-1.7.1/src/i965_gpe_utils.c --- intel-vaapi-driver-1.0.15/src/i965_gpe_utils.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_gpe_utils.c 2016-06-21 01:35:12.000000000 +0000 @@ -0,0 +1,2055 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#include +#include +#include +#include + +#include "intel_batchbuffer.h" +#include "intel_driver.h" + +#include "i965_gpe_utils.h" + +static void +i965_gpe_select(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} + +static void +gen6_gpe_state_base_address(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 10); + + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2)); + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General State Base Address */ + OUT_RELOC(batch, + gpe_context->surface_state_binding_table.bo, + I915_GEM_DOMAIN_INSTRUCTION, + 0, + BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic State Base Address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect Object Base Address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction Base Address */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* General State Access Upper Bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Dynamic State Access Upper Bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Indirect Object Access Upper Bound */ + OUT_BATCH(batch, BASE_ADDRESS_MODIFY); /* Instruction Access Upper Bound */ + + ADVANCE_BATCH(batch); +} + +static void +gen6_gpe_vfe_state(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + + BEGIN_BATCH(batch, 8); + + OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | (8 - 2)); + OUT_BATCH(batch, 0); /* Scratch Space Base Pointer and Space */ + OUT_BATCH(batch, + gpe_context->vfe_state.max_num_threads << 16 | /* Maximum Number of Threads */ + gpe_context->vfe_state.num_urb_entries << 8 | /* Number of URB Entries */ + gpe_context->vfe_state.gpgpu_mode << 2); /* MEDIA Mode */ + OUT_BATCH(batch, 0); /* Debug: Object ID */ + OUT_BATCH(batch, + gpe_context->vfe_state.urb_entry_size << 16 | /* URB Entry Allocation Size */ + gpe_context->vfe_state.curbe_allocation_size); /* CURBE Allocation Size */ + /* the vfe_desc5/6/7 will decide whether the scoreboard is used. */ + OUT_BATCH(batch, gpe_context->vfe_desc5.dword); + OUT_BATCH(batch, gpe_context->vfe_desc6.dword); + OUT_BATCH(batch, gpe_context->vfe_desc7.dword); + + ADVANCE_BATCH(batch); + +} + +static void +gen6_gpe_curbe_load(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 4); + + OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, gpe_context->curbe.length); + OUT_RELOC(batch, gpe_context->curbe.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + ADVANCE_BATCH(batch); +} + +static void +gen6_gpe_idrt(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 4); + + OUT_BATCH(batch, CMD_MEDIA_INTERFACE_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, gpe_context->idrt.max_entries * gpe_context->idrt.entry_size); + OUT_RELOC(batch, gpe_context->idrt.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + + ADVANCE_BATCH(batch); +} + +void +i965_gpe_load_kernels(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_kernel *kernel_list, + unsigned int num_kernels) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i; + + assert(num_kernels <= MAX_GPE_KERNELS); + memcpy(gpe_context->kernels, kernel_list, sizeof(*kernel_list) * num_kernels); + gpe_context->num_kernels = num_kernels; + + for (i = 0; i < num_kernels; i++) { + struct i965_kernel *kernel = &gpe_context->kernels[i]; + + kernel->bo = dri_bo_alloc(i965->intel.bufmgr, + kernel->name, + kernel->size, + 0x1000); + assert(kernel->bo); + dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); + } +} + +void +i965_gpe_context_destroy(struct i965_gpe_context *gpe_context) +{ + int i; + + dri_bo_unreference(gpe_context->surface_state_binding_table.bo); + gpe_context->surface_state_binding_table.bo = NULL; + + dri_bo_unreference(gpe_context->idrt.bo); + gpe_context->idrt.bo = NULL; + + dri_bo_unreference(gpe_context->curbe.bo); + gpe_context->curbe.bo = NULL; + + for (i = 0; i < gpe_context->num_kernels; i++) { + struct i965_kernel *kernel = &gpe_context->kernels[i]; + + dri_bo_unreference(kernel->bo); + kernel->bo = NULL; + } +} + +void +i965_gpe_context_init(VADriverContextP ctx, + struct i965_gpe_context *gpe_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + + dri_bo_unreference(gpe_context->surface_state_binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + gpe_context->surface_state_binding_table.length, + 4096); + assert(bo); + gpe_context->surface_state_binding_table.bo = bo; + + dri_bo_unreference(gpe_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface descriptor table", + gpe_context->idrt.entry_size * gpe_context->idrt.max_entries, + 4096); + assert(bo); + gpe_context->idrt.bo = bo; + + dri_bo_unreference(gpe_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "curbe buffer", + gpe_context->curbe.length, + 4096); + assert(bo); + gpe_context->curbe.bo = bo; +} + +void +gen6_gpe_pipeline_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + intel_batchbuffer_emit_mi_flush(batch); + + i965_gpe_select(ctx, gpe_context, batch); + gen6_gpe_state_base_address(ctx, gpe_context, batch); + gen6_gpe_vfe_state(ctx, gpe_context, batch); + gen6_gpe_curbe_load(ctx, gpe_context, batch); + gen6_gpe_idrt(ctx, gpe_context, batch); +} + +static void +i965_gpe_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss3.tiled_surface = 0; + ss->ss3.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +i965_gpe_set_surface2_tiling(struct i965_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen7_gpe_set_surface_tiling(struct gen7_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen7_gpe_set_surface2_tiling(struct gen7_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen8_gpe_set_surface_tiling(struct gen8_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen8_gpe_set_surface2_tiling(struct gen8_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +i965_gpe_set_surface2_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct i965_surface_state2 *ss) +{ + int w, h, w_pitch; + unsigned int tiling, swizzle; + + assert(obj_surface->bo); + assert(obj_surface->fourcc == VA_FOURCC_NV12); + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_base_address = obj_surface->bo->offset; + /* ss1 */ + ss->ss1.cbcr_pixel_offset_v_direction = 2; + ss->ss1.width = w - 1; + ss->ss1.height = h - 1; + /* ss2 */ + ss->ss2.surface_format = MFX_SURFACE_PLANAR_420_8; + ss->ss2.interleave_chroma = 1; + ss->ss2.pitch = w_pitch - 1; + ss->ss2.half_pitch_for_chroma = 0; + i965_gpe_set_surface2_tiling(ss, tiling); + /* ss3: UV offset for interleave mode */ + ss->ss3.x_offset_for_cb = obj_surface->x_cb_offset; + ss->ss3.y_offset_for_cb = obj_surface->y_cb_offset; +} + +void +i965_gpe_surface2_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct i965_surface_state2 *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct i965_surface_state2 *)((char *)bo->virtual + surface_state_offset); + i965_gpe_set_surface2_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + surface_state_offset + offsetof(struct i965_surface_state2, ss0), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +static void +i965_gpe_set_media_rw_surface_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct i965_surface_state *ss) +{ + int w, h, w_pitch; + unsigned int tiling, swizzle; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + /* ss1 */ + ss->ss1.base_addr = obj_surface->bo->offset; + /* ss2 */ + ss->ss2.width = w / 4 - 1; /* in DWORDs for media read & write message */ + ss->ss2.height = h - 1; + /* ss3 */ + ss->ss3.pitch = w_pitch - 1; + i965_gpe_set_surface_tiling(ss, tiling); +} + +void +i965_gpe_media_rw_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct i965_surface_state *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + + ss = (struct i965_surface_state *)((char *)bo->virtual + surface_state_offset); + i965_gpe_set_media_rw_surface_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + surface_state_offset + offsetof(struct i965_surface_state, ss1), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +static void +i965_gpe_set_buffer_surface_state(VADriverContextP ctx, + struct i965_buffer_surface *buffer_surface, + struct i965_surface_state *ss) +{ + int num_entries; + + assert(buffer_surface->bo); + num_entries = buffer_surface->num_blocks * buffer_surface->size_block / buffer_surface->pitch; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.render_cache_read_mode = 1; + ss->ss0.surface_type = I965_SURFACE_BUFFER; + /* ss1 */ + ss->ss1.base_addr = buffer_surface->bo->offset; + /* ss2 */ + ss->ss2.width = ((num_entries - 1) & 0x7f); + ss->ss2.height = (((num_entries - 1) >> 7) & 0x1fff); + /* ss3 */ + ss->ss3.depth = (((num_entries - 1) >> 20) & 0x7f); + ss->ss3.pitch = buffer_surface->pitch - 1; +} + +void +i965_gpe_buffer_suface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct i965_surface_state *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct i965_surface_state *)((char *)bo->virtual + surface_state_offset); + i965_gpe_set_buffer_surface_state(ctx, buffer_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + surface_state_offset + offsetof(struct i965_surface_state, ss1), + buffer_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +static void +gen7_gpe_set_surface2_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct gen7_surface_state2 *ss) +{ + int w, h, w_pitch; + unsigned int tiling, swizzle; + + assert(obj_surface->bo); + assert(obj_surface->fourcc == VA_FOURCC_NV12); + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_base_address = obj_surface->bo->offset; + /* ss1 */ + ss->ss1.cbcr_pixel_offset_v_direction = 2; + ss->ss1.width = w - 1; + ss->ss1.height = h - 1; + /* ss2 */ + ss->ss2.surface_format = MFX_SURFACE_PLANAR_420_8; + ss->ss2.interleave_chroma = 1; + ss->ss2.pitch = w_pitch - 1; + ss->ss2.half_pitch_for_chroma = 0; + gen7_gpe_set_surface2_tiling(ss, tiling); + /* ss3: UV offset for interleave mode */ + ss->ss3.x_offset_for_cb = obj_surface->x_cb_offset; + ss->ss3.y_offset_for_cb = obj_surface->y_cb_offset; +} + +void +gen7_gpe_surface2_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen7_surface_state2 *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct gen7_surface_state2 *)((char *)bo->virtual + surface_state_offset); + gen7_gpe_set_surface2_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + surface_state_offset + offsetof(struct gen7_surface_state2, ss0), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +static void +gen7_gpe_set_media_rw_surface_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct gen7_surface_state *ss) +{ + int w, h, w_pitch; + unsigned int tiling, swizzle; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + /* ss1 */ + ss->ss1.base_addr = obj_surface->bo->offset; + /* ss2 */ + ss->ss2.width = w / 4 - 1; /* in DWORDs for media read & write message */ + ss->ss2.height = h - 1; + /* ss3 */ + ss->ss3.pitch = w_pitch - 1; + gen7_gpe_set_surface_tiling(ss, tiling); +} + +static void +gen75_gpe_set_media_chroma_surface_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct gen7_surface_state *ss) +{ + int w, w_pitch; + unsigned int tiling, swizzle; + int cbcr_offset; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + w_pitch = obj_surface->width; + + cbcr_offset = obj_surface->height * obj_surface->width; + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + /* ss1 */ + ss->ss1.base_addr = obj_surface->bo->offset + cbcr_offset; + /* ss2 */ + ss->ss2.width = w / 4 - 1; /* in DWORDs for media read & write message */ + ss->ss2.height = (obj_surface->height / 2) -1; + /* ss3 */ + ss->ss3.pitch = w_pitch - 1; + gen7_gpe_set_surface_tiling(ss, tiling); +} + +void +gen7_gpe_media_rw_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen7_surface_state *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + + ss = (struct gen7_surface_state *)((char *)bo->virtual + surface_state_offset); + gen7_gpe_set_media_rw_surface_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + surface_state_offset + offsetof(struct gen7_surface_state, ss1), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +void +gen75_gpe_media_chroma_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen7_surface_state *ss; + dri_bo *bo; + int cbcr_offset; + + assert(obj_surface->fourcc == VA_FOURCC_NV12); + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + + cbcr_offset = obj_surface->height * obj_surface->width; + ss = (struct gen7_surface_state *)((char *)bo->virtual + surface_state_offset); + gen75_gpe_set_media_chroma_surface_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + cbcr_offset, + surface_state_offset + offsetof(struct gen7_surface_state, ss1), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + + +static void +gen7_gpe_set_buffer_surface_state(VADriverContextP ctx, + struct i965_buffer_surface *buffer_surface, + struct gen7_surface_state *ss) +{ + int num_entries; + + assert(buffer_surface->bo); + num_entries = buffer_surface->num_blocks * buffer_surface->size_block / buffer_surface->pitch; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_type = I965_SURFACE_BUFFER; + /* ss1 */ + ss->ss1.base_addr = buffer_surface->bo->offset; + /* ss2 */ + ss->ss2.width = ((num_entries - 1) & 0x7f); + ss->ss2.height = (((num_entries - 1) >> 7) & 0x3fff); + /* ss3 */ + ss->ss3.depth = (((num_entries - 1) >> 21) & 0x3f); + ss->ss3.pitch = buffer_surface->pitch - 1; +} + +void +gen7_gpe_buffer_suface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen7_surface_state *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct gen7_surface_state *)((char *)bo->virtual + surface_state_offset); + gen7_gpe_set_buffer_surface_state(ctx, buffer_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + surface_state_offset + offsetof(struct gen7_surface_state, ss1), + buffer_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +static void +gen8_gpe_set_surface2_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct gen8_surface_state2 *ss) +{ + int w, h, w_pitch; + unsigned int tiling, swizzle; + + assert(obj_surface->bo); + assert(obj_surface->fourcc == VA_FOURCC_NV12); + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss6.base_addr = (uint32_t)obj_surface->bo->offset64; + ss->ss7.base_addr_high = (uint32_t)(obj_surface->bo->offset64 >> 32); + /* ss1 */ + ss->ss1.cbcr_pixel_offset_v_direction = 2; + ss->ss1.width = w - 1; + ss->ss1.height = h - 1; + /* ss2 */ + ss->ss2.surface_format = MFX_SURFACE_PLANAR_420_8; + ss->ss2.interleave_chroma = 1; + ss->ss2.pitch = w_pitch - 1; + ss->ss2.half_pitch_for_chroma = 0; + gen8_gpe_set_surface2_tiling(ss, tiling); + /* ss3: UV offset for interleave mode */ + ss->ss3.x_offset_for_cb = obj_surface->x_cb_offset; + ss->ss3.y_offset_for_cb = obj_surface->y_cb_offset; +} + +void +gen8_gpe_surface2_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen8_surface_state2 *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct gen8_surface_state2 *)((char *)bo->virtual + surface_state_offset); + gen8_gpe_set_surface2_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + surface_state_offset + offsetof(struct gen8_surface_state2, ss6), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +static void +gen8_gpe_set_media_rw_surface_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct gen8_surface_state *ss) +{ + int w, h, w_pitch; + unsigned int tiling, swizzle; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + h = obj_surface->orig_height; + w_pitch = obj_surface->width; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + /* ss1 */ + ss->ss8.base_addr = (uint32_t)obj_surface->bo->offset64; + ss->ss9.base_addr_high = (uint32_t)(obj_surface->bo->offset64 >> 32); + /* ss2 */ + ss->ss2.width = w / 4 - 1; /* in DWORDs for media read & write message */ + ss->ss2.height = h - 1; + /* ss3 */ + ss->ss3.pitch = w_pitch - 1; + gen8_gpe_set_surface_tiling(ss, tiling); +} + +static void +gen8_gpe_set_media_chroma_surface_state(VADriverContextP ctx, + struct object_surface *obj_surface, + struct gen8_surface_state *ss) +{ + int w, w_pitch; + unsigned int tiling, swizzle; + int cbcr_offset; + uint64_t base_offset; + + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + w = obj_surface->orig_width; + w_pitch = obj_surface->width; + + cbcr_offset = obj_surface->height * obj_surface->width; + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_type = I965_SURFACE_2D; + ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; + /* ss1 */ + base_offset = obj_surface->bo->offset64 + cbcr_offset; + ss->ss8.base_addr = (uint32_t) base_offset; + ss->ss9.base_addr_high = (uint32_t) (base_offset >> 32); + /* ss2 */ + ss->ss2.width = w / 4 - 1; /* in DWORDs for media read & write message */ + ss->ss2.height = (obj_surface->height / 2) -1; + /* ss3 */ + ss->ss3.pitch = w_pitch - 1; + gen8_gpe_set_surface_tiling(ss, tiling); +} + +void +gen8_gpe_media_rw_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen8_surface_state *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + + ss = (struct gen8_surface_state *)((char *)bo->virtual + surface_state_offset); + gen8_gpe_set_media_rw_surface_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + 0, + surface_state_offset + offsetof(struct gen8_surface_state, ss8), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +void +gen8_gpe_media_chroma_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen8_surface_state *ss; + dri_bo *bo; + int cbcr_offset; + + assert(obj_surface->fourcc == VA_FOURCC_NV12); + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + + cbcr_offset = obj_surface->height * obj_surface->width; + ss = (struct gen8_surface_state *)((char *)bo->virtual + surface_state_offset); + gen8_gpe_set_media_chroma_surface_state(ctx, obj_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, 0, + cbcr_offset, + surface_state_offset + offsetof(struct gen8_surface_state, ss8), + obj_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + + +static void +gen8_gpe_set_buffer_surface_state(VADriverContextP ctx, + struct i965_buffer_surface *buffer_surface, + struct gen8_surface_state *ss) +{ + int num_entries; + + assert(buffer_surface->bo); + num_entries = buffer_surface->num_blocks * buffer_surface->size_block / buffer_surface->pitch; + + memset(ss, 0, sizeof(*ss)); + /* ss0 */ + ss->ss0.surface_type = I965_SURFACE_BUFFER; + /* ss1 */ + ss->ss8.base_addr = (uint32_t)buffer_surface->bo->offset64; + ss->ss9.base_addr_high = (uint32_t)(buffer_surface->bo->offset64 >> 32); + /* ss2 */ + ss->ss2.width = ((num_entries - 1) & 0x7f); + ss->ss2.height = (((num_entries - 1) >> 7) & 0x3fff); + /* ss3 */ + ss->ss3.depth = (((num_entries - 1) >> 21) & 0x3f); + ss->ss3.pitch = buffer_surface->pitch - 1; +} + +void +gen8_gpe_buffer_suface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset) +{ + struct gen8_surface_state *ss; + dri_bo *bo; + + bo = gpe_context->surface_state_binding_table.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + + ss = (struct gen8_surface_state *)((char *)bo->virtual + surface_state_offset); + gen8_gpe_set_buffer_surface_state(ctx, buffer_surface, ss); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + surface_state_offset + offsetof(struct gen8_surface_state, ss8), + buffer_surface->bo); + + *((unsigned int *)((char *)bo->virtual + binding_table_offset)) = surface_state_offset; + dri_bo_unmap(bo); +} + +static void +gen8_gpe_state_base_address(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 16); + + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 14); + + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //General State Base Address + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /*DW4 Surface state base address */ + OUT_RELOC64(batch, gpe_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + + /*DW6. Dynamic state base address */ + if (gpe_context->dynamic_state.bo) + OUT_RELOC64(batch, gpe_context->dynamic_state.bo, + I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, + 0, BASE_ADDRESS_MODIFY); + else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + } + + + /*DW8. Indirect Object base address */ + if (gpe_context->indirect_state.bo) + OUT_RELOC64(batch, gpe_context->indirect_state.bo, + I915_GEM_DOMAIN_SAMPLER, + 0, BASE_ADDRESS_MODIFY); + else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + } + + + /*DW10. Instruct base address */ + if (gpe_context->instruction_state.bo) + OUT_RELOC64(batch, gpe_context->instruction_state.bo, + I915_GEM_DOMAIN_INSTRUCTION, + 0, BASE_ADDRESS_MODIFY); + else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + } + + /* DW12. Size limitation */ + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //General State Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Dynamic State Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Indirect Object Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Instruction Access Upper Bound + + /* + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //LLC Coherent Base Address + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY ); //LLC Coherent Upper Bound + */ + + ADVANCE_BATCH(batch); +} + +static void +gen8_gpe_vfe_state(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + + BEGIN_BATCH(batch, 9); + + OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | (9 - 2)); + /* Scratch Space Base Pointer and Space */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, + gpe_context->vfe_state.max_num_threads << 16 | /* Maximum Number of Threads */ + gpe_context->vfe_state.num_urb_entries << 8 | /* Number of URB Entries */ + gpe_context->vfe_state.gpgpu_mode << 2); /* MEDIA Mode */ + OUT_BATCH(batch, 0); /* Debug: Object ID */ + OUT_BATCH(batch, + gpe_context->vfe_state.urb_entry_size << 16 | /* URB Entry Allocation Size */ + gpe_context->vfe_state.curbe_allocation_size); /* CURBE Allocation Size */ + + /* the vfe_desc5/6/7 will decide whether the scoreboard is used. */ + OUT_BATCH(batch, gpe_context->vfe_desc5.dword); + OUT_BATCH(batch, gpe_context->vfe_desc6.dword); + OUT_BATCH(batch, gpe_context->vfe_desc7.dword); + + ADVANCE_BATCH(batch); + +} + + +static void +gen8_gpe_curbe_load(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 4); + + OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, gpe_context->curbe_size); + OUT_BATCH(batch, gpe_context->curbe_offset); + + ADVANCE_BATCH(batch); +} + +static void +gen8_gpe_idrt(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 6); + + OUT_BATCH(batch, CMD_MEDIA_STATE_FLUSH); + OUT_BATCH(batch, 0); + + OUT_BATCH(batch, CMD_MEDIA_INTERFACE_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, gpe_context->idrt_size); + OUT_BATCH(batch, gpe_context->idrt_offset); + + ADVANCE_BATCH(batch); +} + + +void +gen8_gpe_pipeline_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + intel_batchbuffer_emit_mi_flush(batch); + + i965_gpe_select(ctx, gpe_context, batch); + gen8_gpe_state_base_address(ctx, gpe_context, batch); + gen8_gpe_vfe_state(ctx, gpe_context, batch); + gen8_gpe_curbe_load(ctx, gpe_context, batch); + gen8_gpe_idrt(ctx, gpe_context, batch); +} + +void +gen8_gpe_context_init(VADriverContextP ctx, + struct i965_gpe_context *gpe_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + dri_bo *bo; + int bo_size; + unsigned int start_offset, end_offset; + + dri_bo_unreference(gpe_context->surface_state_binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + gpe_context->surface_state_binding_table.length, + 4096); + assert(bo); + gpe_context->surface_state_binding_table.bo = bo; + + bo_size = gpe_context->idrt_size + gpe_context->curbe_size + gpe_context->sampler_size + 192; + dri_bo_unreference(gpe_context->dynamic_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + bo_size, + 4096); + assert(bo); + gpe_context->dynamic_state.bo = bo; + gpe_context->dynamic_state.bo_size = bo_size; + + end_offset = 0; + gpe_context->dynamic_state.end_offset = 0; + + /* Constant buffer offset */ + start_offset = ALIGN(end_offset, 64); + gpe_context->curbe_offset = start_offset; + end_offset = start_offset + gpe_context->curbe_size; + + /* Interface descriptor offset */ + start_offset = ALIGN(end_offset, 64); + gpe_context->idrt_offset = start_offset; + end_offset = start_offset + gpe_context->idrt_size; + + /* Sampler state offset */ + start_offset = ALIGN(end_offset, 64); + gpe_context->sampler_offset = start_offset; + end_offset = start_offset + gpe_context->sampler_size; + + /* update the end offset of dynamic_state */ + gpe_context->dynamic_state.end_offset = end_offset; +} + + +void +gen8_gpe_context_destroy(struct i965_gpe_context *gpe_context) +{ + dri_bo_unreference(gpe_context->surface_state_binding_table.bo); + gpe_context->surface_state_binding_table.bo = NULL; + + dri_bo_unreference(gpe_context->instruction_state.bo); + gpe_context->instruction_state.bo = NULL; + + dri_bo_unreference(gpe_context->dynamic_state.bo); + gpe_context->dynamic_state.bo = NULL; + + dri_bo_unreference(gpe_context->indirect_state.bo); + gpe_context->indirect_state.bo = NULL; + +} + + +void +gen8_gpe_load_kernels(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_kernel *kernel_list, + unsigned int num_kernels) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + int i, kernel_size; + unsigned int kernel_offset, end_offset; + unsigned char *kernel_ptr; + struct i965_kernel *kernel; + + assert(num_kernels <= MAX_GPE_KERNELS); + memcpy(gpe_context->kernels, kernel_list, sizeof(*kernel_list) * num_kernels); + gpe_context->num_kernels = num_kernels; + + kernel_size = num_kernels * 64; + for (i = 0; i < num_kernels; i++) { + kernel = &gpe_context->kernels[i]; + + kernel_size += kernel->size; + } + + gpe_context->instruction_state.bo = dri_bo_alloc(i965->intel.bufmgr, + "kernel shader", + kernel_size, + 0x1000); + if (gpe_context->instruction_state.bo == NULL) { + WARN_ONCE("failure to allocate the buffer space for kernel shader\n"); + return; + } + + assert(gpe_context->instruction_state.bo); + + gpe_context->instruction_state.bo_size = kernel_size; + gpe_context->instruction_state.end_offset = 0; + end_offset = 0; + + dri_bo_map(gpe_context->instruction_state.bo, 1); + kernel_ptr = (unsigned char *)(gpe_context->instruction_state.bo->virtual); + for (i = 0; i < num_kernels; i++) { + kernel_offset = ALIGN(end_offset, 64); + kernel = &gpe_context->kernels[i]; + kernel->kernel_offset = kernel_offset; + + if (kernel->size) { + memcpy(kernel_ptr + kernel_offset, kernel->bin, kernel->size); + + end_offset = kernel_offset + kernel->size; + } + } + + gpe_context->instruction_state.end_offset = end_offset; + + dri_bo_unmap(gpe_context->instruction_state.bo); + + return; +} + +static void +gen9_gpe_state_base_address(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 19); + + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (19 - 2)); + + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); //General State Base Address + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + + /*DW4 Surface state base address */ + OUT_RELOC64(batch, gpe_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + + /*DW6. Dynamic state base address */ + if (gpe_context->dynamic_state.bo) + OUT_RELOC64(batch, gpe_context->dynamic_state.bo, + I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER, + I915_GEM_DOMAIN_RENDER, BASE_ADDRESS_MODIFY); + else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + } + + + /*DW8. Indirect Object base address */ + if (gpe_context->indirect_state.bo) + OUT_RELOC64(batch, gpe_context->indirect_state.bo, + I915_GEM_DOMAIN_SAMPLER, + 0, BASE_ADDRESS_MODIFY); + else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + } + + + /*DW10. Instruct base address */ + if (gpe_context->instruction_state.bo) + OUT_RELOC64(batch, gpe_context->instruction_state.bo, + I915_GEM_DOMAIN_INSTRUCTION, + 0, BASE_ADDRESS_MODIFY); + else { + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + } + + + /* DW12. Size limitation */ + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //General State Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Dynamic State Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Indirect Object Access Upper Bound + OUT_BATCH(batch, 0xFFFFF000 | BASE_ADDRESS_MODIFY); //Instruction Access Upper Bound + + /* the bindless surface state address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0xFFFFF000); + + ADVANCE_BATCH(batch); +} + +static void +gen9_gpe_select(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA | + GEN9_PIPELINE_SELECTION_MASK | + GEN9_MEDIA_DOP_GATE_OFF | + GEN9_MEDIA_DOP_GATE_MASK | + GEN9_FORCE_MEDIA_AWAKE_ON | + GEN9_FORCE_MEDIA_AWAKE_MASK); + ADVANCE_BATCH(batch); +} + +void +gen9_gpe_pipeline_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + intel_batchbuffer_emit_mi_flush(batch); + + gen9_gpe_select(ctx, gpe_context, batch); + gen9_gpe_state_base_address(ctx, gpe_context, batch); + gen8_gpe_vfe_state(ctx, gpe_context, batch); + gen8_gpe_curbe_load(ctx, gpe_context, batch); + gen8_gpe_idrt(ctx, gpe_context, batch); +} + +void +gen9_gpe_pipeline_end(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA | + GEN9_PIPELINE_SELECTION_MASK | + GEN9_MEDIA_DOP_GATE_ON | + GEN9_MEDIA_DOP_GATE_MASK | + GEN9_FORCE_MEDIA_AWAKE_OFF | + GEN9_FORCE_MEDIA_AWAKE_MASK); + ADVANCE_BATCH(batch); +} + +Bool +i965_allocate_gpe_resource(dri_bufmgr *bufmgr, + struct i965_gpe_resource *res, + int size, + const char *name) +{ + if (!res || !size) + return false; + + res->size = size; + res->bo = dri_bo_alloc(bufmgr, name, res->size, 4096); + res->map = NULL; + + return (res->bo != NULL); +} + +void +i965_object_surface_to_2d_gpe_resource(struct i965_gpe_resource *res, + struct object_surface *obj_surface) +{ + unsigned int swizzle; + + res->type = I965_GPE_RESOURCE_2D; + res->width = obj_surface->orig_width; + res->height = obj_surface->orig_height; + res->pitch = obj_surface->width; + res->size = obj_surface->size; + res->cb_cr_pitch = obj_surface->cb_cr_pitch; + res->x_cb_offset = obj_surface->x_cb_offset; + res->y_cb_offset = obj_surface->y_cb_offset; + res->bo = obj_surface->bo; + res->map = NULL; + + dri_bo_reference(res->bo); + dri_bo_get_tiling(obj_surface->bo, &res->tiling, &swizzle); +} + +void +i965_dri_object_to_buffer_gpe_resource(struct i965_gpe_resource *res, + dri_bo *bo) +{ + unsigned int swizzle; + + res->type = I965_GPE_RESOURCE_BUFFER; + res->width = bo->size; + res->height = 1; + res->pitch = res->width; + res->size = res->pitch * res->width; + res->bo = bo; + res->map = NULL; + + dri_bo_reference(res->bo); + dri_bo_get_tiling(res->bo, &res->tiling, &swizzle); +} + +void +i965_gpe_dri_object_to_2d_gpe_resource(struct i965_gpe_resource *res, + dri_bo *bo, + unsigned int width, + unsigned int height, + unsigned int pitch) +{ + unsigned int swizzle; + + res->type = I965_GPE_RESOURCE_2D; + res->width = width; + res->height = height; + res->pitch = pitch; + res->size = res->pitch * res->width; + res->bo = bo; + res->map = NULL; + + dri_bo_reference(res->bo); + dri_bo_get_tiling(res->bo, &res->tiling, &swizzle); +} + +void +i965_zero_gpe_resource(struct i965_gpe_resource *res) +{ + if (res->bo) { + dri_bo_map(res->bo, 1); + memset(res->bo->virtual, 0, res->size); + dri_bo_unmap(res->bo); + } +} + +void +i965_free_gpe_resource(struct i965_gpe_resource *res) +{ + dri_bo_unreference(res->bo); + res->bo = NULL; + res->map = NULL; +} + +void * +i965_map_gpe_resource(struct i965_gpe_resource *res) +{ + int ret; + + if (res->bo) { + ret = dri_bo_map(res->bo, 1); + + if (ret == 0) + res->map = res->bo->virtual; + else + res->map = NULL; + } else + res->map = NULL; + + return res->map; +} + +void +i965_unmap_gpe_resource(struct i965_gpe_resource *res) +{ + if (res->bo && res->map) + dri_bo_unmap(res->bo); + + res->map = NULL; +} + +void +gen9_gpe_mi_flush_dw(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_flush_dw_parameter *params) +{ + int video_pipeline_cache_invalidate = 0; + int post_sync_operation = MI_FLUSH_DW_NOWRITE; + + if (params->video_pipeline_cache_invalidate) + video_pipeline_cache_invalidate = MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE; + + if (params->bo) + post_sync_operation = MI_FLUSH_DW_WRITE_QWORD; + + __OUT_BATCH(batch, (MI_FLUSH_DW2 | + video_pipeline_cache_invalidate | + post_sync_operation | + (5 - 2))); /* Always use PPGTT */ + + if (params->bo) { + __OUT_RELOC64(batch, + params->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + params->offset); + } else { + __OUT_BATCH(batch, 0); + __OUT_BATCH(batch, 0); + } + + __OUT_BATCH(batch, params->dw0); + __OUT_BATCH(batch, params->dw1); +} + +void +gen9_gpe_mi_store_data_imm(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_store_data_imm_parameter *params) +{ + if (params->is_qword) { + __OUT_BATCH(batch, MI_STORE_DATA_IMM | + (1 << 21) | + (5 - 2)); /* Always use PPGTT */ + } else { + __OUT_BATCH(batch, MI_STORE_DATA_IMM | (4 - 2)); /* Always use PPGTT */ + } + + __OUT_RELOC64(batch, + params->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + params->offset); + __OUT_BATCH(batch, params->dw0); + + if (params->is_qword) + __OUT_BATCH(batch, params->dw1); +} + +void +gen9_gpe_mi_store_register_mem(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_store_register_mem_parameter *params) +{ + __OUT_BATCH(batch, (MI_STORE_REGISTER_MEM | (4 - 2))); /* Always use PPGTT */ + __OUT_BATCH(batch, params->mmio_offset); + __OUT_RELOC64(batch, + params->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + params->offset); +} + +void +gen9_gpe_mi_load_register_mem(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_load_register_mem_parameter *params) +{ + __OUT_BATCH(batch, (MI_LOAD_REGISTER_MEM | (4 - 2))); /* Always use PPGTT */ + __OUT_BATCH(batch, params->mmio_offset); + __OUT_RELOC64(batch, + params->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + params->offset); +} + +void +gen9_gpe_mi_load_register_imm(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_load_register_imm_parameter *params) +{ + __OUT_BATCH(batch, (MI_LOAD_REGISTER_IMM | (3 - 2))); + __OUT_BATCH(batch, params->mmio_offset); + __OUT_BATCH(batch, params->data); +} + +void +gen9_gpe_mi_load_register_reg(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_load_register_reg_parameter *params) +{ + __OUT_BATCH(batch, (MI_LOAD_REGISTER_REG | (3 - 2))); + __OUT_BATCH(batch, params->src_mmio_offset); + __OUT_BATCH(batch, params->dst_mmio_offset); +} + +void +gen9_gpe_mi_math(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_math_parameter *params) +{ + __OUT_BATCH(batch, (MI_MATH | (params->num_instructions - 1))); + intel_batchbuffer_data(batch, params->instruction_list, params->num_instructions * 4); +} + +void +gen9_gpe_mi_conditional_batch_buffer_end(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_conditional_batch_buffer_end_parameter *params) +{ + int compare_mask_mode_enabled = MI_COMPARE_MASK_MODE_ENANBLED; + + if (params->compare_mask_mode_disabled) + compare_mask_mode_enabled = 0; + + __OUT_BATCH(batch, (MI_CONDITIONAL_BATCH_BUFFER_END | + (1 << 21) | + compare_mask_mode_enabled | + (4 - 2))); /* Always use PPGTT */ + __OUT_BATCH(batch, params->compare_data); + __OUT_RELOC64(batch, + params->bo, + I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, + params->offset); +} + +void +gen9_gpe_mi_batch_buffer_start(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_batch_buffer_start_parameter *params) +{ + __OUT_BATCH(batch, (MI_BATCH_BUFFER_START | + (!!params->is_second_level << 22) | + (!params->use_global_gtt << 8) | + (1 << 0))); + __OUT_RELOC64(batch, + params->bo, + I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION, 0, + params->offset); +} + +void +gen8_gpe_context_set_dynamic_buffer(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct gpe_dynamic_state_parameter *ds) +{ + if (!ds->bo || !gpe_context) + return; + + dri_bo_unreference(gpe_context->dynamic_state.bo); + gpe_context->dynamic_state.bo = ds->bo; + dri_bo_reference(gpe_context->dynamic_state.bo); + gpe_context->dynamic_state.bo_size = ds->bo_size; + + gpe_context->curbe_offset = ds->curbe_offset; + gpe_context->idrt_offset = ds->idrt_offset; + gpe_context->sampler_offset = ds->sampler_offset; + + return; +} + +void * +gen8p_gpe_context_map_curbe(struct i965_gpe_context *gpe_context) +{ + dri_bo_map(gpe_context->dynamic_state.bo, 1); + + return (char *)gpe_context->dynamic_state.bo->virtual + gpe_context->curbe_offset; +} + +void +gen8p_gpe_context_unmap_curbe(struct i965_gpe_context *gpe_context) +{ + dri_bo_unmap(gpe_context->dynamic_state.bo); +} + +void +gen9_gpe_reset_binding_table(VADriverContextP ctx, + struct i965_gpe_context *gpe_context) +{ + unsigned int *binding_table; + unsigned int binding_table_offset = gpe_context->surface_state_binding_table.binding_table_offset; + int i; + + dri_bo_map(gpe_context->surface_state_binding_table.bo, 1); + binding_table = (unsigned int*)((char *)gpe_context->surface_state_binding_table.bo->virtual + binding_table_offset); + + for (i = 0; i < gpe_context->surface_state_binding_table.max_entries; i++) { + *(binding_table + i) = gpe_context->surface_state_binding_table.surface_state_offset + i * SURFACE_STATE_PADDED_SIZE_GEN9; + } + + dri_bo_unmap(gpe_context->surface_state_binding_table.bo); +} + +void +gen8_gpe_setup_interface_data(VADriverContextP ctx, + struct i965_gpe_context *gpe_context) +{ + struct gen8_interface_descriptor_data *desc; + int i; + dri_bo *bo; + unsigned char *desc_ptr; + + bo = gpe_context->dynamic_state.bo; + dri_bo_map(bo, 1); + assert(bo->virtual); + desc_ptr = (unsigned char *)bo->virtual + gpe_context->idrt_offset; + desc = (struct gen8_interface_descriptor_data *)desc_ptr; + + for (i = 0; i < gpe_context->num_kernels; i++) { + struct i965_kernel *kernel; + + kernel = &gpe_context->kernels[i]; + assert(sizeof(*desc) == 32); + + /*Setup the descritor table*/ + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = kernel->kernel_offset >> 6; + desc->desc3.sampler_count = 0; + desc->desc3.sampler_state_pointer = gpe_context->sampler_offset; + desc->desc4.binding_table_entry_count = 0; + desc->desc4.binding_table_pointer = (gpe_context->surface_state_binding_table.binding_table_offset >> 5); + desc->desc5.constant_urb_entry_read_offset = 0; + desc->desc5.constant_urb_entry_read_length = ALIGN(gpe_context->curbe.length, 32) >> 5; // in registers + + desc++; + } + + dri_bo_unmap(bo); +} + +static void +gen9_gpe_set_surface_tiling(struct gen9_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen9_gpe_set_surface2_tiling(struct gen9_surface_state2 *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} + +static void +gen9_gpe_set_2d_surface_state(struct gen9_surface_state *ss, + unsigned int cacheability_control, + unsigned int format, + unsigned int tiling, + unsigned int width, + unsigned int height, + unsigned int pitch, + uint64_t base_offset, + unsigned int y_offset) +{ + memset(ss, 0, sizeof(*ss)); + + /* Always set 1(align 4 mode) */ + ss->ss0.vertical_alignment = 1; + ss->ss0.horizontal_alignment = 1; + + ss->ss0.surface_format = format; + ss->ss0.surface_type = I965_SURFACE_2D; + + ss->ss1.surface_mocs = cacheability_control; + + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + + ss->ss3.pitch = pitch - 1; + + ss->ss5.y_offset = y_offset; + + ss->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; + ss->ss7.shader_chanel_select_b = HSW_SCS_BLUE; + ss->ss7.shader_chanel_select_g = HSW_SCS_GREEN; + ss->ss7.shader_chanel_select_r = HSW_SCS_RED; + + ss->ss8.base_addr = (uint32_t)base_offset; + ss->ss9.base_addr_high = (uint32_t)(base_offset >> 32); + + gen9_gpe_set_surface_tiling(ss, tiling); +} + +/* This is only for NV12 format */ +static void +gen9_gpe_set_adv_surface_state(struct gen9_surface_state2 *ss, + unsigned int v_direction, + unsigned int cacheability_control, + unsigned int format, + unsigned int tiling, + unsigned int width, + unsigned int height, + unsigned int pitch, + uint64_t base_offset, + unsigned int y_cb_offset) +{ + memset(ss, 0, sizeof(*ss)); + + ss->ss1.cbcr_pixel_offset_v_direction = v_direction; + ss->ss1.width = width - 1; + ss->ss1.height = height - 1; + + ss->ss2.surface_format = format; + ss->ss2.interleave_chroma = 1; + ss->ss2.pitch = pitch - 1; + + ss->ss3.y_offset_for_cb = y_cb_offset; + + ss->ss5.surface_object_mocs = cacheability_control; + + ss->ss6.base_addr = (uint32_t)base_offset; + ss->ss7.base_addr_high = (uint32_t)(base_offset >> 32); + + gen9_gpe_set_surface2_tiling(ss, tiling); +} + +static void +gen9_gpe_set_buffer2_surface_state(struct gen9_surface_state *ss, + unsigned int cacheability_control, + unsigned int format, + unsigned int size, + unsigned int pitch, + uint64_t base_offset) +{ + memset(ss, 0, sizeof(*ss)); + + ss->ss0.surface_format = format; + ss->ss0.surface_type = I965_SURFACE_BUFFER; + + ss->ss1.surface_mocs = cacheability_control; + + ss->ss2.width = (size - 1) & 0x7F; + ss->ss2.height = ((size - 1) & 0x1FFF80) >> 7; + + ss->ss3.depth = ((size - 1) & 0xFE00000) >> 21; + ss->ss3.pitch = pitch - 1; + + ss->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; + ss->ss7.shader_chanel_select_b = HSW_SCS_BLUE; + ss->ss7.shader_chanel_select_g = HSW_SCS_GREEN; + ss->ss7.shader_chanel_select_r = HSW_SCS_RED; + + ss->ss8.base_addr = (uint32_t)base_offset; + ss->ss9.base_addr_high = (uint32_t)(base_offset >> 32); +} + +void +gen9_gpe_context_add_surface(struct i965_gpe_context *gpe_context, + struct i965_gpe_surface *gpe_surface, + int index) +{ + char *buf; + unsigned int tiling, swizzle, width, height, pitch, tile_alignment, y_offset = 0; + unsigned int surface_state_offset = gpe_context->surface_state_binding_table.surface_state_offset + + index * SURFACE_STATE_PADDED_SIZE_GEN9; + unsigned int binding_table_offset = gpe_context->surface_state_binding_table.binding_table_offset + + index * 4; + struct i965_gpe_resource *gpe_resource = gpe_surface->gpe_resource; + + dri_bo_get_tiling(gpe_resource->bo, &tiling, &swizzle); + + dri_bo_map(gpe_context->surface_state_binding_table.bo, 1); + buf = (char *)gpe_context->surface_state_binding_table.bo->virtual; + *((unsigned int *)(buf + binding_table_offset)) = surface_state_offset; + + if (gpe_surface->is_2d_surface && gpe_surface->is_uv_surface) { + unsigned int cbcr_offset; + struct gen9_surface_state *ss = (struct gen9_surface_state *)(buf + surface_state_offset); + + width = gpe_resource->width; + height = gpe_resource->height / 2; + pitch = gpe_resource->pitch; + + if (gpe_surface->is_media_block_rw) + width = (ALIGN(width, 4) >> 2); + + if (tiling == I915_TILING_Y) { + tile_alignment = 32; + } else if (tiling == I915_TILING_X) { + tile_alignment = 8; + } else + tile_alignment = 1; + + y_offset = (gpe_resource->y_cb_offset % tile_alignment); + cbcr_offset = ALIGN_FLOOR(gpe_resource->y_cb_offset, tile_alignment) * pitch; + + gen9_gpe_set_2d_surface_state(ss, + gpe_surface->cacheability_control, + I965_SURFACEFORMAT_R16_UINT, + tiling, + width, height, pitch, + gpe_resource->bo->offset64 + cbcr_offset, + y_offset); + + dri_bo_emit_reloc(gpe_context->surface_state_binding_table.bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + cbcr_offset, + surface_state_offset + offsetof(struct gen9_surface_state, ss8), + gpe_resource->bo); + } else if (gpe_surface->is_2d_surface) { + struct gen9_surface_state *ss = (struct gen9_surface_state *)(buf + surface_state_offset); + + width = gpe_resource->width; + height = gpe_resource->height; + pitch = gpe_resource->pitch; + + if (gpe_surface->is_media_block_rw) + width = (ALIGN(width, 4) >> 2); + + gen9_gpe_set_2d_surface_state(ss, + gpe_surface->cacheability_control, + gpe_surface->format, + tiling, + width, height, pitch, + gpe_resource->bo->offset64, + y_offset); + + dri_bo_emit_reloc(gpe_context->surface_state_binding_table.bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + surface_state_offset + offsetof(struct gen9_surface_state, ss8), + gpe_resource->bo); + } else if (gpe_surface->is_adv_surface) { + struct gen9_surface_state2 *ss = (struct gen9_surface_state2 *)(buf + surface_state_offset); + + width = gpe_resource->width; + height = gpe_resource->height; + pitch = gpe_resource->pitch; + + gen9_gpe_set_adv_surface_state(ss, + gpe_surface->v_direction, + gpe_surface->cacheability_control, + MFX_SURFACE_PLANAR_420_8, + tiling, + width, height, pitch, + gpe_resource->bo->offset64, + gpe_resource->y_cb_offset); + + dri_bo_emit_reloc(gpe_context->surface_state_binding_table.bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0, + surface_state_offset + offsetof(struct gen9_surface_state2, ss6), + gpe_resource->bo); + } else { + struct gen9_surface_state *ss = (struct gen9_surface_state *)(buf + surface_state_offset); + unsigned int format; + + assert(gpe_surface->is_buffer); + + if (gpe_surface->is_raw_buffer) { + format = I965_SURFACEFORMAT_RAW; + pitch = 1; + } else { + format = I965_SURFACEFORMAT_R32_UINT; + pitch = sizeof(unsigned int); + } + + gen9_gpe_set_buffer2_surface_state(ss, + gpe_surface->cacheability_control, + format, + gpe_surface->size, + pitch, + gpe_resource->bo->offset64 + gpe_surface->offset); + + dri_bo_emit_reloc(gpe_context->surface_state_binding_table.bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + gpe_surface->offset, + surface_state_offset + offsetof(struct gen9_surface_state, ss8), + gpe_resource->bo); + } + + dri_bo_unmap(gpe_context->surface_state_binding_table.bo); +} + +bool +i965_gpe_allocate_2d_resource(dri_bufmgr *bufmgr, + struct i965_gpe_resource *res, + int width, + int height, + int pitch, + const char *name) +{ + int bo_size; + + if (!res) + return false; + + res->type = I965_GPE_RESOURCE_2D; + res->width = width; + res->height = height; + res->pitch = pitch; + + bo_size = ALIGN(height, 16) * pitch; + res->size = bo_size; + + res->bo = dri_bo_alloc(bufmgr, name, res->size, 4096); + res->map = NULL; + + return true; +} + +void +gen8_gpe_media_state_flush(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch) +{ + BEGIN_BATCH(batch, 2); + + OUT_BATCH(batch, CMD_MEDIA_STATE_FLUSH | (2 - 2)); + OUT_BATCH(batch, 0); + + ADVANCE_BATCH(batch); +} + +void +gen8_gpe_media_object(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch, + struct gpe_media_object_parameter *param) +{ + int batch_size, subdata_size; + + batch_size = 6; + subdata_size = 0; + if (param->pinline_data && param->inline_size) { + subdata_size = ALIGN(param->inline_size, 4); + batch_size += subdata_size / 4; + } + BEGIN_BATCH(batch, batch_size); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | (batch_size - 2)); + OUT_BATCH(batch, param->interface_offset); + OUT_BATCH(batch, param->use_scoreboard << 21); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, (param->scoreboard_y << 16 | + param->scoreboard_x)); + OUT_BATCH(batch, param->scoreboard_mask); + + if (subdata_size) + intel_batchbuffer_data(batch, param->pinline_data, subdata_size); + + ADVANCE_BATCH(batch); +} + +void +gen9_gpe_media_object_walker(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch, + struct gpe_media_object_walker_parameter *param) +{ + int walker_length; + + walker_length = 17; + if (param->inline_size) + walker_length += ALIGN(param->inline_size, 4) / 4; + BEGIN_BATCH(batch, walker_length); + OUT_BATCH(batch, CMD_MEDIA_OBJECT_WALKER | (walker_length - 2)); + OUT_BATCH(batch, param->interface_offset); + OUT_BATCH(batch, param->use_scoreboard << 21); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, (param->group_id_loop_select << 8 | + param->scoreboard_mask)); // DW5 + OUT_BATCH(batch, (param->color_count_minus1 << 24 | + param->middle_loop_extra_steps << 16 | + param->mid_loop_unit_y << 12 | + param->mid_loop_unit_x << 8)); + OUT_BATCH(batch, ((param->global_loop_exec_count & 0x3ff) << 16 | + (param->local_loop_exec_count & 0x3ff))); + OUT_BATCH(batch, param->block_resolution.value); + OUT_BATCH(batch, param->local_start.value); + OUT_BATCH(batch, 0); // DW10 + OUT_BATCH(batch, param->local_outer_loop_stride.value); + OUT_BATCH(batch, param->local_inner_loop_unit.value); + OUT_BATCH(batch, param->global_resolution.value); + OUT_BATCH(batch, param->global_start.value); + OUT_BATCH(batch, param->global_outer_loop_stride.value); + OUT_BATCH(batch, param->global_inner_loop_unit.value); + + if (param->pinline_data && param->inline_size) + intel_batchbuffer_data(batch, param->pinline_data, ALIGN(param->inline_size, 4)); + + ADVANCE_BATCH(batch); +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_gpe_utils.h intel-vaapi-driver-1.7.1/src/i965_gpe_utils.h --- intel-vaapi-driver-1.0.15/src/i965_gpe_utils.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_gpe_utils.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,505 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#ifndef _I965_GPE_UTILS_H_ +#define _I965_GPE_UTILS_H_ + +#include +#include + +#include "i965_defines.h" +#include "i965_drv_video.h" +#include "i965_structs.h" + +#define MAX_GPE_KERNELS 32 + +struct i965_buffer_surface +{ + dri_bo *bo; + unsigned int num_blocks; + unsigned int size_block; + unsigned int pitch; +}; + +enum { + I965_GPE_RESOURCE_BUFFER = 0, + I965_GPE_RESOURCE_2D +}; + +struct i965_gpe_resource +{ + dri_bo *bo; + char *map; + uint32_t type; + uint32_t width; + uint32_t height; + uint32_t pitch; + uint32_t size; + uint32_t tiling; + uint32_t cb_cr_pitch; + uint32_t x_cb_offset; + uint32_t y_cb_offset; +}; + +struct gpe_dynamic_state_parameter +{ + dri_bo *bo; + int bo_size; + unsigned int curbe_offset; + unsigned int idrt_offset; + unsigned int sampler_offset; +}; + +struct i965_gpe_context +{ + struct { + dri_bo *bo; + unsigned int length; /* in bytes */ + unsigned int max_entries; + unsigned int binding_table_offset; + unsigned int surface_state_offset; + } surface_state_binding_table; + + struct { + dri_bo *bo; + unsigned int max_entries; + unsigned int entry_size; /* in bytes */ + } idrt; + + struct { + dri_bo *bo; + unsigned int length; /* in bytes */ + } curbe; + + struct { + unsigned int gpgpu_mode : 1; + unsigned int pad0 : 7; + unsigned int max_num_threads : 16; + unsigned int num_urb_entries : 8; + unsigned int urb_entry_size : 16; + unsigned int curbe_allocation_size : 16; + } vfe_state; + + /* vfe_desc5/6/7 is used to determine whether the HW scoreboard is used. + * If scoreboard is not used, don't touch them + */ + union { + unsigned int dword; + struct { + unsigned int mask:8; + unsigned int pad:22; + unsigned int type:1; + unsigned int enable:1; + } scoreboard0; + }vfe_desc5; + + union { + unsigned int dword; + struct { + int delta_x0:4; + int delta_y0:4; + int delta_x1:4; + int delta_y1:4; + int delta_x2:4; + int delta_y2:4; + int delta_x3:4; + int delta_y3:4; + } scoreboard1; + } vfe_desc6; + + union { + unsigned int dword; + struct { + int delta_x4:4; + int delta_y4:4; + int delta_x5:4; + int delta_y5:4; + int delta_x6:4; + int delta_y6:4; + int delta_x7:4; + int delta_y7:4; + } scoreboard2; + } vfe_desc7; + + unsigned int num_kernels; + struct i965_kernel kernels[MAX_GPE_KERNELS]; + + struct { + dri_bo *bo; + int bo_size; + unsigned int end_offset; + } instruction_state; + + struct { + dri_bo *bo; + } indirect_state; + + struct { + dri_bo *bo; + int bo_size; + unsigned int end_offset; + } dynamic_state; + + unsigned int sampler_offset; + int sampler_entries; + int sampler_size; + unsigned int idrt_offset; + int idrt_size; + unsigned int curbe_offset; + int curbe_size; +}; + +struct gpe_mi_flush_dw_parameter +{ + dri_bo *bo; + unsigned int offset; + unsigned int video_pipeline_cache_invalidate; + unsigned int dw0; + unsigned int dw1; +}; + +struct gpe_mi_store_data_imm_parameter +{ + dri_bo *bo; + unsigned int is_qword; + unsigned int offset; + unsigned int dw0; + unsigned int dw1; +}; + +struct gpe_mi_store_register_mem_parameter +{ + dri_bo *bo; + unsigned int offset; + unsigned int mmio_offset; +}; + +struct gpe_mi_load_register_mem_parameter +{ + dri_bo *bo; + unsigned int offset; + unsigned int mmio_offset; +}; + +struct gpe_mi_load_register_imm_parameter +{ + unsigned int data; + unsigned int mmio_offset; +}; + +struct gpe_mi_load_register_reg_parameter +{ + unsigned int src_mmio_offset; + unsigned int dst_mmio_offset; +}; + +struct gpe_mi_math_parameter +{ + unsigned int num_instructions; + unsigned int *instruction_list; +}; + +struct gpe_mi_conditional_batch_buffer_end_parameter +{ + dri_bo *bo; + unsigned int offset; + unsigned int compare_mask_mode_disabled; + unsigned int compare_data; +}; + +struct gpe_mi_batch_buffer_start_parameter +{ + dri_bo *bo; + unsigned int offset; + unsigned int is_second_level; + unsigned int use_global_gtt; +}; + +void i965_gpe_context_destroy(struct i965_gpe_context *gpe_context); +void i965_gpe_context_init(VADriverContextP ctx, + struct i965_gpe_context *gpe_context); +void i965_gpe_load_kernels(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_kernel *kernel_list, + unsigned int num_kernels); +void gen6_gpe_pipeline_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch); +void i965_gpe_surface2_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +void i965_gpe_media_rw_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +void i965_gpe_buffer_suface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +void gen7_gpe_surface2_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +void gen7_gpe_media_rw_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +void gen7_gpe_buffer_suface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +void gen75_gpe_media_chroma_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); + +extern void gen8_gpe_surface2_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +extern void gen8_gpe_media_rw_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +extern void gen8_gpe_buffer_suface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_buffer_surface *buffer_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); +extern void gen8_gpe_media_chroma_surface_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct object_surface *obj_surface, + unsigned long binding_table_offset, + unsigned long surface_state_offset); + +void gen8_gpe_pipeline_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch); +extern void +gen8_gpe_context_set_dynamic_buffer(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct gpe_dynamic_state_parameter *ds); + + +void gen8_gpe_context_destroy(struct i965_gpe_context *gpe_context); +void gen8_gpe_context_init(VADriverContextP ctx, + struct i965_gpe_context *gpe_context); + +void gen8_gpe_load_kernels(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct i965_kernel *kernel_list, + unsigned int num_kernels); + +void gen9_gpe_pipeline_setup(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch); + +void gen9_gpe_pipeline_end(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch); + +Bool i965_allocate_gpe_resource(dri_bufmgr *bufmgr, + struct i965_gpe_resource *res, + int size, + const char *name); + +void i965_object_surface_to_2d_gpe_resource(struct i965_gpe_resource *res, + struct object_surface *obj_surface); + +void i965_dri_object_to_buffer_gpe_resource(struct i965_gpe_resource *res, + dri_bo *bo); + +void i965_gpe_dri_object_to_2d_gpe_resource(struct i965_gpe_resource *res, + dri_bo *bo, + unsigned int width, + unsigned int height, + unsigned int pitch); + +void i965_zero_gpe_resource(struct i965_gpe_resource *res); + +void i965_free_gpe_resource(struct i965_gpe_resource *res); + +void *i965_map_gpe_resource(struct i965_gpe_resource *res); + +void i965_unmap_gpe_resource(struct i965_gpe_resource *res); + +void gen9_gpe_mi_flush_dw(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_flush_dw_parameter *params); + +void gen9_gpe_mi_store_data_imm(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_store_data_imm_parameter *params); + +void gen9_gpe_mi_store_register_mem(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_store_register_mem_parameter *params); + +void gen9_gpe_mi_load_register_mem(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_load_register_mem_parameter *params); + +void gen9_gpe_mi_load_register_imm(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_load_register_imm_parameter *params); + +void gen9_gpe_mi_load_register_reg(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_load_register_reg_parameter *params); + +void gen9_gpe_mi_math(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_math_parameter *params); + +void gen9_gpe_mi_conditional_batch_buffer_end(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_conditional_batch_buffer_end_parameter *params); + +void gen9_gpe_mi_batch_buffer_start(VADriverContextP ctx, + struct intel_batchbuffer *batch, + struct gpe_mi_batch_buffer_start_parameter *params); + + +struct gpe_media_object_parameter +{ + unsigned int use_scoreboard; + unsigned int scoreboard_x; + unsigned int scoreboard_y; + unsigned int scoreboard_mask; + unsigned int interface_offset; + void *pinline_data; + unsigned int inline_size; +}; + +struct i965_gpe_surface +{ + unsigned int is_buffer:1; + unsigned int is_2d_surface:1; + unsigned int is_adv_surface:1; + unsigned int is_uv_surface:1; + unsigned int is_media_block_rw:1; + unsigned int is_raw_buffer:1; + + unsigned int vert_line_stride_offset; + unsigned int vert_line_stride; + unsigned int cacheability_control; + unsigned int format; // 2d surface only + unsigned int v_direction; // adv surface only + unsigned int size; // buffer only + unsigned int offset; // buffer only + + struct i965_gpe_resource *gpe_resource; +}; + +extern void +gen9_gpe_reset_binding_table(VADriverContextP ctx, + struct i965_gpe_context *gpe_context); +extern +void *gen8p_gpe_context_map_curbe(struct i965_gpe_context *gpe_context); + +extern +void gen8p_gpe_context_unmap_curbe(struct i965_gpe_context *gpe_context); + +extern +void gen8_gpe_setup_interface_data(VADriverContextP ctx, + struct i965_gpe_context *gpe_context); +extern void +gen9_gpe_context_add_surface(struct i965_gpe_context *gpe_context, + struct i965_gpe_surface *gpe_surface, + int index); + +extern bool +i965_gpe_allocate_2d_resource(dri_bufmgr *bufmgr, + struct i965_gpe_resource *res, + int width, + int height, + int pitch, + const char *name); + +struct gpe_walker_xy +{ + union { + struct { + unsigned int x:16; + unsigned int y:16; + }; + unsigned int value; + }; +}; + +struct gpe_media_object_walker_parameter +{ + void *pinline_data; + unsigned int inline_size; + unsigned int interface_offset; + unsigned int use_scoreboard; + unsigned int scoreboard_mask; + unsigned int group_id_loop_select; + unsigned int color_count_minus1; + unsigned int mid_loop_unit_x; + unsigned int mid_loop_unit_y; + unsigned int middle_loop_extra_steps; + unsigned int local_loop_exec_count; + unsigned int global_loop_exec_count; + struct gpe_walker_xy block_resolution; + struct gpe_walker_xy local_start; + struct gpe_walker_xy local_end; + struct gpe_walker_xy local_outer_loop_stride; + struct gpe_walker_xy local_inner_loop_unit; + struct gpe_walker_xy global_resolution; + struct gpe_walker_xy global_start; + struct gpe_walker_xy global_outer_loop_stride; + struct gpe_walker_xy global_inner_loop_unit; +}; + +extern void +gen8_gpe_media_object(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch, + struct gpe_media_object_parameter *param); + +extern void +gen8_gpe_media_state_flush(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch); + +extern void +gen9_gpe_media_object_walker(VADriverContextP ctx, + struct i965_gpe_context *gpe_context, + struct intel_batchbuffer *batch, + struct gpe_media_object_walker_parameter *param); + +#endif /* _I965_GPE_UTILS_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_media.c intel-vaapi-driver-1.7.1/src/i965_media.c --- intel-vaapi-driver-1.0.15/src/i965_media.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_media.c 2016-06-03 06:05:58.000000000 +0000 @@ -32,8 +32,6 @@ #include #include -#include - #include "intel_batchbuffer.h" #include "intel_driver.h" #include "i965_defines.h" @@ -42,6 +40,7 @@ #include "i965_media.h" #include "i965_media_mpeg2.h" #include "i965_media_h264.h" +#include "i965_decoder_utils.h" static void i965_media_pipeline_select(VADriverContextP ctx, struct i965_media_context *media_context) @@ -61,7 +60,7 @@ unsigned int vfe_fence, cs_fence; vfe_fence = media_context->urb.cs_start; - cs_fence = URB_SIZE((&i965->intel)); + cs_fence = i965->intel.device_info->urb_size; BEGIN_BATCH(batch, 3); OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); @@ -78,7 +77,7 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = media_context->base.batch; - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { BEGIN_BATCH(batch, 8); OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); @@ -258,7 +257,7 @@ i965_media_mpeg2_decode_init(ctx, decode_state, media_context); break; - case VAProfileH264Baseline: + case VAProfileH264ConstrainedBaseline: case VAProfileH264Main: case VAProfileH264High: i965_media_h264_decode_init(ctx, decode_state, media_context); @@ -270,20 +269,31 @@ } } -static void +static VAStatus i965_media_decode_picture(VADriverContextP ctx, VAProfile profile, union codec_state *codec_state, struct hw_context *hw_context) { struct i965_media_context *media_context = (struct i965_media_context *)hw_context; - struct decode_state *decode_state = &codec_state->dec; + struct decode_state *decode_state = &codec_state->decode; + VAStatus vaStatus; + + vaStatus = intel_decoder_sanity_check_input(ctx, profile, decode_state); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; i965_media_decode_init(ctx, profile, decode_state, media_context); assert(media_context->media_states_setup); media_context->media_states_setup(ctx, decode_state, media_context); i965_media_pipeline_setup(ctx, decode_state, media_context); intel_batchbuffer_flush(hw_context->batch); + + vaStatus = VA_STATUS_SUCCESS; + +out: + return vaStatus; } static void @@ -323,22 +333,23 @@ } struct hw_context * -g4x_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +g4x_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) { struct intel_driver_data *intel = intel_driver_data(ctx); struct i965_media_context *media_context = calloc(1, sizeof(struct i965_media_context)); + assert(media_context); media_context->base.destroy = i965_media_context_destroy; media_context->base.run = i965_media_decode_picture; - media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); - switch (profile) { + switch (obj_config->profile) { case VAProfileMPEG2Simple: case VAProfileMPEG2Main: i965_media_mpeg2_dec_context_init(ctx, media_context); break; - case VAProfileH264Baseline: + case VAProfileH264ConstrainedBaseline: case VAProfileH264Main: case VAProfileH264High: case VAProfileVC1Simple: @@ -353,22 +364,23 @@ } struct hw_context * -ironlake_dec_hw_context_init(VADriverContextP ctx, VAProfile profile) +ironlake_dec_hw_context_init(VADriverContextP ctx, struct object_config *obj_config) { struct intel_driver_data *intel = intel_driver_data(ctx); struct i965_media_context *media_context = calloc(1, sizeof(struct i965_media_context)); + assert(media_context); media_context->base.destroy = i965_media_context_destroy; media_context->base.run = i965_media_decode_picture; - media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER); + media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); - switch (profile) { + switch (obj_config->profile) { case VAProfileMPEG2Simple: case VAProfileMPEG2Main: i965_media_mpeg2_dec_context_init(ctx, media_context); break; - case VAProfileH264Baseline: + case VAProfileH264ConstrainedBaseline: case VAProfileH264Main: case VAProfileH264High: i965_media_h264_dec_context_init(ctx, media_context); diff -Nru intel-vaapi-driver-1.0.15/src/i965_media_h264.c intel-vaapi-driver-1.7.1/src/i965_media_h264.c --- intel-vaapi-driver-1.0.15/src/i965_media_h264.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_media_h264.c 2016-06-03 06:05:58.000000000 +0000 @@ -11,6 +11,7 @@ #include "i965_drv_video.h" #include "i965_media.h" #include "i965_media_h264.h" +#include "i965_decoder_utils.h" enum { INTRA_16X16 = 0, @@ -339,12 +340,11 @@ struct decode_state *decode_state, struct i965_media_context *media_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_h264_context *i965_h264_context; struct object_surface *obj_surface; VAPictureParameterBufferH264 *pic_param; VAPictureH264 *va_pic; - int i, j, w, h; + int i, w, h; int field_picture; assert(media_context->private_context); @@ -355,9 +355,7 @@ /* Target Picture */ va_pic = &pic_param->CurrPic; - assert(!(va_pic->flags & VA_PICTURE_H264_INVALID)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface); + obj_surface = decode_state->render_object; w = obj_surface->width; h = obj_surface->height; field_picture = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); @@ -378,24 +376,15 @@ /* Reference Pictures */ for (i = 0; i < ARRAY_ELEMS(i965_h264_context->fsid_list); i++) { - if (i965_h264_context->fsid_list[i].surface_id != VA_INVALID_ID) { - int found = 0; - for (j = 0; j < ARRAY_ELEMS(pic_param->ReferenceFrames); j++) { - va_pic = &pic_param->ReferenceFrames[j]; - - if (va_pic->flags & VA_PICTURE_H264_INVALID) - continue; - - if (va_pic->picture_id == i965_h264_context->fsid_list[i].surface_id) { - found = 1; - break; - } - } + struct object_surface * const obj_surface = + i965_h264_context->fsid_list[i].obj_surface; - assert(found == 1); + if (obj_surface) { + const VAPictureH264 * const va_pic = avc_find_picture( + obj_surface->base.id, pic_param->ReferenceFrames, + ARRAY_ELEMS(pic_param->ReferenceFrames)); - obj_surface = SURFACE(va_pic->picture_id); - assert(obj_surface); + assert(va_pic != NULL); w = obj_surface->width; h = obj_surface->height; field_picture = !!(va_pic->flags & (VA_PICTURE_H264_TOP_FIELD | VA_PICTURE_H264_BOTTOM_FIELD)); @@ -855,7 +844,8 @@ sizeof(h264_avc_kernels_gen5[0]))); assert(NUM_AVC_MC_INTERFACES == (sizeof(avc_mc_kernel_offset_gen5) / sizeof(avc_mc_kernel_offset_gen5[0]))); - if (IS_IRONLAKE(i965->intel.device_id)) { + assert(i965_h264_context); + if (IS_IRONLAKE(i965->intel.device_info)) { memcpy(i965_h264_context->avc_kernels, h264_avc_kernels_gen5, sizeof(i965_h264_context->avc_kernels)); avc_mc_kernel_offset = avc_mc_kernel_offset_gen5; intra_kernel_header = &intra_kernel_header_gen5; @@ -889,7 +879,7 @@ media_context->free_private_context = i965_media_h264_free_private_context; /* URB */ - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { media_context->urb.num_vfe_entries = 63; } else { media_context->urb.num_vfe_entries = 23; @@ -904,7 +894,7 @@ media_context->urb.cs_start = media_context->urb.vfe_start + media_context->urb.num_vfe_entries * media_context->urb.size_vfe_entry; assert(media_context->urb.cs_start + - media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= i965->intel.device_info->urb_size); /* hook functions */ media_context->media_states_setup = i965_media_h264_states_setup; diff -Nru intel-vaapi-driver-1.0.15/src/i965_media_h264.h intel-vaapi-driver-1.7.1/src/i965_media_h264.h --- intel-vaapi-driver-1.0.15/src/i965_media_h264.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_media_h264.h 2016-06-03 06:05:58.000000000 +0000 @@ -4,6 +4,7 @@ #include "i965_avc_bsd.h" #include "i965_avc_hw_scoreboard.h" #include "i965_avc_ildb.h" +#include "i965_decoder.h" struct decode_state; struct i965_media_context; @@ -60,10 +61,8 @@ struct i965_avc_hw_scoreboard_context avc_hw_scoreboard_context; struct i965_avc_ildb_context avc_ildb_context; - struct { - VASurfaceID surface_id; - int frame_store_id; - } fsid_list[16]; + GenFrameStoreContext fs_ctx; + GenFrameStore fsid_list[MAX_GEN_REFERENCE_FRAMES]; struct i965_kernel avc_kernels[NUM_H264_AVC_KERNELS]; struct intel_batchbuffer *batch; diff -Nru intel-vaapi-driver-1.0.15/src/i965_media_mpeg2.c intel-vaapi-driver-1.7.1/src/i965_media_mpeg2.c --- intel-vaapi-driver-1.0.15/src/i965_media_mpeg2.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_media_mpeg2.c 2016-06-03 06:05:58.000000000 +0000 @@ -32,12 +32,11 @@ #include #include -#include - #include "intel_batchbuffer.h" #include "intel_driver.h" #include "i965_defines.h" #include "i965_drv_video.h" +#include "i965_decoder_utils.h" #include "i965_media.h" #include "i965_media_mpeg2.h" @@ -516,7 +515,7 @@ int w = obj_surface->width; int h = obj_surface->height; - i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('I','4','2','0')); + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC_I420, SUBSAMPLE_YUV420); if (picture_structure == MPEG_FRAME) { i965_media_mpeg2_surface_state(ctx, base_index + 0, obj_surface, @@ -595,21 +594,21 @@ struct decode_state *decode_state, struct i965_media_context *media_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); struct object_surface *obj_surface; VAPictureParameterBufferMPEG2 *param; assert(decode_state->pic_param && decode_state->pic_param->buffer); param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; - obj_surface = SURFACE(decode_state->current_render_target); - assert(obj_surface); + obj_surface = decode_state->render_object; + i965_media_mpeg2_surface_setup(ctx, 0, obj_surface, True, param->picture_coding_extension.bits.picture_structure, SURFACE_TARGET, media_context); - obj_surface = SURFACE(param->forward_reference_picture); + obj_surface = decode_state->reference_objects[0]; + if (!obj_surface) { // assert(param->picture_coding_type == 1); /* I-picture */ } else { @@ -617,11 +616,13 @@ param->picture_coding_extension.bits.picture_structure, SURFACE_FORWARD, media_context); - obj_surface = SURFACE(param->backward_reference_picture); + + obj_surface = decode_state->reference_objects[1]; + if (!obj_surface) { assert(param->picture_coding_type == 2); /* P-picture */ - obj_surface = SURFACE(param->forward_reference_picture); + obj_surface = decode_state->reference_objects[0]; i965_media_mpeg2_surface_setup(ctx, 7, obj_surface, False, param->picture_coding_extension.bits.picture_structure, SURFACE_BACKWARD, @@ -881,6 +882,7 @@ struct decode_state *decode_state, struct i965_media_context *media_context) { + struct i965_mpeg2_context * const i965_mpeg2_context = media_context->private_context; struct intel_batchbuffer *batch = media_context->base.batch; VASliceParameterBufferMPEG2 *slice_param; VAPictureParameterBufferMPEG2 *pic_param; @@ -889,6 +891,10 @@ assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer; + if (i965_mpeg2_context->wa_slice_vertical_position < 0) + i965_mpeg2_context->wa_slice_vertical_position = + mpeg2_wa_slice_vertical_position(decode_state, pic_param); + for (j = 0; j < decode_state->num_slice_params; j++) { assert(decode_state->slice_params[j] && decode_state->slice_params[j]->buffer); assert(decode_state->slice_datas[j] && decode_state->slice_datas[j]->bo); @@ -897,8 +903,9 @@ for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) { int vpos, hpos, is_field_pic = 0; - if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || - pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD) + if (i965_mpeg2_context->wa_slice_vertical_position > 0 && + (pic_param->picture_coding_extension.bits.picture_structure == MPEG_TOP_FIELD || + pic_param->picture_coding_extension.bits.picture_structure == MPEG_BOTTOM_FIELD)) is_field_pic = 1; assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL); @@ -972,6 +979,8 @@ int i; i965_mpeg2_context = calloc(1, sizeof(struct i965_mpeg2_context)); + assert(i965_mpeg2_context); + i965_mpeg2_context->wa_slice_vertical_position = -1; /* kernel */ assert(NUM_MPEG2_VLD_KERNELS == (sizeof(mpeg2_vld_kernels_gen4) / @@ -980,7 +989,7 @@ sizeof(mpeg2_vld_kernels_gen5[0]))); assert(NUM_MPEG2_VLD_KERNELS <= MAX_INTERFACE_DESC); - if (IS_IRONLAKE(i965->intel.device_id)) + if (IS_IRONLAKE(i965->intel.device_info)) memcpy(i965_mpeg2_context->vld_kernels, mpeg2_vld_kernels_gen5, sizeof(i965_mpeg2_context->vld_kernels)); else memcpy(i965_mpeg2_context->vld_kernels, mpeg2_vld_kernels_gen4, sizeof(i965_mpeg2_context->vld_kernels)); @@ -1005,7 +1014,7 @@ media_context->urb.cs_start = media_context->urb.vfe_start + media_context->urb.num_vfe_entries * media_context->urb.size_vfe_entry; assert(media_context->urb.cs_start + - media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); + media_context->urb.num_cs_entries * media_context->urb.size_cs_entry <= i965->intel.device_info->urb_size); /* hook functions */ media_context->media_states_setup = i965_media_mpeg2_states_setup; diff -Nru intel-vaapi-driver-1.0.15/src/i965_media_mpeg2.h intel-vaapi-driver-1.7.1/src/i965_media_mpeg2.h --- intel-vaapi-driver-1.0.15/src/i965_media_mpeg2.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_media_mpeg2.h 2016-04-14 07:44:40.000000000 +0000 @@ -44,6 +44,7 @@ { struct i965_kernel vld_kernels[NUM_MPEG2_VLD_KERNELS]; VAIQMatrixBufferMPEG2 iq_matrix; + int wa_slice_vertical_position; }; void i965_media_mpeg2_decode_init(VADriverContextP ctx, struct decode_state * decode_state, struct i965_media_context *media_context); diff -Nru intel-vaapi-driver-1.0.15/src/i965_output_dri.c intel-vaapi-driver-1.7.1/src/i965_output_dri.c --- intel-vaapi-driver-1.0.15/src/i965_output_dri.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_output_dri.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,197 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sysdeps.h" + +#include + +#include "i965_drv_video.h" +#include "i965_output_dri.h" +#include "dso_utils.h" + +#define LIBVA_X11_NAME "libva-x11.so.1" + +typedef struct dri_drawable *(*dri_get_drawable_func)( + VADriverContextP ctx, XID drawable); +typedef union dri_buffer *(*dri_get_rendering_buffer_func)( + VADriverContextP ctx, struct dri_drawable *d); +typedef void (*dri_swap_buffer_func)( + VADriverContextP ctx, struct dri_drawable *d); + +struct dri_vtable { + dri_get_drawable_func get_drawable; + dri_get_rendering_buffer_func get_rendering_buffer; + dri_swap_buffer_func swap_buffer; +}; + +struct va_dri_output { + struct dso_handle *handle; + struct dri_vtable vtable; +}; + +bool +i965_output_dri_init(VADriverContextP ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct dso_handle *dso_handle; + struct dri_vtable *dri_vtable; + + static const struct dso_symbol symbols[] = { + { "dri_get_drawable", + offsetof(struct dri_vtable, get_drawable) }, + { "dri_get_rendering_buffer", + offsetof(struct dri_vtable, get_rendering_buffer) }, + { "dri_swap_buffer", + offsetof(struct dri_vtable, swap_buffer) }, + { NULL, } + }; + + i965->dri_output = calloc(1, sizeof(struct va_dri_output)); + if (!i965->dri_output) + goto error; + + i965->dri_output->handle = dso_open(LIBVA_X11_NAME); + if (!i965->dri_output->handle) + goto error; + + dso_handle = i965->dri_output->handle; + dri_vtable = &i965->dri_output->vtable; + if (!dso_get_symbols(dso_handle, dri_vtable, sizeof(*dri_vtable), symbols)) + goto error; + return true; + +error: + i965_output_dri_terminate(ctx); + return false; +} + +void +i965_output_dri_terminate(VADriverContextP ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct va_dri_output * const dri_output = i965->dri_output; + + if (!dri_output) + return; + + if (dri_output->handle) { + dso_close(dri_output->handle); + dri_output->handle = NULL; + } + + free(dri_output); + i965->dri_output = NULL; +} + +VAStatus +i965_put_surface_dri( + VADriverContextP ctx, + VASurfaceID surface, + void *draw, + const VARectangle *src_rect, + const VARectangle *dst_rect, + const VARectangle *cliprects, + unsigned int num_cliprects, + unsigned int flags +) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct dri_vtable * const dri_vtable = &i965->dri_output->vtable; + struct i965_render_state * const render_state = &i965->render_state; + struct dri_drawable *dri_drawable; + union dri_buffer *buffer; + struct intel_region *dest_region; + struct object_surface *obj_surface; + uint32_t name; + int i, ret; + + /* Currently don't support DRI1 */ + if (!VA_CHECK_DRM_AUTH_TYPE(ctx, VA_DRM_AUTH_DRI2)) + return VA_STATUS_ERROR_UNKNOWN; + + /* Some broken sources such as H.264 conformance case FM2_SVA_C + * will get here + */ + obj_surface = SURFACE(surface); + ASSERT_RET(obj_surface && obj_surface->bo, VA_STATUS_SUCCESS); + + _i965LockMutex(&i965->render_mutex); + + dri_drawable = dri_vtable->get_drawable(ctx, (Drawable)draw); + assert(dri_drawable); + + buffer = dri_vtable->get_rendering_buffer(ctx, dri_drawable); + assert(buffer); + + dest_region = render_state->draw_region; + if (dest_region == NULL) { + dest_region = (struct intel_region *)calloc(1, sizeof(*dest_region)); + assert(dest_region); + render_state->draw_region = dest_region; + } + + if (dest_region->bo) { + dri_bo_flink(dest_region->bo, &name); + if (buffer->dri2.name != name) { + dri_bo_unreference(dest_region->bo); + dest_region->bo = NULL; + } + } + + if (dest_region->bo == NULL) { + dest_region->cpp = buffer->dri2.cpp; + dest_region->pitch = buffer->dri2.pitch; + + dest_region->bo = intel_bo_gem_create_from_name(i965->intel.bufmgr, "rendering buffer", buffer->dri2.name); + assert(dest_region->bo); + + ret = dri_bo_get_tiling(dest_region->bo, &(dest_region->tiling), &(dest_region->swizzle)); + assert(ret == 0); + } + + dest_region->x = dri_drawable->x; + dest_region->y = dri_drawable->y; + dest_region->width = dri_drawable->width; + dest_region->height = dri_drawable->height; + + if (!(flags & VA_SRC_COLOR_MASK)) + flags |= VA_SRC_BT601; + + intel_render_put_surface(ctx, obj_surface, src_rect, dst_rect, flags); + + for (i = 0; i < I965_MAX_SUBPIC_SUM; i++) { + if (obj_surface->obj_subpic[i] != NULL) { + assert(obj_surface->subpic[i] != VA_INVALID_ID); + obj_surface->subpic_render_idx = i; + intel_render_put_subpicture(ctx, obj_surface, src_rect, dst_rect); + } + } + + if (!(g_intel_debug_option_flags & VA_INTEL_DEBUG_OPTION_BENCH)) + dri_vtable->swap_buffer(ctx, dri_drawable); + + _i965UnlockMutex(&i965->render_mutex); + + return VA_STATUS_SUCCESS; +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_output_dri.h intel-vaapi-driver-1.7.1/src/i965_output_dri.h --- intel-vaapi-driver-1.0.15/src/i965_output_dri.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_output_dri.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef I965_OUTPUT_DRI_H +#define I965_OUTPUT_DRI_H + +#include +#include + +bool +i965_output_dri_init(VADriverContextP ctx); + +void +i965_output_dri_terminate(VADriverContextP ctx); + +VAStatus +i965_put_surface_dri( + VADriverContextP ctx, + VASurfaceID surface, + void *draw, + const VARectangle *src_rect, + const VARectangle *dst_rect, + const VARectangle *cliprects, + unsigned int num_cliprects, + unsigned int flags +); + +#endif /* I965_OUTPUT_DRI_H */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_output_wayland.c intel-vaapi-driver-1.7.1/src/i965_output_wayland.c --- intel-vaapi-driver-1.0.15/src/i965_output_wayland.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_output_wayland.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,424 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "intel_driver.h" +#include "i965_output_wayland.h" +#include "i965_drv_video.h" +#include "i965_defines.h" +#include "dso_utils.h" + +#define LIBEGL_NAME "libEGL.so.1" +#define LIBWAYLAND_CLIENT_NAME "libwayland-client.so.0" + +typedef uint32_t (*wl_display_get_global_func)(struct wl_display *display, + const char *interface, uint32_t version); +typedef void (*wl_display_roundtrip_func)(struct wl_display *display); + +typedef struct wl_proxy *(*wl_proxy_create_func)(struct wl_proxy *factory, + const struct wl_interface *interface); +typedef void (*wl_proxy_destroy_func)(struct wl_proxy *proxy); +typedef void (*wl_proxy_marshal_func)(struct wl_proxy *p, uint32_t opcode, ...); +typedef int (*wl_proxy_add_listener_func) (struct wl_proxy *proxy, + void (**implementation)(void), void *data); + +struct wl_vtable { + const struct wl_interface *buffer_interface; + const struct wl_interface *drm_interface; + const struct wl_interface *registry_interface; + wl_display_roundtrip_func display_roundtrip; + wl_proxy_create_func proxy_create; + wl_proxy_destroy_func proxy_destroy; + wl_proxy_marshal_func proxy_marshal; + wl_proxy_add_listener_func proxy_add_listener; +}; + +struct va_wl_output { + struct dso_handle *libegl_handle; + struct dso_handle *libwl_client_handle; + struct wl_vtable vtable; + struct wl_drm *wl_drm; + struct wl_registry *wl_registry; +}; + +/* These function are copied and adapted from the version inside + * wayland-client-protocol.h + */ +static void * +registry_bind( + struct wl_vtable *wl_vtable, + struct wl_registry *wl_registry, + uint32_t name, + const struct wl_interface *interface, + uint32_t version +) +{ + struct wl_proxy *id; + + id = wl_vtable->proxy_create((struct wl_proxy *) wl_registry, + interface); + if (!id) + return NULL; + + wl_vtable->proxy_marshal((struct wl_proxy *) wl_registry, + WL_REGISTRY_BIND, name, interface->name, + version, id); + + return (void *) id; +} + +static struct wl_registry * +display_get_registry( + struct wl_vtable *wl_vtable, + struct wl_display *wl_display +) +{ + struct wl_proxy *callback; + + callback = wl_vtable->proxy_create((struct wl_proxy *) wl_display, + wl_vtable->registry_interface); + if (!callback) + return NULL; + + wl_vtable->proxy_marshal((struct wl_proxy *) wl_display, + WL_DISPLAY_GET_REGISTRY, callback); + + return (struct wl_registry *) callback; +} + +static int +registry_add_listener( + struct wl_vtable *wl_vtable, + struct wl_registry *wl_registry, + const struct wl_registry_listener *listener, + void *data +) +{ + return wl_vtable->proxy_add_listener((struct wl_proxy *) wl_registry, + (void (**)(void)) listener, data); +} + +static void +registry_handle_global( + void *data, + struct wl_registry *registry, + uint32_t id, + const char *interface, + uint32_t version +) +{ + VADriverContextP ctx = data; + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct va_wl_output * const wl_output = i965->wl_output; + struct wl_vtable * const wl_vtable = &wl_output->vtable; + + if (strcmp(interface, "wl_drm") == 0) { + wl_output->wl_drm = registry_bind(wl_vtable, wl_output->wl_registry, + id, wl_vtable->drm_interface, 1); + } +} + +static const struct wl_registry_listener registry_listener = { + registry_handle_global, + NULL +}; + +/* Ensure wl_drm instance is created */ +static bool +ensure_wl_output(VADriverContextP ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct va_wl_output * const wl_output = i965->wl_output; + struct wl_vtable * const wl_vtable = &wl_output->vtable; + + if (wl_output->wl_drm) + return true; + + wl_output->wl_registry = display_get_registry(wl_vtable, ctx->native_dpy); + registry_add_listener(wl_vtable, wl_output->wl_registry, + ®istry_listener, ctx); + wl_vtable->display_roundtrip(ctx->native_dpy); + if (!wl_output->wl_drm) + return false; + return true; +} + +/* Create planar YUV buffer */ +static struct wl_buffer * +create_planar_buffer( + struct va_wl_output *wl_output, + uint32_t name, + int32_t width, + int32_t height, + uint32_t format, + int32_t offsets[3], + int32_t pitches[3] +) +{ + struct wl_vtable * const wl_vtable = &wl_output->vtable; + struct wl_proxy *id; + + id = wl_vtable->proxy_create( + (struct wl_proxy *)wl_output->wl_drm, + wl_vtable->buffer_interface + ); + if (!id) + return NULL; + + wl_vtable->proxy_marshal( + (struct wl_proxy *)wl_output->wl_drm, + WL_DRM_CREATE_PLANAR_BUFFER, + id, + name, + width, height, format, + offsets[0], pitches[0], + offsets[1], pitches[1], + offsets[2], pitches[2] + ); + return (struct wl_buffer *)id; +} + +/* Hook to return Wayland buffer associated with the VA surface */ +static VAStatus +va_GetSurfaceBufferWl( + struct VADriverContext *ctx, + VASurfaceID surface, + unsigned int flags, + struct wl_buffer **out_buffer +) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct object_surface *obj_surface; + struct wl_buffer *buffer; + uint32_t name, drm_format; + int offsets[3], pitches[3]; + + obj_surface = SURFACE(surface); + if (!obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + if (flags != VA_FRAME_PICTURE) + return VA_STATUS_ERROR_FLAG_NOT_SUPPORTED; + + if (!out_buffer) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + if (!ensure_wl_output(ctx)) + return VA_STATUS_ERROR_INVALID_DISPLAY; + + if (drm_intel_bo_flink(obj_surface->bo, &name) != 0) + return VA_STATUS_ERROR_INVALID_SURFACE; + + switch (obj_surface->fourcc) { + case VA_FOURCC_NV12: + drm_format = WL_DRM_FORMAT_NV12; + offsets[0] = 0; + pitches[0] = obj_surface->width; + offsets[1] = obj_surface->width * obj_surface->y_cb_offset; + pitches[1] = obj_surface->cb_cr_pitch; + offsets[2] = 0; + pitches[2] = 0; + break; + case VA_FOURCC_YV12: + case VA_FOURCC_I420: + case VA_FOURCC_IMC1: + case VA_FOURCC_IMC3: + case VA_FOURCC_422H: + case VA_FOURCC_422V: + case VA_FOURCC_411P: + case VA_FOURCC_444P: + switch (obj_surface->subsampling) { + case SUBSAMPLE_YUV411: + drm_format = WL_DRM_FORMAT_YUV411; + break; + case SUBSAMPLE_YUV420: + drm_format = WL_DRM_FORMAT_YUV420; + break; + case SUBSAMPLE_YUV422H: + case SUBSAMPLE_YUV422V: + drm_format = WL_DRM_FORMAT_YUV422; + break; + case SUBSAMPLE_YUV444: + drm_format = WL_DRM_FORMAT_YUV444; + break; + default: + assert(0 && "unsupported subsampling"); + return VA_STATUS_ERROR_INVALID_IMAGE_FORMAT; + } + offsets[0] = 0; + pitches[0] = obj_surface->width; + offsets[1] = obj_surface->width * obj_surface->y_cb_offset; + pitches[1] = obj_surface->cb_cr_pitch; + offsets[2] = obj_surface->width * obj_surface->y_cr_offset; + pitches[2] = obj_surface->cb_cr_pitch; + break; + default: + assert(0 && "unsupported format"); + return VA_STATUS_ERROR_INVALID_IMAGE_FORMAT; + } + + buffer = create_planar_buffer( + i965->wl_output, + name, + obj_surface->orig_width, + obj_surface->orig_height, + drm_format, + offsets, + pitches + ); + if (!buffer) + return VA_STATUS_ERROR_ALLOCATION_FAILED; + + *out_buffer = buffer; + return VA_STATUS_SUCCESS; +} + +/* Hook to return Wayland buffer associated with the VA image */ +static VAStatus +va_GetImageBufferWl( + struct VADriverContext *ctx, + VAImageID image, + unsigned int flags, + struct wl_buffer **out_buffer +) +{ + return VA_STATUS_ERROR_UNIMPLEMENTED; +} + +bool +ensure_driver_vtable(VADriverContextP ctx) +{ + struct VADriverVTableWayland * const vtable = ctx->vtable_wayland; + + if (!vtable) + return false; + + vtable->vaGetSurfaceBufferWl = va_GetSurfaceBufferWl; + vtable->vaGetImageBufferWl = va_GetImageBufferWl; + return true; +} + +bool +i965_output_wayland_init(VADriverContextP ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct dso_handle *dso_handle; + struct wl_vtable *wl_vtable; + + static const struct dso_symbol libegl_symbols[] = { + { "wl_drm_interface", + offsetof(struct wl_vtable, drm_interface) }, + { NULL, } + }; + + static const struct dso_symbol libwl_client_symbols[] = { + { "wl_buffer_interface", + offsetof(struct wl_vtable, buffer_interface) }, + { "wl_registry_interface", + offsetof(struct wl_vtable, registry_interface) }, + { "wl_display_roundtrip", + offsetof(struct wl_vtable, display_roundtrip) }, + { "wl_proxy_create", + offsetof(struct wl_vtable, proxy_create) }, + { "wl_proxy_destroy", + offsetof(struct wl_vtable, proxy_destroy) }, + { "wl_proxy_marshal", + offsetof(struct wl_vtable, proxy_marshal) }, + { "wl_proxy_add_listener", + offsetof(struct wl_vtable, proxy_add_listener) }, + { NULL, } + }; + + if (ctx->display_type != VA_DISPLAY_WAYLAND) + return false; + + i965->wl_output = calloc(1, sizeof(struct va_wl_output)); + if (!i965->wl_output) + goto error; + + i965->wl_output->libegl_handle = dso_open(LIBEGL_NAME); + if (!i965->wl_output->libegl_handle) + goto error; + + dso_handle = i965->wl_output->libegl_handle; + wl_vtable = &i965->wl_output->vtable; + if (!dso_get_symbols(dso_handle, wl_vtable, sizeof(*wl_vtable), + libegl_symbols)) + goto error; + + i965->wl_output->libwl_client_handle = dso_open(LIBWAYLAND_CLIENT_NAME); + if (!i965->wl_output->libwl_client_handle) + goto error; + + dso_handle = i965->wl_output->libwl_client_handle; + wl_vtable = &i965->wl_output->vtable; + if (!dso_get_symbols(dso_handle, wl_vtable, sizeof(*wl_vtable), + libwl_client_symbols)) + goto error; + + if (!ensure_driver_vtable(ctx)) + goto error; + return true; + +error: + i965_output_wayland_terminate(ctx); + return false; +} + +void +i965_output_wayland_terminate(VADriverContextP ctx) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct va_wl_output *wl_output; + + if (ctx->display_type != VA_DISPLAY_WAYLAND) + return; + + wl_output = i965->wl_output; + if (!wl_output) + return; + + if (wl_output->wl_drm) { + wl_output->vtable.proxy_destroy((struct wl_proxy *)wl_output->wl_drm); + wl_output->wl_drm = NULL; + } + + if (wl_output->libegl_handle) { + dso_close(wl_output->libegl_handle); + wl_output->libegl_handle = NULL; + } + + if (wl_output->libwl_client_handle) { + dso_close(wl_output->libwl_client_handle); + wl_output->libwl_client_handle = NULL; + } + free(wl_output); + i965->wl_output = NULL; +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_output_wayland.h intel-vaapi-driver-1.7.1/src/i965_output_wayland.h --- intel-vaapi-driver-1.0.15/src/i965_output_wayland.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_output_wayland.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef I965_OUTPUT_WAYLAND_H +#define I965_OUTPUT_WAYLAND_H + +#include +#include + +bool +i965_output_wayland_init(VADriverContextP ctx); + +void +i965_output_wayland_terminate(VADriverContextP ctx); + +#endif /* I965_OUTPUT_WAYLAND_H */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_pciids.h intel-vaapi-driver-1.7.1/src/i965_pciids.h --- intel-vaapi-driver-1.0.15/src/i965_pciids.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_pciids.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,187 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Copied and modified from (mesa) include/pci_ids/i965_pci_ids.h + */ + +CHIPSET(0x2A42, g4x, g4x, "Intel(R) GM45 Express Chipset") +CHIPSET(0x2E02, g4x, g4x, "Intel(R) Integrated Graphics Device") +CHIPSET(0x2E12, g4x, g4x, "Intel(R) Q45/Q43") +CHIPSET(0x2E22, g4x, g4x, "Intel(R) G45/G43") +CHIPSET(0x2E32, g4x, g4x, "Intel(R) G41") +CHIPSET(0x2E42, g4x, g4x, "Intel(R) B43") +CHIPSET(0x2E92, g4x, g4x, "Intel(R) B43") +CHIPSET(0x0042, ilk, ilk, "Intel(R) Ironlake Desktop") +CHIPSET(0x0046, ilk, ilk, "Intel(R) Ironlake Mobile") +CHIPSET(0x0102, snb, snb_gt1, "Intel(R) Sandybridge Desktop") +CHIPSET(0x0112, snb, snb_gt2, "Intel(R) Sandybridge Desktop") +CHIPSET(0x0122, snb, snb_gt2, "Intel(R) Sandybridge Desktop") +CHIPSET(0x0106, snb, snb_gt1, "Intel(R) Sandybridge Mobile") +CHIPSET(0x0116, snb, snb_gt2, "Intel(R) Sandybridge Mobile") +CHIPSET(0x0126, snb, snb_gt2, "Intel(R) Sandybridge Mobile") +CHIPSET(0x010A, snb, snb_gt1, "Intel(R) Sandybridge Server") +CHIPSET(0x0152, ivb, ivb_gt1, "Intel(R) Ivybridge Desktop") +CHIPSET(0x0162, ivb, ivb_gt2, "Intel(R) Ivybridge Desktop") +CHIPSET(0x0156, ivb, ivb_gt1, "Intel(R) Ivybridge Mobile") +CHIPSET(0x0166, ivb, ivb_gt2, "Intel(R) Ivybridge Mobile") +CHIPSET(0x015A, ivb, ivb_gt1, "Intel(R) Ivybridge Server") +CHIPSET(0x016A, ivb, ivb_gt2, "Intel(R) Ivybridge Server") +CHIPSET(0x0F31, ivb, byt, "Intel(R) Bay Trail") +CHIPSET(0x0F32, ivb, byt, "Intel(R) Bay Trail") +CHIPSET(0x0F33, ivb, byt, "Intel(R) Bay Trail") +CHIPSET(0x0157, ivb, byt, "Intel(R) Bay Trail") +CHIPSET(0x0155, ivb, byt, "Intel(R) Bay Trail") +CHIPSET(0x0402, hsw, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0412, hsw, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0422, hsw, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0406, hsw, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0416, hsw, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0426, hsw, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x040A, hsw, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x041A, hsw, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x042A, hsw, hsw_gt3, "Intel(R) Haswell Server") +CHIPSET(0x040B, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x041B, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x042B, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x040E, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x041E, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x042E, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0C02, hsw, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0C12, hsw, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0C22, hsw, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0C06, hsw, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0C16, hsw, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0C26, hsw, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x0C0A, hsw, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x0C1A, hsw, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x0C2A, hsw, hsw_gt3, "Intel(R) Haswell Server") +CHIPSET(0x0C0B, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0C1B, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0C2B, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0C0E, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0C1E, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0C2E, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0A02, hsw, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0A12, hsw, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0A22, hsw, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0A06, hsw, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0A16, hsw, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0A26, hsw, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x0A0A, hsw, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x0A1A, hsw, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x0A2A, hsw, hsw_gt3, "Intel(R) Haswell Server") +CHIPSET(0x0A0B, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0A1B, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0A2B, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0A0E, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0A1E, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0A2E, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0D02, hsw, hsw_gt1, "Intel(R) Haswell Desktop") +CHIPSET(0x0D12, hsw, hsw_gt2, "Intel(R) Haswell Desktop") +CHIPSET(0x0D22, hsw, hsw_gt3, "Intel(R) Haswell Desktop") +CHIPSET(0x0D06, hsw, hsw_gt1, "Intel(R) Haswell Mobile") +CHIPSET(0x0D16, hsw, hsw_gt2, "Intel(R) Haswell Mobile") +CHIPSET(0x0D26, hsw, hsw_gt3, "Intel(R) Haswell Mobile") +CHIPSET(0x0D0A, hsw, hsw_gt1, "Intel(R) Haswell Server") +CHIPSET(0x0D1A, hsw, hsw_gt2, "Intel(R) Haswell Server") +CHIPSET(0x0D2A, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0D0B, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0D1B, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0D2B, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x0D0E, hsw, hsw_gt1, "Intel(R) Haswell") +CHIPSET(0x0D1E, hsw, hsw_gt2, "Intel(R) Haswell") +CHIPSET(0x0D2E, hsw, hsw_gt3, "Intel(R) Haswell") +CHIPSET(0x1602, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x1606, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x160A, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x160B, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x160D, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x160E, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x1612, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x1616, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x161A, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x161B, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x161D, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x161E, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x1622, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x1626, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x162A, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x162B, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x162D, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x162E, bdw, bdw, "Intel(R) Broadwell") +CHIPSET(0x22B0, chv, chv, "Intel(R) CherryView") +CHIPSET(0x22B1, chv, chv, "Intel(R) CherryView") +CHIPSET(0x22B2, chv, chv, "Intel(R) CherryView") +CHIPSET(0x22B3, chv, chv, "Intel(R) CherryView") +CHIPSET(0x1902, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1906, skl, skl, "Intel(R) Skylake") +CHIPSET(0x190A, skl, skl, "Intel(R) Skylake") +CHIPSET(0x190B, skl, skl, "Intel(R) Skylake") +CHIPSET(0x190E, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1912, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1913, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1915, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1916, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1917, skl, skl, "Intel(R) Skylake") +CHIPSET(0x191A, skl, skl, "Intel(R) Skylake") +CHIPSET(0x191B, skl, skl, "Intel(R) Skylake") +CHIPSET(0x191D, skl, skl, "Intel(R) Skylake") +CHIPSET(0x191E, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1921, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1923, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1926, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1927, skl, skl, "Intel(R) Skylake") +CHIPSET(0x192A, skl, skl, "Intel(R) Skylake") +CHIPSET(0x192B, skl, skl, "Intel(R) Skylake") +CHIPSET(0x192D, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1932, skl, skl, "Intel(R) Skylake") +CHIPSET(0x193A, skl, skl, "Intel(R) Skylake") +CHIPSET(0x193B, skl, skl, "Intel(R) Skylake") +CHIPSET(0x193D, skl, skl, "Intel(R) Skylake") +CHIPSET(0x0A84, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x1A84, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x1A85, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x5A84, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x5A85, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x5916, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5913, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5906, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5926, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5921, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5915, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x590E, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591E, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5912, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5917, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5902, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5932, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x592B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x593B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x590B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x592A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x593A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x590A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591D, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x593D, kbl, kbl, "Intel(R) Kabylake") \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/i965_post_processing.c intel-vaapi-driver-1.7.1/src/i965_post_processing.c --- intel-vaapi-driver-1.0.15/src/i965_post_processing.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_post_processing.c 2016-06-03 06:05:58.000000000 +0000 @@ -31,8 +31,6 @@ #include #include -#include - #include "intel_batchbuffer.h" #include "intel_driver.h" #include "i965_defines.h" @@ -40,46 +38,136 @@ #include "i965_drv_video.h" #include "i965_post_processing.h" #include "i965_render.h" +#include "i965_yuv_coefs.h" +#include "intel_media.h" + +#include "gen75_picture_process.h" + +extern VAStatus +vpp_surface_convert(VADriverContextP ctx, + struct object_surface *src_obj_surf, + struct object_surface *dst_obj_surf); + +#define HAS_VPP(ctx) ((ctx)->codec_info->has_vpp) -#define HAS_PP(ctx) (IS_IRONLAKE((ctx)->intel.device_id) || \ - IS_GEN6((ctx)->intel.device_id) || \ - IS_GEN7((ctx)->intel.device_id)) +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN8,\ + MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7)) + +#define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) +#define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_PP_SURFACES) + +#define GPU_ASM_BLOCK_WIDTH 16 +#define GPU_ASM_BLOCK_HEIGHT 8 +#define GPU_ASM_X_OFFSET_ALIGNMENT 4 + +#define VA_STATUS_SUCCESS_1 0xFFFFFFFE static const uint32_t pp_null_gen5[][4] = { -#include "shaders/post_processing/null.g4b.gen5" +#include "shaders/post_processing/gen5_6/null.g4b.gen5" +}; + +static const uint32_t pp_nv12_load_save_nv12_gen5[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_nv12.g4b.gen5" +}; + +static const uint32_t pp_nv12_load_save_pl3_gen5[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_pl3.g4b.gen5" +}; + +static const uint32_t pp_pl3_load_save_nv12_gen5[][4] = { +#include "shaders/post_processing/gen5_6/pl3_load_save_nv12.g4b.gen5" }; -static const uint32_t pp_nv12_load_save_gen5[][4] = { -#include "shaders/post_processing/nv12_load_save_nv12.g4b.gen5" +static const uint32_t pp_pl3_load_save_pl3_gen5[][4] = { +#include "shaders/post_processing/gen5_6/pl3_load_save_pl3.g4b.gen5" }; static const uint32_t pp_nv12_scaling_gen5[][4] = { -#include "shaders/post_processing/nv12_scaling_nv12.g4b.gen5" +#include "shaders/post_processing/gen5_6/nv12_scaling_nv12.g4b.gen5" }; static const uint32_t pp_nv12_avs_gen5[][4] = { -#include "shaders/post_processing/nv12_avs_nv12.g4b.gen5" +#include "shaders/post_processing/gen5_6/nv12_avs_nv12.g4b.gen5" }; static const uint32_t pp_nv12_dndi_gen5[][4] = { -#include "shaders/post_processing/nv12_dndi_nv12.g4b.gen5" +#include "shaders/post_processing/gen5_6/nv12_dndi_nv12.g4b.gen5" +}; + +static const uint32_t pp_nv12_dn_gen5[][4] = { +#include "shaders/post_processing/gen5_6/nv12_dn_nv12.g4b.gen5" +}; + +static const uint32_t pp_nv12_load_save_pa_gen5[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5" +}; + +static const uint32_t pp_pl3_load_save_pa_gen5[][4] = { +#include "shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5" +}; + +static const uint32_t pp_pa_load_save_nv12_gen5[][4] = { +#include "shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5" +}; + +static const uint32_t pp_pa_load_save_pl3_gen5[][4] = { +#include "shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5" +}; + +static const uint32_t pp_pa_load_save_pa_gen5[][4] = { +#include "shaders/post_processing/gen5_6/pa_load_save_pa.g4b.gen5" +}; + +static const uint32_t pp_rgbx_load_save_nv12_gen5[][4] = { +#include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5" +}; + +static const uint32_t pp_nv12_load_save_rgbx_gen5[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_rgbx.g4b.gen5" }; -static void pp_null_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect); -static void pp_nv12_avs_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect); -static void pp_nv12_scaling_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect); -static void pp_nv12_load_save_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect); -static void pp_nv12_dndi_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect); +static VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); +static VAStatus +pp_nv12_avs_initialize(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, const VARectangle *src_rect, + struct i965_surface *dst_surface, const VARectangle *dst_rect, + void *filter_param); +static VAStatus pp_nv12_scaling_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); +static VAStatus gen6_nv12_scaling_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); +static VAStatus pp_plx_load_save_plx_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); +static VAStatus pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); +static VAStatus pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); static struct pp_module pp_modules_gen5[] = { { @@ -96,14 +184,50 @@ { { - "NV12 Load & Save module", - PP_NV12_LOAD_SAVE, - pp_nv12_load_save_gen5, - sizeof(pp_nv12_load_save_gen5), + "NV12_NV12", + PP_NV12_LOAD_SAVE_N12, + pp_nv12_load_save_nv12_gen5, + sizeof(pp_nv12_load_save_nv12_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "NV12_PL3", + PP_NV12_LOAD_SAVE_PL3, + pp_nv12_load_save_pl3_gen5, + sizeof(pp_nv12_load_save_pl3_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PL3_NV12", + PP_PL3_LOAD_SAVE_N12, + pp_pl3_load_save_nv12_gen5, + sizeof(pp_pl3_load_save_nv12_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PL3_PL3", + PP_PL3_LOAD_SAVE_PL3, + pp_pl3_load_save_pl3_gen5, + sizeof(pp_pl3_load_save_pl3_gen5), NULL, }, - pp_nv12_load_save_initialize, + pp_plx_load_save_plx_initialize }, { @@ -141,26 +265,166 @@ pp_nv12_dndi_initialize, }, + + { + { + "NV12 DN module", + PP_NV12_DN, + pp_nv12_dn_gen5, + sizeof(pp_nv12_dn_gen5), + NULL, + }, + + pp_nv12_dn_initialize, + }, + + { + { + "NV12_PA module", + PP_NV12_LOAD_SAVE_PA, + pp_nv12_load_save_pa_gen5, + sizeof(pp_nv12_load_save_pa_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PL3_PA module", + PP_PL3_LOAD_SAVE_PA, + pp_pl3_load_save_pa_gen5, + sizeof(pp_pl3_load_save_pa_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PA_NV12 module", + PP_PA_LOAD_SAVE_NV12, + pp_pa_load_save_nv12_gen5, + sizeof(pp_pa_load_save_nv12_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PA_PL3 module", + PP_PA_LOAD_SAVE_PL3, + pp_pa_load_save_pl3_gen5, + sizeof(pp_pa_load_save_pl3_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PA_PA module", + PP_PA_LOAD_SAVE_PA, + pp_pa_load_save_pa_gen5, + sizeof(pp_pa_load_save_pa_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "RGBX_NV12 module", + PP_RGBX_LOAD_SAVE_NV12, + pp_rgbx_load_save_nv12_gen5, + sizeof(pp_rgbx_load_save_nv12_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "NV12_RGBX module", + PP_NV12_LOAD_SAVE_RGBX, + pp_nv12_load_save_rgbx_gen5, + sizeof(pp_nv12_load_save_rgbx_gen5), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, }; static const uint32_t pp_null_gen6[][4] = { -#include "shaders/post_processing/null.g6b" +#include "shaders/post_processing/gen5_6/null.g6b" +}; + +static const uint32_t pp_nv12_load_save_nv12_gen6[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_nv12.g6b" +}; + +static const uint32_t pp_nv12_load_save_pl3_gen6[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_pl3.g6b" +}; + +static const uint32_t pp_pl3_load_save_nv12_gen6[][4] = { +#include "shaders/post_processing/gen5_6/pl3_load_save_nv12.g6b" }; -static const uint32_t pp_nv12_load_save_gen6[][4] = { -#include "shaders/post_processing/nv12_load_save_nv12.g6b" +static const uint32_t pp_pl3_load_save_pl3_gen6[][4] = { +#include "shaders/post_processing/gen5_6/pl3_load_save_pl3.g6b" }; static const uint32_t pp_nv12_scaling_gen6[][4] = { -#include "shaders/post_processing/nv12_scaling_nv12.g6b" +#include "shaders/post_processing/gen5_6/nv12_avs_nv12.g6b" }; static const uint32_t pp_nv12_avs_gen6[][4] = { -#include "shaders/post_processing/nv12_avs_nv12.g6b" +#include "shaders/post_processing/gen5_6/nv12_avs_nv12.g6b" }; static const uint32_t pp_nv12_dndi_gen6[][4] = { -#include "shaders/post_processing/nv12_dndi_nv12.g6b" +#include "shaders/post_processing/gen5_6/nv12_dndi_nv12.g6b" +}; + +static const uint32_t pp_nv12_dn_gen6[][4] = { +#include "shaders/post_processing/gen5_6/nv12_dn_nv12.g6b" +}; + +static const uint32_t pp_nv12_load_save_pa_gen6[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_pa.g6b" +}; + +static const uint32_t pp_pl3_load_save_pa_gen6[][4] = { +#include "shaders/post_processing/gen5_6/pl3_load_save_pa.g6b" +}; + +static const uint32_t pp_pa_load_save_nv12_gen6[][4] = { +#include "shaders/post_processing/gen5_6/pa_load_save_nv12.g6b" +}; + +static const uint32_t pp_pa_load_save_pl3_gen6[][4] = { +#include "shaders/post_processing/gen5_6/pa_load_save_pl3.g6b" +}; + +static const uint32_t pp_pa_load_save_pa_gen6[][4] = { +#include "shaders/post_processing/gen5_6/pa_load_save_pa.g6b" +}; + +static const uint32_t pp_rgbx_load_save_nv12_gen6[][4] = { +#include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b" +}; + +static const uint32_t pp_nv12_load_save_rgbx_gen6[][4] = { +#include "shaders/post_processing/gen5_6/nv12_load_save_rgbx.g6b" }; static struct pp_module pp_modules_gen6[] = { @@ -178,14 +442,50 @@ { { - "NV12 Load & Save module", - PP_NV12_LOAD_SAVE, - pp_nv12_load_save_gen6, - sizeof(pp_nv12_load_save_gen6), + "NV12_NV12", + PP_NV12_LOAD_SAVE_N12, + pp_nv12_load_save_nv12_gen6, + sizeof(pp_nv12_load_save_nv12_gen6), NULL, }, - pp_nv12_load_save_initialize, + pp_plx_load_save_plx_initialize, + }, + + { + { + "NV12_PL3", + PP_NV12_LOAD_SAVE_PL3, + pp_nv12_load_save_pl3_gen6, + sizeof(pp_nv12_load_save_pl3_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PL3_NV12", + PP_PL3_LOAD_SAVE_N12, + pp_pl3_load_save_nv12_gen6, + sizeof(pp_pl3_load_save_nv12_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, + + { + { + "PL3_PL3", + PP_PL3_LOAD_SAVE_PL3, + pp_pl3_load_save_pl3_gen6, + sizeof(pp_pl3_load_save_pl3_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, }, { @@ -197,7 +497,7 @@ NULL, }, - pp_nv12_scaling_initialize, + gen6_nv12_scaling_initialize, }, { @@ -223,2162 +523,5764 @@ pp_nv12_dndi_initialize, }, -}; -#define pp_static_parameter pp_context->pp_static_parameter -#define pp_inline_parameter pp_context->pp_inline_parameter + { + { + "NV12 DN module", + PP_NV12_DN, + pp_nv12_dn_gen6, + sizeof(pp_nv12_dn_gen6), + NULL, + }, -static void -pp_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling) -{ - switch (tiling) { - case I915_TILING_NONE: - ss->ss3.tiled_surface = 0; - ss->ss3.tile_walk = 0; - break; - case I915_TILING_X: - ss->ss3.tiled_surface = 1; - ss->ss3.tile_walk = I965_TILEWALK_XMAJOR; - break; - case I915_TILING_Y: - ss->ss3.tiled_surface = 1; - ss->ss3.tile_walk = I965_TILEWALK_YMAJOR; - break; - } -} + pp_nv12_dn_initialize, + }, + { + { + "NV12_PA module", + PP_NV12_LOAD_SAVE_PA, + pp_nv12_load_save_pa_gen6, + sizeof(pp_nv12_load_save_pa_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, -static void -pp_set_surface2_tiling(struct i965_surface_state2 *ss, unsigned int tiling) -{ - switch (tiling) { - case I915_TILING_NONE: - ss->ss2.tiled_surface = 0; - ss->ss2.tile_walk = 0; - break; - case I915_TILING_X: - ss->ss2.tiled_surface = 1; - ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; - break; - case I915_TILING_Y: - ss->ss2.tiled_surface = 1; - ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; - break; - } -} + { + { + "PL3_PA module", + PP_PL3_LOAD_SAVE_PA, + pp_pl3_load_save_pa_gen6, + sizeof(pp_pl3_load_save_pa_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, -static void -ironlake_pp_surface_state(struct i965_post_processing_context *pp_context) -{ + { + { + "PA_NV12 module", + PP_PA_LOAD_SAVE_NV12, + pp_pa_load_save_nv12_gen6, + sizeof(pp_pa_load_save_nv12_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, -} + { + { + "PA_PL3 module", + PP_PA_LOAD_SAVE_PL3, + pp_pa_load_save_pl3_gen6, + sizeof(pp_pa_load_save_pl3_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, -static void -ironlake_pp_interface_descriptor_table(struct i965_post_processing_context *pp_context) -{ - struct i965_interface_descriptor *desc; - dri_bo *bo; - int pp_index = pp_context->current_pp; + { + { + "PA_PA module", + PP_PA_LOAD_SAVE_PA, + pp_pa_load_save_pa_gen6, + sizeof(pp_pa_load_save_pa_gen6), + NULL, + }, - bo = pp_context->idrt.bo; - dri_bo_map(bo, 1); - assert(bo->virtual); - desc = bo->virtual; - memset(desc, 0, sizeof(*desc)); - desc->desc0.grf_reg_blocks = 10; - desc->desc0.kernel_start_pointer = pp_context->pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */ - desc->desc1.const_urb_entry_read_offset = 0; - desc->desc1.const_urb_entry_read_len = 4; /* grf 1-4 */ - desc->desc2.sampler_state_pointer = pp_context->sampler_state_table.bo->offset >> 5; - desc->desc2.sampler_count = 0; - desc->desc3.binding_table_entry_count = 0; - desc->desc3.binding_table_pointer = - pp_context->binding_table.bo->offset >> 5; /*reloc */ + pp_plx_load_save_plx_initialize, + }, - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - desc->desc0.grf_reg_blocks, - offsetof(struct i965_interface_descriptor, desc0), - pp_context->pp_modules[pp_index].kernel.bo); + { + { + "RGBX_NV12 module", + PP_RGBX_LOAD_SAVE_NV12, + pp_rgbx_load_save_nv12_gen6, + sizeof(pp_rgbx_load_save_nv12_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - desc->desc2.sampler_count << 2, - offsetof(struct i965_interface_descriptor, desc2), - pp_context->sampler_state_table.bo); + { + { + "NV12_RGBX module", + PP_NV12_LOAD_SAVE_RGBX, + pp_nv12_load_save_rgbx_gen6, + sizeof(pp_nv12_load_save_rgbx_gen6), + NULL, + }, + + pp_plx_load_save_plx_initialize, + }, +}; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - desc->desc3.binding_table_entry_count, - offsetof(struct i965_interface_descriptor, desc3), - pp_context->binding_table.bo); +static const uint32_t pp_null_gen7[][4] = { +}; - dri_bo_unmap(bo); - pp_context->idrt.num_interface_descriptors++; -} +static const uint32_t pp_nv12_load_save_nv12_gen7[][4] = { +#include "shaders/post_processing/gen7/pl2_to_pl2.g7b" +}; -static void -ironlake_pp_binding_table(struct i965_post_processing_context *pp_context) -{ - unsigned int *binding_table; - dri_bo *bo = pp_context->binding_table.bo; - int i; +static const uint32_t pp_nv12_load_save_pl3_gen7[][4] = { +#include "shaders/post_processing/gen7/pl2_to_pl3.g7b" +}; - dri_bo_map(bo, 1); - assert(bo->virtual); - binding_table = bo->virtual; - memset(binding_table, 0, bo->size); +static const uint32_t pp_pl3_load_save_nv12_gen7[][4] = { +#include "shaders/post_processing/gen7/pl3_to_pl2.g7b" +}; - for (i = 0; i < MAX_PP_SURFACES; i++) { - if (pp_context->surfaces[i].ss_bo) { - assert(pp_context->surfaces[i].s_bo); - - binding_table[i] = pp_context->surfaces[i].ss_bo->offset; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0, - i * sizeof(*binding_table), - pp_context->surfaces[i].ss_bo); - } - - } +static const uint32_t pp_pl3_load_save_pl3_gen7[][4] = { +#include "shaders/post_processing/gen7/pl3_to_pl3.g7b" +}; - dri_bo_unmap(bo); -} +static const uint32_t pp_nv12_scaling_gen7[][4] = { +#include "shaders/post_processing/gen7/avs.g7b" +}; -static void -ironlake_pp_vfe_state(struct i965_post_processing_context *pp_context) -{ - struct i965_vfe_state *vfe_state; - dri_bo *bo; +static const uint32_t pp_nv12_avs_gen7[][4] = { +#include "shaders/post_processing/gen7/avs.g7b" +}; - bo = pp_context->vfe_state.bo; - dri_bo_map(bo, 1); - assert(bo->virtual); - vfe_state = bo->virtual; - memset(vfe_state, 0, sizeof(*vfe_state)); - vfe_state->vfe1.max_threads = pp_context->urb.num_vfe_entries - 1; - vfe_state->vfe1.urb_entry_alloc_size = pp_context->urb.size_vfe_entry - 1; - vfe_state->vfe1.num_urb_entries = pp_context->urb.num_vfe_entries; - vfe_state->vfe1.vfe_mode = VFE_GENERIC_MODE; - vfe_state->vfe1.children_present = 0; - vfe_state->vfe2.interface_descriptor_base = - pp_context->idrt.bo->offset >> 4; /* reloc */ - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0, - offsetof(struct i965_vfe_state, vfe2), - pp_context->idrt.bo); - dri_bo_unmap(bo); -} +static const uint32_t pp_nv12_dndi_gen7[][4] = { +#include "shaders/post_processing/gen7/dndi.g7b" +}; -static void -ironlake_pp_upload_constants(struct i965_post_processing_context *pp_context) -{ - unsigned char *constant_buffer; +static const uint32_t pp_nv12_dn_gen7[][4] = { +#include "shaders/post_processing/gen7/nv12_dn_nv12.g7b" +}; +static const uint32_t pp_nv12_load_save_pa_gen7[][4] = { +#include "shaders/post_processing/gen7/pl2_to_pa.g7b" +}; +static const uint32_t pp_pl3_load_save_pa_gen7[][4] = { +#include "shaders/post_processing/gen7/pl3_to_pa.g7b" +}; +static const uint32_t pp_pa_load_save_nv12_gen7[][4] = { +#include "shaders/post_processing/gen7/pa_to_pl2.g7b" +}; +static const uint32_t pp_pa_load_save_pl3_gen7[][4] = { +#include "shaders/post_processing/gen7/pa_to_pl3.g7b" +}; +static const uint32_t pp_pa_load_save_pa_gen7[][4] = { +#include "shaders/post_processing/gen7/pa_to_pa.g7b" +}; +static const uint32_t pp_rgbx_load_save_nv12_gen7[][4] = { +#include "shaders/post_processing/gen7/rgbx_to_nv12.g7b" +}; +static const uint32_t pp_nv12_load_save_rgbx_gen7[][4] = { +#include "shaders/post_processing/gen7/pl2_to_rgbx.g7b" +}; - assert(sizeof(pp_static_parameter) == 128); - dri_bo_map(pp_context->curbe.bo, 1); - assert(pp_context->curbe.bo->virtual); - constant_buffer = pp_context->curbe.bo->virtual; - memcpy(constant_buffer, &pp_static_parameter, sizeof(pp_static_parameter)); - dri_bo_unmap(pp_context->curbe.bo); -} +static VAStatus gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); +static VAStatus gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); +static VAStatus gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); -static void -ironlake_pp_states_setup(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; +static struct pp_module pp_modules_gen7[] = { + { + { + "NULL module (for testing)", + PP_NULL, + pp_null_gen7, + sizeof(pp_null_gen7), + NULL, + }, - ironlake_pp_surface_state(pp_context); - ironlake_pp_binding_table(pp_context); - ironlake_pp_interface_descriptor_table(pp_context); - ironlake_pp_vfe_state(pp_context); - ironlake_pp_upload_constants(pp_context); -} + pp_null_initialize, + }, -static void -ironlake_pp_pipeline_select(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + { + { + "NV12_NV12", + PP_NV12_LOAD_SAVE_N12, + pp_nv12_load_save_nv12_gen7, + sizeof(pp_nv12_load_save_nv12_gen7), + NULL, + }, - BEGIN_BATCH(batch, 1); - OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); - ADVANCE_BATCH(batch); -} + gen7_pp_plx_avs_initialize, + }, -static void -ironlake_pp_urb_layout(VADriverContextP ctx, struct i965_post_processing_context *pp_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; - unsigned int vfe_fence, cs_fence; + { + { + "NV12_PL3", + PP_NV12_LOAD_SAVE_PL3, + pp_nv12_load_save_pl3_gen7, + sizeof(pp_nv12_load_save_pl3_gen7), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, - vfe_fence = pp_context->urb.cs_start; - cs_fence = pp_context->urb.size; + { + { + "PL3_NV12", + PP_PL3_LOAD_SAVE_N12, + pp_pl3_load_save_nv12_gen7, + sizeof(pp_pl3_load_save_nv12_gen7), + NULL, + }, - BEGIN_BATCH(batch, 3); - OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, - (vfe_fence << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ - (cs_fence << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */ - ADVANCE_BATCH(batch); -} + gen7_pp_plx_avs_initialize, + }, -static void -ironlake_pp_state_base_address(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + { + { + "PL3_PL3", + PP_PL3_LOAD_SAVE_PL3, + pp_pl3_load_save_pl3_gen7, + sizeof(pp_pl3_load_save_pl3_gen7), + NULL, + }, - BEGIN_BATCH(batch, 8); - OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - ADVANCE_BATCH(batch); -} + gen7_pp_plx_avs_initialize, + }, -static void -ironlake_pp_state_pointers(VADriverContextP ctx, struct i965_post_processing_context *pp_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + { + { + "NV12 Scaling module", + PP_NV12_SCALING, + pp_nv12_scaling_gen7, + sizeof(pp_nv12_scaling_gen7), + NULL, + }, - BEGIN_BATCH(batch, 3); - OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1); - OUT_BATCH(batch, 0); - OUT_RELOC(batch, pp_context->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); - ADVANCE_BATCH(batch); -} + gen7_pp_plx_avs_initialize, + }, -static void -ironlake_pp_cs_urb_layout(VADriverContextP ctx, struct i965_post_processing_context *pp_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + { + { + "NV12 AVS module", + PP_NV12_AVS, + pp_nv12_avs_gen7, + sizeof(pp_nv12_avs_gen7), + NULL, + }, - BEGIN_BATCH(batch, 2); - OUT_BATCH(batch, CMD_CS_URB_STATE | 0); - OUT_BATCH(batch, - ((pp_context->urb.size_cs_entry - 1) << 4) | /* URB Entry Allocation Size */ - (pp_context->urb.num_cs_entries << 0)); /* Number of URB Entries */ - ADVANCE_BATCH(batch); -} + gen7_pp_plx_avs_initialize, + }, -static void -ironlake_pp_constant_buffer(VADriverContextP ctx, struct i965_post_processing_context *pp_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + { + { + "NV12 DNDI module", + PP_NV12_DNDI, + pp_nv12_dndi_gen7, + sizeof(pp_nv12_dndi_gen7), + NULL, + }, - BEGIN_BATCH(batch, 2); - OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2)); - OUT_RELOC(batch, pp_context->curbe.bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - pp_context->urb.size_cs_entry - 1); - ADVANCE_BATCH(batch); -} + gen7_pp_nv12_dndi_initialize, + }, -static void -ironlake_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_context *pp_context) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; - int x, x_steps, y, y_steps; + { + { + "NV12 DN module", + PP_NV12_DN, + pp_nv12_dn_gen7, + sizeof(pp_nv12_dn_gen7), + NULL, + }, - x_steps = pp_context->pp_x_steps(&pp_context->private_context); - y_steps = pp_context->pp_y_steps(&pp_context->private_context); + gen7_pp_nv12_dn_initialize, + }, + { + { + "NV12_PA module", + PP_NV12_LOAD_SAVE_PA, + pp_nv12_load_save_pa_gen7, + sizeof(pp_nv12_load_save_pa_gen7), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, - for (y = 0; y < y_steps; y++) { - for (x = 0; x < x_steps; x++) { - if (!pp_context->pp_set_block_parameter(pp_context, x, y)) { - BEGIN_BATCH(batch, 20); - OUT_BATCH(batch, CMD_MEDIA_OBJECT | 18); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); /* no indirect data */ - OUT_BATCH(batch, 0); + { + { + "PL3_PA module", + PP_PL3_LOAD_SAVE_PA, + pp_pl3_load_save_pa_gen7, + sizeof(pp_pl3_load_save_pa_gen7), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, - /* inline data grf 5-6 */ - assert(sizeof(pp_inline_parameter) == 64); - intel_batchbuffer_data(batch, &pp_inline_parameter, sizeof(pp_inline_parameter)); + { + { + "PA_NV12 module", + PP_PA_LOAD_SAVE_NV12, + pp_pa_load_save_nv12_gen7, + sizeof(pp_pa_load_save_nv12_gen7), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, - ADVANCE_BATCH(batch); - } - } - } -} + { + { + "PA_PL3 module", + PP_PA_LOAD_SAVE_PL3, + pp_pa_load_save_pl3_gen7, + sizeof(pp_pa_load_save_pl3_gen7), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, -static void -ironlake_pp_pipeline_setup(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; - struct i965_post_processing_context *pp_context = i965->pp_context; + { + { + "PA_PA module", + PP_PA_LOAD_SAVE_PA, + pp_pa_load_save_pa_gen7, + sizeof(pp_pa_load_save_pa_gen7), + NULL, + }, - intel_batchbuffer_start_atomic(batch, 0x1000); - intel_batchbuffer_emit_mi_flush(batch); - ironlake_pp_pipeline_select(ctx); - ironlake_pp_state_base_address(ctx); - ironlake_pp_state_pointers(ctx, pp_context); - ironlake_pp_urb_layout(ctx, pp_context); - ironlake_pp_cs_urb_layout(ctx, pp_context); - ironlake_pp_constant_buffer(ctx, pp_context); - ironlake_pp_object_walker(ctx, pp_context); - intel_batchbuffer_end_atomic(batch); -} + gen7_pp_plx_avs_initialize, + }, -static int -pp_null_x_steps(void *private_context) + { + { + "RGBX_NV12 module", + PP_RGBX_LOAD_SAVE_NV12, + pp_rgbx_load_save_nv12_gen7, + sizeof(pp_rgbx_load_save_nv12_gen7), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "NV12_RGBX module", + PP_NV12_LOAD_SAVE_RGBX, + pp_nv12_load_save_rgbx_gen7, + sizeof(pp_nv12_load_save_rgbx_gen7), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + +}; + +static const uint32_t pp_null_gen75[][4] = { +}; + +static const uint32_t pp_nv12_load_save_nv12_gen75[][4] = { +#include "shaders/post_processing/gen7/pl2_to_pl2.g75b" +}; + +static const uint32_t pp_nv12_load_save_pl3_gen75[][4] = { +#include "shaders/post_processing/gen7/pl2_to_pl3.g75b" +}; + +static const uint32_t pp_pl3_load_save_nv12_gen75[][4] = { +#include "shaders/post_processing/gen7/pl3_to_pl2.g75b" +}; + +static const uint32_t pp_pl3_load_save_pl3_gen75[][4] = { +#include "shaders/post_processing/gen7/pl3_to_pl3.g75b" +}; + +static const uint32_t pp_nv12_scaling_gen75[][4] = { +#include "shaders/post_processing/gen7/avs.g75b" +}; + +static const uint32_t pp_nv12_avs_gen75[][4] = { +#include "shaders/post_processing/gen7/avs.g75b" +}; + +static const uint32_t pp_nv12_dndi_gen75[][4] = { +// #include "shaders/post_processing/gen7/dndi.g75b" +}; + +static const uint32_t pp_nv12_dn_gen75[][4] = { +// #include "shaders/post_processing/gen7/nv12_dn_nv12.g75b" +}; +static const uint32_t pp_nv12_load_save_pa_gen75[][4] = { +#include "shaders/post_processing/gen7/pl2_to_pa.g75b" +}; +static const uint32_t pp_pl3_load_save_pa_gen75[][4] = { +#include "shaders/post_processing/gen7/pl3_to_pa.g75b" +}; +static const uint32_t pp_pa_load_save_nv12_gen75[][4] = { +#include "shaders/post_processing/gen7/pa_to_pl2.g75b" +}; +static const uint32_t pp_pa_load_save_pl3_gen75[][4] = { +#include "shaders/post_processing/gen7/pa_to_pl3.g75b" +}; +static const uint32_t pp_pa_load_save_pa_gen75[][4] = { +#include "shaders/post_processing/gen7/pa_to_pa.g75b" +}; +static const uint32_t pp_rgbx_load_save_nv12_gen75[][4] = { +#include "shaders/post_processing/gen7/rgbx_to_nv12.g75b" +}; +static const uint32_t pp_nv12_load_save_rgbx_gen75[][4] = { +#include "shaders/post_processing/gen7/pl2_to_rgbx.g75b" +}; + +static struct pp_module pp_modules_gen75[] = { + { + { + "NULL module (for testing)", + PP_NULL, + pp_null_gen75, + sizeof(pp_null_gen75), + NULL, + }, + + pp_null_initialize, + }, + + { + { + "NV12_NV12", + PP_NV12_LOAD_SAVE_N12, + pp_nv12_load_save_nv12_gen75, + sizeof(pp_nv12_load_save_nv12_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "NV12_PL3", + PP_NV12_LOAD_SAVE_PL3, + pp_nv12_load_save_pl3_gen75, + sizeof(pp_nv12_load_save_pl3_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "PL3_NV12", + PP_PL3_LOAD_SAVE_N12, + pp_pl3_load_save_nv12_gen75, + sizeof(pp_pl3_load_save_nv12_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "PL3_PL3", + PP_PL3_LOAD_SAVE_PL3, + pp_pl3_load_save_pl3_gen75, + sizeof(pp_pl3_load_save_pl3_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "NV12 Scaling module", + PP_NV12_SCALING, + pp_nv12_scaling_gen75, + sizeof(pp_nv12_scaling_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "NV12 AVS module", + PP_NV12_AVS, + pp_nv12_avs_gen75, + sizeof(pp_nv12_avs_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "NV12 DNDI module", + PP_NV12_DNDI, + pp_nv12_dndi_gen75, + sizeof(pp_nv12_dndi_gen75), + NULL, + }, + + gen7_pp_nv12_dn_initialize, + }, + + { + { + "NV12 DN module", + PP_NV12_DN, + pp_nv12_dn_gen75, + sizeof(pp_nv12_dn_gen75), + NULL, + }, + + gen7_pp_nv12_dn_initialize, + }, + + { + { + "NV12_PA module", + PP_NV12_LOAD_SAVE_PA, + pp_nv12_load_save_pa_gen75, + sizeof(pp_nv12_load_save_pa_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "PL3_PA module", + PP_PL3_LOAD_SAVE_PA, + pp_pl3_load_save_pa_gen75, + sizeof(pp_pl3_load_save_pa_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "PA_NV12 module", + PP_PA_LOAD_SAVE_NV12, + pp_pa_load_save_nv12_gen75, + sizeof(pp_pa_load_save_nv12_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "PA_PL3 module", + PP_PA_LOAD_SAVE_PL3, + pp_pa_load_save_pl3_gen75, + sizeof(pp_pa_load_save_pl3_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "PA_PA module", + PP_PA_LOAD_SAVE_PA, + pp_pa_load_save_pa_gen75, + sizeof(pp_pa_load_save_pa_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "RGBX_NV12 module", + PP_RGBX_LOAD_SAVE_NV12, + pp_rgbx_load_save_nv12_gen75, + sizeof(pp_rgbx_load_save_nv12_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + + { + { + "NV12_RGBX module", + PP_NV12_LOAD_SAVE_RGBX, + pp_nv12_load_save_rgbx_gen75, + sizeof(pp_nv12_load_save_rgbx_gen75), + NULL, + }, + + gen7_pp_plx_avs_initialize, + }, + +}; + +static void +pp_dndi_frame_store_reset(DNDIFrameStore *fs) { - return 1; + fs->obj_surface = NULL; + fs->surface_id = VA_INVALID_ID; + fs->is_scratch_surface = 0; } -static int -pp_null_y_steps(void *private_context) +static inline void +pp_dndi_frame_store_swap(DNDIFrameStore *fs1, DNDIFrameStore *fs2) { - return 1; + const DNDIFrameStore tmpfs = *fs1; + *fs1 = *fs2; + *fs2 = tmpfs; } -static int -pp_null_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +static inline void +pp_dndi_frame_store_clear(DNDIFrameStore *fs, VADriverContextP ctx) { - return 0; + if (fs->obj_surface && fs->is_scratch_surface) { + VASurfaceID va_surface = fs->obj_surface->base.id; + i965_DestroySurfaces(ctx, &va_surface, 1); + } + pp_dndi_frame_store_reset(fs); } static void -pp_null_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect) +pp_dndi_context_init(struct pp_dndi_context *dndi_ctx) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; + int i; - /* private function & data */ - pp_context->pp_x_steps = pp_null_x_steps; - pp_context->pp_y_steps = pp_null_y_steps; - pp_context->pp_set_block_parameter = pp_null_set_block_parameter; + memset(dndi_ctx, 0, sizeof(*dndi_ctx)); + for (i = 0; i < ARRAY_ELEMS(dndi_ctx->frame_store); i++) + pp_dndi_frame_store_reset(&dndi_ctx->frame_store[i]); +} + +static VAStatus +pp_dndi_context_init_surface_params(struct pp_dndi_context *dndi_ctx, + struct object_surface *obj_surface, + const VAProcPipelineParameterBuffer *pipe_params, + const VAProcFilterParameterBufferDeinterlacing *deint_params) +{ + DNDIFrameStore *fs; + + dndi_ctx->is_di_enabled = 1; + dndi_ctx->is_di_adv_enabled = 0; + dndi_ctx->is_first_frame = 0; + dndi_ctx->is_second_field = 0; + + /* Check whether we are deinterlacing the second field */ + if (dndi_ctx->is_di_enabled) { + const unsigned int tff = + !(deint_params->flags & VA_DEINTERLACING_BOTTOM_FIELD_FIRST); + const unsigned int is_top_field = + !(deint_params->flags & VA_DEINTERLACING_BOTTOM_FIELD); + + if ((tff ^ is_top_field) != 0) { + fs = &dndi_ctx->frame_store[DNDI_FRAME_IN_CURRENT]; + if (fs->surface_id != obj_surface->base.id) { + WARN_ONCE("invalid surface provided for second field\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + dndi_ctx->is_second_field = 1; + } + } + + /* Check whether we are deinterlacing the first frame */ + if (dndi_ctx->is_di_enabled) { + switch (deint_params->algorithm) { + case VAProcDeinterlacingBob: + dndi_ctx->is_first_frame = 1; + break; + case VAProcDeinterlacingMotionAdaptive: + case VAProcDeinterlacingMotionCompensated: + fs = &dndi_ctx->frame_store[DNDI_FRAME_IN_CURRENT]; + if (fs->surface_id == VA_INVALID_ID) + dndi_ctx->is_first_frame = 1; + else if (dndi_ctx->is_second_field) { + /* At this stage, we have already deinterlaced the + first field successfully. So, the first frame flag + is trigerred if the previous field was deinterlaced + without reference frame */ + fs = &dndi_ctx->frame_store[DNDI_FRAME_IN_PREVIOUS]; + if (fs->surface_id == VA_INVALID_ID) + dndi_ctx->is_first_frame = 1; + } + else { + if (pipe_params->num_forward_references < 1 || + pipe_params->forward_references[0] == VA_INVALID_ID) { + WARN_ONCE("A forward temporal reference is needed for Motion adaptive/compensated deinterlacing !!!\n"); + return VA_STATUS_ERROR_INVALID_PARAMETER; + } + } + dndi_ctx->is_di_adv_enabled = 1; + break; + default: + WARN_ONCE("unsupported deinterlacing algorithm (%d)\n", + deint_params->algorithm); + return VA_STATUS_ERROR_UNSUPPORTED_FILTER; + } + } + return VA_STATUS_SUCCESS; } -static int -pp_load_save_x_steps(void *private_context) -{ - return 1; +static VAStatus +pp_dndi_context_ensure_surfaces_storage(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + struct object_surface *src_surface, struct object_surface *dst_surface) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct pp_dndi_context * const dndi_ctx = &pp_context->pp_dndi_context; + unsigned int src_fourcc, dst_fourcc; + unsigned int src_sampling, dst_sampling; + unsigned int src_tiling, dst_tiling; + unsigned int i, swizzle; + VAStatus status; + + /* Determine input surface info. Always use NV12 Y-tiled */ + if (src_surface->bo) { + src_fourcc = src_surface->fourcc; + src_sampling = src_surface->subsampling; + dri_bo_get_tiling(src_surface->bo, &src_tiling, &swizzle); + src_tiling = !!src_tiling; + } + else { + src_fourcc = VA_FOURCC_NV12; + src_sampling = SUBSAMPLE_YUV420; + src_tiling = 1; + status = i965_check_alloc_surface_bo(ctx, src_surface, + src_tiling, src_fourcc, src_sampling); + if (status != VA_STATUS_SUCCESS) + return status; + } + + /* Determine output surface info. Always use NV12 Y-tiled */ + if (dst_surface->bo) { + dst_fourcc = dst_surface->fourcc; + dst_sampling = dst_surface->subsampling; + dri_bo_get_tiling(dst_surface->bo, &dst_tiling, &swizzle); + dst_tiling = !!dst_tiling; + } + else { + dst_fourcc = VA_FOURCC_NV12; + dst_sampling = SUBSAMPLE_YUV420; + dst_tiling = 1; + status = i965_check_alloc_surface_bo(ctx, dst_surface, + dst_tiling, dst_fourcc, dst_sampling); + if (status != VA_STATUS_SUCCESS) + return status; + } + + /* Create pipeline surfaces */ + for (i = 0; i < ARRAY_ELEMS(dndi_ctx->frame_store); i ++) { + struct object_surface *obj_surface; + VASurfaceID new_surface; + unsigned int width, height; + + if (dndi_ctx->frame_store[i].obj_surface && + dndi_ctx->frame_store[i].obj_surface->bo) + continue; // user allocated surface, not VPP internal + + if (dndi_ctx->frame_store[i].obj_surface) { + obj_surface = dndi_ctx->frame_store[i].obj_surface; + dndi_ctx->frame_store[i].is_scratch_surface = 0; + } else { + if (i <= DNDI_FRAME_IN_STMM) { + width = src_surface->orig_width; + height = src_surface->orig_height; + } + else { + width = dst_surface->orig_width; + height = dst_surface->orig_height; + } + + status = i965_CreateSurfaces(ctx, width, height, VA_RT_FORMAT_YUV420, + 1, &new_surface); + if (status != VA_STATUS_SUCCESS) + return status; + + obj_surface = SURFACE(new_surface); + assert(obj_surface != NULL); + dndi_ctx->frame_store[i].is_scratch_surface = 1; + } + + if (i <= DNDI_FRAME_IN_PREVIOUS) { + status = i965_check_alloc_surface_bo(ctx, obj_surface, + src_tiling, src_fourcc, src_sampling); + } + else if (i == DNDI_FRAME_IN_STMM || i == DNDI_FRAME_OUT_STMM) { + status = i965_check_alloc_surface_bo(ctx, obj_surface, + 1, VA_FOURCC_Y800, SUBSAMPLE_YUV400); + } + else if (i >= DNDI_FRAME_OUT_CURRENT) { + status = i965_check_alloc_surface_bo(ctx, obj_surface, + dst_tiling, dst_fourcc, dst_sampling); + } + if (status != VA_STATUS_SUCCESS) + return status; + + dndi_ctx->frame_store[i].obj_surface = obj_surface; + } + return VA_STATUS_SUCCESS; } -static int -pp_load_save_y_steps(void *private_context) -{ - struct pp_load_save_context *pp_load_save_context = private_context; +static VAStatus +pp_dndi_context_ensure_surfaces(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + struct object_surface *src_surface, struct object_surface *dst_surface) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct pp_dndi_context * const dndi_ctx = &pp_context->pp_dndi_context; + DNDIFrameStore *ifs, *ofs; + bool is_new_frame = false; + + /* Update the previous input surface */ + is_new_frame = dndi_ctx->frame_store[DNDI_FRAME_IN_CURRENT].surface_id != + src_surface->base.id; + if (is_new_frame) { + ifs = &dndi_ctx->frame_store[DNDI_FRAME_IN_PREVIOUS]; + ofs = &dndi_ctx->frame_store[DNDI_FRAME_IN_CURRENT]; + do { + const VAProcPipelineParameterBuffer * const pipe_params = + pp_context->pipeline_param; + struct object_surface *obj_surface; - return pp_load_save_context->dest_h / 8; + if (pipe_params->num_forward_references < 1) + break; + if (pipe_params->forward_references[0] == VA_INVALID_ID) + break; + + obj_surface = SURFACE(pipe_params->forward_references[0]); + if (!obj_surface || obj_surface->base.id == ifs->surface_id) + break; + + pp_dndi_frame_store_clear(ifs, ctx); + if (obj_surface->base.id == ofs->surface_id) { + *ifs = *ofs; + pp_dndi_frame_store_reset(ofs); + } + else { + ifs->obj_surface = obj_surface; + ifs->surface_id = obj_surface->base.id; + } + } while (0); + } + + /* Update the input surface */ + ifs = &dndi_ctx->frame_store[DNDI_FRAME_IN_CURRENT]; + pp_dndi_frame_store_clear(ifs, ctx); + ifs->obj_surface = src_surface; + ifs->surface_id = src_surface->base.id; + + /* Update the Spatial Temporal Motion Measure (STMM) surfaces */ + if (is_new_frame) + pp_dndi_frame_store_swap(&dndi_ctx->frame_store[DNDI_FRAME_IN_STMM], + &dndi_ctx->frame_store[DNDI_FRAME_OUT_STMM]); + + /* Update the output surfaces */ + ofs = &dndi_ctx->frame_store[DNDI_FRAME_OUT_CURRENT]; + if (dndi_ctx->is_di_adv_enabled && !dndi_ctx->is_first_frame) { + pp_dndi_frame_store_swap(ofs, + &dndi_ctx->frame_store[DNDI_FRAME_OUT_PREVIOUS]); + if (!dndi_ctx->is_second_field) + ofs = &dndi_ctx->frame_store[DNDI_FRAME_OUT_PREVIOUS]; + } + pp_dndi_frame_store_clear(ofs, ctx); + ofs->obj_surface = dst_surface; + ofs->surface_id = dst_surface->base.id; + + return VA_STATUS_SUCCESS; } static int -pp_load_save_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +pp_get_surface_fourcc(VADriverContextP ctx, const struct i965_surface *surface) { - pp_inline_parameter.grf5.block_vertical_mask = 0xff; - pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; - pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16; - pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8; + int fourcc; - return 0; + if (surface->type == I965_SURFACE_TYPE_IMAGE) { + struct object_image *obj_image = (struct object_image *)surface->base; + fourcc = obj_image->image.format.fourcc; + } else { + struct object_surface *obj_surface = (struct object_surface *)surface->base; + fourcc = obj_surface->fourcc; + } + + return fourcc; } static void -pp_nv12_load_save_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect) +pp_get_surface_size(VADriverContextP ctx, const struct i965_surface *surface, int *width, int *height) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - struct pp_load_save_context *pp_load_save_context = (struct pp_load_save_context *)&pp_context->private_context; - struct object_surface *obj_surface; - struct i965_surface_state *ss; - dri_bo *bo; - int index, w, h; - int orig_w, orig_h; - unsigned int tiling, swizzle; + if (surface->type == I965_SURFACE_TYPE_IMAGE) { + struct object_image *obj_image = (struct object_image *)surface->base; - /* source surface */ - obj_surface = SURFACE(in_surface_id); - orig_w = obj_surface->orig_width; - orig_h = obj_surface->orig_height; - w = obj_surface->width; - h = obj_surface->height; - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + *width = obj_image->image.width; + *height = obj_image->image.height; + } else { + struct object_surface *obj_surface = (struct object_surface *)surface->base; - /* source Y surface index 1 */ - index = 1; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; - ss->ss2.width = orig_w / 4 - 1; - ss->ss2.height = orig_h - 1; - ss->ss3.pitch = w - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - 0, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); - - /* source UV surface index 2 */ - index = 2; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; - ss->ss2.width = orig_w / 4 - 1; - ss->ss2.height = orig_h / 2 - 1; - ss->ss3.pitch = w - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - w * h, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); - - /* destination surface */ - obj_surface = SURFACE(out_surface_id); - orig_w = obj_surface->orig_width; - orig_h = obj_surface->orig_height; - w = obj_surface->width; - h = obj_surface->height; - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); - - /* destination Y surface index 7 */ - index = 7; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; - ss->ss2.width = orig_w / 4 - 1; - ss->ss2.height = orig_h - 1; - ss->ss3.pitch = w - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - 0, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); - - /* destination UV surface index 8 */ - index = 8; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; - ss->ss2.width = orig_w / 4 - 1; - ss->ss2.height = orig_h / 2 - 1; - ss->ss3.pitch = w - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - w * h, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); - - /* private function & data */ - pp_context->pp_x_steps = pp_load_save_x_steps; - pp_context->pp_y_steps = pp_load_save_y_steps; - pp_context->pp_set_block_parameter = pp_load_save_set_block_parameter; - pp_load_save_context->dest_h = h; - pp_load_save_context->dest_w = w; - - pp_inline_parameter.grf5.block_count_x = w / 16; /* 1 x N */ - pp_inline_parameter.grf5.number_blocks = w / 16; + *width = obj_surface->orig_width; + *height = obj_surface->orig_height; + } } -static int -pp_scaling_x_steps(void *private_context) +static void +pp_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling) { - return 1; + switch (tiling) { + case I915_TILING_NONE: + ss->ss3.tiled_surface = 0; + ss->ss3.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss3.tiled_surface = 1; + ss->ss3.tile_walk = I965_TILEWALK_YMAJOR; + break; + } } -static int -pp_scaling_y_steps(void *private_context) +static void +pp_set_surface2_tiling(struct i965_surface_state2 *ss, unsigned int tiling) { - struct pp_scaling_context *pp_scaling_context = private_context; + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } +} - return pp_scaling_context->dest_h / 8; +static void +gen7_pp_set_surface_tiling(struct gen7_surface_state *ss, unsigned int tiling) +{ + switch (tiling) { + case I915_TILING_NONE: + ss->ss0.tiled_surface = 0; + ss->ss0.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss0.tiled_surface = 1; + ss->ss0.tile_walk = I965_TILEWALK_YMAJOR; + break; + } } -static int -pp_scaling_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +static void +gen7_pp_set_surface2_tiling(struct gen7_surface_state2 *ss, unsigned int tiling) { - struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)&pp_context->private_context; - float src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; - float src_y_steping = pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step; - - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = src_x_steping * x * 16 + pp_scaling_context->src_normalized_x; - pp_inline_parameter.grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_scaling_context->src_normalized_y; - pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16 + pp_scaling_context->dest_x; - pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8 + pp_scaling_context->dest_y; - - return 0; + switch (tiling) { + case I915_TILING_NONE: + ss->ss2.tiled_surface = 0; + ss->ss2.tile_walk = 0; + break; + case I915_TILING_X: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_XMAJOR; + break; + case I915_TILING_Y: + ss->ss2.tiled_surface = 1; + ss->ss2.tile_walk = I965_TILEWALK_YMAJOR; + break; + } } static void -pp_nv12_scaling_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect) +ironlake_pp_interface_descriptor_table(struct i965_post_processing_context *pp_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)&pp_context->private_context; - struct object_surface *obj_surface; - struct i965_sampler_state *sampler_state; - struct i965_surface_state *ss; + struct i965_interface_descriptor *desc; dri_bo *bo; - int index; - int in_w, in_h, in_wpitch, in_hpitch; - int out_w, out_h, out_wpitch, out_hpitch; - unsigned int tiling, swizzle; - - /* source surface */ - obj_surface = SURFACE(in_surface_id); - in_w = obj_surface->orig_width; - in_h = obj_surface->orig_height; - in_wpitch = obj_surface->width; - in_hpitch = obj_surface->height; - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + int pp_index = pp_context->current_pp; - /* source Y surface index 1 */ - index = 1; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); + bo = pp_context->idrt.bo; + dri_bo_map(bo, 1); assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; - ss->ss2.width = in_w - 1; - ss->ss2.height = in_h - 1; - ss->ss3.pitch = in_wpitch - 1; - pp_set_surface_tiling(ss, tiling); + desc = bo->virtual; + memset(desc, 0, sizeof(*desc)); + desc->desc0.grf_reg_blocks = 10; + desc->desc0.kernel_start_pointer = pp_context->pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */ + desc->desc1.const_urb_entry_read_offset = 0; + desc->desc1.const_urb_entry_read_len = 4; /* grf 1-4 */ + desc->desc2.sampler_state_pointer = pp_context->sampler_state_table.bo->offset >> 5; + desc->desc2.sampler_count = 0; + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET >> 5); + dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - 0, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc0.grf_reg_blocks, + offsetof(struct i965_interface_descriptor, desc0), + pp_context->pp_modules[pp_index].kernel.bo); - /* source UV surface index 2 */ - index = 2; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + in_wpitch * in_hpitch; - ss->ss2.width = in_w / 2 - 1; - ss->ss2.height = in_h / 2 - 1; - ss->ss3.pitch = in_wpitch - 1; - pp_set_surface_tiling(ss, tiling); dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - in_wpitch * in_hpitch, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc2.sampler_count << 2, + offsetof(struct i965_interface_descriptor, desc2), + pp_context->sampler_state_table.bo); + dri_bo_unmap(bo); + pp_context->idrt.num_interface_descriptors++; +} - /* destination surface */ - obj_surface = SURFACE(out_surface_id); - out_w = obj_surface->orig_width; - out_h = obj_surface->orig_height; - out_wpitch = obj_surface->width; - out_hpitch = obj_surface->height; - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); +static void +ironlake_pp_vfe_state(struct i965_post_processing_context *pp_context) +{ + struct i965_vfe_state *vfe_state; + dri_bo *bo; - /* destination Y surface index 7 */ - index = 7; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); + bo = pp_context->vfe_state.bo; + dri_bo_map(bo, 1); assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; - ss->ss2.width = out_w / 4 - 1; - ss->ss2.height = out_h - 1; - ss->ss3.pitch = out_wpitch - 1; - pp_set_surface_tiling(ss, tiling); + vfe_state = bo->virtual; + memset(vfe_state, 0, sizeof(*vfe_state)); + vfe_state->vfe1.max_threads = pp_context->urb.num_vfe_entries - 1; + vfe_state->vfe1.urb_entry_alloc_size = pp_context->urb.size_vfe_entry - 1; + vfe_state->vfe1.num_urb_entries = pp_context->urb.num_vfe_entries; + vfe_state->vfe1.vfe_mode = VFE_GENERIC_MODE; + vfe_state->vfe1.children_present = 0; + vfe_state->vfe2.interface_descriptor_base = + pp_context->idrt.bo->offset >> 4; /* reloc */ dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); + offsetof(struct i965_vfe_state, vfe2), + pp_context->idrt.bo); dri_bo_unmap(bo); +} - /* destination UV surface index 8 */ - index = 8; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + out_wpitch * out_hpitch; - ss->ss2.width = out_w / 4 - 1; - ss->ss2.height = out_h / 2 - 1; - ss->ss3.pitch = out_wpitch - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - out_wpitch * out_hpitch, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); +static void +ironlake_pp_upload_constants(struct i965_post_processing_context *pp_context) +{ + unsigned char *constant_buffer; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; - /* sampler state */ - dri_bo_map(pp_context->sampler_state_table.bo, True); - assert(pp_context->sampler_state_table.bo->virtual); - sampler_state = pp_context->sampler_state_table.bo->virtual; + assert(sizeof(*pp_static_parameter) == 128); + dri_bo_map(pp_context->curbe.bo, 1); + assert(pp_context->curbe.bo->virtual); + constant_buffer = pp_context->curbe.bo->virtual; + memcpy(constant_buffer, pp_static_parameter, sizeof(*pp_static_parameter)); + dri_bo_unmap(pp_context->curbe.bo); +} - /* SIMD16 Y index 1 */ - sampler_state[1].ss0.min_filter = I965_MAPFILTER_LINEAR; - sampler_state[1].ss0.mag_filter = I965_MAPFILTER_LINEAR; - sampler_state[1].ss1.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; - sampler_state[1].ss1.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; - sampler_state[1].ss1.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; +static void +ironlake_pp_states_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + ironlake_pp_interface_descriptor_table(pp_context); + ironlake_pp_vfe_state(pp_context); + ironlake_pp_upload_constants(pp_context); +} - /* SIMD16 UV index 2 */ - sampler_state[2].ss0.min_filter = I965_MAPFILTER_LINEAR; - sampler_state[2].ss0.mag_filter = I965_MAPFILTER_LINEAR; - sampler_state[2].ss1.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; - sampler_state[2].ss1.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; - sampler_state[2].ss1.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; +static void +ironlake_pp_pipeline_select(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; - dri_bo_unmap(pp_context->sampler_state_table.bo); + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); +} - /* private function & data */ - pp_context->pp_x_steps = pp_scaling_x_steps; - pp_context->pp_y_steps = pp_scaling_y_steps; - pp_context->pp_set_block_parameter = pp_scaling_set_block_parameter; +static void +ironlake_pp_urb_layout(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + unsigned int vfe_fence, cs_fence; - pp_scaling_context->dest_x = dst_rect->x; - pp_scaling_context->dest_y = dst_rect->y; - pp_scaling_context->dest_w = ALIGN(dst_rect->width, 16); - pp_scaling_context->dest_h = ALIGN(dst_rect->height, 16); - pp_scaling_context->src_normalized_x = (float)src_rect->x / in_w / out_w; - pp_scaling_context->src_normalized_y = (float)src_rect->y / in_h / out_h; - - pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h; - - pp_inline_parameter.grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w; - pp_inline_parameter.grf5.block_count_x = pp_scaling_context->dest_w / 16; /* 1 x N */ - pp_inline_parameter.grf5.number_blocks = pp_scaling_context->dest_w / 16; - pp_inline_parameter.grf5.block_vertical_mask = 0xff; - pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; + vfe_fence = pp_context->urb.cs_start; + cs_fence = pp_context->urb.size; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (vfe_fence << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ + (cs_fence << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */ + ADVANCE_BATCH(batch); } -static int -pp_avs_x_steps(void *private_context) +static void +ironlake_pp_state_base_address(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - struct pp_avs_context *pp_avs_context = private_context; + struct intel_batchbuffer *batch = pp_context->batch; - return pp_avs_context->dest_w / 16; + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_RELOC(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); } -static int -pp_avs_y_steps(void *private_context) +static void +ironlake_pp_state_pointers(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - return 1; + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 3); + OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1); + OUT_BATCH(batch, 0); + OUT_RELOC(batch, pp_context->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); + ADVANCE_BATCH(batch); } -static int -pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +static void +ironlake_pp_cs_urb_layout(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context; - float src_x_steping, src_y_steping, video_step_delta; - int tmp_w = ALIGN(pp_avs_context->dest_h * pp_avs_context->src_w / pp_avs_context->src_h, 16); + struct intel_batchbuffer *batch = pp_context->batch; - if (tmp_w >= pp_avs_context->dest_w) { - pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / tmp_w; - pp_inline_parameter.grf6.video_step_delta = 0; - - if (x == 0) { - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = (float)(tmp_w - pp_avs_context->dest_w) / tmp_w / 2 + - pp_avs_context->src_normalized_x; - } else { - src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; - video_step_delta = pp_inline_parameter.grf6.video_step_delta; - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + - 16 * 15 * video_step_delta / 2; - } - } else { - int n0, n1, n2, nls_left, nls_right; - int factor_a = 5, factor_b = 4; - float f; + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CS_URB_STATE | 0); + OUT_BATCH(batch, + ((pp_context->urb.size_cs_entry - 1) << 4) | /* URB Entry Allocation Size */ + (pp_context->urb.num_cs_entries << 0)); /* Number of URB Entries */ + ADVANCE_BATCH(batch); +} - n0 = (pp_avs_context->dest_w - tmp_w) / (16 * 2); - n1 = (pp_avs_context->dest_w - tmp_w) / 16 - n0; - n2 = tmp_w / (16 * factor_a); - nls_left = n0 + n2; - nls_right = n1 + n2; - f = (float) n2 * 16 / tmp_w; - - if (n0 < 5) { - pp_inline_parameter.grf6.video_step_delta = 0.0; +static void +ironlake_pp_constant_buffer(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; - if (x == 0) { - pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / pp_avs_context->dest_w; - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x; - } else { - src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; - video_step_delta = pp_inline_parameter.grf6.video_step_delta; - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + - 16 * 15 * video_step_delta / 2; - } - } else { - if (x < nls_left) { - /* f = a * nls_left * 16 + b * nls_left * 16 * (nls_left * 16 - 1) / 2 */ - float a = f / (nls_left * 16 * factor_b); - float b = (f - nls_left * 16 * a) * 2 / (nls_left * 16 * (nls_left * 16 - 1)); - - pp_inline_parameter.grf6.video_step_delta = b; + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2)); + OUT_RELOC(batch, pp_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + pp_context->urb.size_cs_entry - 1); + ADVANCE_BATCH(batch); +} - if (x == 0) { - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x; - pp_inline_parameter.grf5.normalized_video_x_scaling_step = a; - } else { - src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; - video_step_delta = pp_inline_parameter.grf6.video_step_delta; - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + - 16 * 15 * video_step_delta / 2; - pp_inline_parameter.grf5.normalized_video_x_scaling_step += 16 * b; - } - } else if (x < (pp_avs_context->dest_w / 16 - nls_right)) { - /* scale the center linearly */ - src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; - video_step_delta = pp_inline_parameter.grf6.video_step_delta; - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + - 16 * 15 * video_step_delta / 2; - pp_inline_parameter.grf6.video_step_delta = 0.0; - pp_inline_parameter.grf5.normalized_video_x_scaling_step = 1.0 / tmp_w; - } else { - float a = f / (nls_right * 16 * factor_b); - float b = (f - nls_right * 16 * a) * 2 / (nls_right * 16 * (nls_right * 16 - 1)); +static void +ironlake_pp_object_walker(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + int x, x_steps, y, y_steps; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; - src_x_steping = pp_inline_parameter.grf5.normalized_video_x_scaling_step; - video_step_delta = pp_inline_parameter.grf6.video_step_delta; - pp_inline_parameter.grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + - 16 * 15 * video_step_delta / 2; - pp_inline_parameter.grf6.video_step_delta = -b; + x_steps = pp_context->pp_x_steps(pp_context->private_context); + y_steps = pp_context->pp_y_steps(pp_context->private_context); - if (x == (pp_avs_context->dest_w / 16 - nls_right)) - pp_inline_parameter.grf5.normalized_video_x_scaling_step = a + (nls_right * 16 - 1) * b; - else - pp_inline_parameter.grf5.normalized_video_x_scaling_step -= b * 16; + for (y = 0; y < y_steps; y++) { + for (x = 0; x < x_steps; x++) { + if (!pp_context->pp_set_block_parameter(pp_context, x, y)) { + BEGIN_BATCH(batch, 20); + OUT_BATCH(batch, CMD_MEDIA_OBJECT | 18); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* no indirect data */ + OUT_BATCH(batch, 0); + + /* inline data grf 5-6 */ + assert(sizeof(*pp_inline_parameter) == 64); + intel_batchbuffer_data(batch, pp_inline_parameter, sizeof(*pp_inline_parameter)); + + ADVANCE_BATCH(batch); } } } - - src_y_steping = pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step; - pp_inline_parameter.grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_avs_context->src_normalized_y; - pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x; - pp_inline_parameter.grf5.destination_block_vertical_origin = y * 8 + pp_avs_context->dest_y; - - return 0; } static void -pp_nv12_avs_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect) +ironlake_pp_pipeline_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->private_context; - struct object_surface *obj_surface; - struct i965_surface_state *ss; - struct i965_sampler_8x8 *sampler_8x8; - struct i965_sampler_8x8_state *sampler_8x8_state; - struct i965_surface_state2 *ss_8x8; - dri_bo *bo; - int index; - int in_w, in_h, in_wpitch, in_hpitch; - int out_w, out_h, out_wpitch, out_hpitch; - unsigned int tiling, swizzle; - - /* surface */ - obj_surface = SURFACE(in_surface_id); - in_w = obj_surface->orig_width; - in_h = obj_surface->orig_height; - in_wpitch = obj_surface->width; - in_hpitch = obj_surface->height; - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + struct intel_batchbuffer *batch = pp_context->batch; - /* source Y surface index 1 */ - index = 1; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "Y surface state for sample_8x8", - sizeof(struct i965_surface_state2), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss_8x8 = bo->virtual; - memset(ss_8x8, 0, sizeof(*ss_8x8)); - ss_8x8->ss0.surface_base_address = pp_context->surfaces[index].s_bo->offset; - ss_8x8->ss1.cbcr_pixel_offset_v_direction = 0; - ss_8x8->ss1.width = in_w - 1; - ss_8x8->ss1.height = in_h - 1; - ss_8x8->ss2.half_pitch_for_chroma = 0; - ss_8x8->ss2.pitch = in_wpitch - 1; - ss_8x8->ss2.interleave_chroma = 0; - ss_8x8->ss2.surface_format = SURFACE_FORMAT_Y8_UNORM; - ss_8x8->ss3.x_offset_for_cb = 0; - ss_8x8->ss3.y_offset_for_cb = 0; - pp_set_surface2_tiling(ss_8x8, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - 0, - offsetof(struct i965_surface_state2, ss0), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + ironlake_pp_pipeline_select(ctx, pp_context); + ironlake_pp_state_base_address(ctx, pp_context); + ironlake_pp_state_pointers(ctx, pp_context); + ironlake_pp_urb_layout(ctx, pp_context); + ironlake_pp_cs_urb_layout(ctx, pp_context); + ironlake_pp_constant_buffer(ctx, pp_context); + ironlake_pp_object_walker(ctx, pp_context); + intel_batchbuffer_end_atomic(batch); +} - /* source UV surface index 2 */ - index = 2; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "UV surface state for sample_8x8", - sizeof(struct i965_surface_state2), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss_8x8 = bo->virtual; - memset(ss_8x8, 0, sizeof(*ss_8x8)); - ss_8x8->ss0.surface_base_address = pp_context->surfaces[index].s_bo->offset + in_wpitch * in_hpitch; - ss_8x8->ss1.cbcr_pixel_offset_v_direction = 0; - ss_8x8->ss1.width = in_w - 1; - ss_8x8->ss1.height = in_h - 1; - ss_8x8->ss2.half_pitch_for_chroma = 0; - ss_8x8->ss2.pitch = in_wpitch - 1; - ss_8x8->ss2.interleave_chroma = 1; - ss_8x8->ss2.surface_format = SURFACE_FORMAT_PLANAR_420_8; - ss_8x8->ss3.x_offset_for_cb = 0; - ss_8x8->ss3.y_offset_for_cb = 0; - pp_set_surface2_tiling(ss_8x8, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - in_wpitch * in_hpitch, - offsetof(struct i965_surface_state2, ss0), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); +// update u/v offset when the surface format are packed yuv +static void i965_update_src_surface_static_parameter( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *surface) +{ + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + int fourcc = pp_get_surface_fourcc(ctx, surface); + + switch (fourcc) { + case VA_FOURCC_YUY2: + pp_static_parameter->grf1.source_packed_u_offset = 1; + pp_static_parameter->grf1.source_packed_v_offset = 3; + break; + case VA_FOURCC_UYVY: + pp_static_parameter->grf1.source_packed_y_offset = 1; + pp_static_parameter->grf1.source_packed_v_offset = 2; + break; + case VA_FOURCC_BGRX: + case VA_FOURCC_BGRA: + pp_static_parameter->grf1.source_rgb_layout = 0; + break; + case VA_FOURCC_RGBX: + case VA_FOURCC_RGBA: + pp_static_parameter->grf1.source_rgb_layout = 1; + break; + default: + break; + } + +} - /* destination surface */ - obj_surface = SURFACE(out_surface_id); - out_w = obj_surface->orig_width; - out_h = obj_surface->orig_height; - out_wpitch = obj_surface->width; - out_hpitch = obj_surface->height; - assert(out_w <= out_wpitch && out_h <= out_hpitch); - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); +static void i965_update_dst_surface_static_parameter( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *surface) +{ + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + int fourcc = pp_get_surface_fourcc(ctx, surface); + + switch (fourcc) { + case VA_FOURCC_YUY2: + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_u_offset = 1; + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_v_offset = 3; + break; + case VA_FOURCC_UYVY: + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_y_offset = 1; + pp_static_parameter->grf1.r1_2.load_and_save.destination_packed_v_offset = 2; + break; + case VA_FOURCC_BGRX: + case VA_FOURCC_BGRA: + pp_static_parameter->grf1.r1_2.csc.destination_rgb_layout = 0; + break; + case VA_FOURCC_RGBX: + case VA_FOURCC_RGBA: + pp_static_parameter->grf1.r1_2.csc.destination_rgb_layout = 1; + break; + default: + break; + } + +} - /* destination Y surface index 7 */ - index = 7; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; +static void +i965_pp_set_surface_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + dri_bo *surf_bo, unsigned long surf_bo_offset, + int width, int height, int pitch, int format, + int index, int is_target) +{ + struct i965_surface_state *ss; + dri_bo *ss_bo; + unsigned int tiling; + unsigned int swizzle; + + dri_bo_get_tiling(surf_bo, &tiling, &swizzle); + ss_bo = pp_context->surface_state_binding_table.bo; + assert(ss_bo); + + dri_bo_map(ss_bo, True); + assert(ss_bo->virtual); + ss = (struct i965_surface_state *)((char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index)); memset(ss, 0, sizeof(*ss)); ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; - ss->ss2.width = out_w / 4 - 1; - ss->ss2.height = out_h - 1; - ss->ss3.pitch = out_wpitch - 1; + ss->ss0.surface_format = format; + ss->ss1.base_addr = surf_bo->offset + surf_bo_offset; + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + ss->ss3.pitch = pitch - 1; pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - 0, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_RENDER, is_target ? I915_GEM_DOMAIN_RENDER : 0, + surf_bo_offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state, ss1), + surf_bo); + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); +} - /* destination UV surface index 8 */ - index = 8; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; +static void +i965_pp_set_surface2_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + dri_bo *surf_bo, unsigned long surf_bo_offset, + int width, int height, int wpitch, + int xoffset, int yoffset, + int format, int interleave_chroma, + int index) +{ + struct i965_surface_state2 *ss2; + dri_bo *ss2_bo; + unsigned int tiling; + unsigned int swizzle; + + dri_bo_get_tiling(surf_bo, &tiling, &swizzle); + ss2_bo = pp_context->surface_state_binding_table.bo; + assert(ss2_bo); + + dri_bo_map(ss2_bo, True); + assert(ss2_bo->virtual); + ss2 = (struct i965_surface_state2 *)((char *)ss2_bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss2, 0, sizeof(*ss2)); + ss2->ss0.surface_base_address = surf_bo->offset + surf_bo_offset; + ss2->ss1.cbcr_pixel_offset_v_direction = 0; + ss2->ss1.width = width - 1; + ss2->ss1.height = height - 1; + ss2->ss2.pitch = wpitch - 1; + ss2->ss2.interleave_chroma = interleave_chroma; + ss2->ss2.surface_format = format; + ss2->ss3.x_offset_for_cb = xoffset; + ss2->ss3.y_offset_for_cb = yoffset; + pp_set_surface2_tiling(ss2, tiling); + dri_bo_emit_reloc(ss2_bo, + I915_GEM_DOMAIN_RENDER, 0, + surf_bo_offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct i965_surface_state2, ss0), + surf_bo); + ((unsigned int *)((char *)ss2_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss2_bo); +} + +static void +gen7_pp_set_surface_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + dri_bo *surf_bo, unsigned long surf_bo_offset, + int width, int height, int pitch, int format, + int index, int is_target) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + struct gen7_surface_state *ss; + dri_bo *ss_bo; + unsigned int tiling; + unsigned int swizzle; + + dri_bo_get_tiling(surf_bo, &tiling, &swizzle); + ss_bo = pp_context->surface_state_binding_table.bo; + assert(ss_bo); + + dri_bo_map(ss_bo, True); + assert(ss_bo->virtual); + ss = (struct gen7_surface_state *)((char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index)); memset(ss, 0, sizeof(*ss)); ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + out_wpitch * out_hpitch; - ss->ss2.width = out_w / 4 - 1; - ss->ss2.height = out_h / 2 - 1; - ss->ss3.pitch = out_wpitch - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - out_wpitch * out_hpitch, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); - - /* sampler 8x8 state */ - dri_bo_map(pp_context->sampler_state_table.bo_8x8, True); - assert(pp_context->sampler_state_table.bo_8x8->virtual); - assert(sizeof(*sampler_8x8_state) == sizeof(int) * 138); - sampler_8x8_state = pp_context->sampler_state_table.bo_8x8->virtual; - memset(sampler_8x8_state, 0, sizeof(*sampler_8x8_state)); - sampler_8x8_state->dw136.default_sharpness_level = 0; - sampler_8x8_state->dw137.adaptive_filter_for_all_channel = 1; - sampler_8x8_state->dw137.bypass_y_adaptive_filtering = 1; - sampler_8x8_state->dw137.bypass_x_adaptive_filtering = 1; + ss->ss0.surface_format = format; + ss->ss1.base_addr = surf_bo->offset + surf_bo_offset; + ss->ss2.width = width - 1; + ss->ss2.height = height - 1; + ss->ss3.pitch = pitch - 1; + gen7_pp_set_surface_tiling(ss, tiling); + if (IS_HASWELL(i965->intel.device_info)) + gen7_render_set_surface_scs(ss); + dri_bo_emit_reloc(ss_bo, + I915_GEM_DOMAIN_RENDER, is_target ? I915_GEM_DOMAIN_RENDER : 0, + surf_bo_offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state, ss1), + surf_bo); + ((unsigned int *)((char *)ss_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss_bo); +} + +static void +gen7_pp_set_surface2_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + dri_bo *surf_bo, unsigned long surf_bo_offset, + int width, int height, int wpitch, + int xoffset, int yoffset, + int format, int interleave_chroma, + int index) +{ + struct gen7_surface_state2 *ss2; + dri_bo *ss2_bo; + unsigned int tiling; + unsigned int swizzle; + + dri_bo_get_tiling(surf_bo, &tiling, &swizzle); + ss2_bo = pp_context->surface_state_binding_table.bo; + assert(ss2_bo); + + dri_bo_map(ss2_bo, True); + assert(ss2_bo->virtual); + ss2 = (struct gen7_surface_state2 *)((char *)ss2_bo->virtual + SURFACE_STATE_OFFSET(index)); + memset(ss2, 0, sizeof(*ss2)); + ss2->ss0.surface_base_address = surf_bo->offset + surf_bo_offset; + ss2->ss1.cbcr_pixel_offset_v_direction = 0; + ss2->ss1.width = width - 1; + ss2->ss1.height = height - 1; + ss2->ss2.pitch = wpitch - 1; + ss2->ss2.interleave_chroma = interleave_chroma; + ss2->ss2.surface_format = format; + ss2->ss3.x_offset_for_cb = xoffset; + ss2->ss3.y_offset_for_cb = yoffset; + gen7_pp_set_surface2_tiling(ss2, tiling); + dri_bo_emit_reloc(ss2_bo, + I915_GEM_DOMAIN_RENDER, 0, + surf_bo_offset, + SURFACE_STATE_OFFSET(index) + offsetof(struct gen7_surface_state2, ss0), + surf_bo); + ((unsigned int *)((char *)ss2_bo->virtual + BINDING_TABLE_OFFSET))[index] = SURFACE_STATE_OFFSET(index); + dri_bo_unmap(ss2_bo); +} + +static void +pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *surface, + int base_index, int is_target, + int *width, int *height, int *pitch, int *offset) +{ + struct object_surface *obj_surface; + struct object_image *obj_image; + dri_bo *bo; + int fourcc = pp_get_surface_fourcc(ctx, surface); + const int Y = 0; + const int U = ((fourcc == VA_FOURCC_YV12) || + (fourcc == VA_FOURCC_YV16)) + ? 2 : 1; + const int V = ((fourcc == VA_FOURCC_YV12) || + (fourcc == VA_FOURCC_YV16)) + ? 1 : 2; + const int UV = 1; + int interleaved_uv = fourcc == VA_FOURCC_NV12; + int packed_yuv = (fourcc == VA_FOURCC_YUY2 || fourcc == VA_FOURCC_UYVY); + int full_packed_format = (fourcc == VA_FOURCC_RGBA || + fourcc == VA_FOURCC_RGBX || + fourcc == VA_FOURCC_BGRA || + fourcc == VA_FOURCC_BGRX); + int scale_factor_of_1st_plane_width_in_byte = 1; + + if (surface->type == I965_SURFACE_TYPE_SURFACE) { + obj_surface = (struct object_surface *)surface->base; + bo = obj_surface->bo; + width[0] = obj_surface->orig_width; + height[0] = obj_surface->orig_height; + pitch[0] = obj_surface->width; + offset[0] = 0; + + if (full_packed_format) { + scale_factor_of_1st_plane_width_in_byte = 4; + } + else if (packed_yuv ) { + scale_factor_of_1st_plane_width_in_byte = 2; + } + else if (interleaved_uv) { + width[1] = obj_surface->orig_width; + height[1] = obj_surface->orig_height / 2; + pitch[1] = obj_surface->width; + offset[1] = offset[0] + obj_surface->width * obj_surface->height; + } else { + width[1] = obj_surface->orig_width / 2; + height[1] = obj_surface->orig_height / 2; + pitch[1] = obj_surface->width / 2; + offset[1] = offset[0] + obj_surface->width * obj_surface->height; + width[2] = obj_surface->orig_width / 2; + height[2] = obj_surface->orig_height / 2; + pitch[2] = obj_surface->width / 2; + offset[2] = offset[1] + (obj_surface->width / 2) * (obj_surface->height / 2); + } + } else { + obj_image = (struct object_image *)surface->base; + bo = obj_image->bo; + width[0] = obj_image->image.width; + height[0] = obj_image->image.height; + pitch[0] = obj_image->image.pitches[0]; + offset[0] = obj_image->image.offsets[0]; + + if (full_packed_format) { + scale_factor_of_1st_plane_width_in_byte = 4; + } + else if (packed_yuv ) { + scale_factor_of_1st_plane_width_in_byte = 2; + } + else if (interleaved_uv) { + width[1] = obj_image->image.width; + height[1] = obj_image->image.height / 2; + pitch[1] = obj_image->image.pitches[1]; + offset[1] = obj_image->image.offsets[1]; + } else { + width[1] = obj_image->image.width / 2; + height[1] = obj_image->image.height / 2; + pitch[1] = obj_image->image.pitches[1]; + offset[1] = obj_image->image.offsets[1]; + width[2] = obj_image->image.width / 2; + height[2] = obj_image->image.height / 2; + pitch[2] = obj_image->image.pitches[2]; + offset[2] = obj_image->image.offsets[2]; + if (fourcc == VA_FOURCC_YV16) { + width[1] = obj_image->image.width / 2; + height[1] = obj_image->image.height; + width[2] = obj_image->image.width / 2; + height[2] = obj_image->image.height; + } + } + } + + /* Y surface */ + i965_pp_set_surface_state(ctx, pp_context, + bo, offset[Y], + ALIGN(width[Y] *scale_factor_of_1st_plane_width_in_byte, 4) / 4, height[Y], pitch[Y], I965_SURFACEFORMAT_R8_UNORM, + base_index, is_target); + + if (!packed_yuv && !full_packed_format) { + if (interleaved_uv) { + i965_pp_set_surface_state(ctx, pp_context, + bo, offset[UV], + ALIGN(width[UV], 4) / 4, height[UV], pitch[UV], I965_SURFACEFORMAT_R8_UNORM, + base_index + 1, is_target); + } else { + /* U surface */ + i965_pp_set_surface_state(ctx, pp_context, + bo, offset[U], + ALIGN(width[U], 4) / 4, height[U], pitch[U], I965_SURFACEFORMAT_R8_UNORM, + base_index + 1, is_target); + + /* V surface */ + i965_pp_set_surface_state(ctx, pp_context, + bo, offset[V], + ALIGN(width[V], 4) / 4, height[V], pitch[V], I965_SURFACEFORMAT_R8_UNORM, + base_index + 2, is_target); + } + } + +} + +static void +gen7_pp_set_media_rw_message_surface(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *surface, + int base_index, int is_target, + const VARectangle *rect, + int *width, int *height, int *pitch, int *offset) +{ + struct object_surface *obj_surface; + struct object_image *obj_image; + dri_bo *bo; + int fourcc = pp_get_surface_fourcc(ctx, surface); + const i965_fourcc_info *fourcc_info = get_fourcc_info(fourcc); + + if (fourcc_info == NULL) + return; + + if (surface->type == I965_SURFACE_TYPE_SURFACE) { + obj_surface = (struct object_surface *)surface->base; + bo = obj_surface->bo; + width[0] = MIN(rect->x + rect->width, obj_surface->orig_width); + height[0] = MIN(rect->y + rect->height, obj_surface->orig_height); + pitch[0] = obj_surface->width; + offset[0] = 0; + + if (fourcc_info->num_planes == 1 && is_target) + width[0] = width[0] * (fourcc_info->bpp[0] / 8); /* surface format is R8 */ + + width[1] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_surface->cb_cr_width); + height[1] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_surface->cb_cr_height); + pitch[1] = obj_surface->cb_cr_pitch; + offset[1] = obj_surface->y_cb_offset * obj_surface->width; + + width[2] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_surface->cb_cr_width); + height[2] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_surface->cb_cr_height); + pitch[2] = obj_surface->cb_cr_pitch; + offset[2] = obj_surface->y_cr_offset * obj_surface->width; + } else { + int U = 0, V = 0; + + /* FIXME: add support for ARGB/ABGR image */ + obj_image = (struct object_image *)surface->base; + bo = obj_image->bo; + width[0] = MIN(rect->x + rect->width, obj_image->image.width); + height[0] = MIN(rect->y + rect->height, obj_image->image.height); + pitch[0] = obj_image->image.pitches[0]; + offset[0] = obj_image->image.offsets[0]; + + if (fourcc_info->num_planes == 1) { + if (is_target) + width[0] = width[0] * (fourcc_info->bpp[0] / 8); /* surface format is R8 */ + } else if (fourcc_info->num_planes == 2) { + U = 1, V = 1; + } else { + assert(fourcc_info->num_components == 3); + + U = fourcc_info->components[1].plane; + V = fourcc_info->components[2].plane; + assert((U == 1 && V == 2) || + (U == 2 && V == 1)); + } + + /* Always set width/height although they aren't used for fourcc_info->num_planes == 1 */ + width[1] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_image->image.width / fourcc_info->hfactor); + height[1] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_image->image.height / fourcc_info->vfactor); + pitch[1] = obj_image->image.pitches[U]; + offset[1] = obj_image->image.offsets[U]; + + width[2] = MIN(rect->x / fourcc_info->hfactor + rect->width / fourcc_info->hfactor, obj_image->image.width / fourcc_info->hfactor); + height[2] = MIN(rect->y / fourcc_info->vfactor + rect->height / fourcc_info->vfactor, obj_image->image.height / fourcc_info->vfactor); + pitch[2] = obj_image->image.pitches[V]; + offset[2] = obj_image->image.offsets[V]; + } + + if (is_target) { + gen7_pp_set_surface_state(ctx, pp_context, + bo, 0, + ALIGN(width[0], 4) / 4, height[0], pitch[0], + I965_SURFACEFORMAT_R8_UINT, + base_index, 1); + + if (fourcc_info->num_planes == 2) { + gen7_pp_set_surface_state(ctx, pp_context, + bo, offset[1], + ALIGN(width[1], 2) / 2, height[1], pitch[1], + I965_SURFACEFORMAT_R8G8_SINT, + base_index + 1, 1); + } else if (fourcc_info->num_planes == 3) { + gen7_pp_set_surface_state(ctx, pp_context, + bo, offset[1], + ALIGN(width[1], 4) / 4, height[1], pitch[1], + I965_SURFACEFORMAT_R8_SINT, + base_index + 1, 1); + gen7_pp_set_surface_state(ctx, pp_context, + bo, offset[2], + ALIGN(width[2], 4) / 4, height[2], pitch[2], + I965_SURFACEFORMAT_R8_SINT, + base_index + 2, 1); + } + + if (fourcc_info->format == I965_COLOR_RGB) { + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + /* the format is MSB: X-B-G-R */ + pp_static_parameter->grf2.save_avs_rgb_swap = 0; + if ((fourcc == VA_FOURCC_BGRA) || + (fourcc == VA_FOURCC_BGRX)) { + /* It is stored as MSB: X-R-G-B */ + pp_static_parameter->grf2.save_avs_rgb_swap = 1; + } + } + } else { + int format0 = SURFACE_FORMAT_Y8_UNORM; + + switch (fourcc) { + case VA_FOURCC_YUY2: + format0 = SURFACE_FORMAT_YCRCB_NORMAL; + break; + + case VA_FOURCC_UYVY: + format0 = SURFACE_FORMAT_YCRCB_SWAPY; + break; + + default: + break; + } + + if (fourcc_info->format == I965_COLOR_RGB) { + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + /* Only R8G8B8A8_UNORM is supported for BGRX or RGBX */ + format0 = SURFACE_FORMAT_R8G8B8A8_UNORM; + pp_static_parameter->grf2.src_avs_rgb_swap = 0; + if ((fourcc == VA_FOURCC_BGRA) || + (fourcc == VA_FOURCC_BGRX)) { + pp_static_parameter->grf2.src_avs_rgb_swap = 1; + } + } + + gen7_pp_set_surface2_state(ctx, pp_context, + bo, offset[0], + width[0], height[0], pitch[0], + 0, 0, + format0, 0, + base_index); + + if (fourcc_info->num_planes == 2) { + gen7_pp_set_surface2_state(ctx, pp_context, + bo, offset[1], + width[1], height[1], pitch[1], + 0, 0, + SURFACE_FORMAT_R8B8_UNORM, 0, + base_index + 1); + } else if (fourcc_info->num_planes == 3) { + gen7_pp_set_surface2_state(ctx, pp_context, + bo, offset[1], + width[1], height[1], pitch[1], + 0, 0, + SURFACE_FORMAT_R8_UNORM, 0, + base_index + 1); + gen7_pp_set_surface2_state(ctx, pp_context, + bo, offset[2], + width[2], height[2], pitch[2], + 0, 0, + SURFACE_FORMAT_R8_UNORM, 0, + base_index + 2); + } + } +} + +static int +pp_null_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_null_y_steps(void *private_context) +{ + return 1; +} + +static int +pp_null_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + return 0; +} + +static VAStatus +pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + /* private function & data */ + pp_context->pp_x_steps = pp_null_x_steps; + pp_context->pp_y_steps = pp_null_y_steps; + pp_context->private_context = NULL; + pp_context->pp_set_block_parameter = pp_null_set_block_parameter; + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static int +pp_load_save_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_load_save_y_steps(void *private_context) +{ + struct pp_load_save_context *pp_load_save_context = private_context; + + return pp_load_save_context->dest_h / 8; +} + +static int +pp_load_save_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + struct pp_load_save_context *pp_load_save_context = (struct pp_load_save_context *)pp_context->private_context; + + pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16 + pp_load_save_context->dest_x; + pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8 + pp_load_save_context->dest_y; + + return 0; +} + +static void calculate_boundary_block_mask(struct i965_post_processing_context *pp_context, const VARectangle *dst_rect) +{ + int i; + /* x offset of dest surface must be dword aligned. + * so we have to extend dst surface on left edge, and mask out pixels not interested + */ + if (dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT) { + pp_context->block_horizontal_mask_left = 0; + for (i=dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; iblock_horizontal_mask_left |= 1<block_horizontal_mask_left = 0xffff; + } + + int dst_width_adjust = dst_rect->width + dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + if (dst_width_adjust%GPU_ASM_BLOCK_WIDTH){ + pp_context->block_horizontal_mask_right = (1 << (dst_width_adjust%GPU_ASM_BLOCK_WIDTH)) - 1; + } + else { + pp_context->block_horizontal_mask_right = 0xffff; + } + + if (dst_rect->height%GPU_ASM_BLOCK_HEIGHT){ + pp_context->block_vertical_mask_bottom = (1 << (dst_rect->height%GPU_ASM_BLOCK_HEIGHT)) - 1; + } + else { + pp_context->block_vertical_mask_bottom = 0xff; + } + +} +static VAStatus +pp_plx_load_save_plx_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct pp_load_save_context *pp_load_save_context = (struct pp_load_save_context *)&pp_context->pp_load_save_context; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + int width[3], height[3], pitch[3], offset[3]; + + /* source surface */ + pp_set_media_rw_message_surface(ctx, pp_context, src_surface, 1, 0, + width, height, pitch, offset); + + /* destination surface */ + pp_set_media_rw_message_surface(ctx, pp_context, dst_surface, 7, 1, + width, height, pitch, offset); + + /* private function & data */ + pp_context->pp_x_steps = pp_load_save_x_steps; + pp_context->pp_y_steps = pp_load_save_y_steps; + pp_context->private_context = &pp_context->pp_load_save_context; + pp_context->pp_set_block_parameter = pp_load_save_set_block_parameter; + + int dst_left_edge_extend = dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT;; + pp_load_save_context->dest_x = dst_rect->x - dst_left_edge_extend; + pp_load_save_context->dest_y = dst_rect->y; + pp_load_save_context->dest_h = ALIGN(dst_rect->height, 8); + pp_load_save_context->dest_w = ALIGN(dst_rect->width+dst_left_edge_extend, 16); + + pp_inline_parameter->grf5.block_count_x = pp_load_save_context->dest_w / 16; /* 1 x N */ + pp_inline_parameter->grf5.number_blocks = pp_load_save_context->dest_w / 16; + + pp_static_parameter->grf3.horizontal_origin_offset = src_rect->x; + pp_static_parameter->grf3.vertical_origin_offset = src_rect->y; + + // update u/v offset for packed yuv + i965_update_src_surface_static_parameter (ctx, pp_context, src_surface); + i965_update_dst_surface_static_parameter (ctx, pp_context, dst_surface); + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static int +pp_scaling_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_scaling_y_steps(void *private_context) +{ + struct pp_scaling_context *pp_scaling_context = private_context; + + return pp_scaling_context->dest_h / 8; +} + +static int +pp_scaling_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)pp_context->private_context; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + float src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step; + float src_y_steping = pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step; + + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = src_x_steping * x * 16 + pp_scaling_context->src_normalized_x; + pp_inline_parameter->grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_scaling_context->src_normalized_y; + pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16 + pp_scaling_context->dest_x; + pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8 + pp_scaling_context->dest_y; + + return 0; +} + +static VAStatus +pp_nv12_scaling_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct pp_scaling_context *pp_scaling_context = (struct pp_scaling_context *)&pp_context->pp_scaling_context; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + struct object_surface *obj_surface; + struct i965_sampler_state *sampler_state; + int in_w, in_h, in_wpitch, in_hpitch; + int out_w, out_h, out_wpitch, out_hpitch; + + /* source surface */ + obj_surface = (struct object_surface *)src_surface->base; + in_w = obj_surface->orig_width; + in_h = obj_surface->orig_height; + in_wpitch = obj_surface->width; + in_hpitch = obj_surface->height; + + /* source Y surface index 1 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, 0, + in_w, in_h, in_wpitch, I965_SURFACEFORMAT_R8_UNORM, + 1, 0); + + /* source UV surface index 2 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, in_wpitch * in_hpitch, + ALIGN(in_w, 2) / 2, in_h / 2, in_wpitch, I965_SURFACEFORMAT_R8G8_UNORM, + 2, 0); + + /* destination surface */ + obj_surface = (struct object_surface *)dst_surface->base; + out_w = obj_surface->orig_width; + out_h = obj_surface->orig_height; + out_wpitch = obj_surface->width; + out_hpitch = obj_surface->height; + + /* destination Y surface index 7 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, 0, + ALIGN(out_w, 4) / 4, out_h, out_wpitch, I965_SURFACEFORMAT_R8_UNORM, + 7, 1); + + /* destination UV surface index 8 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, out_wpitch * out_hpitch, + ALIGN(out_w, 4) / 4, out_h / 2, out_wpitch, I965_SURFACEFORMAT_R8G8_UNORM, + 8, 1); + + /* sampler state */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + sampler_state = pp_context->sampler_state_table.bo->virtual; + + /* SIMD16 Y index 1 */ + sampler_state[1].ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state[1].ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state[1].ss1.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[1].ss1.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[1].ss1.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + + /* SIMD16 UV index 2 */ + sampler_state[2].ss0.min_filter = I965_MAPFILTER_LINEAR; + sampler_state[2].ss0.mag_filter = I965_MAPFILTER_LINEAR; + sampler_state[2].ss1.r_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[2].ss1.s_wrap_mode = I965_TEXCOORDMODE_CLAMP; + sampler_state[2].ss1.t_wrap_mode = I965_TEXCOORDMODE_CLAMP; + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_scaling_x_steps; + pp_context->pp_y_steps = pp_scaling_y_steps; + pp_context->private_context = &pp_context->pp_scaling_context; + pp_context->pp_set_block_parameter = pp_scaling_set_block_parameter; + + int dst_left_edge_extend = dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + float src_left_edge_extend = (float)dst_left_edge_extend*src_rect->width/dst_rect->width; + pp_scaling_context->dest_x = dst_rect->x - dst_left_edge_extend; + pp_scaling_context->dest_y = dst_rect->y; + pp_scaling_context->dest_w = ALIGN(dst_rect->width + dst_left_edge_extend, 16); + pp_scaling_context->dest_h = ALIGN(dst_rect->height, 8); + pp_scaling_context->src_normalized_x = (float)(src_rect->x - src_left_edge_extend)/ in_w; + pp_scaling_context->src_normalized_y = (float)src_rect->y / in_h; + + pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / dst_rect->height; + + pp_inline_parameter->grf5.normalized_video_x_scaling_step = (float) (src_rect->width + src_left_edge_extend)/ in_w / (dst_rect->width + dst_left_edge_extend); + pp_inline_parameter->grf5.block_count_x = pp_scaling_context->dest_w / 16; /* 1 x N */ + pp_inline_parameter->grf5.number_blocks = pp_scaling_context->dest_w / 16; + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static int +pp_avs_x_steps(void *private_context) +{ + struct pp_avs_context *pp_avs_context = private_context; + + return pp_avs_context->dest_w / 16; +} + +static int +pp_avs_y_steps(void *private_context) +{ + return 1; +} + +static int +pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)pp_context->private_context; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + float src_x_steping, src_y_steping, video_step_delta; + int tmp_w = ALIGN(pp_avs_context->dest_h * pp_avs_context->src_w / pp_avs_context->src_h, 16); + + if (pp_static_parameter->grf4.r4_2.avs.nlas == 0) { + src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step; + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = src_x_steping * x * 16 + pp_avs_context->src_normalized_x; + } else if (tmp_w >= pp_avs_context->dest_w) { + pp_inline_parameter->grf5.normalized_video_x_scaling_step = 1.0 / tmp_w; + pp_inline_parameter->grf6.video_step_delta = 0; + + if (x == 0) { + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = (float)(tmp_w - pp_avs_context->dest_w) / tmp_w / 2 + + pp_avs_context->src_normalized_x; + } else { + src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter->grf6.video_step_delta; + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + } + } else { + int n0, n1, n2, nls_left, nls_right; + int factor_a = 5, factor_b = 4; + float f; + + n0 = (pp_avs_context->dest_w - tmp_w) / (16 * 2); + n1 = (pp_avs_context->dest_w - tmp_w) / 16 - n0; + n2 = tmp_w / (16 * factor_a); + nls_left = n0 + n2; + nls_right = n1 + n2; + f = (float) n2 * 16 / tmp_w; + + if (n0 < 5) { + pp_inline_parameter->grf6.video_step_delta = 0.0; + + if (x == 0) { + pp_inline_parameter->grf5.normalized_video_x_scaling_step = 1.0 / pp_avs_context->dest_w; + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x; + } else { + src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter->grf6.video_step_delta; + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + } + } else { + if (x < nls_left) { + /* f = a * nls_left * 16 + b * nls_left * 16 * (nls_left * 16 - 1) / 2 */ + float a = f / (nls_left * 16 * factor_b); + float b = (f - nls_left * 16 * a) * 2 / (nls_left * 16 * (nls_left * 16 - 1)); + + pp_inline_parameter->grf6.video_step_delta = b; + + if (x == 0) { + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin = pp_avs_context->src_normalized_x; + pp_inline_parameter->grf5.normalized_video_x_scaling_step = a; + } else { + src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter->grf6.video_step_delta; + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + pp_inline_parameter->grf5.normalized_video_x_scaling_step += 16 * b; + } + } else if (x < (pp_avs_context->dest_w / 16 - nls_right)) { + /* scale the center linearly */ + src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter->grf6.video_step_delta; + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + pp_inline_parameter->grf6.video_step_delta = 0.0; + pp_inline_parameter->grf5.normalized_video_x_scaling_step = 1.0 / tmp_w; + } else { + float a = f / (nls_right * 16 * factor_b); + float b = (f - nls_right * 16 * a) * 2 / (nls_right * 16 * (nls_right * 16 - 1)); + + src_x_steping = pp_inline_parameter->grf5.normalized_video_x_scaling_step; + video_step_delta = pp_inline_parameter->grf6.video_step_delta; + pp_inline_parameter->grf5.r5_1.source_surface_block_normalized_horizontal_origin += src_x_steping * 16 + + 16 * 15 * video_step_delta / 2; + pp_inline_parameter->grf6.video_step_delta = -b; + + if (x == (pp_avs_context->dest_w / 16 - nls_right)) + pp_inline_parameter->grf5.normalized_video_x_scaling_step = a + (nls_right * 16 - 1) * b; + else + pp_inline_parameter->grf5.normalized_video_x_scaling_step -= b * 16; + } + } + } + + src_y_steping = pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step; + pp_inline_parameter->grf5.source_surface_block_normalized_vertical_origin = src_y_steping * y * 8 + pp_avs_context->src_normalized_y; + pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x; + pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8 + pp_avs_context->dest_y; + + return 0; +} + +static const AVSConfig gen5_avs_config = { + .coeff_frac_bits = 6, + .coeff_epsilon = 1.0f / (1U << 6), + .num_phases = 16, + .num_luma_coeffs = 8, + .num_chroma_coeffs = 4, + + .coeff_range = { + .lower_bound = { + .y_k_h = { -0.25f, -0.5f, -1, 0, 0, -1, -0.5f, -0.25f }, + .y_k_v = { -0.25f, -0.5f, -1, 0, 0, -1, -0.5f, -0.25f }, + .uv_k_h = { -1, 0, 0, -1 }, + .uv_k_v = { -1, 0, 0, -1 }, + }, + .upper_bound = { + .y_k_h = { 0.25f, 0.5f, 1, 2, 2, 1, 0.5f, 0.25f }, + .y_k_v = { 0.25f, 0.5f, 1, 2, 2, 1, 0.5f, 0.25f }, + .uv_k_h = { 1, 2, 2, 1 }, + .uv_k_v = { 1, 2, 2, 1 }, + }, + }, +}; + +static const AVSConfig gen6_avs_config = { + .coeff_frac_bits = 6, + .coeff_epsilon = 1.0f / (1U << 6), + .num_phases = 16, + .num_luma_coeffs = 8, + .num_chroma_coeffs = 4, + + .coeff_range = { + .lower_bound = { + .y_k_h = { -0.25f, -0.5f, -1, -2, -2, -1, -0.5f, -0.25f }, + .y_k_v = { -0.25f, -0.5f, -1, -2, -2, -1, -0.5f, -0.25f }, + .uv_k_h = { -1, 0, 0, -1 }, + .uv_k_v = { -1, 0, 0, -1 }, + }, + .upper_bound = { + .y_k_h = { 0.25f, 0.5f, 1, 2, 2, 1, 0.5f, 0.25f }, + .y_k_v = { 0.25f, 0.5f, 1, 2, 2, 1, 0.5f, 0.25f }, + .uv_k_h = { 1, 2, 2, 1 }, + .uv_k_v = { 1, 2, 2, 1 }, + }, + }, +}; + +static VAStatus +pp_nv12_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->pp_avs_context; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + struct object_surface *obj_surface; + struct i965_sampler_8x8 *sampler_8x8; + struct i965_sampler_8x8_state *sampler_8x8_state; + int index; + int in_w, in_h, in_wpitch, in_hpitch; + int out_w, out_h, out_wpitch, out_hpitch; + int i; + AVSState * const avs = &pp_avs_context->state; + float sx, sy; + + const int nlas = (pp_context->filter_flags & VA_FILTER_SCALING_MASK) == + VA_FILTER_SCALING_NL_ANAMORPHIC; + + /* surface */ + obj_surface = (struct object_surface *)src_surface->base; + in_w = obj_surface->orig_width; + in_h = obj_surface->orig_height; + in_wpitch = obj_surface->width; + in_hpitch = obj_surface->height; + + /* source Y surface index 1 */ + i965_pp_set_surface2_state(ctx, pp_context, + obj_surface->bo, 0, + in_w, in_h, in_wpitch, + 0, 0, + SURFACE_FORMAT_Y8_UNORM, 0, + 1); + + /* source UV surface index 2 */ + i965_pp_set_surface2_state(ctx, pp_context, + obj_surface->bo, in_wpitch * in_hpitch, + in_w / 2, in_h / 2, in_wpitch, + 0, 0, + SURFACE_FORMAT_R8B8_UNORM, 0, + 2); + + /* destination surface */ + obj_surface = (struct object_surface *)dst_surface->base; + out_w = obj_surface->orig_width; + out_h = obj_surface->orig_height; + out_wpitch = obj_surface->width; + out_hpitch = obj_surface->height; + assert(out_w <= out_wpitch && out_h <= out_hpitch); + + /* destination Y surface index 7 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, 0, + ALIGN(out_w, 4) / 4, out_h, out_wpitch, I965_SURFACEFORMAT_R8_UNORM, + 7, 1); + + /* destination UV surface index 8 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, out_wpitch * out_hpitch, + ALIGN(out_w, 4) / 4, out_h / 2, out_wpitch, I965_SURFACEFORMAT_R8G8_UNORM, + 8, 1); + + /* sampler 8x8 state */ + dri_bo_map(pp_context->sampler_state_table.bo_8x8, True); + assert(pp_context->sampler_state_table.bo_8x8->virtual); + assert(sizeof(*sampler_8x8_state) == sizeof(int) * 138); + sampler_8x8_state = pp_context->sampler_state_table.bo_8x8->virtual; + memset(sampler_8x8_state, 0, sizeof(*sampler_8x8_state)); + + sx = (float)dst_rect->width / src_rect->width; + sy = (float)dst_rect->height / src_rect->height; + avs_update_coefficients(avs, sx, sy, pp_context->filter_flags); + + assert(avs->config->num_phases == 16); + for (i = 0; i <= 16; i++) { + const AVSCoeffs * const coeffs = &avs->coeffs[i]; + + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c0 = + intel_format_convert(coeffs->y_k_h[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c1 = + intel_format_convert(coeffs->y_k_h[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c2 = + intel_format_convert(coeffs->y_k_h[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c3 = + intel_format_convert(coeffs->y_k_h[3], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c4 = + intel_format_convert(coeffs->y_k_h[4], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c5 = + intel_format_convert(coeffs->y_k_h[5], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c6 = + intel_format_convert(coeffs->y_k_h[6], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c7 = + intel_format_convert(coeffs->y_k_h[7], 1, 6, 1); + + sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c2 = + intel_format_convert(coeffs->uv_k_h[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c3 = + intel_format_convert(coeffs->uv_k_h[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c4 = + intel_format_convert(coeffs->uv_k_h[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c5 = + intel_format_convert(coeffs->uv_k_h[3], 1, 6, 1); + + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c0 = + intel_format_convert(coeffs->y_k_v[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c1 = + intel_format_convert(coeffs->y_k_v[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c2 = + intel_format_convert(coeffs->y_k_v[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c3 = + intel_format_convert(coeffs->y_k_v[3], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c4 = + intel_format_convert(coeffs->y_k_v[4], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c5 = + intel_format_convert(coeffs->y_k_v[5], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c6 = + intel_format_convert(coeffs->y_k_v[6], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c7 = + intel_format_convert(coeffs->y_k_v[7], 1, 6, 1); + + sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c2 = + intel_format_convert(coeffs->uv_k_v[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c3 = + intel_format_convert(coeffs->uv_k_v[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c4 = + intel_format_convert(coeffs->uv_k_v[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c5 = + intel_format_convert(coeffs->uv_k_v[3], 1, 6, 1); + } + + /* Adaptive filter for all channels (DW4.15) */ + sampler_8x8_state->coefficients[0].dw4.table_1x_filter_c1 = 1U << 7; + + sampler_8x8_state->dw136.default_sharpness_level = + -avs_is_needed(pp_context->filter_flags); + sampler_8x8_state->dw137.ilk.bypass_y_adaptive_filtering = 1; + sampler_8x8_state->dw137.ilk.bypass_x_adaptive_filtering = 1; + dri_bo_unmap(pp_context->sampler_state_table.bo_8x8); + + /* sampler 8x8 */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_8x8) == sizeof(int) * 16); + sampler_8x8 = pp_context->sampler_state_table.bo->virtual; + + /* sample_8x8 Y index 1 */ + index = 1; + memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); + sampler_8x8[index].dw0.avs_filter_type = AVS_FILTER_ADAPTIVE_8_TAP; + sampler_8x8[index].dw0.ief_bypass = 1; + sampler_8x8[index].dw0.ief_filter_type = IEF_FILTER_DETAIL; + sampler_8x8[index].dw0.ief_filter_size = IEF_FILTER_SIZE_5X5; + sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5; + sampler_8x8[index].dw2.global_noise_estimation = 22; + sampler_8x8[index].dw2.strong_edge_threshold = 8; + sampler_8x8[index].dw2.weak_edge_threshold = 1; + sampler_8x8[index].dw3.strong_edge_weight = 7; + sampler_8x8[index].dw3.regular_weight = 2; + sampler_8x8[index].dw3.non_edge_weight = 0; + sampler_8x8[index].dw3.gain_factor = 40; + sampler_8x8[index].dw4.steepness_boost = 0; + sampler_8x8[index].dw4.steepness_threshold = 0; + sampler_8x8[index].dw4.mr_boost = 0; + sampler_8x8[index].dw4.mr_threshold = 5; + sampler_8x8[index].dw5.pwl1_point_1 = 4; + sampler_8x8[index].dw5.pwl1_point_2 = 12; + sampler_8x8[index].dw5.pwl1_point_3 = 16; + sampler_8x8[index].dw5.pwl1_point_4 = 26; + sampler_8x8[index].dw6.pwl1_point_5 = 40; + sampler_8x8[index].dw6.pwl1_point_6 = 160; + sampler_8x8[index].dw6.pwl1_r3_bias_0 = 127; + sampler_8x8[index].dw6.pwl1_r3_bias_1 = 98; + sampler_8x8[index].dw7.pwl1_r3_bias_2 = 88; + sampler_8x8[index].dw7.pwl1_r3_bias_3 = 64; + sampler_8x8[index].dw7.pwl1_r3_bias_4 = 44; + sampler_8x8[index].dw7.pwl1_r3_bias_5 = 0; + sampler_8x8[index].dw8.pwl1_r3_bias_6 = 0; + sampler_8x8[index].dw8.pwl1_r5_bias_0 = 3; + sampler_8x8[index].dw8.pwl1_r5_bias_1 = 32; + sampler_8x8[index].dw8.pwl1_r5_bias_2 = 32; + sampler_8x8[index].dw9.pwl1_r5_bias_3 = 58; + sampler_8x8[index].dw9.pwl1_r5_bias_4 = 100; + sampler_8x8[index].dw9.pwl1_r5_bias_5 = 108; + sampler_8x8[index].dw9.pwl1_r5_bias_6 = 88; + sampler_8x8[index].dw10.pwl1_r3_slope_0 = -116; + sampler_8x8[index].dw10.pwl1_r3_slope_1 = -20; + sampler_8x8[index].dw10.pwl1_r3_slope_2 = -96; + sampler_8x8[index].dw10.pwl1_r3_slope_3 = -32; + sampler_8x8[index].dw11.pwl1_r3_slope_4 = -50; + sampler_8x8[index].dw11.pwl1_r3_slope_5 = 0; + sampler_8x8[index].dw11.pwl1_r3_slope_6 = 0; + sampler_8x8[index].dw11.pwl1_r5_slope_0 = 116; + sampler_8x8[index].dw12.pwl1_r5_slope_1 = 0; + sampler_8x8[index].dw12.pwl1_r5_slope_2 = 114; + sampler_8x8[index].dw12.pwl1_r5_slope_3 = 67; + sampler_8x8[index].dw12.pwl1_r5_slope_4 = 9; + sampler_8x8[index].dw13.pwl1_r5_slope_5 = -3; + sampler_8x8[index].dw13.pwl1_r5_slope_6 = -15; + sampler_8x8[index].dw13.limiter_boost = 0; + sampler_8x8[index].dw13.minimum_limiter = 10; + sampler_8x8[index].dw13.maximum_limiter = 11; + sampler_8x8[index].dw14.clip_limiter = 130; + dri_bo_emit_reloc(pp_context->sampler_state_table.bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), + pp_context->sampler_state_table.bo_8x8); + + /* sample_8x8 UV index 2 */ + index = 2; + memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); + sampler_8x8[index].dw0.avs_filter_type = AVS_FILTER_ADAPTIVE_8_TAP; + sampler_8x8[index].dw0.ief_bypass = 1; + sampler_8x8[index].dw0.ief_filter_type = IEF_FILTER_DETAIL; + sampler_8x8[index].dw0.ief_filter_size = IEF_FILTER_SIZE_5X5; + sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5; + sampler_8x8[index].dw2.global_noise_estimation = 22; + sampler_8x8[index].dw2.strong_edge_threshold = 8; + sampler_8x8[index].dw2.weak_edge_threshold = 1; + sampler_8x8[index].dw3.strong_edge_weight = 7; + sampler_8x8[index].dw3.regular_weight = 2; + sampler_8x8[index].dw3.non_edge_weight = 0; + sampler_8x8[index].dw3.gain_factor = 40; + sampler_8x8[index].dw4.steepness_boost = 0; + sampler_8x8[index].dw4.steepness_threshold = 0; + sampler_8x8[index].dw4.mr_boost = 0; + sampler_8x8[index].dw4.mr_threshold = 5; + sampler_8x8[index].dw5.pwl1_point_1 = 4; + sampler_8x8[index].dw5.pwl1_point_2 = 12; + sampler_8x8[index].dw5.pwl1_point_3 = 16; + sampler_8x8[index].dw5.pwl1_point_4 = 26; + sampler_8x8[index].dw6.pwl1_point_5 = 40; + sampler_8x8[index].dw6.pwl1_point_6 = 160; + sampler_8x8[index].dw6.pwl1_r3_bias_0 = 127; + sampler_8x8[index].dw6.pwl1_r3_bias_1 = 98; + sampler_8x8[index].dw7.pwl1_r3_bias_2 = 88; + sampler_8x8[index].dw7.pwl1_r3_bias_3 = 64; + sampler_8x8[index].dw7.pwl1_r3_bias_4 = 44; + sampler_8x8[index].dw7.pwl1_r3_bias_5 = 0; + sampler_8x8[index].dw8.pwl1_r3_bias_6 = 0; + sampler_8x8[index].dw8.pwl1_r5_bias_0 = 3; + sampler_8x8[index].dw8.pwl1_r5_bias_1 = 32; + sampler_8x8[index].dw8.pwl1_r5_bias_2 = 32; + sampler_8x8[index].dw9.pwl1_r5_bias_3 = 58; + sampler_8x8[index].dw9.pwl1_r5_bias_4 = 100; + sampler_8x8[index].dw9.pwl1_r5_bias_5 = 108; + sampler_8x8[index].dw9.pwl1_r5_bias_6 = 88; + sampler_8x8[index].dw10.pwl1_r3_slope_0 = -116; + sampler_8x8[index].dw10.pwl1_r3_slope_1 = -20; + sampler_8x8[index].dw10.pwl1_r3_slope_2 = -96; + sampler_8x8[index].dw10.pwl1_r3_slope_3 = -32; + sampler_8x8[index].dw11.pwl1_r3_slope_4 = -50; + sampler_8x8[index].dw11.pwl1_r3_slope_5 = 0; + sampler_8x8[index].dw11.pwl1_r3_slope_6 = 0; + sampler_8x8[index].dw11.pwl1_r5_slope_0 = 116; + sampler_8x8[index].dw12.pwl1_r5_slope_1 = 0; + sampler_8x8[index].dw12.pwl1_r5_slope_2 = 114; + sampler_8x8[index].dw12.pwl1_r5_slope_3 = 67; + sampler_8x8[index].dw12.pwl1_r5_slope_4 = 9; + sampler_8x8[index].dw13.pwl1_r5_slope_5 = -3; + sampler_8x8[index].dw13.pwl1_r5_slope_6 = -15; + sampler_8x8[index].dw13.limiter_boost = 0; + sampler_8x8[index].dw13.minimum_limiter = 10; + sampler_8x8[index].dw13.maximum_limiter = 11; + sampler_8x8[index].dw14.clip_limiter = 130; + dri_bo_emit_reloc(pp_context->sampler_state_table.bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), + pp_context->sampler_state_table.bo_8x8); + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_avs_x_steps; + pp_context->pp_y_steps = pp_avs_y_steps; + pp_context->private_context = &pp_context->pp_avs_context; + pp_context->pp_set_block_parameter = pp_avs_set_block_parameter; + + int dst_left_edge_extend = dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + float src_left_edge_extend = (float)dst_left_edge_extend*src_rect->width/dst_rect->width; + pp_avs_context->dest_x = dst_rect->x - dst_left_edge_extend; + pp_avs_context->dest_y = dst_rect->y; + pp_avs_context->dest_w = ALIGN(dst_rect->width + dst_left_edge_extend, 16); + pp_avs_context->dest_h = ALIGN(dst_rect->height, 8); + pp_avs_context->src_normalized_x = (float)(src_rect->x - src_left_edge_extend)/ in_w; + pp_avs_context->src_normalized_y = (float)src_rect->y / in_h; + pp_avs_context->src_w = src_rect->width + src_left_edge_extend; + pp_avs_context->src_h = src_rect->height; + + pp_static_parameter->grf4.r4_2.avs.nlas = nlas; + pp_static_parameter->grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / dst_rect->height; + + pp_inline_parameter->grf5.normalized_video_x_scaling_step = (float) (src_rect->width + src_left_edge_extend)/ in_w / (dst_rect->width + dst_left_edge_extend); + pp_inline_parameter->grf5.block_count_x = 1; /* M x 1 */ + pp_inline_parameter->grf5.number_blocks = pp_avs_context->dest_h / 8; + pp_inline_parameter->grf6.video_step_delta = 0.0; + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +gen6_nv12_scaling_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + return pp_nv12_avs_initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + filter_param); +} + +static int +gen7_pp_avs_x_steps(void *private_context) +{ + struct pp_avs_context *pp_avs_context = private_context; + + return pp_avs_context->dest_w / 16; +} + +static int +gen7_pp_avs_y_steps(void *private_context) +{ + struct pp_avs_context *pp_avs_context = private_context; + + return pp_avs_context->dest_h / 16; +} + +static int +gen7_pp_avs_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)pp_context->private_context; + struct gen7_pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + + pp_inline_parameter->grf9.destination_block_horizontal_origin = x * 16 + pp_avs_context->dest_x; + pp_inline_parameter->grf9.destination_block_vertical_origin = y * 16 + pp_avs_context->dest_y; + pp_inline_parameter->grf9.constant_0 = 0xffffffff; + pp_inline_parameter->grf9.sampler_load_main_video_x_scaling_step = pp_avs_context->horiz_range / pp_avs_context->src_w; + + return 0; +} + +static void gen7_update_src_surface_uv_offset(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *surface) +{ + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + int fourcc = pp_get_surface_fourcc(ctx, surface); + + if (fourcc == VA_FOURCC_YUY2) { + pp_static_parameter->grf2.di_destination_packed_y_component_offset = 0; + pp_static_parameter->grf2.di_destination_packed_u_component_offset = 1; + pp_static_parameter->grf2.di_destination_packed_v_component_offset = 3; + } else if (fourcc == VA_FOURCC_UYVY) { + pp_static_parameter->grf2.di_destination_packed_y_component_offset = 1; + pp_static_parameter->grf2.di_destination_packed_u_component_offset = 0; + pp_static_parameter->grf2.di_destination_packed_v_component_offset = 2; + } +} + +static VAStatus +gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct pp_avs_context *pp_avs_context = (struct pp_avs_context *)&pp_context->pp_avs_context; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + struct gen7_sampler_8x8 *sampler_8x8; + struct i965_sampler_8x8_state *sampler_8x8_state; + int index, i; + int width[3], height[3], pitch[3], offset[3]; + int src_width, src_height; + AVSState * const avs = &pp_avs_context->state; + float sx, sy; + const float * yuv_to_rgb_coefs; + size_t yuv_to_rgb_coefs_size; + + /* source surface */ + gen7_pp_set_media_rw_message_surface(ctx, pp_context, src_surface, 0, 0, + src_rect, + width, height, pitch, offset); + src_width = width[0]; + src_height = height[0]; + + /* destination surface */ + gen7_pp_set_media_rw_message_surface(ctx, pp_context, dst_surface, 24, 1, + dst_rect, + width, height, pitch, offset); + + /* sampler 8x8 state */ + dri_bo_map(pp_context->sampler_state_table.bo_8x8, True); + assert(pp_context->sampler_state_table.bo_8x8->virtual); + assert(sizeof(*sampler_8x8_state) == sizeof(int) * 138); + sampler_8x8_state = pp_context->sampler_state_table.bo_8x8->virtual; + memset(sampler_8x8_state, 0, sizeof(*sampler_8x8_state)); + + sx = (float)dst_rect->width / src_rect->width; + sy = (float)dst_rect->height / src_rect->height; + avs_update_coefficients(avs, sx, sy, pp_context->filter_flags); + + assert(avs->config->num_phases == 16); + for (i = 0; i <= 16; i++) { + const AVSCoeffs * const coeffs = &avs->coeffs[i]; + + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c0 = + intel_format_convert(coeffs->y_k_h[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c1 = + intel_format_convert(coeffs->y_k_h[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c2 = + intel_format_convert(coeffs->y_k_h[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw0.table_0x_filter_c3 = + intel_format_convert(coeffs->y_k_h[3], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c4 = + intel_format_convert(coeffs->y_k_h[4], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c5 = + intel_format_convert(coeffs->y_k_h[5], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c6 = + intel_format_convert(coeffs->y_k_h[6], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw1.table_0x_filter_c7 = + intel_format_convert(coeffs->y_k_h[7], 1, 6, 1); + + sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c2 = + intel_format_convert(coeffs->uv_k_h[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw4.table_1x_filter_c3 = + intel_format_convert(coeffs->uv_k_h[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c4 = + intel_format_convert(coeffs->uv_k_h[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw5.table_1x_filter_c5 = + intel_format_convert(coeffs->uv_k_h[3], 1, 6, 1); + + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c0 = + intel_format_convert(coeffs->y_k_v[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c1 = + intel_format_convert(coeffs->y_k_v[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c2 = + intel_format_convert(coeffs->y_k_v[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw2.table_0y_filter_c3 = + intel_format_convert(coeffs->y_k_v[3], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c4 = + intel_format_convert(coeffs->y_k_v[4], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c5 = + intel_format_convert(coeffs->y_k_v[5], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c6 = + intel_format_convert(coeffs->y_k_v[6], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw3.table_0y_filter_c7 = + intel_format_convert(coeffs->y_k_v[7], 1, 6, 1); + + sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c2 = + intel_format_convert(coeffs->uv_k_v[0], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw6.table_1y_filter_c3 = + intel_format_convert(coeffs->uv_k_v[1], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c4 = + intel_format_convert(coeffs->uv_k_v[2], 1, 6, 1); + sampler_8x8_state->coefficients[i].dw7.table_1y_filter_c5 = + intel_format_convert(coeffs->uv_k_v[3], 1, 6, 1); + } + + sampler_8x8_state->dw136.default_sharpness_level = + -avs_is_needed(pp_context->filter_flags); + if (IS_HASWELL(i965->intel.device_info)) { + sampler_8x8_state->dw137.hsw.adaptive_filter_for_all_channel = 1; + sampler_8x8_state->dw137.hsw.bypass_y_adaptive_filtering = 1; + sampler_8x8_state->dw137.hsw.bypass_x_adaptive_filtering = 1; + } + else { + sampler_8x8_state->coefficients[0].dw4.table_1x_filter_c1 = 1U << 7; + sampler_8x8_state->dw137.ilk.bypass_y_adaptive_filtering = 1; + sampler_8x8_state->dw137.ilk.bypass_x_adaptive_filtering = 1; + } dri_bo_unmap(pp_context->sampler_state_table.bo_8x8); - /* sampler 8x8 */ - dri_bo_map(pp_context->sampler_state_table.bo, True); - assert(pp_context->sampler_state_table.bo->virtual); - assert(sizeof(*sampler_8x8) == sizeof(int) * 16); - sampler_8x8 = pp_context->sampler_state_table.bo->virtual; + /* sampler 8x8 */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_8x8) == sizeof(int) * 4); + sampler_8x8 = pp_context->sampler_state_table.bo->virtual; + + /* sample_8x8 Y index 4 */ + index = 4; + memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); + sampler_8x8[index].dw0.global_noise_estimation = 255; + sampler_8x8[index].dw0.ief_bypass = 1; + + sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5; + + sampler_8x8[index].dw2.weak_edge_threshold = 1; + sampler_8x8[index].dw2.strong_edge_threshold = 8; + sampler_8x8[index].dw2.r5x_coefficient = 9; + sampler_8x8[index].dw2.r5cx_coefficient = 8; + sampler_8x8[index].dw2.r5c_coefficient = 3; + + sampler_8x8[index].dw3.r3x_coefficient = 27; + sampler_8x8[index].dw3.r3c_coefficient = 5; + sampler_8x8[index].dw3.gain_factor = 40; + sampler_8x8[index].dw3.non_edge_weight = 1; + sampler_8x8[index].dw3.regular_weight = 2; + sampler_8x8[index].dw3.strong_edge_weight = 7; + sampler_8x8[index].dw3.ief4_smooth_enable = 0; + + dri_bo_emit_reloc(pp_context->sampler_state_table.bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), + pp_context->sampler_state_table.bo_8x8); + + /* sample_8x8 UV index 8 */ + index = 8; + memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); + sampler_8x8[index].dw0.disable_8x8_filter = 0; + sampler_8x8[index].dw0.global_noise_estimation = 255; + sampler_8x8[index].dw0.ief_bypass = 1; + sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5; + sampler_8x8[index].dw2.weak_edge_threshold = 1; + sampler_8x8[index].dw2.strong_edge_threshold = 8; + sampler_8x8[index].dw2.r5x_coefficient = 9; + sampler_8x8[index].dw2.r5cx_coefficient = 8; + sampler_8x8[index].dw2.r5c_coefficient = 3; + sampler_8x8[index].dw3.r3x_coefficient = 27; + sampler_8x8[index].dw3.r3c_coefficient = 5; + sampler_8x8[index].dw3.gain_factor = 40; + sampler_8x8[index].dw3.non_edge_weight = 1; + sampler_8x8[index].dw3.regular_weight = 2; + sampler_8x8[index].dw3.strong_edge_weight = 7; + sampler_8x8[index].dw3.ief4_smooth_enable = 0; + + dri_bo_emit_reloc(pp_context->sampler_state_table.bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), + pp_context->sampler_state_table.bo_8x8); + + /* sampler_8x8 V, index 12 */ + index = 12; + memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); + sampler_8x8[index].dw0.disable_8x8_filter = 0; + sampler_8x8[index].dw0.global_noise_estimation = 255; + sampler_8x8[index].dw0.ief_bypass = 1; + sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5; + sampler_8x8[index].dw2.weak_edge_threshold = 1; + sampler_8x8[index].dw2.strong_edge_threshold = 8; + sampler_8x8[index].dw2.r5x_coefficient = 9; + sampler_8x8[index].dw2.r5cx_coefficient = 8; + sampler_8x8[index].dw2.r5c_coefficient = 3; + sampler_8x8[index].dw3.r3x_coefficient = 27; + sampler_8x8[index].dw3.r3c_coefficient = 5; + sampler_8x8[index].dw3.gain_factor = 40; + sampler_8x8[index].dw3.non_edge_weight = 1; + sampler_8x8[index].dw3.regular_weight = 2; + sampler_8x8[index].dw3.strong_edge_weight = 7; + sampler_8x8[index].dw3.ief4_smooth_enable = 0; + + dri_bo_emit_reloc(pp_context->sampler_state_table.bo, + I915_GEM_DOMAIN_RENDER, + 0, + 0, + sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), + pp_context->sampler_state_table.bo_8x8); + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = gen7_pp_avs_x_steps; + pp_context->pp_y_steps = gen7_pp_avs_y_steps; + pp_context->private_context = &pp_context->pp_avs_context; + pp_context->pp_set_block_parameter = gen7_pp_avs_set_block_parameter; + + int dst_left_edge_extend = dst_rect->x%GPU_ASM_X_OFFSET_ALIGNMENT; + pp_avs_context->dest_x = dst_rect->x - dst_left_edge_extend; + pp_avs_context->dest_y = dst_rect->y; + pp_avs_context->dest_w = ALIGN(dst_rect->width + dst_left_edge_extend, 16); + pp_avs_context->dest_h = ALIGN(dst_rect->height, 16); + pp_avs_context->src_w = src_rect->width; + pp_avs_context->src_h = src_rect->height; + pp_avs_context->horiz_range = (float)src_rect->width / src_width; + + int dw = (pp_avs_context->src_w - 1) / 16 + 1; + dw = MAX(dw, dst_rect->width + dst_left_edge_extend); + + pp_static_parameter->grf1.pointer_to_inline_parameter = 7; + pp_static_parameter->grf2.avs_wa_enable = 1; /* must be set for GEN7 */ + if (IS_HASWELL(i965->intel.device_info)) + pp_static_parameter->grf2.avs_wa_enable = 0; /* HSW don't use the WA */ + + if (pp_static_parameter->grf2.avs_wa_enable) { + int src_fourcc = pp_get_surface_fourcc(ctx, src_surface); + if ((src_fourcc == VA_FOURCC_RGBA) || + (src_fourcc == VA_FOURCC_RGBX) || + (src_fourcc == VA_FOURCC_BGRA) || + (src_fourcc == VA_FOURCC_BGRX)) { + pp_static_parameter->grf2.avs_wa_enable = 0; + } + } + + pp_static_parameter->grf2.avs_wa_width = src_width; + pp_static_parameter->grf2.avs_wa_one_div_256_width = (float) 1.0 / (256 * src_width); + pp_static_parameter->grf2.avs_wa_five_div_256_width = (float) 5.0 / (256 * src_width); + pp_static_parameter->grf2.alpha = 255; + + pp_static_parameter->grf3.sampler_load_horizontal_scaling_step_ratio = (float) pp_avs_context->src_w / dw; + pp_static_parameter->grf4.sampler_load_vertical_scaling_step = (float) src_rect->height / src_height / dst_rect->height; + pp_static_parameter->grf5.sampler_load_vertical_frame_origin = (float) src_rect->y / src_height - + (float) pp_avs_context->dest_y * pp_static_parameter->grf4.sampler_load_vertical_scaling_step; + pp_static_parameter->grf6.sampler_load_horizontal_frame_origin = (float) src_rect->x / src_width - + (float) pp_avs_context->dest_x * pp_avs_context->horiz_range / dw; + + gen7_update_src_surface_uv_offset(ctx, pp_context, dst_surface); + + yuv_to_rgb_coefs = i915_color_standard_to_coefs (i915_filter_to_color_standard (src_surface->flags & + VA_SRC_COLOR_MASK), + &yuv_to_rgb_coefs_size); + memcpy(&pp_static_parameter->grf7, yuv_to_rgb_coefs, yuv_to_rgb_coefs_size); + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static int +pp_dndi_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_dndi_y_steps(void *private_context) +{ + struct pp_dndi_context *pp_dndi_context = private_context; + + return pp_dndi_context->dest_h / 4; +} + +static int +pp_dndi_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + + pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16; + pp_inline_parameter->grf5.destination_block_vertical_origin = y * 4; + + return 0; +} + +static VAStatus +pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct pp_dndi_context * const dndi_ctx = &pp_context->pp_dndi_context; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + const VAProcPipelineParameterBuffer * const pipe_params = + pp_context->pipeline_param; + const VAProcFilterParameterBufferDeinterlacing * const deint_params = + filter_param; + struct object_surface * const src_obj_surface = (struct object_surface *) + src_surface->base; + struct object_surface * const dst_obj_surface = (struct object_surface *) + dst_surface->base; + struct object_surface *obj_surface; + struct i965_sampler_dndi *sampler_dndi; + int index, dndi_top_first; + int w, h, orig_w, orig_h; + VAStatus status; + + status = pp_dndi_context_init_surface_params(dndi_ctx, src_obj_surface, + pipe_params, deint_params); + if (status != VA_STATUS_SUCCESS) + return status; + + status = pp_dndi_context_ensure_surfaces(ctx, pp_context, + src_obj_surface, dst_obj_surface); + if (status != VA_STATUS_SUCCESS) + return status; + + status = pp_dndi_context_ensure_surfaces_storage(ctx, pp_context, + src_obj_surface, dst_obj_surface); + if (status != VA_STATUS_SUCCESS) + return status; + + /* Current input surface (index = 4) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_IN_CURRENT].obj_surface; + i965_pp_set_surface2_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + 0, obj_surface->y_cb_offset, SURFACE_FORMAT_PLANAR_420_8, 1, 4); + + /* Previous input surface (index = 5) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_IN_PREVIOUS].obj_surface; + i965_pp_set_surface2_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + 0, obj_surface->y_cb_offset, SURFACE_FORMAT_PLANAR_420_8, 1, 5); + + /* STMM input surface (index = 6) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_IN_STMM].obj_surface; + i965_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + I965_SURFACEFORMAT_R8_UNORM, 6, 1); + + /* Previous output surfaces (index = { 7, 8 }) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_OUT_PREVIOUS].obj_surface; + w = obj_surface->width; + h = obj_surface->height; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + + i965_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + ALIGN(orig_w, 4) / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 7, 1); + i965_pp_set_surface_state(ctx, pp_context, obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, 8, 1); + + /* Current output surfaces (index = { 10, 11 }) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_OUT_CURRENT].obj_surface; + w = obj_surface->width; + h = obj_surface->height; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + + i965_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + ALIGN(orig_w, 4) / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 10, 1); + i965_pp_set_surface_state(ctx, pp_context, obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, 11, 1); + + /* STMM output surface (index = 20) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_OUT_STMM].obj_surface; + i965_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + I965_SURFACEFORMAT_R8_UNORM, 20, 1); + + dndi_top_first = !(deint_params->flags & VA_DEINTERLACING_BOTTOM_FIELD); + + /* sampler dndi */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_dndi) == sizeof(int) * 8); + sampler_dndi = pp_context->sampler_state_table.bo->virtual; + + /* sample dndi index 1 */ + index = 0; + sampler_dndi[index].dw0.denoise_asd_threshold = 38; + sampler_dndi[index].dw0.denoise_history_delta = 7; // 0-15, default is 8 + sampler_dndi[index].dw0.denoise_maximum_history = 192; // 128-240 + sampler_dndi[index].dw0.denoise_stad_threshold = 140; + + sampler_dndi[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 38; + sampler_dndi[index].dw1.denoise_moving_pixel_threshold = 1; + sampler_dndi[index].dw1.stmm_c2 = 1; + sampler_dndi[index].dw1.low_temporal_difference_threshold = 0; + sampler_dndi[index].dw1.temporal_difference_threshold = 0; + + sampler_dndi[index].dw2.block_noise_estimate_noise_threshold = 20; // 0-31 + sampler_dndi[index].dw2.block_noise_estimate_edge_threshold = 1; // 0-15 + sampler_dndi[index].dw2.denoise_edge_threshold = 7; // 0-15 + sampler_dndi[index].dw2.good_neighbor_threshold = 12; // 0-63 + + sampler_dndi[index].dw3.maximum_stmm = 150; + sampler_dndi[index].dw3.multipler_for_vecm = 30; + sampler_dndi[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 125; + sampler_dndi[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64; + sampler_dndi[index].dw3.stmm_blending_constant_select = 0; + + sampler_dndi[index].dw4.sdi_delta = 5; + sampler_dndi[index].dw4.sdi_threshold = 100; + sampler_dndi[index].dw4.stmm_output_shift = 5; // stmm_max - stmm_min = 2 ^ stmm_output_shift + sampler_dndi[index].dw4.stmm_shift_up = 1; + sampler_dndi[index].dw4.stmm_shift_down = 3; + sampler_dndi[index].dw4.minimum_stmm = 118; + + sampler_dndi[index].dw5.fmd_temporal_difference_threshold = 175; + sampler_dndi[index].dw5.sdi_fallback_mode_2_constant = 37; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t2_constant = 100; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t1_constant = 50; + + sampler_dndi[index].dw6.dn_enable = 1; + sampler_dndi[index].dw6.di_enable = 1; + sampler_dndi[index].dw6.di_partial = 0; + sampler_dndi[index].dw6.dndi_top_first = dndi_top_first; + sampler_dndi[index].dw6.dndi_stream_id = 0; + sampler_dndi[index].dw6.dndi_first_frame = dndi_ctx->is_first_frame; + sampler_dndi[index].dw6.progressive_dn = 0; + sampler_dndi[index].dw6.fmd_tear_threshold = 2; + sampler_dndi[index].dw6.fmd2_vertical_difference_threshold = 100; + sampler_dndi[index].dw6.fmd1_vertical_difference_threshold = 16; + + sampler_dndi[index].dw7.fmd_for_1st_field_of_current_frame = 0; + sampler_dndi[index].dw7.fmd_for_2nd_field_of_previous_frame = 0; + sampler_dndi[index].dw7.vdi_walker_enable = 0; + sampler_dndi[index].dw7.column_width_minus1 = w / 16; + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_dndi_x_steps; + pp_context->pp_y_steps = pp_dndi_y_steps; + pp_context->private_context = dndi_ctx; + pp_context->pp_set_block_parameter = pp_dndi_set_block_parameter; + + pp_static_parameter->grf1.statistics_surface_picth = w / 2; + pp_static_parameter->grf1.r1_6.di.top_field_first = dndi_top_first; + pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m2 = 0; + pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m1 = 0; + + pp_inline_parameter->grf5.block_count_x = w / 16; /* 1 x N */ + pp_inline_parameter->grf5.number_blocks = w / 16; + pp_inline_parameter->grf5.block_vertical_mask = 0xff; + pp_inline_parameter->grf5.block_horizontal_mask = 0xffff; + + dndi_ctx->dest_w = w; + dndi_ctx->dest_h = h; + + dst_surface->flags = I965_SURFACE_FLAG_FRAME; + return VA_STATUS_SUCCESS; +} + +static int +pp_dn_x_steps(void *private_context) +{ + return 1; +} + +static int +pp_dn_y_steps(void *private_context) +{ + struct pp_dn_context *pp_dn_context = private_context; + + return pp_dn_context->dest_h / 8; +} + +static int +pp_dn_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + + pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16; + pp_inline_parameter->grf5.destination_block_vertical_origin = y * 8; + + return 0; +} + +static VAStatus +pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct pp_dn_context *pp_dn_context = (struct pp_dn_context *)&pp_context->pp_dn_context; + struct object_surface *obj_surface; + struct i965_sampler_dndi *sampler_dndi; + struct pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + VAProcFilterParameterBuffer *dn_filter_param = filter_param; /* FIXME: parameter */ + int index; + int w, h; + int orig_w, orig_h; + int dn_strength = 15; + int dndi_top_first = 1; + int dn_progressive = 0; + + if (src_surface->flags == I965_SURFACE_FLAG_FRAME) { + dndi_top_first = 1; + dn_progressive = 1; + } else if (src_surface->flags == I965_SURFACE_FLAG_TOP_FIELD_FIRST) { + dndi_top_first = 1; + dn_progressive = 0; + } else { + dndi_top_first = 0; + dn_progressive = 0; + } + + if (dn_filter_param) { + float value = dn_filter_param->value; + + if (value > 1.0) + value = 1.0; + + if (value < 0.0) + value = 0.0; + + dn_strength = (int)(value * 31.0F); + } + + /* surface */ + obj_surface = (struct object_surface *)src_surface->base; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + + if (pp_dn_context->stmm_bo == NULL) { + pp_dn_context->stmm_bo = dri_bo_alloc(i965->intel.bufmgr, + "STMM surface", + w * h, + 4096); + assert(pp_dn_context->stmm_bo); + } + + /* source UV surface index 2 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, + 2, 0); + + /* source YUV surface index 4 */ + i965_pp_set_surface2_state(ctx, pp_context, + obj_surface->bo, 0, + orig_w, orig_h, w, + 0, h, + SURFACE_FORMAT_PLANAR_420_8, 1, + 4); + + /* source STMM surface index 20 */ + i965_pp_set_surface_state(ctx, pp_context, + pp_dn_context->stmm_bo, 0, + orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, + 20, 1); + + /* destination surface */ + obj_surface = (struct object_surface *)dst_surface->base; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + + /* destination Y surface index 7 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, 0, + ALIGN(orig_w, 4) / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, + 7, 1); + + /* destination UV surface index 8 */ + i965_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, + 8, 1); + /* sampler dn */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_dndi) == sizeof(int) * 8); + sampler_dndi = pp_context->sampler_state_table.bo->virtual; + + /* sample dndi index 1 */ + index = 0; + sampler_dndi[index].dw0.denoise_asd_threshold = 0; + sampler_dndi[index].dw0.denoise_history_delta = 8; // 0-15, default is 8 + sampler_dndi[index].dw0.denoise_maximum_history = 128; // 128-240 + sampler_dndi[index].dw0.denoise_stad_threshold = 0; + + sampler_dndi[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 64; + sampler_dndi[index].dw1.denoise_moving_pixel_threshold = 0; + sampler_dndi[index].dw1.stmm_c2 = 0; + sampler_dndi[index].dw1.low_temporal_difference_threshold = 8; + sampler_dndi[index].dw1.temporal_difference_threshold = 16; + + sampler_dndi[index].dw2.block_noise_estimate_noise_threshold = dn_strength; // 0-31 + sampler_dndi[index].dw2.block_noise_estimate_edge_threshold = 7; // 0-15 + sampler_dndi[index].dw2.denoise_edge_threshold = 7; // 0-15 + sampler_dndi[index].dw2.good_neighbor_threshold = 7; // 0-63 + + sampler_dndi[index].dw3.maximum_stmm = 128; + sampler_dndi[index].dw3.multipler_for_vecm = 2; + sampler_dndi[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 0; + sampler_dndi[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64; + sampler_dndi[index].dw3.stmm_blending_constant_select = 0; + + sampler_dndi[index].dw4.sdi_delta = 8; + sampler_dndi[index].dw4.sdi_threshold = 128; + sampler_dndi[index].dw4.stmm_output_shift = 7; // stmm_max - stmm_min = 2 ^ stmm_output_shift + sampler_dndi[index].dw4.stmm_shift_up = 0; + sampler_dndi[index].dw4.stmm_shift_down = 0; + sampler_dndi[index].dw4.minimum_stmm = 0; + + sampler_dndi[index].dw5.fmd_temporal_difference_threshold = 0; + sampler_dndi[index].dw5.sdi_fallback_mode_2_constant = 0; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t2_constant = 0; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t1_constant = 0; + + sampler_dndi[index].dw6.dn_enable = 1; + sampler_dndi[index].dw6.di_enable = 0; + sampler_dndi[index].dw6.di_partial = 0; + sampler_dndi[index].dw6.dndi_top_first = dndi_top_first; + sampler_dndi[index].dw6.dndi_stream_id = 1; + sampler_dndi[index].dw6.dndi_first_frame = 1; + sampler_dndi[index].dw6.progressive_dn = dn_progressive; + sampler_dndi[index].dw6.fmd_tear_threshold = 32; + sampler_dndi[index].dw6.fmd2_vertical_difference_threshold = 32; + sampler_dndi[index].dw6.fmd1_vertical_difference_threshold = 32; + + sampler_dndi[index].dw7.fmd_for_1st_field_of_current_frame = 2; + sampler_dndi[index].dw7.fmd_for_2nd_field_of_previous_frame = 1; + sampler_dndi[index].dw7.vdi_walker_enable = 0; + sampler_dndi[index].dw7.column_width_minus1 = w / 16; + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = pp_dn_x_steps; + pp_context->pp_y_steps = pp_dn_y_steps; + pp_context->private_context = &pp_context->pp_dn_context; + pp_context->pp_set_block_parameter = pp_dn_set_block_parameter; + + pp_static_parameter->grf1.statistics_surface_picth = w / 2; + pp_static_parameter->grf1.r1_6.di.top_field_first = 0; + pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m2 = 64; + pp_static_parameter->grf4.r4_2.di.motion_history_coefficient_m1 = 192; + + pp_inline_parameter->grf5.block_count_x = w / 16; /* 1 x N */ + pp_inline_parameter->grf5.number_blocks = w / 16; + pp_inline_parameter->grf5.block_vertical_mask = 0xff; + pp_inline_parameter->grf5.block_horizontal_mask = 0xffff; + + pp_dn_context->dest_w = w; + pp_dn_context->dest_h = h; + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static int +gen7_pp_dndi_x_steps(void *private_context) +{ + struct pp_dndi_context *pp_dndi_context = private_context; + + return pp_dndi_context->dest_w / 16; +} + +static int +gen7_pp_dndi_y_steps(void *private_context) +{ + struct pp_dndi_context *pp_dndi_context = private_context; + + return pp_dndi_context->dest_h / 4; +} + +static int +gen7_pp_dndi_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct gen7_pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + + pp_inline_parameter->grf9.destination_block_horizontal_origin = x * 16; + pp_inline_parameter->grf9.destination_block_vertical_origin = y * 4; + + return 0; +} + +static VAStatus +gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct pp_dndi_context * const dndi_ctx = &pp_context->pp_dndi_context; + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + const VAProcPipelineParameterBuffer * const pipe_params = + pp_context->pipeline_param; + const VAProcFilterParameterBufferDeinterlacing * const deint_params = + filter_param; + struct object_surface * const src_obj_surface = (struct object_surface *) + src_surface->base; + struct object_surface * const dst_obj_surface = (struct object_surface *) + dst_surface->base; + struct object_surface *obj_surface; + struct gen7_sampler_dndi *sampler_dndi; + int index, dndi_top_first; + int w, h, orig_w, orig_h; + VAStatus status; + + status = pp_dndi_context_init_surface_params(dndi_ctx, src_obj_surface, + pipe_params, deint_params); + if (status != VA_STATUS_SUCCESS) + return status; + + status = pp_dndi_context_ensure_surfaces(ctx, pp_context, + src_obj_surface, dst_obj_surface); + if (status != VA_STATUS_SUCCESS) + return status; + + status = pp_dndi_context_ensure_surfaces_storage(ctx, pp_context, + src_obj_surface, dst_obj_surface); + if (status != VA_STATUS_SUCCESS) + return status; + + /* Current input surface (index = 3) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_IN_CURRENT].obj_surface; + gen7_pp_set_surface2_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + 0, obj_surface->y_cb_offset, SURFACE_FORMAT_PLANAR_420_8, 1, 3); + + /* Previous input surface (index = 4) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_IN_PREVIOUS].obj_surface; + gen7_pp_set_surface2_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + 0, obj_surface->y_cb_offset, SURFACE_FORMAT_PLANAR_420_8, 1, 4); + + /* STMM input surface (index = 5) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_IN_STMM].obj_surface; + gen7_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + I965_SURFACEFORMAT_R8_UNORM, 5, 1); + + /* Previous output surfaces (index = { 27, 28 }) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_OUT_PREVIOUS].obj_surface; + w = obj_surface->width; + h = obj_surface->height; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + + gen7_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + ALIGN(orig_w, 4) / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 27, 1); + gen7_pp_set_surface_state(ctx, pp_context, obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, 28, 1); + + /* Current output surfaces (index = { 30, 31 }) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_OUT_CURRENT].obj_surface; + w = obj_surface->width; + h = obj_surface->height; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + + gen7_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + ALIGN(orig_w, 4) / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 30, 1); + gen7_pp_set_surface_state(ctx, pp_context, obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, 31, 1); + + /* STMM output surface (index = 33) */ + obj_surface = dndi_ctx->frame_store[DNDI_FRAME_OUT_STMM].obj_surface; + gen7_pp_set_surface_state(ctx, pp_context, obj_surface->bo, 0, + obj_surface->orig_width, obj_surface->orig_height, obj_surface->width, + I965_SURFACEFORMAT_R8_UNORM, 33, 1); + + dndi_top_first = !(deint_params->flags & VA_DEINTERLACING_BOTTOM_FIELD); + + /* sampler dndi */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_dndi) == sizeof(int) * 8); + sampler_dndi = pp_context->sampler_state_table.bo->virtual; + + /* sample dndi index 0 */ + index = 0; + sampler_dndi[index].dw0.denoise_asd_threshold = 38; + sampler_dndi[index].dw0.dnmh_delt = 7; + sampler_dndi[index].dw0.vdi_walker_y_stride = 0; + sampler_dndi[index].dw0.vdi_walker_frame_sharing_enable = 0; + sampler_dndi[index].dw0.denoise_maximum_history = 192; // 128-240 + sampler_dndi[index].dw0.denoise_stad_threshold = 140; + + sampler_dndi[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 38; + sampler_dndi[index].dw1.denoise_moving_pixel_threshold = 1; + sampler_dndi[index].dw1.stmm_c2 = 2; + sampler_dndi[index].dw1.low_temporal_difference_threshold = 0; + sampler_dndi[index].dw1.temporal_difference_threshold = 0; + + sampler_dndi[index].dw2.block_noise_estimate_noise_threshold = 20; // 0-31 + sampler_dndi[index].dw2.bne_edge_th = 1; + sampler_dndi[index].dw2.smooth_mv_th = 0; + sampler_dndi[index].dw2.sad_tight_th = 5; + sampler_dndi[index].dw2.cat_slope_minus1 = 9; + sampler_dndi[index].dw2.good_neighbor_th = 12; + + sampler_dndi[index].dw3.maximum_stmm = 150; + sampler_dndi[index].dw3.multipler_for_vecm = 30; + sampler_dndi[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 125; + sampler_dndi[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64; + sampler_dndi[index].dw3.stmm_blending_constant_select = 0; + + sampler_dndi[index].dw4.sdi_delta = 5; + sampler_dndi[index].dw4.sdi_threshold = 100; + sampler_dndi[index].dw4.stmm_output_shift = 5; // stmm_max - stmm_min = 2 ^ stmm_output_shift + sampler_dndi[index].dw4.stmm_shift_up = 1; + sampler_dndi[index].dw4.stmm_shift_down = 3; + sampler_dndi[index].dw4.minimum_stmm = 118; + + sampler_dndi[index].dw5.fmd_temporal_difference_threshold = 175; + sampler_dndi[index].dw5.sdi_fallback_mode_2_constant = 37; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t2_constant = 100; + sampler_dndi[index].dw5.sdi_fallback_mode_1_t1_constant = 50; + sampler_dndi[index].dw6.dn_enable = 0; + sampler_dndi[index].dw6.di_enable = 1; + sampler_dndi[index].dw6.di_partial = 0; + sampler_dndi[index].dw6.dndi_top_first = dndi_top_first; + sampler_dndi[index].dw6.dndi_stream_id = 1; + sampler_dndi[index].dw6.dndi_first_frame = dndi_ctx->is_first_frame; + sampler_dndi[index].dw6.progressive_dn = 0; + sampler_dndi[index].dw6.mcdi_enable = + (deint_params->algorithm == VAProcDeinterlacingMotionCompensated); + sampler_dndi[index].dw6.fmd_tear_threshold = 2; + sampler_dndi[index].dw6.cat_th1 = 0; + sampler_dndi[index].dw6.fmd2_vertical_difference_threshold = 100; + sampler_dndi[index].dw6.fmd1_vertical_difference_threshold = 16; + + sampler_dndi[index].dw7.sad_tha = 5; + sampler_dndi[index].dw7.sad_thb = 10; + sampler_dndi[index].dw7.fmd_for_1st_field_of_current_frame = 0; + sampler_dndi[index].dw7.mc_pixel_consistency_th = 25; + sampler_dndi[index].dw7.fmd_for_2nd_field_of_previous_frame = 0; + sampler_dndi[index].dw7.vdi_walker_enable = 0; + sampler_dndi[index].dw7.neighborpixel_th = 10; + sampler_dndi[index].dw7.column_width_minus1 = w / 16; + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = gen7_pp_dndi_x_steps; + pp_context->pp_y_steps = gen7_pp_dndi_y_steps; + pp_context->private_context = dndi_ctx; + pp_context->pp_set_block_parameter = gen7_pp_dndi_set_block_parameter; + + pp_static_parameter->grf1.di_statistics_surface_pitch_div2 = w / 2; + pp_static_parameter->grf1.di_statistics_surface_height_div4 = h / 4; + pp_static_parameter->grf1.di_top_field_first = 0; + pp_static_parameter->grf1.pointer_to_inline_parameter = 7; + + pp_static_parameter->grf2.di_destination_packed_y_component_offset = 0; + pp_static_parameter->grf2.di_destination_packed_u_component_offset = 1; + pp_static_parameter->grf2.di_destination_packed_v_component_offset = 3; + + pp_static_parameter->grf4.di_hoffset_svf_from_dvf = 0; + pp_static_parameter->grf4.di_voffset_svf_from_dvf = 0; + + dndi_ctx->dest_w = w; + dndi_ctx->dest_h = h; + + dst_surface->flags = I965_SURFACE_FLAG_FRAME; + return VA_STATUS_SUCCESS; +} + +static int +gen7_pp_dn_x_steps(void *private_context) +{ + struct pp_dn_context *pp_dn_context = private_context; + + return pp_dn_context->dest_w / 16; +} + +static int +gen7_pp_dn_y_steps(void *private_context) +{ + struct pp_dn_context *pp_dn_context = private_context; + + return pp_dn_context->dest_h / 4; +} + +static int +gen7_pp_dn_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +{ + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; + + pp_inline_parameter->grf5.destination_block_horizontal_origin = x * 16; + pp_inline_parameter->grf5.destination_block_vertical_origin = y * 4; + + return 0; +} + +static VAStatus +gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct pp_dn_context *pp_dn_context = (struct pp_dn_context *)&pp_context->pp_dn_context; + struct gen7_pp_static_parameter *pp_static_parameter = pp_context->pp_static_parameter; + struct object_surface *obj_surface; + struct gen7_sampler_dndi *sampler_dn; + VAProcFilterParameterBuffer *dn_filter_param = filter_param; /* FIXME: parameter */ + int index; + int w, h; + int orig_w, orig_h; + int dn_strength = 15; + int dndi_top_first = 1; + int dn_progressive = 0; + + if (src_surface->flags == I965_SURFACE_FLAG_FRAME) { + dndi_top_first = 1; + dn_progressive = 1; + } else if (src_surface->flags == I965_SURFACE_FLAG_TOP_FIELD_FIRST) { + dndi_top_first = 1; + dn_progressive = 0; + } else { + dndi_top_first = 0; + dn_progressive = 0; + } + + if (dn_filter_param) { + float value = dn_filter_param->value; + + if (value > 1.0) + value = 1.0; + + if (value < 0.0) + value = 0.0; + + dn_strength = (int)(value * 31.0F); + } + + /* surface */ + obj_surface = (struct object_surface *)src_surface->base; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + + if (pp_dn_context->stmm_bo == NULL) { + pp_dn_context->stmm_bo= dri_bo_alloc(i965->intel.bufmgr, + "STMM surface", + w * h, + 4096); + assert(pp_dn_context->stmm_bo); + } + + /* source UV surface index 1 */ + gen7_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, + 1, 0); + + /* source YUV surface index 3 */ + gen7_pp_set_surface2_state(ctx, pp_context, + obj_surface->bo, 0, + orig_w, orig_h, w, + 0, h, + SURFACE_FORMAT_PLANAR_420_8, 1, + 3); + + /* source (temporal reference) YUV surface index 4 */ + gen7_pp_set_surface2_state(ctx, pp_context, + obj_surface->bo, 0, + orig_w, orig_h, w, + 0, h, + SURFACE_FORMAT_PLANAR_420_8, 1, + 4); + + /* STMM / History Statistics input surface, index 5 */ + gen7_pp_set_surface_state(ctx, pp_context, + pp_dn_context->stmm_bo, 0, + orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, + 33, 1); + + /* destination surface */ + obj_surface = (struct object_surface *)dst_surface->base; + orig_w = obj_surface->orig_width; + orig_h = obj_surface->orig_height; + w = obj_surface->width; + h = obj_surface->height; + + /* destination Y surface index 24 */ + gen7_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, 0, + ALIGN(orig_w, 4) / 4, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, + 24, 1); + + /* destination UV surface index 25 */ + gen7_pp_set_surface_state(ctx, pp_context, + obj_surface->bo, w * h, + ALIGN(orig_w, 4) / 4, orig_h / 2, w, I965_SURFACEFORMAT_R8G8_UNORM, + 25, 1); + + /* sampler dn */ + dri_bo_map(pp_context->sampler_state_table.bo, True); + assert(pp_context->sampler_state_table.bo->virtual); + assert(sizeof(*sampler_dn) == sizeof(int) * 8); + sampler_dn = pp_context->sampler_state_table.bo->virtual; + + /* sample dn index 1 */ + index = 0; + sampler_dn[index].dw0.denoise_asd_threshold = 0; + sampler_dn[index].dw0.dnmh_delt = 8; + sampler_dn[index].dw0.vdi_walker_y_stride = 0; + sampler_dn[index].dw0.vdi_walker_frame_sharing_enable = 0; + sampler_dn[index].dw0.denoise_maximum_history = 128; // 128-240 + sampler_dn[index].dw0.denoise_stad_threshold = 0; + + sampler_dn[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 64; + sampler_dn[index].dw1.denoise_moving_pixel_threshold = 0; + sampler_dn[index].dw1.stmm_c2 = 0; + sampler_dn[index].dw1.low_temporal_difference_threshold = 8; + sampler_dn[index].dw1.temporal_difference_threshold = 16; + + sampler_dn[index].dw2.block_noise_estimate_noise_threshold = dn_strength; // 0-31 + sampler_dn[index].dw2.bne_edge_th = 1; + sampler_dn[index].dw2.smooth_mv_th = 0; + sampler_dn[index].dw2.sad_tight_th = 5; + sampler_dn[index].dw2.cat_slope_minus1 = 9; + sampler_dn[index].dw2.good_neighbor_th = 4; + + sampler_dn[index].dw3.maximum_stmm = 128; + sampler_dn[index].dw3.multipler_for_vecm = 2; + sampler_dn[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 0; + sampler_dn[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64; + sampler_dn[index].dw3.stmm_blending_constant_select = 0; + + sampler_dn[index].dw4.sdi_delta = 8; + sampler_dn[index].dw4.sdi_threshold = 128; + sampler_dn[index].dw4.stmm_output_shift = 7; // stmm_max - stmm_min = 2 ^ stmm_output_shift + sampler_dn[index].dw4.stmm_shift_up = 0; + sampler_dn[index].dw4.stmm_shift_down = 0; + sampler_dn[index].dw4.minimum_stmm = 0; + + sampler_dn[index].dw5.fmd_temporal_difference_threshold = 0; + sampler_dn[index].dw5.sdi_fallback_mode_2_constant = 0; + sampler_dn[index].dw5.sdi_fallback_mode_1_t2_constant = 0; + sampler_dn[index].dw5.sdi_fallback_mode_1_t1_constant = 0; + + sampler_dn[index].dw6.dn_enable = 1; + sampler_dn[index].dw6.di_enable = 0; + sampler_dn[index].dw6.di_partial = 0; + sampler_dn[index].dw6.dndi_top_first = dndi_top_first; + sampler_dn[index].dw6.dndi_stream_id = 1; + sampler_dn[index].dw6.dndi_first_frame = 1; + sampler_dn[index].dw6.progressive_dn = dn_progressive; + sampler_dn[index].dw6.mcdi_enable = 0; + sampler_dn[index].dw6.fmd_tear_threshold = 32; + sampler_dn[index].dw6.cat_th1 = 0; + sampler_dn[index].dw6.fmd2_vertical_difference_threshold = 32; + sampler_dn[index].dw6.fmd1_vertical_difference_threshold = 32; + + sampler_dn[index].dw7.sad_tha = 5; + sampler_dn[index].dw7.sad_thb = 10; + sampler_dn[index].dw7.fmd_for_1st_field_of_current_frame = 2; + sampler_dn[index].dw7.mc_pixel_consistency_th = 25; + sampler_dn[index].dw7.fmd_for_2nd_field_of_previous_frame = 1; + sampler_dn[index].dw7.vdi_walker_enable = 0; + sampler_dn[index].dw7.neighborpixel_th = 10; + sampler_dn[index].dw7.column_width_minus1 = w / 16; + + dri_bo_unmap(pp_context->sampler_state_table.bo); + + /* private function & data */ + pp_context->pp_x_steps = gen7_pp_dn_x_steps; + pp_context->pp_y_steps = gen7_pp_dn_y_steps; + pp_context->private_context = &pp_context->pp_dn_context; + pp_context->pp_set_block_parameter = gen7_pp_dn_set_block_parameter; + + pp_static_parameter->grf1.di_statistics_surface_pitch_div2 = w / 2; + pp_static_parameter->grf1.di_statistics_surface_height_div4 = h / 4; + pp_static_parameter->grf1.di_top_field_first = 0; + pp_static_parameter->grf1.pointer_to_inline_parameter = 7; + + pp_static_parameter->grf2.di_destination_packed_y_component_offset = 0; + pp_static_parameter->grf2.di_destination_packed_u_component_offset = 1; + pp_static_parameter->grf2.di_destination_packed_v_component_offset = 3; + + pp_static_parameter->grf4.di_hoffset_svf_from_dvf = 0; + pp_static_parameter->grf4.di_voffset_svf_from_dvf = 0; + + pp_dn_context->dest_w = w; + pp_dn_context->dest_h = h; + + dst_surface->flags = src_surface->flags; + + return VA_STATUS_SUCCESS; +} + +static VAStatus +ironlake_pp_initialize( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void *filter_param +) +{ + VAStatus va_status; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct pp_module *pp_module; + dri_bo *bo; + int static_param_size, inline_param_size; + + dri_bo_unreference(pp_context->surface_state_binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_PP_SURFACES, + 4096); + assert(bo); + pp_context->surface_state_binding_table.bo = bo; + + dri_bo_unreference(pp_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, + 4096); + assert(bo); + pp_context->curbe.bo = bo; + + dri_bo_unreference(pp_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface discriptor", + sizeof(struct i965_interface_descriptor), + 4096); + assert(bo); + pp_context->idrt.bo = bo; + pp_context->idrt.num_interface_descriptors = 0; + + dri_bo_unreference(pp_context->sampler_state_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler state table", + 4096, + 4096); + assert(bo); + dri_bo_map(bo, True); + memset(bo->virtual, 0, bo->size); + dri_bo_unmap(bo); + pp_context->sampler_state_table.bo = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8 = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8_uv = bo; + + dri_bo_unreference(pp_context->vfe_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vfe state", + sizeof(struct i965_vfe_state), + 4096); + assert(bo); + pp_context->vfe_state.bo = bo; + + static_param_size = sizeof(struct pp_static_parameter); + inline_param_size = sizeof(struct pp_inline_parameter); + + memset(pp_context->pp_static_parameter, 0, static_param_size); + memset(pp_context->pp_inline_parameter, 0, inline_param_size); + + assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); + pp_context->current_pp = pp_index; + pp_module = &pp_context->pp_modules[pp_index]; + + if (pp_module->initialize) + va_status = pp_module->initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + filter_param); + else + va_status = VA_STATUS_ERROR_UNIMPLEMENTED; + + return va_status; +} + +static VAStatus +ironlake_post_processing( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void *filter_param +) +{ + VAStatus va_status; + + va_status = ironlake_pp_initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + pp_index, + filter_param); + + if (va_status == VA_STATUS_SUCCESS) { + ironlake_pp_states_setup(ctx, pp_context); + ironlake_pp_pipeline_setup(ctx, pp_context); + } - /* sample_8x8 Y index 1 */ - index = 1; - memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); - sampler_8x8[index].dw0.avs_filter_type = AVS_FILTER_ADAPTIVE_8_TAP; - sampler_8x8[index].dw0.ief_bypass = 0; - sampler_8x8[index].dw0.ief_filter_type = IEF_FILTER_DETAIL; - sampler_8x8[index].dw0.ief_filter_size = IEF_FILTER_SIZE_5X5; - sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8->offset >> 5; - sampler_8x8[index].dw2.global_noise_estimation = 22; - sampler_8x8[index].dw2.strong_edge_threshold = 8; - sampler_8x8[index].dw2.weak_edge_threshold = 1; - sampler_8x8[index].dw3.strong_edge_weight = 7; - sampler_8x8[index].dw3.regular_weight = 2; - sampler_8x8[index].dw3.non_edge_weight = 0; - sampler_8x8[index].dw3.gain_factor = 40; - sampler_8x8[index].dw4.steepness_boost = 0; - sampler_8x8[index].dw4.steepness_threshold = 0; - sampler_8x8[index].dw4.mr_boost = 0; - sampler_8x8[index].dw4.mr_threshold = 5; - sampler_8x8[index].dw5.pwl1_point_1 = 4; - sampler_8x8[index].dw5.pwl1_point_2 = 12; - sampler_8x8[index].dw5.pwl1_point_3 = 16; - sampler_8x8[index].dw5.pwl1_point_4 = 26; - sampler_8x8[index].dw6.pwl1_point_5 = 40; - sampler_8x8[index].dw6.pwl1_point_6 = 160; - sampler_8x8[index].dw6.pwl1_r3_bias_0 = 127; - sampler_8x8[index].dw6.pwl1_r3_bias_1 = 98; - sampler_8x8[index].dw7.pwl1_r3_bias_2 = 88; - sampler_8x8[index].dw7.pwl1_r3_bias_3 = 64; - sampler_8x8[index].dw7.pwl1_r3_bias_4 = 44; - sampler_8x8[index].dw7.pwl1_r3_bias_5 = 0; - sampler_8x8[index].dw8.pwl1_r3_bias_6 = 0; - sampler_8x8[index].dw8.pwl1_r5_bias_0 = 3; - sampler_8x8[index].dw8.pwl1_r5_bias_1 = 32; - sampler_8x8[index].dw8.pwl1_r5_bias_2 = 32; - sampler_8x8[index].dw9.pwl1_r5_bias_3 = 58; - sampler_8x8[index].dw9.pwl1_r5_bias_4 = 100; - sampler_8x8[index].dw9.pwl1_r5_bias_5 = 108; - sampler_8x8[index].dw9.pwl1_r5_bias_6 = 88; - sampler_8x8[index].dw10.pwl1_r3_slope_0 = -116; - sampler_8x8[index].dw10.pwl1_r3_slope_1 = -20; - sampler_8x8[index].dw10.pwl1_r3_slope_2 = -96; - sampler_8x8[index].dw10.pwl1_r3_slope_3 = -32; - sampler_8x8[index].dw11.pwl1_r3_slope_4 = -50; - sampler_8x8[index].dw11.pwl1_r3_slope_5 = 0; - sampler_8x8[index].dw11.pwl1_r3_slope_6 = 0; - sampler_8x8[index].dw11.pwl1_r5_slope_0 = 116; - sampler_8x8[index].dw12.pwl1_r5_slope_1 = 0; - sampler_8x8[index].dw12.pwl1_r5_slope_2 = 114; - sampler_8x8[index].dw12.pwl1_r5_slope_3 = 67; - sampler_8x8[index].dw12.pwl1_r5_slope_4 = 9; - sampler_8x8[index].dw13.pwl1_r5_slope_5 = -3; - sampler_8x8[index].dw13.pwl1_r5_slope_6 = -15; - sampler_8x8[index].dw13.limiter_boost = 0; - sampler_8x8[index].dw13.minimum_limiter = 10; - sampler_8x8[index].dw13.maximum_limiter = 11; - sampler_8x8[index].dw14.clip_limiter = 130; - dri_bo_emit_reloc(pp_context->sampler_state_table.bo, - I915_GEM_DOMAIN_RENDER, - 0, - 0, - sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), - pp_context->sampler_state_table.bo_8x8); + return va_status; +} - dri_bo_map(pp_context->sampler_state_table.bo_8x8_uv, True); - assert(pp_context->sampler_state_table.bo_8x8_uv->virtual); - assert(sizeof(*sampler_8x8_state) == sizeof(int) * 138); - sampler_8x8_state = pp_context->sampler_state_table.bo_8x8_uv->virtual; - memset(sampler_8x8_state, 0, sizeof(*sampler_8x8_state)); - sampler_8x8_state->dw136.default_sharpness_level = 0; - sampler_8x8_state->dw137.adaptive_filter_for_all_channel = 0; - sampler_8x8_state->dw137.bypass_y_adaptive_filtering = 1; - sampler_8x8_state->dw137.bypass_x_adaptive_filtering = 1; - dri_bo_unmap(pp_context->sampler_state_table.bo_8x8_uv); +static VAStatus +gen6_pp_initialize( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void *filter_param +) +{ + VAStatus va_status; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct pp_module *pp_module; + dri_bo *bo; + int static_param_size, inline_param_size; - /* sample_8x8 UV index 2 */ - index = 2; - memset(&sampler_8x8[index], 0, sizeof(*sampler_8x8)); - sampler_8x8[index].dw0.avs_filter_type = AVS_FILTER_NEAREST; - sampler_8x8[index].dw0.ief_bypass = 0; - sampler_8x8[index].dw0.ief_filter_type = IEF_FILTER_DETAIL; - sampler_8x8[index].dw0.ief_filter_size = IEF_FILTER_SIZE_5X5; - sampler_8x8[index].dw1.sampler_8x8_state_pointer = pp_context->sampler_state_table.bo_8x8_uv->offset >> 5; - sampler_8x8[index].dw2.global_noise_estimation = 22; - sampler_8x8[index].dw2.strong_edge_threshold = 8; - sampler_8x8[index].dw2.weak_edge_threshold = 1; - sampler_8x8[index].dw3.strong_edge_weight = 7; - sampler_8x8[index].dw3.regular_weight = 2; - sampler_8x8[index].dw3.non_edge_weight = 0; - sampler_8x8[index].dw3.gain_factor = 40; - sampler_8x8[index].dw4.steepness_boost = 0; - sampler_8x8[index].dw4.steepness_threshold = 0; - sampler_8x8[index].dw4.mr_boost = 0; - sampler_8x8[index].dw4.mr_threshold = 5; - sampler_8x8[index].dw5.pwl1_point_1 = 4; - sampler_8x8[index].dw5.pwl1_point_2 = 12; - sampler_8x8[index].dw5.pwl1_point_3 = 16; - sampler_8x8[index].dw5.pwl1_point_4 = 26; - sampler_8x8[index].dw6.pwl1_point_5 = 40; - sampler_8x8[index].dw6.pwl1_point_6 = 160; - sampler_8x8[index].dw6.pwl1_r3_bias_0 = 127; - sampler_8x8[index].dw6.pwl1_r3_bias_1 = 98; - sampler_8x8[index].dw7.pwl1_r3_bias_2 = 88; - sampler_8x8[index].dw7.pwl1_r3_bias_3 = 64; - sampler_8x8[index].dw7.pwl1_r3_bias_4 = 44; - sampler_8x8[index].dw7.pwl1_r3_bias_5 = 0; - sampler_8x8[index].dw8.pwl1_r3_bias_6 = 0; - sampler_8x8[index].dw8.pwl1_r5_bias_0 = 3; - sampler_8x8[index].dw8.pwl1_r5_bias_1 = 32; - sampler_8x8[index].dw8.pwl1_r5_bias_2 = 32; - sampler_8x8[index].dw9.pwl1_r5_bias_3 = 58; - sampler_8x8[index].dw9.pwl1_r5_bias_4 = 100; - sampler_8x8[index].dw9.pwl1_r5_bias_5 = 108; - sampler_8x8[index].dw9.pwl1_r5_bias_6 = 88; - sampler_8x8[index].dw10.pwl1_r3_slope_0 = -116; - sampler_8x8[index].dw10.pwl1_r3_slope_1 = -20; - sampler_8x8[index].dw10.pwl1_r3_slope_2 = -96; - sampler_8x8[index].dw10.pwl1_r3_slope_3 = -32; - sampler_8x8[index].dw11.pwl1_r3_slope_4 = -50; - sampler_8x8[index].dw11.pwl1_r3_slope_5 = 0; - sampler_8x8[index].dw11.pwl1_r3_slope_6 = 0; - sampler_8x8[index].dw11.pwl1_r5_slope_0 = 116; - sampler_8x8[index].dw12.pwl1_r5_slope_1 = 0; - sampler_8x8[index].dw12.pwl1_r5_slope_2 = 114; - sampler_8x8[index].dw12.pwl1_r5_slope_3 = 67; - sampler_8x8[index].dw12.pwl1_r5_slope_4 = 9; - sampler_8x8[index].dw13.pwl1_r5_slope_5 = -3; - sampler_8x8[index].dw13.pwl1_r5_slope_6 = -15; - sampler_8x8[index].dw13.limiter_boost = 0; - sampler_8x8[index].dw13.minimum_limiter = 10; - sampler_8x8[index].dw13.maximum_limiter = 11; - sampler_8x8[index].dw14.clip_limiter = 130; - dri_bo_emit_reloc(pp_context->sampler_state_table.bo, - I915_GEM_DOMAIN_RENDER, - 0, + dri_bo_unreference(pp_context->surface_state_binding_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "surface state & binding table", + (SURFACE_STATE_PADDED_SIZE + sizeof(unsigned int)) * MAX_PP_SURFACES, + 4096); + assert(bo); + pp_context->surface_state_binding_table.bo = bo; + + dri_bo_unreference(pp_context->curbe.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, + 4096); + assert(bo); + pp_context->curbe.bo = bo; + + dri_bo_unreference(pp_context->idrt.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "interface discriptor", + sizeof(struct gen6_interface_descriptor_data), + 4096); + assert(bo); + pp_context->idrt.bo = bo; + pp_context->idrt.num_interface_descriptors = 0; + + dri_bo_unreference(pp_context->sampler_state_table.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler state table", + 4096, + 4096); + assert(bo); + dri_bo_map(bo, True); + memset(bo->virtual, 0, bo->size); + dri_bo_unmap(bo); + pp_context->sampler_state_table.bo = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8 = bo; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); + bo = dri_bo_alloc(i965->intel.bufmgr, + "sampler 8x8 state ", + 4096, + 4096); + assert(bo); + pp_context->sampler_state_table.bo_8x8_uv = bo; + + dri_bo_unreference(pp_context->vfe_state.bo); + bo = dri_bo_alloc(i965->intel.bufmgr, + "vfe state", + sizeof(struct i965_vfe_state), + 4096); + assert(bo); + pp_context->vfe_state.bo = bo; + + if (IS_GEN7(i965->intel.device_info)) { + static_param_size = sizeof(struct gen7_pp_static_parameter); + inline_param_size = sizeof(struct gen7_pp_inline_parameter); + } else { + static_param_size = sizeof(struct pp_static_parameter); + inline_param_size = sizeof(struct pp_inline_parameter); + } + + memset(pp_context->pp_static_parameter, 0, static_param_size); + memset(pp_context->pp_inline_parameter, 0, inline_param_size); + + assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); + pp_context->current_pp = pp_index; + pp_module = &pp_context->pp_modules[pp_index]; + + if (pp_module->initialize) + va_status = pp_module->initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + filter_param); + else + va_status = VA_STATUS_ERROR_UNIMPLEMENTED; + + calculate_boundary_block_mask(pp_context, dst_rect); + + return va_status; +} + + +static void +gen6_pp_interface_descriptor_table(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct gen6_interface_descriptor_data *desc; + dri_bo *bo; + int pp_index = pp_context->current_pp; + + bo = pp_context->idrt.bo; + dri_bo_map(bo, True); + assert(bo->virtual); + desc = bo->virtual; + memset(desc, 0, sizeof(*desc)); + desc->desc0.kernel_start_pointer = + pp_context->pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */ + desc->desc1.single_program_flow = 1; + desc->desc1.floating_point_mode = FLOATING_POINT_IEEE_754; + desc->desc2.sampler_count = 1; /* 1 - 4 samplers used */ + desc->desc2.sampler_state_pointer = + pp_context->sampler_state_table.bo->offset >> 5; + desc->desc3.binding_table_entry_count = 0; + desc->desc3.binding_table_pointer = (BINDING_TABLE_OFFSET >> 5); + desc->desc4.constant_urb_entry_read_offset = 0; + + if (IS_GEN7(i965->intel.device_info)) + desc->desc4.constant_urb_entry_read_length = 8; /* grf 1-8 */ + else + desc->desc4.constant_urb_entry_read_length = 4; /* grf 1-4 */ + + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, 0, - sizeof(*sampler_8x8) * index + offsetof(struct i965_sampler_8x8, dw1), - pp_context->sampler_state_table.bo_8x8_uv); + offsetof(struct gen6_interface_descriptor_data, desc0), + pp_context->pp_modules[pp_index].kernel.bo); - dri_bo_unmap(pp_context->sampler_state_table.bo); + dri_bo_emit_reloc(bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + desc->desc2.sampler_count << 2, + offsetof(struct gen6_interface_descriptor_data, desc2), + pp_context->sampler_state_table.bo); - /* private function & data */ - pp_context->pp_x_steps = pp_avs_x_steps; - pp_context->pp_y_steps = pp_avs_y_steps; - pp_context->pp_set_block_parameter = pp_avs_set_block_parameter; + dri_bo_unmap(bo); + pp_context->idrt.num_interface_descriptors++; +} + +static void +gen6_pp_upload_constants(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + unsigned char *constant_buffer; + int param_size; + + assert(sizeof(struct pp_static_parameter) == 128); + assert(sizeof(struct gen7_pp_static_parameter) == 256); - pp_avs_context->dest_x = dst_rect->x; - pp_avs_context->dest_y = dst_rect->y; - pp_avs_context->dest_w = ALIGN(dst_rect->width, 16); - pp_avs_context->dest_h = ALIGN(dst_rect->height, 16); - pp_avs_context->src_normalized_x = (float)src_rect->x / in_w / out_w; - pp_avs_context->src_normalized_y = (float)src_rect->y / in_h / out_h; - pp_avs_context->src_w = src_rect->width; - pp_avs_context->src_h = src_rect->height; + if (IS_GEN7(i965->intel.device_info)) + param_size = sizeof(struct gen7_pp_static_parameter); + else + param_size = sizeof(struct pp_static_parameter); - pp_static_parameter.grf4.r4_2.avs.nlas = 1; - pp_static_parameter.grf1.r1_6.normalized_video_y_scaling_step = (float) src_rect->height / in_h / out_h; + dri_bo_map(pp_context->curbe.bo, 1); + assert(pp_context->curbe.bo->virtual); + constant_buffer = pp_context->curbe.bo->virtual; + memcpy(constant_buffer, pp_context->pp_static_parameter, param_size); + dri_bo_unmap(pp_context->curbe.bo); +} - pp_inline_parameter.grf5.normalized_video_x_scaling_step = (float) src_rect->width / in_w / out_w; - pp_inline_parameter.grf5.block_count_x = 1; /* M x 1 */ - pp_inline_parameter.grf5.number_blocks = pp_avs_context->dest_h / 8; - pp_inline_parameter.grf5.block_vertical_mask = 0xff; - pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; - pp_inline_parameter.grf6.video_step_delta = 0.0; +static void +gen6_pp_states_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + gen6_pp_interface_descriptor_table(ctx, pp_context); + gen6_pp_upload_constants(ctx, pp_context); } -static int -pp_dndi_x_steps(void *private_context) +static void +gen6_pp_pipeline_select(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - return 1; + struct intel_batchbuffer *batch = pp_context->batch; + + BEGIN_BATCH(batch, 1); + OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); + ADVANCE_BATCH(batch); } -static int -pp_dndi_y_steps(void *private_context) +static void +gen6_pp_state_base_address(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - struct pp_dndi_context *pp_dndi_context = private_context; + struct intel_batchbuffer *batch = pp_context->batch; - return pp_dndi_context->dest_h / 4; + BEGIN_BATCH(batch, 10); + OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2)); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_RELOC(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); + ADVANCE_BATCH(batch); } -static int -pp_dndi_set_block_parameter(struct i965_post_processing_context *pp_context, int x, int y) +static void +gen6_pp_vfe_state(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - pp_inline_parameter.grf5.destination_block_horizontal_origin = x * 16; - pp_inline_parameter.grf5.destination_block_vertical_origin = y * 4; + struct intel_batchbuffer *batch = pp_context->batch; - return 0; + BEGIN_BATCH(batch, 8); + OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | (8 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (pp_context->vfe_gpu_state.max_num_threads - 1) << 16 | + pp_context->vfe_gpu_state.num_urb_entries << 8); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + (pp_context->vfe_gpu_state.urb_entry_size) << 16 | + /* URB Entry Allocation Size, in 256 bits unit */ + (pp_context->vfe_gpu_state.curbe_allocation_size)); + /* CURBE Allocation Size, in 256 bits unit */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); } -static -void pp_nv12_dndi_initialize(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect) +static void +gen6_pp_curbe_load(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { + struct intel_batchbuffer *batch = pp_context->batch; struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - struct pp_dndi_context *pp_dndi_context = (struct pp_dndi_context *)&pp_context->private_context; - struct object_surface *obj_surface; - struct i965_surface_state *ss; - struct i965_surface_state2 *ss_dndi; - struct i965_sampler_dndi *sampler_dndi; - dri_bo *bo; - int index; - int w, h; - int orig_w, orig_h; - unsigned int tiling, swizzle; + int param_size; - /* surface */ - obj_surface = SURFACE(in_surface_id); - orig_w = obj_surface->orig_width; - orig_h = obj_surface->orig_height; - w = obj_surface->width; - h = obj_surface->height; - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + if (IS_GEN7(i965->intel.device_info)) + param_size = sizeof(struct gen7_pp_static_parameter); + else + param_size = sizeof(struct pp_static_parameter); - if (pp_context->stmm.bo == NULL) { - pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr, - "STMM surface", - w * h, - 4096); - assert(pp_context->stmm.bo); - } + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + param_size); + OUT_RELOC(batch, + pp_context->curbe.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + ADVANCE_BATCH(batch); +} - /* source UV surface index 2 */ - index = 2; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; - ss->ss2.width = orig_w / 4 - 1; - ss->ss2.height = orig_h / 2 - 1; - ss->ss3.pitch = w - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - w * h, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); +static void +gen6_interface_descriptor_load(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; - /* source YUV surface index 4 */ - index = 4; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "YUV surface state for deinterlace ", - sizeof(struct i965_surface_state2), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss_dndi = bo->virtual; - memset(ss_dndi, 0, sizeof(*ss_dndi)); - ss_dndi->ss0.surface_base_address = pp_context->surfaces[index].s_bo->offset; - ss_dndi->ss1.cbcr_pixel_offset_v_direction = 0; - ss_dndi->ss1.width = w - 1; - ss_dndi->ss1.height = h - 1; - ss_dndi->ss1.cbcr_pixel_offset_v_direction = 1; - ss_dndi->ss2.half_pitch_for_chroma = 0; - ss_dndi->ss2.pitch = w - 1; - ss_dndi->ss2.interleave_chroma = 1; - ss_dndi->ss2.surface_format = SURFACE_FORMAT_PLANAR_420_8; - ss_dndi->ss2.half_pitch_for_chroma = 0; - ss_dndi->ss2.tiled_surface = 0; - ss_dndi->ss3.x_offset_for_cb = 0; - ss_dndi->ss3.y_offset_for_cb = h; - pp_set_surface2_tiling(ss_dndi, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - 0, - 0, - offsetof(struct i965_surface_state2, ss0), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); + OUT_BATCH(batch, 0); + OUT_BATCH(batch, + pp_context->idrt.num_interface_descriptors * sizeof(struct gen6_interface_descriptor_data)); + OUT_RELOC(batch, + pp_context->idrt.bo, + I915_GEM_DOMAIN_INSTRUCTION, 0, + 0); + ADVANCE_BATCH(batch); +} - /* source STMM surface index 20 */ - index = 20; - pp_context->surfaces[index].s_bo = pp_context->stmm.bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "STMM surface state for deinterlace ", - sizeof(struct i965_surface_state2), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; - ss->ss2.width = w - 1; - ss->ss2.height = h - 1; - ss->ss3.pitch = w - 1; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - 0, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); +static void update_block_mask_parameter(struct i965_post_processing_context *pp_context, int x, int y, int x_steps, int y_steps) +{ + struct pp_inline_parameter *pp_inline_parameter = pp_context->pp_inline_parameter; - /* destination surface */ - obj_surface = SURFACE(out_surface_id); - orig_w = obj_surface->orig_width; - orig_h = obj_surface->orig_height; - w = obj_surface->width; - h = obj_surface->height; - dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + pp_inline_parameter->grf5.block_vertical_mask = 0xff; + pp_inline_parameter->grf6.block_vertical_mask_bottom = pp_context->block_vertical_mask_bottom; + // for the first block, it always on the left edge. the second block will reload horizontal_mask from grf6.block_horizontal_mask_middle + pp_inline_parameter->grf5.block_horizontal_mask = pp_context->block_horizontal_mask_left; + pp_inline_parameter->grf6.block_horizontal_mask_middle = 0xffff; + pp_inline_parameter->grf6.block_horizontal_mask_right = pp_context->block_horizontal_mask_right; + + /* 1 x N */ + if (x_steps == 1) { + if (y == y_steps-1) { + pp_inline_parameter->grf5.block_vertical_mask = pp_context->block_vertical_mask_bottom; + } + else { + pp_inline_parameter->grf6.block_vertical_mask_bottom = 0xff; + } + } - /* destination Y surface index 7 */ - index = 7; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset; - ss->ss2.width = orig_w / 4 - 1; - ss->ss2.height = orig_h - 1; - ss->ss3.pitch = w - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - 0, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); + /* M x 1 */ + if (y_steps == 1) { + if (x == 0) { // all blocks in this group are on the left edge + pp_inline_parameter->grf6.block_horizontal_mask_middle = pp_context->block_horizontal_mask_left; + pp_inline_parameter->grf6.block_horizontal_mask_right = pp_context->block_horizontal_mask_left; + } + else if (x == x_steps-1) { + pp_inline_parameter->grf5.block_horizontal_mask = pp_context->block_horizontal_mask_right; + pp_inline_parameter->grf6.block_horizontal_mask_middle = pp_context->block_horizontal_mask_right; + } + else { + pp_inline_parameter->grf5.block_horizontal_mask = 0xffff; + pp_inline_parameter->grf6.block_horizontal_mask_middle = 0xffff; + pp_inline_parameter->grf6.block_horizontal_mask_right = 0xffff; + } + } - /* destination UV surface index 8 */ - index = 8; - pp_context->surfaces[index].s_bo = obj_surface->bo; - dri_bo_reference(pp_context->surfaces[index].s_bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "surface state", - sizeof(struct i965_surface_state), - 4096); - assert(bo); - pp_context->surfaces[index].ss_bo = bo; - dri_bo_map(bo, True); - assert(bo->virtual); - ss = bo->virtual; - memset(ss, 0, sizeof(*ss)); - ss->ss0.surface_type = I965_SURFACE_2D; - ss->ss0.surface_format = I965_SURFACEFORMAT_R8G8_UNORM; - ss->ss1.base_addr = pp_context->surfaces[index].s_bo->offset + w * h; - ss->ss2.width = orig_w / 4 - 1; - ss->ss2.height = orig_h / 2 - 1; - ss->ss3.pitch = w - 1; - pp_set_surface_tiling(ss, tiling); - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_RENDER, - I915_GEM_DOMAIN_RENDER, - w * h, - offsetof(struct i965_surface_state, ss1), - pp_context->surfaces[index].s_bo); - dri_bo_unmap(bo); +} - /* sampler dndi */ - dri_bo_map(pp_context->sampler_state_table.bo, True); - assert(pp_context->sampler_state_table.bo->virtual); - assert(sizeof(*sampler_dndi) == sizeof(int) * 8); - sampler_dndi = pp_context->sampler_state_table.bo->virtual; +static void +gen6_pp_object_walker(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct intel_batchbuffer *batch = pp_context->batch; + int x, x_steps, y, y_steps; + int param_size, command_length_in_dws; + dri_bo *command_buffer; + unsigned int *command_ptr; - /* sample dndi index 1 */ - index = 0; - sampler_dndi[index].dw0.denoise_asd_threshold = 0; - sampler_dndi[index].dw0.denoise_history_delta = 8; // 0-15, default is 8 - sampler_dndi[index].dw0.denoise_maximum_history = 128; // 128-240 - sampler_dndi[index].dw0.denoise_stad_threshold = 0; + if (IS_GEN7(i965->intel.device_info)) + param_size = sizeof(struct gen7_pp_inline_parameter); + else + param_size = sizeof(struct pp_inline_parameter); - sampler_dndi[index].dw1.denoise_threshold_for_sum_of_complexity_measure = 64; - sampler_dndi[index].dw1.denoise_moving_pixel_threshold = 0; - sampler_dndi[index].dw1.stmm_c2 = 0; - sampler_dndi[index].dw1.low_temporal_difference_threshold = 8; - sampler_dndi[index].dw1.temporal_difference_threshold = 16; + x_steps = pp_context->pp_x_steps(pp_context->private_context); + y_steps = pp_context->pp_y_steps(pp_context->private_context); + command_length_in_dws = 6 + (param_size >> 2); + command_buffer = dri_bo_alloc(i965->intel.bufmgr, + "command objects buffer", + command_length_in_dws * 4 * x_steps * y_steps + 8, + 4096); - sampler_dndi[index].dw2.block_noise_estimate_noise_threshold = 15; // 0-31 - sampler_dndi[index].dw2.block_noise_estimate_edge_threshold = 7; // 0-15 - sampler_dndi[index].dw2.denoise_edge_threshold = 7; // 0-15 - sampler_dndi[index].dw2.good_neighbor_threshold = 7; // 0-63 + dri_bo_map(command_buffer, 1); + command_ptr = command_buffer->virtual; - sampler_dndi[index].dw3.maximum_stmm = 128; - sampler_dndi[index].dw3.multipler_for_vecm = 2; - sampler_dndi[index].dw3.blending_constant_across_time_for_small_values_of_stmm = 0; - sampler_dndi[index].dw3.blending_constant_across_time_for_large_values_of_stmm = 64; - sampler_dndi[index].dw3.stmm_blending_constant_select = 0; + for (y = 0; y < y_steps; y++) { + for (x = 0; x < x_steps; x++) { + if (!pp_context->pp_set_block_parameter(pp_context, x, y)) { + // some common block parameter update goes here, apply to all pp functions + if (IS_GEN6(i965->intel.device_info)) + update_block_mask_parameter (pp_context, x, y, x_steps, y_steps); + + *command_ptr++ = (CMD_MEDIA_OBJECT | (command_length_in_dws - 2)); + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + *command_ptr++ = 0; + memcpy(command_ptr, pp_context->pp_inline_parameter, param_size); + command_ptr += (param_size >> 2); + } + } + } - sampler_dndi[index].dw4.sdi_delta = 8; - sampler_dndi[index].dw4.sdi_threshold = 128; - sampler_dndi[index].dw4.stmm_output_shift = 7; // stmm_max - stmm_min = 2 ^ stmm_output_shift - sampler_dndi[index].dw4.stmm_shift_up = 0; - sampler_dndi[index].dw4.stmm_shift_down = 0; - sampler_dndi[index].dw4.minimum_stmm = 0; + if (command_length_in_dws * x_steps * y_steps % 2 == 0) + *command_ptr++ = 0; - sampler_dndi[index].dw5.fmd_temporal_difference_threshold = 0; - sampler_dndi[index].dw5.sdi_fallback_mode_2_constant = 0; - sampler_dndi[index].dw5.sdi_fallback_mode_1_t2_constant = 0; - sampler_dndi[index].dw5.sdi_fallback_mode_1_t1_constant = 0; + *command_ptr = MI_BATCH_BUFFER_END; - sampler_dndi[index].dw6.dn_enable = 1; - sampler_dndi[index].dw6.di_enable = 1; - sampler_dndi[index].dw6.di_partial = 0; - sampler_dndi[index].dw6.dndi_top_first = 1; - sampler_dndi[index].dw6.dndi_stream_id = 1; - sampler_dndi[index].dw6.dndi_first_frame = 1; - sampler_dndi[index].dw6.progressive_dn = 0; - sampler_dndi[index].dw6.fmd_tear_threshold = 32; - sampler_dndi[index].dw6.fmd2_vertical_difference_threshold = 32; - sampler_dndi[index].dw6.fmd1_vertical_difference_threshold = 32; + dri_bo_unmap(command_buffer); - sampler_dndi[index].dw7.fmd_for_1st_field_of_current_frame = 2; - sampler_dndi[index].dw7.fmd_for_2nd_field_of_previous_frame = 1; - sampler_dndi[index].dw7.vdi_walker_enable = 0; - sampler_dndi[index].dw7.column_width_minus1 = w / 16; + BEGIN_BATCH(batch, 2); + OUT_BATCH(batch, MI_BATCH_BUFFER_START | (1 << 8)); + OUT_RELOC(batch, command_buffer, + I915_GEM_DOMAIN_COMMAND, 0, + 0); + ADVANCE_BATCH(batch); - dri_bo_unmap(pp_context->sampler_state_table.bo); + dri_bo_unreference(command_buffer); - /* private function & data */ - pp_context->pp_x_steps = pp_dndi_x_steps; - pp_context->pp_y_steps = pp_dndi_y_steps; - pp_context->pp_set_block_parameter = pp_dndi_set_block_parameter; + /* Have to execute the batch buffer here becuase MI_BATCH_BUFFER_END + * will cause control to pass back to ring buffer + */ + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + intel_batchbuffer_start_atomic(batch, 0x1000); +} + +static void +gen6_pp_pipeline_setup(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) +{ + struct intel_batchbuffer *batch = pp_context->batch; + + intel_batchbuffer_start_atomic(batch, 0x1000); + intel_batchbuffer_emit_mi_flush(batch); + gen6_pp_pipeline_select(ctx, pp_context); + gen6_pp_state_base_address(ctx, pp_context); + gen6_pp_vfe_state(ctx, pp_context); + gen6_pp_curbe_load(ctx, pp_context); + gen6_interface_descriptor_load(ctx, pp_context); + gen6_pp_object_walker(ctx, pp_context); + intel_batchbuffer_end_atomic(batch); +} + +static VAStatus +gen6_post_processing( + VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void *filter_param +) +{ + VAStatus va_status; + + va_status = gen6_pp_initialize(ctx, pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + pp_index, + filter_param); + + if (va_status == VA_STATUS_SUCCESS) { + gen6_pp_states_setup(ctx, pp_context); + gen6_pp_pipeline_setup(ctx, pp_context); + } - pp_static_parameter.grf1.statistics_surface_picth = w / 2; - pp_static_parameter.grf1.r1_6.di.top_field_first = 0; - pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m2 = 64; - pp_static_parameter.grf4.r4_2.di.motion_history_coefficient_m1 = 192; - - pp_inline_parameter.grf5.block_count_x = w / 16; /* 1 x N */ - pp_inline_parameter.grf5.number_blocks = w / 16; - pp_inline_parameter.grf5.block_vertical_mask = 0xff; - pp_inline_parameter.grf5.block_horizontal_mask = 0xffff; + if (va_status == VA_STATUS_SUCCESS_1) + va_status = VA_STATUS_SUCCESS; - pp_dndi_context->dest_w = w; - pp_dndi_context->dest_h = h; + return va_status; } -static void -ironlake_pp_initialize( +static VAStatus +i965_post_processing_internal( VADriverContextP ctx, - VASurfaceID in_surface_id, - VASurfaceID out_surface_id, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, const VARectangle *src_rect, + struct i965_surface *dst_surface, const VARectangle *dst_rect, - int pp_index + int pp_index, + void *filter_param ) { + VAStatus va_status; + + if (pp_context && pp_context->intel_post_processing) { + va_status = (pp_context->intel_post_processing)(ctx, pp_context, + src_surface, src_rect, + dst_surface, dst_rect, + pp_index, filter_param); + } else { + va_status = VA_STATUS_ERROR_UNIMPLEMENTED; + } + + return va_status; +} + +static void +rgb_to_yuv(unsigned int argb, + unsigned char *y, + unsigned char *u, + unsigned char *v, + unsigned char *a) +{ + int r = ((argb >> 16) & 0xff); + int g = ((argb >> 8) & 0xff); + int b = ((argb >> 0) & 0xff); + + *y = (257 * r + 504 * g + 98 * b) / 1000 + 16; + *v = (439 * r - 368 * g - 71 * b) / 1000 + 128; + *u = (-148 * r - 291 * g + 439 * b) / 1000 + 128; + *a = ((argb >> 24) & 0xff); +} + +static void +i965_vpp_clear_surface(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + struct object_surface *obj_surface, + unsigned int color) +{ struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - struct pp_module *pp_module; - dri_bo *bo; - int i; + struct intel_batchbuffer *batch = pp_context->batch; + unsigned int blt_cmd, br13; + unsigned int tiling = 0, swizzle = 0; + int pitch; + unsigned char y, u, v, a = 0; + int region_width, region_height; + + /* Currently only support NV12 surface */ + if (!obj_surface || obj_surface->fourcc != VA_FOURCC_NV12) + return; - dri_bo_unreference(pp_context->curbe.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "constant buffer", - 4096, - 4096); - assert(bo); - pp_context->curbe.bo = bo; + rgb_to_yuv(color, &y, &u, &v, &a); - dri_bo_unreference(pp_context->binding_table.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "binding table", - sizeof(unsigned int), - 4096); - assert(bo); - pp_context->binding_table.bo = bo; + if (a == 0) + return; - dri_bo_unreference(pp_context->idrt.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "interface discriptor", - sizeof(struct i965_interface_descriptor), - 4096); - assert(bo); - pp_context->idrt.bo = bo; - pp_context->idrt.num_interface_descriptors = 0; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + blt_cmd = XY_COLOR_BLT_CMD; + pitch = obj_surface->width; - dri_bo_unreference(pp_context->sampler_state_table.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "sampler state table", - 4096, - 4096); - assert(bo); - dri_bo_map(bo, True); - memset(bo->virtual, 0, bo->size); - dri_bo_unmap(bo); - pp_context->sampler_state_table.bo = bo; + if (tiling != I915_TILING_NONE) { + assert(tiling == I915_TILING_Y); + // blt_cmd |= XY_COLOR_BLT_DST_TILED; + // pitch >>= 2; + } - dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); - bo = dri_bo_alloc(i965->intel.bufmgr, - "sampler 8x8 state ", - 4096, - 4096); - assert(bo); - pp_context->sampler_state_table.bo_8x8 = bo; + br13 = 0xf0 << 16; + br13 |= BR13_8; + br13 |= pitch; + + if (IS_IRONLAKE(i965->intel.device_info)) { + intel_batchbuffer_start_atomic(batch, 48); + BEGIN_BATCH(batch, 12); + } else { + /* Will double-check the command if the new chipset is added */ + intel_batchbuffer_start_atomic_blt(batch, 48); + BEGIN_BLT_BATCH(batch, 12); + } - dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); - bo = dri_bo_alloc(i965->intel.bufmgr, - "sampler 8x8 state ", - 4096, - 4096); - assert(bo); - pp_context->sampler_state_table.bo_8x8_uv = bo; + region_width = obj_surface->width; + region_height = obj_surface->height; - dri_bo_unreference(pp_context->vfe_state.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "vfe state", - sizeof(struct i965_vfe_state), - 4096); - assert(bo); - pp_context->vfe_state.bo = bo; - - for (i = 0; i < MAX_PP_SURFACES; i++) { - dri_bo_unreference(pp_context->surfaces[i].ss_bo); - pp_context->surfaces[i].ss_bo = NULL; + OUT_BATCH(batch, blt_cmd); + OUT_BATCH(batch, br13); + OUT_BATCH(batch, + 0 << 16 | + 0); + OUT_BATCH(batch, + region_height << 16 | + region_width); + OUT_RELOC(batch, obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + 0); + OUT_BATCH(batch, y); - dri_bo_unreference(pp_context->surfaces[i].s_bo); - pp_context->surfaces[i].s_bo = NULL; + br13 = 0xf0 << 16; + br13 |= BR13_565; + br13 |= pitch; + + region_width = obj_surface->width / 2; + region_height = obj_surface->height / 2; + + if (tiling == I915_TILING_Y) { + region_height = ALIGN(obj_surface->height / 2, 32); } - memset(&pp_static_parameter, 0, sizeof(pp_static_parameter)); - memset(&pp_inline_parameter, 0, sizeof(pp_inline_parameter)); - assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); - pp_context->current_pp = pp_index; - pp_module = &pp_context->pp_modules[pp_index]; - - if (pp_module->initialize) - pp_module->initialize(ctx, in_surface_id, out_surface_id, - src_rect, dst_rect); + OUT_BATCH(batch, blt_cmd); + OUT_BATCH(batch, br13); + OUT_BATCH(batch, + 0 << 16 | + 0); + OUT_BATCH(batch, + region_height << 16 | + region_width); + OUT_RELOC(batch, obj_surface->bo, + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, + obj_surface->width * obj_surface->y_cb_offset); + OUT_BATCH(batch, v << 8 | u); + + ADVANCE_BATCH(batch); + intel_batchbuffer_end_atomic(batch); } -static void -ironlake_post_processing( +VAStatus +i965_scaling_processing( VADriverContextP ctx, - VASurfaceID in_surface_id, - VASurfaceID out_surface_id, + struct object_surface *src_surface_obj, const VARectangle *src_rect, + struct object_surface *dst_surface_obj, const VARectangle *dst_rect, - int pp_index -) + unsigned int va_flags) { - ironlake_pp_initialize(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); - ironlake_pp_states_setup(ctx); - ironlake_pp_pipeline_setup(ctx); + VAStatus va_status = VA_STATUS_SUCCESS; + struct i965_driver_data *i965 = i965_driver_data(ctx); + + assert(src_surface_obj->fourcc == VA_FOURCC_NV12); + assert(dst_surface_obj->fourcc == VA_FOURCC_NV12); + + if (HAS_VPP(i965)) { + struct i965_surface src_surface; + struct i965_surface dst_surface; + struct i965_post_processing_context *pp_context; + unsigned int filter_flags; + + _i965LockMutex(&i965->pp_mutex); + + src_surface.base = (struct object_base *)src_surface_obj; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + dst_surface.base = (struct object_base *)dst_surface_obj; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + pp_context = i965->pp_context; + filter_flags = pp_context->filter_flags; + pp_context->filter_flags = va_flags; + + va_status = i965_post_processing_internal(ctx, pp_context, + &src_surface, src_rect, &dst_surface, dst_rect, + avs_is_needed(va_flags) ? PP_NV12_AVS : PP_NV12_SCALING, NULL); + + pp_context->filter_flags = filter_flags; + + _i965UnlockMutex(&i965->pp_mutex); + } + + return va_status; } -static void -gen6_pp_initialize( +VASurfaceID +i965_post_processing( VADriverContextP ctx, - VASurfaceID in_surface_id, - VASurfaceID out_surface_id, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect, - int pp_index + unsigned int va_flags, + int *has_done_scaling, + VARectangle *calibrated_rect ) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - struct pp_module *pp_module; - dri_bo *bo; - int i; - - dri_bo_unreference(pp_context->curbe.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "constant buffer", - 4096, - 4096); - assert(bo); - pp_context->curbe.bo = bo; - - dri_bo_unreference(pp_context->binding_table.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "binding table", - sizeof(unsigned int), - 4096); - assert(bo); - pp_context->binding_table.bo = bo; + VASurfaceID out_surface_id = VA_INVALID_ID; + VASurfaceID tmp_id = VA_INVALID_ID; + + *has_done_scaling = 0; - dri_bo_unreference(pp_context->idrt.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "interface discriptor", - sizeof(struct gen6_interface_descriptor_data), - 4096); - assert(bo); - pp_context->idrt.bo = bo; - pp_context->idrt.num_interface_descriptors = 0; + if (HAS_VPP(i965)) { + VAStatus status; + struct i965_surface src_surface; + struct i965_surface dst_surface; + struct i965_post_processing_context *pp_context; - dri_bo_unreference(pp_context->sampler_state_table.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "sampler state table", - 4096, - 4096); - assert(bo); - dri_bo_map(bo, True); - memset(bo->virtual, 0, bo->size); - dri_bo_unmap(bo); - pp_context->sampler_state_table.bo = bo; + /* Currently only support post processing for NV12 surface */ + if (obj_surface->fourcc != VA_FOURCC_NV12) + return out_surface_id; - dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); - bo = dri_bo_alloc(i965->intel.bufmgr, - "sampler 8x8 state ", - 4096, - 4096); - assert(bo); - pp_context->sampler_state_table.bo_8x8 = bo; + _i965LockMutex(&i965->pp_mutex); - dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); - bo = dri_bo_alloc(i965->intel.bufmgr, - "sampler 8x8 state ", - 4096, - 4096); - assert(bo); - pp_context->sampler_state_table.bo_8x8_uv = bo; + pp_context = i965->pp_context; + pp_context->filter_flags = va_flags; + if (avs_is_needed(va_flags)) { + VARectangle tmp_dst_rect; + + if (out_surface_id != VA_INVALID_ID) + tmp_id = out_surface_id; + + tmp_dst_rect.x = 0; + tmp_dst_rect.y = 0; + tmp_dst_rect.width = dst_rect->width; + tmp_dst_rect.height = dst_rect->height; + src_surface.base = (struct object_base *)obj_surface; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + + status = i965_CreateSurfaces(ctx, + dst_rect->width, + dst_rect->height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(status == VA_STATUS_SUCCESS); + obj_surface = SURFACE(out_surface_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + i965_vpp_clear_surface(ctx, pp_context, obj_surface, 0); + + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + i965_post_processing_internal(ctx, pp_context, + &src_surface, + src_rect, + &dst_surface, + &tmp_dst_rect, + PP_NV12_AVS, + NULL); - dri_bo_unreference(pp_context->vfe_state.bo); - bo = dri_bo_alloc(i965->intel.bufmgr, - "vfe state", - sizeof(struct i965_vfe_state), - 4096); - assert(bo); - pp_context->vfe_state.bo = bo; - - for (i = 0; i < MAX_PP_SURFACES; i++) { - dri_bo_unreference(pp_context->surfaces[i].ss_bo); - pp_context->surfaces[i].ss_bo = NULL; + if (tmp_id != VA_INVALID_ID) + i965_DestroySurfaces(ctx, &tmp_id, 1); + + *has_done_scaling = 1; + calibrated_rect->x = 0; + calibrated_rect->y = 0; + calibrated_rect->width = dst_rect->width; + calibrated_rect->height = dst_rect->height; + } - dri_bo_unreference(pp_context->surfaces[i].s_bo); - pp_context->surfaces[i].s_bo = NULL; + _i965UnlockMutex(&i965->pp_mutex); } - memset(&pp_static_parameter, 0, sizeof(pp_static_parameter)); - memset(&pp_inline_parameter, 0, sizeof(pp_inline_parameter)); - assert(pp_index >= PP_NULL && pp_index < NUM_PP_MODULES); - pp_context->current_pp = pp_index; - pp_module = &pp_context->pp_modules[pp_index]; - - if (pp_module->initialize) - pp_module->initialize(ctx, in_surface_id, out_surface_id, - src_rect, dst_rect); + return out_surface_id; +} + +static VAStatus +i965_image_pl2_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect); + +static VAStatus +i965_image_plx_nv12_plx_processing(VADriverContextP ctx, + VAStatus (*i965_image_plx_nv12_processing)( + VADriverContextP, + const struct i965_surface *, + const VARectangle *, + struct i965_surface *, + const VARectangle *), + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAStatus status; + VASurfaceID tmp_surface_id = VA_INVALID_SURFACE; + struct object_surface *obj_surface = NULL; + struct i965_surface tmp_surface; + int width, height; + + pp_get_surface_size(ctx, dst_surface, &width, &height); + status = i965_CreateSurfaces(ctx, + width, + height, + VA_RT_FORMAT_YUV420, + 1, + &tmp_surface_id); + assert(status == VA_STATUS_SUCCESS); + obj_surface = SURFACE(tmp_surface_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + tmp_surface.base = (struct object_base *)obj_surface; + tmp_surface.type = I965_SURFACE_TYPE_SURFACE; + tmp_surface.flags = I965_SURFACE_FLAG_FRAME; + + status = i965_image_plx_nv12_processing(ctx, + src_surface, + src_rect, + &tmp_surface, + dst_rect); + + if (status == VA_STATUS_SUCCESS) + status = i965_image_pl2_processing(ctx, + &tmp_surface, + dst_rect, + dst_surface, + dst_rect); + + i965_DestroySurfaces(ctx, + &tmp_surface_id, + 1); + + return status; } -static void -gen6_pp_binding_table(struct i965_post_processing_context *pp_context) + +static VAStatus +i965_image_pl1_rgbx_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) { - unsigned int *binding_table; - dri_bo *bo = pp_context->binding_table.bo; - int i; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + int fourcc = pp_get_surface_fourcc(ctx, dst_surface); + VAStatus vaStatus; - dri_bo_map(bo, 1); - assert(bo->virtual); - binding_table = bo->virtual; - memset(binding_table, 0, bo->size); + switch (fourcc) { + case VA_FOURCC_NV12: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_RGBX_LOAD_SAVE_NV12, + NULL); + intel_batchbuffer_flush(pp_context->batch); + break; - for (i = 0; i < MAX_PP_SURFACES; i++) { - if (pp_context->surfaces[i].ss_bo) { - assert(pp_context->surfaces[i].s_bo); - - binding_table[i] = pp_context->surfaces[i].ss_bo->offset; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0, - i * sizeof(*binding_table), - pp_context->surfaces[i].ss_bo); - } - + default: + vaStatus = i965_image_plx_nv12_plx_processing(ctx, + i965_image_pl1_rgbx_processing, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; } - dri_bo_unmap(bo); + return vaStatus; } -static void -gen6_pp_interface_descriptor_table(struct i965_post_processing_context *pp_context) +static VAStatus +i965_image_pl3_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) { - struct gen6_interface_descriptor_data *desc; - dri_bo *bo; - int pp_index = pp_context->current_pp; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + int fourcc = pp_get_surface_fourcc(ctx, dst_surface); + VAStatus vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED; - bo = pp_context->idrt.bo; - dri_bo_map(bo, True); - assert(bo->virtual); - desc = bo->virtual; - memset(desc, 0, sizeof(*desc)); - desc->desc0.kernel_start_pointer = - pp_context->pp_modules[pp_index].kernel.bo->offset >> 6; /* reloc */ - desc->desc1.single_program_flow = 1; - desc->desc1.floating_point_mode = FLOATING_POINT_IEEE_754; - desc->desc2.sampler_count = 1; /* 1 - 4 samplers used */ - desc->desc2.sampler_state_pointer = - pp_context->sampler_state_table.bo->offset >> 5; - desc->desc3.binding_table_entry_count = 0; - desc->desc3.binding_table_pointer = - pp_context->binding_table.bo->offset >> 5; /*reloc */ - desc->desc4.constant_urb_entry_read_offset = 0; - desc->desc4.constant_urb_entry_read_length = 4; /* grf 1-4 */ + switch (fourcc) { + case VA_FOURCC_NV12: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_PL3_LOAD_SAVE_N12, + NULL); + intel_batchbuffer_flush(pp_context->batch); + break; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0, - offsetof(struct gen6_interface_descriptor_data, desc0), - pp_context->pp_modules[pp_index].kernel.bo); + case VA_FOURCC_IMC1: + case VA_FOURCC_IMC3: + case VA_FOURCC_YV12: + case VA_FOURCC_I420: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_PL3_LOAD_SAVE_PL3, + NULL); + intel_batchbuffer_flush(pp_context->batch); + break; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - desc->desc2.sampler_count << 2, - offsetof(struct gen6_interface_descriptor_data, desc2), - pp_context->sampler_state_table.bo); + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_PL3_LOAD_SAVE_PA, + NULL); + intel_batchbuffer_flush(pp_context->batch); + break; - dri_bo_emit_reloc(bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - desc->desc3.binding_table_entry_count, - offsetof(struct gen6_interface_descriptor_data, desc3), - pp_context->binding_table.bo); + default: + vaStatus = i965_image_plx_nv12_plx_processing(ctx, + i965_image_pl3_processing, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; + } - dri_bo_unmap(bo); - pp_context->idrt.num_interface_descriptors++; + return vaStatus; } -static void -gen6_pp_upload_constants(struct i965_post_processing_context *pp_context) +static VAStatus +i965_image_pl2_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) { - unsigned char *constant_buffer; + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + int fourcc = pp_get_surface_fourcc(ctx, dst_surface); + VAStatus vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED; - assert(sizeof(pp_static_parameter) == 128); - dri_bo_map(pp_context->curbe.bo, 1); - assert(pp_context->curbe.bo->virtual); - constant_buffer = pp_context->curbe.bo->virtual; - memcpy(constant_buffer, &pp_static_parameter, sizeof(pp_static_parameter)); - dri_bo_unmap(pp_context->curbe.bo); + switch (fourcc) { + case VA_FOURCC_NV12: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_NV12_LOAD_SAVE_N12, + NULL); + break; + + case VA_FOURCC_IMC1: + case VA_FOURCC_IMC3: + case VA_FOURCC_YV12: + case VA_FOURCC_I420: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_NV12_LOAD_SAVE_PL3, + NULL); + break; + + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_NV12_LOAD_SAVE_PA, + NULL); + break; + + case VA_FOURCC_BGRX: + case VA_FOURCC_BGRA: + case VA_FOURCC_RGBX: + case VA_FOURCC_RGBA: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_NV12_LOAD_SAVE_RGBX, + NULL); + break; + + default: + return VA_STATUS_ERROR_UNIMPLEMENTED; + } + + intel_batchbuffer_flush(pp_context->batch); + + return vaStatus; } -static void -gen6_pp_states_setup(VADriverContextP ctx) +static VAStatus +i965_image_pl1_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_post_processing_context *pp_context = i965->pp_context; + int fourcc = pp_get_surface_fourcc(ctx, dst_surface); + VAStatus vaStatus; + + switch (fourcc) { + case VA_FOURCC_NV12: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_PA_LOAD_SAVE_NV12, + NULL); + intel_batchbuffer_flush(pp_context->batch); + break; + + case VA_FOURCC_YV12: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_PA_LOAD_SAVE_PL3, + NULL); + intel_batchbuffer_flush(pp_context->batch); + break; + + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + vaStatus = i965_post_processing_internal(ctx, i965->pp_context, + src_surface, + src_rect, + dst_surface, + dst_rect, + PP_PA_LOAD_SAVE_PA, + NULL); + intel_batchbuffer_flush(pp_context->batch); + break; + + default: + vaStatus = i965_image_plx_nv12_plx_processing(ctx, + i965_image_pl1_processing, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; + } - gen6_pp_binding_table(pp_context); - gen6_pp_interface_descriptor_table(pp_context); - gen6_pp_upload_constants(pp_context); + return vaStatus; } -static void -gen6_pp_pipeline_select(VADriverContextP ctx) +// it only support NV12 and P010 for vebox proc ctx +static struct object_surface *derive_surface(VADriverContextP ctx, + struct object_image *obj_image, + struct object_surface *obj_surface) +{ + VAImage * const image = &obj_image->image; + + memset((void *)obj_surface, 0, sizeof(*obj_surface)); + obj_surface->fourcc = image->format.fourcc; + obj_surface->orig_width = image->width; + obj_surface->orig_height = image->height; + obj_surface->width = image->pitches[0]; + obj_surface->height = image->height; + obj_surface->y_cb_offset = image->offsets[1] / obj_surface->width; + obj_surface->y_cr_offset = obj_surface->y_cb_offset; + obj_surface->bo = obj_image->bo; + obj_surface->subsampling = SUBSAMPLE_YUV420; + + return obj_surface; +} + +static VAStatus +vebox_processing_simple(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + struct object_surface *src_obj_surface, + struct object_surface *dst_obj_surface, + const VARectangle *rect) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + VAProcPipelineParameterBuffer pipeline_param; + VAStatus status = VA_STATUS_ERROR_UNIMPLEMENTED; - BEGIN_BATCH(batch, 1); - OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); - ADVANCE_BATCH(batch); -} + if(pp_context->vebox_proc_ctx == NULL) { + pp_context->vebox_proc_ctx = gen75_vebox_context_init(ctx); + } -static void -gen6_pp_state_base_address(VADriverContextP ctx) + memset((void *)&pipeline_param, 0, sizeof(pipeline_param)); + pipeline_param.surface_region = rect; + pipeline_param.output_region = rect; + pipeline_param.filter_flags = 0; + pipeline_param.num_filters = 0; + + pp_context->vebox_proc_ctx->pipeline_param = &pipeline_param; + pp_context->vebox_proc_ctx->surface_input_object = src_obj_surface; + pp_context->vebox_proc_ctx->surface_output_object = dst_obj_surface; + + if (IS_GEN9(i965->intel.device_info)) + status = gen9_vebox_process_picture(ctx, pp_context->vebox_proc_ctx); + + return status; +} + +static VAStatus +i965_image_p010_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) { +#define HAS_VPP_P010(ctx) ((ctx)->codec_info->has_vpp_p010 && \ + (ctx)->intel.has_bsd) + struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + struct i965_post_processing_context *pp_context = i965->pp_context; + struct object_surface *src_obj_surface = NULL, *dst_obj_surface = NULL; + struct object_surface tmp_src_obj_surface, tmp_dst_obj_surface; + struct object_surface *tmp_surface = NULL; + VASurfaceID tmp_surface_id[3], out_surface_id = VA_INVALID_ID; + int num_tmp_surfaces = 0; + int fourcc = pp_get_surface_fourcc(ctx, dst_surface); + VAStatus vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED; + int vpp_post = 0; + + if(HAS_VPP_P010(i965)) { + vpp_post = 0; + switch(fourcc) { + case VA_FOURCC_NV12: + if(src_rect->x != dst_rect->x || + src_rect->y != dst_rect->y || + src_rect->width != dst_rect->width || + src_rect->height != dst_rect->height) { + vpp_post = 1; + } + break; + case VA_FOURCC_P010: + // don't support scaling while the fourcc of dst_surface is P010 + if(src_rect->x != dst_rect->x || + src_rect->y != dst_rect->y || + src_rect->width != dst_rect->width || + src_rect->height != dst_rect->height) { + vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED; + goto EXIT; + } + break; + default: + vpp_post = 1; + break; + } - BEGIN_BATCH(batch, 10); - OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2)); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); - ADVANCE_BATCH(batch); + if(src_surface->type == I965_SURFACE_TYPE_IMAGE) { + src_obj_surface = derive_surface(ctx, (struct object_image *)src_surface->base, + &tmp_src_obj_surface); + } + else + src_obj_surface = (struct object_surface *)src_surface->base; + + if(src_obj_surface == NULL) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + goto EXIT; + } + + if(vpp_post == 1) { + vaStatus = i965_CreateSurfaces(ctx, + src_obj_surface->orig_width, + src_obj_surface->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(vaStatus == VA_STATUS_SUCCESS); + tmp_surface_id[num_tmp_surfaces++] = out_surface_id; + tmp_surface = SURFACE(out_surface_id); + assert(tmp_surface); + i965_check_alloc_surface_bo(ctx, tmp_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + } + + if(tmp_surface != NULL) + dst_obj_surface = tmp_surface; + else { + if(dst_surface->type == I965_SURFACE_TYPE_IMAGE) { + dst_obj_surface = derive_surface(ctx, (struct object_image *)dst_surface->base, + &tmp_dst_obj_surface); + } + else + dst_obj_surface = (struct object_surface *)dst_surface->base; + } + + if(dst_obj_surface == NULL) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + goto EXIT; + } + + vaStatus = vebox_processing_simple(ctx, + pp_context, + src_obj_surface, + dst_obj_surface, + src_rect); + if(vaStatus != VA_STATUS_SUCCESS) + goto EXIT; + + if(vpp_post == 1) { + struct i965_surface src_surface_new; + + if(tmp_surface != NULL){ + src_surface_new.base = (struct object_base *)tmp_surface; + src_surface_new.type = I965_SURFACE_TYPE_SURFACE; + src_surface_new.flags = I965_SURFACE_FLAG_FRAME; + } + else + memcpy((void *)&src_surface_new, (void *)src_surface, sizeof(src_surface_new)); + + vaStatus = i965_image_pl2_processing(ctx, + &src_surface_new, + src_rect, + dst_surface, + dst_rect); + } + } + +EXIT: + if(num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surface_id, + num_tmp_surfaces); + + return vaStatus; } -static void -gen6_pp_vfe_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +VAStatus +i965_image_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + VAStatus status = VA_STATUS_ERROR_UNIMPLEMENTED; - BEGIN_BATCH(batch, 8); - OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | (8 - 2)); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, - (pp_context->urb.num_vfe_entries - 1) << 16 | - pp_context->urb.num_vfe_entries << 8); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, - (pp_context->urb.size_vfe_entry * 2) << 16 | /* in 256 bits unit */ - (pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 2 - 1)); /* in 256 bits unit */ - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - ADVANCE_BATCH(batch); -} + if (HAS_VPP(i965)) { + int fourcc = pp_get_surface_fourcc(ctx, src_surface); + + _i965LockMutex(&i965->pp_mutex); + + switch (fourcc) { + case VA_FOURCC_YV12: + case VA_FOURCC_I420: + case VA_FOURCC_IMC1: + case VA_FOURCC_IMC3: + case VA_FOURCC_422H: + case VA_FOURCC_422V: + case VA_FOURCC_411P: + case VA_FOURCC_444P: + case VA_FOURCC_YV16: + status = i965_image_pl3_processing(ctx, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; + + case VA_FOURCC_NV12: + status = i965_image_pl2_processing(ctx, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + status = i965_image_pl1_processing(ctx, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; + case VA_FOURCC_BGRA: + case VA_FOURCC_BGRX: + case VA_FOURCC_RGBA: + case VA_FOURCC_RGBX: + status = i965_image_pl1_rgbx_processing(ctx, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; + case VA_FOURCC_P010: + status = i965_image_p010_processing(ctx, + src_surface, + src_rect, + dst_surface, + dst_rect); + break; + default: + status = VA_STATUS_ERROR_UNIMPLEMENTED; + break; + } + + _i965UnlockMutex(&i965->pp_mutex); + } + + return status; +} static void -gen6_pp_curbe_load(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +i965_post_processing_context_finalize(VADriverContextP ctx, + struct i965_post_processing_context *pp_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + int i; - assert(pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 512 <= pp_context->curbe.bo->size); + dri_bo_unreference(pp_context->surface_state_binding_table.bo); + pp_context->surface_state_binding_table.bo = NULL; - BEGIN_BATCH(batch, 4); - OUT_BATCH(batch, CMD_MEDIA_CURBE_LOAD | (4 - 2)); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, - pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 512); - OUT_RELOC(batch, - pp_context->curbe.bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - ADVANCE_BATCH(batch); + dri_bo_unreference(pp_context->curbe.bo); + pp_context->curbe.bo = NULL; + + dri_bo_unreference(pp_context->sampler_state_table.bo); + pp_context->sampler_state_table.bo = NULL; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); + pp_context->sampler_state_table.bo_8x8 = NULL; + + dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); + pp_context->sampler_state_table.bo_8x8_uv = NULL; + + dri_bo_unreference(pp_context->idrt.bo); + pp_context->idrt.bo = NULL; + pp_context->idrt.num_interface_descriptors = 0; + + dri_bo_unreference(pp_context->vfe_state.bo); + pp_context->vfe_state.bo = NULL; + + for (i = 0; i < ARRAY_ELEMS(pp_context->pp_dndi_context.frame_store); i++) + pp_dndi_frame_store_clear(&pp_context->pp_dndi_context.frame_store[i], + ctx); + + dri_bo_unreference(pp_context->pp_dn_context.stmm_bo); + pp_context->pp_dn_context.stmm_bo = NULL; + + for (i = 0; i < NUM_PP_MODULES; i++) { + struct pp_module *pp_module = &pp_context->pp_modules[i]; + + dri_bo_unreference(pp_module->kernel.bo); + pp_module->kernel.bo = NULL; + } + + free(pp_context->pp_static_parameter); + free(pp_context->pp_inline_parameter); + pp_context->pp_static_parameter = NULL; + pp_context->pp_inline_parameter = NULL; } -static void -gen6_interface_descriptor_load(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +void +i965_post_processing_terminate(VADriverContextP ctx) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; + struct i965_post_processing_context *pp_context = i965->pp_context; - BEGIN_BATCH(batch, 4); - OUT_BATCH(batch, CMD_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2)); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, - pp_context->idrt.num_interface_descriptors * sizeof(struct gen6_interface_descriptor_data)); - OUT_RELOC(batch, - pp_context->idrt.bo, - I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); - ADVANCE_BATCH(batch); + if (pp_context) { + pp_context->finalize(ctx, pp_context); + free(pp_context); + } + + i965->pp_context = NULL; } -static void -gen6_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_context *pp_context) +#define VPP_CURBE_ALLOCATION_SIZE 32 + +void +i965_post_processing_context_init(VADriverContextP ctx, + void *data, + struct intel_batchbuffer *batch) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; - int x, x_steps, y, y_steps; - - x_steps = pp_context->pp_x_steps(&pp_context->private_context); - y_steps = pp_context->pp_y_steps(&pp_context->private_context); + int i; + struct i965_post_processing_context *pp_context = data; + const AVSConfig *avs_config; - for (y = 0; y < y_steps; y++) { - for (x = 0; x < x_steps; x++) { - if (!pp_context->pp_set_block_parameter(pp_context, x, y)) { - BEGIN_BATCH(batch, 22); - OUT_BATCH(batch, CMD_MEDIA_OBJECT | 20); - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); /* no indirect data */ - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); /* scoreboard */ - OUT_BATCH(batch, 0); + if (IS_IRONLAKE(i965->intel.device_info)) { + pp_context->urb.size = i965->intel.device_info->urb_size; + pp_context->urb.num_vfe_entries = 32; + pp_context->urb.size_vfe_entry = 1; /* in 512 bits unit */ + pp_context->urb.num_cs_entries = 1; + pp_context->urb.size_cs_entry = 2; + pp_context->urb.vfe_start = 0; + pp_context->urb.cs_start = pp_context->urb.vfe_start + + pp_context->urb.num_vfe_entries * pp_context->urb.size_vfe_entry; + assert(pp_context->urb.cs_start + + pp_context->urb.num_cs_entries * pp_context->urb.size_cs_entry <= i965->intel.device_info->urb_size); + pp_context->intel_post_processing = ironlake_post_processing; + } else { + pp_context->vfe_gpu_state.max_num_threads = 60; + pp_context->vfe_gpu_state.num_urb_entries = 59; + pp_context->vfe_gpu_state.gpgpu_mode = 0; + pp_context->vfe_gpu_state.urb_entry_size = 16 - 1; + pp_context->vfe_gpu_state.curbe_allocation_size = VPP_CURBE_ALLOCATION_SIZE; + pp_context->intel_post_processing = gen6_post_processing; + } - /* inline data grf 5-6 */ - assert(sizeof(pp_inline_parameter) == 64); - intel_batchbuffer_data(batch, &pp_inline_parameter, sizeof(pp_inline_parameter)); + pp_context->finalize = i965_post_processing_context_finalize; - ADVANCE_BATCH(batch); - } + assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen5)); + assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen6)); + assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen7)); + assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen75)); + + if (IS_HASWELL(i965->intel.device_info)) + memcpy(pp_context->pp_modules, pp_modules_gen75, sizeof(pp_context->pp_modules)); + else if (IS_GEN7(i965->intel.device_info)) + memcpy(pp_context->pp_modules, pp_modules_gen7, sizeof(pp_context->pp_modules)); + else if (IS_GEN6(i965->intel.device_info)) + memcpy(pp_context->pp_modules, pp_modules_gen6, sizeof(pp_context->pp_modules)); + else if (IS_IRONLAKE(i965->intel.device_info)) + memcpy(pp_context->pp_modules, pp_modules_gen5, sizeof(pp_context->pp_modules)); + + for (i = 0; i < NUM_PP_MODULES; i++) { + struct pp_module *pp_module = &pp_context->pp_modules[i]; + dri_bo_unreference(pp_module->kernel.bo); + if (pp_module->kernel.bin && pp_module->kernel.size) { + pp_module->kernel.bo = dri_bo_alloc(i965->intel.bufmgr, + pp_module->kernel.name, + pp_module->kernel.size, + 4096); + assert(pp_module->kernel.bo); + dri_bo_subdata(pp_module->kernel.bo, 0, pp_module->kernel.size, pp_module->kernel.bin); + } else { + pp_module->kernel.bo = NULL; } } + + /* static & inline parameters */ + if (IS_GEN7(i965->intel.device_info)) { + pp_context->pp_static_parameter = calloc(sizeof(struct gen7_pp_static_parameter), 1); + pp_context->pp_inline_parameter = calloc(sizeof(struct gen7_pp_inline_parameter), 1); + } else { + pp_context->pp_static_parameter = calloc(sizeof(struct pp_static_parameter), 1); + pp_context->pp_inline_parameter = calloc(sizeof(struct pp_inline_parameter), 1); + } + + pp_context->batch = batch; + pp_dndi_context_init(&pp_context->pp_dndi_context); + + avs_config = IS_IRONLAKE(i965->intel.device_info) ? &gen5_avs_config : + &gen6_avs_config; + avs_init_state(&pp_context->pp_avs_context.state, avs_config); } -static void -gen6_pp_pipeline_setup(VADriverContextP ctx) +bool +i965_post_processing_init(VADriverContextP ctx) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct intel_batchbuffer *batch = i965->batch; struct i965_post_processing_context *pp_context = i965->pp_context; - intel_batchbuffer_start_atomic(batch, 0x1000); - intel_batchbuffer_emit_mi_flush(batch); - gen6_pp_pipeline_select(ctx); - gen6_pp_curbe_load(ctx, pp_context); - gen6_interface_descriptor_load(ctx, pp_context); - gen6_pp_state_base_address(ctx); - gen6_pp_vfe_state(ctx, pp_context); - gen6_pp_object_walker(ctx, pp_context); - intel_batchbuffer_end_atomic(batch); + if (HAS_VPP(i965)) { + if (pp_context == NULL) { + pp_context = calloc(1, sizeof(*pp_context)); + assert(pp_context); + i965->codec_info->post_processing_context_init(ctx, pp_context, i965->pp_batch); + i965->pp_context = pp_context; + } + } + + return true; } -static void -gen6_post_processing( - VADriverContextP ctx, - VASurfaceID in_surface_id, - VASurfaceID out_surface_id, - const VARectangle *src_rect, - const VARectangle *dst_rect, - int pp_index -) +static const int procfilter_to_pp_flag[VAProcFilterCount] = { + PP_NULL, /* VAProcFilterNone */ + PP_NV12_DN, /* VAProcFilterNoiseReduction */ + PP_NV12_DNDI, /* VAProcFilterDeinterlacing */ + PP_NULL, /* VAProcFilterSharpening */ + PP_NULL, /* VAProcFilterColorBalance */ +}; + +static const int proc_frame_to_pp_frame[3] = { + I965_SURFACE_FLAG_FRAME, + I965_SURFACE_FLAG_TOP_FIELD_FIRST, + I965_SURFACE_FLAG_BOTTOME_FIELD_FIRST +}; + +enum { + PP_OP_CHANGE_FORMAT = 1 << 0, + PP_OP_CHANGE_SIZE = 1 << 1, + PP_OP_DEINTERLACE = 1 << 2, + PP_OP_COMPLEX = 1 << 3, +}; + +static int +pp_get_kernel_index(uint32_t src_fourcc, uint32_t dst_fourcc, uint32_t pp_ops, + uint32_t filter_flags) { - gen6_pp_initialize(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); - gen6_pp_states_setup(ctx); - gen6_pp_pipeline_setup(ctx); + int pp_index = -1; + + if (!dst_fourcc) + dst_fourcc = src_fourcc; + + switch (src_fourcc) { + case VA_FOURCC_RGBX: + case VA_FOURCC_RGBA: + case VA_FOURCC_BGRX: + case VA_FOURCC_BGRA: + switch (dst_fourcc) { + case VA_FOURCC_NV12: + pp_index = PP_RGBX_LOAD_SAVE_NV12; + break; + } + break; + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + switch (dst_fourcc) { + case VA_FOURCC_NV12: + pp_index = PP_PA_LOAD_SAVE_NV12; + break; + case VA_FOURCC_I420: + case VA_FOURCC_YV12: + pp_index = PP_PA_LOAD_SAVE_PL3; + break; + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + pp_index = PP_PA_LOAD_SAVE_PA; + break; + } + break; + case VA_FOURCC_NV12: + switch (dst_fourcc) { + case VA_FOURCC_NV12: + if (pp_ops & PP_OP_CHANGE_SIZE) + pp_index = avs_is_needed(filter_flags) ? + PP_NV12_AVS : PP_NV12_SCALING; + else + pp_index = PP_NV12_LOAD_SAVE_N12; + break; + case VA_FOURCC_I420: + case VA_FOURCC_YV12: + case VA_FOURCC_IMC1: + case VA_FOURCC_IMC3: + pp_index = PP_NV12_LOAD_SAVE_PL3; + break; + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + pp_index = PP_NV12_LOAD_SAVE_PA; + break; + case VA_FOURCC_RGBX: + case VA_FOURCC_RGBA: + case VA_FOURCC_BGRX: + case VA_FOURCC_BGRA: + pp_index = PP_NV12_LOAD_SAVE_RGBX; + break; + } + break; + case VA_FOURCC_I420: + case VA_FOURCC_YV12: + case VA_FOURCC_IMC1: + case VA_FOURCC_IMC3: + case VA_FOURCC_YV16: + case VA_FOURCC_411P: + case VA_FOURCC_422H: + case VA_FOURCC_422V: + case VA_FOURCC_444P: + switch (dst_fourcc) { + case VA_FOURCC_NV12: + pp_index = PP_PL3_LOAD_SAVE_N12; + break; + case VA_FOURCC_I420: + case VA_FOURCC_YV12: + case VA_FOURCC_IMC1: + case VA_FOURCC_IMC3: + pp_index = PP_PL3_LOAD_SAVE_PL3; + break; + case VA_FOURCC_YUY2: + case VA_FOURCC_UYVY: + pp_index = PP_PL3_LOAD_SAVE_PA; + break; + } + break; + } + return pp_index; } -static void -i965_post_processing_internal( - VADriverContextP ctx, - VASurfaceID in_surface_id, - VASurfaceID out_surface_id, - const VARectangle *src_rect, - const VARectangle *dst_rect, - int pp_index -) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); +static VAStatus +i965_proc_picture_fast(VADriverContextP ctx, + struct i965_proc_context *proc_context, struct proc_state *proc_state) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + const VAProcPipelineParameterBuffer * const pipeline_param = + (VAProcPipelineParameterBuffer *)proc_state->pipeline_param->buffer; + struct object_surface *src_obj_surface, *dst_obj_surface; + struct i965_surface src_surface, dst_surface; + const VAProcFilterParameterBufferDeinterlacing *deint_params = NULL; + VARectangle src_rect, dst_rect; + VAStatus status; + uint32_t i, filter_flags = 0, pp_ops = 0; + int pp_index; + + /* Validate pipeline parameters */ + if (pipeline_param->num_filters > 0 && !pipeline_param->filters) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + for (i = 0; i < pipeline_param->num_filters; i++) { + const VAProcFilterParameterBuffer *filter; + struct object_buffer * const obj_buffer = + BUFFER(pipeline_param->filters[i]); + + assert(obj_buffer && obj_buffer->buffer_store); + if (!obj_buffer || !obj_buffer->buffer_store) + return VA_STATUS_ERROR_INVALID_PARAMETER; + + filter = (VAProcFilterParameterBuffer *) + obj_buffer->buffer_store->buffer; + switch (filter->type) { + case VAProcFilterDeinterlacing: + pp_ops |= PP_OP_DEINTERLACE; + deint_params = (VAProcFilterParameterBufferDeinterlacing *)filter; + break; + default: + pp_ops |= PP_OP_COMPLEX; + break; + } + } + filter_flags |= pipeline_param->filter_flags & VA_FILTER_SCALING_MASK; - if (IS_GEN6(i965->intel.device_id) || - IS_GEN7(i965->intel.device_id)) - gen6_post_processing(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); - else - ironlake_post_processing(ctx, in_surface_id, out_surface_id, src_rect, dst_rect, pp_index); + /* Validate source surface */ + src_obj_surface = SURFACE(pipeline_param->surface); + if (!src_obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + if (!src_obj_surface->fourcc) + return VA_STATUS_ERROR_INVALID_IMAGE_FORMAT; + + if (pipeline_param->surface_region) { + src_rect.x = pipeline_param->surface_region->x; + src_rect.y = pipeline_param->surface_region->y; + src_rect.width = pipeline_param->surface_region->width; + src_rect.height = pipeline_param->surface_region->height; + } else { + src_rect.x = 0; + src_rect.y = 0; + src_rect.width = src_obj_surface->orig_width; + src_rect.height = src_obj_surface->orig_height; + } + + src_surface.base = &src_obj_surface->base; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + + if (pp_ops & PP_OP_DEINTERLACE) { + filter_flags |= !(deint_params->flags & VA_DEINTERLACING_BOTTOM_FIELD) ? + VA_TOP_FIELD : VA_BOTTOM_FIELD; + if (deint_params->algorithm != VAProcDeinterlacingBob) + pp_ops |= PP_OP_COMPLEX; + } + else if (pipeline_param->filter_flags & (VA_TOP_FIELD | VA_BOTTOM_FIELD)) { + filter_flags |= (pipeline_param->filter_flags & VA_TOP_FIELD) ? + VA_TOP_FIELD : VA_BOTTOM_FIELD; + pp_ops |= PP_OP_DEINTERLACE; + } + if (pp_ops & PP_OP_DEINTERLACE) // XXX: no bob-deinterlacing optimization yet + pp_ops |= PP_OP_COMPLEX; + + /* Validate target surface */ + dst_obj_surface = SURFACE(proc_state->current_render_target); + if (!dst_obj_surface) + return VA_STATUS_ERROR_INVALID_SURFACE; + + if (!dst_obj_surface->bo) + return VA_STATUS_ERROR_INVALID_SURFACE; + + if (dst_obj_surface->fourcc && + dst_obj_surface->fourcc != src_obj_surface->fourcc) + pp_ops |= PP_OP_CHANGE_FORMAT; + + if (pipeline_param->output_region) { + dst_rect.x = pipeline_param->output_region->x; + dst_rect.y = pipeline_param->output_region->y; + dst_rect.width = pipeline_param->output_region->width; + dst_rect.height = pipeline_param->output_region->height; + } else { + dst_rect.x = 0; + dst_rect.y = 0; + dst_rect.width = dst_obj_surface->orig_width; + dst_rect.height = dst_obj_surface->orig_height; + } + + if (dst_rect.width != src_rect.width || dst_rect.height != src_rect.height) + pp_ops |= PP_OP_CHANGE_SIZE; + + dst_surface.base = &dst_obj_surface->base; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + + /* Validate "fast-path" processing capabilities */ + if (!IS_GEN7(i965->intel.device_info)) { + if ((pp_ops & PP_OP_CHANGE_FORMAT) && (pp_ops & PP_OP_CHANGE_SIZE)) + return VA_STATUS_ERROR_UNIMPLEMENTED; // temporary surface is needed + } + if (pipeline_param->pipeline_flags & VA_PROC_PIPELINE_FAST) { + filter_flags &= ~VA_FILTER_SCALING_MASK; + filter_flags |= VA_FILTER_SCALING_FAST; + } + else { + if (pp_ops & PP_OP_COMPLEX) + return VA_STATUS_ERROR_UNIMPLEMENTED; // full pipeline is needed + if ((filter_flags & VA_FILTER_SCALING_MASK) > VA_FILTER_SCALING_HQ) + return VA_STATUS_ERROR_UNIMPLEMENTED; + } + + pp_index = pp_get_kernel_index(src_obj_surface->fourcc, + dst_obj_surface->fourcc, pp_ops, filter_flags); + if (pp_index < 0) + return VA_STATUS_ERROR_UNIMPLEMENTED; + + proc_context->pp_context.filter_flags = filter_flags; + status = i965_post_processing_internal(ctx, &proc_context->pp_context, + &src_surface, &src_rect, &dst_surface, &dst_rect, pp_index, NULL); + intel_batchbuffer_flush(proc_context->pp_context.batch); + return status; } VAStatus -i965_DestroySurfaces(VADriverContextP ctx, - VASurfaceID *surface_list, - int num_surfaces); -VAStatus -i965_CreateSurfaces(VADriverContextP ctx, - int width, - int height, - int format, - int num_surfaces, - VASurfaceID *surfaces); -VASurfaceID -i965_post_processing( - VADriverContextP ctx, - VASurfaceID surface, - const VARectangle *src_rect, - const VARectangle *dst_rect, - unsigned int flags, - int *has_done_scaling -) +i965_proc_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context) { struct i965_driver_data *i965 = i965_driver_data(ctx); - VASurfaceID in_surface_id = surface; + struct i965_proc_context *proc_context = (struct i965_proc_context *)hw_context; + struct proc_state *proc_state = &codec_state->proc; + VAProcPipelineParameterBuffer *pipeline_param = (VAProcPipelineParameterBuffer *)proc_state->pipeline_param->buffer; + struct object_surface *obj_surface; + struct i965_surface src_surface, dst_surface; + VARectangle src_rect, dst_rect; + VAStatus status; + int i; + VASurfaceID tmp_surfaces[VAProcFilterCount + 4]; + int num_tmp_surfaces = 0; + unsigned int tiling = 0, swizzle = 0; + int in_width, in_height; + + status = i965_proc_picture_fast(ctx, proc_context, proc_state); + if (status != VA_STATUS_ERROR_UNIMPLEMENTED) + return status; + + if (pipeline_param->surface == VA_INVALID_ID || + proc_state->current_render_target == VA_INVALID_ID) { + status = VA_STATUS_ERROR_INVALID_SURFACE; + goto error; + } + + obj_surface = SURFACE(pipeline_param->surface); + + if (!obj_surface) { + status = VA_STATUS_ERROR_INVALID_SURFACE; + goto error; + } + + if (!obj_surface->bo) { + status = VA_STATUS_ERROR_INVALID_VALUE; /* The input surface is created without valid content */ + goto error; + } + + if (pipeline_param->num_filters && !pipeline_param->filters) { + status = VA_STATUS_ERROR_INVALID_PARAMETER; + goto error; + } + + in_width = obj_surface->orig_width; + in_height = obj_surface->orig_height; + dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); + + src_surface.base = (struct object_base *)obj_surface; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = proc_frame_to_pp_frame[pipeline_param->filter_flags & 0x3]; + VASurfaceID out_surface_id = VA_INVALID_ID; + if (obj_surface->fourcc != VA_FOURCC_NV12) { + src_surface.base = (struct object_base *)obj_surface; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = I965_SURFACE_FLAG_FRAME; + src_rect.x = 0; + src_rect.y = 0; + src_rect.width = in_width; + src_rect.height = in_height; + + status = i965_CreateSurfaces(ctx, + in_width, + in_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(status == VA_STATUS_SUCCESS); + tmp_surfaces[num_tmp_surfaces++] = out_surface_id; + obj_surface = SURFACE(out_surface_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, !!tiling, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + dst_surface.flags = I965_SURFACE_FLAG_FRAME; + dst_rect.x = 0; + dst_rect.y = 0; + dst_rect.width = in_width; + dst_rect.height = in_height; + + status = i965_image_processing(ctx, + &src_surface, + &src_rect, + &dst_surface, + &dst_rect); + assert(status == VA_STATUS_SUCCESS); + + src_surface.base = (struct object_base *)obj_surface; + src_surface.type = I965_SURFACE_TYPE_SURFACE; + src_surface.flags = proc_frame_to_pp_frame[pipeline_param->filter_flags & 0x3]; + } - if (HAS_PP(i965)) { - /* Currently only support post processing for NV12 surface */ - if (i965->render_state.interleaved_uv) { - struct object_surface *obj_surface; - VAStatus status; + if (pipeline_param->surface_region) { + src_rect.x = pipeline_param->surface_region->x; + src_rect.y = pipeline_param->surface_region->y; + src_rect.width = pipeline_param->surface_region->width; + src_rect.height = pipeline_param->surface_region->height; + } else { + src_rect.x = 0; + src_rect.y = 0; + src_rect.width = in_width; + src_rect.height = in_height; + } - if (flags & I965_PP_FLAG_DEINTERLACING) { - obj_surface = SURFACE(in_surface_id); - status = i965_CreateSurfaces(ctx, - obj_surface->orig_width, - obj_surface->orig_height, - VA_RT_FORMAT_YUV420, - 1, - &out_surface_id); - assert(status == VA_STATUS_SUCCESS); - obj_surface = SURFACE(out_surface_id); - i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); - i965_post_processing_internal(ctx, - in_surface_id, out_surface_id, - src_rect, dst_rect, - PP_NV12_DNDI); - } + proc_context->pp_context.pipeline_param = pipeline_param; - if (flags & I965_PP_FLAG_AVS) { - struct i965_render_state *render_state = &i965->render_state; - struct intel_region *dest_region = render_state->draw_region; - - if (out_surface_id != VA_INVALID_ID) - in_surface_id = out_surface_id; - - status = i965_CreateSurfaces(ctx, - dest_region->width, - dest_region->height, - VA_RT_FORMAT_YUV420, - 1, - &out_surface_id); - assert(status == VA_STATUS_SUCCESS); - obj_surface = SURFACE(out_surface_id); - i965_check_alloc_surface_bo(ctx, obj_surface, 0, VA_FOURCC('N','V','1','2')); - i965_post_processing_internal(ctx, - in_surface_id, out_surface_id, - src_rect, dst_rect, - PP_NV12_AVS); + for (i = 0; i < pipeline_param->num_filters; i++) { + struct object_buffer *obj_buffer = BUFFER(pipeline_param->filters[i]); + VAProcFilterParameterBufferBase *filter_param = NULL; + VAProcFilterType filter_type; + int kernel_index; + + if (!obj_buffer || + !obj_buffer->buffer_store || + !obj_buffer->buffer_store->buffer) { + status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN; + goto error; + } - if (in_surface_id != surface) - i965_DestroySurfaces(ctx, &in_surface_id, 1); - - *has_done_scaling = 1; + out_surface_id = VA_INVALID_ID; + filter_param = (VAProcFilterParameterBufferBase *)obj_buffer->buffer_store->buffer; + filter_type = filter_param->type; + kernel_index = procfilter_to_pp_flag[filter_type]; + + if (kernel_index != PP_NULL && + proc_context->pp_context.pp_modules[kernel_index].kernel.bo != NULL) { + status = i965_CreateSurfaces(ctx, + in_width, + in_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(status == VA_STATUS_SUCCESS); + tmp_surfaces[num_tmp_surfaces++] = out_surface_id; + obj_surface = SURFACE(out_surface_id); + assert(obj_surface); + i965_check_alloc_surface_bo(ctx, obj_surface, !!tiling, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + status = i965_post_processing_internal(ctx, &proc_context->pp_context, + &src_surface, + &src_rect, + &dst_surface, + &src_rect, + kernel_index, + filter_param); + + if (status == VA_STATUS_SUCCESS) { + src_surface.base = dst_surface.base; + src_surface.type = dst_surface.type; + src_surface.flags = dst_surface.flags; } } } - return out_surface_id; -} + proc_context->pp_context.pipeline_param = NULL; + obj_surface = SURFACE(proc_state->current_render_target); + + if (!obj_surface) { + status = VA_STATUS_ERROR_INVALID_SURFACE; + goto error; + } -Bool -i965_post_processing_terminate(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - int i; + if (pipeline_param->output_region) { + dst_rect.x = pipeline_param->output_region->x; + dst_rect.y = pipeline_param->output_region->y; + dst_rect.width = pipeline_param->output_region->width; + dst_rect.height = pipeline_param->output_region->height; + } else { + dst_rect.x = 0; + dst_rect.y = 0; + dst_rect.width = obj_surface->orig_width; + dst_rect.height = obj_surface->orig_height; + } - if (HAS_PP(i965)) { - if (pp_context) { - dri_bo_unreference(pp_context->curbe.bo); - pp_context->curbe.bo = NULL; - - for (i = 0; i < MAX_PP_SURFACES; i++) { - dri_bo_unreference(pp_context->surfaces[i].ss_bo); - pp_context->surfaces[i].ss_bo = NULL; + if (IS_GEN7(i965->intel.device_info) || + IS_GEN8(i965->intel.device_info) || + IS_GEN9(i965->intel.device_info)) { + unsigned int saved_filter_flag; + struct i965_post_processing_context *i965pp_context = i965->pp_context; + + if (obj_surface->fourcc == 0) { + i965_check_alloc_surface_bo(ctx, obj_surface, 1, + VA_FOURCC_NV12, + SUBSAMPLE_YUV420); + } - dri_bo_unreference(pp_context->surfaces[i].s_bo); - pp_context->surfaces[i].s_bo = NULL; - } + i965_vpp_clear_surface(ctx, &proc_context->pp_context, + obj_surface, + pipeline_param->output_background_color); - dri_bo_unreference(pp_context->sampler_state_table.bo); - pp_context->sampler_state_table.bo = NULL; + intel_batchbuffer_flush(hw_context->batch); - dri_bo_unreference(pp_context->sampler_state_table.bo_8x8); - pp_context->sampler_state_table.bo_8x8 = NULL; + saved_filter_flag = i965pp_context->filter_flags; + i965pp_context->filter_flags = (pipeline_param->filter_flags & VA_FILTER_SCALING_MASK); - dri_bo_unreference(pp_context->sampler_state_table.bo_8x8_uv); - pp_context->sampler_state_table.bo_8x8_uv = NULL; + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + i965_image_processing(ctx, &src_surface, &src_rect, &dst_surface, &dst_rect); - dri_bo_unreference(pp_context->binding_table.bo); - pp_context->binding_table.bo = NULL; + i965pp_context->filter_flags = saved_filter_flag; - dri_bo_unreference(pp_context->idrt.bo); - pp_context->idrt.bo = NULL; - pp_context->idrt.num_interface_descriptors = 0; + if (num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surfaces, + num_tmp_surfaces); - dri_bo_unreference(pp_context->vfe_state.bo); - pp_context->vfe_state.bo = NULL; + return VA_STATUS_SUCCESS; + } - dri_bo_unreference(pp_context->stmm.bo); - pp_context->stmm.bo = NULL; + int csc_needed = 0; + if (obj_surface->fourcc && obj_surface->fourcc != VA_FOURCC_NV12){ + csc_needed = 1; + out_surface_id = VA_INVALID_ID; + status = i965_CreateSurfaces(ctx, + obj_surface->orig_width, + obj_surface->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(status == VA_STATUS_SUCCESS); + tmp_surfaces[num_tmp_surfaces++] = out_surface_id; + struct object_surface *csc_surface = SURFACE(out_surface_id); + assert(csc_surface); + i965_check_alloc_surface_bo(ctx, csc_surface, !!tiling, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + dst_surface.base = (struct object_base *)csc_surface; + } else { + i965_check_alloc_surface_bo(ctx, obj_surface, !!tiling, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + dst_surface.base = (struct object_base *)obj_surface; + } - for (i = 0; i < NUM_PP_MODULES; i++) { - struct pp_module *pp_module = &pp_context->pp_modules[i]; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + i965_vpp_clear_surface(ctx, &proc_context->pp_context, obj_surface, pipeline_param->output_background_color); - dri_bo_unreference(pp_module->kernel.bo); - pp_module->kernel.bo = NULL; - } + // load/save doesn't support different origin offset for src and dst surface + if (src_rect.width == dst_rect.width && + src_rect.height == dst_rect.height && + src_rect.x == dst_rect.x && + src_rect.y == dst_rect.y) { + i965_post_processing_internal(ctx, &proc_context->pp_context, + &src_surface, + &src_rect, + &dst_surface, + &dst_rect, + PP_NV12_LOAD_SAVE_N12, + NULL); + } else { - free(pp_context); - } + proc_context->pp_context.filter_flags = pipeline_param->filter_flags; + i965_post_processing_internal(ctx, &proc_context->pp_context, + &src_surface, + &src_rect, + &dst_surface, + &dst_rect, + avs_is_needed(pipeline_param->filter_flags) ? PP_NV12_AVS : PP_NV12_SCALING, + NULL); + } - i965->pp_context = NULL; + if (csc_needed) { + src_surface.base = dst_surface.base; + src_surface.type = dst_surface.type; + src_surface.flags = dst_surface.flags; + dst_surface.base = (struct object_base *)obj_surface; + dst_surface.type = I965_SURFACE_TYPE_SURFACE; + i965_image_processing(ctx, &src_surface, &dst_rect, &dst_surface, &dst_rect); } + + if (num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surfaces, + num_tmp_surfaces); + + intel_batchbuffer_flush(hw_context->batch); + + return VA_STATUS_SUCCESS; + +error: + if (num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surfaces, + num_tmp_surfaces); - return True; + return status; } -Bool -i965_post_processing_init(VADriverContextP ctx) +static void +i965_proc_context_destroy(void *hw_context) +{ + struct i965_proc_context * const proc_context = hw_context; + VADriverContextP const ctx = proc_context->driver_context; + + proc_context->pp_context.finalize(ctx, &proc_context->pp_context); + intel_batchbuffer_free(proc_context->base.batch); + free(proc_context); +} + +struct hw_context * +i965_proc_context_init(VADriverContextP ctx, struct object_config *obj_config) { struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_post_processing_context *pp_context = i965->pp_context; - int i; + struct intel_driver_data *intel = intel_driver_data(ctx); + struct i965_proc_context *proc_context = calloc(1, sizeof(struct i965_proc_context)); - if (HAS_PP(i965)) { - if (pp_context == NULL) { - pp_context = calloc(1, sizeof(*pp_context)); - i965->pp_context = pp_context; + if (!proc_context) + return NULL; - pp_context->urb.size = URB_SIZE((&i965->intel)); - pp_context->urb.num_vfe_entries = 32; - pp_context->urb.size_vfe_entry = 1; /* in 512 bits unit */ - pp_context->urb.num_cs_entries = 1; - pp_context->urb.size_cs_entry = 2; /* in 512 bits unit */ - pp_context->urb.vfe_start = 0; - pp_context->urb.cs_start = pp_context->urb.vfe_start + - pp_context->urb.num_vfe_entries * pp_context->urb.size_vfe_entry; - assert(pp_context->urb.cs_start + - pp_context->urb.num_cs_entries * pp_context->urb.size_cs_entry <= URB_SIZE((&i965->intel))); - - assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen5)); - assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen6)); - - if (IS_GEN6(i965->intel.device_id) || - IS_GEN7(i965->intel.device_id)) - memcpy(pp_context->pp_modules, pp_modules_gen6, sizeof(pp_context->pp_modules)); - else if (IS_IRONLAKE(i965->intel.device_id)) - memcpy(pp_context->pp_modules, pp_modules_gen5, sizeof(pp_context->pp_modules)); - - for (i = 0; i < NUM_PP_MODULES; i++) { - struct pp_module *pp_module = &pp_context->pp_modules[i]; - dri_bo_unreference(pp_module->kernel.bo); - pp_module->kernel.bo = dri_bo_alloc(i965->intel.bufmgr, - pp_module->kernel.name, - pp_module->kernel.size, - 4096); - assert(pp_module->kernel.bo); - dri_bo_subdata(pp_module->kernel.bo, 0, pp_module->kernel.size, pp_module->kernel.bin); - } - } - } + proc_context->base.destroy = i965_proc_context_destroy; + proc_context->base.run = i965_proc_picture; + proc_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER, 0); + proc_context->driver_context = ctx; + i965->codec_info->post_processing_context_init(ctx, &proc_context->pp_context, proc_context->base.batch); - return True; + return (struct hw_context *)proc_context; } + + diff -Nru intel-vaapi-driver-1.0.15/src/i965_post_processing.h intel-vaapi-driver-1.7.1/src/i965_post_processing.h --- intel-vaapi-driver-1.0.15/src/i965_post_processing.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_post_processing.h 2016-06-03 06:05:58.000000000 +0000 @@ -29,24 +29,37 @@ #ifndef __I965_POST_PROCESSING_H__ #define __I965_POST_PROCESSING_H__ -#define MAX_PP_SURFACES 32 +#include "i965_vpp_avs.h" -#define I965_PP_FLAG_DEINTERLACING 1 -#define I965_PP_FLAG_AVS 2 +#define MAX_PP_SURFACES 48 enum { PP_NULL = 0, - PP_NV12_LOAD_SAVE, + PP_NV12_LOAD_SAVE_N12, + PP_NV12_LOAD_SAVE_PL3, + PP_PL3_LOAD_SAVE_N12, + PP_PL3_LOAD_SAVE_PL3, PP_NV12_SCALING, PP_NV12_AVS, PP_NV12_DNDI, + PP_NV12_DN, + PP_NV12_LOAD_SAVE_PA, + PP_PL3_LOAD_SAVE_PA, + PP_PA_LOAD_SAVE_NV12, + PP_PA_LOAD_SAVE_PL3, + PP_PA_LOAD_SAVE_PA, + PP_RGBX_LOAD_SAVE_NV12, + PP_NV12_LOAD_SAVE_RGBX, + NUM_PP_MODULES, }; -#define NUM_PP_MODULES 5 +struct i965_post_processing_context; struct pp_load_save_context { + int dest_x; + int dest_y; int dest_w; int dest_h; }; @@ -57,36 +70,73 @@ int dest_y; /* in pixel */ int dest_w; int dest_h; - int src_normalized_x; - int src_normalized_y; + float src_normalized_x; + float src_normalized_y; }; struct pp_avs_context { + AVSState state; int dest_x; /* in pixel */ int dest_y; /* in pixel */ int dest_w; int dest_h; - int src_normalized_x; - int src_normalized_y; + float src_normalized_x; + float src_normalized_y; int src_w; int src_h; + float horiz_range; }; +enum { + DNDI_FRAME_IN_CURRENT = 0, + DNDI_FRAME_IN_PREVIOUS, + DNDI_FRAME_IN_STMM, + DNDI_FRAME_OUT_STMM, + DNDI_FRAME_OUT_CURRENT, + DNDI_FRAME_OUT_PREVIOUS, + DNDI_FRAME_STORE_COUNT +}; + +typedef struct dndi_frame_store { + struct object_surface *obj_surface; + VASurfaceID surface_id; /* always relative to the input surface */ + unsigned int is_scratch_surface : 1; +} DNDIFrameStore; + struct pp_dndi_context { int dest_w; int dest_h; + DNDIFrameStore frame_store[DNDI_FRAME_STORE_COUNT]; + + /* Temporary flags live until the current picture is processed */ + unsigned int is_di_enabled : 1; + unsigned int is_di_adv_enabled : 1; + unsigned int is_first_frame : 1; + unsigned int is_second_field : 1; +}; + +struct pp_dn_context +{ + int dest_w; + int dest_h; + dri_bo *stmm_bo; }; +struct i965_post_processing_context; + struct pp_module { struct i965_kernel kernel; /* others */ - void (*initialize)(VADriverContextP ctx, - VASurfaceID in_surface_id, VASurfaceID out_surface_id, - const VARectangle *src_rect, const VARectangle *dst_rect); + VAStatus (*initialize)(VADriverContextP ctx, struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + void *filter_param); }; struct pp_static_parameter @@ -99,7 +149,7 @@ unsigned int source_packed_y_offset:8; unsigned int source_packed_u_offset:8; unsigned int source_packed_v_offset:8; - unsigned int pad0:8; + unsigned int source_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout union { /* Load and Save r1.2 */ @@ -112,8 +162,8 @@ /* CSC r1.2 */ struct { - unsigned int destination_rgb_format:8; unsigned int pad0:24; + unsigned int destination_rgb_layout:8; // 1 for |R|G|B|X| layout, 0 for |B|G|R|X| layout } csc; } r1_2; @@ -276,6 +326,9 @@ unsigned int block_count_x:8; /* r5.6 */ + /* we only support M*1 or 1*N block partitation now. + * -- it means asm code only need update this mask from grf6 for the last block + */ unsigned int block_horizontal_mask:16; unsigned int block_vertical_mask:8; unsigned int number_blocks:8; @@ -288,30 +341,155 @@ /* AVS r6.0 */ float video_step_delta; - /* r6.1-r6.7 */ + /* r6.1 */ // sizeof(int) == 4? + unsigned int block_horizontal_mask_right:16; + unsigned int block_vertical_mask_bottom:8; + unsigned int pad1:8; + + /* r6.2 */ + unsigned int block_horizontal_mask_middle:16; + unsigned int pad2:16; + + /* r6.3-r6.7 */ + unsigned int padx[5]; + } grf6; +}; + +struct gen7_pp_static_parameter +{ + struct { + /* r1.0-r1.5 */ + unsigned int padx[6]; + /* r1.6 */ + unsigned int di_statistics_surface_pitch_div2:16; + unsigned int di_statistics_surface_height_div4:16; + /* r1.7 */ + unsigned int di_top_field_first:8; + unsigned int pad0:16; + unsigned int pointer_to_inline_parameter:8; /* value: 7 */ + } grf1; + + struct { + /* r2.0 */ + /* Indicates whether the rgb is swapped for the src surface + * 0: RGBX(MSB. X-B-G-R). 1: BGRX(MSB: X-R-G-B) + */ + unsigned int src_avs_rgb_swap:1; + unsigned int pad3:31; + + /* r2.1 */ + unsigned int pad2:16; + unsigned int save_avs_rgb_swap:1; /* 0: RGB, 1: BGR */ + unsigned int avs_wa_enable:1; /* must enabled for GEN7 */ + unsigned int ief_enable:1; + unsigned int avs_wa_width:13; + + /* 2.2 */ + float avs_wa_one_div_256_width; + + /* 2.3 */ + float avs_wa_five_div_256_width; + + /* 2.4 - 2.6 */ + unsigned int padx[3]; + + /* r2.7 */ + unsigned int di_destination_packed_y_component_offset:8; + unsigned int di_destination_packed_u_component_offset:8; + unsigned int di_destination_packed_v_component_offset:8; + unsigned int alpha:8; + } grf2; + + struct { + float sampler_load_horizontal_scaling_step_ratio; + unsigned int padx[7]; + } grf3; + + struct { + float sampler_load_vertical_scaling_step; + unsigned int pad0; + unsigned int di_hoffset_svf_from_dvf:16; + unsigned int di_voffset_svf_from_dvf:16; + unsigned int padx[5]; + } grf4; + + struct { + float sampler_load_vertical_frame_origin; + unsigned int padx[7]; + } grf5; + + struct { + float sampler_load_horizontal_frame_origin; unsigned int padx[7]; } grf6; + + struct { + /* r7.0 -> r7.3 */ + float coef_ry; + float coef_ru; + float coef_rv; + float coef_yd; + + /* r7.4 -> r7.7 */ + float coef_gy; + float coef_gu; + float coef_gv; + float coef_ud; + } grf7; + + struct { + /* r8.0 -> r8.3 */ + float coef_by; + float coef_bu; + float coef_bv; + float coef_vd; + + /* r8.4 -> r8.7 */ + unsigned int padx[4]; + } grf8; +}; + +struct gen7_pp_inline_parameter +{ + struct { + /* r9.0 */ + unsigned int destination_block_horizontal_origin:16; + unsigned int destination_block_vertical_origin:16; + /* r9.1: 0xffffffff */ + unsigned int constant_0; + /* r9.2 */ + unsigned int pad0; + /* r9.3 */ + unsigned int pad1; + /* r9.4 */ + float sampler_load_main_video_x_scaling_step; + /* r9.5 */ + unsigned int pad2; + /* r9.6: must be zero */ + unsigned int avs_vertical_block_number; + /* r9.7: 0 */ + unsigned int group_id_number; + } grf9; + + struct { + unsigned int padx[8]; + } grf10; }; struct i965_post_processing_context { int current_pp; struct pp_module pp_modules[NUM_PP_MODULES]; - struct pp_static_parameter pp_static_parameter; - struct pp_inline_parameter pp_inline_parameter; + void *pp_static_parameter; + void *pp_inline_parameter; struct { dri_bo *bo; - } curbe; - - struct { - dri_bo *ss_bo; - dri_bo *s_bo; - } surfaces[MAX_PP_SURFACES]; + } surface_state_binding_table; struct { dri_bo *bo; - } binding_table; + } curbe; struct { dri_bo *bo; @@ -342,34 +520,123 @@ } urb; struct { - dri_bo *bo; - } stmm; - - union { - struct pp_load_save_context pp_load_save_context; - struct pp_scaling_context pp_scaling_context; - struct pp_avs_context pp_avs_context; - struct pp_dndi_context pp_dndi_context; - } private_context; + unsigned int gpgpu_mode : 1; + unsigned int pad0 : 7; + unsigned int max_num_threads : 16; + unsigned int num_urb_entries : 8; + unsigned int urb_entry_size : 16; + unsigned int curbe_allocation_size : 16; + } vfe_gpu_state; + + struct intel_vebox_context *vebox_proc_ctx; + + struct pp_load_save_context pp_load_save_context; + struct pp_scaling_context pp_scaling_context; + struct pp_avs_context pp_avs_context; + struct pp_dndi_context pp_dndi_context; + struct pp_dn_context pp_dn_context; + void *private_context; /* pointer to the current private context */ + void *pipeline_param; /* pointer to the pipeline parameter */ + /** + * \ref Extra filter flags used as a fast path. + * + * This corresponds to vaPutSurface() flags, for direct rendering, + * or to VAProcPipelineParameterBuffer.filter_flags when the VPP + * interfaces are used. In the latter case, this is just a copy of + * that field. + */ + unsigned int filter_flags; int (*pp_x_steps)(void *private_context); int (*pp_y_steps)(void *private_context); int (*pp_set_block_parameter)(struct i965_post_processing_context *pp_context, int x, int y); + + struct intel_batchbuffer *batch; + + unsigned int block_horizontal_mask_left:16; + unsigned int block_horizontal_mask_right:16; + unsigned int block_vertical_mask_bottom:8; + + struct { + dri_bo *bo; + int bo_size; + unsigned int end_offset; + } instruction_state; + + struct { + dri_bo *bo; + } indirect_state; + + struct { + dri_bo *bo; + int bo_size; + unsigned int end_offset; + } dynamic_state; + + unsigned int sampler_offset; + int sampler_size; + unsigned int idrt_offset; + int idrt_size; + unsigned int curbe_offset; + int curbe_size; + + VAStatus (*intel_post_processing)(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect, + int pp_index, + void * filter_param); + void (*finalize)(VADriverContextP ctx, + struct i965_post_processing_context *pp_context); +}; + +struct i965_proc_context +{ + struct hw_context base; + void *driver_context; + struct i965_post_processing_context pp_context; }; VASurfaceID i965_post_processing( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect, - unsigned int flags, - int *has_done_scaling + unsigned int va_flags, + int *has_done_scaling, + VARectangle *calibrated_rect ); -Bool +VAStatus +i965_scaling_processing( + VADriverContextP ctx, + struct object_surface *src_surface_obj, + const VARectangle *src_rect, + struct object_surface *dst_surface_obj, + const VARectangle *dst_rect, + unsigned int va_flags +); + +VAStatus +i965_image_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect); + +void i965_post_processing_terminate(VADriverContextP ctx); -Bool +bool i965_post_processing_init(VADriverContextP ctx); + +extern VAStatus +i965_proc_picture(VADriverContextP ctx, + VAProfile profile, + union codec_state *codec_state, + struct hw_context *hw_context); + #endif /* __I965_POST_PROCESSING_H__ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_render.c intel-vaapi-driver-1.7.1/src/i965_render.c --- intel-vaapi-driver-1.0.15/src/i965_render.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_render.c 2016-06-03 06:05:58.000000000 +0000 @@ -35,15 +35,16 @@ #include #include #include +#include -#include -#include +#include #include "intel_batchbuffer.h" #include "intel_driver.h" #include "i965_defines.h" #include "i965_drv_video.h" #include "i965_structs.h" +#include "i965_yuv_coefs.h" #include "i965_render.h" @@ -55,7 +56,7 @@ #include "shaders/render/exa_sf.g4b" }; -#define PS_KERNEL_NUM_GRF 32 +#define PS_KERNEL_NUM_GRF 48 #define PS_MAX_THREADS 32 #define I965_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) @@ -65,6 +66,7 @@ #include "shaders/render/exa_wm_xy.g4b" #include "shaders/render/exa_wm_src_affine.g4b" #include "shaders/render/exa_wm_src_sample_planar.g4b" +#include "shaders/render/exa_wm_yuv_color_balance.g4b" #include "shaders/render/exa_wm_yuv_rgb.g4b" #include "shaders/render/exa_wm_write.g4b" }; @@ -87,6 +89,7 @@ #include "shaders/render/exa_wm_xy.g4b.gen5" #include "shaders/render/exa_wm_src_affine.g4b.gen5" #include "shaders/render/exa_wm_src_sample_planar.g4b.gen5" +#include "shaders/render/exa_wm_yuv_color_balance.g4b.gen5" #include "shaders/render/exa_wm_yuv_rgb.g4b.gen5" #include "shaders/render/exa_wm_write.g4b.gen5" }; @@ -106,6 +109,7 @@ static const uint32_t ps_kernel_static_gen6[][4] = { #include "shaders/render/exa_wm_src_affine.g6b" #include "shaders/render/exa_wm_src_sample_planar.g6b" +#include "shaders/render/exa_wm_yuv_color_balance.g6b" #include "shaders/render/exa_wm_yuv_rgb.g6b" #include "shaders/render/exa_wm_write.g6b" }; @@ -124,6 +128,7 @@ static const uint32_t ps_kernel_static_gen7[][4] = { #include "shaders/render/exa_wm_src_affine.g7b" #include "shaders/render/exa_wm_src_sample_planar.g7b" +#include "shaders/render/exa_wm_yuv_color_balance.g7b" #include "shaders/render/exa_wm_yuv_rgb.g7b" #include "shaders/render/exa_wm_write.g7b" }; @@ -134,9 +139,18 @@ #include "shaders/render/exa_wm_write.g7b" }; -#define SURFACE_STATE_PADDED_SIZE_I965 ALIGN(sizeof(struct i965_surface_state), 32) -#define SURFACE_STATE_PADDED_SIZE_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32) -#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_I965, SURFACE_STATE_PADDED_SIZE_GEN7) +/* Programs for Haswell */ +static const uint32_t ps_kernel_static_gen7_haswell[][4] = { +#include "shaders/render/exa_wm_src_affine.g7b" +#include "shaders/render/exa_wm_src_sample_planar.g7b.haswell" +#include "shaders/render/exa_wm_yuv_color_balance.g7b.haswell" +#include "shaders/render/exa_wm_yuv_rgb.g7b" +#include "shaders/render/exa_wm_write.g7b" +}; + + +#define SURFACE_STATE_PADDED_SIZE MAX(SURFACE_STATE_PADDED_SIZE_GEN6, SURFACE_STATE_PADDED_SIZE_GEN7) + #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) #define BINDING_TABLE_OFFSET SURFACE_STATE_OFFSET(MAX_RENDER_SURFACES) @@ -258,6 +272,31 @@ } }; +static struct i965_kernel render_kernels_gen7_haswell[] = { + { + "SF", + SF_KERNEL, + sf_kernel_static_gen7, + sizeof(sf_kernel_static_gen7), + NULL + }, + { + "PS", + PS_KERNEL, + ps_kernel_static_gen7_haswell, + sizeof(ps_kernel_static_gen7_haswell), + NULL + }, + + { + "PS_SUBPIC", + PS_SUBPIC_KERNEL, + ps_subpic_kernel_static_gen7, + sizeof(ps_subpic_kernel_static_gen7), + NULL + } +}; + #define URB_VS_ENTRIES 8 #define URB_VS_ENTRY_SIZE 1 @@ -270,8 +309,8 @@ #define URB_SF_ENTRIES 1 #define URB_SF_ENTRY_SIZE 2 -#define URB_CS_ENTRIES 1 -#define URB_CS_ENTRY_SIZE 1 +#define URB_CS_ENTRIES 4 +#define URB_CS_ENTRY_SIZE 4 static void i965_render_vs_unit(VADriverContextP ctx) @@ -285,7 +324,7 @@ vs_state = render_state->vs.state->virtual; memset(vs_state, 0, sizeof(*vs_state)); - if (IS_IRONLAKE(i965->intel.device_id)) + if (IS_IRONLAKE(i965->intel.device_info)) vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; else vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES; @@ -399,7 +438,7 @@ wm_state->thread1.single_program_flow = 1; /* XXX */ - if (IS_IRONLAKE(i965->intel.device_id)) + if (IS_IRONLAKE(i965->intel.device_info)) wm_state->thread1.binding_table_entry_count = 0; /* hardware requirement */ else wm_state->thread1.binding_table_entry_count = 7; @@ -407,8 +446,8 @@ wm_state->thread2.scratch_space_base_pointer = 0; wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */ - wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */ - wm_state->thread3.const_urb_entry_read_length = 0; + wm_state->thread3.dispatch_grf_start_reg = 2; /* XXX */ + wm_state->thread3.const_urb_entry_read_length = 4; wm_state->thread3.const_urb_entry_read_offset = 0; wm_state->thread3.urb_entry_read_length = 1; /* XXX */ wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ @@ -416,14 +455,13 @@ wm_state->wm4.stats_enable = 0; wm_state->wm4.sampler_state_pointer = render_state->wm.sampler->offset >> 5; - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { wm_state->wm4.sampler_count = 0; /* hardware requirement */ - wm_state->wm5.max_threads = 12 * 6 - 1; } else { wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4; - wm_state->wm5.max_threads = 10 * 5 - 1; } + wm_state->wm5.max_threads = i965->intel.device_info->max_wm_threads - 1; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; wm_state->wm5.enable_8_pix = 0; @@ -464,7 +502,7 @@ wm_state->thread1.single_program_flow = 1; /* XXX */ - if (IS_IRONLAKE(i965->intel.device_id)) + if (IS_IRONLAKE(i965->intel.device_info)) wm_state->thread1.binding_table_entry_count = 0; /* hardware requirement */ else wm_state->thread1.binding_table_entry_count = 7; @@ -473,7 +511,7 @@ wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */ wm_state->thread3.dispatch_grf_start_reg = 2; /* XXX */ - wm_state->thread3.const_urb_entry_read_length = 1; + wm_state->thread3.const_urb_entry_read_length = 4; wm_state->thread3.const_urb_entry_read_offset = 0; wm_state->thread3.urb_entry_read_length = 1; /* XXX */ wm_state->thread3.urb_entry_read_offset = 0; /* XXX */ @@ -481,14 +519,13 @@ wm_state->wm4.stats_enable = 0; wm_state->wm4.sampler_state_pointer = render_state->wm.sampler->offset >> 5; - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { wm_state->wm4.sampler_count = 0; /* hardware requirement */ - wm_state->wm5.max_threads = 12 * 6 - 1; } else { wm_state->wm4.sampler_count = (render_state->wm.sampler_count + 3) / 4; - wm_state->wm5.max_threads = 10 * 5 - 1; } + wm_state->wm5.max_threads = i965->intel.device_info->max_wm_threads - 1; wm_state->wm5.thread_dispatch_enable = 1; wm_state->wm5.enable_16_pix = 1; wm_state->wm5.enable_8_pix = 0; @@ -638,15 +675,32 @@ } static void -i965_render_set_surface_state(struct i965_surface_state *ss, - dri_bo *bo, unsigned long offset, - int width, int height, - int pitch, int format) +i965_render_set_surface_state( + struct i965_surface_state *ss, + dri_bo *bo, + unsigned long offset, + unsigned int width, + unsigned int height, + unsigned int pitch, + unsigned int format, + unsigned int flags +) { unsigned int tiling; unsigned int swizzle; memset(ss, 0, sizeof(*ss)); + + switch (flags & (VA_TOP_FIELD|VA_BOTTOM_FIELD)) { + case VA_BOTTOM_FIELD: + ss->ss0.vert_line_stride_ofs = 1; + /* fall-through */ + case VA_TOP_FIELD: + ss->ss0.vert_line_stride = 1; + height /= 2; + break; + } + ss->ss0.surface_type = I965_SURFACE_2D; ss->ss0.surface_format = format; ss->ss0.color_blend = 1; @@ -681,17 +735,43 @@ } } +/* Set "Shader Channel Select" */ +void +gen7_render_set_surface_scs(struct gen7_surface_state *ss) +{ + ss->ss7.shader_chanel_select_r = HSW_SCS_RED; + ss->ss7.shader_chanel_select_g = HSW_SCS_GREEN; + ss->ss7.shader_chanel_select_b = HSW_SCS_BLUE; + ss->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; +} + static void -gen7_render_set_surface_state(struct gen7_surface_state *ss, - dri_bo *bo, unsigned long offset, - int width, int height, - int pitch, int format) +gen7_render_set_surface_state( + struct gen7_surface_state *ss, + dri_bo *bo, + unsigned long offset, + int width, + int height, + int pitch, + int format, + unsigned int flags +) { unsigned int tiling; unsigned int swizzle; memset(ss, 0, sizeof(*ss)); + switch (flags & (VA_TOP_FIELD|VA_BOTTOM_FIELD)) { + case VA_BOTTOM_FIELD: + ss->ss0.vert_line_stride_ofs = 1; + /* fall-through */ + case VA_TOP_FIELD: + ss->ss0.vert_line_stride = 1; + height /= 2; + break; + } + ss->ss0.surface_type = I965_SURFACE_2D; ss->ss0.surface_format = format; @@ -706,13 +786,19 @@ gen7_render_set_surface_tiling(ss, tiling); } + static void -i965_render_src_surface_state(VADriverContextP ctx, - int index, - dri_bo *region, - unsigned long offset, - int w, int h, - int pitch, int format) +i965_render_src_surface_state( + VADriverContextP ctx, + int index, + dri_bo *region, + unsigned long offset, + int w, + int h, + int pitch, + int format, + unsigned int flags +) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_render_state *render_state = &i965->render_state; @@ -725,11 +811,13 @@ assert(ss_bo->virtual); ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); - if (IS_GEN7(i965->intel.device_id)) { + if (IS_GEN7(i965->intel.device_info)) { gen7_render_set_surface_state(ss, region, offset, w, h, - pitch, format); + pitch, format, flags); + if (IS_HASWELL(i965->intel.device_info)) + gen7_render_set_surface_scs(ss); dri_bo_emit_reloc(ss_bo, I915_GEM_DOMAIN_SAMPLER, 0, offset, @@ -739,7 +827,7 @@ i965_render_set_surface_state(ss, region, offset, w, h, - pitch, format); + pitch, format, flags); dri_bo_emit_reloc(ss_bo, I915_GEM_DOMAIN_SAMPLER, 0, offset, @@ -753,69 +841,71 @@ } static void -i965_render_src_surfaces_state(VADriverContextP ctx, - VASurfaceID surface) +i965_render_src_surfaces_state( + VADriverContextP ctx, + struct object_surface *obj_surface, + unsigned int flags +) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct object_surface *obj_surface; - int w, h; + int region_pitch; int rw, rh; dri_bo *region; - obj_surface = SURFACE(surface); - assert(obj_surface); - - w = obj_surface->width; - h = obj_surface->height; + region_pitch = obj_surface->width; rw = obj_surface->orig_width; rh = obj_surface->orig_height; region = obj_surface->bo; - i965_render_src_surface_state(ctx, 1, region, 0, rw, rh, w, I965_SURFACEFORMAT_R8_UNORM); /* Y */ - i965_render_src_surface_state(ctx, 2, region, 0, rw, rh, w, I965_SURFACEFORMAT_R8_UNORM); + i965_render_src_surface_state(ctx, 1, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags); /* Y */ + i965_render_src_surface_state(ctx, 2, region, 0, rw, rh, region_pitch, I965_SURFACEFORMAT_R8_UNORM, flags); - if (obj_surface->fourcc == VA_FOURCC('Y','V','1','2')) { - int u3 = 5, u4 = 6, v5 = 3, v6 = 4; + if (obj_surface->fourcc == VA_FOURCC_Y800) /* single plane for grayscale */ + return; - i965_render_src_surface_state(ctx, u3, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* U */ - i965_render_src_surface_state(ctx, u4, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); - i965_render_src_surface_state(ctx, v5, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* V */ - i965_render_src_surface_state(ctx, v6, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); + if (obj_surface->fourcc == VA_FOURCC_NV12) { + i965_render_src_surface_state(ctx, 3, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8G8_UNORM, flags); /* UV */ + i965_render_src_surface_state(ctx, 4, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8G8_UNORM, flags); } else { - if (obj_surface->fourcc == VA_FOURCC('N','V','1','2')) { - i965_render_src_surface_state(ctx, 3, region, w * h, rw / 2, rh / 2, w, I965_SURFACEFORMAT_R8G8_UNORM); /* UV */ - i965_render_src_surface_state(ctx, 4, region, w * h, rw / 2, rh / 2, w, I965_SURFACEFORMAT_R8G8_UNORM); - } else { - int u3 = 3, u4 = 4, v5 = 5, v6 = 6; - - i965_render_src_surface_state(ctx, u3, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* U */ - i965_render_src_surface_state(ctx, u4, region, w * h, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); - i965_render_src_surface_state(ctx, v5, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); /* V */ - i965_render_src_surface_state(ctx, v6, region, w * h + w * h / 4, rw / 2, rh / 2, w / 2, I965_SURFACEFORMAT_R8_UNORM); - } + i965_render_src_surface_state(ctx, 3, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); /* U */ + i965_render_src_surface_state(ctx, 4, region, + region_pitch * obj_surface->y_cb_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); + i965_render_src_surface_state(ctx, 5, region, + region_pitch * obj_surface->y_cr_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); /* V */ + i965_render_src_surface_state(ctx, 6, region, + region_pitch * obj_surface->y_cr_offset, + obj_surface->cb_cr_width, obj_surface->cb_cr_height, obj_surface->cb_cr_pitch, + I965_SURFACEFORMAT_R8_UNORM, flags); } } static void i965_subpic_render_src_surfaces_state(VADriverContextP ctx, - VASurfaceID surface) + struct object_surface *obj_surface) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct object_surface *obj_surface = SURFACE(surface); - int w, h; - dri_bo *region; dri_bo *subpic_region; - struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); - struct object_image *obj_image = IMAGE(obj_subpic->image); + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + struct object_image *obj_image = obj_subpic->obj_image; + assert(obj_surface); assert(obj_surface->bo); - w = obj_surface->width; - h = obj_surface->height; - region = obj_surface->bo; subpic_region = obj_image->bo; /*subpicture surface*/ - i965_render_src_surface_state(ctx, 1, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format); - i965_render_src_surface_state(ctx, 2, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format); + i965_render_src_surface_state(ctx, 1, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format, 0); + i965_render_src_surface_state(ctx, 2, subpic_region, 0, obj_subpic->width, obj_subpic->height, obj_subpic->pitch, obj_subpic->format, 0); } static void @@ -839,11 +929,13 @@ assert(ss_bo->virtual); ss = (char *)ss_bo->virtual + SURFACE_STATE_OFFSET(index); - if (IS_GEN7(i965->intel.device_id)) { + if (IS_GEN7(i965->intel.device_info)) { gen7_render_set_surface_state(ss, dest_region->bo, 0, dest_region->width, dest_region->height, - dest_region->pitch, format); + dest_region->pitch, format, 0); + if (IS_HASWELL(i965->intel.device_info)) + gen7_render_set_surface_scs(ss); dri_bo_emit_reloc(ss_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0, @@ -853,7 +945,7 @@ i965_render_set_surface_state(ss, dest_region->bo, 0, dest_region->width, dest_region->height, - dest_region->pitch, format); + dest_region->pitch, format, 0); dri_bo_emit_reloc(ss_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0, @@ -865,18 +957,55 @@ dri_bo_unmap(ss_bo); } +static void +i965_fill_vertex_buffer( + VADriverContextP ctx, + float tex_coords[4], /* [(u1,v1);(u2,v2)] */ + float vid_coords[4] /* [(x1,y1);(x2,y2)] */ +) +{ + struct i965_driver_data * const i965 = i965_driver_data(ctx); + float vb[12]; + + enum { X1, Y1, X2, Y2 }; + + static const unsigned int g_rotation_indices[][6] = { + [VA_ROTATION_NONE] = { X2, Y2, X1, Y2, X1, Y1 }, + [VA_ROTATION_90] = { X2, Y1, X2, Y2, X1, Y2 }, + [VA_ROTATION_180] = { X1, Y1, X2, Y1, X2, Y2 }, + [VA_ROTATION_270] = { X1, Y2, X1, Y1, X2, Y1 }, + }; + + const unsigned int * const rotation_indices = + g_rotation_indices[i965->rotation_attrib->value]; + + vb[0] = tex_coords[rotation_indices[0]]; /* bottom-right corner */ + vb[1] = tex_coords[rotation_indices[1]]; + vb[2] = vid_coords[X2]; + vb[3] = vid_coords[Y2]; + + vb[4] = tex_coords[rotation_indices[2]]; /* bottom-left corner */ + vb[5] = tex_coords[rotation_indices[3]]; + vb[6] = vid_coords[X1]; + vb[7] = vid_coords[Y2]; + + vb[8] = tex_coords[rotation_indices[4]]; /* top-left corner */ + vb[9] = tex_coords[rotation_indices[5]]; + vb[10] = vid_coords[X1]; + vb[11] = vid_coords[Y1]; + + dri_bo_subdata(i965->render_state.vb.vertex_buffer, 0, sizeof(vb), vb); +} + static void i965_subpic_render_upload_vertex(VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *output_rect) { - struct i965_driver_data *i965 = i965_driver_data(ctx); - struct i965_render_state *render_state = &i965->render_state; - struct object_surface *obj_surface = SURFACE(surface); - struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + float tex_coords[4], vid_coords[4]; VARectangle dst_rect; - float *vb, tx1, tx2, ty1, ty2, x1, x2, y1, y2; - int i = 0; if (obj_subpic->flags & VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD) dst_rect = obj_subpic->dst_rect; @@ -889,41 +1018,23 @@ dst_rect.height = sy * obj_subpic->dst_rect.height; } - dri_bo_map(render_state->vb.vertex_buffer, 1); - assert(render_state->vb.vertex_buffer->virtual); - vb = render_state->vb.vertex_buffer->virtual; - - tx1 = (float)obj_subpic->src_rect.x / obj_subpic->width; - ty1 = (float)obj_subpic->src_rect.y / obj_subpic->height; - tx2 = (float)(obj_subpic->src_rect.x + obj_subpic->src_rect.width) / obj_subpic->width; - ty2 = (float)(obj_subpic->src_rect.y + obj_subpic->src_rect.height) / obj_subpic->height; - - x1 = (float)dst_rect.x; - y1 = (float)dst_rect.y; - x2 = (float)(dst_rect.x + dst_rect.width); - y2 = (float)(dst_rect.y + dst_rect.height); - - vb[i++] = tx2; - vb[i++] = ty2; - vb[i++] = x2; - vb[i++] = y2; - - vb[i++] = tx1; - vb[i++] = ty2; - vb[i++] = x1; - vb[i++] = y2; - - vb[i++] = tx1; - vb[i++] = ty1; - vb[i++] = x1; - vb[i++] = y1; - dri_bo_unmap(render_state->vb.vertex_buffer); + tex_coords[0] = (float)obj_subpic->src_rect.x / obj_subpic->width; + tex_coords[1] = (float)obj_subpic->src_rect.y / obj_subpic->height; + tex_coords[2] = (float)(obj_subpic->src_rect.x + obj_subpic->src_rect.width) / obj_subpic->width; + tex_coords[3] = (float)(obj_subpic->src_rect.y + obj_subpic->src_rect.height) / obj_subpic->height; + + vid_coords[0] = dst_rect.x; + vid_coords[1] = dst_rect.y; + vid_coords[2] = (float)(dst_rect.x + dst_rect.width); + vid_coords[3] = (float)(dst_rect.y + dst_rect.height); + + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); } static void i965_render_upload_vertex( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) @@ -931,95 +1042,130 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_render_state *render_state = &i965->render_state; struct intel_region *dest_region = render_state->draw_region; - struct object_surface *obj_surface; - float *vb; + float tex_coords[4], vid_coords[4]; + int width, height; - float u1, v1, u2, v2; - int i, width, height; - int box_x1 = dest_region->x + dst_rect->x; - int box_y1 = dest_region->y + dst_rect->y; - int box_x2 = box_x1 + dst_rect->width; - int box_y2 = box_y1 + dst_rect->height; - - obj_surface = SURFACE(surface); - assert(surface); - width = obj_surface->orig_width; + width = obj_surface->orig_width; height = obj_surface->orig_height; - u1 = (float)src_rect->x / width; - v1 = (float)src_rect->y / height; - u2 = (float)(src_rect->x + src_rect->width) / width; - v2 = (float)(src_rect->y + src_rect->height) / height; - - dri_bo_map(render_state->vb.vertex_buffer, 1); - assert(render_state->vb.vertex_buffer->virtual); - vb = render_state->vb.vertex_buffer->virtual; - - i = 0; - vb[i++] = u2; - vb[i++] = v2; - vb[i++] = (float)box_x2; - vb[i++] = (float)box_y2; - - vb[i++] = u1; - vb[i++] = v2; - vb[i++] = (float)box_x1; - vb[i++] = (float)box_y2; + tex_coords[0] = (float)src_rect->x / width; + tex_coords[1] = (float)src_rect->y / height; + tex_coords[2] = (float)(src_rect->x + src_rect->width) / width; + tex_coords[3] = (float)(src_rect->y + src_rect->height) / height; - vb[i++] = u1; - vb[i++] = v1; - vb[i++] = (float)box_x1; - vb[i++] = (float)box_y1; + vid_coords[0] = dest_region->x + dst_rect->x; + vid_coords[1] = dest_region->y + dst_rect->y; + vid_coords[2] = vid_coords[0] + dst_rect->width; + vid_coords[3] = vid_coords[1] + dst_rect->height; - dri_bo_unmap(render_state->vb.vertex_buffer); + i965_fill_vertex_buffer(ctx, tex_coords, vid_coords); } +#define PI 3.1415926 + static void -i965_render_upload_constants(VADriverContextP ctx) +i965_render_upload_constants(VADriverContextP ctx, + struct object_surface *obj_surface, + unsigned int flags) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_render_state *render_state = &i965->render_state; unsigned short *constant_buffer; - - if (render_state->curbe.upload) - return; + float *color_balance_base; + float contrast = (float)i965->contrast_attrib->value / DEFAULT_CONTRAST; + float brightness = (float)i965->brightness_attrib->value / 255; /* YUV is float in the shader */ + float hue = (float)i965->hue_attrib->value / 180 * PI; + float saturation = (float)i965->saturation_attrib->value / DEFAULT_SATURATION; + float *yuv_to_rgb; + const float* yuv_coefs; + size_t coefs_length; dri_bo_map(render_state->curbe.bo, 1); assert(render_state->curbe.bo->virtual); constant_buffer = render_state->curbe.bo->virtual; - if (render_state->interleaved_uv) - *constant_buffer = 1; + if (obj_surface->subsampling == SUBSAMPLE_YUV400) { + assert(obj_surface->fourcc == VA_FOURCC_Y800); + + constant_buffer[0] = 2; + } else { + if (obj_surface->fourcc == VA_FOURCC_NV12) + constant_buffer[0] = 1; + else + constant_buffer[0] = 0; + } + + if (i965->contrast_attrib->value == DEFAULT_CONTRAST && + i965->brightness_attrib->value == DEFAULT_BRIGHTNESS && + i965->hue_attrib->value == DEFAULT_HUE && + i965->saturation_attrib->value == DEFAULT_SATURATION) + constant_buffer[1] = 1; /* skip color balance transformation */ else - *constant_buffer = 0; + constant_buffer[1] = 0; + + color_balance_base = (float *)constant_buffer + 4; + *color_balance_base++ = contrast; + *color_balance_base++ = brightness; + *color_balance_base++ = cos(hue) * contrast * saturation; + *color_balance_base++ = sin(hue) * contrast * saturation; + + yuv_to_rgb = (float *)constant_buffer + 8; + yuv_coefs = i915_color_standard_to_coefs(i915_filter_to_color_standard(flags & VA_SRC_COLOR_MASK), + &coefs_length); + memcpy(yuv_to_rgb, yuv_coefs, coefs_length); dri_bo_unmap(render_state->curbe.bo); - render_state->curbe.upload = 1; } static void +i965_subpic_render_upload_constants(VADriverContextP ctx, + struct object_surface *obj_surface) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + float *constant_buffer; + float global_alpha = 1.0; + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; + + if (obj_subpic->flags & VA_SUBPICTURE_GLOBAL_ALPHA) { + global_alpha = obj_subpic->global_alpha; + } + + dri_bo_map(render_state->curbe.bo, 1); + + assert(render_state->curbe.bo->virtual); + constant_buffer = render_state->curbe.bo->virtual; + *constant_buffer = global_alpha; + + dri_bo_unmap(render_state->curbe.bo); +} + +static void i965_surface_render_state_setup( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, - const VARectangle *dst_rect + const VARectangle *dst_rect, + unsigned int flags ) { i965_render_vs_unit(ctx); i965_render_sf_unit(ctx); i965_render_dest_surface_state(ctx, 0); - i965_render_src_surfaces_state(ctx, surface); + i965_render_src_surfaces_state(ctx, obj_surface, flags); i965_render_sampler(ctx); i965_render_wm_unit(ctx); i965_render_cc_viewport(ctx); i965_render_cc_unit(ctx); - i965_render_upload_vertex(ctx, surface, src_rect, dst_rect); - i965_render_upload_constants(ctx); + i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect); + i965_render_upload_constants(ctx, obj_surface, flags); } + static void i965_subpic_render_state_setup( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) @@ -1027,12 +1173,13 @@ i965_render_vs_unit(ctx); i965_render_sf_unit(ctx); i965_render_dest_surface_state(ctx, 0); - i965_subpic_render_src_surfaces_state(ctx, surface); + i965_subpic_render_src_surfaces_state(ctx, obj_surface); i965_render_sampler(ctx); i965_subpic_render_wm_unit(ctx); i965_render_cc_viewport(ctx); i965_subpic_render_cc_unit(ctx); - i965_subpic_render_upload_vertex(ctx, surface, dst_rect); + i965_subpic_render_upload_constants(ctx, obj_surface); + i965_subpic_render_upload_vertex(ctx, obj_surface, dst_rect); } @@ -1066,7 +1213,7 @@ struct intel_batchbuffer *batch = i965->batch; struct i965_render_state *render_state = &i965->render_state; - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { BEGIN_BATCH(batch, 8); OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6); OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY); @@ -1230,7 +1377,7 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; - if (IS_IRONLAKE(i965->intel.device_id)) { + if (IS_IRONLAKE(i965->intel.device_info)) { BEGIN_BATCH(batch, 5); OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | 3); /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ @@ -1282,7 +1429,7 @@ static void i965_render_upload_image_palette( VADriverContextP ctx, - VAImageID image_id, + struct object_image *obj_image, unsigned int alpha ) { @@ -1290,9 +1437,11 @@ struct intel_batchbuffer *batch = i965->batch; unsigned int i; - struct object_image *obj_image = IMAGE(image_id); assert(obj_image); + if (!obj_image) + return; + if (obj_image->image.num_palette_entries == 0) return; @@ -1320,7 +1469,7 @@ ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 0); - if (IS_IRONLAKE(i965->intel.device_id)) + if (IS_IRONLAKE(i965->intel.device_info)) OUT_RELOC(batch, render_state->vb.vertex_buffer, I915_GEM_DOMAIN_VERTEX, 0, 12 * 4); else OUT_BATCH(batch, 3); @@ -1370,8 +1519,8 @@ br13 |= pitch; - if (IS_GEN6(i965->intel.device_id) || - IS_GEN7(i965->intel.device_id)) { + if (IS_GEN6(i965->intel.device_info) || + IS_GEN7(i965->intel.device_info)) { intel_batchbuffer_start_atomic_blt(batch, 24); BEGIN_BLT_BATCH(batch, 6); } else { @@ -1432,6 +1581,7 @@ i965_render_pipelined_pointers(ctx); i965_render_urb_layout(ctx); i965_render_cs_urb_layout(ctx); + i965_render_constant_buffer(ctx); i965_render_drawing_rectangle(ctx); i965_render_vertex_elements(ctx); i965_render_startup(ctx); @@ -1522,7 +1672,7 @@ static void i965_render_put_surface( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect, unsigned int flags @@ -1532,7 +1682,7 @@ struct intel_batchbuffer *batch = i965->batch; i965_render_initialize(ctx); - i965_surface_render_state_setup(ctx, surface, src_rect, dst_rect); + i965_surface_render_state_setup(ctx, obj_surface, src_rect, dst_rect, flags); i965_surface_render_pipeline_setup(ctx); intel_batchbuffer_flush(batch); } @@ -1540,22 +1690,22 @@ static void i965_render_put_subpicture( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; - struct object_surface *obj_surface = SURFACE(surface); - struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; assert(obj_subpic); i965_render_initialize(ctx); - i965_subpic_render_state_setup(ctx, surface, src_rect, dst_rect); + i965_subpic_render_state_setup(ctx, obj_surface, src_rect, dst_rect); i965_subpic_render_pipeline_setup(ctx); - i965_render_upload_image_palette(ctx, obj_subpic->image, 0xff); + i965_render_upload_image_palette(ctx, obj_subpic->obj_image, 0xff); intel_batchbuffer_flush(batch); } @@ -1684,20 +1834,21 @@ static void gen6_render_setup_states( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, - const VARectangle *dst_rect + const VARectangle *dst_rect, + unsigned int flags ) { i965_render_dest_surface_state(ctx, 0); - i965_render_src_surfaces_state(ctx, surface); + i965_render_src_surfaces_state(ctx, obj_surface, flags); i965_render_sampler(ctx); i965_render_cc_viewport(ctx); gen6_render_color_calc_state(ctx); gen6_render_blend_state(ctx); gen6_render_depth_stencil_state(ctx); - i965_render_upload_constants(ctx); - i965_render_upload_vertex(ctx, surface, src_rect, dst_rect); + i965_render_upload_constants(ctx, obj_surface, flags); + i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect); } static void @@ -1935,7 +2086,7 @@ OUT_RELOC(batch, render_state->curbe.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, - 0); + (URB_CS_ENTRY_SIZE-1)); OUT_BATCH(batch, 0); OUT_BATCH(batch, 0); OUT_BATCH(batch, 0); @@ -1948,7 +2099,7 @@ (5 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT)); OUT_BATCH(batch, 0); OUT_BATCH(batch, (6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT)); /* DW4 */ - OUT_BATCH(batch, ((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) | + OUT_BATCH(batch, ((i965->intel.device_info->max_wm_threads - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) | GEN6_3DSTATE_WM_DISPATCH_ENABLE | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH(batch, (1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT) | @@ -2046,7 +2197,7 @@ static void gen6_render_put_surface( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect, unsigned int flags @@ -2056,7 +2207,7 @@ struct intel_batchbuffer *batch = i965->batch; gen6_render_initialize(ctx); - gen6_render_setup_states(ctx, surface, src_rect, dst_rect); + gen6_render_setup_states(ctx, obj_surface, src_rect, dst_rect, flags); i965_clear_dest_region(ctx); gen6_render_emit_states(ctx, PS_KERNEL); intel_batchbuffer_flush(batch); @@ -2087,39 +2238,40 @@ static void gen6_subpicture_render_setup_states( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) { i965_render_dest_surface_state(ctx, 0); - i965_subpic_render_src_surfaces_state(ctx, surface); + i965_subpic_render_src_surfaces_state(ctx, obj_surface); i965_render_sampler(ctx); i965_render_cc_viewport(ctx); gen6_render_color_calc_state(ctx); gen6_subpicture_render_blend_state(ctx); gen6_render_depth_stencil_state(ctx); - i965_subpic_render_upload_vertex(ctx, surface, dst_rect); + i965_subpic_render_upload_constants(ctx, obj_surface); + i965_subpic_render_upload_vertex(ctx, obj_surface, dst_rect); } static void gen6_render_put_subpicture( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; - struct object_surface *obj_surface = SURFACE(surface); - struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; assert(obj_subpic); gen6_render_initialize(ctx); - gen6_subpicture_render_setup_states(ctx, surface, src_rect, dst_rect); + gen6_subpicture_render_setup_states(ctx, obj_surface, src_rect, dst_rect); gen6_render_emit_states(ctx, PS_SUBPIC_KERNEL); - i965_render_upload_image_palette(ctx, obj_subpic->image, 0xff); + i965_render_upload_image_palette(ctx, obj_subpic->obj_image, 0xff); intel_batchbuffer_flush(batch); } @@ -2197,6 +2349,11 @@ render_state->cc.depth_stencil = bo; } +/* + * for GEN8 + */ +#define ALIGNMENT 64 + static void gen7_render_color_calc_state(VADriverContextP ctx) { @@ -2273,25 +2430,28 @@ dri_bo_unmap(render_state->wm.sampler); } + static void gen7_render_setup_states( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, - const VARectangle *dst_rect + const VARectangle *dst_rect, + unsigned int flags ) { i965_render_dest_surface_state(ctx, 0); - i965_render_src_surfaces_state(ctx, surface); + i965_render_src_surfaces_state(ctx, obj_surface, flags); gen7_render_sampler(ctx); i965_render_cc_viewport(ctx); gen7_render_color_calc_state(ctx); gen7_render_blend_state(ctx); gen7_render_depth_stencil_state(ctx); - i965_render_upload_constants(ctx); - i965_render_upload_vertex(ctx, surface, src_rect, dst_rect); + i965_render_upload_constants(ctx, obj_surface, flags); + i965_render_upload_vertex(ctx, obj_surface, src_rect, dst_rect); } + static void gen7_emit_invarient_states(VADriverContextP ctx) { @@ -2373,6 +2533,10 @@ { struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; + unsigned int num_urb_entries = 32; + + if (IS_HASWELL(i965->intel.device_info)) + num_urb_entries = 64; BEGIN_BATCH(batch, 2); OUT_BATCH(batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); @@ -2382,7 +2546,7 @@ BEGIN_BATCH(batch, 2); OUT_BATCH(batch, GEN7_3DSTATE_URB_VS | (2 - 2)); OUT_BATCH(batch, - (32 << GEN7_URB_ENTRY_NUMBER_SHIFT) | /* at least 32 */ + (num_urb_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) | (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); ADVANCE_BATCH(batch); @@ -2677,6 +2841,13 @@ struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; struct i965_render_state *render_state = &i965->render_state; + unsigned int max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_IVB; + unsigned int num_samples = 0; + + if (IS_HASWELL(i965->intel.device_info)) { + max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_HSW; + num_samples = 1 << GEN7_PS_SAMPLE_MASK_SHIFT_HSW; + } BEGIN_BATCH(batch, 3); OUT_BATCH(batch, GEN6_3DSTATE_WM | (3 - 2)); @@ -2688,7 +2859,7 @@ BEGIN_BATCH(batch, 7); OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS | (7 - 2)); - OUT_BATCH(batch, 1); + OUT_BATCH(batch, URB_CS_ENTRY_SIZE); OUT_BATCH(batch, 0); OUT_RELOC(batch, render_state->curbe.bo, @@ -2710,7 +2881,7 @@ (5 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); OUT_BATCH(batch, 0); /* scratch space base offset */ OUT_BATCH(batch, - ((86 - 1) << GEN7_PS_MAX_THREADS_SHIFT) | + ((i965->intel.device_info->max_wm_threads - 1) << max_threads_shift) | num_samples | GEN7_PS_PUSH_CONSTANT_ENABLE | GEN7_PS_ATTRIBUTE_ENABLE | GEN7_PS_16_DISPATCH_ENABLE); @@ -2808,10 +2979,11 @@ intel_batchbuffer_end_atomic(batch); } + static void gen7_render_put_surface( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect, unsigned int flags @@ -2821,12 +2993,13 @@ struct intel_batchbuffer *batch = i965->batch; gen7_render_initialize(ctx); - gen7_render_setup_states(ctx, surface, src_rect, dst_rect); + gen7_render_setup_states(ctx, obj_surface, src_rect, dst_rect, flags); i965_clear_dest_region(ctx); gen7_render_emit_states(ctx, PS_KERNEL); intel_batchbuffer_flush(batch); } + static void gen7_subpicture_render_blend_state(VADriverContextP ctx) { @@ -2852,145 +3025,99 @@ static void gen7_subpicture_render_setup_states( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) { i965_render_dest_surface_state(ctx, 0); - i965_subpic_render_src_surfaces_state(ctx, surface); + i965_subpic_render_src_surfaces_state(ctx, obj_surface); i965_render_sampler(ctx); i965_render_cc_viewport(ctx); gen7_render_color_calc_state(ctx); gen7_subpicture_render_blend_state(ctx); gen7_render_depth_stencil_state(ctx); - i965_subpic_render_upload_vertex(ctx, surface, dst_rect); + i965_subpic_render_upload_constants(ctx, obj_surface); + i965_subpic_render_upload_vertex(ctx, obj_surface, dst_rect); } static void gen7_render_put_subpicture( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; - struct object_surface *obj_surface = SURFACE(surface); - struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic); + unsigned int index = obj_surface->subpic_render_idx; + struct object_subpic *obj_subpic = obj_surface->obj_subpic[index]; assert(obj_subpic); gen7_render_initialize(ctx); - gen7_subpicture_render_setup_states(ctx, surface, src_rect, dst_rect); + gen7_subpicture_render_setup_states(ctx, obj_surface, src_rect, dst_rect); gen7_render_emit_states(ctx, PS_SUBPIC_KERNEL); - i965_render_upload_image_palette(ctx, obj_subpic->image, 0xff); + i965_render_upload_image_palette(ctx, obj_subpic->obj_image, 0xff); intel_batchbuffer_flush(batch); } -/* - * global functions - */ -VAStatus -i965_DestroySurfaces(VADriverContextP ctx, - VASurfaceID *surface_list, - int num_surfaces); void intel_render_put_surface( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect, unsigned int flags ) { struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; int has_done_scaling = 0; - VASurfaceID in_surface_id = surface; - VASurfaceID out_surface_id = i965_post_processing(ctx, surface, src_rect, dst_rect, flags, &has_done_scaling); + VARectangle calibrated_rect; + VASurfaceID out_surface_id = i965_post_processing(ctx, + obj_surface, + src_rect, + dst_rect, + flags, + &has_done_scaling, + &calibrated_rect); assert((!has_done_scaling) || (out_surface_id != VA_INVALID_ID)); - if (out_surface_id != VA_INVALID_ID) - in_surface_id = out_surface_id; + if (out_surface_id != VA_INVALID_ID) { + struct object_surface *new_obj_surface = SURFACE(out_surface_id); + + if (new_obj_surface && new_obj_surface->bo) + obj_surface = new_obj_surface; - if (IS_GEN7(i965->intel.device_id)) - gen7_render_put_surface(ctx, in_surface_id, has_done_scaling ? dst_rect : src_rect, dst_rect, flags); - else if (IS_GEN6(i965->intel.device_id)) - gen6_render_put_surface(ctx, in_surface_id, has_done_scaling ? dst_rect : src_rect, dst_rect, flags); - else - i965_render_put_surface(ctx, in_surface_id, has_done_scaling ? dst_rect : src_rect, dst_rect, flags); + if (has_done_scaling) + src_rect = &calibrated_rect; + } + + render_state->render_put_surface(ctx, obj_surface, src_rect, dst_rect, flags); - if (in_surface_id != surface) - i965_DestroySurfaces(ctx, &in_surface_id, 1); + if (out_surface_id != VA_INVALID_ID) + i965_DestroySurfaces(ctx, &out_surface_id, 1); } void intel_render_put_subpicture( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ) { struct i965_driver_data *i965 = i965_driver_data(ctx); - - if (IS_GEN7(i965->intel.device_id)) - gen7_render_put_subpicture(ctx, surface, src_rect, dst_rect); - else if (IS_GEN6(i965->intel.device_id)) - gen6_render_put_subpicture(ctx, surface, src_rect, dst_rect); - else - i965_render_put_subpicture(ctx, surface, src_rect, dst_rect); -} - -Bool -i965_render_init(VADriverContextP ctx) -{ - struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_render_state *render_state = &i965->render_state; - int i; - - /* kernel */ - assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen5) / - sizeof(render_kernels_gen5[0]))); - assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen6) / - sizeof(render_kernels_gen6[0]))); - - if (IS_GEN7(i965->intel.device_id)) - memcpy(render_state->render_kernels, render_kernels_gen7, sizeof(render_state->render_kernels)); - else if (IS_GEN6(i965->intel.device_id)) - memcpy(render_state->render_kernels, render_kernels_gen6, sizeof(render_state->render_kernels)); - else if (IS_IRONLAKE(i965->intel.device_id)) - memcpy(render_state->render_kernels, render_kernels_gen5, sizeof(render_state->render_kernels)); - else - memcpy(render_state->render_kernels, render_kernels_gen4, sizeof(render_state->render_kernels)); - for (i = 0; i < NUM_RENDER_KERNEL; i++) { - struct i965_kernel *kernel = &render_state->render_kernels[i]; - - if (!kernel->size) - continue; - - kernel->bo = dri_bo_alloc(i965->intel.bufmgr, - kernel->name, - kernel->size, 0x1000); - assert(kernel->bo); - dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); - } - - /* constant buffer */ - render_state->curbe.bo = dri_bo_alloc(i965->intel.bufmgr, - "constant buffer", - 4096, 64); - assert(render_state->curbe.bo); - render_state->curbe.upload = 0; - - return True; + render_state->render_put_subpicture(ctx, obj_surface, src_rect, dst_rect); } -Bool -i965_render_terminate(VADriverContextP ctx) +static void +genx_render_terminate(VADriverContextP ctx) { int i; struct i965_driver_data *i965 = i965_driver_data(ctx); @@ -3001,7 +3128,7 @@ for (i = 0; i < NUM_RENDER_KERNEL; i++) { struct i965_kernel *kernel = &render_state->render_kernels[i]; - + dri_bo_unreference(kernel->bo); kernel->bo = NULL; } @@ -3031,7 +3158,78 @@ free(render_state->draw_region); render_state->draw_region = NULL; } +} + +bool +genx_render_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + int i; + + /* kernel */ + assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen5) / + sizeof(render_kernels_gen5[0]))); + assert(NUM_RENDER_KERNEL == (sizeof(render_kernels_gen6) / + sizeof(render_kernels_gen6[0]))); + + if (IS_GEN7(i965->intel.device_info)) { + memcpy(render_state->render_kernels, + (IS_HASWELL(i965->intel.device_info) ? render_kernels_gen7_haswell : render_kernels_gen7), + sizeof(render_state->render_kernels)); + render_state->render_put_surface = gen7_render_put_surface; + render_state->render_put_subpicture = gen7_render_put_subpicture; + } else if (IS_GEN6(i965->intel.device_info)) { + memcpy(render_state->render_kernels, render_kernels_gen6, sizeof(render_state->render_kernels)); + render_state->render_put_surface = gen6_render_put_surface; + render_state->render_put_subpicture = gen6_render_put_subpicture; + } else if (IS_IRONLAKE(i965->intel.device_info)) { + memcpy(render_state->render_kernels, render_kernels_gen5, sizeof(render_state->render_kernels)); + render_state->render_put_surface = i965_render_put_surface; + render_state->render_put_subpicture = i965_render_put_subpicture; + } else { + memcpy(render_state->render_kernels, render_kernels_gen4, sizeof(render_state->render_kernels)); + render_state->render_put_surface = i965_render_put_surface; + render_state->render_put_subpicture = i965_render_put_subpicture; + } + + render_state->render_terminate = genx_render_terminate; + + for (i = 0; i < NUM_RENDER_KERNEL; i++) { + struct i965_kernel *kernel = &render_state->render_kernels[i]; + + if (!kernel->size) + continue; + + kernel->bo = dri_bo_alloc(i965->intel.bufmgr, + kernel->name, + kernel->size, 0x1000); + assert(kernel->bo); + dri_bo_subdata(kernel->bo, 0, kernel->size, kernel->bin); + } + + /* constant buffer */ + render_state->curbe.bo = dri_bo_alloc(i965->intel.bufmgr, + "constant buffer", + 4096, 64); + assert(render_state->curbe.bo); - return True; + return true; } +bool +i965_render_init(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + + return i965->codec_info->render_init(ctx); +} + +void +i965_render_terminate(VADriverContextP ctx) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_render_state *render_state = &i965->render_state; + + render_state->render_terminate(ctx); +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_render.h intel-vaapi-driver-1.7.1/src/i965_render.h --- intel-vaapi-driver-1.0.15/src/i965_render.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_render.h 2016-06-03 06:05:58.000000000 +0000 @@ -33,6 +33,8 @@ #define NUM_RENDER_KERNEL 3 +#define VA_SRC_COLOR_MASK 0x000000f0 + #include "i965_post_processing.h" struct i965_kernel; @@ -67,25 +69,68 @@ struct { dri_bo *bo; - int upload; } curbe; - unsigned short interleaved_uv; - unsigned short inited; struct intel_region *draw_region; int pp_flag; /* 0: disable, 1: enable */ struct i965_kernel render_kernels[3]; + + struct { + dri_bo *bo; + int bo_size; + unsigned int end_offset; + } instruction_state; + + struct { + dri_bo *bo; + } indirect_state; + + struct { + dri_bo *bo; + int bo_size; + unsigned int end_offset; + } dynamic_state; + + unsigned int curbe_offset; + int curbe_size; + + unsigned int sampler_offset; + int sampler_size; + + unsigned int cc_viewport_offset; + int cc_viewport_size; + + unsigned int cc_state_offset; + int cc_state_size; + + unsigned int blend_state_offset; + int blend_state_size; + + unsigned int sf_clip_offset; + int sf_clip_size; + + unsigned int scissor_offset; + int scissor_size; + + void (*render_put_surface)(VADriverContextP ctx, struct object_surface *, + const VARectangle *src_rec, + const VARectangle *dst_rect, + unsigned int flags); + void (*render_put_subpicture)(VADriverContextP ctx, struct object_surface *, + const VARectangle *src_rec, + const VARectangle *dst_rect); + void (*render_terminate)(VADriverContextP ctx); }; -Bool i965_render_init(VADriverContextP ctx); -Bool i965_render_terminate(VADriverContextP ctx); +bool i965_render_init(VADriverContextP ctx); +void i965_render_terminate(VADriverContextP ctx); void intel_render_put_surface( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect, unsigned int flags @@ -94,9 +139,22 @@ void intel_render_put_subpicture( VADriverContextP ctx, - VASurfaceID surface, + struct object_surface *obj_surface, const VARectangle *src_rect, const VARectangle *dst_rect ); +struct gen7_surface_state; + +void +gen7_render_set_surface_scs(struct gen7_surface_state *ss); + +struct gen8_surface_state; +void +gen8_render_set_surface_scs(struct gen8_surface_state *ss); + +extern bool gen8_render_init(VADriverContextP ctx); + +extern bool gen9_render_init(VADriverContextP ctx); + #endif /* _I965_RENDER_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_structs.h intel-vaapi-driver-1.7.1/src/i965_structs.h --- intel-vaapi-driver-1.0.15/src/i965_structs.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_structs.h 2016-06-16 00:57:46.000000000 +0000 @@ -799,7 +799,8 @@ } dw3; struct { - int pad0:16; + int table_1x_filter_c0:8; + int table_1x_filter_c1:8; int table_1x_filter_c2:8; int table_1x_filter_c3:8; } dw4; @@ -807,11 +808,13 @@ struct { int table_1x_filter_c4:8; int table_1x_filter_c5:8; - int pad0:16; + int table_1x_filter_c6:8; + int table_1x_filter_c7:8; } dw5; struct { - int pad0:16; + int table_1y_filter_c0:8; + int table_1y_filter_c1:8; int table_1y_filter_c2:8; int table_1y_filter_c3:8; } dw6; @@ -819,7 +822,8 @@ struct { int table_1y_filter_c4:8; int table_1y_filter_c5:8; - int pad0:16; + int table_1y_filter_c6:8; + int table_1y_filter_c7:8; } dw7; }; @@ -837,13 +841,24 @@ unsigned int default_sharpness_level:8; } dw136; - struct { - unsigned int bit_field_name:1; - unsigned int adaptive_filter_for_all_channel:1; - unsigned int pad0:19; - unsigned int bypass_y_adaptive_filtering:1; - unsigned int bypass_x_adaptive_filtering:1; - unsigned int pad1:9; + union { + /* Ironlake, Sandybridge, Ivybridge (Gen5+) */ + struct { + unsigned int pad0:21; + unsigned int bypass_y_adaptive_filtering:1; + unsigned int bypass_x_adaptive_filtering:1; + unsigned int pad1:9; + } ilk; + + /* Haswell (Gen7.5+) */ + struct { + unsigned int rgb_adaptive:1; + unsigned int adaptive_filter_for_all_channel:1; + unsigned int pad0:19; + unsigned int bypass_y_adaptive_filtering:1; + unsigned int bypass_x_adaptive_filtering:1; + unsigned int pad1:9; + } hsw; } dw137; }; @@ -964,6 +979,552 @@ } dw7; }; +struct gen8_interface_descriptor_data +{ + struct { + unsigned int pad0:6; + unsigned int kernel_start_pointer:26; + } desc0; + + struct { + unsigned int kernel_start_pointer_high:16; + unsigned int pad0:16; + } desc1; + + struct { + unsigned int pad0:7; + unsigned int software_exception_enable:1; + unsigned int pad1:3; + unsigned int maskstack_exception_enable:1; + unsigned int pad2:1; + unsigned int illegal_opcode_exception_enable:1; + unsigned int pad3:2; + unsigned int floating_point_mode:1; + unsigned int thread_priority:1; + unsigned int single_program_flow:1; + unsigned int denorm_mode:1; + unsigned int pad4:12; + } desc2; + + struct { + unsigned int pad0:2; + unsigned int sampler_count:3; + unsigned int sampler_state_pointer:27; + } desc3; + + struct { + unsigned int binding_table_entry_count:5; + unsigned int binding_table_pointer:11; + unsigned int pad0: 16; + } desc4; + + struct { + unsigned int constant_urb_entry_read_offset:16; + unsigned int constant_urb_entry_read_length:16; + } desc5; + + struct { + unsigned int num_threads_in_tg:10; + unsigned int pad0:5; + unsigned int global_barrier_enable:1; + unsigned int shared_local_memory_size:5; + unsigned int barrier_enable:1; + unsigned int rounding_mode:2; + unsigned int pad1:8; + } desc6; + + struct { + unsigned int cross_thread_constant_data_read_length:8; + unsigned int pad0:24; + } desc7; +}; + +struct gen8_surface_state +{ + struct { + unsigned int cube_pos_z:1; + unsigned int cube_neg_z:1; + unsigned int cube_pos_y:1; + unsigned int cube_neg_y:1; + unsigned int cube_pos_x:1; + unsigned int cube_neg_x:1; + unsigned int media_boundary_pixel_mode:2; + unsigned int render_cache_read_write:1; + unsigned int sampler_l2bypass_disable:1; + unsigned int vert_line_stride_ofs:1; + unsigned int vert_line_stride:1; + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int horizontal_alignment:2; + /* Field 16 */ + unsigned int vertical_alignment:2; + unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ + unsigned int pad0:1; + unsigned int is_array:1; + unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ + } ss0; + + struct { + unsigned int surface_qpitch:15; + unsigned int pad0:4; + unsigned int base_mip_level:5; + unsigned int surface_mocs:7; + unsigned int pad1:1; + } ss1; + + struct { + unsigned int width:14; + unsigned int pad0:2; + unsigned int height:14; + unsigned int pad1:2; + } ss2; + + struct { + unsigned int pitch:18; + unsigned int pad:3; + unsigned int depth:11; + } ss3; + + struct { + unsigned int multisample_position_palette_index:3; + unsigned int num_multisamples:3; + unsigned int multisampled_surface_storage_format:1; + unsigned int render_target_view_extent:11; + unsigned int min_array_elt:11; + unsigned int rotation:2; + unsigned int force_ncmp_reduce_type:1; + } ss4; + + struct { + unsigned int mip_count:4; + unsigned int min_lod:4; + unsigned int pad0:4; + unsigned int pad1:2; + unsigned int coherence_type:1; + unsigned int pad2:3; + unsigned int pad3:2; + unsigned int ewa_disable_cube:1; + unsigned int y_offset:3; + unsigned int pad4:1; + unsigned int x_offset:7; + } ss5; + + struct { + unsigned int y_offset_uv_plane:14; + unsigned int pad0:2; + unsigned int x_offset_uv_plane:14; + unsigned int pad1:1; + unsigned int separate_uv_plane:1; + } ss6; + + struct { + unsigned int resource_min_lod:12; + unsigned int pad0:4; + unsigned int shader_chanel_select_a:3; + unsigned int shader_chanel_select_b:3; + unsigned int shader_chanel_select_g:3; + unsigned int shader_chanel_select_r:3; + unsigned int alpha_clear_color:1; + unsigned int blue_clear_color:1; + unsigned int green_clear_color:1; + unsigned int red_clear_color:1; + } ss7; + struct { + unsigned int base_addr; + } ss8; + + struct { + unsigned int base_addr_high:16; + unsigned int pad0:16; + } ss9; + + struct { + unsigned int pad0:12; + unsigned int aux_base_addr:20; + } ss10; + + union { + struct { + unsigned int y_offset_v_plane:14; + unsigned int pad0:2; + unsigned int x_offset_v_plane:14; + unsigned int pad1:2; + } planar; + struct { + unsigned int aux_base_addr_high:16; + unsigned int pad2:16; + } aux_buffer; + } ss11; + + struct { + unsigned int hier_depth_clear; + } ss12; + + struct { + unsigned int pad0; + } ss13; + + struct { + unsigned int pad0; + } ss14; + + struct { + unsigned int pad0; + } ss15; +}; + +struct gen8_surface_state2 +{ + struct { + unsigned int pad0; + } ss0; + + struct { + unsigned int cbcr_pixel_offset_v_direction:2; + unsigned int picture_structure:2; + unsigned int width:14; + unsigned int height:14; + } ss1; + + struct { + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int half_pitch_for_chroma:1; + unsigned int pitch:18; + unsigned int address_ctrl:1; /* clamp or mirror mode */ + unsigned int pad0:4; + unsigned int interleave_chroma:1; + unsigned int surface_format:5; + } ss2; + + struct { + unsigned int y_offset_for_cb:14; + unsigned int pad0:2; + unsigned int x_offset_for_cb:14; + unsigned int pad1:2; + } ss3; + + struct { + unsigned int y_offset_for_cr:15; + unsigned int pad0:1; + unsigned int x_offset_for_cr:14; + unsigned int pad1:2; + } ss4; + + struct { + unsigned int surface_object_mocs:7; + unsigned int pad0:11; + unsigned int pad1:2; + unsigned int pad2:10; + unsigned int vert_line_stride_offset:1; + unsigned int vert_line_stride:1; + } ss5; + + struct { + unsigned int base_addr; + } ss6; + + struct { + unsigned int base_addr_high:16; + unsigned int pad0:16; + } ss7; +}; + +struct gen9_surface_state2 +{ + struct { + unsigned int pad0:16; + unsigned int y_offset:4; + unsigned int x_offset:7; + unsigned int pad1:3; + unsigned int rotation:2; + } ss0; + + struct { + unsigned int cbcr_pixel_offset_v_direction:2; + unsigned int picture_structure:2; + unsigned int width:14; + unsigned int height:14; + } ss1; + + struct { + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int half_pitch_for_chroma:1; + unsigned int pitch:18; + unsigned int address_ctrl:1; /* clamp or mirror mode */ + unsigned int memory_compression_enable:1; + unsigned int memory_compression_mode:1; + unsigned int cbcr_pixel_offset_v_direction_msb:1; + unsigned int cbcr_pixel_offset_u_direction:1; + unsigned int interleave_chroma:1; + unsigned int surface_format:5; + } ss2; + + struct { + unsigned int y_offset_for_cb:14; + unsigned int pad0:2; + unsigned int x_offset_for_cb:14; + unsigned int pad1:2; + } ss3; + + struct { + unsigned int y_offset_for_cr:15; + unsigned int pad0:1; + unsigned int x_offset_for_cr:14; + unsigned int pad1:2; + } ss4; + + struct { + unsigned int surface_object_mocs:7; + unsigned int pad0:11; + unsigned int tr_mode:2; + unsigned int pad1:10; + unsigned int vert_line_stride_offset:1; + unsigned int vert_line_stride:1; + } ss5; + + struct { + unsigned int base_addr; + } ss6; + + struct { + unsigned int base_addr_high:16; + unsigned int pad0:16; + } ss7; +}; + +struct gen9_surface_state +{ + struct { + unsigned int pad0:6; + unsigned int media_boundary_pixel_mode:2; + unsigned int render_cache_read_write:1; + unsigned int sampler_l2bypass_disable:1; + unsigned int vert_line_stride_ofs:1; + unsigned int vert_line_stride:1; + unsigned int tile_walk:1; + unsigned int tiled_surface:1; + unsigned int horizontal_alignment:2; + /* Field 16 */ + unsigned int vertical_alignment:2; + unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ + unsigned int astc_enable:1; + unsigned int is_array:1; + unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ + } ss0; + + struct { + unsigned int surface_qpitch:15; + unsigned int pad0:4; + unsigned int base_mip_level:5; + unsigned int surface_mocs:7; + unsigned int pad1:1; + } ss1; + + struct { + unsigned int width:14; + unsigned int pad0:2; + unsigned int height:14; + unsigned int pad1:2; + } ss2; + + struct { + unsigned int pitch:18; + unsigned int pad:3; + unsigned int depth:11; + } ss3; + + struct { + unsigned int multisample_position_palette_index:3; + unsigned int num_multisamples:3; + unsigned int multisampled_surface_storage_format:1; + unsigned int render_target_view_extent:11; + unsigned int min_array_elt:11; + unsigned int rotation:2; + unsigned int force_ncmp_reduce_type:1; + } ss4; + + struct { + unsigned int mip_count:4; + unsigned int min_lod:4; + unsigned int miptail_start_lod:4; + unsigned int pad0:2; + unsigned int coherence_type:1; + unsigned int pad1:3; + unsigned int tr_mode:2; + unsigned int ewa_disable_cube:1; + unsigned int y_offset:3; + unsigned int pad2:1; + unsigned int x_offset:7; + } ss5; + + struct { + unsigned int y_offset_uv_plane:14; + unsigned int pad0:2; + unsigned int x_offset_uv_plane:14; + unsigned int pad1:1; + unsigned int separate_uv_plane:1; + } ss6; + + struct { + unsigned int resource_min_lod:12; + unsigned int pad0:4; + unsigned int shader_chanel_select_a:3; + unsigned int shader_chanel_select_b:3; + unsigned int shader_chanel_select_g:3; + unsigned int shader_chanel_select_r:3; + unsigned int pad1:2; + unsigned int memory_compression_enable:1; + unsigned int memory_compression_mode:1; + } ss7; + + struct { + unsigned int base_addr; + } ss8; + + struct { + unsigned int base_addr_high; + } ss9; + + struct { + unsigned int quilt_width:5; + unsigned int quilt_height:5; + unsigned int pad0:6; + unsigned int pad1:16; + } ss10; + + struct { + unsigned int y_offset_v_plane:14; + unsigned int pad0:2; + unsigned int x_offset_v_plane:14; + unsigned int pad1:2; + } ss11; + + struct { + unsigned int pad0; + } ss12; + + struct { + unsigned int pad0; + } ss13; + + struct { + unsigned int pad0; + } ss14; + + struct { + unsigned int pad0; + } ss15; +}; + +struct gen8_sampler_state +{ + struct + { + unsigned int aniso_algorithm:1; + unsigned int lod_bias:13; + unsigned int min_filter:3; + unsigned int mag_filter:3; + unsigned int mip_filter:2; + unsigned int base_level:5; + unsigned int lod_preclamp:2; + unsigned int default_color_mode:1; + unsigned int pad0:1; + unsigned int disable:1; + } ss0; + + struct + { + unsigned int cube_control_mode:1; + unsigned int shadow_function:3; + unsigned int chroma_key_mode:1; + unsigned int chroma_key_index:2; + unsigned int chroma_key_enable:1; + unsigned int max_lod:12; + unsigned int min_lod:12; + } ss1; + + struct + { + unsigned int lod_clamp_mag_mode:1; /* MIPNONE or MIPFILTER */ + unsigned int flex_filter_vert_align:1; + unsigned int flex_filter_hort_align:1; + unsigned int flex_filter_coff_size:1; /* coff8 or coff 16 */ + unsigned int flex_filter_mode:1; + unsigned int pad0:1; + unsigned int indirect_state_pointer:18; /* point to the SAMPLE_INDIRECT_STATE */ + union { + unsigned char nonsep_filter_footer_highmask; + struct { + unsigned char pad1:2; + unsigned char sep_filter_height:2; + unsigned char sep_filter_width:2; + unsigned char sep_filter_coff_size:2; + } sep_filter; + } ss2_byte3; + } ss2; + + struct + { + unsigned int r_wrap_mode:3; + unsigned int t_wrap_mode:3; + unsigned int s_wrap_mode:3; + unsigned int pad0:1; + unsigned int non_normalized_coord:1; + unsigned int trilinear_quality:2; + unsigned int address_round:6; + unsigned int max_aniso:3; + unsigned int pad1:2; + unsigned int nonsep_filter_foot_lowmask:8; + } ss3; +}; + +struct gen8_global_blend_state +{ + unsigned int pad0:19; + unsigned int ydither_offset:2; + unsigned int xdither_offset:2; + unsigned int color_dither_enable:1; + unsigned int alpha_test_func:3; + unsigned int alpha_test_enable:1; + unsigned int alpha_to_coverage_dither:1; + unsigned int alpha_to_one:1; + unsigned int ia_blend_enable:1; + unsigned int alpha_to_coverage:1; +}; + +struct gen8_blend_state_rt { + struct { + unsigned int blue_write_dis:1; + unsigned int green_write_dis:1; + unsigned int red_write_dis:1; + unsigned int alpha_write_dis:1; + unsigned int pad0:1; + unsigned int alpha_blend_func:3; + unsigned int ia_dest_blend_factor:5; + unsigned int ia_src_blend_factor:5; + unsigned int color_blend_func:3; + unsigned int dest_blend_factor:5; + unsigned int src_blend_factor:5; + unsigned int colorbuf_blend:1; + } blend0; + + struct { + unsigned int post_blend_clamp_enable:1; + unsigned int pre_blend_clamp_enable:1; + unsigned int clamp_range:2; + unsigned int pre_blend_src_clamp:1; + unsigned int pad0:22; + unsigned int logic_op_func:4; + unsigned int logic_op_enable:1; + } blend1; +}; + +/* TODO: Add the sampler_8x8 for Gen8+. + * AVS/Convolve is 256DWs. + * MinMaxfilter/Erode/Dilate: 8DWs*/ + struct gen6_blend_state { @@ -1195,7 +1756,11 @@ struct { unsigned int resource_min_lod:12; - unsigned int pad0:16; + unsigned int pad0:4; + unsigned int shader_chanel_select_a:3; + unsigned int shader_chanel_select_b:3; + unsigned int shader_chanel_select_g:3; + unsigned int shader_chanel_select_r:3; unsigned int alpha_clear_color:1; unsigned int blue_clear_color:1; unsigned int green_clear_color:1; @@ -1304,4 +1869,501 @@ } ss7; }; +struct gen7_sampler_8x8 +{ + struct { + unsigned int global_noise_estimation:8; + unsigned int pad0:8; + unsigned int chroma_key_index:2; + unsigned int chroma_key_enable:1; + unsigned int pad1:10; + unsigned int ief_bypass:1; + unsigned int pad2:1; + unsigned int disable_8x8_filter:1; + } dw0; + + struct { + unsigned int pad0:5; + unsigned int sampler_8x8_state_pointer:27; + } dw1; + + struct { + unsigned int weak_edge_threshold:6; + unsigned int pad0:2; + unsigned int strong_edge_threshold:6; + unsigned int pad1:2; + unsigned int r5x_coefficient:5; + unsigned int r5cx_coefficient:5; + unsigned int r5c_coefficient:5; + unsigned int pad2:1; + } dw2; + + struct { + unsigned int r3x_coefficient:5; + unsigned int pad0:1; + unsigned int r3c_coefficient:5; + unsigned int pad1:3; + unsigned int gain_factor:6; + unsigned int non_edge_weight:3; + unsigned int pad2:1; + unsigned int regular_weight:3; + unsigned int pad3:1; + unsigned int strong_edge_weight:3; + unsigned int ief4_smooth_enable:1; + } dw3; +}; + +/* This can also be used for BDW+ */ +struct gen7_sampler_dndi +{ + struct { + unsigned int denoise_asd_threshold:8; + unsigned int dnmh_delt:4; + unsigned int vdi_walker_y_stride:2; + unsigned int vdi_walker_frame_sharing_enable:1; + unsigned int pad0:1; + unsigned int denoise_maximum_history:8; + unsigned int denoise_stad_threshold:8; + } dw0; + + struct { + unsigned int denoise_threshold_for_sum_of_complexity_measure:8; + unsigned int denoise_moving_pixel_threshold:5; + unsigned int stmm_c2:3; + unsigned int low_temporal_difference_threshold:6; + unsigned int pad0:2; + unsigned int temporal_difference_threshold:6; + unsigned int pad1:2; + } dw1; + + struct { + unsigned int block_noise_estimate_noise_threshold:8; + unsigned int bne_edge_th:4; + unsigned int pad0:2; + unsigned int smooth_mv_th:2; + unsigned int sad_tight_th:4; + unsigned int cat_slope_minus1:4; + unsigned int good_neighbor_th:6; + unsigned int pad1:2; + } dw2; + + struct { + unsigned int maximum_stmm:8; + unsigned int multipler_for_vecm:6; + unsigned int pad0:2; + unsigned int blending_constant_across_time_for_small_values_of_stmm:8; + unsigned int blending_constant_across_time_for_large_values_of_stmm:7; + unsigned int stmm_blending_constant_select:1; + } dw3; + + struct { + unsigned int sdi_delta:8; + unsigned int sdi_threshold:8; + unsigned int stmm_output_shift:4; + unsigned int stmm_shift_up:2; + unsigned int stmm_shift_down:2; + unsigned int minimum_stmm:8; + } dw4; + + struct { + unsigned int fmd_temporal_difference_threshold:8; + unsigned int sdi_fallback_mode_2_constant:8; + unsigned int sdi_fallback_mode_1_t2_constant:8; + unsigned int sdi_fallback_mode_1_t1_constant:8; + } dw5; + + struct { + unsigned int dn_enable:1; + unsigned int di_enable:1; + unsigned int di_partial:1; + unsigned int dndi_top_first:1; + unsigned int dndi_stream_id:1; + unsigned int dndi_first_frame:1; + unsigned int progressive_dn:1; + unsigned int mcdi_enable:1; + unsigned int fmd_tear_threshold:6; + unsigned int cat_th1:2; + unsigned int fmd2_vertical_difference_threshold:8; + unsigned int fmd1_vertical_difference_threshold:8; + } dw6; + + struct { + unsigned int sad_tha:4; + unsigned int sad_thb:4; + unsigned int fmd_for_1st_field_of_current_frame:2; + unsigned int mc_pixel_consistency_th:6; + unsigned int fmd_for_2nd_field_of_previous_frame:2; + unsigned int vdi_walker_enable:1; + unsigned int neighborpixel_th:4; + unsigned int column_width_minus1:9; + } dw7; +}; + +struct gen8_sampler_8x8_avs_coefficients +{ + struct { + unsigned int table_0x_filter_c0:8; + unsigned int table_0y_filter_c0:8; + unsigned int table_0x_filter_c1:8; + unsigned int table_0y_filter_c1:8; + } dw0; + + struct { + unsigned int table_0x_filter_c2:8; + unsigned int table_0y_filter_c2:8; + unsigned int table_0x_filter_c3:8; + unsigned int table_0y_filter_c3:8; + } dw1; + + struct { + unsigned int table_0x_filter_c4:8; + unsigned int table_0y_filter_c4:8; + unsigned int table_0x_filter_c5:8; + unsigned int table_0y_filter_c5:8; + } dw2; + + struct { + unsigned int table_0x_filter_c6:8; + unsigned int table_0y_filter_c6:8; + unsigned int table_0x_filter_c7:8; + unsigned int table_0y_filter_c7:8; + } dw3; + + struct { + unsigned int pad0:16; + unsigned int table_1x_filter_c2:8; + unsigned int table_1x_filter_c3:8; + } dw4; + + struct { + unsigned int table_1x_filter_c4:8; + unsigned int table_1x_filter_c5:8; + unsigned int pad0:16; + } dw5; + + struct { + unsigned int pad0:16; + unsigned int table_1y_filter_c2:8; + unsigned int table_1y_filter_c3:8; + } dw6; + + struct { + unsigned int table_1y_filter_c4:8; + unsigned int table_1y_filter_c5:8; + unsigned int pad0:16; + } dw7; +}; + +struct gen8_sampler_8x8_avs { + struct { + unsigned int gain_factor:6; + unsigned int weak_edge_threshold:6; + unsigned int strong_edge_threshold:6; + unsigned int r3x_coefficient:5; + unsigned int r3c_coefficient:5; + unsigned int chroma_key_index:2; + unsigned int chroma_key_enable:1; + unsigned int pad1:1; + } dw0; + + struct { + unsigned int pad0; + } dw1; + + struct { + unsigned int global_noise_estimation:8; + unsigned int non_edge_weight:3; + unsigned int regular_weight:3; + unsigned int strong_edge_weight:3; + unsigned int r5x_coefficient:5; + unsigned int r5cx_coefficient:5; + unsigned int r5c_coefficient:5; + } dw2; + + struct { + unsigned int sin_alpha:8; /* S0.7 */ + unsigned int cos_alpha:8; /* S0.7 */ + unsigned int sat_max:6; + unsigned int hue_max:6; + unsigned int enable_8tap_filter:2; + unsigned int ief4_smooth_enable:1; + unsigned int skin_ief_enable:1; + } dw3; + + struct { + unsigned int s3u:11; /* S2.8 */ + unsigned int pad0:1; + unsigned int diamond_margin:3; + unsigned int vy_std_enable:1; + unsigned int umid:8; + unsigned int vmid:8; + } dw4; + + struct { + unsigned int diamond_dv:7; + unsigned int diamond_th:6; + unsigned int diamond_alpha:8; + unsigned int hs_margin:3; + unsigned int diamond_du:7; + unsigned int skin_detailfilter:1; + } dw5; + + struct { + unsigned int y_point1:8; + unsigned int y_point2:8; + unsigned int y_point3:8; + unsigned int y_point4:8; + } dw6; + + struct { + unsigned int inv_margin_vyl:16; + unsigned int pad0:16; + } dw7; + + struct { + unsigned int inv_margin_vyu:16; + unsigned int p0l:8; + unsigned int p1l:8; + } dw8; + + struct { + unsigned int p2l:8; + unsigned int p3l:8; + unsigned int b0l:8; + unsigned int b1l:8; + } dw9; + + struct { + unsigned int b2l:8; + unsigned int b3l:8; + unsigned int s0l:11; + unsigned int y_slope2:5; + } dw10; + + struct { + unsigned int s1l:11; + unsigned int s2l:11; + unsigned int pad0:10; + } dw11; + + struct { + unsigned int s3l:11; + unsigned int p0u:8; + unsigned int p1u:8; + unsigned int y_slope1:5; + } dw12; + + struct { + unsigned int p2u:8; + unsigned int p3u:8; + unsigned int b0u:8; + unsigned int b1u:8; + } dw13; + + struct { + unsigned int b2u:8; + unsigned int b3u:8; + unsigned int s0u:11; + unsigned int pad0:5; + } dw14; + + struct { + unsigned int s1u:11; + unsigned int s2u:11; + unsigned int pad0:10; + } dw15; + + /* DW16-DW151 */ + struct gen8_sampler_8x8_avs_coefficients coefficients[17]; + + struct { + unsigned int transition_area_with_8_pixels:3; + unsigned int pad0:1; + unsigned int transition_area_with_4_pixels:3; + unsigned int pad1:1; + unsigned int max_derivative_8_pixels:8; + unsigned int max_derivative_4_pixels:8; + unsigned int default_sharpness_level:8; + } dw152; + + struct { + unsigned int rgb_adaptive:1; + unsigned int adaptive_filter_for_all_channel:1; + unsigned int pad0:19; + unsigned int bypass_y_adaptive_filtering:1; + unsigned int bypass_x_adaptive_filtering:1; + unsigned int pad1:9; + } dw153; + + unsigned int reserved[6]; + + /* DW160-DW279 */ + struct gen8_sampler_8x8_avs_coefficients coefficients1[15]; +}; + +struct gen9_sampler_8x8_avs +{ + struct { + unsigned int gain_factor:6; + unsigned int weak_edge_threshold:6; + unsigned int strong_edge_threshold:6; + unsigned int r3x_coefficient:5; + unsigned int r3c_coefficient:5; + unsigned int pad1:4; + } dw0; + + struct { + unsigned int pad0; + } dw1; + + struct { + unsigned int global_noise_estimation:8; + unsigned int non_edge_weight:3; + unsigned int regular_weight:3; + unsigned int strong_edge_weight:3; + unsigned int r5x_coefficient:5; + unsigned int r5cx_coefficient:5; + unsigned int r5c_coefficient:5; + } dw2; + + struct { + unsigned int sin_alpha:8; /* S0.7 */ + unsigned int cos_alpha:8; /* S0.7 */ + unsigned int sat_max:6; + unsigned int hue_max:6; + unsigned int enable_8tap_adaptive_filter:2; + unsigned int ief4_smooth_enable:1; + unsigned int skin_ief_enable:1; + } dw3; + + struct { + unsigned int s3u:11; /* S2.8 */ + unsigned int shuffle_output_write_back:1; + unsigned int diamond_margin:3; + unsigned int vy_std_enable:1; + unsigned int umid:8; + unsigned int vmid:8; + } dw4; + + struct { + unsigned int diamond_dv:7; + unsigned int diamond_th:6; + unsigned int diamond_alpha:8; + unsigned int hs_margin:3; + unsigned int diamond_du:7; + unsigned int skin_detailfilter:1; + } dw5; + + struct { + unsigned int y_point1:8; + unsigned int y_point2:8; + unsigned int y_point3:8; + unsigned int y_point4:8; + } dw6; + + struct { + unsigned int inv_margin_vyl:16; + unsigned int pad0:16; + } dw7; + + struct { + unsigned int inv_margin_vyu:16; + unsigned int p0l:8; + unsigned int p1l:8; + } dw8; + + struct { + unsigned int p2l:8; + unsigned int p3l:8; + unsigned int b0l:8; + unsigned int b1l:8; + } dw9; + + struct { + unsigned int b2l:8; + unsigned int b3l:8; + unsigned int s0l:11; + unsigned int y_slope2:5; + } dw10; + + struct { + unsigned int s1l:11; + unsigned int s2l:11; + unsigned int pad0:10; + } dw11; + + struct { + unsigned int s3l:11; + unsigned int p0u:8; + unsigned int p1u:8; + unsigned int y_slope1:5; + } dw12; + + struct { + unsigned int p2u:8; + unsigned int p3u:8; + unsigned int b0u:8; + unsigned int b1u:8; + } dw13; + + struct { + unsigned int b2u:8; + unsigned int b3u:8; + unsigned int s0u:11; + unsigned int pad0:5; + } dw14; + + struct { + unsigned int s1u:11; + unsigned int s2u:11; + unsigned int pad0:10; + } dw15; + + /* DW16-DW151 for 17 coeff tabls */ + struct gen8_sampler_8x8_avs_coefficients coefficients[17]; + + struct { + unsigned int transition_area_with_8_pixels:3; + unsigned int pad0:1; + unsigned int transition_area_with_4_pixels:3; + unsigned int pad1:1; + unsigned int max_derivative_8_pixels:8; + unsigned int max_derivative_4_pixels:8; + unsigned int default_sharpness_level:8; + } dw152; + + struct { + unsigned int rgb_adaptive:1; + unsigned int adaptive_filter_for_all_channel:1; + unsigned int pad0:19; + unsigned int bypass_y_adaptive_filtering:1; + unsigned int bypass_x_adaptive_filtering:1; + unsigned int pad1:9; + } dw153; + + unsigned int reserved1[6]; + + /* 160-279 for 17..31 avs_coeff */ + struct gen8_sampler_8x8_avs_coefficients extra_coefficients[15]; + + // 280 - 511 (padding to align it to 512 dwords) + unsigned int reserved2[232]; +}; + +#define SURFACE_STATE_PADDED_SIZE_0_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE_1_GEN7 ALIGN(sizeof(struct gen7_surface_state2), 32) +#define SURFACE_STATE_PADDED_SIZE_GEN7 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN7, SURFACE_STATE_PADDED_SIZE_1_GEN7) + +#define SURFACE_STATE_PADDED_SIZE_0_GEN6 ALIGN(sizeof(struct i965_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE_1_GEN6 ALIGN(sizeof(struct i965_surface_state2), 32) +#define SURFACE_STATE_PADDED_SIZE_GEN6 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN6, SURFACE_STATE_PADDED_SIZE_1_GEN6) + +#define SURFACE_STATE_PADDED_SIZE_0_GEN8 ALIGN(sizeof(struct gen8_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE_1_GEN8 ALIGN(sizeof(struct gen8_surface_state2), 32) +#define SURFACE_STATE_PADDED_SIZE_GEN8 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN8, SURFACE_STATE_PADDED_SIZE_1_GEN8) + +#define SURFACE_STATE_PADDED_SIZE_0_GEN9 ALIGN(sizeof(struct gen9_surface_state), 32) +#define SURFACE_STATE_PADDED_SIZE_1_GEN9 ALIGN(sizeof(struct gen9_surface_state2), 32) +#define SURFACE_STATE_PADDED_SIZE_GEN9 MAX(SURFACE_STATE_PADDED_SIZE_0_GEN9, SURFACE_STATE_PADDED_SIZE_1_GEN9) + #endif /* _I965_STRUCTS_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_vpp_avs.c intel-vaapi-driver-1.7.1/src/i965_vpp_avs.c --- intel-vaapi-driver-1.0.15/src/i965_vpp_avs.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_vpp_avs.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,271 @@ +/* + * i965_vpp_avs.c - Adaptive Video Scaler (AVS) block + * + * Copyright (C) 2014 Intel Corporation + * Author: Gwenole Beauchesne + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sysdeps.h" +#include +#include +#include "i965_vpp_avs.h" + +typedef void (*AVSGenCoeffsFunc)(float *coeffs, int num_coeffs, int phase, + int num_phases, float f); + +/* Initializes all coefficients to zero */ +static void +avs_init_coeffs(float *coeffs, int num_coeffs) +{ +#if defined(__STDC_IEC_559__) && (__STDC_IEC_559__ > 0) + memset(coeffs, 0, num_coeffs * sizeof(*coeffs)); +#else + int i; + + for (i = 0; i < num_coeffs; i++) + coeffs[i] = 0.0f; +#endif +} + +/* Computes the sinc(x) function */ +static float +avs_sinc(float x) +{ + if (x == 0.0f) + return 1.0f; + return sin(x * M_PI) / (x * M_PI); +} + +/* Convolution kernel for linear interpolation */ +static float +avs_kernel_linear(float x) +{ + const float abs_x = fabsf(x); + + return abs_x < 1.0f ? 1 - abs_x : 0.0f; +} + +/* Convolution kernel for Lanczos-based interpolation */ +static float +avs_kernel_lanczos(float x, float a) +{ + const float abs_x = fabsf(x); + + return abs_x < a ? avs_sinc(x) * avs_sinc(x / a) : 0.0f; +} + +/* Truncates floating-point value towards an epsilon factor */ +static inline float +avs_trunc_coeff(float x, float epsilon) +{ + return rintf(x / epsilon) * epsilon; +} + +/* Normalize coefficients for one sample/direction */ +static void +avs_normalize_coeffs_1(float *coeffs, int num_coeffs, float epsilon) +{ + float s, sum = 0.0; + int i, c, r, r1; + + for (i = 0; i < num_coeffs; i++) + sum += coeffs[i]; + + if (sum < epsilon) + return; + + s = 0.0; + for (i = 0; i < num_coeffs; i++) + s += (coeffs[i] = avs_trunc_coeff(coeffs[i] / sum, epsilon)); + + /* Distribute the remaining bits, while allocating more to the center */ + c = num_coeffs/2; + c = c - (coeffs[c - 1] > coeffs[c]); + + r = (1.0f - s) / epsilon; + r1 = r / 4; + if (coeffs[c + 1] == 0.0f) + coeffs[c] += r * epsilon; + else { + coeffs[c] += (r - 2*r1) * epsilon; + coeffs[c - 1] += r1 * epsilon; + coeffs[c + 1] += r1 * epsilon; + } +} + +/* Normalize all coefficients so that their sum yields 1.0f */ +static void +avs_normalize_coeffs(AVSCoeffs *coeffs, const AVSConfig *config) +{ + avs_normalize_coeffs_1(coeffs->y_k_h, config->num_luma_coeffs, + config->coeff_epsilon); + avs_normalize_coeffs_1(coeffs->y_k_v, config->num_luma_coeffs, + config->coeff_epsilon); + avs_normalize_coeffs_1(coeffs->uv_k_h, config->num_chroma_coeffs, + config->coeff_epsilon); + avs_normalize_coeffs_1(coeffs->uv_k_v, config->num_chroma_coeffs, + config->coeff_epsilon); +} + +/* Validate coefficients for one sample/direction */ +static bool +avs_validate_coeffs_1(float *coeffs, int num_coeffs, const float *min_coeffs, + const float *max_coeffs) +{ + int i; + + for (i = 0; i < num_coeffs; i++) { + if (coeffs[i] < min_coeffs[i] || coeffs[i] > max_coeffs[i]) + return false; + } + return true; +} + +/* Validate coefficients wrt. the supplied range in config */ +static bool +avs_validate_coeffs(AVSCoeffs *coeffs, const AVSConfig *config) +{ + const AVSCoeffs * const min_coeffs = &config->coeff_range.lower_bound; + const AVSCoeffs * const max_coeffs = &config->coeff_range.upper_bound; + + return avs_validate_coeffs_1(coeffs->y_k_h, config->num_luma_coeffs, + min_coeffs->y_k_h, max_coeffs->y_k_h) && + avs_validate_coeffs_1(coeffs->y_k_v, config->num_luma_coeffs, + min_coeffs->y_k_v, max_coeffs->y_k_v) && + avs_validate_coeffs_1(coeffs->uv_k_h, config->num_chroma_coeffs, + min_coeffs->uv_k_h, max_coeffs->uv_k_h) && + avs_validate_coeffs_1(coeffs->uv_k_v, config->num_chroma_coeffs, + min_coeffs->uv_k_v, max_coeffs->uv_k_v); +} + +/* Generate coefficients for default quality (bilinear) */ +static void +avs_gen_coeffs_linear(float *coeffs, int num_coeffs, int phase, int num_phases, + float f) +{ + const int c = num_coeffs/2 - 1; + const float p = (float)phase / (num_phases*2); + + avs_init_coeffs(coeffs, num_coeffs); + coeffs[c] = avs_kernel_linear(p); + coeffs[c + 1] = avs_kernel_linear(p - 1); +} + +/* Generate coefficients for high quality (lanczos) */ +static void +avs_gen_coeffs_lanczos(float *coeffs, int num_coeffs, int phase, int num_phases, + float f) +{ + const int c = num_coeffs/2 - 1; + const int l = num_coeffs > 4 ? 3 : 2; + const float p = (float)phase / (num_phases*2); + int i; + + if (f > 1.0f) + f = 1.0f; + for (i = 0; i < num_coeffs; i++) + coeffs[i] = avs_kernel_lanczos((i - (c + p)) * f, l); +} + +/* Generate coefficients with the supplied scaler */ +static bool +avs_gen_coeffs(AVSState *avs, float sx, float sy, AVSGenCoeffsFunc gen_coeffs) +{ + const AVSConfig * const config = avs->config; + int i; + + for (i = 0; i <= config->num_phases; i++) { + AVSCoeffs * const coeffs = &avs->coeffs[i]; + + gen_coeffs(coeffs->y_k_h, config->num_luma_coeffs, + i, config->num_phases, sx); + gen_coeffs(coeffs->uv_k_h, config->num_chroma_coeffs, + i, config->num_phases, sx); + gen_coeffs(coeffs->y_k_v, config->num_luma_coeffs, + i, config->num_phases, sy); + gen_coeffs(coeffs->uv_k_v, config->num_chroma_coeffs, + i, config->num_phases, sy); + + avs_normalize_coeffs(coeffs, config); + if (!avs_validate_coeffs(coeffs, config)) + return false; + } + return true; +} + +/* Initializes AVS state with the supplied configuration */ +void +avs_init_state(AVSState *avs, const AVSConfig *config) +{ + avs->config = config; + avs->flags = 0; + avs->scale_x = 0.0f; + avs->scale_y = 0.0f; +} + +/* Checks whether the AVS scaling parameters changed */ +static inline bool +avs_params_changed(AVSState *avs, float sx, float sy, uint32_t flags) +{ + if (avs->flags != flags) + return true; + + if (flags >= VA_FILTER_SCALING_HQ) { + if (avs->scale_x != sx || avs->scale_y != sy) + return true; + } + else { + if (avs->scale_x == 0.0f || avs->scale_y == 0.0f) + return true; + } + return false; +} + +/* Updates AVS coefficients for the supplied factors and quality level */ +bool +avs_update_coefficients(AVSState *avs, float sx, float sy, uint32_t flags) +{ + AVSGenCoeffsFunc gen_coeffs; + + flags &= VA_FILTER_SCALING_MASK; + if (!avs_params_changed(avs, sx, sy, flags)) + return true; + + switch (flags) { + case VA_FILTER_SCALING_HQ: + gen_coeffs = avs_gen_coeffs_lanczos; + break; + default: + gen_coeffs = avs_gen_coeffs_linear; + break; + } + if (!avs_gen_coeffs(avs, sx, sy, gen_coeffs)) { + assert(0 && "invalid set of coefficients generated"); + return false; + } + + avs->flags = flags; + avs->scale_x = sx; + avs->scale_y = sy; + return true; +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_vpp_avs.h intel-vaapi-driver-1.7.1/src/i965_vpp_avs.h --- intel-vaapi-driver-1.0.15/src/i965_vpp_avs.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_vpp_avs.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,113 @@ +/* + * i965_vpp_avs.h - Adaptive Video Scaler (AVS) block + * + * Copyright (C) 2014 Intel Corporation + * Author: Gwenole Beauchesne + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef I965_VPP_AVS_H +#define I965_VPP_AVS_H + +#include +#include + +/** Maximum number of phases for the sharp filter */ +#define AVS_MAX_PHASES 32 + +/** Maximum number of coefficients for luma samples */ +#define AVS_MAX_LUMA_COEFFS 8 + +/** Maximum number of coefficients for chroma samples */ +#define AVS_MAX_CHROMA_COEFFS 4 + +typedef struct avs_coeffs AVSCoeffs; +typedef struct avs_coeffs_range AVSCoeffsRange; +typedef struct avs_config AVSConfig; +typedef struct avs_state AVSState; + +/** AVS coefficients for one phase */ +struct avs_coeffs { + /** Coefficients for luma samples on the X-axis (horizontal) */ + float y_k_h[AVS_MAX_LUMA_COEFFS]; + /** Coefficients for luma samples on the Y-axis (vertical) */ + float y_k_v[AVS_MAX_LUMA_COEFFS]; + /** Coefficients for chroma samples on the X-axis (horizontal) */ + float uv_k_h[AVS_MAX_CHROMA_COEFFS]; + /** Coefficients for chroma samples on the Y-axis (vertical) */ + float uv_k_v[AVS_MAX_CHROMA_COEFFS]; +}; + +/** AVS coefficients range used for validation */ +struct avs_coeffs_range { + /** Lower bound for all coefficients */ + AVSCoeffs lower_bound; + /** Upper bound for all coefficients */ + AVSCoeffs upper_bound; +}; + +/** Static configuration (per-generation) */ +struct avs_config { + /** Number of bits used for the fractional part of a coefficient */ + int coeff_frac_bits; + /** The smallest float that could be represented as a coefficient */ + float coeff_epsilon; + /** Coefficients range */ + AVSCoeffsRange coeff_range; + /** Number of phases for the sharp filter */ + int num_phases; + /** Number of coefficients for luma samples */ + int num_luma_coeffs; + /** Number of coefficients for chroma samples */ + int num_chroma_coeffs; +}; + +/** AVS block state */ +struct avs_state { + /** Per-generation configuration parameters */ + const AVSConfig *config; + /** Scaling flags */ + uint32_t flags; + /** Scaling factor on the X-axis (horizontal) */ + float scale_x; + /** Scaling factor on the Y-axis (vertical) */ + float scale_y; + /** Coefficients for the polyphase scaler */ + AVSCoeffs coeffs[AVS_MAX_PHASES + 1]; +}; + +/** Initializes AVS state with the supplied configuration */ +void +avs_init_state(AVSState *avs, const AVSConfig *config); + +/** Updates AVS coefficients for the supplied factors and quality level */ +bool +avs_update_coefficients(AVSState *avs, float sx, float sy, uint32_t flags); + +/** Checks whether AVS is needed, e.g. if high-quality scaling is requested */ +static inline bool +avs_is_needed(uint32_t flags) +{ + return ((flags & VA_FILTER_SCALING_MASK) >= VA_FILTER_SCALING_HQ); +} + +#endif /* I965_VPP_AVS_H */ diff -Nru intel-vaapi-driver-1.0.15/src/i965_yuv_coefs.c intel-vaapi-driver-1.7.1/src/i965_yuv_coefs.c --- intel-vaapi-driver-1.0.15/src/i965_yuv_coefs.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_yuv_coefs.c 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,73 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "i965_yuv_coefs.h" + +static const float yuv_to_rgb_bt601[] = { + 1.164, 0, 1.596, -0.06275, + 1.164, -0.392, -0.813, -0.50196, + 1.164, 2.017, 0, -0.50196, +}; + +static const float yuv_to_rgb_bt709[] = { + 1.164, 0, 1.793, -0.06275, + 1.164, -0.213, -0.533, -0.50196, + 1.164, 2.112, 0, -0.50196, +}; + +static const float yuv_to_rgb_smpte_240[] = { + 1.164, 0, 1.794, -0.06275, + 1.164, -0.258, -0.5425, -0.50196, + 1.164, 2.078, 0, -0.50196, +}; + +VAProcColorStandardType i915_filter_to_color_standard (unsigned int filter) { + switch (filter & VA_SRC_COLOR_MASK) { + case VA_SRC_BT601: + return VAProcColorStandardBT601; + case VA_SRC_BT709: + return VAProcColorStandardBT709; + case VA_SRC_SMPTE_240: + return VAProcColorStandardSMPTE240M; + default: + return VAProcColorStandardBT601; + } +} + +const float *i915_color_standard_to_coefs (VAProcColorStandardType standard, size_t *length) { + switch (standard) { + case VAProcColorStandardBT601: + *length = sizeof(yuv_to_rgb_bt601); + return yuv_to_rgb_bt601; + case VAProcColorStandardBT709: + *length = sizeof(yuv_to_rgb_bt709); + return yuv_to_rgb_bt709; + case VAProcColorStandardSMPTE240M: + *length = sizeof(yuv_to_rgb_smpte_240); + return yuv_to_rgb_smpte_240; + default: + *length = sizeof(yuv_to_rgb_bt601); + return yuv_to_rgb_bt601; + } +} diff -Nru intel-vaapi-driver-1.0.15/src/i965_yuv_coefs.h intel-vaapi-driver-1.7.1/src/i965_yuv_coefs.h --- intel-vaapi-driver-1.0.15/src/i965_yuv_coefs.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/i965_yuv_coefs.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,36 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef __I965_YUV_COEFS_H__ +#define __I965_YUV_COEFS_H__ + +#include "sysdeps.h" + +#include +#include + +VAProcColorStandardType i915_filter_to_color_standard (unsigned int filter); +const float *i915_color_standard_to_coefs (VAProcColorStandardType standard, size_t *length); + +#endif /* __I965_YUV_COEFS_H__ */ diff -Nru intel-vaapi-driver-1.0.15/src/intel_batchbuffer.c intel-vaapi-driver-1.7.1/src/intel_batchbuffer.c --- intel-vaapi-driver-1.0.15/src/intel_batchbuffer.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_batchbuffer.c 2016-06-03 06:05:58.000000000 +0000 @@ -29,19 +29,29 @@ #include #include -#include - #include "intel_batchbuffer.h" +#define MAX_BATCH_SIZE 0x400000 + + +#define LOCAL_I915_EXEC_BSD_MASK (3<<13) +#define LOCAL_I915_EXEC_BSD_DEFAULT (0<<13) /* default ping-pong mode */ +#define LOCAL_I915_EXEC_BSD_RING0 (1<<13) +#define LOCAL_I915_EXEC_BSD_RING1 (2<<13) + static void -intel_batchbuffer_reset(struct intel_batchbuffer *batch) +intel_batchbuffer_reset(struct intel_batchbuffer *batch, int buffer_size) { struct intel_driver_data *intel = batch->intel; - int batch_size = BATCH_SIZE; + int batch_size = buffer_size; + int ring_flag; - assert(batch->flag == I915_EXEC_RENDER || - batch->flag == I915_EXEC_BLT || - batch->flag == I915_EXEC_BSD); + ring_flag = batch->flag & I915_EXEC_RING_MASK; + + assert(ring_flag == I915_EXEC_RENDER || + ring_flag == I915_EXEC_BLT || + ring_flag == I915_EXEC_BSD || + ring_flag == I915_EXEC_VEBOX); dri_bo_unreference(batch->buffer); batch->buffer = dri_bo_alloc(intel->bufmgr, @@ -65,17 +75,41 @@ struct intel_batchbuffer * -intel_batchbuffer_new(struct intel_driver_data *intel, int flag) +intel_batchbuffer_new(struct intel_driver_data *intel, int flag, int buffer_size) { struct intel_batchbuffer *batch = calloc(1, sizeof(*batch)); - assert(flag == I915_EXEC_RENDER || - flag == I915_EXEC_BSD || - flag == I915_EXEC_BLT); + int ring_flag; + + ring_flag = flag & I915_EXEC_RING_MASK; + assert(ring_flag == I915_EXEC_RENDER || + ring_flag == I915_EXEC_BSD || + ring_flag == I915_EXEC_BLT || + ring_flag == I915_EXEC_VEBOX); + + if (!buffer_size || buffer_size < BATCH_SIZE) { + buffer_size = BATCH_SIZE; + } + + /* the buffer size can't exceed 4M */ + if (buffer_size > MAX_BATCH_SIZE) { + buffer_size = MAX_BATCH_SIZE; + } + assert(batch); batch->intel = intel; batch->flag = flag; batch->run = drm_intel_bo_mrb_exec; - intel_batchbuffer_reset(batch); + + if (IS_GEN6(intel->device_info) && + flag == I915_EXEC_RENDER) + batch->wa_render_bo = dri_bo_alloc(intel->bufmgr, + "wa scratch", + 4096, + 4096); + else + batch->wa_render_bo = NULL; + + intel_batchbuffer_reset(batch, buffer_size); return batch; } @@ -88,6 +122,7 @@ } dri_bo_unreference(batch->buffer); + dri_bo_unreference(batch->wa_render_bo); free(batch); } @@ -110,7 +145,7 @@ dri_bo_unmap(batch->buffer); used = batch->ptr - batch->map; batch->run(batch->buffer, used, 0, 0, 0, batch->flag); - intel_batchbuffer_reset(batch); + intel_batchbuffer_reset(batch, batch->size); } void @@ -133,6 +168,24 @@ } void +intel_batchbuffer_emit_reloc64(struct intel_batchbuffer *batch, dri_bo *bo, + uint32_t read_domains, uint32_t write_domains, + uint32_t delta) +{ + assert(batch->ptr - batch->map < batch->size); + dri_bo_emit_reloc(batch->buffer, read_domains, write_domains, + delta, batch->ptr - batch->map, bo); + + /* Using the old buffer offset, write in what the right data would be, in + * case the buffer doesn't move and we can short-circuit the relocation + * processing in the kernel. + */ + uint64_t offset = bo->offset64 + delta; + intel_batchbuffer_emit_dword(batch, offset); + intel_batchbuffer_emit_dword(batch, offset >> 32); +} + +void intel_batchbuffer_require_space(struct intel_batchbuffer *batch, unsigned int size) { @@ -160,38 +213,91 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch) { struct intel_driver_data *intel = batch->intel; + int ring_flag; - if (IS_GEN6(intel->device_id) || - IS_GEN7(intel->device_id)) { - if (batch->flag == I915_EXEC_RENDER) { - BEGIN_BATCH(batch, 4); - OUT_BATCH(batch, CMD_PIPE_CONTROL | 0x2); + ring_flag = batch->flag & I915_EXEC_RING_MASK; - if (IS_GEN6(intel->device_id)) - OUT_BATCH(batch, + if (IS_GEN6(intel->device_info) || + IS_GEN7(intel->device_info) || + IS_GEN8(intel->device_info) || + IS_GEN9(intel->device_info)) { + if (ring_flag == I915_EXEC_RENDER) { + if (IS_GEN8(intel->device_info) || IS_GEN9(intel->device_info)) { + BEGIN_BATCH(batch, 6); + OUT_BATCH(batch, CMD_PIPE_CONTROL | (6 - 2)); + + OUT_BATCH(batch, + CMD_PIPE_CONTROL_CS_STALL | + CMD_PIPE_CONTROL_WC_FLUSH | + CMD_PIPE_CONTROL_TC_FLUSH | + CMD_PIPE_CONTROL_DC_FLUSH | + CMD_PIPE_CONTROL_NOWRITE); + OUT_BATCH(batch, 0); /* write address */ + OUT_BATCH(batch, 0); + OUT_BATCH(batch, 0); /* write data */ + OUT_BATCH(batch, 0); + ADVANCE_BATCH(batch); + } else if (IS_GEN6(intel->device_info)) { + assert(batch->wa_render_bo); + + BEGIN_BATCH(batch, 4 * 3); + + OUT_BATCH(batch, CMD_PIPE_CONTROL | (4 - 2)); + OUT_BATCH(batch, + CMD_PIPE_CONTROL_CS_STALL | + CMD_PIPE_CONTROL_STALL_AT_SCOREBOARD); + OUT_BATCH(batch, 0); /* address */ + OUT_BATCH(batch, 0); /* write data */ + + OUT_BATCH(batch, CMD_PIPE_CONTROL | (4 - 2)); + OUT_BATCH(batch, CMD_PIPE_CONTROL_WRITE_QWORD); + OUT_RELOC(batch, + batch->wa_render_bo, + I915_GEM_DOMAIN_INSTRUCTION, + I915_GEM_DOMAIN_INSTRUCTION, + 0); + OUT_BATCH(batch, 0); /* write data */ + + /* now finally the _real flush */ + OUT_BATCH(batch, CMD_PIPE_CONTROL | (4 - 2)); + OUT_BATCH(batch, CMD_PIPE_CONTROL_WC_FLUSH | CMD_PIPE_CONTROL_TC_FLUSH | CMD_PIPE_CONTROL_NOWRITE); - else + OUT_BATCH(batch, 0); /* write address */ + OUT_BATCH(batch, 0); /* write data */ + ADVANCE_BATCH(batch); + } else { + BEGIN_BATCH(batch, 4); + OUT_BATCH(batch, CMD_PIPE_CONTROL | (4 - 2)); + OUT_BATCH(batch, CMD_PIPE_CONTROL_WC_FLUSH | CMD_PIPE_CONTROL_TC_FLUSH | CMD_PIPE_CONTROL_DC_FLUSH | CMD_PIPE_CONTROL_NOWRITE); + OUT_BATCH(batch, 0); /* write address */ + OUT_BATCH(batch, 0); /* write data */ + ADVANCE_BATCH(batch); + } - OUT_BATCH(batch, 0); - OUT_BATCH(batch, 0); - ADVANCE_BATCH(batch); } else { - if (batch->flag == I915_EXEC_BLT) { + if (ring_flag == I915_EXEC_BLT) { BEGIN_BLT_BATCH(batch, 4); OUT_BLT_BATCH(batch, MI_FLUSH_DW); OUT_BLT_BATCH(batch, 0); OUT_BLT_BATCH(batch, 0); OUT_BLT_BATCH(batch, 0); ADVANCE_BLT_BATCH(batch); + }else if (ring_flag == I915_EXEC_VEBOX) { + BEGIN_VEB_BATCH(batch, 4); + OUT_VEB_BATCH(batch, MI_FLUSH_DW); + OUT_VEB_BATCH(batch, 0); + OUT_VEB_BATCH(batch, 0); + OUT_VEB_BATCH(batch, 0); + ADVANCE_VEB_BATCH(batch); } else { - assert(batch->flag == I915_EXEC_BSD); + assert(ring_flag == I915_EXEC_BSD); BEGIN_BCS_BATCH(batch, 4); OUT_BCS_BATCH(batch, MI_FLUSH_DW | MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE); OUT_BCS_BATCH(batch, 0); @@ -201,12 +307,12 @@ } } } else { - if (batch->flag == I915_EXEC_RENDER) { + if (ring_flag == I915_EXEC_RENDER) { BEGIN_BATCH(batch, 1); OUT_BATCH(batch, MI_FLUSH | MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE); - ADVANCE_BATCH(batch); - } else { - assert(batch->flag == I915_EXEC_BSD); + ADVANCE_BATCH(batch); + } else { + assert(ring_flag == I915_EXEC_BSD); BEGIN_BCS_BATCH(batch, 1); OUT_BCS_BATCH(batch, MI_FLUSH | MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE); ADVANCE_BCS_BATCH(batch); @@ -230,9 +336,14 @@ void intel_batchbuffer_check_batchbuffer_flag(struct intel_batchbuffer *batch, int flag) { - if (flag != I915_EXEC_RENDER && - flag != I915_EXEC_BLT && - flag != I915_EXEC_BSD) + int ring_flag; + + ring_flag = flag & I915_EXEC_RING_MASK; + + if (ring_flag != I915_EXEC_RENDER && + ring_flag != I915_EXEC_BLT && + ring_flag != I915_EXEC_BSD && + ring_flag != I915_EXEC_VEBOX) return; if (batch->flag == flag) @@ -278,8 +389,58 @@ } void +intel_batchbuffer_start_atomic_veb(struct intel_batchbuffer *batch, unsigned int size) +{ + intel_batchbuffer_start_atomic_helper(batch, I915_EXEC_VEBOX, size); +} + +void intel_batchbuffer_start_atomic_bcs_override(struct intel_batchbuffer *batch, unsigned int size, + bsd_ring_flag override_flag) +{ + uint32_t ring_flag; + + switch(override_flag) { + case BSD_RING0: + ring_flag = I915_EXEC_BSD + LOCAL_I915_EXEC_BSD_RING0; + break; + case BSD_RING1: + ring_flag = I915_EXEC_BSD + LOCAL_I915_EXEC_BSD_RING1; + break; + default: + ring_flag = I915_EXEC_BSD + LOCAL_I915_EXEC_BSD_DEFAULT; + break; + } + intel_batchbuffer_start_atomic_helper(batch, ring_flag, size); +} + + +void intel_batchbuffer_end_atomic(struct intel_batchbuffer *batch) { assert(batch->atomic); batch->atomic = 0; } + +int +intel_batchbuffer_used_size(struct intel_batchbuffer *batch) +{ + return batch->ptr - batch->map; +} + +void +intel_batchbuffer_align(struct intel_batchbuffer *batch, unsigned int alignedment) +{ + int used = batch->ptr - batch->map; + int pad_size; + + assert((alignedment & 3) == 0); + pad_size = ALIGN(used, alignedment) - used; + assert((pad_size & 3) == 0); + assert(intel_batchbuffer_space(batch) >= pad_size); + + while (pad_size >= 4) { + intel_batchbuffer_emit_dword(batch, 0); + pad_size -= 4; + } +} + diff -Nru intel-vaapi-driver-1.0.15/src/intel_batchbuffer_dump.c intel-vaapi-driver-1.7.1/src/intel_batchbuffer_dump.c --- intel-vaapi-driver-1.0.15/src/intel_batchbuffer_dump.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_batchbuffer_dump.c 2016-06-03 06:05:58.000000000 +0000 @@ -6,6 +6,8 @@ #include "intel_driver.h" #include "intel_batchbuffer_dump.h" +#ifdef I965_DEBUG + #define BUFFER_FAIL(_count, _len, _name) do { \ fprintf(gout, "Buffer size too small in %s (%d < %d)\n", \ (_name), (_count), (_len)); \ @@ -769,3 +771,5 @@ return failures; } + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/intel_batchbuffer_dump.h intel-vaapi-driver-1.7.1/src/intel_batchbuffer_dump.h --- intel-vaapi-driver-1.0.15/src/intel_batchbuffer_dump.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_batchbuffer_dump.h 2016-06-03 06:05:58.000000000 +0000 @@ -50,6 +50,10 @@ #define OPCODE_MI_FLUSH 0x04 #define OPCODE_MI_BATCH_BUFFER_END 0x0A +#ifdef I965_DEBUG + int intel_batchbuffer_dump(unsigned int *data, unsigned int offset, int count, unsigned int device); +#endif + #endif /* _INTEL_BATCHBUFFER_DUMP_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/intel_batchbuffer.h intel-vaapi-driver-1.7.1/src/intel_batchbuffer.h --- intel-vaapi-driver-1.0.15/src/intel_batchbuffer.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_batchbuffer.h 2016-06-16 00:57:46.000000000 +0000 @@ -24,18 +24,25 @@ int (*run)(drm_intel_bo *bo, int used, drm_clip_rect_t *cliprects, int num_cliprects, int DR4, unsigned int ring_flag); + + /* Used for Sandybdrige workaround */ + dri_bo *wa_render_bo; }; -struct intel_batchbuffer *intel_batchbuffer_new(struct intel_driver_data *intel, int flag); +struct intel_batchbuffer *intel_batchbuffer_new(struct intel_driver_data *intel, int flag, int buffer_size); void intel_batchbuffer_free(struct intel_batchbuffer *batch); void intel_batchbuffer_start_atomic(struct intel_batchbuffer *batch, unsigned int size); void intel_batchbuffer_start_atomic_bcs(struct intel_batchbuffer *batch, unsigned int size); void intel_batchbuffer_start_atomic_blt(struct intel_batchbuffer *batch, unsigned int size); +void intel_batchbuffer_start_atomic_veb(struct intel_batchbuffer *batch, unsigned int size); void intel_batchbuffer_end_atomic(struct intel_batchbuffer *batch); void intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, unsigned int x); void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch, dri_bo *bo, uint32_t read_domains, uint32_t write_domains, uint32_t delta); +void intel_batchbuffer_emit_reloc64(struct intel_batchbuffer *batch, dri_bo *bo, + uint32_t read_domains, uint32_t write_domains, + uint32_t delta); void intel_batchbuffer_require_space(struct intel_batchbuffer *batch, unsigned int size); void intel_batchbuffer_data(struct intel_batchbuffer *batch, void *data, unsigned int size); void intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch); @@ -44,10 +51,21 @@ void intel_batchbuffer_advance_batch(struct intel_batchbuffer *batch); void intel_batchbuffer_check_batchbuffer_flag(struct intel_batchbuffer *batch, int flag); int intel_batchbuffer_check_free_space(struct intel_batchbuffer *batch, int size); +int intel_batchbuffer_used_size(struct intel_batchbuffer *batch); +void intel_batchbuffer_align(struct intel_batchbuffer *batch, unsigned int alignedment); + +typedef enum { + BSD_DEFAULT, + BSD_RING0, + BSD_RING1, +} bsd_ring_flag; + +void intel_batchbuffer_start_atomic_bcs_override(struct intel_batchbuffer *batch, unsigned int size, + bsd_ring_flag override_flag); #define __BEGIN_BATCH(batch, n, f) do { \ - assert(f == batch->flag); \ - intel_batchbuffer_check_batchbuffer_flag(batch, f); \ + assert(f == (batch->flag & I915_EXEC_RING_MASK)); \ + intel_batchbuffer_check_batchbuffer_flag(batch, batch->flag); \ intel_batchbuffer_require_space(batch, (n) * 4); \ intel_batchbuffer_begin_batch(batch, (n)); \ } while (0) @@ -63,6 +81,13 @@ delta); \ } while (0) +/* Handle 48-bit address relocations for Gen8+ */ +#define __OUT_RELOC64(batch, bo, read_domains, write_domain, delta) do { \ + intel_batchbuffer_emit_reloc64(batch, bo, \ + read_domains, write_domain, \ + delta); \ + } while (0) + #define __ADVANCE_BATCH(batch) do { \ intel_batchbuffer_advance_batch(batch); \ } while (0) @@ -70,11 +95,12 @@ #define BEGIN_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_RENDER) #define BEGIN_BLT_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_BLT) #define BEGIN_BCS_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_BSD) - +#define BEGIN_VEB_BATCH(batch, n) __BEGIN_BATCH(batch, n, I915_EXEC_VEBOX) #define OUT_BATCH(batch, d) __OUT_BATCH(batch, d) #define OUT_BLT_BATCH(batch, d) __OUT_BATCH(batch, d) #define OUT_BCS_BATCH(batch, d) __OUT_BATCH(batch, d) +#define OUT_VEB_BATCH(batch, d) __OUT_BATCH(batch, d) #define OUT_RELOC(batch, bo, read_domains, write_domain, delta) \ __OUT_RELOC(batch, bo, read_domains, write_domain, delta) @@ -82,9 +108,14 @@ __OUT_RELOC(batch, bo, read_domains, write_domain, delta) #define OUT_BCS_RELOC(batch, bo, read_domains, write_domain, delta) \ __OUT_RELOC(batch, bo, read_domains, write_domain, delta) +#define OUT_RELOC64(batch, bo, read_domains, write_domain, delta) \ + __OUT_RELOC64(batch, bo, read_domains, write_domain, delta) +#define OUT_BCS_RELOC64(batch, bo, read_domains, write_domain, delta) \ + __OUT_RELOC64(batch, bo, read_domains, write_domain, delta) #define ADVANCE_BATCH(batch) __ADVANCE_BATCH(batch) #define ADVANCE_BLT_BATCH(batch) __ADVANCE_BATCH(batch) #define ADVANCE_BCS_BATCH(batch) __ADVANCE_BATCH(batch) +#define ADVANCE_VEB_BATCH(batch) __ADVANCE_BATCH(batch) #endif /* _INTEL_BATCHBUFFER_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/intel_driver.c intel-vaapi-driver-1.7.1/src/intel_driver.c --- intel-vaapi-driver-1.0.15/src/intel_driver.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_driver.c 2016-06-03 06:05:58.000000000 +0000 @@ -27,13 +27,22 @@ * */ -#include +#include "sysdeps.h" -#include +#include #include "intel_batchbuffer.h" #include "intel_memman.h" #include "intel_driver.h" +uint32_t g_intel_debug_option_flags = 0; + +#ifdef I915_PARAM_HAS_BSD2 +#define LOCAL_I915_PARAM_HAS_BSD2 I915_PARAM_HAS_BSD2 +#endif + +#ifndef LOCAL_I915_PARAM_HAS_BSD2 +#define LOCAL_I915_PARAM_HAS_BSD2 30 +#endif static Bool intel_driver_get_param(struct intel_driver_data *intel, int param, int *value) @@ -46,90 +55,90 @@ return drmCommandWriteRead(intel->fd, DRM_I915_GETPARAM, &gp, sizeof(gp)) == 0; } -Bool -intel_driver_init(VADriverContextP ctx) +static void intel_driver_get_revid(struct intel_driver_data *intel, int *value) { - struct intel_driver_data *intel = intel_driver_data(ctx); - struct dri_state *dri_state = (struct dri_state *)ctx->dri_state; - int has_exec2, has_bsd, has_blt; +#define PCI_REVID 8 + FILE *fp; + char config_data[16]; + + fp = fopen("/sys/devices/pci0000:00/0000:00:02.0/config", "r"); + + if (fp) { + if (fread(config_data, 1, 16, fp)) + *value = config_data[PCI_REVID]; + else + *value = 2; /* assume it is at least B-steping */ + fclose(fp); + } else { + *value = 2; /* assume it is at least B-steping */ + } - assert(dri_state); - assert(dri_state->driConnectedFlag == VA_DRI2 || - dri_state->driConnectedFlag == VA_DRI1); + return; +} - intel->fd = dri_state->fd; - intel->dri2Enabled = (dri_state->driConnectedFlag == VA_DRI2); +extern const struct intel_device_info *i965_get_device_info(int devid); - if (!intel->dri2Enabled) { - drm_sarea_t *pSAREA; +bool +intel_driver_init(VADriverContextP ctx) +{ + struct intel_driver_data *intel = intel_driver_data(ctx); + struct drm_state * const drm_state = (struct drm_state *)ctx->drm_state; + int has_exec2 = 0, has_bsd = 0, has_blt = 0, has_vebox = 0; + char *env_str = NULL; + int ret_value = 0; + + g_intel_debug_option_flags = 0; + if ((env_str = getenv("VA_INTEL_DEBUG"))) + g_intel_debug_option_flags = atoi(env_str); + + if (g_intel_debug_option_flags) + fprintf(stderr, "g_intel_debug_option_flags:%x\n", g_intel_debug_option_flags); + + assert(drm_state); + assert(VA_CHECK_DRM_AUTH_TYPE(ctx, VA_DRM_AUTH_DRI1) || + VA_CHECK_DRM_AUTH_TYPE(ctx, VA_DRM_AUTH_DRI2) || + VA_CHECK_DRM_AUTH_TYPE(ctx, VA_DRM_AUTH_CUSTOM)); + + intel->fd = drm_state->fd; + intel->dri2Enabled = (VA_CHECK_DRM_AUTH_TYPE(ctx, VA_DRM_AUTH_DRI2) || + VA_CHECK_DRM_AUTH_TYPE(ctx, VA_DRM_AUTH_CUSTOM)); - pSAREA = (drm_sarea_t *)dri_state->pSAREA; - intel->hHWContext = dri_state->hwContext; - intel->driHwLock = (drmLock *)(&pSAREA->lock); - intel->pPrivSarea = (void *)pSAREA + sizeof(drm_sarea_t); + if (!intel->dri2Enabled) { + return false; } intel->locked = 0; pthread_mutex_init(&intel->ctxmutex, NULL); - intel_driver_get_param(intel, I915_PARAM_CHIPSET_ID, &intel->device_id); + intel_memman_init(intel); + intel->device_id = drm_intel_bufmgr_gem_get_devid(intel->bufmgr); + intel->device_info = i965_get_device_info(intel->device_id); + + if (!intel->device_info) + return false; + if (intel_driver_get_param(intel, I915_PARAM_HAS_EXECBUF2, &has_exec2)) intel->has_exec2 = has_exec2; if (intel_driver_get_param(intel, I915_PARAM_HAS_BSD, &has_bsd)) intel->has_bsd = has_bsd; if (intel_driver_get_param(intel, I915_PARAM_HAS_BLT, &has_blt)) intel->has_blt = has_blt; + if (intel_driver_get_param(intel, I915_PARAM_HAS_VEBOX, &has_vebox)) + intel->has_vebox = !!has_vebox; - intel_memman_init(intel); - return True; + intel->has_bsd2 = 0; + if (intel_driver_get_param(intel, LOCAL_I915_PARAM_HAS_BSD2, &ret_value)) + intel->has_bsd2 = !!ret_value; + + intel_driver_get_revid(intel, &intel->revision); + return true; } -Bool +void intel_driver_terminate(VADriverContextP ctx) { struct intel_driver_data *intel = intel_driver_data(ctx); intel_memman_terminate(intel); pthread_mutex_destroy(&intel->ctxmutex); - - return True; -} - -void -intel_lock_hardware(VADriverContextP ctx) -{ - struct intel_driver_data *intel = intel_driver_data(ctx); - char __ret = 0; - - PPTHREAD_MUTEX_LOCK(); - - assert(!intel->locked); - - if (!intel->dri2Enabled) { - DRM_CAS(intel->driHwLock, - intel->hHWContext, - (DRM_LOCK_HELD|intel->hHWContext), - __ret); - - if (__ret) { - drmGetLock(intel->fd, intel->hHWContext, 0); - } - } - - intel->locked = 1; -} - -void -intel_unlock_hardware(VADriverContextP ctx) -{ - struct intel_driver_data *intel = intel_driver_data(ctx); - - if (!intel->dri2Enabled) { - DRM_UNLOCK(intel->fd, - intel->driHwLock, - intel->hHWContext); - } - - intel->locked = 0; - PPTHREAD_MUTEX_UNLOCK(); } diff -Nru intel-vaapi-driver-1.0.15/src/intel_driver.h intel-vaapi-driver-1.7.1/src/intel_driver.h --- intel-vaapi-driver-1.0.15/src/intel_driver.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_driver.h 2016-06-16 00:57:46.000000000 +0000 @@ -1,15 +1,17 @@ #ifndef _INTEL_DRIVER_H_ #define _INTEL_DRIVER_H_ +#include #include #include +#include -#include #include #include #include #include +#include "va_backend_compat.h" #include "intel_compiler.h" @@ -29,18 +31,42 @@ #define MI_FLUSH_STATE_INSTRUCTION_CACHE_INVALIDATE (0x1 << 0) #define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 0x2) +#define MI_FLUSH_DW2 (CMD_MI | (0x26 << 23) | 0x3) #define MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE (0x1 << 7) +#define MI_FLUSH_DW_NOWRITE (0 << 14) +#define MI_FLUSH_DW_WRITE_QWORD (1 << 14) +#define MI_FLUSH_DW_WRITE_TIME (3 << 14) + +#define MI_STORE_DATA_IMM (CMD_MI | (0x20 << 23)) + +#define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23)) + +#define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23)) + +#define MI_LOAD_REGISTER_MEM (CMD_MI | (0x29 << 23)) + +#define MI_LOAD_REGISTER_REG (CMD_MI | (0x2A << 23)) + +#define MI_MATH (CMD_MI | (0x1A << 23)) + +#define MI_CONDITIONAL_BATCH_BUFFER_END (CMD_MI | (0x36 << 23)) +#define MI_COMPARE_MASK_MODE_ENANBLED (1 << 19) #define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | 0x04) #define XY_COLOR_BLT_WRITE_ALPHA (1 << 21) #define XY_COLOR_BLT_WRITE_RGB (1 << 20) #define XY_COLOR_BLT_DST_TILED (1 << 11) +#define GEN8_XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | 0x05) + /* BR13 */ +#define BR13_8 (0x0 << 24) #define BR13_565 (0x1 << 24) +#define BR13_1555 (0x2 << 24) #define BR13_8888 (0x3 << 24) #define CMD_PIPE_CONTROL (CMD_3D | (3 << 27) | (2 << 24) | (0 << 16)) +#define CMD_PIPE_CONTROL_CS_STALL (1 << 20) #define CMD_PIPE_CONTROL_NOWRITE (0 << 14) #define CMD_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define CMD_PIPE_CONTROL_WRITE_DEPTH (2 << 14) @@ -53,15 +79,37 @@ #define CMD_PIPE_CONTROL_DC_FLUSH (1 << 5) #define CMD_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define CMD_PIPE_CONTROL_LOCAL_PGTT (0 << 2) +#define CMD_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define CMD_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) struct intel_batchbuffer; #define ALIGN(i, n) (((i) + (n) - 1) & ~((n) - 1)) +#define IS_ALIGNED(i, n) (((i) & ((n)-1)) == 0) #define MIN(a, b) ((a) < (b) ? (a) : (b)) #define MAX(a, b) ((a) > (b) ? (a) : (b)) #define ARRAY_ELEMS(a) (sizeof(a) / sizeof((a)[0])) +#define CLAMP(min, max, a) ((a) < (min) ? (min) : ((a) > (max) ? (max) : (a))) + +#define ALIGN_FLOOR(i, n) ((i) & ~((n) - 1)) + +#define Bool int +#define True 1 +#define False 0 + +extern uint32_t g_intel_debug_option_flags; +#define VA_INTEL_DEBUG_OPTION_ASSERT (1 << 0) +#define VA_INTEL_DEBUG_OPTION_BENCH (1 << 1) +#define VA_INTEL_DEBUG_OPTION_DUMP_AUB (1 << 2) + +#define ASSERT_RET(value, fail_ret) do { \ + if (!(value)) { \ + if (g_intel_debug_option_flags & VA_INTEL_DEBUG_OPTION_ASSERT) \ + assert(value); \ + return fail_ret; \ + } \ + } while (0) #define SET_BLOCKED_SIGSET() do { \ sigset_t bl_mask; \ @@ -88,15 +136,39 @@ RESTORE_BLOCKED_SIGSET(); \ } while (0) +#define WARN_ONCE(...) do { \ + static int g_once = 1; \ + if (g_once) { \ + g_once = 0; \ + fprintf(stderr, "WARNING: " __VA_ARGS__); \ + } \ + } while (0) + +struct intel_device_info +{ + int gen; + int gt; + + unsigned int urb_size; + unsigned int max_wm_threads; + + unsigned int is_g4x : 1; /* gen4 */ + unsigned int is_ivybridge : 1; /* gen7 */ + unsigned int is_baytrail : 1; /* gen7 */ + unsigned int is_haswell : 1; /* gen7 */ + unsigned int is_cherryview : 1; /* gen8 */ + unsigned int is_skylake : 1; /* gen9 */ + unsigned int is_broxton : 1; /* gen9 */ + unsigned int is_kabylake : 1; /* gen9p5 */ +}; + struct intel_driver_data { int fd; int device_id; + int revision; int dri2Enabled; - drm_context_t hHWContext; - drm_i915_sarea_t *pPrivSarea; - drmLock *driHwLock; sigset_t sa_mask; pthread_mutex_t ctxmutex; @@ -107,12 +179,14 @@ unsigned int has_exec2 : 1; /* Flag: has execbuffer2? */ unsigned int has_bsd : 1; /* Flag: has bitstream decoder for H.264? */ unsigned int has_blt : 1; /* Flag: has BLT unit? */ + unsigned int has_vebox : 1; /* Flag: has VEBOX unit */ + unsigned int has_bsd2 : 1; /* Flag: has the second BSD video ring unit */ + + const struct intel_device_info *device_info; }; -Bool intel_driver_init(VADriverContextP ctx); -Bool intel_driver_terminate(VADriverContextP ctx); -void intel_lock_hardware(VADriverContextP ctx); -void intel_unlock_hardware(VADriverContextP ctx); +bool intel_driver_init(VADriverContextP ctx); +void intel_driver_terminate(VADriverContextP ctx); static INLINE struct intel_driver_data * intel_driver_data(VADriverContextP ctx) @@ -133,54 +207,24 @@ dri_bo *bo; }; -#define PCI_CHIP_GM45_GM 0x2A42 -#define PCI_CHIP_IGD_E_G 0x2E02 -#define PCI_CHIP_Q45_G 0x2E12 -#define PCI_CHIP_G45_G 0x2E22 -#define PCI_CHIP_G41_G 0x2E32 - -#define PCI_CHIP_IRONLAKE_D_G 0x0042 -#define PCI_CHIP_IRONLAKE_M_G 0x0046 - -#ifndef PCI_CHIP_SANDYBRIDGE_GT1 -#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 /* Desktop */ -#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112 -#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122 -#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 /* Mobile */ -#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116 -#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126 -#define PCI_CHIP_SANDYBRIDGE_S_GT 0x010A /* Server */ -#endif - -#define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* Desktop */ -#define PCI_CHIP_IVYBRIDGE_GT2 0x0162 -#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* Mobile */ -#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166 -#define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a /* Server */ - -#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \ - devid == PCI_CHIP_Q45_G || \ - devid == PCI_CHIP_G45_G || \ - devid == PCI_CHIP_G41_G) -#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM) -#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid)) - -#define IS_IRONLAKE_D(devid) (devid == PCI_CHIP_IRONLAKE_D_G) -#define IS_IRONLAKE_M(devid) (devid == PCI_CHIP_IRONLAKE_M_G) -#define IS_IRONLAKE(devid) (IS_IRONLAKE_D(devid) || IS_IRONLAKE_M(devid)) - -#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \ - devid == PCI_CHIP_SANDYBRIDGE_GT2 || \ - devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS ||\ - devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \ - devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \ - devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \ - devid == PCI_CHIP_SANDYBRIDGE_S_GT) - -#define IS_GEN7(devid) (devid == PCI_CHIP_IVYBRIDGE_GT1 || \ - devid == PCI_CHIP_IVYBRIDGE_GT2 || \ - devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \ - devid == PCI_CHIP_IVYBRIDGE_M_GT2 || \ - devid == PCI_CHIP_IVYBRIDGE_S_GT1) +#define IS_G4X(device_info) (device_info->is_g4x) + +#define IS_IRONLAKE(device_info) (device_info->gen == 5) + +#define IS_GEN6(device_info) (device_info->gen == 6) + +#define IS_HASWELL(device_info) (device_info->is_haswell) +#define IS_GEN7(device_info) (device_info->gen == 7) + +#define IS_CHERRYVIEW(device_info) (device_info->is_cherryview) +#define IS_GEN8(device_info) (device_info->gen == 8) + +#define IS_GEN9(device_info) (device_info->gen == 9) + +#define IS_SKL(device_info) (device_info->is_skylake) + +#define IS_BXT(device_info) (device_info->is_broxton) + +#define IS_KBL(device_info) (device_info->is_kabylake) #endif /* _INTEL_DRIVER_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/intel_media_common.c intel-vaapi-driver-1.7.1/src/intel_media_common.c --- intel-vaapi-driver-1.0.15/src/intel_media_common.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_media_common.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2006-2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include + +#include "intel_driver.h" +#include "intel_media.h" + +static pthread_mutex_t free_avc_surface_lock = PTHREAD_MUTEX_INITIALIZER; + +void +gen_free_avc_surface(void **data) +{ + GenAvcSurface *avc_surface; + + pthread_mutex_lock(&free_avc_surface_lock); + + avc_surface = *data; + + if (!avc_surface) { + pthread_mutex_unlock(&free_avc_surface_lock); + return; + } + + + dri_bo_unreference(avc_surface->dmv_top); + avc_surface->dmv_top = NULL; + dri_bo_unreference(avc_surface->dmv_bottom); + avc_surface->dmv_bottom = NULL; + + free(avc_surface); + *data = NULL; + + pthread_mutex_unlock(&free_avc_surface_lock); +} + +/* This is to convert one float to the given format interger. + * For example: 1.25 to S1.6 or U2.6 and so on + */ +int intel_format_convert(float src, int out_int_bits, int out_frac_bits,int out_sign_flag) +{ + unsigned char negative_flag = (src < 0.0) ? 1 : 0; + float src_1 = (!negative_flag)? src: -src ; + unsigned int factor = 1 << out_frac_bits; + int output_value = 0; + + unsigned int integer_part = floorf(src_1); + unsigned int fraction_part = ((int)((src_1 - integer_part) * factor)) & (factor - 1) ; + + output_value = (integer_part << out_frac_bits) | fraction_part; + + if(negative_flag) + output_value = (~output_value + 1) & ((1 <<(out_int_bits + out_frac_bits)) -1); + + if(out_sign_flag == 1 && negative_flag) + { + output_value |= negative_flag <<(out_int_bits + out_frac_bits); + } + return output_value; +} + +static pthread_mutex_t free_hevc_surface_lock = PTHREAD_MUTEX_INITIALIZER; + +void +gen_free_hevc_surface(void **data) +{ + GenHevcSurface *hevc_surface; + + pthread_mutex_lock(&free_hevc_surface_lock); + + hevc_surface = *data; + + if (!hevc_surface) { + pthread_mutex_unlock(&free_hevc_surface_lock); + return; + } + + dri_bo_unreference(hevc_surface->motion_vector_temporal_bo); + hevc_surface->motion_vector_temporal_bo = NULL; + + free(hevc_surface); + *data = NULL; + + pthread_mutex_unlock(&free_hevc_surface_lock); +} + +static pthread_mutex_t free_vp9_surface_lock = PTHREAD_MUTEX_INITIALIZER; + +void gen_free_vp9_surface(void **data) +{ + GenVP9Surface *vp9_surface; + + pthread_mutex_lock(&free_vp9_surface_lock); + + vp9_surface = *data; + + if (!vp9_surface) { + pthread_mutex_unlock(&free_vp9_surface_lock); + return; + } + + free(vp9_surface); + *data = NULL; + + pthread_mutex_unlock(&free_vp9_surface_lock); +} + +extern VAStatus +i965_DestroySurfaces(VADriverContextP ctx, + VASurfaceID *surface_list, + int num_surfaces); + +static pthread_mutex_t free_vdenc_avc_surface_lock = PTHREAD_MUTEX_INITIALIZER; + +void +vdenc_free_avc_surface(void **data) +{ + VDEncAvcSurface *avc_surface; + + pthread_mutex_lock(&free_vdenc_avc_surface_lock); + + avc_surface = *data; + + if (!avc_surface) { + pthread_mutex_unlock(&free_vdenc_avc_surface_lock); + return; + } + + if (avc_surface->scaled_4x_surface_obj) { + i965_DestroySurfaces(avc_surface->ctx, &avc_surface->scaled_4x_surface_id, 1); + avc_surface->scaled_4x_surface_id = VA_INVALID_SURFACE; + avc_surface->scaled_4x_surface_obj = NULL; + } + + free(avc_surface); + *data = NULL; + + pthread_mutex_unlock(&free_vdenc_avc_surface_lock); +} diff -Nru intel-vaapi-driver-1.0.15/src/intel_media.h intel-vaapi-driver-1.7.1/src/intel_media.h --- intel-vaapi-driver-1.0.15/src/intel_media.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_media.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef INTEL_MEDIA_H +#define INTEL_MEDIA_H + +#include +#include + +#include +#include + +typedef struct gen_codec_surface GenCodecSurface; + +struct gen_codec_surface +{ + int frame_store_id; +}; + +typedef struct gen_avc_surface GenAvcSurface; +struct gen_avc_surface +{ + GenCodecSurface base; + dri_bo *dmv_top; + dri_bo *dmv_bottom; + int dmv_bottom_flag; +}; + +extern void gen_free_avc_surface(void **data); + + +extern int intel_format_convert(float src, int out_int_bits, int out_frac_bits,int out_sign_flag); + +typedef struct gen_hevc_surface GenHevcSurface; +struct gen_hevc_surface +{ + GenCodecSurface base; + dri_bo *motion_vector_temporal_bo; +}; + +typedef struct gen_vp9_surface GenVP9Surface; +struct gen_vp9_surface +{ + GenCodecSurface base; + uint16_t frame_width; + uint16_t frame_height; + dri_bo *motion_vector_temporal_bo; +}; + +typedef struct vdenc_avc_surface VDEncAvcSurface; +struct vdenc_avc_surface +{ + VADriverContextP ctx; + VASurfaceID scaled_4x_surface_id; + struct object_surface *scaled_4x_surface_obj; +}; + +extern void gen_free_hevc_surface(void **data); + +extern void gen_free_vp9_surface(void **data); + +extern void vdenc_free_avc_surface(void **data); + +#endif /* INTEL_MEDIA_H */ diff -Nru intel-vaapi-driver-1.0.15/src/intel_memman.c intel-vaapi-driver-1.7.1/src/intel_memman.c --- intel-vaapi-driver-1.0.15/src/intel_memman.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_memman.c 2016-06-03 06:05:58.000000000 +0000 @@ -38,6 +38,12 @@ assert(intel->bufmgr); intel_bufmgr_gem_enable_reuse(intel->bufmgr); + if (g_intel_debug_option_flags & VA_INTEL_DEBUG_OPTION_DUMP_AUB) { + drm_intel_bufmgr_gem_set_aub_filename(intel->bufmgr, + "va.aub"); + drm_intel_bufmgr_gem_set_aub_dump(intel->bufmgr, 1); + } + return True; } diff -Nru intel-vaapi-driver-1.0.15/src/intel_version.h intel-vaapi-driver-1.7.1/src/intel_version.h --- intel-vaapi-driver-1.0.15/src/intel_version.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_version.h 2016-06-21 02:07:56.000000000 +0000 @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef INTEL_VERSION_H +#define INTEL_VERSION_H + +/** + * INTEL_DRIVER_GIT_VERSION: + * + * The full version identifier of libva-intel-driver, from a git + * repository, in string form (suitable for string concatenation). + */ +#define INTEL_DRIVER_GIT_VERSION "1.7.1" + +#endif /* INTEL_VERSION_H */ diff -Nru intel-vaapi-driver-1.0.15/src/intel_version.h.in intel-vaapi-driver-1.7.1/src/intel_version.h.in --- intel-vaapi-driver-1.0.15/src/intel_version.h.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/intel_version.h.in 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef INTEL_VERSION_H +#define INTEL_VERSION_H + +/** + * INTEL_DRIVER_GIT_VERSION: + * + * The full version identifier of libva-intel-driver, from a git + * repository, in string form (suitable for string concatenation). + */ +#define INTEL_DRIVER_GIT_VERSION "@INTEL_DRIVER_GIT_VERSION@" + +#endif /* INTEL_VERSION_H */ diff -Nru intel-vaapi-driver-1.0.15/src/Makefile.am intel-vaapi-driver-1.7.1/src/Makefile.am --- intel-vaapi-driver-1.0.15/src/Makefile.am 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/Makefile.am 2016-06-17 01:06:24.000000000 +0000 @@ -20,12 +20,16 @@ # TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE # SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -SUBDIRS = shaders +SUBDIRS = shaders +DIST_SUBDIRS = $(SUBDIRS) +EXTRA_DIST = +BUILT_SOURCES = -INCLUDES = \ +AM_CPPFLAGS = \ -DPTHREADS \ $(DRM_CFLAGS) \ $(LIBVA_DEPS_CFLAGS) \ + -DVA_DRIVERS_PATH="\"$(LIBVA_DRIVERS_PATH)\"" \ $(NULL) driver_cflags = \ @@ -40,58 +44,115 @@ $(NULL) driver_libs = \ - -lpthread \ + -lpthread -lm -ldl \ $(DRM_LIBS) -ldrm_intel \ - $(LIBVA_DEPS_LIBS) \ - $(LIBVA_X11_DEPS_LIBS) \ $(NULL) source_c = \ + dso_utils.c \ gen6_mfc.c \ + gen6_mfc_common.c \ gen6_mfd.c \ gen6_vme.c \ + gen7_vme.c \ + gen7_mfc.c \ gen7_mfd.c \ + gen75_mfd.c \ + gen75_mfc.c \ + gen8_mfc.c \ + gen8_mfd.c \ + gen8_vme.c \ + gen9_vme.c \ + gen9_mfc.c \ + gen9_mfc_hevc.c \ + gen9_mfd.c \ + gen9_vdenc.c \ + gen75_picture_process.c \ + gen75_vme.c \ + gen75_vpp_gpe.c \ + gen75_vpp_vebox.c \ + gen9_post_processing.c \ i965_avc_bsd.c \ i965_avc_hw_scoreboard.c\ i965_avc_ildb.c \ + i965_decoder_utils.c \ + i965_device_info.c \ i965_drv_video.c \ i965_encoder.c \ + i965_encoder_utils.c \ i965_media.c \ i965_media_h264.c \ i965_media_mpeg2.c \ + i965_gpe_utils.c \ i965_post_processing.c \ + i965_yuv_coefs.c \ + gen8_post_processing.c \ i965_render.c \ + i965_vpp_avs.c \ + gen8_render.c \ + gen9_render.c \ intel_batchbuffer.c \ intel_batchbuffer_dump.c\ intel_driver.c \ intel_memman.c \ object_heap.c \ + intel_media_common.c \ + vp9_probs.c \ + gen9_vp9_encoder_kernels.c \ + gen9_vp9_const_def.c \ + gen9_vp9_encoder.c \ $(NULL) source_h = \ + dso_utils.h \ gen6_mfc.h \ gen6_mfd.h \ gen6_vme.h \ gen7_mfd.h \ + gen75_picture_process.h \ + gen75_vpp_gpe.h \ + gen75_vpp_vebox.h \ + gen8_post_processing.h \ + gen9_mfd.h \ + gen9_mfc.h \ + gen9_vdenc.h \ i965_avc_bsd.h \ i965_avc_hw_scoreboard.h\ i965_avc_ildb.h \ + i965_decoder.h \ + i965_decoder_utils.h \ i965_defines.h \ i965_drv_video.h \ i965_encoder.h \ + i965_encoder_utils.h \ i965_media.h \ i965_media_h264.h \ i965_media_mpeg2.h \ i965_mutext.h \ + i965_gpe_utils.h \ + i965_pciids.h \ i965_post_processing.h \ i965_render.h \ i965_structs.h \ + i965_vpp_avs.h \ + i965_yuv_coefs.h \ intel_batchbuffer.h \ intel_batchbuffer_dump.h\ intel_compiler.h \ intel_driver.h \ + intel_media.h \ intel_memman.h \ + intel_version.h \ object_heap.h \ + vp8_probs.h \ + vp9_probs.h \ + sysdeps.h \ + va_backend_compat.h \ + i965_fourcc.h \ + gen9_vp9_encoder.h \ + gen9_vp9_encapi.h \ + gen9_vp9_const_def.h \ + gen9_vp9_encoder_kernels.h \ $(NULL) i965_drv_video_la_LTLIBRARIES = i965_drv_video.la @@ -102,5 +163,58 @@ i965_drv_video_la_SOURCES = $(source_c) noinst_HEADERS = $(source_h) +if USE_X11 +source_c += i965_output_dri.c +source_h += i965_output_dri.h +endif + +if USE_WAYLAND +source_c += i965_output_wayland.c +source_h += i965_output_wayland.h +source_h += $(protocol_source_h) +driver_cflags += $(WAYLAND_CFLAGS) +endif + +# git version +VERSION_FILE = .VERSION +OLD_VERSION_FILE = $(VERSION_FILE).old +NEW_VERSION_FILE = $(VERSION_FILE).new +PKG_VERSION_FILE = $(VERSION_FILE).pkg + +intel_version.h: gen-version + $(AM_V_GEN) \ + OV=`[ -f $(OLD_VERSION_FILE) ] && cat $(OLD_VERSION_FILE) || :`; \ + NV=`cat $(NEW_VERSION_FILE)`; \ + if [ "$$OV" != "$$NV" -o ! -f intel_version.h ]; then \ + cp -f $(NEW_VERSION_FILE) $(OLD_VERSION_FILE); \ + $(SED) -e "s|\@INTEL_DRIVER_GIT_VERSION\@|$${NV}|" \ + $(srcdir)/intel_version.h.in > intel_version.h; \ + fi + +gen-version: + @echo $(VERSION) > $(NEW_VERSION_FILE) +if HAVE_GIT + @[ -d $(top_srcdir)/.git ] && \ + (cd $(top_srcdir) && $(GIT) describe --tags) > $(NEW_VERSION_FILE) || : +endif + @[ -f $(srcdir)/$(PKG_VERSION_FILE) ] && \ + cp -f $(srcdir)/$(PKG_VERSION_FILE) $(NEW_VERSION_FILE) || : + +$(PKG_VERSION_FILE): $(NEW_VERSION_FILE) + @cp -f $< $@ + +BUILT_SOURCES += intel_version.h +EXTRA_DIST += Android.mk intel_version.h.in $(PKG_VERSION_FILE) + +# Wayland protocol +protocol_source_h = wayland-drm-client-protocol.h +i965_output_wayland.c: $(protocol_source_h) +%-client-protocol.h : %.xml + $(AM_V_GEN)$(WAYLAND_SCANNER) client-header < $< > $@ + +EXTRA_DIST += \ + wayland-drm.xml \ + $(NULL) + # Extra clean files so that maintainer-clean removes *everything* MAINTAINERCLEANFILES = Makefile.in config.h.in diff -Nru intel-vaapi-driver-1.0.15/src/Makefile.in intel-vaapi-driver-1.7.1/src/Makefile.in --- intel-vaapi-driver-1.0.15/src/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,1432 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ + +# Copyright (c) 2007 Intel Corporation. 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installcheck \ + installcheck-am installdirs installdirs-am maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-compile \ + mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ + tags tags-am uninstall uninstall-am \ + uninstall-i965_drv_video_laLTLIBRARIES + + +intel_version.h: gen-version + $(AM_V_GEN) \ + OV=`[ -f $(OLD_VERSION_FILE) ] && cat $(OLD_VERSION_FILE) || :`; \ + NV=`cat $(NEW_VERSION_FILE)`; \ + if [ "$$OV" != "$$NV" -o ! -f intel_version.h ]; then \ + cp -f $(NEW_VERSION_FILE) $(OLD_VERSION_FILE); \ + $(SED) -e "s|\@INTEL_DRIVER_GIT_VERSION\@|$${NV}|" \ + $(srcdir)/intel_version.h.in > intel_version.h; \ + fi + +gen-version: + @echo $(VERSION) > $(NEW_VERSION_FILE) +@HAVE_GIT_TRUE@ @[ -d $(top_srcdir)/.git ] && \ +@HAVE_GIT_TRUE@ (cd $(top_srcdir) && $(GIT) describe --tags) > $(NEW_VERSION_FILE) || : + @[ -f $(srcdir)/$(PKG_VERSION_FILE) ] && \ + cp -f $(srcdir)/$(PKG_VERSION_FILE) $(NEW_VERSION_FILE) || : + +$(PKG_VERSION_FILE): $(NEW_VERSION_FILE) + @cp -f $< $@ +i965_output_wayland.c: $(protocol_source_h) +%-client-protocol.h : %.xml + $(AM_V_GEN)$(WAYLAND_SCANNER) client-header < $< > $@ + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/object_heap.c intel-vaapi-driver-1.7.1/src/object_heap.c --- intel-vaapi-driver-1.0.15/src/object_heap.c 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/object_heap.c 2016-06-03 06:05:58.000000000 +0000 @@ -44,17 +44,32 @@ void *new_heap_index; int next_free; int new_heap_size = heap->heap_size + heap->heap_increment; - - new_heap_index = (void *) realloc( heap->heap_index, new_heap_size * heap->object_size ); + int bucket_index = new_heap_size / heap->heap_increment - 1; + + if (bucket_index >= heap->num_buckets) { + int new_num_buckets = heap->num_buckets + 8; + void **new_bucket; + + new_bucket = realloc(heap->bucket, new_num_buckets * sizeof(void *)); + if (NULL == new_bucket) { + return -1; + } + + heap->num_buckets = new_num_buckets; + heap->bucket = new_bucket; + } + + new_heap_index = (void *) malloc( heap->heap_increment * heap->object_size ); if ( NULL == new_heap_index ) { return -1; /* Out of memory */ } - heap->heap_index = new_heap_index; + + heap->bucket[bucket_index] = new_heap_index; next_free = heap->next_free; for(i = new_heap_size; i-- > heap->heap_size; ) { - object_base_p obj = (object_base_p) (heap->heap_index + i * heap->object_size); + object_base_p obj = (object_base_p) (new_heap_index + (i - heap->heap_size) * heap->object_size); obj->id = i + heap->id_offset; obj->next_free = next_free; next_free = i; @@ -73,10 +88,22 @@ heap->id_offset = id_offset & OBJECT_HEAP_OFFSET_MASK; heap->heap_size = 0; heap->heap_increment = 16; - heap->heap_index = NULL; heap->next_free = LAST_FREE; - _i965InitMutex(&heap->mutex); - return object_heap_expand(heap); + heap->num_buckets = 0; + heap->bucket = NULL; + + if (object_heap_expand(heap) == 0) { + ASSERT(heap->heap_size); + _i965InitMutex(&heap->mutex); + return 0; + } else { + ASSERT(!heap->heap_size); + ASSERT(!heap->bucket || !heap->bucket[0]); + + free(heap->bucket); + + return -1; + } } /* @@ -86,6 +113,7 @@ int object_heap_allocate( object_heap_p heap ) { object_base_p obj; + int bucket_index, obj_index; _i965LockMutex(&heap->mutex); if ( LAST_FREE == heap->next_free ) @@ -97,8 +125,11 @@ } } ASSERT( heap->next_free >= 0 ); - - obj = (object_base_p) (heap->heap_index + heap->next_free * heap->object_size); + + bucket_index = heap->next_free / heap->heap_increment; + obj_index = heap->next_free % heap->heap_increment; + + obj = (object_base_p) (heap->bucket[bucket_index] + obj_index * heap->object_size); heap->next_free = obj->next_free; _i965UnlockMutex(&heap->mutex); @@ -113,6 +144,7 @@ object_base_p object_heap_lookup( object_heap_p heap, int id ) { object_base_p obj; + int bucket_index, obj_index; _i965LockMutex(&heap->mutex); if ( (id < heap->id_offset) || (id > (heap->heap_size+heap->id_offset)) ) @@ -121,7 +153,9 @@ return NULL; } id &= OBJECT_HEAP_ID_MASK; - obj = (object_base_p) (heap->heap_index + id * heap->object_size); + bucket_index = id / heap->heap_increment; + obj_index = id % heap->heap_increment; + obj = (object_base_p) (heap->bucket[bucket_index] + obj_index * heap->object_size); _i965UnlockMutex(&heap->mutex); /* Check if the object has in fact been allocated */ @@ -150,10 +184,15 @@ { object_base_p obj; int i = *iter + 1; + int bucket_index, obj_index; + _i965LockMutex(&heap->mutex); while ( i < heap->heap_size) { - obj = (object_base_p) (heap->heap_index + i * heap->object_size); + bucket_index = i / heap->heap_increment; + obj_index = i % heap->heap_increment; + + obj = (object_base_p) (heap->bucket[bucket_index] + obj_index * heap->object_size); if (obj->next_free == ALLOCATED) { _i965UnlockMutex(&heap->mutex); @@ -194,18 +233,29 @@ { object_base_p obj; int i; + int bucket_index, obj_index; - _i965DestroyMutex(&heap->mutex); + if (heap->heap_size) { + _i965DestroyMutex(&heap->mutex); - /* Check if heap is empty */ - for (i = 0; i < heap->heap_size; i++) - { - /* Check if object is not still allocated */ - obj = (object_base_p) (heap->heap_index + i * heap->object_size); - ASSERT( obj->next_free != ALLOCATED ); + /* Check if heap is empty */ + for (i = 0; i < heap->heap_size; i++) + { + /* Check if object is not still allocated */ + bucket_index = i / heap->heap_increment; + obj_index = i % heap->heap_increment; + obj = (object_base_p) (heap->bucket[bucket_index] + obj_index * heap->object_size); + ASSERT( obj->next_free != ALLOCATED ); + } + + for (i = 0; i < heap->heap_size / heap->heap_increment; i++) { + free(heap->bucket[i]); + } + + free(heap->bucket); } - free(heap->heap_index); + + heap->bucket = NULL; heap->heap_size = 0; - heap->heap_index = NULL; heap->next_free = LAST_FREE; } diff -Nru intel-vaapi-driver-1.0.15/src/object_heap.h intel-vaapi-driver-1.7.1/src/object_heap.h --- intel-vaapi-driver-1.0.15/src/object_heap.h 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/object_heap.h 2016-04-14 07:44:40.000000000 +0000 @@ -41,11 +41,12 @@ struct object_heap { int object_size; int id_offset; - void *heap_index; int next_free; int heap_size; int heap_increment; _I965Mutex mutex; + void **bucket; + int num_buckets; }; typedef int object_heap_iterator; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Field_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Field_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Field_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Field_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #include "AVC_ILDB_Child_UV.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Field_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Field_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Field_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Field_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #include "AVC_ILDB_Child_Y.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Mbaff_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Child_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Child_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__AVC_ILDB_CHROMA_CORE__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Chroma_Core_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC ILDB Chroma Core Mbaff ///////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_CloseGateway.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_CloseGateway.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_CloseGateway.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_CloseGateway.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //----- Close a Message Gateway ----- diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Dep_Check.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Dep_Check.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Dep_Check.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Dep_Check.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //---------- Check dependency and spawn all MBs ---------- diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC ILDB filter horizontal Mbaff UV /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC LDB filter vertical Mbaff UV /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC ILDB filter horizontal Mbaff Y /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC ILDB filter vertical Mbaff Y /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_h.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_h.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_h.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_h.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC ILDB filter horizontal UV /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_v.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_v.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_v.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_UV_v.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC LDB filter vertical UV /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_h.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_h.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_h.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_h.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC ILDB filter horizontal Y /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_v.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_v.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_v.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Filter_Y_v.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////// AVC ILDB filter vertical Y /////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_ForwardMsg.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_ForwardMsg.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_ForwardMsg.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_ForwardMsg.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //========== Forward message to root thread through gateway ========== diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB.inc intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__AVC_ILDB_HEADER__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Luma_Core.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Luma_Core.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Luma_Core.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Luma_Core.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__AVC_ILDB_LUMA_CORE__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Luma_Core_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Luma_Core_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Luma_Core_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Luma_Core_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__AVC_ILDB_LUMA_CORE_MBAFF__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_LumaThrdLimit.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_LumaThrdLimit.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_LumaThrdLimit.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_LumaThrdLimit.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //========== Forward message to root thread through gateway ========== diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_OpenGateway.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_OpenGateway.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_OpenGateway.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_OpenGateway.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //----- Open a Message Gateway ----- diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Field_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Field_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Field_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Field_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #include "AVC_ILDB_Root_UV.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Field_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Field_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Field_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Field_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #include "AVC_ILDB_Root_Y.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ///////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Mbaff_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ///////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: AVC_ILDB_Root_UV.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Root_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Root_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: AVC_ILDB_Root_Y.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Spawn.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Spawn.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_Spawn.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_Spawn.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //=============== Spawn a child thread for a vertical child =============== diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_SpawnChild.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_SpawnChild.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_SpawnChild.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_SpawnChild.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //=============== Spawn a child thread for Luma or Chroma =============== diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_SpawnChromaRoot.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_SpawnChromaRoot.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/AVC_ILDB_SpawnChromaRoot.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/AVC_ILDB_SpawnChromaRoot.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ //=============== Spawn a chroma root thread =============== diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Child_Undefs.inc intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Child_Undefs.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Child_Undefs.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Child_Undefs.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Modual name: Child_Undefs.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/ILDB_header.inc intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/ILDB_header.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/ILDB_header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/ILDB_header.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__ILDB_HEADER__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_UV_8x8T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_UV_8x8T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_UV_8x8T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_UV_8x8T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_Cur_UV_8x8T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_UV_8x8T_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_UV_8x8T_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_UV_8x8T_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_UV_8x8T_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_Cur_UV_8x8T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_UV_Right_Most_2x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_UV_Right_Most_2x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_UV_Right_Most_2x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_UV_Right_Most_2x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Load_Cur_UV_Right_Most_2X8.Asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_Y_16x16T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_Y_16x16T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_Y_16x16T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_Y_16x16T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_Y_16x16T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_Y_16x16T_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_Y_16x16T_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_Y_16x16T_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_Y_16x16T_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_Y_16x16T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_Y_Right_Most_4x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_Y_Right_Most_4x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Cur_Y_Right_Most_4x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Cur_Y_Right_Most_4x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_Cur_Y_Right_Most_4x16.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_16DW.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_16DW.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_16DW.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_16DW.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_ILDB_Cntrl_Data_16DW.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_22DW.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_22DW.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_22DW.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_22DW.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_ILDB_Cntrl_Data_22DW.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_64DW.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_64DW.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_64DW.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data_64DW.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_ILDB_Cntrl_Data_64DW.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Load_ILDB_Cntrl_Data.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_ILDB_Cntrl_Data.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_UV_2x8T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_UV_2x8T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_UV_2x8T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_UV_2x8T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Load_Left_UV_2X8T.Asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_UV_2x8T_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_UV_2x8T_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_UV_2x8T_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_UV_2x8T_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Load_Left_UV_2X8T.Asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_Y_4x16T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_Y_4x16T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_Y_4x16T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_Y_4x16T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_Y_4x16T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_Y_4x16T_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_Y_4x16T_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Left_Y_4x16T_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Left_Y_4x16T_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: load_Y_4x16T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/loadNV12_16x16T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/loadNV12_16x16T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/loadNV12_16x16T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/loadNV12_16x16T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: loadNV12_16x16T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/loadNV12_16x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/loadNV12_16x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/loadNV12_16x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/loadNV12_16x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Loadnv12_16X4.Asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_UV_8x2.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_UV_8x2.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_UV_8x2.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_UV_8x2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Load_Top_UV_8X2.Asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_UV_8x2_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_UV_8x2_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_UV_8x2_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_UV_8x2_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Load_Top_UV_8X2.Asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_Y_16x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_Y_16x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_Y_16x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_Y_16x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Load_Y_16X4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_Y_16x4_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_Y_16x4_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/load_Top_Y_16x4_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/load_Top_Y_16x4_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module Name: Load_Y_16X4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Makefile.in 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Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Modual name: Root_Undefs.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_UV_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_UV_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_UV_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_UV_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Cur_UV_8x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_UV_8x8_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_UV_8x8_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_UV_8x8_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_UV_8x8_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Cur_UV_8x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_Y_16x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_Y_16x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_Y_16x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_Y_16x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Cur_Y_16x16.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_Y_16x16_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_Y_16x16_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Cur_Y_16x16_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Cur_Y_16x16_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Cur_Y_16x16.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_UV_8x2T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_UV_8x2T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_UV_8x2T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_UV_8x2T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Left_UV_8x2T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_UV_8x2T_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_UV_8x2T_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_UV_8x2T_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_UV_8x2T_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Left_UV_8x2T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_Y_16x4T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_Y_16x4T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_Y_16x4T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_Y_16x4T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Left_Y_16x4T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_Y_16x4T_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_Y_16x4T_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Left_Y_16x4T_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Left_Y_16x4T_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Left_Y_16x4T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/saveNV12_16x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/saveNV12_16x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/saveNV12_16x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/saveNV12_16x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: saveNV12_16x16.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/saveNV12_16x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/saveNV12_16x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/saveNV12_16x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/saveNV12_16x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: saveNV12_16x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/saveNV12_16x4T.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/saveNV12_16x4T.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/saveNV12_16x4T.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/saveNV12_16x4T.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: saveNV12_16x4T.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_UV_8x2.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_UV_8x2.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_UV_8x2.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_UV_8x2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Top_UV_8x2.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_UV_8x2_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_UV_8x2_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_UV_8x2_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_UV_8x2_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Top_UV_8x2.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_Y_16x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_Y_16x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_Y_16x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_Y_16x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Top_Y_16x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_Y_16x4_Mbaff.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_Y_16x4_Mbaff.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/save_Top_Y_16x4_Mbaff.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/save_Top_Y_16x4_Mbaff.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_Top_Y_16x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/SetupVPKernel.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/SetupVPKernel.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/SetupVPKernel.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/SetupVPKernel.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Modual name: SetupVPKernel.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_UV_2x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_UV_2x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_UV_2x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_UV_2x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_UV_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_UV_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_UV_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_UV_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_UV_Right_Most_2x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_UV_Right_Most_2x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_UV_Right_Most_2x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_UV_Right_Most_2x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Transpose Cur MB Right Most 2x8 to 8x2 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_Y_16x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_Y_16x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_Y_16x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_Y_16x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_Y_4x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_Y_4x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_Y_4x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_Y_4x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_Y_Right_Most_4x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_Y_Right_Most_4x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Cur_Y_Right_Most_4x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Cur_Y_Right_Most_4x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Transpose cur Y right most 4x16 to 16x4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Left_UV_2x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Left_UV_2x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Left_UV_2x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Left_UV_2x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Transpose left MB 2x8 to 8x2 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Left_Y_4x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Left_Y_4x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/Transpose_Left_Y_4x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/Transpose_Left_Y_4x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Transpose left MB 4x16 to 16x4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/TransposeNV12_16x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/TransposeNV12_16x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/TransposeNV12_16x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/TransposeNV12_16x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/TransposeNV12_4x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/TransposeNV12_4x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/TransposeNV12_4x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/TransposeNV12_4x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ ////////////////////////////////////////////////////////////////////////////////////////// diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/writeURB.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/writeURB.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/writeURB.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/writeURB.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: WriteURB.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/writeURB_UV_Child.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/writeURB_UV_Child.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/writeURB_UV_Child.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/writeURB_UV_Child.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: WriteURB_Child.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/writeURB_Y_Child.asm intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/writeURB_Y_Child.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/ildb/writeURB_Y_Child.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/ildb/writeURB_Y_Child.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: WriteURB_Child.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/h264/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/h264/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,628 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; 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The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/add_Error_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/add_Error_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/add_Error_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/add_Error_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Add macroblock correction UV data blocks to predicted picture * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVC.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVC.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVC.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVC.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * All HWMC kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVC_Build.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVC_Build.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVC_Build.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVC_Build.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ $table { diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVC_Export.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVC_Export.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVC_Export.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVC_Export.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,3 +1,41 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ .export entry_point INTRA_16x16 .export entry_point INTRA_8x8 .export entry_point INTRA_4x4 @@ -127,14 +165,6 @@ #endif #endif // SW_SCOREBOARD -/* - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ #ifdef ENABLE_ILDB .export label ALL_SPAWNED_UV_ILDB_FRAME diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVCField.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVCField.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVCField.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVCField.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * All field picture HWMC kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVCFrame.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVCFrame.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVCFrame.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVCFrame.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * All frame picture HWMC kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVCMBAFF.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVCMBAFF.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllAVCMBAFF.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllAVCMBAFF.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * All MBAFF frame picture HWMC kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllIntra.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllIntra.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AllIntra.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AllIntra.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * All intra-prediction macroblock kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // 2857702934 // 0xAA551616 - GUID for Intra_16x16 luma prediction mode offsets diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/avc_mc.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/h264/mc/avc_mc.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/avc_mc.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/avc_mc.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -657,7 +657,7 @@ { 0x00800001, 0x21300232, 0x00a904cc, 0x00000000 }, { 0x01600031, 0x27800021, 0x508d07c0, 0x00000200 }, { 0x00000001, 0x34000020, 0x000007e0, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0000, 0x00000000 }, { 0x00200009, 0x27fa3e29, 0x00450064, 0x00040004 }, { 0x00000401, 0x27c80061, 0x00000000, 0x000f000f }, @@ -687,9 +687,9 @@ { 0x00000001, 0x27800021, 0x00000780, 0x00000000 }, { 0x00000001, 0x27a00021, 0x000007a0, 0x00000000 }, { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, @@ -1817,7 +1817,7 @@ { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x20400021, 0x008d0000, 0x00000000 }, { 0x00000005, 0x20203e2d, 0x00000061, 0x001f001f }, { 0x00200009, 0x20643e2d, 0x00450064, 0x00040004 }, @@ -2393,7 +2393,7 @@ { 0x00000001, 0x21400021, 0x00000140, 0x00000000 }, { 0x00000001, 0x21600021, 0x00000160, 0x00000000 }, { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x01000005, 0x20602d29, 0x02000042, 0x00070007 }, { 0x01000005, 0x20422d29, 0x00000042, 0xfff8fff8 }, { 0x00000001, 0x202001e9, 0x00000000, 0x100c100c }, @@ -2563,9 +2563,9 @@ { 0x00000040, 0x22040c00, 0x00000204, 0x00400040 }, { 0x00110220, 0x34001c00, 0x00001400, 0xffffffda }, { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x01000005, 0x20602d29, 0x02000042, 0x00070007 }, { 0x01000005, 0x20422d29, 0x00000042, 0xfff8fff8 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, @@ -2935,9 +2935,9 @@ { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, { 0x01600031, 0x20001c20, 0x708d0000, 0x82000010 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, @@ -3024,8 +3024,8 @@ { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, @@ -3355,9 +3355,9 @@ { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, @@ -3441,7 +3441,7 @@ { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, @@ -3657,7 +3657,7 @@ { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, @@ -3744,8 +3744,8 @@ { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, @@ -3984,8 +3984,8 @@ { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, { 0x00000001, 0x206601ed, 0x00000000, 0x00030003 }, @@ -4069,7 +4069,7 @@ { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00600009, 0x25c03dad, 0x00050034, 0x00040004 }, { 0x00000001, 0x220801ec, 0x00000000, 0x02400240 }, @@ -4268,8 +4268,8 @@ { 0x00000c01, 0x26100169, 0x00000000, 0x12121212 }, { 0x00400801, 0x26000171, 0x00000000, 0xffffffff }, { 0x00600031, 0x20001c20, 0x308d0600, 0x82008002 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, { 0x00000001, 0x206601ed, 0x00000000, 0x00010001 }, @@ -4357,7 +4357,7 @@ { 0x00010220, 0x34001c00, 0x00001400, 0xfffffffc }, { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, { 0x01600031, 0x20001c24, 0x708d0000, 0x82000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00400441, 0x45c03dad, 0x00000034, 0x00100010 }, { 0x00400841, 0x45c23dad, 0x00000036, 0x00200020 }, @@ -4796,8 +4796,8 @@ { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, { 0x00008025, 0x20000000, 0x00000000, 0x00000000 }, { 0x00000001, 0x34000020, 0x000007c0, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00a02001, 0x20400169, 0x00000000, 0x00000000 }, { 0x00000001, 0x206601ed, 0x00000000, 0x00010001 }, @@ -4881,7 +4881,7 @@ { 0x00000220, 0x34001c00, 0x00001400, 0xffffffe8 }, { 0x07600031, 0x20001c20, 0x30000000, 0x02000001 }, { 0x01600031, 0x20001c24, 0x708d0000, 0x82000012 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0000, 0x00000000 }, { 0x00400441, 0x45c03dad, 0x00000034, 0x00100010 }, { 0x00400841, 0x45c23dad, 0x00000036, 0x00200020 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AVCMCInter.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AVCMCInter.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/AVCMCInter.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/AVCMCInter.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * All inter-prediction macroblock kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: AVCMCInter.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/BSDReset.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/BSDReset.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/BSDReset.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/BSDReset.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Initial kernel for filling initial BSD command buffer * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: BSDReset.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/chromaMVAdjust.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/chromaMVAdjust.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/chromaMVAdjust.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/chromaMVAdjust.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Adjust chrom MV * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: ChromaMVAdjust.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/DCResetDummy.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/DCResetDummy.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/DCResetDummy.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/DCResetDummy.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Dummy kernel * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: DCResetDummy.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Decode_Chroma_Intra.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Decode_Chroma_Intra.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Decode_Chroma_Intra.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Decode_Chroma_Intra.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Decode both intra chroma blocks * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__DECODE_CHROMA_INTRA__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/EndIntraThread.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/EndIntraThread.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/EndIntraThread.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/EndIntraThread.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Common module to end current intra thread * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: EndIntraThread.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/header.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/header.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/header.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Common header file for all AVC MC kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__HEADER__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/HwmcOnlyHeader.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/HwmcOnlyHeader.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/HwmcOnlyHeader.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/HwmcOnlyHeader.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Header file used only in HWMC_ONLY mode * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: HwmcOnlyHeader.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/initialize_MBPara.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/initialize_MBPara.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/initialize_MBPara.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/initialize_MBPara.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Initialize parameters * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Initialize_MBPara.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/inter_Header.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/inter_Header.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/inter_Header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/inter_Header.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Header file for all AVC INTER prediction kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__INTER_HEADER__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_C_2x2.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_C_2x2.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_C_2x2.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_C_2x2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Interpolation kernel for chrominance 2x2 motion compensation * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Interpolate_C_2x2.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_C_4x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_C_4x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_C_4x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_C_4x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Interpolation kernel for chrominance 4x4 motion compensation * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Interpolate_C_4x4_Func.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_Y_4x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_Y_4x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_Y_4x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_Y_4x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Interpolation kernel for luminance motion compensation * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Interpolate_Y_4x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_Y_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_Y_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/interpolate_Y_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/interpolate_Y_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Interpolation kernel for luminance motion compensation * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Interpolate_Y_8x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_16x16.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_16x16.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_16x16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_16x16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Decode Intra_16x16 macroblock * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Intra_16x16.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_4x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_4x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_4x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_4x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Decode Intra_4x4 macroblock * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Intra_4x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Decode Intra_8x8 macroblock * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Intra_8x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_funcLib.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_funcLib.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_funcLib.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_funcLib.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Library of common modules shared among different intra prediction kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: Intra_funcLib.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Header.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Header.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Header.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Header file for all AVC intra prediction kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__INTRA_HEADER__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_PCM.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_PCM.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Intra_PCM.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Intra_PCM.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Decode Intra_PCM macroblock * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Intra_PCM.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_pred_16x16_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_pred_16x16_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_pred_16x16_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_pred_16x16_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Intra predict 16x16 luma block * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: intra_Pred_16x16_Y.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Pred_4x4_Y_4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Pred_4x4_Y_4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Pred_4x4_Y_4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Pred_4x4_Y_4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Intra predict 4 Intra_4x4 luma blocks * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__INTRA_PRED_4X4_Y_4__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Pred_8x8_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Pred_8x8_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Pred_8x8_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Pred_8x8_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Intra predict 8X8 luma block * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__INTRA_PRED_8X8_Y__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Pred_Chroma.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Pred_Chroma.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/intra_Pred_Chroma.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/intra_Pred_Chroma.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Intra predict 8x8 chroma block * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__INTRA_PRED_CHROMA__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/load_Intra_Ref_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/load_Intra_Ref_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/load_Intra_Ref_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/load_Intra_Ref_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Load all reference U/V samples from neighboring macroblocks * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__LOAD_INTRA_REF_UV__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/load_Intra_Ref_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/load_Intra_Ref_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/load_Intra_Ref_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/load_Intra_Ref_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Load all reference Y samples from neighboring macroblocks * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__LOAD_INTRA_REF_Y__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_C_10x5.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_C_10x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_C_10x5.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_C_10x5.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Load reference 10x5 area for chroma NV12 4x4 MC * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: LoadRef_C_10x5.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_C_6x3.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_C_6x3.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_C_6x3.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_C_6x3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Load reference 6x3 area for chroma NV12 4x4 MC * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: LoadRef_C_6x3.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_Y_16x13.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_Y_16x13.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_Y_16x13.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_Y_16x13.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Load reference 16x13 area for luma 8x8 MC * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: LoadRef_Y_16x13.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_Y_16x9.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_Y_16x9.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/loadRef_Y_16x9.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/loadRef_Y_16x9.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Load reference 16x9 area for luma 4x4 MC * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: LoadRef_Y_16x9.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Makefile.am 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -185,17 +185,17 @@ rm $*.g4m $(INTEL_MC_GEN5_ASM): $(INTEL_MC_ASM) $(INTEL_MC_INC) $(INTEL_ILDB_ASM) - $(AM_V_GEN)cpp -DDEV_ILK -DBOOTSTRAP -I ../ildb/ AllAVC.asm > _mc0.$@ && \ - ../../gpp.py _mc0.$@ $@ && \ - $(GEN4ASM) -l list -a -e tmp.$(INTEL_MC_EXPORT_GEN5) -g 5 $@ \ + $(AM_V_GEN)cpp -DDEV_ILK -DBOOTSTRAP -I $(srcdir)/../ildb/ $(srcdir)/AllAVC.asm > _mc0.$@ && \ + $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _mc0.$@ $@ && \ + $(GEN4ASM) -l $(srcdir)/list -a -e tmp.$(INTEL_MC_EXPORT_GEN5) -g 5 $@ \ -o /dev/null && \ mv tmp.$(INTEL_MC_EXPORT_GEN5) $(INTEL_MC_EXPORT_GEN5) && \ - cpp -DDEV_ILK -I ../ildb/ AllAVC.asm > _mc1.$@ && \ - ../../gpp.py _mc1.$@ $@ && \ + cpp -DDEV_ILK -I $(srcdir)/../ildb/ $(srcdir)/AllAVC.asm > _mc1.$@ && \ + $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _mc1.$@ $@ && \ rm _mc0.$@ _mc1.$@ $(INTEL_MC_G4B_GEN5): $(INTEL_MC_GEN5_ASM) - $(AM_V_GEN)$(GEN4ASM) -l list -a -e tmp.$(INTEL_MC_EXPORT_GEN5) -g 5 $< \ + $(AM_V_GEN)$(GEN4ASM) -l $(srcdir)/list -a -e tmp.$(INTEL_MC_EXPORT_GEN5) -g 5 $< \ -o $@ && \ cat tmp.$(INTEL_MC_EXPORT_GEN5) | sed "s/_IP/_IP_GEN5/g" \ > $(INTEL_MC_EXPORT_GEN5) && \ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,658 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# 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@am__untar@ +bindir = @bindir@ +build = @build@ +build_alias = @build_alias@ +build_cpu = @build_cpu@ +build_os = @build_os@ +build_vendor = @build_vendor@ +builddir = @builddir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +docdir = @docdir@ +dvidir = @dvidir@ +exec_prefix = @exec_prefix@ +host = @host@ +host_alias = @host_alias@ +host_cpu = @host_cpu@ +host_os = @host_os@ +host_vendor = @host_vendor@ +htmldir = @htmldir@ +includedir = @includedir@ +infodir = @infodir@ +install_sh = @install_sh@ +libdir = @libdir@ +libexecdir = @libexecdir@ +localedir = @localedir@ +localstatedir = @localstatedir@ +mandir = @mandir@ +mkdir_p = @mkdir_p@ +oldincludedir = @oldincludedir@ +pdfdir = @pdfdir@ +prefix = @prefix@ +program_transform_name = @program_transform_name@ +psdir = @psdir@ +sbindir = @sbindir@ +sharedstatedir = @sharedstatedir@ +srcdir = @srcdir@ +sysconfdir = @sysconfdir@ +target_alias = @target_alias@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +INTEL_G4I = +INTEL_G4A = null.g4a +INTEL_G4B = null.g4b +INTEL_G4B_GEN5 = null.g4b.gen5 +INTEL_MC_G4B = avc_mc.g4b +INTEL_MC_G4B_GEN5 = avc_mc.g4b.gen5 +INTEL_MC_EXPORT = export.inc +INTEL_MC_EXPORT_GEN5 = export.inc.gen5 +INTEL_MC_ASM = \ + add_Error_16x16_Y.asm \ + add_Error_UV.asm \ + AllAVC.asm \ + AllAVCField.asm \ + AllAVCFrame.asm \ + AllAVCMBAFF.asm \ + AllIntra.asm \ + AVCMCInter.asm \ + BSDReset.asm \ + chromaMVAdjust.asm \ + DCResetDummy.asm \ + Decode_Chroma_Intra.asm \ + EndIntraThread.asm \ + initialize_MBPara.asm \ + interpolate_C_2x2.asm \ + interpolate_C_4x4.asm \ + interpolate_Y_4x4.asm \ + interpolate_Y_8x8.asm \ + Intra_16x16.asm \ + Intra_4x4.asm \ + Intra_8x8.asm \ + Intra_funcLib.asm \ + Intra_PCM.asm \ + intra_pred_16x16_Y.asm \ + intra_Pred_4x4_Y_4.asm \ + intra_Pred_8x8_Y.asm \ + intra_Pred_Chroma.asm \ + load_Intra_Ref_UV.asm \ + load_Intra_Ref_Y.asm \ + loadRef_C_10x5.asm \ + loadRef_C_6x3.asm \ + loadRef_Y_16x13.asm \ + loadRef_Y_16x9.asm \ + recon_C_4x4.asm \ + recon_Y_8x8.asm \ + roundShift_C_4x4.asm \ + save_16x16_Y.asm \ + save_4x4_Y.asm \ + save_8x8_UV.asm \ + save_8x8_Y.asm \ + save_I_PCM.asm \ + scoreboard.asm \ + scoreboard_MBAFF.asm \ + scoreboard_restore_AS.asm \ + scoreboard_save_AS.asm \ + scoreboard_sip.asm \ + scoreboard_start_inter.asm \ + scoreboard_start_intra.asm \ + scoreboard_update.asm \ + SetHWScoreboard.asm \ + SetHWScoreboard_MBAFF.asm \ + set_SB_offset.asm \ + SetupForHWMC.asm \ + weightedPred.asm \ + writeRecon_C_8x4.asm \ + writeRecon_Y_16x8.asm \ + writeRecon_YC.asm + +INTEL_MC_INC = \ + AllAVC_Build.inc \ + AllAVC_Export.inc \ + export.inc \ + header.inc \ + HwmcOnlyHeader.inc \ + inter_Header.inc \ + intra_Header.inc \ + Scoreboard_header.inc \ + SetHWScoreboard_header.inc \ + $(NULL) + +INTEL_ILDB_ASM = \ + ../ildb/AVC_ILDB_Child_Field_UV.asm \ + ../ildb/AVC_ILDB_Child_Field_Y.asm \ + ../ildb/AVC_ILDB_Child_Mbaff_UV.asm \ + ../ildb/AVC_ILDB_Child_Mbaff_Y.asm \ + ../ildb/AVC_ILDB_Child_UV.asm \ + ../ildb/AVC_ILDB_Child_Y.asm \ + ../ildb/AVC_ILDB_Chroma_Core.asm \ + ../ildb/AVC_ILDB_Chroma_Core_Mbaff.asm \ + ../ildb/AVC_ILDB_CloseGateway.asm \ + ../ildb/AVC_ILDB_Dep_Check.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_UV_h.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_UV_v.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_Y_h.asm \ + ../ildb/AVC_ILDB_Filter_Mbaff_Y_v.asm \ + ../ildb/AVC_ILDB_Filter_UV_h.asm \ + ../ildb/AVC_ILDB_Filter_UV_v.asm \ + ../ildb/AVC_ILDB_Filter_Y_h.asm \ + ../ildb/AVC_ILDB_Filter_Y_v.asm \ + ../ildb/AVC_ILDB_ForwardMsg.asm \ + ../ildb/AVC_ILDB_Luma_Core.asm \ + ../ildb/AVC_ILDB_Luma_Core_Mbaff.asm \ + ../ildb/AVC_ILDB_LumaThrdLimit.asm \ + ../ildb/AVC_ILDB_OpenGateway.asm \ + ../ildb/AVC_ILDB_Root_Field_UV.asm \ + ../ildb/AVC_ILDB_Root_Field_Y.asm \ + ../ildb/AVC_ILDB_Root_Mbaff_UV.asm \ + ../ildb/AVC_ILDB_Root_Mbaff_Y.asm \ + ../ildb/AVC_ILDB_Root_UV.asm \ + ../ildb/AVC_ILDB_Root_Y.asm \ + ../ildb/AVC_ILDB_Spawn.asm \ + ../ildb/AVC_ILDB_SpawnChild.asm \ + ../ildb/AVC_ILDB_SpawnChromaRoot.asm \ + ../ildb/load_Cur_UV_8x8T.asm \ + ../ildb/load_Cur_UV_8x8T_Mbaff.asm \ + ../ildb/load_Cur_UV_Right_Most_2x8.asm \ + ../ildb/load_Cur_Y_16x16T.asm \ + ../ildb/load_Cur_Y_16x16T_Mbaff.asm \ + ../ildb/load_Cur_Y_Right_Most_4x16.asm \ + ../ildb/Load_ILDB_Cntrl_Data_16DW.asm \ + ../ildb/Load_ILDB_Cntrl_Data_22DW.asm \ + ../ildb/Load_ILDB_Cntrl_Data_64DW.asm \ + ../ildb/Load_ILDB_Cntrl_Data.asm \ + ../ildb/load_Left_UV_2x8T.asm \ + ../ildb/load_Left_UV_2x8T_Mbaff.asm \ + ../ildb/load_Left_Y_4x16T.asm \ + ../ildb/load_Left_Y_4x16T_Mbaff.asm \ + ../ildb/loadNV12_16x16T.asm \ + ../ildb/loadNV12_16x4.asm \ + ../ildb/load_Top_UV_8x2.asm \ + ../ildb/load_Top_UV_8x2_Mbaff.asm \ + ../ildb/load_Top_Y_16x4.asm \ + ../ildb/load_Top_Y_16x4_Mbaff.asm \ + ../ildb/save_Cur_UV_8x8.asm \ + ../ildb/save_Cur_UV_8x8_Mbaff.asm \ + ../ildb/save_Cur_Y_16x16.asm \ + ../ildb/save_Cur_Y_16x16_Mbaff.asm \ + ../ildb/save_Left_UV_8x2T.asm \ + ../ildb/save_Left_UV_8x2T_Mbaff.asm \ + ../ildb/save_Left_Y_16x4T.asm \ + ../ildb/save_Left_Y_16x4T_Mbaff.asm \ + ../ildb/saveNV12_16x16.asm \ + ../ildb/saveNV12_16x4.asm \ + ../ildb/saveNV12_16x4T.asm \ + ../ildb/save_Top_UV_8x2.asm \ + ../ildb/save_Top_UV_8x2_Mbaff.asm \ + ../ildb/save_Top_Y_16x4.asm \ + ../ildb/save_Top_Y_16x4_Mbaff.asm \ + ../ildb/SetupVPKernel.asm \ + ../ildb/Transpose_Cur_UV_2x8.asm \ + ../ildb/Transpose_Cur_UV_8x8.asm \ + ../ildb/Transpose_Cur_UV_Right_Most_2x8.asm \ + ../ildb/Transpose_Cur_Y_16x16.asm \ + ../ildb/Transpose_Cur_Y_4x16.asm \ + ../ildb/Transpose_Cur_Y_Right_Most_4x16.asm \ + ../ildb/Transpose_Left_UV_2x8.asm \ + ../ildb/Transpose_Left_Y_4x16.asm \ + ../ildb/TransposeNV12_16x16.asm \ + ../ildb/TransposeNV12_4x16.asm \ + ../ildb/writeURB.asm \ + ../ildb/writeURB_UV_Child.asm \ + ../ildb/writeURB_Y_Child.asm + +INTEL_MC_GEN5_ASM = avc_mc.gen5.asm +TARGETS = $(am__append_1) +SUFFIXES = .g4a .g4b .gen5.asm +CLEANFILES = $(INTEL_MC_GEN5_ASM) +EXTRA_DIST = \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) \ + $(INTEL_G4I) \ + $(INTEL_MC_ASM) \ + $(INTEL_MC_EXPORT) \ + $(INTEL_MC_EXPORT_GEN5) \ + $(INTEL_MC_G4B) \ + $(INTEL_MC_G4B_GEN5) \ + $(INTEL_MC_INC) \ + list \ + $(NULL) + + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g4a .g4b .gen5.asm +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/h264/mc/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/shaders/h264/mc/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs +tags TAGS: + +ctags CTAGS: + +cscope cscopelist: + + +distdir: $(DISTFILES) + @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + list='$(DISTFILES)'; \ + dist_files=`for file in $$list; do echo $$file; done | \ + sed -e "s|^$$srcdirstrip/||;t" \ + -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ + case $$dist_files in \ + */*) $(MKDIR_P) `echo "$$dist_files" | \ + sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ + sort -u` ;; \ + esac; \ + for file in $$dist_files; do \ + if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ + if test -d $$d/$$file; then \ + dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ + if test -d "$(distdir)/$$file"; then \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ + cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ + else \ + test -f "$(distdir)/$$file" \ + || cp -p $$d/$$file "$(distdir)/$$file" \ + || exit 1; \ + fi; \ + done +check-am: all-am +check: check-am +all-am: Makefile all-local +installdirs: +install: install-am +install-exec: install-exec-am +install-data: install-data-am +uninstall: uninstall-am + +install-am: all-am + @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am + +installcheck: installcheck-am +install-strip: + if test -z '$(STRIP)'; then \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + install; \ + else \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \ + fi +mostlyclean-generic: + +clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) + +distclean-generic: + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + +maintainer-clean-generic: + @echo "This command is intended for maintainers to use" + @echo "it deletes files that may require special tools to rebuild." + -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) +clean: clean-am + +clean-am: clean-generic clean-libtool mostlyclean-am + +distclean: distclean-am + -rm -f Makefile +distclean-am: clean-am distclean-generic + +dvi: dvi-am + +dvi-am: + +html: html-am + +html-am: + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-dvi-am: + +install-exec-am: + +install-html: install-html-am + +install-html-am: + +install-info: install-info-am + +install-info-am: + +install-man: + +install-pdf: install-pdf-am + +install-pdf-am: + +install-ps: install-ps-am + +install-ps-am: + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-generic mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: all all-am all-local check check-am clean clean-generic \ + clean-libtool cscopelist-am ctags-am distclean \ + distclean-generic distclean-libtool distdir dvi dvi-am html \ + html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-pdf install-pdf-am \ + install-ps install-ps-am install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-generic \ + mostlyclean-libtool pdf pdf-am ps ps-am tags-am uninstall \ + uninstall-am + + +all-local: $(TARGETS) + +@HAVE_GEN4ASM_TRUE@.g4a.g4b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)m4 $*.g4a > $*.g4m && \ +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -o $@ $*.g4m && \ +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 5 -o $@.gen5 $*.g4m && \ +@HAVE_GEN4ASM_TRUE@ rm $*.g4m + +@HAVE_GEN4ASM_TRUE@$(INTEL_MC_GEN5_ASM): $(INTEL_MC_ASM) $(INTEL_MC_INC) $(INTEL_ILDB_ASM) +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -DDEV_ILK -DBOOTSTRAP -I $(srcdir)/../ildb/ $(srcdir)/AllAVC.asm > _mc0.$@ && \ +@HAVE_GEN4ASM_TRUE@ $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _mc0.$@ $@ && \ +@HAVE_GEN4ASM_TRUE@ $(GEN4ASM) -l $(srcdir)/list -a -e tmp.$(INTEL_MC_EXPORT_GEN5) -g 5 $@ \ +@HAVE_GEN4ASM_TRUE@ -o /dev/null && \ +@HAVE_GEN4ASM_TRUE@ mv tmp.$(INTEL_MC_EXPORT_GEN5) $(INTEL_MC_EXPORT_GEN5) && \ +@HAVE_GEN4ASM_TRUE@ cpp -DDEV_ILK -I $(srcdir)/../ildb/ $(srcdir)/AllAVC.asm > _mc1.$@ && \ +@HAVE_GEN4ASM_TRUE@ $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _mc1.$@ $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _mc0.$@ _mc1.$@ + +@HAVE_GEN4ASM_TRUE@$(INTEL_MC_G4B_GEN5): $(INTEL_MC_GEN5_ASM) +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -l $(srcdir)/list -a -e tmp.$(INTEL_MC_EXPORT_GEN5) -g 5 $< \ +@HAVE_GEN4ASM_TRUE@ -o $@ && \ +@HAVE_GEN4ASM_TRUE@ cat tmp.$(INTEL_MC_EXPORT_GEN5) | sed "s/_IP/_IP_GEN5/g" \ +@HAVE_GEN4ASM_TRUE@ > $(INTEL_MC_EXPORT_GEN5) && \ +@HAVE_GEN4ASM_TRUE@ rm tmp.$(INTEL_MC_EXPORT_GEN5) + +@HAVE_GEN4ASM_TRUE@$(INTEL_G4B): $(INTEL_G4I) + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/recon_C_4x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/recon_C_4x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/recon_C_4x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/recon_C_4x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Recon_C_4x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/recon_Y_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/recon_Y_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/recon_Y_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/recon_Y_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: Recon_Y_8x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/roundShift_C_4x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/roundShift_C_4x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/roundShift_C_4x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/roundShift_C_4x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: RoundShift_C_4x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_16x16_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_16x16_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_16x16_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_16x16_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Save decoded Y picture data to frame buffer * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SAVE_16X16_Y__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_4x4_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_4x4_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_4x4_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_4x4_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Save Intra_4x4 decoded Y picture data to frame buffer * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SAVE_4X4_Y__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_8x8_UV.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_8x8_UV.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_8x8_UV.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_8x8_UV.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Save decoded U/V picture data to frame buffer * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SAVE_8x8_UV__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_8x8_Y.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_8x8_Y.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_8x8_Y.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_8x8_Y.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Save Intra_8x8 decoded Y picture data to frame buffer * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SAVE_8X8_Y__) // Make sure this is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_I_PCM.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_I_PCM.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/save_I_PCM.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/save_I_PCM.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Save I_PCM Y samples to Y picture buffer * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: save_I_PCM.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Dependency control scoreboard kernel * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: scoreboard.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Scoreboard_header.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Scoreboard_header.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/Scoreboard_header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/Scoreboard_header.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Common header file for both scoreboard and scoreboard_MBAFF kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SCOREBOARD_HEADER__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_MBAFF.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_MBAFF.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_MBAFF.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_MBAFF.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Dependency control scoreboard kernel for MBAFF frame * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: scoreboard_MBAFF.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_restore_AS.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_restore_AS.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_restore_AS.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_restore_AS.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Restore previously stored scoreboard data after content switching back * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: scoreboard_restore_AS.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_save_AS.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_save_AS.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_save_AS.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_save_AS.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Save scoreboard data before content switching * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Module name: scoreboard_save_AS.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_sip.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_sip.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_sip.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_sip.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Scoreboard interrupt handler * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: scoreboard_sip.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_start_inter.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_start_inter.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_start_inter.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_start_inter.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Scoreboard function for starting inter prediction kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SCOREBOARD_START_INTER__) diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_start_intra.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_start_intra.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_start_intra.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_start_intra.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Scoreboard function for starting intra prediction kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SCOREBOARD_START_INTRA__) diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_update.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_update.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/scoreboard_update.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/scoreboard_update.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Scoreboard update function for decoding kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetHWScoreboard.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetHWScoreboard.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetHWScoreboard.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetHWScoreboard.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Set dependency control HW scoreboard kernel * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: SetHWScoreboard.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetHWScoreboard_header.inc intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetHWScoreboard_header.inc --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetHWScoreboard_header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetHWScoreboard_header.inc 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Common header file for both SetHWScoreboard and SetHWScoreboard_MBAFF kernels * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ #if !defined(__SETHWSCOREBOARD_HEADER__) // Make sure this file is only included once diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetHWScoreboard_MBAFF.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetHWScoreboard_MBAFF.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetHWScoreboard_MBAFF.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetHWScoreboard_MBAFF.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Set dependency control HW scoreboard kernel for MBAFF picture * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: SetHWScoreboard_MBAFF.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/set_SB_offset.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/set_SB_offset.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/set_SB_offset.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/set_SB_offset.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Common module to set offset into the scoreboard * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetupForHWMC.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetupForHWMC.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/SetupForHWMC.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/SetupForHWMC.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Initial setup for running HWMC kernels in HWMC-Only decoding mode * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: SetupForHWMC.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/weightedPred.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/weightedPred.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/weightedPred.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/weightedPred.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,10 +1,40 @@ /* * Weighted prediction of luminance and chrominance * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: WeightedPred.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/writeRecon_C_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/writeRecon_C_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/writeRecon_C_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/writeRecon_C_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: WriteRecon_C_8x4.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/writeRecon_Y_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/writeRecon_Y_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/writeRecon_Y_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/writeRecon_Y_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: WriteRecon_Y_16x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/h264/mc/writeRecon_YC.asm intel-vaapi-driver-1.7.1/src/shaders/h264/mc/writeRecon_YC.asm --- intel-vaapi-driver-1.0.15/src/shaders/h264/mc/writeRecon_YC.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/h264/mc/writeRecon_YC.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,39 @@ /* * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. * */ // Kernel name: WriteRecon_YC.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/Makefile.am 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -1,4 +1,4 @@ -SUBDIRS = h264 mpeg2 render post_processing vme +SUBDIRS = h264 mpeg2 render post_processing vme utils EXTRA_DIST = gpp.py diff -Nru intel-vaapi-driver-1.0.15/src/shaders/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,629 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; 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+ field_read_x1y1_y.g4i \ + idct.g4i \ + iq_intra.g4i \ + iq_non_intra.g4i \ + motion_field_uv.g4i \ + motion_field_y.g4i \ + motion_frame_uv.g4i \ + motion_frame_y.g4i \ + read_field_x0y0_uv.g4i \ + read_field_x0y0_y.g4i \ + read_field_x0y1_uv.g4i \ + read_field_x0y1_y.g4i \ + read_field_x1y0_uv.g4i \ + read_field_x1y0_y.g4i \ + read_field_x1y1_uv.g4i \ + read_field_x1y1_y.g4i \ + read_frame_x0y0_uv.g4i \ + read_frame_x0y0_y.g4i \ + read_frame_x0y1_uv.g4i \ + read_frame_x0y1_y.g4i \ + read_frame_x1y0_uv.g4i \ + read_frame_x1y0_y.g4i \ + read_frame_x1y1_uv.g4i \ + read_frame_x1y1_y.g4i \ + $(NULL) + +INTEL_G4A = frame_intra.g4a \ + frame_frame_pred_forward.g4a \ + frame_frame_pred_backward.g4a \ + frame_frame_pred_bidirect.g4a \ + frame_field_pred_forward.g4a \ + frame_field_pred_backward.g4a \ + frame_field_pred_bidirect.g4a \ + lib.g4a \ + field_intra.g4a \ + field_forward.g4a \ + field_forward_16x8.g4a \ + field_backward.g4a \ + field_backward_16x8.g4a \ + field_bidirect.g4a \ + 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+@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 5 -o $@ $< + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/AYUV_Load_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/AYUV_Load_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/AYUV_Load_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/AYUV_Load_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,53 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: AYUV_Load_16x8.asm -//---------------------------------------------------------------- - - -#include "AYUV_Load_16x8.inc" - -// In order to load 64x8 AYUV data (16x8 pixels), we need to divide the data -// into two regions and load them separately. -// -// 32 byte 32 byte -//|----------------|----------------| -//| | | -//| A | B |8 -//| | | -//| | | -//|----------------|----------------| - -// Load the first 32x8 data block -// Packed data block should be loaded as 32x8 pixel block - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin - shl (1) rMSGSRC.0<1>:d acc0:w 2:w { NoDDClr } // H. block origin need to be four times larger - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV:ud { NoDDChk } // Block width and height (32x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud - -//Load the second 32x8 data block -// Offset the origin X - move to next 32 colomns - add (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 32:w // Increase X origin by 8 - -// Size stays the same - 32x8 - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud // Copy message description to message header - send (8) udSRC_YUV(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud - -// Give AYUV region addresses to address register - mov (1) SRC_YUV_OFFSET<1>:ud 0x00400038*32:ud //Address registers contain starting addresses of two halves - -//Directly move the data to destination - $for(0; r[SRC_YUV_OFFSET,%1*32+2]<8,4>:ub - mov (16) uwDEST_U(%1)<1> r[SRC_YUV_OFFSET,%1*32+1]<8,4>:ub - mov (16) uwDEST_V(%1)<1> r[SRC_YUV_OFFSET,%1*32+0]<8,4>:ub - } - \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/AYUV_Load_16x8.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/AYUV_Load_16x8.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/AYUV_Load_16x8.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/AYUV_Load_16x8.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,43 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: AYUV_Load_16x8.inc -// -// AYUV data are first loaded to bottom I/O REGION_2, then unpacked to planar data -// and stored in top I/O REGION_1 - -#undef nY_NUM_OF_ROWS - -#define nY_NUM_OF_ROWS 8 // Number of Y rows per block - -#define nDPR_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Y block size 32x8 -#define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold Y block data (8) - -//Temporary storage for unpacked AYUV data -#define rUNPACK_TEMP REG(r,nTEMP0) -.declare udUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=4 SrcRegion=<8;8,1> Type=ud //1 GRF -.declare ubUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=1 SrcRegion=<32;32,1> Type=ub //1 GRF - -.declare ubBOT_Y_IO Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(32,1) Type=ub - - -#define udSRC_YUV udBOT_Y_IO -#define ubSRC_YUV ubBOT_Y_IO -#define nSRC_YUV_REG nBOT_Y - -#define uwDEST_Y uwTOP_Y -#define uwDEST_U uwTOP_U -#define uwDEST_V uwTOP_V - -#define SRC_YUV_OFFSET a0.0 - -#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel - -// End of AYUV_Load_16x8.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/common.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/common.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/common.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/common.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,610 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#ifndef COMMON_INC -#define COMMON_INC - -// Module name: common.inc -// -// Common header file for all Video-Processing kernels -// - -.default_execution_size (16) -.default_register_type :ub - -.reg_count_total 80 -.reg_count_payload 4 - - -//========== Common constants ========== - -// Bit position constants -#define BIT0 0x01 -#define BIT1 0x02 -#define BIT2 0x04 -#define BIT3 0x08 -#define BIT4 0x10 -#define BIT5 0x20 -#define BIT6 0x40 -#define BIT7 0x80 -#define BIT8 0x0100 -#define BIT9 0x0200 -#define BIT10 0x0400 -#define BIT11 0x0800 -#define BIT12 0x1000 -#define BIT13 0x2000 -#define BIT14 0x4000 -#define BIT15 0x8000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 - -#define nGRFWIB 32 // GRF register width in byte -#define nGRFWIW 16 // GRF register width in word -#define nGRFWID 8 // GRF register width in dword - -#define nTOP_FIELD 0 -#define nBOTTOM_FIELD 1 - -#define nPREVIOUS_FRAME 0 // Previous frame -#define nCURRENT_FRAME 1 // Current frame -#define nNEXT_FRAME 2 // Next frame - -#ifdef GT -// GT DI Kernel -#else // ILK -// ILK DI Kernel -#endif - -//=================================== - -//========== Macros ========== -#define REGION(Width,HStride) // Region definition when ExecSize = Width - -#define RegFile(a) a -#define REG(r,n) _REG(RegFile(r),n) -#define _REG(r,n) __REG(r,n) -#define __REG(r,n) r##n.0 -#define REG2(r,n,s) _REG2(RegFile(r),n,s) -#define _REG2(r,n,s) __REG2(r,n,s) -#define __REG2(r,n,s) r##n.##s - -#define dNULLREG null<1>:d -#define wNULLREG null<1>:w - -#define KERNEL_ID(kernel_ID) mov NULLREG kernel_ID:ud - - -#define NODDCLR -#define NODDCLR_NODDCHK -#define NODDCHK - -//#define NODDCLR { NoDDClr } -//#define NODDCLR_NODDCHK { NoDDClr, NoDDChk } -//#define NODDCHK { NoDDChk } - - -//========== Defines ==================== - - -//========== GRF partition ========== -// r0 header : r0 (1 GRF) -// Static parameters : r1 - r5 (5 GRFS) -// Inline parameters : r6 - r7 (2 GRFs) -// MSGSRC : r9 (1 GRF) -// Top IO region : r10 - r33 (24 GRFS 8 for each component Y,U,V 16X8:w) -// Free space : r34 - r55 (22 GRFS) -// Bottom IO region : r56 - r79 (24 GRFS 8 for each component Y,U,V 16X8:w) -//=================================== - - -//========== Static Parameters ========== -// r1 -#define fPROCAMP_C0 r1.0 // DWORD 0, Procamp constant C0 in :f -#define wPROCAMP_C0 r1.0 // DWORD 0, Procamp constant C0 in :w -#define NUMBER_0002 r1.1 // DWORD 0, 0x0002 used in procamp for GT -#define udCP_MessageFormat r1.0 // DWORD 0, bits 2:3 of DWORD. (CE) -#define udCP_StatePointer r1.0 // DWORD 0, bits 31:5 of DWORD.(CE) - -#define ubSRC_CF_OFFSET r1.4 // DWORD 1, byte 0-2. SRC packed color format YUV offset in :ub - -#define ubDEST_RGB_FORMAT r1.8 // DWORD 2, byte 0. Dest RGB color format (0:ARGB FF:XRGB) -#define ubDEST_CF_OFFSET r1.8 // DWORD 2, byte 0-2. Dest packed color format YUV offset in :ub - -#define fPROCAMP_C1 r1.3 // DWORD 3, Procamp constant C1 in :f -#define wPROCAMP_C1 r1.6 // DWORD 3, Procamp constant C1 in :w -#define NUMBER_0100 r1.7 // DWORD 3, 0x0100 used in procamp for GT - -#define fPROCAMP_C2 r1.4 // DWORD 4, Procamp constant C2 in :f -#define wPROCAMP_C2 r1.8 // DWORD 4, Procamp constant C2 in :w - -#define uwSPITCH_DIV2 r1.10 // DWORD 5, byte 0-1. statistics surface pitch divided by 2 - -#define fVIDEO_STEP_Y r1.6 // DWORD 6, :f, AVS normalized reciprocal of Y Scaling factor -#define ubSTMM_SHIFT r1.24 // DWORD 6, byte 0. Amount of right shift for the DI blending equation -#define ubSTMM_MIN r1.25 // DWORD 6, byte 1. Min STMM for DI blending equation -#define ubSTMM_MAX r1.26 // DWORD 6, byte 2. Max STMM for DI blending equation -#define ubTFLD_FIRST r1.27 // DWORD 6, byte 3. Field parity order - -#define fPROCAMP_C5 r1.7 // DWORD 7, Procamp constant C3 in :f -#define wPROCAMP_C5 r1.14 // DWORD 7, Procamp constant C3 in :w - -// r2 -#define fPROCAMP_C3 r2.0 // DWORD 0, Procamp constant C4 in :f -#define wPROCAMP_C3 r2.0 // DWORD 0, Procamp constant C4 in :w - -#define fCSC_C5 r2.2 // DWORD 2. WG+CSC constant C5 -#define wCSC_C5 r2.4 // DWORD 2. WG+CSC constant C5 - -#define fPROCAMP_C4 r2.3 // DWORD 3, Procamp constant C5 in :f -#define wPROCAMP_C4 r2.6 // DWORD 3, Procamp constant C5 in :w - -#define fCSC_C8 r2.4 // DWORD 4. WG+CSC constant C8 -#define wCSC_C8 r2.8 // DWORD 4. WG+CSC constant C8 -#define fCSC_C9 r2.7 // DWORD 7. WG+CSC constant C9 -#define wCSC_C9 r2.14 // DWORD 7. WG+CSC constant C9 - -// r3 -#define fCSC_C0 r3.0 // DWORD 0. WG+CSC constant C0 -#define wCSC_C0 r3.0 // DWORD 0. WG+CSC constant C0 - -#define fSCALING_STEP_RATIO r3.1 // DWORD 1, = Alpha_X_Scaling_Step / Video_X_scaling_Step :f (blending) -#define fALPHA_STEP_X r3.1 // DWORD 1, = 1/Scale X, 0.5 = 2x, in :f (blending) - -#define fALPHA_STEP_Y r3.2 // DWORD 2, = 1/Scale Y, in :f - -#define fCSC_C4 r3.3 // DWORD 3. WG+CSC constant C4 -#define wCSC_C4 r3.6 // DWORD 3. WG+CSC constant C4 -#define fCSC_C1 r3.4 // DWORD 4. WG+CSC constant C1 -#define wCSC_C1 r3.8 // DWORD 4. WG+CSC constant C1 - -#define wSRC_H_ORI_OFFSET r3.10 // DWORD 5, bytes 0,1 :w -#define wSRC_V_ORI_OFFSET r3.11 // DWORD 5, bytes 2,3 :w - -#define dCOLOR_PIXEL r3.6 // DWORD 6. Color pixel for Colorfill - -#define fCSC_C2 r3.6 // DWORD 6. WG+CSC constant C2 -#define wCSC_C2 r3.12 // DWORD 6. WG+CSC constant C2 -#define fCSC_C3 r3.7 // DWORD 7. WG+CSC constant C3 -#define wCSC_C3 r3.14 // DWORD 7. WG+CSC constant C3 - -// r4 -#define fCSC_C6 r4.0 // DWORD 0. WG+CSC constant C6 -#define wCSC_C6 r4.0 // DWORD 0. WG+CSC constant C6 - -#define wFRAME_ENDX r4.2 // DWORD 1, word 0. Horizontal end = Origin+Width (in pixels)(for multiple blocks) -#define wNUM_BLKS r4.3 // DWORD 1, word 1. Number of blocks to process (for multiple blocks) - -#define wCOPY_ORIX r4.5 // DWORD 2, word 1. A copy of X origin (for multiple blocks) -#define uwNLAS_ENABLE r4.4 // DWORD 2, bit 15, NLAS enble bit - -#define fCSC_C7 r4.3 // DWORD 3. WG+CSC constant C7 -#define wCSC_C7 r4.6 // DWORD 3. WG+CSC constant C7 -#define fCSC_C10 r4.4 // DWORD 4. WG+CSC constant C10 -#define wCSC_C10 r4.8 // DWORD 4. WG+CSC constant C10 - -#define fFRAME_VID_ORIX r4.5 // DWORD 5, Frame horizontal origin normalized for scale kernel - -#define fFRAME_ALPHA_ORIX r4.6 // DWORD 6. Normalized alpha horiz origin for the frame - -#define fCSC_C11 r4.7 // DWORD 7. WG+CSC constant C11 -#define wCSC_C11 r4.14 // DWORD 7. WG+CSC constant C11 - -//======================================== - -//========== Inline parameters =========== -// r5 -#define wORIX r5.0 // DWORD 0, byte 0-1. :w, Destination Block Horizontal Origin in pel -#define wORIY r5.1 // DWORD 0, byte 2-3. :w, Destination Block Vertical Origin in pel - -#define fSRC_VID_H_ORI r5.1 // DWORD 1, :f, SRC Y horizontal origin normalized for scale kernel - -#define fSRC_VID_V_ORI r5.2 // DWORD 2, :f, SRC Y vertical origin normalized for scale kernel - -#define fSRC_ALPHA_H_ORI r5.3 // DWORD 3, :f, Normalized alpha horizontal origin - -#define fSRC_ALPHA_V_ORI r5.4 // DWORD 4, :f, Normalized alpha vertical origin - -#define uwALPHA_MASK_X r5.10 // DWORD 5, byte 0-1 :w, H. alpha mask -#define ubALPHA_MASK_Y r5.22 // DWORD 5, byte 2. :ub,V. alpha mask -#define ubBLK_CNT_X r5.23 // DWORD 5, byte 3, :ub, Horizontal Block Count per thread - -#define udBLOCK_MASK r5.6 // DWORD 6 -#define uwBLOCK_MASK_H r5.12 // DWORD 6, byte 0-1 :uw, Block horizontal mask used in non-DWord aligned kernels -#define ubBLOCK_MASK_V r5.26 // DWORD 6, byte 2 :ub, Block vertical mask used in non-DWord aligned kernels -#define ubNUM_BLKS r5.27 // DWORD 6, byte 3, :ub, Total Block Count per thread - -#define fVIDEO_STEP_X r5.7 // DWORD 7. :f, AVS normalized reciprocal of X Scaling factor - -// r6 -#define fVIDEO_STEP_DELTA r6.0 // DWORD 0. :f, AVS normalized delta between 2 adjacent scaling steps (used for non-linear scaling) - - -//====================== Binding table ========================================= - -#if defined(DNDI) - // DNDI Surface Binding Table - //#define nBI_SRC_CURR 0 // Current input frame surface - //#define nBI_SRC_PRIV 1 // Denoised previous input frame surface - //#define nBI_SRC_STAT 2 // Statistics input surface (STMM / Noise motion history) - //#define nBI_DEST_1ST 3 // 1st deinterlaced output frame surface -// #define nBI_DEST_YUV 3 // Dest frame YUV (for DN only) - //#define nBI_DEST_Y 3 // Dest frame Y (for DN only) - //#define nBI_DEST_2ND 4 // 2nd deinterlaced output frame surface - //#define nBI_DEST_DN_CURR 6 // Denoised current output frame surface - //#define nBI_DEST_STAT 7 // Statistics output surface (STMM / Noise motion history) -// #define nBI_DEST_U 8 // Dest frame U (for DN only) -// #define nBI_DEST_V 9 // Dest frame V (for DN only) -// #define nBI_SRC_U 10 // Src frame U (for DN only) -// #define nBI_SRC_V 11 // Src frame V (for DN only) -// #define nBI_SRC_UV 10 // Current src frame for UV - -#endif - -#if defined(INPUT_PL3) - // PL3 Surface Binding Table -// #define nBI_SRC_ALPHA 0 // Alpha -// #define nBI_SRC_Y 1 // Current src frame -// #define nBI_SRC_U 2 // Current src frame -// #define nBI_SRC_V 3 // Current src frame -// #define nBI_DEST_Y 10 // Dest frame -// #define nBI_DEST_U 11 // Dest frame -// #define nBI_DEST_V 12 // Dest frame -// #define nBI_DEST_YUV 7 // Dest frame -// #define nBI_DEST_RGB 7 // same num as BI_DEST_YUV, never used at the same time -#endif - -#if defined(INPUT_PL2) - // PL2 Surface Binding Table -// #define nBI_SRC_ALPHA 0 // Alpha -// #define nBI_SRC_Y 1 // Current src frame for Y + offseted UV -// #define nBI_SRC_YUV 1 // Current src frame for YUV in case of NV12_AVS -// #define nBI_SRC_UV 2 // Current src frame for UV -// #define nBI_DEST_YUV 7 // Current dest frame for Y + offseted UV -// #define nBI_DEST_RGB 7 // same num as BI_DEST_YUV, never used at the same time -// #define nBI_DEST_Y 10 // Dest frame -// #define nBI_DEST_U 11 // Dest frame -// #define nBI_DEST_V 12 // Dest frame -#endif - -#if defined(INPUT_PA) || defined(COLORFILL) - // Packed Surface Binding Table -// #define nBI_SRC_ALPHA 0 // Alpha -// #define nBI_SRC_YUV 1 // Current src frame -// #define nBI_DEST_YUV 3 // Dest frame -// #define nBI_DEST_RGB 3 // same num as BI_DEST_YUV, never used at the same time -#endif - - -//supper binding table -#define nBI_ALPHA_SRC 0 -#define nBI_CURRENT_SRC_YUV 1 -#define nBI_FIELD_COPY_SRC_1_YUV 1 -#define nBI_CURRENT_SRC_Y 1 -#define nBI_FIELD_COPY_SRC_1_Y 1 -#define nBI_CURRENT_SRC_RGB 1 -#define nBI_CURRENT_SRC_UV 2 -#define nBI_FIELD_COPY_SRC_1_UV 2 -#define nBI_CURRENT_SRC_U 2 -#define nBI_FIELD_COPY_SRC_1_U 2 -#define nBI_CURRENT_SRC_V 3 -#define nBI_FIELD_COPY_SRC_1_V 3 -#define nBI_TEMPORAL_REFERENCE_YUV 4 -#define nBI_FIELD_COPY_SRC_2_YUV 4 -#define nBI_TEMPORAL_REFERENCE_Y 4 -#define nBI_FIELD_COPY_SRC_2_Y 4 -#define nBI_CURRENT_SRC_YUV_HW_DI 4 -#define nBI_TEMPORAL_REFERENCE_UV 5 -#define nBI_FIELD_COPY_SRC_2_UV 5 -#define nBI_TEMPORAL_REFERENCE_U 5 -#define nBI_FIELD_COPY_SRC_2_U 5 -#define nBI_DENOISED_PREV_HW_DI 5 -#define nBI_TEMPORAL_REFERENCE_V 6 -#define nBI_FIELD_COPY_SRC_2_V 6 -#define nBI_STMM_HISTORY 6 -#define nBI_DESTINATION_YUV 7 -#define nBI_DESTINATION_RGB 7 -#define nBI_DESTINATION_Y 7 -#define nBI_DESTINATION_UV 8 -#define nBI_DESTINATION_U 8 -#define nBI_DESTINATION_V 9 -#define nBI_DESTINATION_1_YUV 10 -#define nBI_DESTINATION_1_Y 10 -#define nBI_DESTINATION_1_UV 11 -#define nBI_DESTINATION_1_U 11 -#define nBI_DESTINATION_1_V 12 -#define nBI_DESTINATION_2_YUV 13 -#define nBI_DESTINATION_2_Y 13 -#define nBI_DESTINATION_2_UV 14 -#define nBI_DESTINATION_2_U 14 -#define nBI_DESTINATION_2_V 15 -#define nBI_STMM_HISTORY_OUTPUT 20 -#define nBI_TEMPORAL_REFERENCE_YUV_PDI 21 -#define nBI_TEMPORAL_REFERENCE_Y_PDI 21 -#define nBI_TEMPORAL_REFERENCE_UV_PDI 22 -#define nBI_TEMPORAL_REFERENCE_U_PDI 22 -#define nBI_TEMPORAL_REFERENCE_V_PDI 23 -#define nBI_SUBVIDEO_YUV 26 -#define nBI_SUBVIDEO_Y 26 -#define nBI_SUBVIDEO_UV 27 -#define nBI_SUBVIDEO_U 27 -#define nBI_SUBVIDEO_V 28 -#define nBI_SUBPICTURE_YUV 29 -#define nBI_SUBPICTURE_P8 29 -#define nBI_SUBPICTURE_A8 30 -#define nBI_GRAPHIC_YUV 31 -#define nBI_GRAPHIC_P8 31 -#define nBI_GRAPHIC_A8 32 - - - -//========== Planar Sampler State Table Index ========== -#define nSI_SRC_ALPHA 0x000 // Sampler State for Alpha - -//Sampler Index for AVS/IEF messages -#define nSI_SRC_Y 0x400 // Sampler State for Y -#define nSI_SRC_U 0x800 // Sampler State for U -#define nSI_SRC_V 0xC00 // Sampler State for V -#define nSI_SRC_UV 0x800 // For NV12 surfaces -#define nSI_SRC_YUV 0x400 // For Packed surfaces -#define nSI_SRC_RGB 0x400 // For ARGB surfaces - -//Sampler Index for SIMD16 sampler messages -#define nSI_SRC_SIMD16_Y 0x100 // Sampler State for Y -#define nSI_SRC_SIMD16_U 0x200 // Sampler State for U -#define nSI_SRC_SIMD16_V 0x300 // Sampler State for V -#define nSI_SRC_SIMD16_UV 0x200 // For NV12 surfaces -#define nSI_SRC_SIMD16_YUV 0x100 // For Packed surfaces -#define nSI_SRC_SIMD16_RGB 0x100 // For ARGB surfaces - - - -// Common Registers -#define pCF_Y_OFFSET a0.4 // Address register holding Y offset -#define pCF_U_OFFSET a0.5 // Address register holding U offset -#define pCF_V_OFFSET a0.6 // Address register holding V offset - -// #define YUV_ORI ORIX // Used by writing packed data to dport - - -//================= Message Payload Header fields ============================== -#define IDP r0.2:ud // Interface Descriptor Pointer - -//================= Common Message Descriptor TBD add common load and save ===== -// Message descriptor for dataport media write -#ifdef GT - // Message Descriptors - // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) - // 1 (header present 1) 0 0 1010 (media block write) 00000 - // 00000000 (binding table index - set later) - // = 0x02094000 - #define nDPMW_MSGDSC 0x02094000 - #define nDPMR_MSGDSC 0x02098000 // Data Port Media Block Read Message Descriptor - // TBD -#else // ILK - // Message Descriptors - // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) - // 1 (header present 1) 000 0 010 (media block write) 0000 - // 00000000 (binding table index - set later) - // = 0x02082000 - #define nDPMW_MSGDSC 0x02082000 // Data Port Media Block Write Message Descriptor - #define nDPMR_MSGDSC 0x0208A000 // Data Port Media Block Read Message Descriptor -#endif - -// Message Length defines -#define nMSGLEN_1 0x02000000 // Message Length of 1 GRF for Send -#define nMSGLEN_2 0x04000000 // Message Length of 2 GRF for Send -#define nMSGLEN_4 0x08000000 // Message Length of 4 GRF for Send -#define nMSGLEN_8 0x10000000 // Message Length of 8 GRF for Send - -// Response Length defines -#define nRESLEN_1 0x00100000 // Message Response Length of 1 GRF from Send -#define nRESLEN_2 0x00200000 // Message Response Length of 2 GRF from Send -#define nRESLEN_3 0x00300000 // Message Response Length of 3 GRF from Send -#define nRESLEN_4 0x00400000 // Message Response Length of 4 GRF from Send -#define nRESLEN_5 0x00500000 // Message Response Length of 5 GRF from Send -#define nRESLEN_8 0x00800000 // Message Response Length of 8 GRF from Send -#define nRESLEN_9 0x00900000 // Message Response Length of 9 GRF from Send -#define nRESLEN_11 0x00B00000 // Message Response Length of 11 GRF from Send -#define nRESLEN_12 0x00C00000 // Message Response Length of 12 GRF from Send -#define nRESLEN_16 0x01000000 // Message Response Length of 16 GRF from Send - -// Block Width and Height Size defines -#define nBLOCK_WIDTH_4 0x00000003 // Block Width 4 -#define nBLOCK_WIDTH_5 0x00000004 // Block Width 5 -#define nBLOCK_WIDTH_8 0x00000007 // Block Width 8 -#define nBLOCK_WIDTH_9 0x00000008 // Block Width 9 -#define nBLOCK_WIDTH_12 0x0000000B // Block Width 12 -#define nBLOCK_WIDTH_16 0x0000000F // Block Width 16 -#define nBLOCK_WIDTH_20 0x00000013 // Block Width 20 -#define nBLOCK_WIDTH_32 0x0000001F // Block Width 32 -#define nBLOCK_HEIGHT_1 0x00000000 // Block Height 1 -#define nBLOCK_HEIGHT_2 0x00010000 // Block Height 2 -#define nBLOCK_HEIGHT_4 0x00030000 // Block Height 4 -#define nBLOCK_HEIGHT_5 0x00040000 // Block Height 5 -#define nBLOCK_HEIGHT_8 0x00070000 // Block Height 8 - -// Extended Message Descriptors -#define nEXTENDED_MATH 0x1 -#define nSMPL_ENGINE 0x2 -#define nMESSAGE_GATEWAY 0x3 -#define nDATAPORT_READ 0x4 -#define nDATAPORT_WRITE 0x5 -#define nURB 0x6 -#define nTS_EOT 0x27 // with End-Of-Thread bit ON - -// Common message descriptors: -#ifdef GT - #define nEOT_MSGDSC 0x02000010 // End of Thread Message Descriptor - #define IF_NULL null:uw null:uw null:uw //for different if instructions on ILK and Gen6 -#else //ILK - #define nEOT_MSGDSC 0x02000000 // End of Thread Message Descriptor - #define IF_NULL -#endif - - -//===================== Math Function Control =================================== -#define mfcINV 0x1 // reciprocal -#define mfcLOG 0x2 // log -#define mfcEXP 0x3 // exponent -#define mfcSQRT 0x4 // square root -#define mfcRSQ 0x5 // reciprocal square root -#define mfcSIN 0x6 // sine (in radians) -#define mfcCOS 0x7 // cosine (in radians) -#define mfcSINCOS 0x8 // dst0 = sin of src0, dst1 = cosine of src0 (in radians) - GT+ ONLY -#define mfcPOW 0xA // abs(src0) raised to the src1 power -#define mfcINT_DIV_QR 0xB // return quotient and remainder -#define mfcINT_DIV_Q 0xC // return quotient -#define mfcINT_DIV_R 0xD // return remainder - - -//=================== Message related registers ================================= - -#ifdef GT - #define udDUMMY_NULL -#else // _ILK - #define udDUMMY_NULL null:ud // Used in send inst as src0 -#endif - - -//----------- Message Registers ------------ -#define mMSGHDR m1 // Message Payload Header -#define mMSGHDRY m1 // Message Payload Header register for Y data -#define mMSGHDRU m2 // Message Payload Header register for U data -#define mMSGHDRV m3 // Message Payload Header register for V data -#define mMSGHDRYA m4 // Second Message Payload Header register for Y data -#define mMSGHDRH m5 // Message Payload Header register for motion history -#define mMSGHDRY1 m1 // Message Payload Header register for first Y data -#define mMSGHDRY2 m2 // Message Payload Header register for second Y data -#define mMSGHDRY3 m3 // Message Payload Header register for third Y data -#define mMSGHDRY4 m4 // Message Payload Header register for fourth Y data -#define mMSGHDRY5 m5 // Message Payload Header register for fifth Y data -#define mMSGHDRY6 m6 // Message Payload Header register for sixth Y data -#define mMSGHDR_EOT m15 // Dummy Message Register for EOT - -#define rMSGSRC r8 // Message source register -#define pMSGDSC a0.0:ud // Message Descriptor register (type DWORD) - -#define udMH_ORI rMSGSRC.0 // Data Port Media Block R/W message header block offset -#define udMH_ORIX rMSGSRC.0 // Data Port Media Block R/W message header X offset -#define udMH_ORIY rMSGSRC.1 // Data Port Media Block R/W message header Y offset -#define udMH_SIZE rMSGSRC.2 // Data Port Media Block R/W message header block width & height - -// M2 - M9 for message data payload -.declare mubMSGPAYLOAD Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub -.declare muwMSGPAYLOAD Base=m2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw -.declare mudMSGPAYLOAD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud -.declare mfMSGPAYLOAD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=f - -//=================== End of thread instruction =========================== -#ifdef GT - #define END_THREAD mov (8) mMSGHDR_EOT<1>:ud r0.0<8;8,1>:ud \n\ - send (1) null<1>:d mMSGHDR_EOT nTS_EOT nEOT_MSGDSC -#else // ILK This should be changed to 1 instruction; I have tested it and it works - vK - #define END_THREAD mov (8) mMSGHDR_EOT<1>:ud r0.0<8;8,1>:ud \n\ - send (1) dNULLREG mMSGHDR_EOT udDUMMY_NULL nTS_EOT nEOT_MSGDSC:ud -#endif - - -//======================================================================= -// Region declarations for SRC and DEST as TOP and BOT - -// Common I/O regions -#define nREGION_1 1 -#define nREGION_2 2 - -//*** These region base GRFs are fixed regardless planar/packed, and data alignment. -//*** Each kernel is responsible to select the correct region declaration below. -//*** YUV regions are not necessarily next to each other. -#define nTOP_Y 10 // r10 - r17 (8 GRFs) -#define nTOP_U 18 // r18 - r25 (8 GRFs) -#define nTOP_V 26 // r26 - r33 (8 GRFs) - -#define nBOT_Y 56 // r56 - r63 (8 GRFs) -#define nBOT_U 64 // r64 - r71 (8 GRFs) -#define nBOT_V 72 // r72 - r79 (8 GRFs) - -// Define temp space for any usages -#define nTEMP0 34 -#define nTEMP1 35 -#define nTEMP2 36 -#define nTEMP3 37 -#define nTEMP4 38 -#define nTEMP5 39 -#define nTEMP6 40 -#define nTEMP7 41 -#define nTEMP8 42 -#define nTEMP10 44 -#define nTEMP12 46 -#define nTEMP14 48 -#define nTEMP16 50 -#define nTEMP17 51 -#define nTEMP18 52 - -#define nTEMP24 58 - -// Common region 1 -.declare ubTOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub -.declare ubTOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub -.declare ubTOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub - -.declare uwTOP_Y Base=REG(r,nTOP_Y) ElementSize=2 SrcRegion=REGION(16,1) DstRegion=<1> Type=uw -.declare uwTOP_U Base=REG(r,nTOP_U) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare uwTOP_V Base=REG(r,nTOP_V) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare ub2TOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(16,2) DstRegion=<1> Type=ub -.declare ub2TOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub -.declare ub2TOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub - -.declare ub4TOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub -.declare ub4TOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,4) Type=ub -.declare ub4TOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,4) Type=ub - -.declare ubTOP_ARGB Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub - -// Used by "send" instruction -.declare udTOP_Y_IO Base=REG(r,nTOP_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud -.declare udTOP_U_IO Base=REG(r,nTOP_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud -.declare udTOP_V_IO Base=REG(r,nTOP_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud - -// Common region 2 -.declare ubBOT_Y Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub -.declare ubBOT_U Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub -.declare ubBOT_V Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub - -.declare uwBOT_Y Base=REG(r,nBOT_Y) ElementSize=2 SrcRegion=REGION(16,1) DstRegion=<1> Type=uw -.declare uwBOT_U Base=REG(r,nBOT_U) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare uwBOT_V Base=REG(r,nBOT_V) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare ub2BOT_Y Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(16,2) DstRegion=<1> Type=ub -.declare ub2BOT_U Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub -.declare ub2BOT_V Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub - -.declare ubBOT_ARGB Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub - -// Used by "send" instruction -.declare udBOT_Y_IO Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud -.declare udBOT_U_IO Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud -.declare udBOT_V_IO Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud - -// End of common.inc - -#endif // COMMON_INC diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Expansion.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Expansion.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Expansion.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Expansion.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,31 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: Expansion.inc -// Number of U/V rows per block definition -#undef nUV_NUM_OF_ROWS -#ifdef EXPAND_9x5 - #define nUV_NUM_OF_ROWS 6 -#else - #define nUV_NUM_OF_ROWS 8 -#endif - -// Source/destination region definitions -#undef uwDEST_U -#undef uwDEST_V -#if (nSRC_REGION==nREGION_1) - #define uwDEST_U uwTOP_U - #define uwDEST_V uwTOP_V -#elif (nSRC_REGION==nREGION_2) - #define uwDEST_U uwBOT_U - #define uwDEST_V uwBOT_V -#endif - -// End of Expansion.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/IMC3_Load_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/IMC3_Load_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/IMC3_Load_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/IMC3_Load_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,47 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: IMC3_Load_8x4.asm -// -//---------------------------------------------------------------- - -#define IMC3_LOAD_8x4 -#include "PL3_Load.inc" - -// Load 16x8 planar Y ---------------------------------------------------------- - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) - - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 8x4 planar U and V ----------------------------------------------------- - asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x4) - - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud - mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) - mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) - } - -// End of IMC3_Load_8x4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/IMC3_Load_8x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/IMC3_Load_8x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/IMC3_Load_8x5.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/IMC3_Load_8x5.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,47 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: IMC3_Load_8x5.asm -// -//---------------------------------------------------------------- - -#define IMC3_LOAD_8x5 -#include "PL3_Load.inc" - -// Load 16x8 planar Y ---------------------------------------------------------- - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) - - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 8x5 planar U and V ----------------------------------------------------- - asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x5) - - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud - mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) - mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) - } - -// End of IMC3_Load_8x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/IMC3_Load_9x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/IMC3_Load_9x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/IMC3_Load_9x5.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/IMC3_Load_9x5.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,50 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: IMC3_Load_9x5.asm -// -//---------------------------------------------------------------- -// This module loads 16x8 Y, 9x5 U and 9x5 V planar data blocks for CSC module -// and stores it in byte-aligned format. -//---------------------------------------------------------------- - -#define IMC3_LOAD_9x5 -#include "PL3_Load.inc" - -// Load 16x8 planar Y ---------------------------------------------------------- - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) - - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 9x5 planar U and V ----------------------------------------------------- - asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (12x5) - - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud - mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for(nUV_NUM_OF_ROWS-2; >-1; -1) { - mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) - mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) - } - -// End of IMC3_Load_9x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Init_All_Regs.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Init_All_Regs.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Init_All_Regs.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Init_All_Regs.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,18 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#ifdef GT // to remove error messages of un-initialized GRF - .declare udGRF_space Base=r0.0 ElementSize=4 SrcRegion=REGION(8,1) Type=ud - - $for (7; <80; 1) { - mov (8) udGRF_space(%1)<1> 0:ud - } -#else -#endif \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Multiple_Loop.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Multiple_Loop.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Multiple_Loop.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Multiple_Loop.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,84 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -///////////////////////////////////////////////////////////////////////////////// -// Multiple_Loop.asm - - -// This lable is for satisfying component kernel build. -// DL will remove this label and reference the real one in Multiple_Loop_Head.asm. -#if defined(COMPONENT) -VIDEO_PROCESSING_LOOP: -#endif - - -//===== Possible build flags for component kernels -// 1) INC_SCALING -// 2) INC_BLENDING -// 3) INC_BLENDING and INC_SCALING -// 4) (no flags) - - -#define MxN_MULTIPLE_BLOCKS - -//------------------------------------------------------------------------------ -#if defined(MxN_MULTIPLE_BLOCKS) -// Do Multiple Block Processing ------------------------------------------------ - - // The 1st block has been processed before entering the loop - - // Processed all blocks? - add.z.f0.0 (1) wNUM_BLKS:w wNUM_BLKS:w -1:w - - // Reached multi-block width? - add (1) wORIX:w wORIX:w 16:w - cmp.l.f0.1 (1) null:w wORIX:w wFRAME_ENDX:w // acc0.0 has wORIX - - #if defined(INC_SCALING) - // Update SRC_VID_H_ORI for scaling - mul (1) REG(r,nTEMP0):f fVIDEO_STEP_X:f 16.0:f - add (1) fSRC_VID_H_ORI:f REG(r,nTEMP0):f fSRC_VID_H_ORI:f - #endif - - #if defined(INC_BLENDING) - // Update SRC_ALPHA_H_ORI for blending - mul (1) REG(r,nTEMP0):f fALPHA_STEP_X:f 16.0:f - add (1) fSRC_ALPHA_H_ORI:f REG(r,nTEMP0):f fSRC_ALPHA_H_ORI:f - #endif - - (f0.0)jmpi (1) END_VIDEO_PROCESSING // All blocks are done - Exit loop - - (f0.1)jmpi (1) VIDEO_PROCESSING_LOOP // If not the end of row, goto the beginning of the loop - - //If end of row, restart Horizontal offset and calculate Vertical offsets next row. - mov (1) wORIX:w wCOPY_ORIX:w - add (1) wORIY:w wORIY:w 8:w - - #if defined(INC_SCALING) - // Update SRC_VID_H_ORI and SRC_VID_V_ORI for scaling - mov (1) fSRC_VID_H_ORI:f fFRAME_VID_ORIX:f // Reset normalised X origin to 0 for video and alpha - mul (1) REG(r,nTEMP0):f fVIDEO_STEP_Y:f 8.0:f - add (1) fSRC_VID_V_ORI:f REG(r,nTEMP0):f fSRC_VID_V_ORI:f - #endif - - #if defined(INC_BLENDING) - // Update SRC_ALPHA_H_ORI and SRC_ALPHA_V_ORI for blending - mov (1) fSRC_ALPHA_H_ORI:f fFRAME_ALPHA_ORIX:f // Reset normalised X origin to 0 for video and alpha - mul (1) REG(r,nTEMP0):f fALPHA_STEP_Y:f 8.0:f - add (1) fSRC_ALPHA_V_ORI:f REG(r,nTEMP0):f fSRC_ALPHA_V_ORI:f - #endif - - jmpi (1) VIDEO_PROCESSING_LOOP // Continue Loop - -END_VIDEO_PROCESSING: - nop - -#endif -END_THREAD // End of Thread \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Multiple_Loop_Head.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Multiple_Loop_Head.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/Multiple_Loop_Head.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/Multiple_Loop_Head.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,23 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -////////////////////////////////////////////////////////////////////////////////// -// Multiple_Loop_Head.asm -// This code sets up the loop control for multiple blocks per thread - - mul (1) wFRAME_ENDX:w ubBLK_CNT_X:ub 16:uw { NoDDClr } // Build multi-block loop counters - mov (1) wNUM_BLKS:w ubNUM_BLKS:ub { NoDDClr, NoDDChk } // Copy num blocks to word variable - mov (1) wCOPY_ORIX:w wORIX:w { NoDDChk } // Copy multi-block origin in pixel - mov (2) fFRAME_VID_ORIX<1>:f fSRC_VID_H_ORI<4;2,2>:f // Copy src video origin for scaling, and alpha origin for blending - add (1) wFRAME_ENDX:w wFRAME_ENDX:w wORIX:w // Continue building multi-block loop counters - -VIDEO_PROCESSING_LOOP: // Loop back entry point as the biginning of the loop for multiple blocks - -// Beginning of the loop diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV11_Load_4x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV11_Load_4x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV11_Load_4x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV11_Load_4x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: NV11_Load_4x8.asm -//---------------------------------------------------------------- - -#define NV11_LOAD_4x8 -#include "PL2_Load.inc" - -// Load 16x8 NV11 Y ------------------------------------------------------------ - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 8x8 NV11 UV ---------------------------------------------------------- - asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x8) - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for (nUV_NUM_OF_ROWS/4-1; >-1; -1) { - mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<32;16,2> - mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<32;16,2> - } - -// End of NV11_Load_4x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV11_Load_5x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV11_Load_5x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV11_Load_5x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV11_Load_5x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: NV11_Load_5x8.asm -//---------------------------------------------------------------- - -#define NV11_LOAD_5x8 -#include "PL2_Load.inc" - -// Load 16x8 NV11 Y ------------------------------------------------------------ - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 12x8 NV11 UV --------------------------------------------------------- - asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (12x8) - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> - mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> - } - -// End of NV11_Load_5x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV12_Load_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV12_Load_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV12_Load_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV12_Load_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: NV12_Load_8x4.asm -//---------------------------------------------------------------- - -#define NV12_LOAD_8x4 -#include "PL2_Load.inc" - -// Load 16x8 planar Y ---------------------------------------------------------- - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 8x4 planar U and V ----------------------------------------------------- - asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<32;16,2> - mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<32;16,2> - } - -// End of NV12_Load_8x4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV12_Load_8x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV12_Load_8x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV12_Load_8x5.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV12_Load_8x5.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: NV12_Load_8x5.asm -//---------------------------------------------------------------- - -#define NV12_LOAD_8x5 -#include "PL2_Load.inc" - -// Load 16x8 planar Y ---------------------------------------------------------- - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 8x5 planar U and V ----------------------------------------------------- - asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x5) - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> - mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> - } - -// End of NV12_Load_8x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV12_Load_9x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV12_Load_9x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/NV12_Load_9x5.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/NV12_Load_9x5.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: NV12_Load_9x5.asm -//---------------------------------------------------------------- - -#define NV12_LOAD_9x5 -#include "PL2_Load.inc" - -// Load 16x8 planar Y ---------------------------------------------------------- - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - -// Load 9x5 planar U and V ----------------------------------------------------- - asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (20x5) - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (nY_NUM_OF_ROWS-1; >-1; -1) { - mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) - } -#endif - $for(nUV_NUM_OF_ROWS-2; >-1; -1) { - mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> - mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> - } - -// End of NV12_Load_9x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/P208_Load_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/P208_Load_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/P208_Load_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/P208_Load_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,41 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: P208_Load_8x8.asm -//---------------------------------------------------------------- - -#define P208_LOAD_8x8 -#include "PL2_Load.inc" - - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y Block width and height (16x8) (U/V block size is the same) - -// Load 16x8 P208 Y ------------------------------------------------------------ -#if !defined(LOAD_UV_ONLY) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - - // Load 16x8 planar UV ----------------------------------------------------- - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (0; - mov (16) uwDEST_V(0,%1*16) ubSRC_U(0,%1*32+1)<32;16,2> - } - -// End of P208_Load_8x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/P208_Load_9x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/P208_Load_9x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/P208_Load_9x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/P208_Load_9x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: P208_Load_9x8.asm -//---------------------------------------------------------------- - -#define P208_LOAD_9x8 -#include "PL2_Load.inc" - - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin - -// Load 16x8 P208 Y ------------------------------------------------------------ -#if !defined(LOAD_UV_ONLY) - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud -#endif - - // Load 16x8 planar UV ----------------------------------------------------- - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (20x8) - mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud - -// Convert to word-aligned format ---------------------------------------------- -#if !defined(LOAD_UV_ONLY) - $for (0; - mov (16) uwDEST_V(0,%1*16) ubSRC_U(0,%1*32+1)<32;16,2> - } - -// End of P208_Load_9x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PA_Load_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PA_Load_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PA_Load_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PA_Load_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,33 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PA_Load_8x8.asm -//---------------------------------------------------------------- - -#define PA_LOAD_8x8 -#include "PA_Load.inc" - -// Load 16x8 packed data block -// Packed data block should be loaded as 32x8 pixel block - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin - shl (1) rMSGSRC.0<1>:d acc0:w 1:w // H. block origin need to be doubled - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV:ud // Block width and height (32x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud - -// Unpack to "planar" YUV422 format in word-aligned bytes - add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub nSRC_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block - $for(0; r[pCF_Y_OFFSET, %1*nGRFWIB]REGION(16,2) - mov (8) uwDEST_U(0, %1*8)<1> r[pCF_U_OFFSET, %1*nGRFWIB]REGION(8,4) - mov (8) uwDEST_V(0, %1*8)<1> r[pCF_V_OFFSET, %1*nGRFWIB]REGION(8,4) - } - -// End of PA_Load_8x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PA_Load_9x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PA_Load_9x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PA_Load_9x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PA_Load_9x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,47 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PA_Load_9x8.asm -//---------------------------------------------------------------- -// This module loads 16x8 Y, 9x8 U and 9x8 V planar data blocks for CSC module -// and stores it in word-aligned format. -//---------------------------------------------------------------- - -#define PA_LOAD_9x8 -#include "PA_Load.inc" - -// Load 18x8 packed data block -// Packed data block should be loaded as 36x8 pixel block - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin - shl (1) rMSGSRC.0<1>:d acc0:w 1:w // H. block origin need to be doubled - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_MAIN:ud // Block width and height (32x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_MAIN+nBI_CURRENT_SRC_YUV:ud - - add (1) rMSGSRC.0<1>:d rMSGSRC.0:d 32:w //the last 4 pixels are read again for optimization - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_ADDITION:ud // Block width and height (4x8) - mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_YUV(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_ADDITION+nBI_CURRENT_SRC_YUV:ud - -// Unpack to "planar" YUV422 format in word-aligned bytes - add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub nSRC_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block - $for(0; r[pCF_Y_OFFSET, %1*nGRFWIB]REGION(16,2) - mov (8) uwDEST_U(0, %1*16)<1> r[pCF_U_OFFSET, %1*nGRFWIB]REGION(8,4) - mov (8) uwDEST_V(0, %1*16)<1> r[pCF_V_OFFSET, %1*nGRFWIB]REGION(8,4) - } - - $for(0; r[pCF_U_OFFSET, %1*4+256]REGION(1,0) - mov (1) uwDEST_V(0, %1*16+8)<1> r[pCF_V_OFFSET, %1*4+256]REGION(1,0) - } - //UV expansion done in PL9x8_PL16x8.asm module - -// End of PA_Load_9x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PA_Load.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PA_Load.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PA_Load.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PA_Load.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,42 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PA_Load.inc -// -// YUV422 data are first loaded to bottom I/O REGION_2, then unpacked to planar data -// and stored in top I/O REGION_1 - -#undef nY_NUM_OF_ROWS -#undef nUV_NUM_OF_ROWS - -#define nY_NUM_OF_ROWS 8 // Number of Y rows per block -#define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - -#if defined(PA_LOAD_8x8) - #define nDPR_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Y block size 32x8 - #define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold Y block data (8) -#endif -#if defined(PA_LOAD_9x8) - #define nDPR_BLOCK_SIZE_YUV_MAIN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Main YUV block size 32x8 - #define nDPR_MSG_SIZE_YUV_MAIN nRESLEN_8 // # of MRF's to hold Y block data (8) - #define nDPR_BLOCK_SIZE_YUV_ADDITION nBLOCK_WIDTH_4+nBLOCK_HEIGHT_8 // Additional YUV block size 4x8 - #define nDPR_MSG_SIZE_YUV_ADDITION nRESLEN_1 // # of MRF's to hold Y block data (8) -#endif - -#define udSRC_YUV udBOT_Y_IO -#define nSRC_YUV_REG nBOT_Y - -#define uwDEST_Y uwTOP_Y -#define uwDEST_U uwTOP_U -#define uwDEST_V uwTOP_V - -#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel - -// End of PA_Load.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL16x8_PL8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL16x8_PL8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL16x8_PL8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL16x8_PL8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,38 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL16x8_PL8x4.asm -//---------------------------------------------------------------- - -#include "common.inc" - -#ifndef DEST_U //DEST_U, DEST_V not defined - - #if (nSRC_REGION==nREGION_1) - #define DEST_Y uwTOP_Y - #define DEST_U uwTOP_U - #define DEST_V uwTOP_V - #elif (nSRC_REGION==nREGION_2) - #define DEST_Y uwBOT_Y - #define DEST_U uwBOT_U - #define DEST_V uwBOT_V - #endif - -#endif - -//Convert 444 from sampler to 422 -$for (0, 0; <8; 2, 1) { - mov (8) DEST_U(0,%2*8)<1> DEST_U(%1)<16;8,2> - mov (8) DEST_V(0,%2*8)<1> DEST_V(%1)<16;8,2> -} - -// Re-define new number of lines -#undef nUV_NUM_OF_ROWS -#define nUV_NUM_OF_ROWS 4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL16x8_PL8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL16x8_PL8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL16x8_PL8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL16x8_PL8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,36 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL16x8_PL8x8.asm -//---------------------------------------------------------------- - -#include "common.inc" - -#ifndef DEST_U - - //DEST_U, DEST_V not defined - #if (nSRC_REGION==nREGION_1) - #define DEST_Y uwTOP_Y - #define DEST_U uwTOP_U - #define DEST_V uwTOP_V - #elif (nSRC_REGION==nREGION_2) - #define DEST_Y uwBOT_Y - #define DEST_U uwBOT_U - #define DEST_V uwBOT_V - #endif - -#endif - - -//Convert 444 from sampler to 422 -$for (0, 0; <8; 2, 1) { - mov DEST_U(%2)<1> DEST_U(%1)<16;8,2> - mov DEST_V(%2)<1> DEST_V(%1)<16;8,2> -} diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL2_Load.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL2_Load.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL2_Load.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL2_Load.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,78 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL2_Load.inc - -#undef nY_NUM_OF_ROWS -#undef nUV_NUM_OF_ROWS - -#define nY_NUM_OF_ROWS 8 // Number of Y rows per block -#define nDPR_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 -#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) - - -#if defined(NV11_LOAD_4x8) - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_8 // U/V block size 8x8 - #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) -#endif - -#if defined(NV11_LOAD_5x8) - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_12+nBLOCK_HEIGHT_8 // U/V block size 12x8 - #define nDPR_MSG_SIZE_UV nRESLEN_4 // # of MRF's to hold U/V block data (4) -#endif -#if defined(NV12_LOAD_8x4) - #define nUV_NUM_OF_ROWS 4 // Number of U/V rows per block - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // U/V block size 16x4 - #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) -#endif -#if defined(NV12_LOAD_8x5) - #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_5 // U/V block size 16x5 - #define nDPR_MSG_SIZE_UV nRESLEN_3 // # of MRF's to hold U/V block data (3) -#endif -#if defined(NV12_LOAD_9x5) - #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_20+nBLOCK_HEIGHT_5 // U/V block size 20x5 - #define nDPR_MSG_SIZE_UV nRESLEN_5 // # of MRF's to hold U/V block data (5) -#endif -#if defined(P208_LOAD_8x8) - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // U/V block size 16x8 - #define nDPR_MSG_SIZE_UV nRESLEN_4 // # of MRF's to hold U/V block data (4) -#endif -#if defined(P208_LOAD_9x8) - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_20+nBLOCK_HEIGHT_8 // U/V block size 20x8 - #define nDPR_MSG_SIZE_UV nRESLEN_8 // # of MRF's to hold U/V block data (8) -#endif - -// Source/destination region definitions -#if !defined(udSRC_Y) - #define udSRC_Y udBOT_Y_IO // Default Y source region is top Y region -#endif - -#if !defined(udSRC_U) - #define udSRC_U udBOT_U_IO // Default U source region is top U region -#endif - -#define ubSRC_Y ubBOT_Y -#define nSRC_Y_REG nBOT_Y -#define ubSRC_U ubBOT_U -#define nSRC_U_REG nBOT_U - -#define uwDEST_Y uwTOP_Y // However they can be transferred to word-aligned byte if desired -#define uwDEST_U uwTOP_U -#define uwDEST_V uwTOP_V - -#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel - -// End of PL2_Load.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL3_Load.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL3_Load.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL3_Load.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL3_Load.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,59 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL3_Load.inc - -#undef nY_NUM_OF_ROWS -#undef nUV_NUM_OF_ROWS - -#define nY_NUM_OF_ROWS 8 // Number of Y rows per block -#define nDPR_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 -#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) - -#if defined(IMC3_LOAD_8x4) - #define nUV_NUM_OF_ROWS 4 // Number of U/V rows per block - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // U/V block size 8x4 - #define nDPR_MSG_SIZE_UV nRESLEN_1 // # of MRF's to hold U/V block data (1) -#endif -#if defined(IMC3_LOAD_8x5) - #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_5 // U/V block size 8x5 - #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) -#endif -#if defined(IMC3_LOAD_9x5) - #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_12+nBLOCK_HEIGHT_5 // U/V block size 12x5 - #define nDPR_MSG_SIZE_UV nRESLEN_3 // # of MRF's to hold U/V block data (3) -#endif - -// Source/destination region definitions -#if !defined(udSRC_Y) - #define udSRC_Y udBOT_Y_IO // Default Y source region is top Y region -#endif - -#if !defined(udSRC_U) - #define udSRC_U udBOT_U_IO // Default U source region is top U region -#endif - -#if !defined(udSRC_V) - #define udSRC_V udBOT_V_IO // Default V source region is top V region -#endif - -#define ubSRC_Y ubBOT_Y // Loading data are always in byte type -#define ubSRC_U ubBOT_U -#define ubSRC_V ubBOT_V - -#define uwDEST_Y uwTOP_Y // However they can be transferred to word-aligned byte if desired -#define uwDEST_U uwTOP_U -#define uwDEST_V uwTOP_V - -#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel - -// End of PL3_Load.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL4x8_Save_NV11.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL4x8_Save_NV11.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL4x8_Save_NV11.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL4x8_Save_NV11.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,86 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - -#include "PL4x8_Save_NV11.inc" - - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -#if !defined(SAVE_UV_ONLY) -// Save current planar frame Y block data (16x8) ------------------------------- - - mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin - mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) - -///* Yoni - masking is not relevant for ILK?!? -// -// //Use the mask to determine which pixels shouldn't be over-written -// cmp.ge.f0.0 (1) NULLREG BLOCK_MASK_D:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified -// (f0.0) jmpi WritePlanarToDataPort -// -// //If mask is not all 1's, then load the entire 16x8 block -// //so that only those bytes may be modified that need to be (using the mask) -// send (8) SRC_YD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00040000+BI_DEST_Y:ud //16x8 -// -// asr (2) MSGSRC.0<1>:ud ORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's -// mov (1) MSGSRC.2<1>:ud 0x00030007:ud // Block width and height (8x4) -// send (8) SRC_UD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00010000+BI_DEST_U:ud -// send (8) SRC_VD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00010000+BI_DEST_V:ud -// -// //Restore the origin information -// mov (2) MSGSRC.0<1>:ud ORIX<2;2,1>:w // Block origin -// mov (1) MSGSRC.2<1>:ud 0x0007000F:ud // Block width and height (16x8) -// -// //expand U and V to be aligned on word boundary -// mov (16) SRC_UW(1)<1> SRC_U(0,16) -// mov (16) SRC_UW(0)<1> SRC_U(0, 0) -// mov (16) SRC_VW(1)<1> SRC_V(0,16) -// mov (16) SRC_VW(0)<1> SRC_V(0, 0) -// -// //Merge the data -// mov (1) f0.1:uw BLOCK_MASK_V:uw //Load the mask on flag reg -// (f0.1) mov (8) TEMP0<1>:uw BLOCK_MASK_H:uw -// (-f0.1) mov (8) TEMP0<1>:uw 0:uw -// -// // Destination is Word aligned -// $for(0; -// (-f0.1) mov (16) DEST_Y(0, %1*32)<2> SRC_Y(0, %1*16) -// (-f0.1) mov (16) DEST_U(0, %1*8)<1> SRC_U(0, %1*8) //only works for Word aligned Byte data -// (-f0.1) mov (16) DEST_V(0, %1*8)<1> SRC_V(0, %1*8) //only works for Word aligned Byte data -// -// mov (1) f0.1:uw TEMP(0,1+%1)<0;1,0> -// (-f0.1) mov (16) DEST_Y(0, 1+%1*32)<2> SRC_Y(0, 1+%1*16) -// -// } -// -//*/ Yoni - masking is not relevant for ILK?!? - -WritePlanarToDataPort: - $for(0,0; ub2DEST_Y(%1)REGION(16,2) - mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud -#endif - -// Save U/V data block in planar format (4x8) ---------------------------------- - mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin - asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - - $for(0,0; ub2DEST_U(%2)REGION(16,2) - mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud - -// End of PL4x8_Save_NV11 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL4x8_Save_NV11.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL4x8_Save_NV11.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL4x8_Save_NV11.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL4x8_Save_NV11.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,60 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//Module name: PL8x4_Save_NV11.inc -// -// Setup for storing planar data -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 -#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) -#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_8 // U/V interleaved block width and height (8x8) -#define nDPW_MSG_SIZE_UV nMSGLEN_2 // # of MRF's to hold U/V block data (2) - -#if (nSRC_REGION==nREGION_1) - #define udSRC_Y udBOT_Y_IO - #define udSRC_U udBOT_U_IO - #define udSRC_V udBOT_V_IO - #define ubSRC_Y ubBOT_Y - #define ubSRC_U ubBOT_U - #define ubSRC_V ubBOT_V - - #define uwSRC_U uwBOT_U //For masking operation - #define uwSRC_V uwBOT_V - - #define ub2DEST_Y ub2TOP_Y - #define ub2DEST_U ub2TOP_U - #define ub2DEST_V ub2TOP_V - -#elif (nSRC_REGION==nREGION_2) - #define udSRC_Y udTOP_Y_IO - #define udSRC_U udTOP_U_IO - #define udSRC_V udTOP_V_IO - #define ubSRC_Y ubTOP_Y - #define ubSRC_U ubTOP_U - #define ubSRC_V ubTOP_V - - #define uwSRC_U uwTOP_U //For masking operation - #define uwSRC_V uwTOP_V - - #define ub2DEST_Y ub2BOT_Y - #define ub2DEST_U ub2BOT_U - #define ub2DEST_V ub2BOT_V - -#endif - -///* Yoni - masking is not relevant for ILK?!? -//#define TEMP0 REG(r,54) -//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw -///* Yoni - masking is not relevant for ILK?!? - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL5x8_PL16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL5x8_PL16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL5x8_PL16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL5x8_PL16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,29 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL5x8_PL16x8.asm - -#include "Expansion.inc" - -//------------------------------ Horizontal Upconversion ----------------------------- - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - avg.sat (16) uwDEST_U(0, %1*32+16) uwDEST_U(0, %1*16+7)<1;2,0> uwDEST_U(0, %1*16+7)<1;2,1> - avg.sat (16) uwDEST_V(0, %1*32+16) uwDEST_V(0, %1*16+7)<1;2,0> uwDEST_V(0, %1*16+7)<1;2,1> - avg.sat (16) uwDEST_U(0, %1*32) uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> - avg.sat (16) uwDEST_V(0, %1*32) uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> - } - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - avg.sat (16) uwDEST_U(0, %1*32+16) uwDEST_U(0, %1*32+18)<1;2,0> uwDEST_U(0, %1*32+18)<1;2,1> - avg.sat (16) uwDEST_V(0, %1*32+16) uwDEST_V(0, %1*32+18)<1;2,0> uwDEST_V(0, %1*32+18)<1;2,1> - avg.sat (16) uwDEST_U(0, %1*32) uwDEST_U(0, %1*32)<1;2,0> uwDEST_U(0, %1*32)<1;2,1> - avg.sat (16) uwDEST_V(0, %1*32) uwDEST_V(0, %1*32)<1;2,0> uwDEST_V(0, %1*32)<1;2,1> - } - -// End of PL5x8_PL16x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL5x8_PL8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL5x8_PL8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL5x8_PL8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL5x8_PL8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,21 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL5x8_PL8x8.asm - -#include "Expansion.inc" - -//------------------------------ Horizontal Upconversion ----------------------------- - $for (0; uwDEST_U(0, %1*8)<1;2,1> - avg.sat (8) uwDEST_V(0, %1*8) uwDEST_V(0, %1*8)<1;2,0> uwDEST_V(0, %1*8)<1;2,1> - } - -// End of PL5x8_PL8x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_IMC3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_IMC3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_IMC3.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_IMC3.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,88 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL8x4_Save_IMC3.asm -// -// Save planar YUV420 frame data block of size 16x8 - -#include "PL8x4_Save_IMC3.inc" - -//Use the mask to determine which pixels shouldn't be over-written - and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud - cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified - (f0.0) jmpi WritePlanarToDataPort - - //If mask is not all 1's, then load the entire 16x8 block - //so that only those bytes may be modified that need to be (using the mask) - - // Load 16x8 planar Y ---------------------------------------------------------- - mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_Y(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_DESTINATION_Y:ud - // Load 8x4 planar U and V ----------------------------------------------------- - asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // Block width and height (8x4) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_U(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_U:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - send (8) udSRC_V(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_V:ud - - //expand U and V to be aligned on word boundary - Y remains in bytes - $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { - mov (16) uwSRC_U(0, %1*16)<1> ubSRC_U(0, %1*16) - mov (16) uwSRC_V(0, %1*16)<1> ubSRC_V(0, %1*16) - } - - //Merge the data - mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw - (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw - - // Destination is Word aligned - $for(0; - (-f0.1) mov (16) ub2DEST_Y(0, %1*32)<2> ubSRC_Y(0, %1*16) - (-f0.1) mov (16) ub2DEST_U(0, %1*8)<1> ubSRC_U(0, %1*8) //only works for Word aligned Byte data - (-f0.1) mov (16) ub2DEST_V(0, %1*8)<1> ubSRC_V(0, %1*8) //only works for Word aligned Byte data - - mov (1) f0.1:uw uwMASK_TEMP(0,1+%1)<0;1,0> - (-f0.1) mov (16) ub2DEST_Y(0, 1+%1*32)<2> ubSRC_Y(0, 1+%1*16) - } - -WritePlanarToDataPort: -#if !defined(SAVE_UV_ONLY) -// Save current planar frame Y block data (16x8) ------------------------------- - mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - $for(0,0; ub2DEST_Y(%1)REGION(16,2) - mov(16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud -#endif -// Save U/V data block in planar format (8x4) ---------------------------------- - asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // Block width and height (8x4) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -// Save U picture data --------------------------------------------------------- - mov (16) mubMSGPAYLOAD(0,0)<1> ub2DEST_U(0)REGION(16,2) // U rows 0,1 - mov (16) mubMSGPAYLOAD(0,16)<1> ub2DEST_U(1)REGION(16,2) // U rows 2,3 - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_U:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -// Save V picture data --------------------------------------------------------- - mov (16) mubMSGPAYLOAD(0,0)<1> ub2DEST_V(0)REGION(16,2) // V rows 0,1 - mov (16) mubMSGPAYLOAD(0,16)<1> ub2DEST_V(1)REGION(16,2) // V rows 2,3 - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_V:ud - -// End of PL8x4_Save_IMC3 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_IMC3.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_IMC3.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_IMC3.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_IMC3.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,62 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL8x4_Save_IMC3.inc -// -// Setup for storing planar data -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -// For saving -#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 -#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) -#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // U/V block size 8x4 -#define nDPW_MSG_SIZE_UV nMSGLEN_1 // # of MRF's to hold U/V block data (1) - -// For masking -#undef nDPR_MSG_SIZE_Y -#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) -#undef nDPR_MSG_SIZE_UV -#define nDPR_MSG_SIZE_UV nRESLEN_1 // # of MRF's to hold U/V block data (1) -#define rMASK_TEMP REG(r,nTEMP0) -.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF - -#if (nSRC_REGION==nREGION_1) - // For saving - #define ub2DEST_Y ub2TOP_Y - #define ub2DEST_U ub2TOP_U - #define ub2DEST_V ub2TOP_V - //For masking operation - #define udSRC_Y udBOT_Y_IO - #define udSRC_U udBOT_U_IO - #define udSRC_V udBOT_V_IO - #define ubSRC_Y ubBOT_Y - #define ubSRC_U ubBOT_U - #define ubSRC_V ubBOT_V - #define uwSRC_U uwBOT_U - #define uwSRC_V uwBOT_V - -#elif (nSRC_REGION==nREGION_2) - // For saving - #define ub2DEST_Y ub2BOT_Y - #define ub2DEST_U ub2BOT_U - #define ub2DEST_V ub2BOT_V - //For masking operation - #define udSRC_Y udTOP_Y_IO - #define udSRC_U udTOP_U_IO - #define udSRC_V udTOP_V_IO - #define ubSRC_Y ubTOP_Y - #define ubSRC_U ubTOP_U - #define ubSRC_V ubTOP_V - #define uwSRC_U uwTOP_U - #define uwSRC_V uwTOP_V - -#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_NV12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_NV12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_NV12.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_NV12.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,102 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - -// Module name: PL8x4_Save_NV12.asm -// -// Save entire current planar frame data block of size 16x8 -//--------------------------------------------------------------- -// Symbols needed to be defined before including this module -// -// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned -// ORIX: -//--------------------------------------------------------------- - -#include "PL8x4_Save_NV12.inc" - - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -#if !defined(SAVE_UV_ONLY) -// Save current planar frame Y block data (16x8) ------------------------------- - - mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin - mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) -#endif - -//Use the mask to determine which pixels shouldn't be over-written - and (1) acc0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud - cmp.ge.f0.0 (1) dNULLREG acc0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified - (f0.0) jmpi WritePlanarToDataPort - -//If mask is not all 1's, then load the entire 16x8 block -//so that only those bytes may be modified that need to be (using the mask) - send (8) udSRC_Y(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_DESTINATION_Y:ud //16x8 - - asr (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w 1:w { NoDDClr } // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud { NoDDChk } // Block width and height (16x4) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud //move message desrcptor to the message header - send (8) udSRC_U(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_UV:ud - -//Restore the origin information - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // Block origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud //move message desrcptor to the message header - -//Merge the data - mov (1) f0.1:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.1) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw - (-f0.1) mov (8) rMASK_TEMP<1>:uw 0:uw - -//convert the mask from 16bits to 8bits by selecting every other bit - mov (1) udMASK_TEMP1(0,0)<1> 0x00040001:ud - mov (1) udMASK_TEMP1(0,1)<1> 0x00400010:ud - mov (1) udMASK_TEMP1(0,2)<1> 0x04000100:ud - mov (1) udMASK_TEMP1(0,3)<1> 0x40001000:ud - -//merge the loaded block with the current block - $for(0,0; - (-f0.1) mov (16) ubDEST_Y(0,%1*32)<2> ubSRC_Y(0,%1*16) - - and.nz.f0.1 (8) wNULLREG uwMASK_TEMP(0,%1)<0;1,0> uwMASK_TEMP1(0,0) //change the mask by selecting every other bit - (-f0.1) mov (8) ubDEST_U(0, %2*16)<2> ub2SRC_U(0, %1*8)<16;8,2> - (-f0.1) mov (8) ubDEST_V(0, %2*16)<2> ub2SRC_U(0, %1*8+1)<16;8,2> - - mov (1) f0.1:uw uwMASK_TEMP(0,1+%1)<0;1,0> - (-f0.1) mov (16) ubDEST_Y(0, (1+%1)*32)<2> ubSRC_Y(0, (1+%1)*16) - - } - -WritePlanarToDataPort: -#if !defined(SAVE_UV_ONLY) - $for(0,0; ub2DEST_Y(%1)REGION(16,2) - mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud -#endif - -//** Save 8x4 packed U and V ----------------------------------------------------- -// we could write directly wORIX to mMSGHDR and then execute asr on it, that way we could -// avoid using rMSGSRC as a buffer and have one command less in code, but it is unknown whether -//it is possible to do asr on mMSGHDR so we use rMSGSRC. - mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin - asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - - $for(0,0; ub2DEST_U(%2)REGION(16,2) - mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud - -// End of PL8x4_Save_NV12 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_NV12.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_NV12.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x4_Save_NV12.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x4_Save_NV12.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,85 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//Module name: PL8x4_Save_NV12.inc -// -// Setup for storing planar data -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols -#undef nDPW_BLOCK_SIZE_Y -#undef nDPW_MSG_SIZE_Y -#undef nDPW_BLOCK_SIZE_UV -#undef nDPW_MSG_SIZE_UV - -#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 -#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) -#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // U/V interleaved block width and height (16x4) -#define nDPW_MSG_SIZE_UV nMSGLEN_2 // # of MRF's to hold U/V block data (2) - -// For masking -#undef nDPR_MSG_SIZE_Y -#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) -#undef nDPR_MSG_SIZE_UV -#define nDPR_MSG_SIZE_UV nRESLEN_2 -#define rMASK_TEMP REG(r,nTEMP0) -.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF -#define rMASK_TEMP1 REG(r,nTEMP1) -.declare udMASK_TEMP1 Base=rMASK_TEMP1 ElementSize=4 SrcRegion=<4;4,1> Type=ud //1 GRF -.declare uwMASK_TEMP1 Base=rMASK_TEMP1 ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF - - -#if (nSRC_REGION==nREGION_1) - #define udSRC_Y udBOT_Y_IO - #define udSRC_U udBOT_U_IO - #define udSRC_V udBOT_V_IO - #define ubSRC_Y ubBOT_Y - #define ubSRC_U ubBOT_U - #define ubSRC_V ubBOT_V - - #define uwSRC_U uwBOT_U //For masking operation - #define uwSRC_V uwBOT_V - - #define ub2DEST_Y ub2TOP_Y - #define ub2DEST_U ub2TOP_U - #define ub2DEST_V ub2TOP_V - - #define ubDEST_Y ubTOP_Y - #define ubDEST_U ubTOP_U - #define ubDEST_V ubTOP_V - - #define ub2SRC_U ub2BOT_U -#elif (nSRC_REGION==nREGION_2) - #define udSRC_Y udTOP_Y_IO - #define udSRC_U udTOP_U_IO - #define udSRC_V udTOP_V_IO - #define ubSRC_Y ubTOP_Y - #define ubSRC_U ubTOP_U - #define ubSRC_V ubTOP_V - - #define uwSRC_U uwTOP_U //For masking operation - #define uwSRC_V uwTOP_V - - #define ub2DEST_Y ub2BOT_Y - #define ub2DEST_U ub2BOT_U - #define ub2DEST_V ub2BOT_V - - #define ubDEST_Y ubBOT_Y - #define ubDEST_U ubBOT_U - #define ubDEST_V ubBOT_V - - #define ub2SRC_U ub2TOP_U -#endif - -///* Yoni - masking is not relevant for ILK?!? -//#define TEMP0 REG(r,54) -//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw -///* Yoni - masking is not relevant for ILK?!? - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x5_PL8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x5_PL8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x5_PL8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x5_PL8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,27 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL8x5_PL8x8.asm - -#include "Expansion.inc" - -//------------------------------- Vertical Upconversion ------------------------------ - avg.sat (8) uwDEST_U(0, 3*16+8)<1> uwDEST_U(0, 3*8) uwDEST_U(0, (1+3)*8) // Optimization - avg.sat (8) uwDEST_V(0, 3*16+8)<1> uwDEST_V(0, 3*8) uwDEST_V(0, (1+3)*8) // Optimization - - $for(nUV_NUM_OF_ROWS/2-2; >-1; -1) { - mov (8) uwDEST_U(0, (1+%1)*16)<1> uwDEST_U(0, (1+%1)*8) - avg.sat (8) uwDEST_U(0, %1*16+8)<1> uwDEST_U(0, %1*8) uwDEST_U(0, (1+%1)*8) - - mov (8) uwDEST_V(0, (1+%1)*16)<1> uwDEST_V(0, (1+%1)*8) - avg.sat (8) uwDEST_V(0, %1*16+8)<1> uwDEST_V(0, %1*8) uwDEST_V(0, (1+%1)*8) - } - -// End of PL8x5_PL8x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_PL8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_PL8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_PL8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_PL8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,30 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL8x8_PL8x4.asm -// -// Convert PL 8x8 to PL8x4 in GRF -//--------------------------------------------------------------- -// Symbols needed to be defined before including this module -// -// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned -// ORIX: -//--------------------------------------------------------------- - -#include "PL8x8_PL8x4.inc" - -// Convert PL8x8 to PL8x4 --------------------------------------------------------- - - mov (8) ubDEST_U(0,16)<2> ubDEST_U(1)<16;8,2> //selecting U every other row - mov (16) ubDEST_U(0,32)<2> ubDEST_U(2)<32;8,2> //selecting U every other row - mov (8) ubDEST_V(0,16)<2> ubDEST_V(1)<16;8,2> //selecting V every other row - mov (16) ubDEST_V(0,32)<2> ubDEST_V(2)<32;8,2> //selecting V every other row - -// End of PL8x8_PL8x4.asm ------------------------------------------------------- \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_PL8x4.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_PL8x4.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_PL8x4.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_PL8x4.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,36 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL8x8_PL8x4.inc -// -// Setup module for convert PL8x8 to PL8x4 -// -// - -// Source/destination region definitions -// -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -#if (nSRC_REGION==nREGION_1) - - //REGION_1 selected - #define ubDEST_Y ubTOP_Y - #define ubDEST_U ubTOP_U - #define ubDEST_V ubTOP_V - -#elif (nSRC_REGION==nREGION_2) - - //REGION_2 selected - #define ubDEST_Y ubBOT_Y - #define ubDEST_U ubBOT_U - #define ubDEST_V ubBOT_V - - -#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_P208.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_P208.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_P208.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_P208.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,56 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - -// Module name: PL8x8_Save_P208.asm -// -// Save entire current planar frame data block of size 16x8 -//--------------------------------------------------------------- -// Symbols needed to be defined before including this module -// -// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned -// ORIX: -//--------------------------------------------------------------- - -#include "PL8x8_Save_P208.inc" - - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -#if !defined(SAVE_UV_ONLY) -// Save current planar frame Y block data (16x8) ------------------------------- - - mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin - mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) - -WritePlanarToDataPort: - $for(0,0; ub2DEST_Y(%1)REGION(16,2) - mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud -#endif - -//** Save 8x8 packed U and V ----------------------------------------------------- -// we could write directly wORIX to mMSGHDR and then execute asr on it, that way we could -// avoid using rMSGSRC as a buffer and have one command less in code, but it is unknown whether -//it is possible to do asr on mMSGHDR so we use rMSGSRC. - mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin - - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - - $for(0,0; ub2DEST_U(%2)REGION(16,2) - mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud - -//End of PL8x8_Save_P208.asm - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_P208.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_P208.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_P208.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_P208.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,61 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - -//Module name: PL8x8_Save_P208.inc -// -// Setup for storing planar data -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 -#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) -#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // U/V interleaved block width and height (16x8) -#define nDPW_MSG_SIZE_UV nMSGLEN_4 // # of MRF's to hold U/V block data (4) - -#if (nSRC_REGION==nREGION_1) - #define udSRC_Y udBOT_Y_IO - #define udSRC_U udBOT_U_IO - #define udSRC_V udBOT_V_IO - #define ubSRC_Y ubBOT_Y - #define ubSRC_U ubBOT_U - #define ubSRC_V ubBOT_V - - #define uwSRC_U uwBOT_U //For masking operation - #define uwSRC_V uwBOT_V - - #define ub2DEST_Y ub2TOP_Y - #define ub2DEST_U ub2TOP_U - #define ub2DEST_V ub2TOP_V - -#elif (nSRC_REGION==nREGION_2) - #define udSRC_Y udTOP_Y_IO - #define udSRC_U udTOP_U_IO - #define udSRC_V udTOP_V_IO - #define ubSRC_Y ubTOP_Y - #define ubSRC_U ubTOP_U - #define ubSRC_V ubTOP_V - - #define uwSRC_U uwTOP_U //For masking operation - #define uwSRC_V uwTOP_V - - #define ub2DEST_Y ub2BOT_Y - #define ub2DEST_U ub2BOT_U - #define ub2DEST_V ub2BOT_V - -#endif - -///* Yoni - masking is not relevant for ILK?!? -//#define TEMP0 REG(r,54) -//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw -///* Yoni - masking is not relevant for ILK?!? - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_PA.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_PA.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_PA.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_PA.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,71 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL8x8_Save_PA.asm -// -// Save planar YUV422 to packed YUV422 format data -// -// Note: SRC_* must reference to regions with data type "BYTE" -// in order to save to byte-aligned byte location - -#include "PL8x8_Save_PA.inc" - - add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub nDEST_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block - - // Pack Y - $for(0; ubSRC_Y(0,%1*32) - } - - // Pack U/V - $for(0; ubSRC_U(0, %1*16) - mov (8) r[pCF_V_OFFSET, %1*nGRFWIB]<4> ubSRC_V(0, %1*16) - } - - shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled - mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_YUV:ud { NoDDChk } // Block width and height (32x8) - - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -//Use the mask to determine which pixels shouldn't be over-written - and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud - cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified - (f0.0) jmpi WritePackedToDataPort - - //If mask is not all 1's, then load the entire 32x8 block - //so that only those bytes may be modified that need to be (using the mask) - - // Load 32x8 packed YUV 422 ---------------------------------------------------- - send (8) udSRC_YUV(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_DESTINATION_YUV:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - - //Merge the data - mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw - (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw - - // Destination is Byte aligned - $for(0; - (-f0.1) mov (16) uwDEST_YUV(%1)<1> uwSRC_YUV(%1) //check the UV merge - vK - } - -WritePackedToDataPort: - // Packed YUV data are stored in one of the I/O regions before moving to MRF - // Note: This is necessary since indirect addressing is not supported for MRF. - // Packed data block should be saved as 32x8 pixel block - $for(0; udDEST_YUV(%1)REGION(8,1) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_YUV+nBI_DESTINATION_YUV:ud - -// End of PL8x8_Save_PA diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_PA.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_PA.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL8x8_Save_PA.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL8x8_Save_PA.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,52 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL8x8_Save_PA.inc -// -// Setup for storing packed data -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -// For saving -#define nDPW_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // YUV block size 32x8 -#define nDPW_MSG_SIZE_YUV nMSGLEN_8 // # of MRF's to hold YUV block data (8) - -// For masking -#undef nDPR_MSG_SIZE_YUV -#define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold YUV block data (8) -#define rMASK_TEMP REG(r,nTEMP0) -.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF - -#if (nSRC_REGION==nREGION_1) - // For saving - #define udSRC_YUV udTOP_Y_IO - #define udDEST_YUV udBOT_Y_IO - #define nDEST_YUV_REG nBOT_Y - //For masking operation - #define ubSRC_Y ub2TOP_Y - #define ubSRC_U ub2TOP_U - #define ubSRC_V ub2TOP_V - #define uwSRC_YUV uwTOP_Y - #define uwDEST_YUV uwBOT_Y - -#elif (nSRC_REGION==nREGION_2) - // For saving - #define udSRC_YUV udBOT_Y_IO - #define udDEST_YUV udTOP_Y_IO - #define nDEST_YUV_REG nTOP_Y - //For masking operation - #define ubSRC_Y ub2BOT_Y - #define ubSRC_U ub2BOT_U - #define ubSRC_V ub2BOT_V - #define uwSRC_YUV uwBOT_Y - #define uwDEST_YUV uwTOP_Y - -#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL9x5_PL16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL9x5_PL16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL9x5_PL16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL9x5_PL16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,37 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL9x5_PL16x8.asm - -#define EXPAND_9x5 -#include "Expansion.inc" - -//------------------------------ Horizontal Upconversion ----------------------------- - $for (nUV_NUM_OF_ROWS-2; >-1; -1) { - avg.sat (16) uwDEST_U(0, %1*16)<1> uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> - avg.sat (16) uwDEST_V(0, %1*16)<1> uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> - } - -#undef nUV_NUM_OF_ROWS -#define nUV_NUM_OF_ROWS 8 //use packed version of all post-processing kernels - -//------------------------------- Vertical Upconversion ------------------------------ - avg.sat (16) uwDEST_U(0, 3*32+16)<1> uwDEST_U(0, 3*16) uwDEST_U(0, (1+3)*16) - avg.sat (16) uwDEST_V(0, 3*32+16)<1> uwDEST_V(0, 3*16) uwDEST_V(0, (1+3)*16) - - $for(nUV_NUM_OF_ROWS/2-2; >-1; -1) { - mov (16) uwDEST_U(0, (1+%1)*32)<1> uwDEST_U(0, (1+%1)*16) - avg.sat (16) uwDEST_U(0, %1*32+16)<1> uwDEST_U(0, %1*16) uwDEST_U(0, (1+%1)*16) - - mov (16) uwDEST_V(0, (1+%1)*32)<1> uwDEST_V(0, (1+%1)*16) - avg.sat (16) uwDEST_V(0, %1*32+16)<1> uwDEST_V(0, %1*16) uwDEST_V(0, (1+%1)*16) - } - -// End of PL9x5_PL16x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL9x8_PL16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL9x8_PL16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/PL9x8_PL16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/PL9x8_PL16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,21 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: PL9x5_PL16x8.asm - -#include "Expansion.inc" - -//------------------------------ Horizontal Upconversion ----------------------------- - $for (0; uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> - avg.sat (16) uwDEST_V(0, %1*16)<1> uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> - } - -// End of PL9x5_PL16x8 \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/readSampler16x1.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/readSampler16x1.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/readSampler16x1.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/readSampler16x1.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,55 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: readSampler16x1.asm -// -// Read one row of pix through sampler -// - - - -//#define SAMPLER_MSG_DSC 0x166A0000 // ILK Sampler Message Descriptor - - - -// Send Message [DevILK] Message Descriptor -// MBZ MsgL=5 MsgR=8 H MBZ SIMD MsgType SmplrIndx BindTab -// 000 0 101 0 1000 1 0 10 0000 0000 00000000 -// 0 A 8 A 0 0 0 0 - -// MsgL=1+2*2(u,v)=5 MsgR=8 - -#define SAMPLER_MSG_DSC 0x0A8A0000 // ILK Sampler Message Descriptor - - - - - - - - // Assume MSGSRC is set already in the caller - //mov (8) rMSGSRC.0<1>:ud 0:ud // Unused fileds - - - - // Read 16 sampled pixels and stored them in float32 in 8 GRFs - // 422 data is expanded to 444, return 8 GRF in the order of RGB- (UYV-). - // 420 data has three surfaces, return 8 GRF. Valid is always in the 1st GRF when in R8. Make sure no overwrite the following 3 GRFs. - // alpha data is expanded to 4444, return 8 GRF in the order of RGBA (UYVA). - - mov(16) mMSGHDR<1>:uw rMSGSRC<16;16,1>:uw - send (16) DATABUF(0)<1> mMSGHDR udDUMMY_NULL 0x2 SAMPLER_MSG_DSC+SAMPLER_IDX+BINDING_IDX:ud - - - - - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,72 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: RGB16x8_Save_RGB16.asm -// -// Save packed RGB565 frame data block of size 16x8 -// -// To save 16x8 block (32x8 byte layout for RGB565) we need 1 send instruction -// ----- -// | 1 | -// ----- - -#include "RGB16x8_Save_RGB16.inc" - -//convert 32 bit RGB to 16 bit RGB - // Truncate A8R8G8B8 to A6R5G6B5 within byte. - // That is keeping 5 MSB of R and B, and 6 MSB of G. - - $for (0, 0; ubDEST_ARGB(%2,0)<32;8,4> 3:w // B >> 3 - - shl (16) uwTEMP_RGB16(0)<1> uwDEST_ARGB(%2,1)<16;8,2> 8:w // R << 8 - and (16) uwTEMP_RGB16(0)<1> uwTEMP_RGB16(0) 0xF800:uw - or (16) uwCSC_TEMP(%1,0)<1> uwCSC_TEMP(%1,0)<16;16,1> uwTEMP_RGB16(0) - - shr (16) uwTEMP_RGB16(0)<1> uwDEST_ARGB(%2,0)<16;8,2> 5:w // G >> 5 - and (16) uwTEMP_RGB16(0)<1> uwTEMP_RGB16(0) 0x07E0:uw - or (16) uwCSC_TEMP(%1,0)<1> uwCSC_TEMP(%1,0)<16;16,1> uwTEMP_RGB16(0) - } - - mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin (1st quadrant) - shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 1:w // H. block origin need to be doubled for byte offset - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_RGB16:ud // Block width and height (32x8) - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -//Use the mask to determine which pixels shouldn't be over-written - and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud - cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified - (f0.0) jmpi WriteRGB16ToDataPort - - //If mask is not all 1's, then load the entire 32x8 block - //so that only those bytes may be modified that need to be (using the mask) - - // Load 32x8 packed RGB565 ----------------------------------------------------- - send (8) udSRC_RGB16(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_RGB16+nBI_DESTINATION_RGB:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - - //Merge the data - mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK - (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw - - $for(0; - (-f0.1) mov (16) uwCSC_TEMP(%1)<1> uwSRC_RGB16(%1) - } - -WriteRGB16ToDataPort: - // Move packed data to MRF and output - $for(0; udCSC_TEMP(%1) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_RGB16+nBI_DESTINATION_RGB:ud - -// End of RGB16x8_Save_RGB16 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB16.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,49 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: RGB16x8_Save_RGB16.inc -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -// For saving -#define nDPW_BLOCK_SIZE_RGB16 nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // RGB16 block size 32x8 -#define nDPW_MSG_SIZE_RGB16 nMSGLEN_8 // # of MRF's to hold RGB16 block data (8) - -// For conversion to 16bit -.declare uwTEMP_RGB16 Base=REG(r,nTEMP1) ElementSize=2 SrcRegion=<16;16,1> Type=uw //1 GRF - -// For masking -#undef nDPR_MSG_SIZE_RGB16 -#define nDPR_MSG_SIZE_RGB16 nRESLEN_8 // # of MRF's to hold ARGB block data (8) -#define rMASK_TEMP REG(r,nTEMP0) -.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF - -#if (nSRC_REGION==nREGION_1) - // For saving - #define ubDEST_ARGB ubTOP_Y //Data from previous module - #define uwDEST_ARGB uwTOP_Y //Data from previous module - #define udCSC_TEMP udBOT_Y_IO //Data Converted to 16 bits - #define uwCSC_TEMP uwBOT_Y - //For masking operation - #define udSRC_RGB16 udTOP_Y_IO //To hold the destination data that shouldn't be modified - #define uwSRC_RGB16 uwTOP_Y - -#elif (nSRC_REGION==nREGION_2) - // For saving - #define ubDEST_ARGB ubBOT_Y //Data from previous module - #define uwDEST_ARGB uwBOT_Y //Data from previous module - #define udCSC_TEMP udTOP_Y_IO //Data Converted to 16 bits - #define uwCSC_TEMP uwTOP_Y - //For masking operation - #define udSRC_RGB16 udBOT_Y_IO //To hold the destination data that shouldn't be modified - #define uwSRC_RGB16 uwBOT_Y - -#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,88 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: RGB16x8_Save_RGB.asm -// -// Save packed ARGB 444 frame data block of size 16x8 -// -// To save 16x8 block (64x8 byte layout for ARGB8888) we need 2 send instructions -// --------- -// | 1 | 2 | -// --------- - -#include "RGB16x8_Save_RGB.inc" - - shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 2:w { NoDDClr } // H. block origin need to be quadrupled - mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_ARGB:ud { NoDDChk } // Block width and height (32x8) - - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - -//Use the mask to determine which pixels shouldn't be over-written - and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud - cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified - (f0.0) jmpi WriteARGBToDataPort - - //If mask is not all 1's, then load the entire 64x8 block - //so that only those bytes may be modified that need to be (using the mask) - - // Load first block 16x8 packed ARGB 444 --------------------------------------- - or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF00FF00:ud //Check first block - cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud - (f0.0) jmpi SkipFirstBlockMerge //If full mask then skip this block - - send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - - //Merge the data - mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK - (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw - - $for(0, 0; - (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) - } - -SkipFirstBlockMerge: - // Load second block 16x8 packed ARGB 444 --------------------------------------- - or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF0000FF:ud //Check second block - cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud - (f0.0) jmpi WriteARGBToDataPort //If full mask then skip this block - - add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part - send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud // Point to 1st part again - - //Merge the data - mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.0) shr (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw 8:uw //load the mask for second block - (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw - - $for(0, 1; - (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) - } - -WriteARGBToDataPort: - // Move packed data to MRF and output - $for(0; udDEST_ARGB(%1*2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part - $for(0; udDEST_ARGB(%1*2+1) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - -// End of RGB16x8_Save_RGB diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_RGB.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_RGB.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,38 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: RGB16x8_Save_RGB.inc -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -// For saving -#define nDPW_BLOCK_SIZE_ARGB nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // ARGB block size 32x8 -#define nDPW_MSG_SIZE_ARGB nMSGLEN_8 // # of MRF's to hold ARGB block data (8) - -// For masking -#undef nDPR_MSG_SIZE_ARGB -#define nDPR_MSG_SIZE_ARGB nRESLEN_8 // # of MRF's to hold ARGB block data (8) -#define rMASK_TEMP REG(r,nTEMP0) -.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF - -#if (nSRC_REGION==nREGION_1) - // For saving - #define udDEST_ARGB udTOP_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache - //For masking operation - #define udSRC_ARGB udBOT_Y_IO //To hold the destination data that shouldn't be modified - -#elif (nSRC_REGION==nREGION_2) - // For saving - #define udDEST_ARGB udBOT_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache - //For masking operation - #define udSRC_ARGB udTOP_Y_IO //To hold the destination data that shouldn't be modified - -#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_Y416.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_Y416.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_Y416.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_Y416.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,107 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: RGB16x8_Save_Y416.asm -// -// Save packed ARGB 444 frame data block of size 16x8 -// -// To save 16x8 block (128x8 byte layout for ARGB 16bit per component) we need 4 send instructions -// ----------------- -// | 1 | 2 | 3 | 4 | -// ----------------- - -#include "RGB16x8_Save_RGB.inc" - - shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 3:w { NoDDClr } // H. block origin need to become 8 times - mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_ARGB:ud { NoDDChk } // Block width and height (32x8) - - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud -/* Not needed for validation kernels for now -vK -//Use the mask to determine which pixels shouldn't be over-written - and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud - cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified - (f0.0) jmpi WriteARGBToDataPort - - //If mask is not all 1's, then load the entire 64x8 block - //so that only those bytes may be modified that need to be (using the mask) - - // Load first block 16x8 packed ARGB 444 --------------------------------------- - or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF00FF00:ud //Check first block - cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud - (f0.0) jmpi SkipFirstBlockMerge //If full mask then skip this block - - send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - - //Merge the data - mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK - (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw - - $for(0, 0; - (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) - } - -SkipFirstBlockMerge: - // Load second block 16x8 packed ARGB 444 --------------------------------------- - or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF0000FF:ud //Check second block - cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud - (f0.0) jmpi WriteARGBToDataPort //If full mask then skip this block - - add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part - send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud // Point to 1st part again - - //Merge the data - mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg - (f0.0) shr (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw 8:uw //load the mask for second block - (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw - - $for(0, 1; - (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) - } -*/ -WriteARGBToDataPort: - // Move packed data to MRF and output - - //Write 1st 4X8 pixels - $for(0; udDEST_ARGB(%1*4) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - - //Write 2nd 4X8 pixels - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part - $for(0; udDEST_ARGB(%1*4+1) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - - //Write 3rd 4X8 pixels - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 64:d // Point to 2nd part - $for(0; udDEST_ARGB(%1*4+2) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - - //Write 4th 4X8 pixels - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 96:d // Point to 2nd part - $for(0; udDEST_ARGB(%1*4+3) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud - -// End of RGB16x8_Save_Y416 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_Y416.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_Y416.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB16x8_Save_Y416.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB16x8_Save_Y416.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,38 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: RGB16x8_Save_Y416.inc -// - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - -// For saving -#define nDPW_BLOCK_SIZE_ARGB nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // ARGB block size 32x8 -#define nDPW_MSG_SIZE_ARGB nMSGLEN_8 // # of MRF's to hold ARGB block data (8) - -// For masking -#undef nDPR_MSG_SIZE_ARGB -#define nDPR_MSG_SIZE_ARGB nRESLEN_8 // # of MRF's to hold ARGB block data (8) -#define rMASK_TEMP REG(r,nTEMP0) -.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF - -#if (nSRC_REGION==nREGION_1) - // For saving - #define udDEST_ARGB udTOP_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache - //For masking operation - #define udSRC_ARGB udBOT_Y_IO //To hold the destination data that shouldn't be modified - -#elif (nSRC_REGION==nREGION_2) - // For saving - #define udDEST_ARGB udBOT_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache - //For masking operation - #define udSRC_ARGB udTOP_Y_IO //To hold the destination data that shouldn't be modified - -#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB_Pack.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB_Pack.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/RGB_Pack.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/RGB_Pack.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,40 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - -.declare SRC_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare SRC_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare SRC_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare SRC_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw - -#define DEST_ARGB ubBOT_ARGB - -#undef nSRC_REGION -#define nSRC_REGION nREGION_2 - - -//Pack directly to mrf as optimization - vK - -$for(0, 0; <8; 1, 2) { -// mov (16) DEST_ARGB(%2,0)<4> SRC_B(%1) { Compr, NoDDClr } // 16 B -// mov (16) DEST_ARGB(%2,1)<4> SRC_G(%1) { Compr, NoDDClr, NoDDChk } // 16 G -// mov (16) DEST_ARGB(%2,2)<4> SRC_R(%1) { Compr, NoDDClr, NoDDChk } // 16 R //these 2 inst can be merged - vK -// mov (16) DEST_ARGB(%2,3)<4> SRC_A(%1) { Compr, NoDDChk } //DEST_RGB_FORMAT<0;1,0>:ub { Compr, NoDDChk } // 16 A - - mov (8) DEST_ARGB(%2, 0)<4> SRC_B(%1) { NoDDClr } // 8 B - mov (8) DEST_ARGB(%2, 1)<4> SRC_G(%1) { NoDDClr, NoDDChk } // 8 G - mov (8) DEST_ARGB(%2, 2)<4> SRC_R(%1) { NoDDClr, NoDDChk } // 8 R - mov (8) DEST_ARGB(%2, 3)<4> SRC_A(%1) { NoDDChk } // 8 A - - mov (8) DEST_ARGB(%2+1,0)<4> SRC_B(%1,8) { NoDDClr } // 8 B - mov (8) DEST_ARGB(%2+1,1)<4> SRC_G(%1,8) { NoDDClr, NoDDChk } // 8 G - mov (8) DEST_ARGB(%2+1,2)<4> SRC_R(%1,8) { NoDDClr, NoDDChk } // 8 R - mov (8) DEST_ARGB(%2+1,3)<4> SRC_A(%1,8) { NoDDChk } // 8 A -} diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/SetupVPKernel.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/SetupVPKernel.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/SetupVPKernel.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/SetupVPKernel.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,34 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Modual name: SetupVPKernel.asm -// -// Initial setup for running video-processing kernels -// - -#include "common.inc" - -// -// Now, begin source code.... -// -.code - -#include "Init_All_Regs.asm" - -mov (8) rMSGSRC.0<1>:ud r0.0<8;8,1>:ud // Initialize message payload header with R0 -#if defined (INC_BLENDING) - mul (1) fALPHA_STEP_X:f fSCALING_STEP_RATIO:f fVIDEO_STEP_X:f //StepX_ratio = AlphaStepX / VideoStepX -#endif - -// End of SetupVPKernel - - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/undefall.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/undefall.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Common/undefall.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Common/undefall.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,65 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Modual name: undefall.inc -// -// undefine all global symbol for new process -// - -//Source definitions -#undef ubSRC_Y -#undef ubSRC_U -#undef ubSRC_V - -#undef ub2SRC_Y -#undef ub2SRC_U -#undef ub2SRC_V - -#undef ub4SRC_Y -#undef ub4SRC_U -#undef ub4SRC_V - -#undef uwSRC_Y -#undef uwSRC_U -#undef uwSRC_V - -#undef udSRC_Y -#undef udSRC_U -#undef udSRC_V - -#undef udSRC_YUV -#undef nSRC_YUV_REG - -//Destination definitions -#undef ubDEST_Y -#undef ubDEST_U -#undef ubDEST_V - -#undef ub2DEST_Y -#undef ub2DEST_U -#undef ub2DEST_V - -#undef ub4DEST_Y -#undef ub4DEST_U -#undef ub4DEST_V - -#undef uwDEST_Y -#undef uwDEST_U -#undef uwDEST_V - -#undef udDEST_Y -#undef udDEST_U -#undef udDEST_V - -#undef udDEST_YUV -#undef nDEST_YUV_REG -#undef ubDEST_ARGB - -// End of undefall.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/AVS_IEF.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/AVS_IEF.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/AVS_IEF.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/AVS_IEF.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,108 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: AVS_IEF.inc - -#ifndef _AVS_INF_INC_ -#define _AVS_INF_INC_ - -#include "undefall.inc" //Undefine the SRC and DEST sysmbols - - // Message Header - // m0.7 31:0 Debug - // m0.6 31:0 Debug - // m0.5 31:0 Ignored - // m0.4 31:0 Ignored - // m0.3 31:0 Ignored - // m0.2 31:16 Ignored - // 15 Alpha Write Channel Mask enable=0, disable=1 - // 14 Blue Write Channel Mask (V) - // 13 Green Write Channel Mask (Y) - // 12 Red Write Channel Mask (U) - // 11:0 Ignored - // m0.1 Ignored - // m0.0 Ignored - -#define mAVS_8x8_HDR m0 // Message Header -#define mAVS_PAYLOAD m1 // Message Payload Header - -#define mAVS_8x8_HDR_2 m2 // Message Header -#define mAVS_PAYLOAD_2 m3 // Message Payload Header - -#define mAVS_8x8_HDR_UV m2 // Message Header -#define mAVS_PAYLOAD_UV m3 // Message Payload Header - -#define rAVS_8x8_HDR rMSGSRC // Mirror of Message Header -#define rAVS_PAYLOAD r9 // Mirror of Message Payload Header - - // AVS payload - // m1.7 Ignored - // m1.6 Pixel 0 V Address ---> ORIY (Y0) - // m1.5 Delta V ---> Step Y - // m1.4 Ignored - // m1.3 Ignored - // m1.2 Pixel 0 U Address ---> ORIX (X0) - // m1.1 U 2nd Derivative ---> NLAS dx - // m1.0 Delta U ---> Step X - - // Sampler Message Descriptor - // 31:29 Reserved 000 - // 28:25 Message length 0010 - // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel - // 19 Header Present 1 - // 18 MBZ 0 - // 17:16 SIMD Mode 11 ---> SIMD64 - // 15:12 Message Type 0011 ---> sample_8x8 - // 11:8 Sampler Index xxxx - // 7:0 Binding Table Index xxxxxxxx -#define nAVS_MSG_DSC_1CH 0x044BB000 -#define nAVS_MSG_DSC_2CH 0x048BB000 -#define nAVS_MSG_DSC_3CH 0x04CBB000 -#define nAVS_MSG_DSC_4CH 0x050BB000 - -#define nAVS_RED_CHANNEL_ONLY 0x0000E000 // Enable Red channel only -#define nAVS_GREEN_CHANNEL_ONLY 0x0000D000 // Enable Green channel only -#define nAVS_RED_BLUE_CHANNELS 0x0000A000 // Enable Red and Blue channels -#define nAVS_RGB_CHANNELS 0x00008000 // Enable RGB(YUV) channels -#define nAVS_ALL_CHANNELS 0x00000000 // Enable all channels (ARGB\AYUV) - - - -.declare ubAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=1 SrcRegion=REGION(16,1) Type=ub -.declare uwAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=2 SrcRegion=REGION(16,1) Type=uw - -.declare ubAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=1 SrcRegion=REGION(16,1) Type=ub -.declare uwAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=2 SrcRegion=REGION(16,1) Type=uw - - -#if (nSRC_REGION==nREGION_2) - #define uwDEST_Y uwBOT_Y - #define uwDEST_U uwBOT_U - #define uwDEST_V uwBOT_V - - #define ubDEST_Y ubBOT_Y - - #undef nSRC_REGION - #define nSRC_REGION nREGION_2 - -#else //(nSRC_REGION==nREGION_1) - #define uwDEST_Y uwTOP_Y - #define uwDEST_U uwTOP_U - #define uwDEST_V uwTOP_V - - #define ubDEST_Y ubTOP_Y - - #undef nSRC_REGION - #define nSRC_REGION nREGION_1 - -#endif - - -#endif //_AVS_INF_INC_ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/AVS_SetupFirstBlock.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/AVS_SetupFirstBlock.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/AVS_SetupFirstBlock.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/AVS_SetupFirstBlock.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,35 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//------------------------------------------------------------------------------ -// AVS_SetupFirstBlock.asm -//------------------------------------------------------------------------------ - - // Setup Message Header -// mov (8) mAVS_8x8_HDR<1>:ud rMSGSRC<8;8,1>:ud - - // Check NLAS Enable bit - and.z.f0.0 (1) wNULLREG uwNLAS_ENABLE:uw BIT15:uw - (f0.0)mov (1) fVIDEO_STEP_DELTA:f 0.0:f - - // Setup Message Payload Header for 1st block of Media Sampler 8x8 - mov (1) rAVS_PAYLOAD.0:f fVIDEO_STEP_DELTA:f //NLAS dx - mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f //Step X - mov (1) rAVS_PAYLOAD.5:f fVIDEO_STEP_Y:f //Step Y - mov (2) rAVS_PAYLOAD.2<4>:f fSRC_VID_H_ORI<2;2,1>:f //Orig X and Y - - - - - - - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/AVS_SetupSecondBlock.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/AVS_SetupSecondBlock.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/AVS_SetupSecondBlock.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/AVS_SetupSecondBlock.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,27 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//------------------------------------------------------------------------------ -// AVS_SetupSecondBlock.asm -//------------------------------------------------------------------------------ - - //NLAS calculations for 2nd block of Media Sampler 8x8: - // X(i) = X0 + dx*i + ddx*i*(i-1)/2 ==> X(8) = X0 + dx*8 +ddx*28 - // dx(i)= dx(0) + ddx*i ==> dx(8)= dx + ddx*8 - - // Calculating X(8) - mov (1) acc0.2<1>:f fSRC_VID_H_ORI:f - mac (1) acc0.2<1>:f fVIDEO_STEP_X:f 8.0:f - mac (1) rAVS_PAYLOAD.2:f fVIDEO_STEP_DELTA:f 28.0:f - - // Calculating dx(8) - mov (1) acc0.1<1>:f fVIDEO_STEP_X:f - mac (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_DELTA:f 8.0:f - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DI_Hist_Save.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DI_Hist_Save.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DI_Hist_Save.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DI_Hist_Save.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,24 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - -// Write denoise history to memory -shr (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w 2:w NODDCLR // X,Y origin / 4 -add (1) rMSGSRC.0<1>:ud rMSGSRC.0<0;1,0>:ud uwSPITCH_DIV2<0;1,0>:uw NODDCLR_NODDCHK // Add pitch to X origin -mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_HIST:ud NODDCHK // block width and height (4x2) - -mov (8) mMSGHDR_HIST<1>:ud rMSGSRC.0<8;8,1>:ud // message header -mov (1) mudMSGHDR_HIST(1)<1> udRESP(nDI_HIST_OFFSET,0)<0;1,0> // Move denoise history to MRF - -send (8) dNULLREG mMSGHDR_HIST udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_HIST+nBI_STMM_HISTORY_OUTPUT:ud - - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DI.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DI.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DI.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DI.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,194 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: DI.inc - -#ifdef GT -// GT DI Kernel -#else // ILK -// ILK DI Kernel -#endif - - -//--------------------------------------------------------------------------- -// Binding table indices -//--------------------------------------------------------------------------- -#define nBIDX_DI_PRV 10 // Previous DI-ed frame -#define nBIDX_DI_CUR 13 // Current DI-ed frame -#define nBIDX_DN 7 // Denoised frame -#define nBIDX_STAT 20 // Statistics -#define nBIDX_DI_Source 4 // Source Surface - - -//--------------------------------------------------------------------------- -// Message descriptors -//--------------------------------------------------------------------------- -// Extended message descriptor -#define nSMPL_ENGINE 0x2 -#define nDATAPORT_WRITE 0x5 -#define nTS_EOT 0x27 // with End-Of-Thread bit ON - - // Message descriptor for end-of-thread - // = 000 0001 (message len) 00000 (resp len) - // 0 (header present 0) 00000000000000 0 (URB dereferenced) 0000 -#define nEOT_MSGDSC 0x02000000 - - // Message descriptor for sampler read - // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) - // 1 (header present 1) 0 11 (SIMD32/64 mode) - // 1000 (message type) 0000 (DI state index) - // 00000000 (binding table index - set later) - // = 0x040b8000 - -// comment begin -// The following is commented out because of walker feature -// It corresponds to the #ifdef GT #else and #endif -//#define nSMPL_MSGDSC 0x040b8000 -//#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 -//#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 -//#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 -//#define nSMPL_RESP_LEN_NODN 0x00900000 // 9 -//#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 -// comment end - -#ifdef GT - -#define nSMPL_MSGDSC 0x040b8000 -#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 -#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 //DI disable, the XY stored in 5th GRF, no impact to return length -#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 //DI disable, the XY stored in 5th GRF, no impact to return length -#define nSMPL_RESP_LEN_NODN 0x00a00000 // 10 //NO DN, originally use 9, now we need use 10 to store the XY with walker -#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 - -#else - -#define nSMPL_MSGDSC 0x040b8000 -#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 -#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 -#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 -#define nSMPL_RESP_LEN_NODN 0x00900000 // 9 -#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 - -#endif - - // Message descriptor for dataport media write -#ifdef GT - // = 000 0000 (message len - set later) 00000 (resp len 0) - // 1 (header present 1) 0 0 1010 (media block write) 00000 - // 00000000 (binding table index - set later) - // = 0x00094000 -#define nDPMW_MSGDSC 0x00094000 -#else // ILK - // = 000 0000 (message len - set later) 00000 (resp len 0) - // 1 (header present 1) 000 0 010 (media block write) 0000 - // 00000000 (binding table index - set later) - // = 0x00082000 -#define nDPMW_MSGDSC 0x00082000 -#endif -#define nDPMW_MSG_LEN_STMM 0x04000000 // 2 - STMM -#define nDPMW_MSG_LEN_DH 0x04000000 // 2 - Denoise history -#define nDPMW_MSG_LEN_PA_DN 0x0a000000 // 5 - Denoised output -#define nDPMW_MSG_LEN_PA_NODI 0x12000000 // 9 - Denoised output - denoise only - DI disabled -#define nDPMW_MSG_LEN_PL_DN 0x06000000 // 3 - Denoised output -#define nDPMW_MSG_LEN_PL_NODI 0x0a000000 // 5 - Denoised output - denoise only - DI disabled -#define nDPMW_MSG_LEN_DI 0x0a000000 // 5 - DI output - - -//--------------------------------------------------------------------------- -// Static and inline parameters -//--------------------------------------------------------------------------- -// Static parameters -.declare ubTFLD_FIRST Base=r1.27 ElementSize=1 Type=ub // top field first -.declare ubSRCYUVOFFSET Base=r1.4 ElementSize=1 Type=ub // source packed format -.declare ubDSTYUVOFFSET Base=r1.8 ElementSize=1 Type=ub // destination packed format -.declare uwSPITCH_DIV2 Base=r1.10 ElementSize=2 Type=uw // statistics surface pitch divided by 2 - -// Inline parameters -.declare uwXORIGIN Base=r5.0 ElementSize=2 Type=uw // X and Y origin -.declare uwYORIGIN Base=r5.1 ElementSize=2 Type=uw - - -//--------------------------------------------------------------------------- -// Kernel GRF variables -//--------------------------------------------------------------------------- -// Message response (Denoised & DI-ed pixels & statistics) -.declare dRESP Base=r8 ElementSize=4 Type=d // Response message (12 or 5 or 11) -.declare ubRESP Base=r8 ElementSize=1 Type=ub - -.declare dSTMM Base=r16 ElementSize=4 Type=d // STMM -.declare ubDN_HIST_NODI Base=r12 ElementSize=1 Type=ub // Denoise history data (DI disabled) -.declare ubDN_HIST_DI Base=r17 ElementSize=1 Type=ub // Denoise history data (DI enabled) -.declare uwRETURNED_POSITION_DI Base=r17 ElementSize=2 Type=uw // XY_Return_Data (DI enabled) -.declare uwRETURNED_POSITION_DN Base=r12 ElementSize=2 Type=uw // XY_Return_Data (DI disabled) - -.declare ub1ST_FLD_DN Base=r12 ElementSize=1 Type=ub // 1st field Denoised data (DI enabled) -.declare d1ST_FLD_DN Base=r12 ElementSize=4 Type=d -.declare ub2ND_FLD_DN Base=r18 ElementSize=1 Type=ub // 2nd field Denoised data (DI enabled) -.declare d2ND_FLD_DN Base=r18 ElementSize=4 Type=d -.declare ubPRV_DI Base=r8 ElementSize=1 Type=ub // Previous frame DI (DI enabled) -.declare ubCUR_DI Base=r12 ElementSize=1 Type=ub // Previous frame DI (DI enabled) - -// Packed denoised output -.declare ubDN_YUV Base=r22 ElementSize=1 Type=ub // Denoised YUV422 -.declare dDN_YUV Base=r22 ElementSize=4 Type=d -#define npDN_YUV 704 // = 22*32 = 0x280 - -// Packed DI output -.declare dDI_YUV_PRV Base=r32 ElementSize=4 Type=d // Previous frame DI output -.declare dDI_YUV_CUR Base=r36 ElementSize=4 Type=d // Current frame DI output -#define npDI_YUV 1024 // = 32*32 = 0x - -// For packed output -#define p422_YOFFSET a0.2 -#define p422_UOFFSET a0.3 -#define p422_VOFFSET a0.4 -#define pDN_TFLDSRC a0.6 -#define pDN_BFLDSRC a0.7 -#define npRESP 192 // = 6*32 - -// Message source -.declare udMSGSRC Base=r70 ElementSize=4 Type=ud -.declare uwMSGSRC Base=r70 ElementSize=2 Type=uw -.declare dMSGSRC Base=r70 ElementSize=4 Type=d - - -//--------------------------------------------------------------------------- -// Kernel MRF variables -//--------------------------------------------------------------------------- -#define mMSGHDR_SMPL m1 // Sampler response: m1~m2 -.declare mudMSGHDR_SMPL Base=m1 ElementSize=4 Type=ud -.declare muwMSGHDR_SMPL Base=m1 ElementSize=2 Type=uw -#define mMSGHDR_DN m3 // Denoise output: m3~m7 for PA, m3~m5 for PL -.declare mdMSGHDR_DN Base=m3 ElementSize=4 Type=d -#define mMSGHDR_STAT m8 // Statistics output: m8~m9 -.declare mdMSGHDR_STAT Base=m8 ElementSize=4 Type=d -.declare mubMSGHDR_STAT Base=m8 ElementSize=1 Type=ub -#define mMSGHDR_DI m10 // DI output: m10~m14 -.declare mdMSGHDR_DI Base=m10 ElementSize=4 Type=d -#define mMSGHDR_EOT m15 // EOT - -#ifdef GT -#define MSGSRC -#else -#define MSGSRC null:ud -#endif - - -//--------------------------------------------------------------------------- -// End of thread instruction -//--------------------------------------------------------------------------- -#ifdef GT -#define END_THREAD send (8) null<1>:d mMSGHDR_EOT nTS_EOT nEOT_MSGDSC -#else // ILK -#define END_THREAD send (8) null<1>:d mMSGHDR_EOT null:ud nTS_EOT nEOT_MSGDSC -#endif - - -// end of DI.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DI_SAVE_PA.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DI_SAVE_PA.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DI_SAVE_PA.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DI_SAVE_PA.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,56 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // H. block origin need to be doubled - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Block origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DI:ud NODDCHK // Block width and height (32x8) - - - add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub nDEST_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block - - // Pack 2nd field Y - $for(0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) - } - // Pack 1st field Y - $for(0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) - } - // Pack 2nd field U - $for(0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - } - // Pack 1st field U - $for(0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - } - // Pack 2nd field V - $for(0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //Vpixels - } - // Packs1st field V - $for(0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //Vpixels - } - - //save the previous frame - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - $for(0; <4; 1) { - mov (8) mudMSGPAYLOAD(%1)<1> udDEST_YUV(%1)REGION(8,1) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_DI+nBI_DESTINATION_1_YUV:ud - - //save the current frame - mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud - $for(0; <4; 1) { - mov (8) mudMSGPAYLOAD(%1)<1> udDEST_YUV(%1+4)REGION(8,1) - } - send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_DI+nBI_DESTINATION_2_YUV:ud - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DNDI_COMMAND.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DNDI_COMMAND.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DNDI_COMMAND.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DNDI_COMMAND.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,17 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Activate the DNDI send command -mov (8) mudMSG_SMPL(0)<1> rMSGSRC.0<8;8,1>:ud NODDCLR // message header -mov (1) muwMSG_SMPL(1,4)<1> wORIX<0;1,0>:w NODDCLR_NODDCHK// horizontal origin -mov (1) muwMSG_SMPL(1,12)<1> wORIY<0;1,0>:w NODDCLR_NODDCHK // vertical origin -//mov (2) muwMSG_SMPL(1,4)<2> wORIX<2;2,1>:w NODDCHK// problem during compile !! when using this line - -send (8) udRESP(0)<1> mMSG_SMPL udDUMMY_NULL nSMPL_ENGINE nSMPL_DI_MSGDSC+nSMPL_RESP_LEN+nBI_CURRENT_SRC_YUV_HW_DI:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DNDI_Hist_Save.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DNDI_Hist_Save.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DNDI_Hist_Save.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DNDI_Hist_Save.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,20 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - - -// Write denoise history to memory -shr (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w 2:w NODDCLR // X,Y origin / 4 -add (1) rMSGSRC.0<1>:ud rMSGSRC.0<0;1,0>:ud uwSPITCH_DIV2<0;1,0>:uw NODDCLR_NODDCHK// Add pitch to X origin -mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_HIST:ud NODDCHK // block width and height (4x2) - -mov (8) mMSGHDR_HIST<1>:ud rMSGSRC.0<8;8,1>:ud // message header -mov (2) mudMSGHDR_HIST(1)<1> udRESP(nNODI_HIST_OFFSET,0)<2;2,1> // Move denoise history to MRF - -send (8) dNULLREG mMSGHDR_HIST udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_HIST+nBI_STMM_HISTORY_OUTPUT:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DNDI.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DNDI.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/DNDI.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/DNDI.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,162 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// Module name: DI.inc - -#ifdef GT -// GT DI Kernel -#else // ILK -// ILK DI Kernel -#endif - -#include "undefall.inc" - -//--------------------------------------------------------------------------- -// Message descriptors -//--------------------------------------------------------------------------- -// Extended message descriptor - // Message descriptor for sampler read -// // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) -// // 1 (header present 1) 0 11 (SIMD32/64 mode) -// // 1000 (message type) 0000 (DI state index) -// // 00000000 (binding table index - set later) -// // = 0x040b8000 -#define nSMPL_DI_MSGDSC 0x040b8000 - -#define nSMPL_RESP_LEN_DNDI nRESLEN_12 // 12 - for DN + DI Alg -#define nSMPL_RESP_LEN_DN_PL nRESLEN_5 // 5 - for DN Planar Alg -#define nSMPL_RESP_LEN_DN_PA nRESLEN_9 // 9 - for DN Packed Alg -#define nSMPL_RESP_LEN_DI nRESLEN_9 // 9 - for DI Only Alg -#define nSMPL_RESP_LEN_PDI nRESLEN_11 // 11 - for Partial DI Alg - -// Attention: The Message Length is The Number of GRFs with Data Only, without the Header -#define nDPMW_MSG_LEN_STMM nMSGLEN_1 // 1 - For STMM Save -#define nDPMW_MSG_LEN_HIST nMSGLEN_1 // 1 - For Denoise History Save -#define nDPMW_MSG_LEN_PA_DN_DI nMSGLEN_4 // 4 - For DN Curr Save -#define nDPMW_MSG_LEN_PA_DN_NODI nMSGLEN_8 // 8 - For DN Curr Save (denoise only - DI disabled) -#define nDPMW_MSG_LEN_PL_DN_DI nMSGLEN_2 // 2 - For DN Curr Save -#define nDPMW_MSG_LEN_PL_DN_NODI nMSGLEN_4 // 4 - For DN Curr Save (denoise only - DI disabled) - -#define nDPW_BLOCK_SIZE_STMM nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // Y block size 8x4 - -#undef nDPW_BLOCK_SIZE_DI -#undef nDPW_MSG_SIZE_DI -#define nDPW_BLOCK_SIZE_DI nBLOCK_WIDTH_32+nBLOCK_HEIGHT_4 -#define nDPW_MSG_SIZE_DI nMSGLEN_4 - - -//--------------------------------------------------------------------------- -// Kernel GRF variables -//--------------------------------------------------------------------------- -// Defines for DI enabled -#define nDI_PREV_FRAME_LUMA_OFFSET 0 -#define nDI_PREV_FRAME_CHROMA_OFFSET 2 -#define nDI_CURR_FRAME_LUMA_OFFSET 4 -#define nDI_CURR_FRAME_CHROMA_OFFSET 6 -#define nDI_STMM_OFFSET 8 -#define nDI_HIST_OFFSET 9 -#define nDI_CURR_2ND_FIELD_LUMA_OFFSET 10 -#define nDI_CURR_2ND_FIELD_CHROMA_OFFSET 11 - -// Defines for DI disabled -#define nNODI_LUMA_OFFSET 0 -#define nNODI_HIST_OFFSET 4 -#define nNODI_CHROMA_OFFSET 5 - -#ifdef DI_ENABLE - #define nHIST_OFFSET nDI_HIST_OFFSET - #undef nY_NUM_OF_ROWS - #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) - #undef nUV_NUM_OF_ROWS - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - -#endif - -#ifdef DI_DISABLE - #define nHIST_OFFSET nNODI_HIST_OFFSET -#endif - -#if (nSRC_REGION==nREGION_2) - #define ub2SRC_Y ub2BOT_Y - #define ub2SRC_U ub2BOT_U - #define ub2SRC_V ub2BOT_V - #define uwDEST_Y uwBOT_Y - #define uwDEST_U uwBOT_U - #define uwDEST_V uwBOT_V - #define nDEST_YUV_REG nTOP_Y - #define udDEST_YUV udTOP_Y_IO - - #define nRESP nTEMP0 // DI return message requires 12 GRFs - #define nDN_YUV nTOP_Y // Space for Packing DN for next run requires 8 GRFs - - #undef nSRC_REGION - #define nSRC_REGION nREGION_2 - -#else - #define ub2SRC_Y ub2TOP_Y - #define ub2SRC_U ub2TOP_U - #define ub2SRC_V ub2TOP_V - #define uwDEST_Y uwTOP_Y - #define uwDEST_U uwTOP_U - #define uwDEST_V uwTOP_V - #define nDEST_YUV_REG nBOT_Y - #define udDEST_YUV udBOT_Y_IO - #define nRESP nTEMP0 // DI return message requires 12 GRFs - #define nDN_YUV nBOT_Y // Space for Packing DN for next run requires 8 GRFs - - #undef nSRC_REGION - #define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel - -#endif - - - - - - - - - -// Message response (Denoised & DI-ed pixels & statistics) -.declare udRESP Base=REG(r,nRESP) ElementSize=4 SrcRegion=REGION(8,1) DstRegion=<1> Type=ud -.declare ubRESP Base=REG(r,nRESP) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub - -// For Denoised Curr Output (Used as Priv in Next Run) -.declare ubDN_YUV Base=REG(r,nDN_YUV) ElementSize=1 Type=ub -.declare udDN_YUV Base=REG(r,nDN_YUV) ElementSize=4 Type=ud -#define npDN_YUV nDN_YUV*nGRFWIB - -// For DI Process Output (1st and 2nd Frames Output) -//.declare udDI_YUV_PRIV Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Previous frame DI output -//.declare udDI_YUV_CURR Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Current frame DI output -//#define npDI_YUV nTEMP0*nGRFWIB - -//--------------------------------------------------------------------------- -// Kernel MRF variables -//--------------------------------------------------------------------------- -#define mMSG_SMPL m1 // Sampler Command is in: m1~m2 -.declare mudMSG_SMPL Base=mMSG_SMPL ElementSize=4 Type=ud -.declare muwMSG_SMPL Base=mMSG_SMPL ElementSize=2 Type=uw - -#define mMSGHDR_DN m1 // Denoise Output: m1~m9 for PA, m3~m5 for PL -.declare mudMSGHDR_DN Base=mMSGHDR_DN ElementSize=4 Type=ud -.declare mubMSGHDR_DN Base=mMSGHDR_DN ElementSize=1 Type=ub - -#define mMSGHDR_STMM m11 // STMM Output: m11~m12 -.declare mudMSGHDR_STMM Base=mMSGHDR_STMM ElementSize=4 Type=ud -#define mMSGHDR_HIST m13 // HIST Output: m13~m14 -.declare mudMSGHDR_HIST Base=mMSGHDR_HIST ElementSize=1 Type=ud - -#define mMSGHDR_DI_1ST m1 // DI output: m1~m5 -.declare mudMSGHDR_DI_1ST Base=mMSGHDR_DI_1ST ElementSize=4 Type=ud -#define mMSGHDR_DI_2ND m6 // DI output: m6~m10 -.declare mudMSGHDR_DI_2ND Base=mMSGHDR_DI_2ND ElementSize=4 Type=ud - -// end of DNDI.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,26 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_AVS_IEF_16x8.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 YUV packed -//------------------------------------------------------------------------------ -#include "PA_AVS_IEF_Sample.asm" - -//------------------------------------------------------------------------------ -// Unpacking sampler reads to 4:4:4 internal planar -//------------------------------------------------------------------------------ -#include "PA_AVS_IEF_Unpack_16x8.asm" - -//------------------------------------------------------------------------------ - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,25 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_AVS_IEF_8x4.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 YUV packed -//------------------------------------------------------------------------------ -#include "PA_AVS_IEF_Sample.asm" - -//------------------------------------------------------------------------------ -// Unpacking sampler data to 4:2:0 internal planar -//------------------------------------------------------------------------------ -#include "PA_AVS_IEF_Unpack_8x4.asm" - -//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,25 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_AVS_IEF_8x8.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 YUV packed -//------------------------------------------------------------------------------ -#include "PA_AVS_IEF_Sample.asm" - -//------------------------------------------------------------------------------ -// Unpacking sampler data to 4:2:2 internal planar -//------------------------------------------------------------------------------ -#include "PA_AVS_IEF_Unpack_8x8.asm" - -//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Sample.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Sample.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Sample.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Sample.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,34 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_AVS_IEF_Sample.asm ---------- - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 YUV packed -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - // Enable RGB(YUV) channels - mov (1) rAVS_8x8_HDR.2:ud nAVS_RGB_CHANNELS:ud - - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_3CH+nSI_SRC_YUV+nBI_CURRENT_SRC_YUV - // Return YUV in 12 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - - mov (16) mAVS_8x8_HDR_2.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR_2 udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_3CH+nSI_SRC_YUV+nBI_CURRENT_SRC_YUV - // Return YUV in 12 GRFs - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,288 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_AVS_IEF_Unpack_16x8.asm ---------- - -#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format -// Move first 8x8 words of Y to dest GRF (as packed) - mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> - mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> - mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> - mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> - mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> - mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> - mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> - mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> - mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(8,0)<4;4,1> - mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(8,8)<4;4,1> - mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(8,4)<4;4,1> - mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(8,12)<4;4,1> - mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(9,0)<4;4,1> - mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(9,8)<4;4,1> - mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(9,4)<4;4,1> - mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(9,12)<4;4,1> - -// Move first 8x8 words of U to dest GRF (as packed) - mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> - mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> - mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> - mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> - mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> - mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> - mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> - mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> - mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(10,0)<4;4,1> - mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(10,8)<4;4,1> - mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(10,4)<4;4,1> - mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(10,12)<4;4,1> - mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(11,0)<4;4,1> - mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(11,8)<4;4,1> - mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(11,4)<4;4,1> - mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(11,12)<4;4,1> - -// Move first 8x8 words of V to dest GRF (as packed) - mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(0,0)<4;4,1> - mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(0,8)<4;4,1> - mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(0,4)<4;4,1> - mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(0,12)<4;4,1> - mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(1,0)<4;4,1> - mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(1,8)<4;4,1> - mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(1,4)<4;4,1> - mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(1,12)<4;4,1> - mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(6,0)<4;4,1> - mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(6,8)<4;4,1> - mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(6,4)<4;4,1> - mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(6,12)<4;4,1> - mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(7,0)<4;4,1> - mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(7,8)<4;4,1> - mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(7,4)<4;4,1> - mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(7,12)<4;4,1> - -// Move first 8x8 words of A to dest GRF (as packed) - mov (4) uwDEST_Y(0,3)<4> 0:uw - mov (4) uwDEST_Y(1,3)<4> 0:uw - mov (4) uwDEST_Y(4,3)<4> 0:uw - mov (4) uwDEST_Y(5,3)<4> 0:uw - mov (4) uwDEST_Y(8,3)<4> 0:uw - mov (4) uwDEST_Y(9,3)<4> 0:uw - mov (4) uwDEST_Y(12,3)<4> 0:uw - mov (4) uwDEST_Y(13,3)<4> 0:uw - mov (4) uwDEST_Y(16,3)<4> 0:uw - mov (4) uwDEST_Y(17,3)<4> 0:uw - mov (4) uwDEST_Y(20,3)<4> 0:uw - mov (4) uwDEST_Y(21,3)<4> 0:uw - mov (4) uwDEST_Y(24,3)<4> 0:uw - mov (4) uwDEST_Y(25,3)<4> 0:uw - mov (4) uwDEST_Y(28,3)<4> 0:uw - mov (4) uwDEST_Y(29,3)<4> 0:uw - -// Move second 8x8 words of Y to dest GRF - mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> - mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> - mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> - mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> - mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> - mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> - mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> - mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> - mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> - mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> - mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> - mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> - mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> - mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> - mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> - mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> - -// Move second 8x8 words of U to dest GRF - mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> - mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> - mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> - mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> - mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> - mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> - mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> - mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> - mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> - mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> - mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> - mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> - mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> - mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> - mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> - mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> - -// Move second 8x8 words of V to dest GRF - mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> - mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> - mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> - mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> - mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> - mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> - mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> - mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> - mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> - mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> - mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> - mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> - mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> - mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> - mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> - mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> - -// Move second 8x8 words of A to dest GRF - mov (4) uwDEST_Y(2,3)<4> 0:uw - mov (4) uwDEST_Y(3,3)<4> 0:uw - mov (4) uwDEST_Y(6,3)<4> 0:uw - mov (4) uwDEST_Y(7,3)<4> 0:uw - mov (4) uwDEST_Y(10,3)<4> 0:uw - mov (4) uwDEST_Y(11,3)<4> 0:uw - mov (4) uwDEST_Y(14,3)<4> 0:uw - mov (4) uwDEST_Y(15,3)<4> 0:uw - mov (4) uwDEST_Y(18,3)<4> 0:uw - mov (4) uwDEST_Y(19,3)<4> 0:uw - mov (4) uwDEST_Y(22,3)<4> 0:uw - mov (4) uwDEST_Y(23,3)<4> 0:uw - mov (4) uwDEST_Y(26,3)<4> 0:uw - mov (4) uwDEST_Y(27,3)<4> 0:uw - mov (4) uwDEST_Y(30,3)<4> 0:uw - mov (4) uwDEST_Y(31,3)<4> 0:uw - -/* This section will be used if 16-bit output is needed in planar format -vK - // Move first 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0)<1> uwAVS_RESPONSE(2,0)<8;4,1> - mov (8) uwDEST_Y(1)<1> uwAVS_RESPONSE(2,8)<8;4,1> - mov (8) uwDEST_Y(2)<1> uwAVS_RESPONSE(3,0)<8;4,1> - mov (8) uwDEST_Y(3)<1> uwAVS_RESPONSE(3,8)<8;4,1> - mov (8) uwDEST_Y(4)<1> uwAVS_RESPONSE(8,0)<8;4,1> - mov (8) uwDEST_Y(5)<1> uwAVS_RESPONSE(8,8)<8;4,1> - mov (8) uwDEST_Y(6)<1> uwAVS_RESPONSE(9,0)<8;4,1> - mov (8) uwDEST_Y(7)<1> uwAVS_RESPONSE(9,8)<8;4,1> - - // Move first 8x8 words of V to dest GRF - mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(0,0)<8;4,1> - mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(0,8)<8;4,1> - mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(1,0)<8;4,1> - mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(1,8)<8;4,1> - mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(6,0)<8;4,1> - mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(6,8)<8;4,1> - mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(7,0)<8;4,1> - mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(7,8)<8;4,1> - - // Move first 8x8 words of U to dest GRF - mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,0)<8;4,1> - mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(4,8)<8;4,1> - mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(5,0)<8;4,1> - mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(5,8)<8;4,1> - mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,0)<8;4,1> - mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8)<8;4,1> - mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,0)<8;4,1> - mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8)<8;4,1> - - // Move second 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0,8)<1> uwAVS_RESPONSE_2(2,0)<8;4,1> - mov (8) uwDEST_Y(1,8)<1> uwAVS_RESPONSE_2(2,8)<8;4,1> - mov (8) uwDEST_Y(2,8)<1> uwAVS_RESPONSE_2(3,0)<8;4,1> - mov (8) uwDEST_Y(3,8)<1> uwAVS_RESPONSE_2(3,8)<8;4,1> - mov (8) uwDEST_Y(4,8)<1> uwAVS_RESPONSE_2(8,0)<8;4,1> - mov (8) uwDEST_Y(5,8)<1> uwAVS_RESPONSE_2(8,8)<8;4,1> - mov (8) uwDEST_Y(6,8)<1> uwAVS_RESPONSE_2(9,0)<8;4,1> - mov (8) uwDEST_Y(7,8)<1> uwAVS_RESPONSE_2(9,8)<8;4,1> - - // Move second 8x8 words of V to dest GRF - mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(0,0)<8;4,1> - mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(0,8)<8;4,1> - mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(1,0)<8;4,1> - mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(1,8)<8;4,1> - mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(6,0)<8;4,1> - mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(6,8)<8;4,1> - mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(7,0)<8;4,1> - mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(7,8)<8;4,1> - - // Move second 8x8 words of U to dest GRF - mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(4,0)<8;4,1> - mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(4,8)<8;4,1> - mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(5,0)<8;4,1> - mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(5,8)<8;4,1> - mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,0)<8;4,1> - mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8)<8;4,1> - mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,0)<8;4,1> - mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8)<8;4,1> -*/ -#else /* OUTPUT_8_BIT */ - // Move first 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> - mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> - mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> - mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> - mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> - mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> - - // Move first 8x8 words of V to dest GRF - mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;4,2> - mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(0,8+1)<16;4,2> - mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(1,1)<16;4,2> - mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(1,8+1)<16;4,2> - mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(6,1)<16;4,2> - mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> - mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(7,1)<16;4,2> - mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> - - // Move first 8x8 words of U to dest GRF - mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> - mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> - mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> - mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> - mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> - mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> - mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> - mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> - - // Move second 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> - mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> - mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> - mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> - mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> - mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> - mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> - mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> - - // Move second 8x8 words of V to dest GRF - mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(0,1)<16;4,2> - mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(0,8+1)<16;4,2> - mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(1,1)<16;4,2> - mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(1,8+1)<16;4,2> - mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> - mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> - mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> - mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> - - // Move second 8x8 words of U to dest GRF - mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> - mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> - mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> - mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> - mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> - mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> - mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> - mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> -#endif -//------------------------------------------------------------------------------ - - // Re-define new number of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,77 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_AVS_IEF_Unpack_8x8.asm ---------- - -// Yoni: In order to optimize unpacking, 3 methods are being checked: -// 1. AVS_ORIGINAL -// 2. AVS_ROUND_TO_8_BITS -// 3. AVS_INDIRECT_ACCESS -// -// Only 1 method should stay in the code - - -//#define AVS_ROUND_TO_8_BITS -//#define AVS_INDIRECT_ACCESS - - - // Move first 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> - mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> - mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> - mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> - mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> - mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> - - // Move first 4x8 words of V to dest GRF - mov (4) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;2,4> - mov (4) uwDEST_V(0,8)<1> ubAVS_RESPONSE(1,1)<16;2,4> - mov (4) uwDEST_V(1)<1> ubAVS_RESPONSE(6,1)<16;2,4> - mov (4) uwDEST_V(1,8)<1> ubAVS_RESPONSE(7,1)<16;2,4> - - // Move first 4x8 words of U to dest GRF - mov (4) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;2,4> - mov (4) uwDEST_U(0,8)<1> ubAVS_RESPONSE(5,1)<16;2,4> - mov (4) uwDEST_U(1)<1> ubAVS_RESPONSE(10,1)<16;2,4> - mov (4) uwDEST_U(1,8)<1> ubAVS_RESPONSE(11,1)<16;2,4> - - // Move second 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> - mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> - mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> - mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> - mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> - mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> - mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> - mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> - - // Move second 4x8 words of V to dest GRF - mov (4) uwDEST_V(0,4)<1> ubAVS_RESPONSE_2(0,1)<16;2,4> - mov (4) uwDEST_V(0,12)<1> ubAVS_RESPONSE_2(1,1)<16;2,4> - mov (4) uwDEST_V(1,4)<1> ubAVS_RESPONSE_2(6,1)<16;2,4> - mov (4) uwDEST_V(1,12)<1> ubAVS_RESPONSE_2(7,1)<16;2,4> - - // Move second 4x8 words of U to dest GRF - mov (4) uwDEST_U(0,4)<1> ubAVS_RESPONSE_2(4,1)<16;2,4> - mov (4) uwDEST_U(0,12)<1> ubAVS_RESPONSE_2(5,1)<16;2,4> - mov (4) uwDEST_U(1,4)<1> ubAVS_RESPONSE_2(10,1)<16;2,4> - mov (4) uwDEST_U(1,12)<1> ubAVS_RESPONSE_2(11,1)<16;2,4> - -//------------------------------------------------------------------------------ - - // Re-define new number of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,93 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_AVS_IEF_Unpack_8x8.asm ---------- - -// Yoni: In order to optimize unpacking, 3 methods are being checked: -// 1. AVS_ORIGINAL -// 2. AVS_ROUND_TO_8_BITS -// 3. AVS_INDIRECT_ACCESS -// -// Only 1 method should stay in the code - - -//#define AVS_ROUND_TO_8_BITS -//#define AVS_INDIRECT_ACCESS - - - // Move first 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> - mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> - mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> - mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> - mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> - mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> - - // Move first 4x8 words of V to dest GRF - mov (4) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;2,4> - mov (4) uwDEST_V(0,8)<1> ubAVS_RESPONSE(0,8+1)<16;2,4> - mov (4) uwDEST_V(1)<1> ubAVS_RESPONSE(1,1)<16;2,4> - mov (4) uwDEST_V(1,8)<1> ubAVS_RESPONSE(1,8+1)<16;2,4> - mov (4) uwDEST_V(2)<1> ubAVS_RESPONSE(6,1)<16;2,4> - mov (4) uwDEST_V(2,8)<1> ubAVS_RESPONSE(6,8+1)<16;2,4> - mov (4) uwDEST_V(3)<1> ubAVS_RESPONSE(7,1)<16;2,4> - mov (4) uwDEST_V(3,8)<1> ubAVS_RESPONSE(7,8+1)<16;2,4> - - // Move first 4x8 words of U to dest GRF - mov (4) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;2,4> - mov (4) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,8+1)<16;2,4> - mov (4) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;2,4> - mov (4) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,8+1)<16;2,4> - mov (4) uwDEST_U(2)<1> ubAVS_RESPONSE(10,1)<16;2,4> - mov (4) uwDEST_U(2,8)<1> ubAVS_RESPONSE(10,8+1)<16;2,4> - mov (4) uwDEST_U(3)<1> ubAVS_RESPONSE(11,1)<16;2,4> - mov (4) uwDEST_U(3,8)<1> ubAVS_RESPONSE(11,8+1)<16;2,4> - - // Move second 8x8 words of Y to dest GRF - mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> - mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> - mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> - mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> - mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> - mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> - mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> - mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> - - // Move second 4x8 words of V to dest GRF - mov (4) uwDEST_V(0,4)<1> ubAVS_RESPONSE_2(0,1)<16;2,4> - mov (4) uwDEST_V(0,12)<1> ubAVS_RESPONSE_2(0,8+1)<16;2,4> - mov (4) uwDEST_V(1,4)<1> ubAVS_RESPONSE_2(1,1)<16;2,4> - mov (4) uwDEST_V(1,12)<1> ubAVS_RESPONSE_2(1,8+1)<16;2,4> - mov (4) uwDEST_V(2,4)<1> ubAVS_RESPONSE_2(6,1)<16;2,4> - mov (4) uwDEST_V(2,12)<1> ubAVS_RESPONSE_2(6,8+1)<16;2,4> - mov (4) uwDEST_V(3,4)<1> ubAVS_RESPONSE_2(7,1)<16;2,4> - mov (4) uwDEST_V(3,12)<1> ubAVS_RESPONSE_2(7,8+1)<16;2,4> - - // Move second 4x8 words of U to dest GRF - mov (4) uwDEST_U(0,4)<1> ubAVS_RESPONSE_2(4,1)<16;2,4> - mov (4) uwDEST_U(0,12)<1> ubAVS_RESPONSE_2(4,8+1)<16;2,4> - mov (4) uwDEST_U(1,4)<1> ubAVS_RESPONSE_2(5,1)<16;2,4> - mov (4) uwDEST_U(1,12)<1> ubAVS_RESPONSE_2(5,8+1)<16;2,4> - mov (4) uwDEST_U(2,4)<1> ubAVS_RESPONSE_2(10,1)<16;2,4> - mov (4) uwDEST_U(2,12)<1> ubAVS_RESPONSE_2(10,8+1)<16;2,4> - mov (4) uwDEST_U(3,4)<1> ubAVS_RESPONSE_2(11,1)<16;2,4> - mov (4) uwDEST_U(3,12)<1> ubAVS_RESPONSE_2(11,8+1)<16;2,4> - -//------------------------------------------------------------------------------ - - // Re-define new number of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_DN_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_DN_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_DN_ALG.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_DN_ALG.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,54 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_DISABLE - -#include "DNDI.inc" - -#undef nY_NUM_OF_ROWS -#define nY_NUM_OF_ROWS 8 // Number of Y rows per block -#undef nUV_NUM_OF_ROWS -#define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - -#undef nSMPL_RESP_LEN -#define nSMPL_RESP_LEN nSMPL_RESP_LEN_DN_PA // Set the Number of GRFs in DNDI response -#undef nDPW_BLOCK_SIZE_DN -#define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // DN Curr Block Size for Write is 32x8 -#undef nDPW_BLOCK_SIZE_HIST -#define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_2 // HIST Block Size for Write is 4x2 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// -#include "DNDI_COMMAND.asm" - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// -#include "DNDI_Hist_Save.asm" - -////////////////////////////////////// Pack and Save the DN Curr Frame for Next Run /////////////// -add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub npDN_YUV:w -$for (0; :ub ubRESP(nNODI_LUMA_OFFSET,%1*16)<16;16,1> // copy line of Y -} -$for (0; :ub ubRESP(nNODI_CHROMA_OFFSET,%1*16+1)<16;8,2> // copy line of U - mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nNODI_CHROMA_OFFSET,%1*16)<16;8,2> // copy line of V -} - -shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin * 2 (422 output) -mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin -mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (32x8) -mov (8) mMSGHDR_DN<1>:ud rMSGSRC<8;8,1>:ud // message header - -$for(0; udDN_YUV(%1)REGION(8,1) // Move DN Curr to MRF -} -send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PA_DN_NODI+nBI_DESTINATION_YUV:ud - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_DNDI_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_DNDI_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_DNDI_ALG.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_DNDI_ALG.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,139 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_ENABLE - - #include "DNDI.inc" - - #ifdef DI_ONLY - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DI // set the number of GRF - #else - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF - #endif - - #undef nDPW_BLOCK_SIZE_HIST - #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 - #undef nDPW_BLOCK_SIZE_DN - #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_4 // DN Block Size for Write is 32x4 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// - #include "DNDI_Command.asm" - -////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// - //// move the previous frame Y component to internal planar format - //$for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) - //} - //// move the previous frame U,V components to internal planar format - //$for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - // mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - //} - //// move the current frame Y component to internal planar format - //$for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) - //} - //// move the current frame U,V components to internal planar format - //$for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - // mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - //} - -////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// - // Write STMM to memory - shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // X origin / 2 - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud NODDCHK // block width and height (8x4) - mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header - mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF - send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// -#ifdef DI_ONLY -#else - - #include "DI_Hist_Save.asm" - -////////////////////////////////////// Pack and Save the DN Curr Frame for Next Run /////////////// - // check top/bottom field first - cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w - - add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:uw - //set the save DN position - shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // X origin * 2 - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud NODDCHK // block width and height (8x4) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - - - (f0.0) jmpi (1) TOP_FIELD_FIRST - -BOTTOM_FIELD_FIRST: - //$for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 0,2) - // mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,16) // 1st field luma from current frame (line 1,3) - // mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 0,2) - // mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 0,2) - // mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16+1)<16;8,2> // 1st field U from current frame (line 1,3) - // mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16)<16;8,2> // 1st field U from current frame (line 1,3) - //} - $for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 0,2) - mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,16) // 1st field luma from current frame (line 1,3) - } - - $for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 0,2) - mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16+1)<16;8,2> // 1st field U from current frame (line 1,3) - } - - $for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 0,2) - mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16)<16;8,2> // 1st field U from current frame (line 1,3) - } - - jmpi (1) SAVE_DN_CURR - -TOP_FIELD_FIRST: - //$for (0,0; :ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0) // 1st field luma from current frame (line 0,2) - // mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 1,3) - // mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,1)<16;8,2> // 1st field U from current frame (line 0,2) - // mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,0)<16;8,2> // 1st field V from current frame (line 0,2) - // mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 1,3) - // mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 1,3) - //} - $for (0,0; :ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0) // 1st field luma from current frame (line 0,2) - mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 1,3) - } - $for (0,0; :ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,1)<16;8,2> // 1st field U from current frame (line 0,2) - mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 1,3) - } - $for (0,0; :ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,0)<16;8,2> // 1st field V from current frame (line 0,2) - mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 1,3) - } - -SAVE_DN_CURR: - $for(0; udDN_YUV(%1)REGION(8,1) - } - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PA_DN_DI+nBI_DESTINATION_YUV:ud -#endif - -// Save Processed frames -#include "DI_Save_PA.asm" - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PA_Scaling.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PA_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,70 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PA_Scaling.asm ---------- -#include "Scaling.inc" - - // Build 16 elements ramp in float32 and normalized it -// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v -// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f -mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector -mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector -add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f - -//Module: PrepareScaleCoord.asm - - // Setup for sampler msg hdr - mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields - mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset - - // Calculate 16 v based on the step Y and vertical origin - mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f - mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f - - // Calculate 16 u based on the step X and hori origin -// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly - mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } - mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } - - //Setup the constants for line instruction - mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } - mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } - -//------------------------------------------------------------------------------ - -$for (0; :ud // Copy msg header and payload mirrors to MRFs - send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_YUV+nBI_CURRENT_SRC_YUV - - // Calculate 16 v for next line - add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - - // Scale back to [0, 255], convert f to ud - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(2) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(2)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(4) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(4)<1> acc0:f { Compr } - - mov (16) DEST_V(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK - mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(2) //possible error due to truncation - vK - mov (16) DEST_U(%1)<1> SCALE_RESPONSE_YB(4) //possible error due to truncation - vK - -} - - #define nSRC_REGION nREGION_1 - -//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,60 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL2_AVS_IEF_16x8.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 Y each -// 2 sampler read for 8x8 U and 8x8 V (NV11\P208 input surface) -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - // Enable green channel only - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud - - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - - // 8x8 U and V sampling - // Enable red and blue channels - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud - - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV - // Return U and V in 8 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - - // 2nd 8x8 Y sampling - // Enable green channel only - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud - - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - - // 2nd 8x8 U and V sampling - // Enable red and blue channels - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud - - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV - // Return U and V in 8 GRFs - -//------------------------------------------------------------------------------ -// Unpacking sampler reads to 4:4:4 internal planar -//------------------------------------------------------------------------------ - #include "PL2_AVS_IEF_Unpack_16x8.asm" - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,58 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL2_AVS_IEF_8x4.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 Y each -// 1 sampler read for 8x8 U and 8x8 V (NV11\NV12 input surface) -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - // Enable green channel only - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud - - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - - // 8x8 U and V sampling - // Enable red and blue channels - //Only 8x4 wil be used - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud - - // Calculate Chroma Step Size: - // for H direction: 16 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_X = 2 * Luma_Step_X - // for V direction: 8 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_Y = Luma_Step_Y - mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Step X for chroma - - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV - // Return U and V in 8 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - - // 2nd 8x8 Y sampling - // Enable green channel only - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud - - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - -//------------------------------------------------------------------------------ -// Unpacking sampler reads to 4:2:0 internal planar -//------------------------------------------------------------------------------ - #include "PL2_AVS_IEF_Unpack_8x4.asm" - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,57 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL2_AVS_IEF_8x8.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 Y each -// 1 sampler read for 8x8 U and 8x8 V (NV11\NV12 input surface) -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - // Enable green channel only - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud - - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - - // 8x8 U and V sampling - // Enable red and blue channels - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud - - // Calculate Chroma Step Size: - // for H direction: 16 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_X = 2 * Luma_Step_X - // for V direction: 8 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_Y = Luma_Step_Y - mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Step X for chroma - - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV - // Return U and V in 8 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - - // 2nd 8x8 Y sampling - // Enable green channel only - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud - - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - -//------------------------------------------------------------------------------ -// Unpacking sampler reads to 4:2:2 internal planar -//------------------------------------------------------------------------------ - #include "PL2_AVS_IEF_Unpack_8x8.asm" - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,271 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL2_AVS_IEF_Unpack_16x8.asm ---------- - -#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format -// Move first 8x8 words of Y to dest GRF (as packed) - mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(0,0)<4;4,1> - mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(0,8)<4;4,1> - mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(0,4)<4;4,1> - mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(0,12)<4;4,1> - mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(1,0)<4;4,1> - mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(1,8)<4;4,1> - mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(1,4)<4;4,1> - mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(1,12)<4;4,1> - mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> - mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> - mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> - mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> - mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> - mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> - mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> - mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> - -// Move first 8x8 words of U to dest GRF (as packed) - mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> - mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> - mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> - mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> - mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> - mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> - mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> - mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> - mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> - mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> - mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> - mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> - mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> - mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> - mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> - mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> - -// Move first 8x8 words of V to dest GRF (as packed) - mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(6,0)<4;4,1> - mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(6,8)<4;4,1> - mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(6,4)<4;4,1> - mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(6,12)<4;4,1> - mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(7,0)<4;4,1> - mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(7,8)<4;4,1> - mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(7,4)<4;4,1> - mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(7,12)<4;4,1> - mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(10,0)<4;4,1> - mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(10,8)<4;4,1> - mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(10,4)<4;4,1> - mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(10,12)<4;4,1> - mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(11,0)<4;4,1> - mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(11,8)<4;4,1> - mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(11,4)<4;4,1> - mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(11,12)<4;4,1> - -// Move first 8x8 words of A to dest GRF (as packed) - mov (4) uwDEST_Y(0,3)<4> 0:uw - mov (4) uwDEST_Y(1,3)<4> 0:uw - mov (4) uwDEST_Y(4,3)<4> 0:uw - mov (4) uwDEST_Y(5,3)<4> 0:uw - mov (4) uwDEST_Y(8,3)<4> 0:uw - mov (4) uwDEST_Y(9,3)<4> 0:uw - mov (4) uwDEST_Y(12,3)<4> 0:uw - mov (4) uwDEST_Y(13,3)<4> 0:uw - mov (4) uwDEST_Y(16,3)<4> 0:uw - mov (4) uwDEST_Y(17,3)<4> 0:uw - mov (4) uwDEST_Y(20,3)<4> 0:uw - mov (4) uwDEST_Y(21,3)<4> 0:uw - mov (4) uwDEST_Y(24,3)<4> 0:uw - mov (4) uwDEST_Y(25,3)<4> 0:uw - mov (4) uwDEST_Y(28,3)<4> 0:uw - mov (4) uwDEST_Y(29,3)<4> 0:uw - -// Move second 8x8 words of Y to dest GRF - mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> - mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> - mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> - mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> - mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> - mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> - mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> - mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> - mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> - mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> - mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> - mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> - mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> - mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> - mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> - mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> - -// Move second 8x8 words of U to dest GRF - mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> - mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> - mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> - mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> - mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> - mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> - mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> - mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> - mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> - mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> - mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> - mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> - mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> - mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> - mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> - mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> - -// Move second 8x8 words of V to dest GRF - mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> - mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> - mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> - mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> - mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> - mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> - mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> - mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> - mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> - mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> - mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> - mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> - mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> - mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> - mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> - mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> - -// Move second 8x8 words of A to dest GRF - mov (4) uwDEST_Y(2,3)<4> 0:uw - mov (4) uwDEST_Y(3,3)<4> 0:uw - mov (4) uwDEST_Y(6,3)<4> 0:uw - mov (4) uwDEST_Y(7,3)<4> 0:uw - mov (4) uwDEST_Y(10,3)<4> 0:uw - mov (4) uwDEST_Y(11,3)<4> 0:uw - mov (4) uwDEST_Y(14,3)<4> 0:uw - mov (4) uwDEST_Y(15,3)<4> 0:uw - mov (4) uwDEST_Y(18,3)<4> 0:uw - mov (4) uwDEST_Y(19,3)<4> 0:uw - mov (4) uwDEST_Y(22,3)<4> 0:uw - mov (4) uwDEST_Y(23,3)<4> 0:uw - mov (4) uwDEST_Y(26,3)<4> 0:uw - mov (4) uwDEST_Y(27,3)<4> 0:uw - mov (4) uwDEST_Y(30,3)<4> 0:uw - mov (4) uwDEST_Y(31,3)<4> 0:uw - -/* This section will be used if 16-bit output is needed in planar format -vK - // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> uwAVS_RESPONSE(%1,0)<8;4,1> - mov (8) uwDEST_Y(%1*2+1)<1> uwAVS_RESPONSE(%1,8)<8;4,1> - } - - // Move 1st 8x8 words of U to dest GRF (Copy high byte in a word) - mov (8) uwDEST_U(0)<1> uwAVS_RESPONSE(4,0)<8;4,1> - mov (8) uwDEST_U(1)<1> uwAVS_RESPONSE(4,8)<8;4,1> - mov (8) uwDEST_U(2)<1> uwAVS_RESPONSE(5,0)<8;4,1> - mov (8) uwDEST_U(3)<1> uwAVS_RESPONSE(5,8)<8;4,1> - mov (8) uwDEST_U(4)<1> uwAVS_RESPONSE(8,0)<8;4,1> - mov (8) uwDEST_U(5)<1> uwAVS_RESPONSE(8,8)<8;4,1> - mov (8) uwDEST_U(6)<1> uwAVS_RESPONSE(9,0)<8;4,1> - mov (8) uwDEST_U(7)<1> uwAVS_RESPONSE(9,8)<8;4,1> - - // Move 1st 8x8 words of V to dest GRF - mov (8) uwDEST_V(0)<1> uwAVS_RESPONSE(6,0)<8;4,1> - mov (8) uwDEST_V(1)<1> uwAVS_RESPONSE(6,8)<8;4,1> - mov (8) uwDEST_V(2)<1> uwAVS_RESPONSE(7,0)<8;4,1> - mov (8) uwDEST_V(3)<1> uwAVS_RESPONSE(7,8)<8;4,1> - mov (8) uwDEST_V(4)<1> uwAVS_RESPONSE(10,0)<8;4,1> - mov (8) uwDEST_V(5)<1> uwAVS_RESPONSE(10,8)<8;4,1> - mov (8) uwDEST_V(6)<1> uwAVS_RESPONSE(11,0)<8;4,1> - mov (8) uwDEST_V(7)<1> uwAVS_RESPONSE(11,8)<8;4,1> - - // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> uwAVS_RESPONSE_2(%1,0)<8;4,1> - mov (8) uwDEST_Y(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1,8)<8;4,1> - } - - // Move 2st 8x8 words of U to dest GRF (Copy high byte in a word) - mov (8) uwDEST_U(0,8)<1> uwAVS_RESPONSE_2(4,0)<8;4,1> - mov (8) uwDEST_U(1,8)<1> uwAVS_RESPONSE_2(4,8)<8;4,1> - mov (8) uwDEST_U(2,8)<1> uwAVS_RESPONSE_2(5,0)<8;4,1> - mov (8) uwDEST_U(3,8)<1> uwAVS_RESPONSE_2(5,8)<8;4,1> - mov (8) uwDEST_U(4,8)<1> uwAVS_RESPONSE_2(8,0)<8;4,1> - mov (8) uwDEST_U(5,8)<1> uwAVS_RESPONSE_2(8,8)<8;4,1> - mov (8) uwDEST_U(6,8)<1> uwAVS_RESPONSE_2(9,0)<8;4,1> - mov (8) uwDEST_U(7,8)<1> uwAVS_RESPONSE_2(9,8)<8;4,1> - - // Move 2st 8x8 words of V to dest GRF - mov (8) uwDEST_V(0,8)<1> uwAVS_RESPONSE_2(6,0)<8;4,1> - mov (8) uwDEST_V(1,8)<1> uwAVS_RESPONSE_2(6,8)<8;4,1> - mov (8) uwDEST_V(2,8)<1> uwAVS_RESPONSE_2(7,0)<8;4,1> - mov (8) uwDEST_V(3,8)<1> uwAVS_RESPONSE_2(7,8)<8;4,1> - mov (8) uwDEST_V(4,8)<1> uwAVS_RESPONSE_2(10,0)<8;4,1> - mov (8) uwDEST_V(5,8)<1> uwAVS_RESPONSE_2(10,8)<8;4,1> - mov (8) uwDEST_V(6,8)<1> uwAVS_RESPONSE_2(11,0)<8;4,1> - mov (8) uwDEST_V(7,8)<1> uwAVS_RESPONSE_2(11,8)<8;4,1> -*/ -#else - // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 1st 8x8 words of U to dest GRF (Copy high byte in a word) - mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> - mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> - mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> - mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> - mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> - mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> - - // Move 1st 8x8 words of V to dest GRF - mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> - mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> - mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(7,1)<16;4,2> - mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> - mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> - mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> - mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> - mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> - - // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 2st 8x8 words of U to dest GRF (Copy high byte in a word) - mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> - mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> - mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> - mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> - mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> - mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> - mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> - mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> - - // Move 2st 8x8 words of V to dest GRF - mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> - mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> - mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> - mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> - mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> - mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> - mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> - mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> -#endif - - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,45 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL2_AVS_IEF_8x4.asm ---------- - - // Move first 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 8x4 words of U to dest GRF (Copy high byte in a word) - mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> - mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(5,1)<16;4,2> - mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(9,1)<16;4,2> - - // Move 8x4 words of V to dest GRF - mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> - mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(7,1)<16;4,2> - mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(10,1)<16;4,2> - mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(11,1)<16;4,2> - - // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word - } - -//------------------------------------------------------------------------------ - - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 4 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,53 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL2_AVS_IEF_8x8.asm ---------- - - // Move first 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 8x8 words of U to dest GRF (Copy high byte in a word) - mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> - mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> - mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;4,2> - mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> - mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> - mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> - - // Move 8x8 words of V to dest GRF - mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> - mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> - mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(7,1)<16;4,2> - mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> - mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(10,1)<16;4,2> - mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> - mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(11,1)<16;4,2> - mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> - - // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word - } - -//------------------------------------------------------------------------------ - - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL2_Scaling.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL2_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,71 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL2_Scaling.asm ---------- -#include "Scaling.inc" - - // Build 16 elements ramp in float32 and normalized it -// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v -// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f -mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector -mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector -add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f - -//Module: PrepareScaleCoord.asm - - // Setup for sampler msg hdr - mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields - mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset - - // Calculate 16 v based on the step Y and vertical origin - mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f - mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f - - // Calculate 16 u based on the step X and hori origin -// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly - mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } - mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } - - //Setup the constants for line instruction - mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } - mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } - -//------------------------------------------------------------------------------ - -$for (0; :ud // Copy msg header and payload mirrors to MRFs - send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_Y+nBI_CURRENT_SRC_Y - send (16) SCALE_RESPONSE_UW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_UV+nBI_CURRENT_SRC_UV - - // Calculate 16 v for next line - add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - - // Scale back to [0, 255], convert f to ud - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(0) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_UD(0)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(2) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_UD(2)<1> acc0:f { Compr } - - mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK - mov (16) DEST_U(%1)<1> SCALE_RESPONSE_UB(0) //possible error due to truncation - vK - mov (16) DEST_V(%1)<1> SCALE_RESPONSE_UB(2) //possible error due to truncation - vK - -} - - #define nSRC_REGION nREGION_1 - -//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,69 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL3_AVS_IEF_16x8.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 Y surface -// 2 sampler read for 8x8 U surface -// 2 sampler read for 8x8 V surface -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - // 1st 8x8 Y sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - - // 1st 8x8 U sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U - // Return U in 4 GRFs - - // 1st 8x8 V sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction to avoid back-2-back send instructions - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V - // Return V in 4 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - - // 2nd 8x8 Y sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - - // 2nd 8x8 U sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U - // Return U in 4 GRFs - - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! - - // 2nd 8x8 V sampling - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V - // Return V in 4 GRFs - -//------------------------------------------------------------------------------ -// Unpacking sampler reads to 4:4:4 internal planar -//------------------------------------------------------------------------------ - #include "PL3_AVS_IEF_Unpack_16x8.asm" - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,60 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL3_AVS_IEF_8x4.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 Y surface -// 1 sampler read for 8x8 U surface -// 1 sampler read for 8x8 V surface -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - // 1st 8x8 Y sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - - // 8x8 U sampling ; Only 8x4 will be used - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel - mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Calculate Step X for chroma - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U - // Return U in 4 GRFs - - // 8x8 V sampling ; Only 8x4 will be used - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V - // Return V in 4 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - - // 2nd 8x8 Y sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel - mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f // Restore Step X for luma - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(12)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - -//------------------------------------------------------------------------------ -// Unpacking sampler reads to 4:2:0 internal planar -//------------------------------------------------------------------------------ - #include "PL3_AVS_IEF_Unpack_8x4.asm" - - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,60 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL3_AVS_IEF_8x8.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 Y surface -// 1 sampler read for 8x8 U surface -// 1 sampler read for 8x8 V surface -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - // 1st 8x8 Y sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - - // 8x8 U sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel - mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Calculate Step X for chroma - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U - // Return U in 4 GRFs - - // 8x8 V sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! - mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V - // Return V in 4 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - - // 2nd 8x8 Y sampling - mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel - mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f // Restore Step X for luma - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(12)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y - // Return Y in 4 GRFs - -//------------------------------------------------------------------------------ -// Unpacking sampler reads to 4:2:2 internal planar -//------------------------------------------------------------------------------ - #include "PL3_AVS_IEF_Unpack_8x8.asm" - - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,240 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL3_AVS_IEF_Unpack_16x8.asm ---------- - -#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format -// Move first 8x8 words of Y to dest GRF (as packed) - mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(0,0)<4;4,1> - mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(0,8)<4;4,1> - mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(0,4)<4;4,1> - mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(0,12)<4;4,1> - mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(1,0)<4;4,1> - mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(1,8)<4;4,1> - mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(1,4)<4;4,1> - mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(1,12)<4;4,1> - mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> - mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> - mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> - mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> - mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> - mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> - mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> - mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> - -// Move first 8x8 words of U to dest GRF (as packed) - mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> - mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> - mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> - mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> - mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> - mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> - mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> - mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> - mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(6,0)<4;4,1> - mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(6,8)<4;4,1> - mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(6,4)<4;4,1> - mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(6,12)<4;4,1> - mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(7,0)<4;4,1> - mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(7,8)<4;4,1> - mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(7,4)<4;4,1> - mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(7,12)<4;4,1> - -// Move first 8x8 words of V to dest GRF (as packed) - mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(8,0)<4;4,1> - mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(8,8)<4;4,1> - mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(8,4)<4;4,1> - mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(8,12)<4;4,1> - mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(9,0)<4;4,1> - mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(9,8)<4;4,1> - mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(9,4)<4;4,1> - mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(9,12)<4;4,1> - mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(10,0)<4;4,1> - mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(10,8)<4;4,1> - mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(10,4)<4;4,1> - mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(10,12)<4;4,1> - mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(11,0)<4;4,1> - mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(11,8)<4;4,1> - mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(11,4)<4;4,1> - mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(11,12)<4;4,1> - -// Move first 8x8 words of A to dest GRF (as packed) - mov (4) uwDEST_Y(0,3)<4> 0:uw - mov (4) uwDEST_Y(1,3)<4> 0:uw - mov (4) uwDEST_Y(4,3)<4> 0:uw - mov (4) uwDEST_Y(5,3)<4> 0:uw - mov (4) uwDEST_Y(8,3)<4> 0:uw - mov (4) uwDEST_Y(9,3)<4> 0:uw - mov (4) uwDEST_Y(12,3)<4> 0:uw - mov (4) uwDEST_Y(13,3)<4> 0:uw - mov (4) uwDEST_Y(16,3)<4> 0:uw - mov (4) uwDEST_Y(17,3)<4> 0:uw - mov (4) uwDEST_Y(20,3)<4> 0:uw - mov (4) uwDEST_Y(21,3)<4> 0:uw - mov (4) uwDEST_Y(24,3)<4> 0:uw - mov (4) uwDEST_Y(25,3)<4> 0:uw - mov (4) uwDEST_Y(28,3)<4> 0:uw - mov (4) uwDEST_Y(29,3)<4> 0:uw - -// Move second 8x8 words of Y to dest GRF - mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> - mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> - mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> - mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> - mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> - mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> - mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> - mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> - mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> - mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> - mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> - mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> - mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> - mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> - mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> - mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> - -// Move second 8x8 words of U to dest GRF - mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> - mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> - mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> - mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> - mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> - mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> - mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> - mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> - mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> - mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> - mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> - mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> - mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> - mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> - mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> - mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> - -// Move second 8x8 words of V to dest GRF - mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> - mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> - mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> - mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> - mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> - mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> - mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> - mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> - mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> - mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> - mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> - mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> - mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> - mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> - mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> - mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> - -// Move second 8x8 words of A to dest GRF - mov (4) uwDEST_Y(2,3)<4> 0:uw - mov (4) uwDEST_Y(3,3)<4> 0:uw - mov (4) uwDEST_Y(6,3)<4> 0:uw - mov (4) uwDEST_Y(7,3)<4> 0:uw - mov (4) uwDEST_Y(10,3)<4> 0:uw - mov (4) uwDEST_Y(11,3)<4> 0:uw - mov (4) uwDEST_Y(14,3)<4> 0:uw - mov (4) uwDEST_Y(15,3)<4> 0:uw - mov (4) uwDEST_Y(18,3)<4> 0:uw - mov (4) uwDEST_Y(19,3)<4> 0:uw - mov (4) uwDEST_Y(22,3)<4> 0:uw - mov (4) uwDEST_Y(23,3)<4> 0:uw - mov (4) uwDEST_Y(26,3)<4> 0:uw - mov (4) uwDEST_Y(27,3)<4> 0:uw - mov (4) uwDEST_Y(30,3)<4> 0:uw - mov (4) uwDEST_Y(31,3)<4> 0:uw - -/* This section will be used if 16-bit output is needed in planar format -vK - // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> uwAVS_RESPONSE(%1)<8;4,1> - mov (8) uwDEST_Y(%1*2+1)<1> uwAVS_RESPONSE(%1,8)<8;4,1> - } - - // Move 8x8 words of U to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_U(%1*2)<1> uwAVS_RESPONSE(%1+4)<8;4,1> - mov (8) uwDEST_U(%1*2+1)<1> uwAVS_RESPONSE(%1+4,8)<8;4,1> - } - - // Move 8x8 words of V to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_V(%1*2)<1> uwAVS_RESPONSE(%1+8)<8;4,1> - mov (8) uwDEST_V(%1*2+1)<1> uwAVS_RESPONSE(%1+8,8)<8;4,1> - } - - // Move 2nd 8x8 words of Y to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> uwAVS_RESPONSE_2(%1)<8;4,1> - mov (8) uwDEST_Y(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1,8)<8;4,1> - } - - // Move 2nd 8x8 words of U to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_U(%1*2,8)<1> uwAVS_RESPONSE_2(%1+4)<8;4,1> - mov (8) uwDEST_U(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1+4,8)<8;4,1> - } - - // Move 2nd 8x8 words of V to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_V(%1*2,8)<1> uwAVS_RESPONSE_2(%1+8)<8;4,1> - mov (8) uwDEST_V(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1+8,8)<8;4,1> - } -*/ -#else /* OUTPUT_8_BIT */ - // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 8x8 words of U to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_U(%1*2)<1> ubAVS_RESPONSE(%1+4,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_U(%1*2+1)<1> ubAVS_RESPONSE(%1+4,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 8x8 words of V to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_V(%1*2)<1> ubAVS_RESPONSE(%1+8,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_V(%1*2+1)<1> ubAVS_RESPONSE(%1+8,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 2nd 8x8 words of U to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_U(%1*2,8)<1> ubAVS_RESPONSE_2(%1+4,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_U(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1+4,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 2nd 8x8 words of V to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_V(%1*2,8)<1> ubAVS_RESPONSE_2(%1+8,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_V(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1+8,8+1)<16;4,2> // Copy high byte in a word - } -#endif -//------------------------------------------------------------------------------ - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,45 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL3_AVS_IEF_Unpack_8x4.asm ---------- - - // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 8x4 words of U to dest GRF (Copy high byte in a word) - mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> - mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,9)<16;4,2> - mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;4,2> - mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,9)<16;4,2> - - // Move 8x4 words of V to dest GRF - mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(8,9)<16;4,2> - mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(9,9)<16;4,2> - - // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE(%1+12,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE(%1+12,8+1)<16;4,2> // Copy high byte in a word - } - -//------------------------------------------------------------------------------ - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 4 - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,44 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL3_AVS_IEF_Unpack_8x8.asm ---------- - - // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word - } - // Move 8x8 words of U to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_U(%1)<1> ubAVS_RESPONSE(%1+4,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_U(%1,8)<1> ubAVS_RESPONSE(%1+4,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 8x8 words of V to dest GRF - $for(0; <8/2; 1) { - mov (8) uwDEST_V(%1)<1> ubAVS_RESPONSE(%1+8,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_V(%1,8)<1> ubAVS_RESPONSE(%1+8,8+1)<16;4,2> // Copy high byte in a word - } - - // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. - $for(0; <8/2; 1) { - mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE(%1+12,1)<16;4,2> // Copy high byte in a word - mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE(%1+12,8+1)<16;4,2> // Copy high byte in a word - } - -//------------------------------------------------------------------------------ - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL3_Scaling.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL3_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,72 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- PL3_Scaling.asm ---------- -#include "Scaling.inc" - - // Build 16 elements ramp in float32 and normalized it -// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v -// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f -mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf { NoDDClr }//3, 2, 1, 0 in float vector -mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf { NoDDChk }//7, 6, 5, 4 in float vector -add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f - - -//Module: PrepareScaleCoord.asm - - // Setup for sampler msg hdr - mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields - mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset - - // Calculate 16 v based on the step Y and vertical origin - mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f - mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f - - // Calculate 16 u based on the step X and hori origin -// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly - mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } - mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } - - //Setup the constants for line instruction - mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } - mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } - -//------------------------------------------------------------------------------ - -$for (0; :ud rMSGSRC<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (16) SCALE_RESPONSE_VW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_V+nBI_CURRENT_SRC_V - send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_Y+nBI_CURRENT_SRC_Y - send (16) SCALE_RESPONSE_UW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_U+nBI_CURRENT_SRC_U - - // Calculate 16 v for next line - add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - - // Scale back to [0, 255], convert f to ud - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_VF(0) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_VD(0)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(0) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_UD(0)<1> acc0:f { Compr } - - mov (16) DEST_V(%1)<1> SCALE_RESPONSE_VB(0) //possible error due to truncation - vK - mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK - mov (16) DEST_U(%1)<1> SCALE_RESPONSE_UB(0) //possible error due to truncation - vK - -} - - #define nSRC_REGION nREGION_1 - -//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DN_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DN_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DN_ALG.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DN_ALG.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,35 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_DISABLE - -#include "DNDI.inc" - -#undef nY_NUM_OF_ROWS -#define nY_NUM_OF_ROWS 8 // Number of Y rows per block - -#undef nSMPL_RESP_LEN -#define nSMPL_RESP_LEN nSMPL_RESP_LEN_DN_PL // Set the Number of GRFs in DNDI response -#undef nDPW_BLOCK_SIZE_DN -#define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // DN Curr Block Size for Write is 16x8 -#undef nDPW_BLOCK_SIZE_HIST -#define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_2 // HIST Block Size for Write is 4x2 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// -#include "DNDI_COMMAND.asm" - -////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// -$for (0; ubRESP(nNODI_LUMA_OFFSET,%1*16)<16;16,1> // copy line of Y -} - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// -#include "DNDI_Hist_Save.asm" - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,85 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_ENABLE - - #include "DNDI.inc" - - #ifdef DI_ONLY - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DI // set the number of GRF - #else - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF - #endif - - #undef nDPW_BLOCK_SIZE_HIST - #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 - #undef nDPW_BLOCK_SIZE_DN - #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// - #include "DNDI_Command.asm" - -////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// - -////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// - // Write STMM to memory - shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR_NODDCHK // X origin / 2 - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud NODDCHK // block width and height (8x4) - mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header - mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF - send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud - -#ifdef DI_ONLY -#else - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// - #include "DI_Hist_Save.asm" - -////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// - - //set the save DN parameters - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w NODDCLR // X origin and Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud NODDCLR_NODDCHK // block width and height (16x4) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - - // check top/bottom field first - cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w - (f0.0) jmpi (1) TOP_FIELD_FIRST - -BOTTOM_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) - } - $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) - } - - jmpi (1) SAVE_DN_CURR - -TOP_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) - } - $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) - } - -SAVE_DN_CURR: - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud -#endif - -// Save Processed frames -#include "DI_Save_PA.asm" - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,103 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_ENABLE - - #include "DNDI.inc" - - #undef nY_NUM_OF_ROWS - #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) - #undef nUV_NUM_OF_ROWS - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF - #undef nDPW_BLOCK_SIZE_HIST - #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 - #undef nDPW_BLOCK_SIZE_DN - #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 - #undef nDPR_BLOCK_SIZE_UV - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // DN Block Size for UV Write/Read is 8x4 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// - #include "DNDI_Command.asm" - -////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// - // move the previous frame Y component to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) - } - // move the previous frame U,V components to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - // move the current frame Y component to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) - } - // move the current frame U,V components to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - -////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// - // Write STMM to memory - shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) - mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header - mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF - send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// - #include "DI_Hist_Save.asm" - -////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// - add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w - // check top/bottom field first - cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w - (f0.0) jmpi (1) TOP_FIELD_FIRST - -BOTTOM_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) - } - jmpi (1) SAVE_DN_CURR - -TOP_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) - } -SAVE_DN_CURR: - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud - - -/////////////////////////////P208 UV Copy 422///////////////////////////////////////////////////// - //Read UV through DATAPORT - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin - asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x2) - mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud - send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_UV:ud - - //Write UV through DATAPORT - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (16x2) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_UV:ud \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,103 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_ENABLE - - #include "DNDI.inc" - - #undef nY_NUM_OF_ROWS - #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) - #undef nUV_NUM_OF_ROWS - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF - #undef nDPW_BLOCK_SIZE_HIST - #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 - #undef nDPW_BLOCK_SIZE_DN - #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 - #undef nDPR_BLOCK_SIZE_UV - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_2 // DN Block Size for UV Write/Read is 16x2 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// - #include "DNDI_COMMAND.asm" - -////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// - // move the previous frame Y component to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) - } - // move the previous frame U,V components to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - // move the current frame Y component to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) - } - // move the current frame U,V components to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - -////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// - // Write STMM to memory - shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) - mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header - mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF - send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// - #include "DI_Hist_Save.asm" - -////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// - add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w - // check top/bottom field first - cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w - (f0.0) jmpi (1) TOP_FIELD_FIRST - -BOTTOM_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) - } - jmpi (1) SAVE_DN_CURR - -TOP_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) - } -SAVE_DN_CURR: - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud - - -/////////////////////////////NV12 UV Copy 422///////////////////////////////////////////////////// - //Read UV through DATAPORT - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin - asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x2) - mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud - send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_UV:ud - - //Write UV through DATAPORT - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (16x2) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_UV:ud \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,101 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_ENABLE - - #include "DNDI.inc" - - #undef nY_NUM_OF_ROWS - #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) - #undef nUV_NUM_OF_ROWS - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF - #undef nDPW_BLOCK_SIZE_HIST - #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 - #undef nDPW_BLOCK_SIZE_DN - #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// - #include "DNDI_Command.asm" - -////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// - // move the previous frame Y component to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) - } - // move the previous frame U,V components to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - // move the current frame Y component to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) - } - // move the current frame U,V components to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - -////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// - // Write STMM to memory - shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) - mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header - mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF - send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// - #include "DI_Hist_Save.asm" - -////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// - add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w - // check top/bottom field first - cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w - (f0.0) jmpi (1) TOP_FIELD_FIRST - -BOTTOM_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) - } - jmpi (1) SAVE_DN_CURR - -TOP_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) - } -SAVE_DN_CURR: - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud - - -/////////////////////////////P208 UV Copy 422///////////////////////////////////////////////////// - //Read UV through DATAPORT - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // Y Block width and height (16x4) (U/V block size is the same) - mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud - send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_2+nBI_CURRENT_SRC_UV:ud - - //Write UV through DATAPORT - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> - mov (8) mudMSGHDR_DN(2)<1> udBOT_U_IO(1)<8;8,1> - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_UV:ud - \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,106 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -#define DI_ENABLE - - #include "DNDI.inc" - - #undef nY_NUM_OF_ROWS - #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) - #undef nUV_NUM_OF_ROWS - #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block - - #undef nSMPL_RESP_LEN - #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF - #undef nDPW_BLOCK_SIZE_HIST - #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 - #undef nDPW_BLOCK_SIZE_DN - #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 - #undef nDPR_BLOCK_SIZE_UV - #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_2 // DN Block Size for UV Write/Read is 8x2 - -////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// - #include "DNDI_Command.asm" - -////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// - // move the previous frame Y component to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) - } - // move the previous frame U,V components to internal planar format - $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - // move the current frame Y component to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) - } - // move the current frame U,V components to internal planar format - $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels - mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels - } - -////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// - // Write STMM to memory - shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 - mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) - mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header - mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF - send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud - -////////////////////////////////////// Save the History Data for Next Run ///////////////////////// - #include "DI_Hist_Save.asm" - -////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// - add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w - // check top/bottom field first - cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w - (f0.0) jmpi (1) TOP_FIELD_FIRST - -BOTTOM_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) - } - jmpi (1) SAVE_DN_CURR - -TOP_FIELD_FIRST: - $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) - mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) - } -SAVE_DN_CURR: - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud - - -/////////////////////////////IMC3 UV Copy 422///////////////////////////////////////////////////// - //Read UV through DATAPORT - add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin - asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x2) - mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud - send (4) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_U:ud - send (4) udBOT_V_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_V:ud - - //Write UV through DATAPORT - mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin - asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's - mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (8x2) - mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud - mov (4) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<4;4,1> - send (4) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_U:ud - mov (4) mudMSGHDR_DN(1)<1> udBOT_V_IO(0)<4;4,1> - send (4) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_V:ud \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,33 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- RGB_AVS_IEF_16x8.asm ---------- - -#include "AVS_IEF.inc" - -//------------------------------------------------------------------------------ -// 2 sampler reads for 8x8 ARGB packed -//------------------------------------------------------------------------------ - - // 1st 8x8 setup - #include "AVS_SetupFirstBlock.asm" - - mov (1) rAVS_8x8_HDR.2:ud nAVS_ALL_CHANNELS:ud // Enable ARGB channels - mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_4CH+nSI_SRC_RGB+nBI_CURRENT_SRC_YUV - // Return ARGB in 16 GRFs - - // 2nd 8x8 setup - #include "AVS_SetupSecondBlock.asm" - mov (16) mAVS_8x8_HDR_2.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs - send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR_2 udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_4CH+nSI_SRC_RGB+nBI_CURRENT_SRC_YUV - // Return ARGB in 16 GRFs - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,251 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- RGB_AVS_IEF_Unpack_16x8.asm ---------- -#include "AVS_IEF.inc" - -#ifdef AVS_OUTPUT_16_BIT -// Move first 8x8 words of B to dest GRF (as packed) - mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(4,0)<4;4,1> - mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(4,8)<4;4,1> - mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(4,4)<4;4,1> - mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(4,12)<4;4,1> - mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(5,0)<4;4,1> - mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(5,8)<4;4,1> - mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(5,4)<4;4,1> - mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(5,12)<4;4,1> - mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(12,0)<4;4,1> - mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(12,8)<4;4,1> - mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(12,4)<4;4,1> - mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(12,12)<4;4,1> - mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(13,0)<4;4,1> - mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(13,8)<4;4,1> - mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(13,4)<4;4,1> - mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(13,12)<4;4,1> - -// Move first 8x8 words of G to dest GRF (as packed) - mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> - mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> - mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> - mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> - mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> - mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> - mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> - mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> - mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(10,0)<4;4,1> - mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(10,8)<4;4,1> - mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(10,4)<4;4,1> - mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(10,12)<4;4,1> - mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(11,0)<4;4,1> - mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(11,8)<4;4,1> - mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(11,4)<4;4,1> - mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(11,12)<4;4,1> - -// Move first 8x8 words of R to dest GRF (as packed) - mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(0,0)<4;4,1> - mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(0,8)<4;4,1> - mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(0,4)<4;4,1> - mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(0,12)<4;4,1> - mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(1,0)<4;4,1> - mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(1,8)<4;4,1> - mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(1,4)<4;4,1> - mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(1,12)<4;4,1> - mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> - mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> - mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> - mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> - mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> - mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> - mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> - mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> - -// Move first 8x8 words of A to dest GRF (as packed) - mov (4) uwDEST_Y(0,3)<4> uwAVS_RESPONSE(6,0)<4;4,1> - mov (4) uwDEST_Y(1,3)<4> uwAVS_RESPONSE(6,8)<4;4,1> - mov (4) uwDEST_Y(4,3)<4> uwAVS_RESPONSE(6,4)<4;4,1> - mov (4) uwDEST_Y(5,3)<4> uwAVS_RESPONSE(6,12)<4;4,1> - mov (4) uwDEST_Y(8,3)<4> uwAVS_RESPONSE(7,0)<4;4,1> - mov (4) uwDEST_Y(9,3)<4> uwAVS_RESPONSE(7,8)<4;4,1> - mov (4) uwDEST_Y(12,3)<4> uwAVS_RESPONSE(7,4)<4;4,1> - mov (4) uwDEST_Y(13,3)<4> uwAVS_RESPONSE(7,12)<4;4,1> - mov (4) uwDEST_Y(16,3)<4> uwAVS_RESPONSE(14,0)<4;4,1> - mov (4) uwDEST_Y(17,3)<4> uwAVS_RESPONSE(14,8)<4;4,1> - mov (4) uwDEST_Y(20,3)<4> uwAVS_RESPONSE(14,4)<4;4,1> - mov (4) uwDEST_Y(21,3)<4> uwAVS_RESPONSE(14,12)<4;4,1> - mov (4) uwDEST_Y(24,3)<4> uwAVS_RESPONSE(15,0)<4;4,1> - mov (4) uwDEST_Y(25,3)<4> uwAVS_RESPONSE(15,8)<4;4,1> - mov (4) uwDEST_Y(28,3)<4> uwAVS_RESPONSE(15,4)<4;4,1> - mov (4) uwDEST_Y(29,3)<4> uwAVS_RESPONSE(15,12)<4;4,1> - -// Move second 8x8 words of B to dest GRF - mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> - mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> - mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> - mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> - mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> - mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> - mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> - mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> - mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(12,0)<4;4,1> - mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(12,8)<4;4,1> - mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(12,4)<4;4,1> - mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(12,12)<4;4,1> - mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(13,0)<4;4,1> - mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(13,8)<4;4,1> - mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(13,4)<4;4,1> - mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(13,12)<4;4,1> - -// Move second 8x8 words of G to dest GRF - mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> - mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> - mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> - mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> - mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> - mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> - mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> - mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> - mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> - mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> - mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> - mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> - mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> - mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> - mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> - mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> - -// Move second 8x8 words of R to dest GRF - mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> - mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> - mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> - mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> - mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> - mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> - mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> - mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> - mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> - mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> - mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> - mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> - mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> - mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> - mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> - mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> - -// Move second 8x8 words of A to dest GRF - mov (4) uwDEST_Y(2,3)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> - mov (4) uwDEST_Y(3,3)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> - mov (4) uwDEST_Y(6,3)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> - mov (4) uwDEST_Y(7,3)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> - mov (4) uwDEST_Y(10,3)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> - mov (4) uwDEST_Y(11,3)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> - mov (4) uwDEST_Y(14,3)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> - mov (4) uwDEST_Y(15,3)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> - mov (4) uwDEST_Y(18,3)<4> uwAVS_RESPONSE_2(14,0)<4;4,1> - mov (4) uwDEST_Y(19,3)<4> uwAVS_RESPONSE_2(14,8)<4;4,1> - mov (4) uwDEST_Y(22,3)<4> uwAVS_RESPONSE_2(14,4)<4;4,1> - mov (4) uwDEST_Y(23,3)<4> uwAVS_RESPONSE_2(14,12)<4;4,1> - mov (4) uwDEST_Y(26,3)<4> uwAVS_RESPONSE_2(15,0)<4;4,1> - mov (4) uwDEST_Y(27,3)<4> uwAVS_RESPONSE_2(15,8)<4;4,1> - mov (4) uwDEST_Y(30,3)<4> uwAVS_RESPONSE_2(15,4)<4;4,1> - mov (4) uwDEST_Y(31,3)<4> uwAVS_RESPONSE_2(15,12)<4;4,1> - -#else /* OUTPUT_8_BIT */ -// Move first 8x8 words of B to dest GRF - mov (8) ubDEST_Y(0,2)<4> ubAVS_RESPONSE(4,1)<16;4,2> - mov (8) ubDEST_Y(2,2)<4> ubAVS_RESPONSE(4,8+1)<16;4,2> - mov (8) ubDEST_Y(4,2)<4> ubAVS_RESPONSE(5,1)<16;4,2> - mov (8) ubDEST_Y(6,2)<4> ubAVS_RESPONSE(5,8+1)<16;4,2> - mov (8) ubDEST_Y(8,2)<4> ubAVS_RESPONSE(12,1)<16;4,2> - mov (8) ubDEST_Y(10,2)<4> ubAVS_RESPONSE(12,8+1)<16;4,2> - mov (8) ubDEST_Y(12,2)<4> ubAVS_RESPONSE(13,1)<16;4,2> - mov (8) ubDEST_Y(14,2)<4> ubAVS_RESPONSE(13,8+1)<16;4,2> - -// Move first 8x8 words of G to dest GRF - mov (8) ubDEST_Y(0,1)<4> ubAVS_RESPONSE(2,1)<16;4,2> - mov (8) ubDEST_Y(2,1)<4> ubAVS_RESPONSE(2,8+1)<16;4,2> - mov (8) ubDEST_Y(4,1)<4> ubAVS_RESPONSE(3,1)<16;4,2> - mov (8) ubDEST_Y(6,1)<4> ubAVS_RESPONSE(3,8+1)<16;4,2> - mov (8) ubDEST_Y(8,1)<4> ubAVS_RESPONSE(10,1)<16;4,2> - mov (8) ubDEST_Y(10,1)<4> ubAVS_RESPONSE(10,8+1)<16;4,2> - mov (8) ubDEST_Y(12,1)<4> ubAVS_RESPONSE(11,1)<16;4,2> - mov (8) ubDEST_Y(14,1)<4> ubAVS_RESPONSE(11,8+1)<16;4,2> - -// Move first 8x8 words of R to dest GRF - mov (8) ubDEST_Y(0,0)<4> ubAVS_RESPONSE(0,1)<16;4,2> - mov (8) ubDEST_Y(2,0)<4> ubAVS_RESPONSE(0,8+1)<16;4,2> - mov (8) ubDEST_Y(4,0)<4> ubAVS_RESPONSE(1,1)<16;4,2> - mov (8) ubDEST_Y(6,0)<4> ubAVS_RESPONSE(1,8+1)<16;4,2> - mov (8) ubDEST_Y(8,0)<4> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) ubDEST_Y(10,0)<4> ubAVS_RESPONSE(8,8+1)<16;4,2> - mov (8) ubDEST_Y(12,0)<4> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) ubDEST_Y(14,0)<4> ubAVS_RESPONSE(9,8+1)<16;4,2> - -// Move first 8x8 words of A to dest GRF - mov (8) ubDEST_Y(0,3)<4> ubAVS_RESPONSE(6,1)<16;4,2> - mov (8) ubDEST_Y(2,3)<4> ubAVS_RESPONSE(6,8+1)<16;4,2> - mov (8) ubDEST_Y(4,3)<4> ubAVS_RESPONSE(7,1)<16;4,2> - mov (8) ubDEST_Y(6,3)<4> ubAVS_RESPONSE(7,8+1)<16;4,2> - mov (8) ubDEST_Y(8,3)<4> ubAVS_RESPONSE(14,1)<16;4,2> - mov (8) ubDEST_Y(10,3)<4> ubAVS_RESPONSE(14,8+1)<16;4,2> - mov (8) ubDEST_Y(12,3)<4> ubAVS_RESPONSE(15,1)<16;4,2> - mov (8) ubDEST_Y(14,3)<4> ubAVS_RESPONSE(15,8+1)<16;4,2> - -// Move second 8x8 words of B to dest GRF - mov (8) ubDEST_Y(1,2)<4> ubAVS_RESPONSE_2(4,1)<16;4,2> - mov (8) ubDEST_Y(3,2)<4> ubAVS_RESPONSE_2(4,8+1)<16;4,2> - mov (8) ubDEST_Y(5,2)<4> ubAVS_RESPONSE_2(5,1)<16;4,2> - mov (8) ubDEST_Y(7,2)<4> ubAVS_RESPONSE_2(5,8+1)<16;4,2> - mov (8) ubDEST_Y(9,2)<4> ubAVS_RESPONSE_2(12,1)<16;4,2> - mov (8) ubDEST_Y(11,2)<4> ubAVS_RESPONSE_2(12,8+1)<16;4,2> - mov (8) ubDEST_Y(13,2)<4> ubAVS_RESPONSE_2(13,1)<16;4,2> - mov (8) ubDEST_Y(15,2)<4> ubAVS_RESPONSE_2(13,8+1)<16;4,2> - -// Move second 8x8 words of G to dest GRF - mov (8) ubDEST_Y(1,1)<4> ubAVS_RESPONSE_2(2,1)<16;4,2> - mov (8) ubDEST_Y(3,1)<4> ubAVS_RESPONSE_2(2,8+1)<16;4,2> - mov (8) ubDEST_Y(5,1)<4> ubAVS_RESPONSE_2(3,1)<16;4,2> - mov (8) ubDEST_Y(7,1)<4> ubAVS_RESPONSE_2(3,8+1)<16;4,2> - mov (8) ubDEST_Y(9,1)<4> ubAVS_RESPONSE_2(10,1)<16;4,2> - mov (8) ubDEST_Y(11,1)<4> ubAVS_RESPONSE_2(10,8+1)<16;4,2> - mov (8) ubDEST_Y(13,1)<4> ubAVS_RESPONSE_2(11,1)<16;4,2> - mov (8) ubDEST_Y(15,1)<4> ubAVS_RESPONSE_2(11,8+1)<16;4,2> - -// Move second 8x8 words of R to dest GRF - mov (8) ubDEST_Y(1,0)<4> ubAVS_RESPONSE_2(0,1)<16;4,2> - mov (8) ubDEST_Y(3,0)<4> ubAVS_RESPONSE_2(0,8+1)<16;4,2> - mov (8) ubDEST_Y(5,0)<4> ubAVS_RESPONSE_2(1,1)<16;4,2> - mov (8) ubDEST_Y(7,0)<4> ubAVS_RESPONSE_2(1,8+1)<16;4,2> - mov (8) ubDEST_Y(9,0)<4> ubAVS_RESPONSE_2(8,1)<16;4,2> - mov (8) ubDEST_Y(11,0)<4> ubAVS_RESPONSE_2(8,8+1)<16;4,2> - mov (8) ubDEST_Y(13,0)<4> ubAVS_RESPONSE_2(9,1)<16;4,2> - mov (8) ubDEST_Y(15,0)<4> ubAVS_RESPONSE_2(9,8+1)<16;4,2> - -// Move second 8x8 words of A to dest GRF - mov (8) ubDEST_Y(1,3)<4> ubAVS_RESPONSE_2(6,1)<16;4,2> - mov (8) ubDEST_Y(3,3)<4> ubAVS_RESPONSE_2(6,8+1)<16;4,2> - mov (8) ubDEST_Y(5,3)<4> ubAVS_RESPONSE_2(7,1)<16;4,2> - mov (8) ubDEST_Y(7,3)<4> ubAVS_RESPONSE_2(7,8+1)<16;4,2> - mov (8) ubDEST_Y(9,3)<4> ubAVS_RESPONSE_2(14,1)<16;4,2> - mov (8) ubDEST_Y(11,3)<4> ubAVS_RESPONSE_2(14,8+1)<16;4,2> - mov (8) ubDEST_Y(13,3)<4> ubAVS_RESPONSE_2(15,1)<16;4,2> - mov (8) ubDEST_Y(15,3)<4> ubAVS_RESPONSE_2(15,8+1)<16;4,2> -#endif -//------------------------------------------------------------------------------ - - // Set to write bottom region to memory - #define SRC_REGION REGION_2 - - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,260 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- RGB_AVS_IEF_Unpack_16x8.asm ---------- -#include "AVS_IEF.inc" - -.declare DEST_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare DEST_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare DEST_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare DEST_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw - - -#ifdef AVS_OUTPUT_16_BIT -//This portion will need to be changed if unpacking is required for Y416 kernels (in case of blending etc) - vK - -//// Move first 8x8 words of B to dest GRF (as packed) -// mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(4,0)<4;4,1> -// mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(4,8)<4;4,1> -// mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(4,4)<4;4,1> -// mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(4,12)<4;4,1> -// mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(5,0)<4;4,1> -// mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(5,8)<4;4,1> -// mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(5,4)<4;4,1> -// mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(5,12)<4;4,1> -// mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(12,0)<4;4,1> -// mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(12,8)<4;4,1> -// mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(12,4)<4;4,1> -// mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(12,12)<4;4,1> -// mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(13,0)<4;4,1> -// mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(13,8)<4;4,1> -// mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(13,4)<4;4,1> -// mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(13,12)<4;4,1> -// -//// Move first 8x8 words of G to dest GRF (as packed) -// mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> -// mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> -// mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> -// mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> -// mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> -// mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> -// mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> -// mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> -// mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(10,0)<4;4,1> -// mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(10,8)<4;4,1> -// mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(10,4)<4;4,1> -// mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(10,12)<4;4,1> -// mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(11,0)<4;4,1> -// mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(11,8)<4;4,1> -// mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(11,4)<4;4,1> -// mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(11,12)<4;4,1> -// -//// Move first 8x8 words of R to dest GRF (as packed) -// mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(0,0)<4;4,1> -// mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(0,8)<4;4,1> -// mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(0,4)<4;4,1> -// mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(0,12)<4;4,1> -// mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(1,0)<4;4,1> -// mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(1,8)<4;4,1> -// mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(1,4)<4;4,1> -// mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(1,12)<4;4,1> -// mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> -// mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> -// mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> -// mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> -// mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> -// mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> -// mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> -// mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> -// -//// Move first 8x8 words of A to dest GRF (as packed) -// mov (4) uwDEST_Y(0,3)<4> uwAVS_RESPONSE(6,0)<4;4,1> -// mov (4) uwDEST_Y(1,3)<4> uwAVS_RESPONSE(6,8)<4;4,1> -// mov (4) uwDEST_Y(4,3)<4> uwAVS_RESPONSE(6,4)<4;4,1> -// mov (4) uwDEST_Y(5,3)<4> uwAVS_RESPONSE(6,12)<4;4,1> -// mov (4) uwDEST_Y(8,3)<4> uwAVS_RESPONSE(7,0)<4;4,1> -// mov (4) uwDEST_Y(9,3)<4> uwAVS_RESPONSE(7,8)<4;4,1> -// mov (4) uwDEST_Y(12,3)<4> uwAVS_RESPONSE(7,4)<4;4,1> -// mov (4) uwDEST_Y(13,3)<4> uwAVS_RESPONSE(7,12)<4;4,1> -// mov (4) uwDEST_Y(16,3)<4> uwAVS_RESPONSE(14,0)<4;4,1> -// mov (4) uwDEST_Y(17,3)<4> uwAVS_RESPONSE(14,8)<4;4,1> -// mov (4) uwDEST_Y(20,3)<4> uwAVS_RESPONSE(14,4)<4;4,1> -// mov (4) uwDEST_Y(21,3)<4> uwAVS_RESPONSE(14,12)<4;4,1> -// mov (4) uwDEST_Y(24,3)<4> uwAVS_RESPONSE(15,0)<4;4,1> -// mov (4) uwDEST_Y(25,3)<4> uwAVS_RESPONSE(15,8)<4;4,1> -// mov (4) uwDEST_Y(28,3)<4> uwAVS_RESPONSE(15,4)<4;4,1> -// mov (4) uwDEST_Y(29,3)<4> uwAVS_RESPONSE(15,12)<4;4,1> -// -//// Move second 8x8 words of B to dest GRF -// mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> -// mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> -// mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> -// mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> -// mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> -// mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> -// mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> -// mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> -// mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(12,0)<4;4,1> -// mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(12,8)<4;4,1> -// mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(12,4)<4;4,1> -// mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(12,12)<4;4,1> -// mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(13,0)<4;4,1> -// mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(13,8)<4;4,1> -// mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(13,4)<4;4,1> -// mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(13,12)<4;4,1> -// -//// Move second 8x8 words of G to dest GRF -// mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> -// mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> -// mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> -// mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> -// mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> -// mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> -// mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> -// mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> -// mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> -// mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> -// mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> -// mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> -// mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> -// mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> -// mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> -// mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> -// -//// Move second 8x8 words of R to dest GRF -// mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> -// mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> -// mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> -// mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> -// mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> -// mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> -// mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> -// mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> -// mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> -// mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> -// mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> -// mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> -// mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> -// mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> -// mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> -// mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> -// -//// Move second 8x8 words of A to dest GRF -// mov (4) uwDEST_Y(2,3)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> -// mov (4) uwDEST_Y(3,3)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> -// mov (4) uwDEST_Y(6,3)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> -// mov (4) uwDEST_Y(7,3)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> -// mov (4) uwDEST_Y(10,3)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> -// mov (4) uwDEST_Y(11,3)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> -// mov (4) uwDEST_Y(14,3)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> -// mov (4) uwDEST_Y(15,3)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> -// mov (4) uwDEST_Y(18,3)<4> uwAVS_RESPONSE_2(14,0)<4;4,1> -// mov (4) uwDEST_Y(19,3)<4> uwAVS_RESPONSE_2(14,8)<4;4,1> -// mov (4) uwDEST_Y(22,3)<4> uwAVS_RESPONSE_2(14,4)<4;4,1> -// mov (4) uwDEST_Y(23,3)<4> uwAVS_RESPONSE_2(14,12)<4;4,1> -// mov (4) uwDEST_Y(26,3)<4> uwAVS_RESPONSE_2(15,0)<4;4,1> -// mov (4) uwDEST_Y(27,3)<4> uwAVS_RESPONSE_2(15,8)<4;4,1> -// mov (4) uwDEST_Y(30,3)<4> uwAVS_RESPONSE_2(15,4)<4;4,1> -// mov (4) uwDEST_Y(31,3)<4> uwAVS_RESPONSE_2(15,12)<4;4,1> - -#else /* OUTPUT_8_BIT */ - -// Move first 8x8 words of B to dest GRF - mov (8) DEST_B(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> - mov (8) DEST_B(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> - mov (8) DEST_B(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> - mov (8) DEST_B(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> - mov (8) DEST_B(4)<1> ubAVS_RESPONSE(12,1)<16;4,2> - mov (8) DEST_B(5)<1> ubAVS_RESPONSE(12,8+1)<16;4,2> - mov (8) DEST_B(6)<1> ubAVS_RESPONSE(13,1)<16;4,2> - mov (8) DEST_B(7)<1> ubAVS_RESPONSE(13,8+1)<16;4,2> - -// Move first 8x8 words of G to dest GRF - mov (8) DEST_G(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> - mov (8) DEST_G(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> - mov (8) DEST_G(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> - mov (8) DEST_G(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> - mov (8) DEST_G(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> - mov (8) DEST_G(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> - mov (8) DEST_G(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> - mov (8) DEST_G(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> - -// Move first 8x8 words of R to dest GRF - mov (8) DEST_R(0)<1> ubAVS_RESPONSE(0,1)<16;4,2> - mov (8) DEST_R(1)<1> ubAVS_RESPONSE(0,8+1)<16;4,2> - mov (8) DEST_R(2)<1> ubAVS_RESPONSE(1,1)<16;4,2> - mov (8) DEST_R(3)<1> ubAVS_RESPONSE(1,8+1)<16;4,2> - mov (8) DEST_R(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> - mov (8) DEST_R(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> - mov (8) DEST_R(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> - mov (8) DEST_R(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> - -// Move first 8x8 words of A to dest GRF - mov (8) DEST_A(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> - mov (8) DEST_A(1)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> - mov (8) DEST_A(2)<1> ubAVS_RESPONSE(7,1)<16;4,2> - mov (8) DEST_A(3)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> - mov (8) DEST_A(4)<1> ubAVS_RESPONSE(14,1)<16;4,2> - mov (8) DEST_A(5)<1> ubAVS_RESPONSE(14,8+1)<16;4,2> - mov (8) DEST_A(6)<1> ubAVS_RESPONSE(15,1)<16;4,2> - mov (8) DEST_A(7)<1> ubAVS_RESPONSE(15,8+1)<16;4,2> - -// Move second 8x8 words of B to dest GRF - mov (8) DEST_B(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> - mov (8) DEST_B(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> - mov (8) DEST_B(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> - mov (8) DEST_B(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> - mov (8) DEST_B(4,8)<1> ubAVS_RESPONSE_2(12,1)<16;4,2> - mov (8) DEST_B(5,8)<1> ubAVS_RESPONSE_2(12,8+1)<16;4,2> - mov (8) DEST_B(6,8)<1> ubAVS_RESPONSE_2(13,1)<16;4,2> - mov (8) DEST_B(7,8)<1> ubAVS_RESPONSE_2(13,8+1)<16;4,2> - -// Move second 8x8 words of G to dest GRF - mov (8) DEST_G(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> - mov (8) DEST_G(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> - mov (8) DEST_G(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> - mov (8) DEST_G(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> - mov (8) DEST_G(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> - mov (8) DEST_G(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> - mov (8) DEST_G(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> - mov (8) DEST_G(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> - -// Move second 8x8 words of R to dest GRF - mov (8) DEST_R(0,8)<1> ubAVS_RESPONSE_2(0,1)<16;4,2> - mov (8) DEST_R(1,8)<1> ubAVS_RESPONSE_2(0,8+1)<16;4,2> - mov (8) DEST_R(2,8)<1> ubAVS_RESPONSE_2(1,1)<16;4,2> - mov (8) DEST_R(3,8)<1> ubAVS_RESPONSE_2(1,8+1)<16;4,2> - mov (8) DEST_R(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> - mov (8) DEST_R(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> - mov (8) DEST_R(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> - mov (8) DEST_R(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> - -// Move second 8x8 words of A to dest GRF - mov (8) DEST_A(0,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> - mov (8) DEST_A(1,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> - mov (8) DEST_A(2,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> - mov (8) DEST_A(3,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> - mov (8) DEST_A(4,8)<1> ubAVS_RESPONSE_2(14,1)<16;4,2> - mov (8) DEST_A(5,8)<1> ubAVS_RESPONSE_2(14,8+1)<16;4,2> - mov (8) DEST_A(6,8)<1> ubAVS_RESPONSE_2(15,1)<16;4,2> - mov (8) DEST_A(7,8)<1> ubAVS_RESPONSE_2(15,8+1)<16;4,2> -#endif -//------------------------------------------------------------------------------ - - // Set to write bottom region to memory - #define SRC_REGION REGION_1 - - // Re-define new # of lines - #undef nUV_NUM_OF_ROWS - #undef nY_NUM_OF_ROWS - - #define nY_NUM_OF_ROWS 8 - #define nUV_NUM_OF_ROWS 8 - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/RGB_Scaling.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/RGB_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,72 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -//---------- RGB_Scaling.asm ---------- -#include "Scaling.inc" - - // Build 16 elements ramp in float32 and normalized it -// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v -// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f -mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector -mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector -add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f - -//Module: PrepareScaleCoord.asm - - // Setup for sampler msg hdr - mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields - mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset - - // Calculate 16 v based on the step Y and vertical origin - mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f - mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f - - // Calculate 16 u based on the step X and hori origin -// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly - mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } - mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } - - //Setup the constants for line instruction - mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } - mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } - - -//------------------------------------------------------------------------------ - -$for (0; :ud // Copy msg header and payload mirrors to MRFs - send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_RGB+nBI_CURRENT_SRC_RGB - - // Calculate 16 v for next line - add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly - - // Scale back to [0, 255], convert f to ud - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(2) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(2)<1> acc0:f { Compr } - - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(4) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(4)<1> acc0:f { Compr } - -//#if defined(SAVE_ARGB) //Only needed if Alpha value is written to the destination - line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(6) { Compr } // Process B, V - mov (16) SCALE_RESPONSE_YD(6)<1> acc0:f { Compr } -//#endif - - mov (16) DEST_R(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK - mov (16) DEST_G(%1)<1> SCALE_RESPONSE_YB(2) //possible error due to truncation - vK - mov (16) DEST_B(%1)<1> SCALE_RESPONSE_YB(4) //possible error due to truncation - vK - mov (16) DEST_A(%1)<1> SCALE_RESPONSE_YB(6) //possible error due to truncation - vK -} diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/Scaling.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/Scaling.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/Core_Kernels/Scaling.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/Core_Kernels/Scaling.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,75 +0,0 @@ -/* - * All Video Processing kernels - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ - -// File name: Scaling.inc - -#ifndef _SCALING_INC_ -#define _SCALING_INC_ - -// Local variables---------------------------------------------------------------------------------- -#define MSGHDR_SCALE m1 // Message Payload Header (Uses m2, m3, m4, m5 implicitly) - -//-------------------------------------------------------------------------------------------------- -//r10.0 thru r33.0; Primary surface read from sampler (16x8) -#define DEST_Y uwTOP_Y -#define DEST_U uwTOP_U -#define DEST_V uwTOP_V - -//r10.0 thru r41.0 -.declare DEST_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare DEST_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare DEST_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw -.declare DEST_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw - -//r56.0 thru r79.0 -.declare SCALE_RESPONSE_YF Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=f -.declare SCALE_RESPONSE_UF Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=f -.declare SCALE_RESPONSE_VF Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=f - -.declare SCALE_RESPONSE_YW Base=REG(r,nBOT_Y) ElementSize=2 SrcRegion=REGION(16,1) Type=uw -.declare SCALE_RESPONSE_UW Base=REG(r,nBOT_U) ElementSize=2 SrcRegion=REGION(16,1) Type=uw -.declare SCALE_RESPONSE_VW Base=REG(r,nBOT_V) ElementSize=2 SrcRegion=REGION(16,1) Type=uw - -.declare SCALE_RESPONSE_YD Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud -.declare SCALE_RESPONSE_UD Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud -.declare SCALE_RESPONSE_VD Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud - -.declare SCALE_RESPONSE_YB Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub -.declare SCALE_RESPONSE_UB Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,4) Type=ub -.declare SCALE_RESPONSE_VB Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,4) Type=ub - -.declare SAMPLER_RAMP Base=REG(r,42) ElementSize=4 SrcRegion=<8;8,1> Type=f // 2 GRFs, 16 elements - -//#define SCALE_STEP_X REG2(r,43,0) -//#define SCALE_COORD_X REG2(r,43,3) - -#define SCALE_LINE_P255 REG2(r,43,4) // = 255.0 Used in 'line' inst to multiply 255, add 0.5, and round to int. -#define SCALE_LINE_P0_5 REG2(r,43,7) // = 0.5 - -//r44.0 thru r45.0 -#define SCALE_COORD_Y REG(r,44) //2GRF - - -// Send Message [DevILK] Message Descriptor -// MBZ MsgL=5 MsgR=8 H MBZ SIMD MsgType SmplrIndx BindTab -// 000 0 101 0 1000 1 0 10 0000 0000 00000000 -// 0 A 8 A 0 0 0 0 -// MsgL=1+2*2(u,v)=5 MsgR=8 -#define SMPLR_MSG_DSC 0x0A8A0000 // ILK Sampler Message Descriptor - -// Re-define new number of lines -#undef nY_NUM_OF_ROWS -#undef nUV_NUM_OF_ROWS - -#define nY_NUM_OF_ROWS 8 -#define nUV_NUM_OF_ROWS 8 - - -#endif //_SCALING_INC_ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,83 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: AYUV_Load_16x8.asm +//---------------------------------------------------------------- + + +#include "AYUV_Load_16x8.inc" + +// In order to load 64x8 AYUV data (16x8 pixels), we need to divide the data +// into two regions and load them separately. +// +// 32 byte 32 byte +//|----------------|----------------| +//| | | +//| A | B |8 +//| | | +//| | | +//|----------------|----------------| + +// Load the first 32x8 data block +// Packed data block should be loaded as 32x8 pixel block + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin + shl (1) rMSGSRC.0<1>:d acc0:w 2:w { NoDDClr } // H. block origin need to be four times larger + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV:ud { NoDDChk } // Block width and height (32x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud + +//Load the second 32x8 data block +// Offset the origin X - move to next 32 colomns + add (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 32:w // Increase X origin by 8 + +// Size stays the same - 32x8 + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud // Copy message description to message header + send (8) udSRC_YUV(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud + +// Give AYUV region addresses to address register + mov (1) SRC_YUV_OFFSET<1>:ud 0x00400038*32:ud //Address registers contain starting addresses of two halves + +//Directly move the data to destination + $for(0; r[SRC_YUV_OFFSET,%1*32+2]<8,4>:ub + mov (16) uwDEST_U(%1)<1> r[SRC_YUV_OFFSET,%1*32+1]<8,4>:ub + mov (16) uwDEST_V(%1)<1> r[SRC_YUV_OFFSET,%1*32+0]<8,4>:ub + } + \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,73 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: AYUV_Load_16x8.inc +// +// AYUV data are first loaded to bottom I/O REGION_2, then unpacked to planar data +// and stored in top I/O REGION_1 + +#undef nY_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block + +#define nDPR_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Y block size 32x8 +#define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold Y block data (8) + +//Temporary storage for unpacked AYUV data +#define rUNPACK_TEMP REG(r,nTEMP0) +.declare udUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=4 SrcRegion=<8;8,1> Type=ud //1 GRF +.declare ubUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=1 SrcRegion=<32;32,1> Type=ub //1 GRF + +.declare ubBOT_Y_IO Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(32,1) Type=ub + + +#define udSRC_YUV udBOT_Y_IO +#define ubSRC_YUV ubBOT_Y_IO +#define nSRC_YUV_REG nBOT_Y + +#define uwDEST_Y uwTOP_Y +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define SRC_YUV_OFFSET a0.0 + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of AYUV_Load_16x8.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/common.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/common.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/common.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/common.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,647 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#ifndef COMMON_INC +#define COMMON_INC + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 80 +.reg_count_payload 4 + + +//========== Common constants ========== + +// Bit position constants +#define BIT0 0x01 +#define BIT1 0x02 +#define BIT2 0x04 +#define BIT3 0x08 +#define BIT4 0x10 +#define BIT5 0x20 +#define BIT6 0x40 +#define BIT7 0x80 +#define BIT8 0x0100 +#define BIT9 0x0200 +#define BIT10 0x0400 +#define BIT11 0x0800 +#define BIT12 0x1000 +#define BIT13 0x2000 +#define BIT14 0x4000 +#define BIT15 0x8000 +#define BIT16 0x00010000 +#define BIT17 0x00020000 +#define BIT18 0x00040000 +#define BIT19 0x00080000 +#define BIT20 0x00100000 +#define BIT21 0x00200000 +#define BIT22 0x00400000 +#define BIT23 0x00800000 +#define BIT24 0x01000000 +#define BIT25 0x02000000 +#define BIT26 0x04000000 +#define BIT27 0x08000000 +#define BIT28 0x10000000 +#define BIT29 0x20000000 +#define BIT30 0x40000000 +#define BIT31 0x80000000 + +#define nGRFWIB 32 // GRF register width in byte +#define nGRFWIW 16 // GRF register width in word +#define nGRFWID 8 // GRF register width in dword + +#define nTOP_FIELD 0 +#define nBOTTOM_FIELD 1 + +#define nPREVIOUS_FRAME 0 // Previous frame +#define nCURRENT_FRAME 1 // Current frame +#define nNEXT_FRAME 2 // Next frame + +#ifdef GT +// GT DI Kernel +#else // ILK +// ILK DI Kernel +#endif + +//=================================== + +//========== Macros ========== +#define REGION(Width,HStride) // Region definition when ExecSize = Width + +#define RegFile(a) a +#define REG(r,n) _REG(RegFile(r),n) +#define _REG(r,n) __REG(r,n) +#define __REG(r,n) r##n.0 +#define REG2(r,n,s) _REG2(RegFile(r),n,s) +#define _REG2(r,n,s) __REG2(r,n,s) +#define __REG2(r,n,s) r##n.##s + +#define dNULLREG null<1>:d +#define wNULLREG null<1>:w + +#define KERNEL_ID(kernel_ID) mov NULLREG kernel_ID:ud + + +#define NODDCLR +#define NODDCLR_NODDCHK +#define NODDCHK + +//#define NODDCLR { NoDDClr } +//#define NODDCLR_NODDCHK { NoDDClr, NoDDChk } +//#define NODDCHK { NoDDChk } + + +//========== Defines ==================== + + +//========== GRF partition ========== +// r0 header : r0 (1 GRF) +// Static parameters : r1 - r5 (5 GRFS) +// Inline parameters : r6 - r7 (2 GRFs) +// MSGSRC : r9 (1 GRF) +// Top IO region : r10 - r33 (24 GRFS 8 for each component Y,U,V 16X8:w) +// Free space : r34 - r55 (22 GRFS) +// Bottom IO region : r56 - r79 (24 GRFS 8 for each component Y,U,V 16X8:w) +//=================================== + + +//========== Static Parameters ========== +// r1 +#define fPROCAMP_C0 r1.0 // DWORD 0, Procamp constant C0 in :f +#define wPROCAMP_C0 r1.0 // DWORD 0, Procamp constant C0 in :w +#define NUMBER_0002 r1.1 // DWORD 0, 0x0002 used in procamp for GT +#define udCP_MessageFormat r1.0 // DWORD 0, bits 2:3 of DWORD. (CE) +#define udCP_StatePointer r1.0 // DWORD 0, bits 31:5 of DWORD.(CE) + +#define ubSRC_CF_OFFSET r1.4 // DWORD 1, byte 0-2. SRC packed color format YUV offset in :ub + +#define ubDEST_RGB_FORMAT r1.8 // DWORD 2, byte 0. Dest RGB color format (0:ARGB FF:XRGB) +#define ubDEST_CF_OFFSET r1.8 // DWORD 2, byte 0-2. Dest packed color format YUV offset in :ub + +#define fPROCAMP_C1 r1.3 // DWORD 3, Procamp constant C1 in :f +#define wPROCAMP_C1 r1.6 // DWORD 3, Procamp constant C1 in :w +#define NUMBER_0100 r1.7 // DWORD 3, 0x0100 used in procamp for GT + +#define fPROCAMP_C2 r1.4 // DWORD 4, Procamp constant C2 in :f +#define wPROCAMP_C2 r1.8 // DWORD 4, Procamp constant C2 in :w + +#define uwSPITCH_DIV2 r1.10 // DWORD 5, byte 0-1. statistics surface pitch divided by 2 + +#define fVIDEO_STEP_Y r1.6 // DWORD 6, :f, AVS normalized reciprocal of Y Scaling factor +#define ubSTMM_SHIFT r1.24 // DWORD 6, byte 0. Amount of right shift for the DI blending equation +#define ubSTMM_MIN r1.25 // DWORD 6, byte 1. Min STMM for DI blending equation +#define ubSTMM_MAX r1.26 // DWORD 6, byte 2. Max STMM for DI blending equation +#define ubTFLD_FIRST r1.27 // DWORD 6, byte 3. Field parity order + +#define fPROCAMP_C5 r1.7 // DWORD 7, Procamp constant C3 in :f +#define wPROCAMP_C5 r1.14 // DWORD 7, Procamp constant C3 in :w + +// r2 +#define fPROCAMP_C3 r2.0 // DWORD 0, Procamp constant C4 in :f +#define wPROCAMP_C3 r2.0 // DWORD 0, Procamp constant C4 in :w + +#define fCSC_C5 r2.2 // DWORD 2. WG+CSC constant C5 +#define wCSC_C5 r2.4 // DWORD 2. WG+CSC constant C5 + +#define fPROCAMP_C4 r2.3 // DWORD 3, Procamp constant C5 in :f +#define wPROCAMP_C4 r2.6 // DWORD 3, Procamp constant C5 in :w + +#define fCSC_C8 r2.4 // DWORD 4. WG+CSC constant C8 +#define wCSC_C8 r2.8 // DWORD 4. WG+CSC constant C8 +#define fCSC_C9 r2.7 // DWORD 7. WG+CSC constant C9 +#define wCSC_C9 r2.14 // DWORD 7. WG+CSC constant C9 + +// r3 +#define fCSC_C0 r3.0 // DWORD 0. WG+CSC constant C0 +#define wCSC_C0 r3.0 // DWORD 0. WG+CSC constant C0 + +#define fSCALING_STEP_RATIO r3.1 // DWORD 1, = Alpha_X_Scaling_Step / Video_X_scaling_Step :f (blending) +#define fALPHA_STEP_X r3.1 // DWORD 1, = 1/Scale X, 0.5 = 2x, in :f (blending) + +#define fALPHA_STEP_Y r3.2 // DWORD 2, = 1/Scale Y, in :f + +#define fCSC_C4 r3.3 // DWORD 3. WG+CSC constant C4 +#define wCSC_C4 r3.6 // DWORD 3. WG+CSC constant C4 +#define fCSC_C1 r3.4 // DWORD 4. WG+CSC constant C1 +#define wCSC_C1 r3.8 // DWORD 4. WG+CSC constant C1 + +#define wSRC_H_ORI_OFFSET r3.10 // DWORD 5, bytes 0,1 :w +#define wSRC_V_ORI_OFFSET r3.11 // DWORD 5, bytes 2,3 :w + +#define dCOLOR_PIXEL r3.6 // DWORD 6. Color pixel for Colorfill + +#define fCSC_C2 r3.6 // DWORD 6. WG+CSC constant C2 +#define wCSC_C2 r3.12 // DWORD 6. WG+CSC constant C2 +#define fCSC_C3 r3.7 // DWORD 7. WG+CSC constant C3 +#define wCSC_C3 r3.14 // DWORD 7. WG+CSC constant C3 + +// r4 +#define fCSC_C6 r4.0 // DWORD 0. WG+CSC constant C6 +#define wCSC_C6 r4.0 // DWORD 0. WG+CSC constant C6 + +#define wFRAME_ENDX r4.2 // DWORD 1, word 0. Horizontal end = Origin+Width (in pixels)(for multiple blocks) +#define wNUM_BLKS r4.3 // DWORD 1, word 1. Number of blocks to process (for multiple blocks) + +#define wCOPY_ORIX r4.5 // DWORD 2, word 1. A copy of X origin (for multiple blocks) +#define uwNLAS_ENABLE r4.4 // DWORD 2, bit 15, NLAS enble bit + +#define fCSC_C7 r4.3 // DWORD 3. WG+CSC constant C7 +#define wCSC_C7 r4.6 // DWORD 3. WG+CSC constant C7 +#define fCSC_C10 r4.4 // DWORD 4. WG+CSC constant C10 +#define wCSC_C10 r4.8 // DWORD 4. WG+CSC constant C10 + +#define fFRAME_VID_ORIX r4.5 // DWORD 5, Frame horizontal origin normalized for scale kernel + +#define fFRAME_ALPHA_ORIX r4.6 // DWORD 6. Normalized alpha horiz origin for the frame + +#define fCSC_C11 r4.7 // DWORD 7. WG+CSC constant C11 +#define wCSC_C11 r4.14 // DWORD 7. WG+CSC constant C11 + +//======================================== + +//========== Inline parameters =========== +// r5 +#define wORIX r5.0 // DWORD 0, byte 0-1. :w, Destination Block Horizontal Origin in pel +#define wORIY r5.1 // DWORD 0, byte 2-3. :w, Destination Block Vertical Origin in pel + +#define fSRC_VID_H_ORI r5.1 // DWORD 1, :f, SRC Y horizontal origin normalized for scale kernel + +#define fSRC_VID_V_ORI r5.2 // DWORD 2, :f, SRC Y vertical origin normalized for scale kernel + +#define fSRC_ALPHA_H_ORI r5.3 // DWORD 3, :f, Normalized alpha horizontal origin + +#define fSRC_ALPHA_V_ORI r5.4 // DWORD 4, :f, Normalized alpha vertical origin + +#define uwALPHA_MASK_X r5.10 // DWORD 5, byte 0-1 :w, H. alpha mask +#define ubALPHA_MASK_Y r5.22 // DWORD 5, byte 2. :ub,V. alpha mask +#define ubBLK_CNT_X r5.23 // DWORD 5, byte 3, :ub, Horizontal Block Count per thread + +// mask is used for each block. it will be reloaded from r6 below for the last block. +#define udBLOCK_MASK r5.6 // DWORD 6 +#define uwBLOCK_MASK_H r5.12 // DWORD 6, byte 0-1 :uw, Block horizontal mask used in non-DWord aligned kernels +#define ubBLOCK_MASK_V r5.26 // DWORD 6, byte 2 :ub, Block vertical mask used in non-DWord aligned kernels +#define ubNUM_BLKS r5.27 // DWORD 6, byte 3, :ub, Total Block Count per thread + +#define fVIDEO_STEP_X r5.7 // DWORD 7. :f, AVS normalized reciprocal of X Scaling factor + +// r6 +#define fVIDEO_STEP_DELTA r6.0 // DWORD 0. :f, AVS normalized delta between 2 adjacent scaling steps (used for non-linear scaling) + +// mask is used for the last block (assume only M*1 and 1*N block partation aer supported) +#define udBLOCK_MASK_2 r6.1 // DWORD 1 +#define uwBLOCK_MASK_H_RIGHT r6.2 // DWORD 1, byte 0-1 :uw, Block horizontal mask used in non-DWord aligned kernels (right) +#define ubBLOCK_MASK_V_BOTTOM r6.6 // DWORD 1, byte 2 :ub, Block vertical mask used in non-DWord aligned kernels +#define uwBLOCK_MASK_H_MIDDLE r6.4 // DWORD 2, byte 0-1 :uw, Block horizontal mask used in non-DWord aligned kernels (left) + + +//====================== Binding table ========================================= + +#if defined(DNDI) + // DNDI Surface Binding Table + //#define nBI_SRC_CURR 0 // Current input frame surface + //#define nBI_SRC_PRIV 1 // Denoised previous input frame surface + //#define nBI_SRC_STAT 2 // Statistics input surface (STMM / Noise motion history) + //#define nBI_DEST_1ST 3 // 1st deinterlaced output frame surface +// #define nBI_DEST_YUV 3 // Dest frame YUV (for DN only) + //#define nBI_DEST_Y 3 // Dest frame Y (for DN only) + //#define nBI_DEST_2ND 4 // 2nd deinterlaced output frame surface + //#define nBI_DEST_DN_CURR 6 // Denoised current output frame surface + //#define nBI_DEST_STAT 7 // Statistics output surface (STMM / Noise motion history) +// #define nBI_DEST_U 8 // Dest frame U (for DN only) +// #define nBI_DEST_V 9 // Dest frame V (for DN only) +// #define nBI_SRC_U 10 // Src frame U (for DN only) +// #define nBI_SRC_V 11 // Src frame V (for DN only) +// #define nBI_SRC_UV 10 // Current src frame for UV + +#endif + +#if defined(INPUT_PL3) + // PL3 Surface Binding Table +// #define nBI_SRC_ALPHA 0 // Alpha +// #define nBI_SRC_Y 1 // Current src frame +// #define nBI_SRC_U 2 // Current src frame +// #define nBI_SRC_V 3 // Current src frame +// #define nBI_DEST_Y 10 // Dest frame +// #define nBI_DEST_U 11 // Dest frame +// #define nBI_DEST_V 12 // Dest frame +// #define nBI_DEST_YUV 7 // Dest frame +// #define nBI_DEST_RGB 7 // same num as BI_DEST_YUV, never used at the same time +#endif + +#if defined(INPUT_PL2) + // PL2 Surface Binding Table +// #define nBI_SRC_ALPHA 0 // Alpha +// #define nBI_SRC_Y 1 // Current src frame for Y + offseted UV +// #define nBI_SRC_YUV 1 // Current src frame for YUV in case of NV12_AVS +// #define nBI_SRC_UV 2 // Current src frame for UV +// #define nBI_DEST_YUV 7 // Current dest frame for Y + offseted UV +// #define nBI_DEST_RGB 7 // same num as BI_DEST_YUV, never used at the same time +// #define nBI_DEST_Y 10 // Dest frame +// #define nBI_DEST_U 11 // Dest frame +// #define nBI_DEST_V 12 // Dest frame +#endif + +#if defined(INPUT_PA) || defined(COLORFILL) + // Packed Surface Binding Table +// #define nBI_SRC_ALPHA 0 // Alpha +// #define nBI_SRC_YUV 1 // Current src frame +// #define nBI_DEST_YUV 3 // Dest frame +// #define nBI_DEST_RGB 3 // same num as BI_DEST_YUV, never used at the same time +#endif + + +//supper binding table +#define nBI_ALPHA_SRC 0 +#define nBI_CURRENT_SRC_YUV 1 +#define nBI_FIELD_COPY_SRC_1_YUV 1 +#define nBI_CURRENT_SRC_Y 1 +#define nBI_FIELD_COPY_SRC_1_Y 1 +#define nBI_CURRENT_SRC_RGB 1 +#define nBI_CURRENT_SRC_UV 2 +#define nBI_FIELD_COPY_SRC_1_UV 2 +#define nBI_CURRENT_SRC_U 2 +#define nBI_FIELD_COPY_SRC_1_U 2 +#define nBI_CURRENT_SRC_V 3 +#define nBI_FIELD_COPY_SRC_1_V 3 +#define nBI_TEMPORAL_REFERENCE_YUV 4 +#define nBI_FIELD_COPY_SRC_2_YUV 4 +#define nBI_TEMPORAL_REFERENCE_Y 4 +#define nBI_FIELD_COPY_SRC_2_Y 4 +#define nBI_CURRENT_SRC_YUV_HW_DI 4 +#define nBI_TEMPORAL_REFERENCE_UV 5 +#define nBI_FIELD_COPY_SRC_2_UV 5 +#define nBI_TEMPORAL_REFERENCE_U 5 +#define nBI_FIELD_COPY_SRC_2_U 5 +#define nBI_DENOISED_PREV_HW_DI 5 +#define nBI_TEMPORAL_REFERENCE_V 6 +#define nBI_FIELD_COPY_SRC_2_V 6 +#define nBI_STMM_HISTORY 6 +#define nBI_DESTINATION_YUV 7 +#define nBI_DESTINATION_RGB 7 +#define nBI_DESTINATION_Y 7 +#define nBI_DESTINATION_UV 8 +#define nBI_DESTINATION_U 8 +#define nBI_DESTINATION_V 9 +#define nBI_DESTINATION_1_YUV 10 +#define nBI_DESTINATION_1_Y 10 +#define nBI_DESTINATION_1_UV 11 +#define nBI_DESTINATION_1_U 11 +#define nBI_DESTINATION_1_V 12 +#define nBI_DESTINATION_2_YUV 13 +#define nBI_DESTINATION_2_Y 13 +#define nBI_DESTINATION_2_UV 14 +#define nBI_DESTINATION_2_U 14 +#define nBI_DESTINATION_2_V 15 +#define nBI_STMM_HISTORY_OUTPUT 20 +#define nBI_TEMPORAL_REFERENCE_YUV_PDI 21 +#define nBI_TEMPORAL_REFERENCE_Y_PDI 21 +#define nBI_TEMPORAL_REFERENCE_UV_PDI 22 +#define nBI_TEMPORAL_REFERENCE_U_PDI 22 +#define nBI_TEMPORAL_REFERENCE_V_PDI 23 +#define nBI_SUBVIDEO_YUV 26 +#define nBI_SUBVIDEO_Y 26 +#define nBI_SUBVIDEO_UV 27 +#define nBI_SUBVIDEO_U 27 +#define nBI_SUBVIDEO_V 28 +#define nBI_SUBPICTURE_YUV 29 +#define nBI_SUBPICTURE_P8 29 +#define nBI_SUBPICTURE_A8 30 +#define nBI_GRAPHIC_YUV 31 +#define nBI_GRAPHIC_P8 31 +#define nBI_GRAPHIC_A8 32 + + + +//========== Planar Sampler State Table Index ========== +#define nSI_SRC_ALPHA 0x000 // Sampler State for Alpha + +//Sampler Index for AVS/IEF messages +#define nSI_SRC_Y 0x400 // Sampler State for Y +#define nSI_SRC_U 0x800 // Sampler State for U +#define nSI_SRC_V 0xC00 // Sampler State for V +#define nSI_SRC_UV 0x800 // For NV12 surfaces +#define nSI_SRC_YUV 0x400 // For Packed surfaces +#define nSI_SRC_RGB 0x400 // For ARGB surfaces + +//Sampler Index for SIMD16 sampler messages +#define nSI_SRC_SIMD16_Y 0x100 // Sampler State for Y +#define nSI_SRC_SIMD16_U 0x200 // Sampler State for U +#define nSI_SRC_SIMD16_V 0x300 // Sampler State for V +#define nSI_SRC_SIMD16_UV 0x200 // For NV12 surfaces +#define nSI_SRC_SIMD16_YUV 0x100 // For Packed surfaces +#define nSI_SRC_SIMD16_RGB 0x100 // For ARGB surfaces + + + +// Common Registers +#define pCF_Y_OFFSET a0.4 // Address register holding Y offset +#define pCF_U_OFFSET a0.5 // Address register holding U offset +#define pCF_V_OFFSET a0.6 // Address register holding V offset + +// #define YUV_ORI ORIX // Used by writing packed data to dport + + +//================= Message Payload Header fields ============================== +#define IDP r0.2:ud // Interface Descriptor Pointer + +//================= Common Message Descriptor TBD add common load and save ===== +// Message descriptor for dataport media write +#ifdef GT + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 0 1010 (media block write) 00000 + // 00000000 (binding table index - set later) + // = 0x02094000 + #define nDPMW_MSGDSC 0x02094000 + #define nDPMR_MSGDSC 0x02098000 // Data Port Media Block Read Message Descriptor + // TBD +#else // ILK + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 000 0 010 (media block write) 0000 + // 00000000 (binding table index - set later) + // = 0x02082000 + #define nDPMW_MSGDSC 0x02082000 // Data Port Media Block Write Message Descriptor + #define nDPMR_MSGDSC 0x0208A000 // Data Port Media Block Read Message Descriptor +#endif + +// Message Length defines +#define nMSGLEN_1 0x02000000 // Message Length of 1 GRF for Send +#define nMSGLEN_2 0x04000000 // Message Length of 2 GRF for Send +#define nMSGLEN_4 0x08000000 // Message Length of 4 GRF for Send +#define nMSGLEN_8 0x10000000 // Message Length of 8 GRF for Send + +// Response Length defines +#define nRESLEN_1 0x00100000 // Message Response Length of 1 GRF from Send +#define nRESLEN_2 0x00200000 // Message Response Length of 2 GRF from Send +#define nRESLEN_3 0x00300000 // Message Response Length of 3 GRF from Send +#define nRESLEN_4 0x00400000 // Message Response Length of 4 GRF from Send +#define nRESLEN_5 0x00500000 // Message Response Length of 5 GRF from Send +#define nRESLEN_8 0x00800000 // Message Response Length of 8 GRF from Send +#define nRESLEN_9 0x00900000 // Message Response Length of 9 GRF from Send +#define nRESLEN_11 0x00B00000 // Message Response Length of 11 GRF from Send +#define nRESLEN_12 0x00C00000 // Message Response Length of 12 GRF from Send +#define nRESLEN_16 0x01000000 // Message Response Length of 16 GRF from Send + +// Block Width and Height Size defines +#define nBLOCK_WIDTH_4 0x00000003 // Block Width 4 +#define nBLOCK_WIDTH_5 0x00000004 // Block Width 5 +#define nBLOCK_WIDTH_8 0x00000007 // Block Width 8 +#define nBLOCK_WIDTH_9 0x00000008 // Block Width 9 +#define nBLOCK_WIDTH_12 0x0000000B // Block Width 12 +#define nBLOCK_WIDTH_16 0x0000000F // Block Width 16 +#define nBLOCK_WIDTH_20 0x00000013 // Block Width 20 +#define nBLOCK_WIDTH_32 0x0000001F // Block Width 32 +#define nBLOCK_HEIGHT_1 0x00000000 // Block Height 1 +#define nBLOCK_HEIGHT_2 0x00010000 // Block Height 2 +#define nBLOCK_HEIGHT_4 0x00030000 // Block Height 4 +#define nBLOCK_HEIGHT_5 0x00040000 // Block Height 5 +#define nBLOCK_HEIGHT_8 0x00070000 // Block Height 8 + +// Extended Message Descriptors +#define nEXTENDED_MATH 0x1 +#define nSMPL_ENGINE 0x2 +#define nMESSAGE_GATEWAY 0x3 +#define nDATAPORT_READ 0x4 +#define nDATAPORT_WRITE 0x5 +#define nURB 0x6 +#define nTS_EOT 0x27 // with End-Of-Thread bit ON + +// Common message descriptors: +#ifdef GT + #define nEOT_MSGDSC 0x02000010 // End of Thread Message Descriptor + #define IF_NULL null:uw null:uw null:uw //for different if instructions on ILK and Gen6 +#else //ILK + #define nEOT_MSGDSC 0x02000000 // End of Thread Message Descriptor + #define IF_NULL +#endif + + +//===================== Math Function Control =================================== +#define mfcINV 0x1 // reciprocal +#define mfcLOG 0x2 // log +#define mfcEXP 0x3 // exponent +#define mfcSQRT 0x4 // square root +#define mfcRSQ 0x5 // reciprocal square root +#define mfcSIN 0x6 // sine (in radians) +#define mfcCOS 0x7 // cosine (in radians) +#define mfcSINCOS 0x8 // dst0 = sin of src0, dst1 = cosine of src0 (in radians) - GT+ ONLY +#define mfcPOW 0xA // abs(src0) raised to the src1 power +#define mfcINT_DIV_QR 0xB // return quotient and remainder +#define mfcINT_DIV_Q 0xC // return quotient +#define mfcINT_DIV_R 0xD // return remainder + + +//=================== Message related registers ================================= + +#ifdef GT + #define udDUMMY_NULL +#else // _ILK + #define udDUMMY_NULL null:ud // Used in send inst as src0 +#endif + + +//----------- Message Registers ------------ +#define mMSGHDR m1 // Message Payload Header +#define mMSGHDRY m1 // Message Payload Header register for Y data +#define mMSGHDRU m2 // Message Payload Header register for U data +#define mMSGHDRV m3 // Message Payload Header register for V data +#define mMSGHDRYA m4 // Second Message Payload Header register for Y data +#define mMSGHDRH m5 // Message Payload Header register for motion history +#define mMSGHDRY1 m1 // Message Payload Header register for first Y data +#define mMSGHDRY2 m2 // Message Payload Header register for second Y data +#define mMSGHDRY3 m3 // Message Payload Header register for third Y data +#define mMSGHDRY4 m4 // Message Payload Header register for fourth Y data +#define mMSGHDRY5 m5 // Message Payload Header register for fifth Y data +#define mMSGHDRY6 m6 // Message Payload Header register for sixth Y data +#define mMSGHDR_EOT m15 // Dummy Message Register for EOT + +#define rMSGSRC r8 // Message source register +#define pMSGDSC a0.0:ud // Message Descriptor register (type DWORD) + +#define udMH_ORI rMSGSRC.0 // Data Port Media Block R/W message header block offset +#define udMH_ORIX rMSGSRC.0 // Data Port Media Block R/W message header X offset +#define udMH_ORIY rMSGSRC.1 // Data Port Media Block R/W message header Y offset +#define udMH_SIZE rMSGSRC.2 // Data Port Media Block R/W message header block width & height + +// M2 - M9 for message data payload +.declare mubMSGPAYLOAD Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub +.declare muwMSGPAYLOAD Base=m2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw +.declare mudMSGPAYLOAD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare mfMSGPAYLOAD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=f + +//=================== End of thread instruction =========================== +#ifdef GT + #define END_THREAD mov (8) mMSGHDR_EOT<1>:ud r0.0<8;8,1>:ud \n\ + send (1) null<1>:d mMSGHDR_EOT nTS_EOT nEOT_MSGDSC +#else // ILK This should be changed to 1 instruction; I have tested it and it works - vK + #define END_THREAD mov (8) mMSGHDR_EOT<1>:ud r0.0<8;8,1>:ud \n\ + send (1) dNULLREG mMSGHDR_EOT udDUMMY_NULL nTS_EOT nEOT_MSGDSC:ud +#endif + + +//======================================================================= +// Region declarations for SRC and DEST as TOP and BOT + +// Common I/O regions +#define nREGION_1 1 +#define nREGION_2 2 + +//*** These region base GRFs are fixed regardless planar/packed, and data alignment. +//*** Each kernel is responsible to select the correct region declaration below. +//*** YUV regions are not necessarily next to each other. +#define nTOP_Y 10 // r10 - r17 (8 GRFs) +#define nTOP_U 18 // r18 - r25 (8 GRFs) +#define nTOP_V 26 // r26 - r33 (8 GRFs) + +#define nBOT_Y 56 // r56 - r63 (8 GRFs) +#define nBOT_U 64 // r64 - r71 (8 GRFs) +#define nBOT_V 72 // r72 - r79 (8 GRFs) + +// Define temp space for any usages +#define nTEMP0 34 +#define nTEMP1 35 +#define nTEMP2 36 +#define nTEMP3 37 +#define nTEMP4 38 +#define nTEMP5 39 +#define nTEMP6 40 +#define nTEMP7 41 +#define nTEMP8 42 +#define nTEMP10 44 +#define nTEMP12 46 +#define nTEMP14 48 +#define nTEMP16 50 +#define nTEMP17 51 +#define nTEMP18 52 + +#define nTEMP24 58 + +// Common region 1 +.declare ubTOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub +.declare ubTOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub +.declare ubTOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub + +.declare uwTOP_Y Base=REG(r,nTOP_Y) ElementSize=2 SrcRegion=REGION(16,1) DstRegion=<1> Type=uw +.declare uwTOP_U Base=REG(r,nTOP_U) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare uwTOP_V Base=REG(r,nTOP_V) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare ub2TOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(16,2) DstRegion=<1> Type=ub +.declare ub2TOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub +.declare ub2TOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub + +.declare ub4TOP_Y Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare ub4TOP_U Base=REG(r,nTOP_U) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare ub4TOP_V Base=REG(r,nTOP_V) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +.declare ubTOP_ARGB Base=REG(r,nTOP_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +// Used by "send" instruction +.declare udTOP_Y_IO Base=REG(r,nTOP_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udTOP_U_IO Base=REG(r,nTOP_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udTOP_V_IO Base=REG(r,nTOP_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud + +// Common region 2 +.declare ubBOT_Y Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub +.declare ubBOT_U Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub +.declare ubBOT_V Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,1) DstRegion=<1> Type=ub + +.declare uwBOT_Y Base=REG(r,nBOT_Y) ElementSize=2 SrcRegion=REGION(16,1) DstRegion=<1> Type=uw +.declare uwBOT_U Base=REG(r,nBOT_U) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare uwBOT_V Base=REG(r,nBOT_V) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare ub2BOT_Y Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(16,2) DstRegion=<1> Type=ub +.declare ub2BOT_U Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub +.declare ub2BOT_V Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,2) DstRegion=<1> Type=ub + +.declare ubBOT_ARGB Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +// Used by "send" instruction +.declare udBOT_Y_IO Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udBOT_U_IO Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare udBOT_V_IO Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud + +// End of common.inc + +#endif // COMMON_INC diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Expansion.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Expansion.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Expansion.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Expansion.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,61 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: Expansion.inc +// Number of U/V rows per block definition +#undef nUV_NUM_OF_ROWS +#ifdef EXPAND_9x5 + #define nUV_NUM_OF_ROWS 6 +#else + #define nUV_NUM_OF_ROWS 8 +#endif + +// Source/destination region definitions +#undef uwDEST_U +#undef uwDEST_V +#if (nSRC_REGION==nREGION_1) + #define uwDEST_U uwTOP_U + #define uwDEST_V uwTOP_V +#elif (nSRC_REGION==nREGION_2) + #define uwDEST_U uwBOT_U + #define uwDEST_V uwBOT_V +#endif + +// End of Expansion.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,77 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: IMC3_Load_8x4.asm +// +//---------------------------------------------------------------- + +#define IMC3_LOAD_8x4 +#include "PL3_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) + + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x4 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x4) + + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud + mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + +// End of IMC3_Load_8x4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x5.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/IMC3_Load_8x5.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,77 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: IMC3_Load_8x5.asm +// +//---------------------------------------------------------------- + +#define IMC3_LOAD_8x5 +#include "PL3_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) + + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x5 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x5) + + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud + mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + +// End of IMC3_Load_8x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/IMC3_Load_9x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/IMC3_Load_9x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/IMC3_Load_9x5.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/IMC3_Load_9x5.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,80 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: IMC3_Load_9x5.asm +// +//---------------------------------------------------------------- +// This module loads 16x8 Y, 9x5 U and 9x5 V planar data blocks for CSC module +// and stores it in byte-aligned format. +//---------------------------------------------------------------- + +#define IMC3_LOAD_9x5 +#include "PL3_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Block width and height (16x8) + + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 9x5 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (12x5) + + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_U:ud + mov (8) mMSGHDRV<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_V:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for(nUV_NUM_OF_ROWS-2; >-1; -1) { + mov (16) uwDEST_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwDEST_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + +// End of IMC3_Load_9x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Init_All_Regs.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Init_All_Regs.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Init_All_Regs.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Init_All_Regs.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,48 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#ifdef GT // to remove error messages of un-initialized GRF + .declare udGRF_space Base=r0.0 ElementSize=4 SrcRegion=REGION(8,1) Type=ud + + $for (7; <80; 1) { + mov (8) udGRF_space(%1)<1> 0:ud + } +#else +#endif \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Multiple_Loop.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Multiple_Loop.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Multiple_Loop.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Multiple_Loop.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,123 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +///////////////////////////////////////////////////////////////////////////////// +// Multiple_Loop.asm + + +// This lable is for satisfying component kernel build. +// DL will remove this label and reference the real one in Multiple_Loop_Head.asm. +#if defined(COMPONENT) +VIDEO_PROCESSING_LOOP: +#endif + + +//===== Possible build flags for component kernels +// 1) INC_SCALING +// 2) INC_BLENDING +// 3) INC_BLENDING and INC_SCALING +// 4) (no flags) + + +#define MxN_MULTIPLE_BLOCKS + +//------------------------------------------------------------------------------ +#if defined(MxN_MULTIPLE_BLOCKS) +// Do Multiple Block Processing ------------------------------------------------ + + // The 1st block has been processed before entering the loop + + // Processed all blocks? + add.z.f0.0 (1) wNUM_BLKS:w wNUM_BLKS:w -1:w + + // Reached multi-block width? + add (1) wORIX:w wORIX:w 16:w + cmp.l.f0.1 (1) null:w wORIX:w wFRAME_ENDX:w // acc0.0 has wORIX + + #if defined(INC_SCALING) + // Update SRC_VID_H_ORI for scaling + mul (1) REG(r,nTEMP0):f fVIDEO_STEP_X:f 16.0:f + add (1) fSRC_VID_H_ORI:f REG(r,nTEMP0):f fSRC_VID_H_ORI:f + #endif + + #if defined(INC_BLENDING) + // Update SRC_ALPHA_H_ORI for blending + mul (1) REG(r,nTEMP0):f fALPHA_STEP_X:f 16.0:f + add (1) fSRC_ALPHA_H_ORI:f REG(r,nTEMP0):f fSRC_ALPHA_H_ORI:f + #endif + + (f0.0)jmpi (1) END_VIDEO_PROCESSING // All blocks are done - Exit loop + + // blocks in the middle of the loop (neither the first nor the last one)? + // it may be on the left edge (Mx1) or not (1xN) + mov (1) uwBLOCK_MASK_H<1>:uw uwBLOCK_MASK_H_MIDDLE:uw + + // the last block? + cmp.e.f0.0 (1) null:w wNUM_BLKS:w 1:w + (f0.0) mov (1) uwBLOCK_MASK_H<1>:uw uwBLOCK_MASK_H_RIGHT:uw + (f0.0) mov (1) ubBLOCK_MASK_V<1>:ub ubBLOCK_MASK_V_BOTTOM:ub + + (f0.1)jmpi (1) VIDEO_PROCESSING_LOOP // If not the end of row, goto the beginning of the loop + + //If end of row, restart Horizontal offset and calculate Vertical offsets next row. + mov (1) wORIX:w wCOPY_ORIX:w + add (1) wORIY:w wORIY:w 8:w + + #if defined(INC_SCALING) + // Update SRC_VID_H_ORI and SRC_VID_V_ORI for scaling + mov (1) fSRC_VID_H_ORI:f fFRAME_VID_ORIX:f // Reset normalised X origin to 0 for video and alpha + mul (1) REG(r,nTEMP0):f fVIDEO_STEP_Y:f 8.0:f + add (1) fSRC_VID_V_ORI:f REG(r,nTEMP0):f fSRC_VID_V_ORI:f + #endif + + #if defined(INC_BLENDING) + // Update SRC_ALPHA_H_ORI and SRC_ALPHA_V_ORI for blending + mov (1) fSRC_ALPHA_H_ORI:f fFRAME_ALPHA_ORIX:f // Reset normalised X origin to 0 for video and alpha + mul (1) REG(r,nTEMP0):f fALPHA_STEP_Y:f 8.0:f + add (1) fSRC_ALPHA_V_ORI:f REG(r,nTEMP0):f fSRC_ALPHA_V_ORI:f + #endif + + jmpi (1) VIDEO_PROCESSING_LOOP // Continue Loop + +END_VIDEO_PROCESSING: + nop + +#endif +END_THREAD // End of Thread diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Multiple_Loop_Head.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Multiple_Loop_Head.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/Multiple_Loop_Head.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/Multiple_Loop_Head.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,53 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +////////////////////////////////////////////////////////////////////////////////// +// Multiple_Loop_Head.asm +// This code sets up the loop control for multiple blocks per thread + + mul (1) wFRAME_ENDX:w ubBLK_CNT_X:ub 16:uw { NoDDClr } // Build multi-block loop counters + mov (1) wNUM_BLKS:w ubNUM_BLKS:ub { NoDDClr, NoDDChk } // Copy num blocks to word variable + mov (1) wCOPY_ORIX:w wORIX:w { NoDDChk } // Copy multi-block origin in pixel + mov (2) fFRAME_VID_ORIX<1>:f fSRC_VID_H_ORI<4;2,2>:f // Copy src video origin for scaling, and alpha origin for blending + add (1) wFRAME_ENDX:w wFRAME_ENDX:w wORIX:w // Continue building multi-block loop counters + +VIDEO_PROCESSING_LOOP: // Loop back entry point as the biginning of the loop for multiple blocks + +// Beginning of the loop diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV11_Load_4x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV11_Load_4x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV11_Load_4x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV11_Load_4x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: NV11_Load_4x8.asm +//---------------------------------------------------------------- + +#define NV11_LOAD_4x8 +#include "PL2_Load.inc" + +// Load 16x8 NV11 Y ------------------------------------------------------------ + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x8 NV11 UV ---------------------------------------------------------- + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x8) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/4-1; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<32;16,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<32;16,2> + } + +// End of NV11_Load_4x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV11_Load_5x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV11_Load_5x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV11_Load_5x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV11_Load_5x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: NV11_Load_5x8.asm +//---------------------------------------------------------------- + +#define NV11_LOAD_5x8 +#include "PL2_Load.inc" + +// Load 16x8 NV11 Y ------------------------------------------------------------ + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 12x8 NV11 UV --------------------------------------------------------- + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (12x8) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> + } + +// End of NV11_Load_5x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,100 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: NV12_Load_8x4.asm +//---------------------------------------------------------------- + +#define NV12_LOAD_8x4 +#include "PL2_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x4 planar U and V ----------------------------------------------------- + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if defined(FIX_POINT_CONVERSION) || defined(FLOAT_POINT_CONVERSION) + // load NV12 and save it as packed AYUV to dst (64x8) + + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + // #### Y + mov (8) ubDEST_Y(0,%1*16*4)<4> ubSRC_Y(0,%1*16)<0;8,1> + mov (8) ubDEST_Y(0,(%1*16+8)*4)<4> ubSRC_Y(0,%1*16+8)<0;8,1> + + // #### U/V + // error from compile: "Invalid horiz size 8", so I have to repeat UV first + // mov (4) ubDEST_Y(0,%1*16*4+1)<8> ubSRC_U(0,%1/2*16)<0;4,2> + // mov (4) ubDEST_Y(0,%1*16*4+1+32)<8> ubSRC_U(0,%1/2*16+8)<0;4,2> + + // repeate U/V for each one + mov (8) REG2(r,nTEMP18,0)<2>:uw uwSRC_U(0,%1/2*8)<0;8,1> + mov (8) REG2(r,nTEMP18,1)<2>:uw uwSRC_U(0,%1/2*8)<0;8,1> + + // mov U/V to ubDEST + mov (8) ubDEST_Y(0,%1*16*4+1)<4> REG2(r,nTEMP18,0)<0;8,2>:ub + mov (8) ubDEST_Y(0,%1*16*4+1+32)<4> REG2(r,nTEMP18,16)<0;8,2>:ub + + mov (8) ubDEST_Y(0,%1*16*4+2)<4> REG2(r,nTEMP18,1)<0;8,2>:ub + mov (8) ubDEST_Y(0,%1*16*4+2+32)<4> REG2(r,nTEMP18,17)<0;8,2>:ub + } +#else + #if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } + #endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + // why "mov (16)"? should it be 8? + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<32;16,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<32;16,2> + } + +#endif + +// End of NV12_Load_8x4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x5.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV12_Load_8x5.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: NV12_Load_8x5.asm +//---------------------------------------------------------------- + +#define NV12_LOAD_8x5 +#include "PL2_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 8x5 planar U and V ----------------------------------------------------- + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x5) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> + } + +// End of NV12_Load_8x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV12_Load_9x5.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV12_Load_9x5.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/NV12_Load_9x5.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/NV12_Load_9x5.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: NV12_Load_9x5.asm +//---------------------------------------------------------------- + +#define NV12_LOAD_9x5 +#include "PL2_Load.inc" + +// Load 16x8 planar Y ---------------------------------------------------------- + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + +// Load 9x5 planar U and V ----------------------------------------------------- + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (20x5) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (nY_NUM_OF_ROWS-1; >-1; -1) { + mov (16) uwDEST_Y(0,%1*16)<1> ubSRC_Y(0,%1*16) + } +#endif + $for(nUV_NUM_OF_ROWS-2; >-1; -1) { + mov (16) uwDEST_U(0,%1*16)<1> ubSRC_U(0,%1*32)<16;8,2> + mov (16) uwDEST_V(0,%1*16)<1> ubSRC_U(0,%1*32+1)<16;8,2> + } + +// End of NV12_Load_9x5 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/P208_Load_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/P208_Load_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/P208_Load_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/P208_Load_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,71 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: P208_Load_8x8.asm +//---------------------------------------------------------------- + +#define P208_LOAD_8x8 +#include "PL2_Load.inc" + + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y Block width and height (16x8) (U/V block size is the same) + +// Load 16x8 P208 Y ------------------------------------------------------------ +#if !defined(LOAD_UV_ONLY) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + + // Load 16x8 planar UV ----------------------------------------------------- + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (0; + mov (16) uwDEST_V(0,%1*16) ubSRC_U(0,%1*32+1)<32;16,2> + } + +// End of P208_Load_8x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/P208_Load_9x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/P208_Load_9x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/P208_Load_9x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/P208_Load_9x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: P208_Load_9x8.asm +//---------------------------------------------------------------- + +#define P208_LOAD_9x8 +#include "PL2_Load.inc" + + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + +// Load 16x8 P208 Y ------------------------------------------------------------ +#if !defined(LOAD_UV_ONLY) + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_Y:ud // Y block width and height (16x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_CURRENT_SRC_Y:ud +#endif + + // Load 16x8 planar UV ----------------------------------------------------- + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (20x8) + mov (8) mMSGHDRU<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDRU udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_CURRENT_SRC_UV:ud + +// Convert to word-aligned format ---------------------------------------------- +#if !defined(LOAD_UV_ONLY) + $for (0; + mov (16) uwDEST_V(0,%1*16) ubSRC_U(0,%1*32+1)<32;16,2> + } + +// End of P208_Load_9x8.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PA_Load_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PA_Load_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PA_Load_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PA_Load_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,63 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PA_Load_8x8.asm +//---------------------------------------------------------------- + +#define PA_LOAD_8x8 +#include "PA_Load.inc" + +// Load 16x8 packed data block +// Packed data block should be loaded as 32x8 pixel block + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin + shl (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:w 1:w // H. block origin need to be doubled + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV:ud // Block width and height (32x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_CURRENT_SRC_YUV:ud + +// Unpack to "planar" YUV422 format in word-aligned bytes + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub nSRC_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + $for(0; r[pCF_Y_OFFSET, %1*nGRFWIB]REGION(16,2) + mov (8) uwDEST_U(0, %1*8)<1> r[pCF_U_OFFSET, %1*nGRFWIB]REGION(8,4) + mov (8) uwDEST_V(0, %1*8)<1> r[pCF_V_OFFSET, %1*nGRFWIB]REGION(8,4) + } + +// End of PA_Load_8x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PA_Load_9x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PA_Load_9x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PA_Load_9x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PA_Load_9x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,77 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PA_Load_9x8.asm +//---------------------------------------------------------------- +// This module loads 16x8 Y, 9x8 U and 9x8 V planar data blocks for CSC module +// and stores it in word-aligned format. +//---------------------------------------------------------------- + +#define PA_LOAD_9x8 +#include "PA_Load.inc" + +// Load 18x8 packed data block +// Packed data block should be loaded as 36x8 pixel block + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin + shl (1) rMSGSRC.0<1>:d acc0:w 1:w // H. block origin need to be doubled + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_MAIN:ud // Block width and height (32x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_MAIN+nBI_CURRENT_SRC_YUV:ud + + add (1) rMSGSRC.0<1>:d rMSGSRC.0:d 32:w //the last 4 pixels are read again for optimization + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_YUV_ADDITION:ud // Block width and height (4x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_YUV(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV_ADDITION+nBI_CURRENT_SRC_YUV:ud + +// Unpack to "planar" YUV422 format in word-aligned bytes + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub nSRC_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + $for(0; r[pCF_Y_OFFSET, %1*nGRFWIB]REGION(16,2) + mov (8) uwDEST_U(0, %1*16)<1> r[pCF_U_OFFSET, %1*nGRFWIB]REGION(8,4) + mov (8) uwDEST_V(0, %1*16)<1> r[pCF_V_OFFSET, %1*nGRFWIB]REGION(8,4) + } + + $for(0; r[pCF_U_OFFSET, %1*4+256]REGION(1,0) + mov (1) uwDEST_V(0, %1*16+8)<1> r[pCF_V_OFFSET, %1*4+256]REGION(1,0) + } + //UV expansion done in PL9x8_PL16x8.asm module + +// End of PA_Load_9x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PA_Load.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PA_Load.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PA_Load.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PA_Load.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,72 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PA_Load.inc +// +// YUV422 data are first loaded to bottom I/O REGION_2, then unpacked to planar data +// and stored in top I/O REGION_1 + +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + +#if defined(PA_LOAD_8x8) + #define nDPR_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Y block size 32x8 + #define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold Y block data (8) +#endif +#if defined(PA_LOAD_9x8) + #define nDPR_BLOCK_SIZE_YUV_MAIN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // Main YUV block size 32x8 + #define nDPR_MSG_SIZE_YUV_MAIN nRESLEN_8 // # of MRF's to hold Y block data (8) + #define nDPR_BLOCK_SIZE_YUV_ADDITION nBLOCK_WIDTH_4+nBLOCK_HEIGHT_8 // Additional YUV block size 4x8 + #define nDPR_MSG_SIZE_YUV_ADDITION nRESLEN_1 // # of MRF's to hold Y block data (8) +#endif + +#define udSRC_YUV udBOT_Y_IO +#define nSRC_YUV_REG nBOT_Y + +#define uwDEST_Y uwTOP_Y +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of PA_Load.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,68 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL16x8_PL8x4.asm +//---------------------------------------------------------------- + +#include "common.inc" + +#ifndef DEST_U //DEST_U, DEST_V not defined + + #if (nSRC_REGION==nREGION_1) + #define DEST_Y uwTOP_Y + #define DEST_U uwTOP_U + #define DEST_V uwTOP_V + #elif (nSRC_REGION==nREGION_2) + #define DEST_Y uwBOT_Y + #define DEST_U uwBOT_U + #define DEST_V uwBOT_V + #endif + +#endif + +//Convert 444 from sampler to 422 +$for (0, 0; <8; 2, 1) { + mov (8) DEST_U(0,%2*8)<1> DEST_U(%1)<16;8,2> + mov (8) DEST_V(0,%2*8)<1> DEST_V(%1)<16;8,2> +} + +// Re-define new number of lines +#undef nUV_NUM_OF_ROWS +#define nUV_NUM_OF_ROWS 4 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL16x8_PL8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,66 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL16x8_PL8x8.asm +//---------------------------------------------------------------- + +#include "common.inc" + +#ifndef DEST_U + + //DEST_U, DEST_V not defined + #if (nSRC_REGION==nREGION_1) + #define DEST_Y uwTOP_Y + #define DEST_U uwTOP_U + #define DEST_V uwTOP_V + #elif (nSRC_REGION==nREGION_2) + #define DEST_Y uwBOT_Y + #define DEST_U uwBOT_U + #define DEST_V uwBOT_V + #endif + +#endif + + +//Convert 444 from sampler to 422 +$for (0, 0; <8; 2, 1) { + mov DEST_U(%2)<1> DEST_U(%1)<16;8,2> + mov DEST_V(%2)<1> DEST_V(%1)<16;8,2> +} diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL2_Load.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL2_Load.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL2_Load.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL2_Load.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,111 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL2_Load.inc + +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#define nDPR_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) + + +#if defined(NV11_LOAD_4x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_8 // U/V block size 8x8 + #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) +#endif + +#if defined(NV11_LOAD_5x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_12+nBLOCK_HEIGHT_8 // U/V block size 12x8 + #define nDPR_MSG_SIZE_UV nRESLEN_4 // # of MRF's to hold U/V block data (4) +#endif +#if defined(NV12_LOAD_8x4) + #define nUV_NUM_OF_ROWS 4 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // U/V block size 16x4 + #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) +#endif +#if defined(NV12_LOAD_8x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_5 // U/V block size 16x5 + #define nDPR_MSG_SIZE_UV nRESLEN_3 // # of MRF's to hold U/V block data (3) +#endif +#if defined(NV12_LOAD_9x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_20+nBLOCK_HEIGHT_5 // U/V block size 20x5 + #define nDPR_MSG_SIZE_UV nRESLEN_5 // # of MRF's to hold U/V block data (5) +#endif +#if defined(P208_LOAD_8x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // U/V block size 16x8 + #define nDPR_MSG_SIZE_UV nRESLEN_4 // # of MRF's to hold U/V block data (4) +#endif +#if defined(P208_LOAD_9x8) + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_20+nBLOCK_HEIGHT_8 // U/V block size 20x8 + #define nDPR_MSG_SIZE_UV nRESLEN_8 // # of MRF's to hold U/V block data (8) +#endif + +// Source/destination region definitions +#if !defined(udSRC_Y) + #define udSRC_Y udBOT_Y_IO // Default Y source region is top Y region +#endif + +#if !defined(udSRC_U) + #define udSRC_U udBOT_U_IO // Default U source region is top U region +#endif + +#define ubSRC_Y ubBOT_Y +#define nSRC_Y_REG nBOT_Y +#define ubSRC_U ubBOT_U +#define nSRC_U_REG nBOT_U + +#define uwDEST_Y uwTOP_Y // However they can be transferred to word-aligned byte if desired +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define ubDEST_Y ubTOP_Y // I'd like use them for color conversion +#define uwSRC_U uwBOT_U + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of PL2_Load.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL3_Load.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL3_Load.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL3_Load.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL3_Load.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,89 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL3_Load.inc + +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#define nDPR_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) + +#if defined(IMC3_LOAD_8x4) + #define nUV_NUM_OF_ROWS 4 // Number of U/V rows per block + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // U/V block size 8x4 + #define nDPR_MSG_SIZE_UV nRESLEN_1 // # of MRF's to hold U/V block data (1) +#endif +#if defined(IMC3_LOAD_8x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_5 // U/V block size 8x5 + #define nDPR_MSG_SIZE_UV nRESLEN_2 // # of MRF's to hold U/V block data (2) +#endif +#if defined(IMC3_LOAD_9x5) + #define nUV_NUM_OF_ROWS 6 // Number of U/V rows per block (Rounded Up to Nearest Even Number) + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_12+nBLOCK_HEIGHT_5 // U/V block size 12x5 + #define nDPR_MSG_SIZE_UV nRESLEN_3 // # of MRF's to hold U/V block data (3) +#endif + +// Source/destination region definitions +#if !defined(udSRC_Y) + #define udSRC_Y udBOT_Y_IO // Default Y source region is top Y region +#endif + +#if !defined(udSRC_U) + #define udSRC_U udBOT_U_IO // Default U source region is top U region +#endif + +#if !defined(udSRC_V) + #define udSRC_V udBOT_V_IO // Default V source region is top V region +#endif + +#define ubSRC_Y ubBOT_Y // Loading data are always in byte type +#define ubSRC_U ubBOT_U +#define ubSRC_V ubBOT_V + +#define uwDEST_Y uwTOP_Y // However they can be transferred to word-aligned byte if desired +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of PL3_Load.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,116 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + +#include "PL4x8_Save_NV11.inc" + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + + mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + +///* Yoni - masking is not relevant for ILK?!? +// +// //Use the mask to determine which pixels shouldn't be over-written +// cmp.ge.f0.0 (1) NULLREG BLOCK_MASK_D:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified +// (f0.0) jmpi WritePlanarToDataPort +// +// //If mask is not all 1's, then load the entire 16x8 block +// //so that only those bytes may be modified that need to be (using the mask) +// send (8) SRC_YD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00040000+BI_DEST_Y:ud //16x8 +// +// asr (2) MSGSRC.0<1>:ud ORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's +// mov (1) MSGSRC.2<1>:ud 0x00030007:ud // Block width and height (8x4) +// send (8) SRC_UD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00010000+BI_DEST_U:ud +// send (8) SRC_VD(0)<1> MSGHDR MSGSRC<8;8,1>:ud DWBRMSGDSC+0x00010000+BI_DEST_V:ud +// +// //Restore the origin information +// mov (2) MSGSRC.0<1>:ud ORIX<2;2,1>:w // Block origin +// mov (1) MSGSRC.2<1>:ud 0x0007000F:ud // Block width and height (16x8) +// +// //expand U and V to be aligned on word boundary +// mov (16) SRC_UW(1)<1> SRC_U(0,16) +// mov (16) SRC_UW(0)<1> SRC_U(0, 0) +// mov (16) SRC_VW(1)<1> SRC_V(0,16) +// mov (16) SRC_VW(0)<1> SRC_V(0, 0) +// +// //Merge the data +// mov (1) f0.1:uw BLOCK_MASK_V:uw //Load the mask on flag reg +// (f0.1) mov (8) TEMP0<1>:uw BLOCK_MASK_H:uw +// (-f0.1) mov (8) TEMP0<1>:uw 0:uw +// +// // Destination is Word aligned +// $for(0; +// (-f0.1) mov (16) DEST_Y(0, %1*32)<2> SRC_Y(0, %1*16) +// (-f0.1) mov (16) DEST_U(0, %1*8)<1> SRC_U(0, %1*8) //only works for Word aligned Byte data +// (-f0.1) mov (16) DEST_V(0, %1*8)<1> SRC_V(0, %1*8) //only works for Word aligned Byte data +// +// mov (1) f0.1:uw TEMP(0,1+%1)<0;1,0> +// (-f0.1) mov (16) DEST_Y(0, 1+%1*32)<2> SRC_Y(0, 1+%1*16) +// +// } +// +//*/ Yoni - masking is not relevant for ILK?!? + +WritePlanarToDataPort: + $for(0,0; ub2DEST_Y(%1)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif + +// Save U/V data block in planar format (4x8) ---------------------------------- + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + $for(0,0; ub2DEST_U(%2)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +// End of PL4x8_Save_NV11 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL4x8_Save_NV11.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,90 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//Module name: PL8x4_Save_NV11.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_8 // U/V interleaved block width and height (8x8) +#define nDPW_MSG_SIZE_UV nMSGLEN_2 // # of MRF's to hold U/V block data (2) + +#if (nSRC_REGION==nREGION_1) + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + + #define uwSRC_U uwBOT_U //For masking operation + #define uwSRC_V uwBOT_V + + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + +#elif (nSRC_REGION==nREGION_2) + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + + #define uwSRC_U uwTOP_U //For masking operation + #define uwSRC_V uwTOP_V + + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + +#endif + +///* Yoni - masking is not relevant for ILK?!? +//#define TEMP0 REG(r,54) +//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw +///* Yoni - masking is not relevant for ILK?!? + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL5x8_PL16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL5x8_PL16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL5x8_PL16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL5x8_PL16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,59 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL5x8_PL16x8.asm + +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + avg.sat (16) uwDEST_U(0, %1*32+16) uwDEST_U(0, %1*16+7)<1;2,0> uwDEST_U(0, %1*16+7)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32+16) uwDEST_V(0, %1*16+7)<1;2,0> uwDEST_V(0, %1*16+7)<1;2,1> + avg.sat (16) uwDEST_U(0, %1*32) uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32) uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> + } + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + avg.sat (16) uwDEST_U(0, %1*32+16) uwDEST_U(0, %1*32+18)<1;2,0> uwDEST_U(0, %1*32+18)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32+16) uwDEST_V(0, %1*32+18)<1;2,0> uwDEST_V(0, %1*32+18)<1;2,1> + avg.sat (16) uwDEST_U(0, %1*32) uwDEST_U(0, %1*32)<1;2,0> uwDEST_U(0, %1*32)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*32) uwDEST_V(0, %1*32)<1;2,0> uwDEST_V(0, %1*32)<1;2,1> + } + +// End of PL5x8_PL16x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL5x8_PL8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL5x8_PL8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL5x8_PL8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL5x8_PL8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,51 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL5x8_PL8x8.asm + +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (0; uwDEST_U(0, %1*8)<1;2,1> + avg.sat (8) uwDEST_V(0, %1*8) uwDEST_V(0, %1*8)<1;2,0> uwDEST_V(0, %1*8)<1;2,1> + } + +// End of PL5x8_PL8x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,118 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL8x4_Save_IMC3.asm +// +// Save planar YUV420 frame data block of size 16x8 + +#include "PL8x4_Save_IMC3.inc" + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WritePlanarToDataPort + + //If mask is not all 1's, then load the entire 16x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load 16x8 planar Y ---------------------------------------------------------- + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_Y(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_DESTINATION_Y:ud + // Load 8x4 planar U and V ----------------------------------------------------- + asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // Block width and height (8x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_U(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_U:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_V(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_V:ud + + //expand U and V to be aligned on word boundary - Y remains in bytes + $for (nUV_NUM_OF_ROWS/2-1; >-1; -1) { + mov (16) uwSRC_U(0, %1*16)<1> ubSRC_U(0, %1*16) + mov (16) uwSRC_V(0, %1*16)<1> ubSRC_V(0, %1*16) + } + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + // Destination is Word aligned + $for(0; + (-f0.1) mov (16) ub2DEST_Y(0, %1*32)<2> ubSRC_Y(0, %1*16) + (-f0.1) mov (16) ub2DEST_U(0, %1*8)<1> ubSRC_U(0, %1*8) //only works for Word aligned Byte data + (-f0.1) mov (16) ub2DEST_V(0, %1*8)<1> ubSRC_V(0, %1*8) //only works for Word aligned Byte data + + mov (1) f0.1:uw uwMASK_TEMP(0,1+%1)<0;1,0> + (-f0.1) mov (16) ub2DEST_Y(0, (1+%1)*32)<2> ubSRC_Y(0, (1+%1)*16) + } + +WritePlanarToDataPort: +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + $for(0,0; ub2DEST_Y(%1)REGION(16,2) + mov(16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif +// Save U/V data block in planar format (8x4) ---------------------------------- + asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // Block width and height (8x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +// Save U picture data --------------------------------------------------------- + mov (16) mubMSGPAYLOAD(0,0)<1> ub2DEST_U(0)REGION(16,2) // U rows 0,1 + mov (16) mubMSGPAYLOAD(0,16)<1> ub2DEST_U(1)REGION(16,2) // U rows 2,3 + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_U:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +// Save V picture data --------------------------------------------------------- + mov (16) mubMSGPAYLOAD(0,0)<1> ub2DEST_V(0)REGION(16,2) // V rows 0,1 + mov (16) mubMSGPAYLOAD(0,16)<1> ub2DEST_V(1)REGION(16,2) // V rows 2,3 + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_V:ud + +// End of PL8x4_Save_IMC3 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_IMC3.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,92 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL8x4_Save_IMC3.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // U/V block size 8x4 +#define nDPW_MSG_SIZE_UV nMSGLEN_1 // # of MRF's to hold U/V block data (1) + +// For masking +#undef nDPR_MSG_SIZE_Y +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) +#undef nDPR_MSG_SIZE_UV +#define nDPR_MSG_SIZE_UV nRESLEN_1 // # of MRF's to hold U/V block data (1) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + //For masking operation + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + #define uwSRC_U uwBOT_U + #define uwSRC_V uwBOT_V + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + //For masking operation + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + #define uwSRC_U uwTOP_U + #define uwSRC_V uwTOP_V + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,132 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + +// Module name: PL8x4_Save_NV12.asm +// +// Save entire current planar frame data block of size 16x8 +//--------------------------------------------------------------- +// Symbols needed to be defined before including this module +// +// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned +// ORIX: +//--------------------------------------------------------------- + +#include "PL8x4_Save_NV12.inc" + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + + mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) +#endif + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0 (1) dNULLREG acc0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WritePlanarToDataPort + +//If mask is not all 1's, then load the entire 16x8 block +//so that only those bytes may be modified that need to be (using the mask) + send (8) udSRC_Y(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_Y+nBI_DESTINATION_Y:ud //16x8 + + asr (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud { NoDDChk } // Block width and height (16x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud //move message desrcptor to the message header + send (8) udSRC_U(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +//Restore the origin information + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud //move message desrcptor to the message header + +//Merge the data + mov (1) f0.1:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.1) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw + (-f0.1) mov (8) rMASK_TEMP<1>:uw 0:uw + +//convert the mask from 16bits to 8bits by selecting every other bit + mov (1) udMASK_TEMP1(0,0)<1> 0x00040001:ud + mov (1) udMASK_TEMP1(0,1)<1> 0x00400010:ud + mov (1) udMASK_TEMP1(0,2)<1> 0x04000100:ud + mov (1) udMASK_TEMP1(0,3)<1> 0x40001000:ud + +//merge the loaded block with the current block + $for(0,0; + (-f0.1) mov (16) ubDEST_Y(0,%1*32)<2> ubSRC_Y(0,%1*16) + + and.nz.f0.1 (8) wNULLREG uwMASK_TEMP(0,%1)<0;1,0> uwMASK_TEMP1(0,0) //change the mask by selecting every other bit + (-f0.1) mov (8) ubDEST_U(0, %2*16)<2> ub2SRC_U(0, %1*8)<16;8,2> + (-f0.1) mov (8) ubDEST_V(0, %2*16)<2> ub2SRC_U(0, %1*8+1)<16;8,2> + + mov (1) f0.1:uw uwMASK_TEMP(0,1+%1)<0;1,0> + (-f0.1) mov (16) ubDEST_Y(0, (1+%1)*32)<2> ubSRC_Y(0, (1+%1)*16) + + } + +WritePlanarToDataPort: +#if !defined(SAVE_UV_ONLY) + $for(0,0; ub2DEST_Y(%1)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif + +//** Save 8x4 packed U and V ----------------------------------------------------- +// we could write directly wORIX to mMSGHDR and then execute asr on it, that way we could +// avoid using rMSGSRC as a buffer and have one command less in code, but it is unknown whether +//it is possible to do asr on mMSGHDR so we use rMSGSRC. + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + $for(0,0; ub2DEST_U(%2)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +// End of PL8x4_Save_NV12 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x4_Save_NV12.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,115 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//Module name: PL8x4_Save_NV12.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols +#undef nDPW_BLOCK_SIZE_Y +#undef nDPW_MSG_SIZE_Y +#undef nDPW_BLOCK_SIZE_UV +#undef nDPW_MSG_SIZE_UV + +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // U/V interleaved block width and height (16x4) +#define nDPW_MSG_SIZE_UV nMSGLEN_2 // # of MRF's to hold U/V block data (2) + +// For masking +#undef nDPR_MSG_SIZE_Y +#define nDPR_MSG_SIZE_Y nRESLEN_4 // # of MRF's to hold Y block data (4) +#undef nDPR_MSG_SIZE_UV +#define nDPR_MSG_SIZE_UV nRESLEN_2 +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF +#define rMASK_TEMP1 REG(r,nTEMP1) +.declare udMASK_TEMP1 Base=rMASK_TEMP1 ElementSize=4 SrcRegion=<4;4,1> Type=ud //1 GRF +.declare uwMASK_TEMP1 Base=rMASK_TEMP1 ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + + +#if (nSRC_REGION==nREGION_1) + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + + #define uwSRC_U uwBOT_U //For masking operation + #define uwSRC_V uwBOT_V + + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + + #define ubDEST_Y ubTOP_Y + #define ubDEST_U ubTOP_U + #define ubDEST_V ubTOP_V + + #define ub2SRC_U ub2BOT_U +#elif (nSRC_REGION==nREGION_2) + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + + #define uwSRC_U uwTOP_U //For masking operation + #define uwSRC_V uwTOP_V + + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + + #define ubDEST_Y ubBOT_Y + #define ubDEST_U ubBOT_U + #define ubDEST_V ubBOT_V + + #define ub2SRC_U ub2TOP_U +#endif + +///* Yoni - masking is not relevant for ILK?!? +//#define TEMP0 REG(r,54) +//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw +///* Yoni - masking is not relevant for ILK?!? + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x5_PL8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x5_PL8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x5_PL8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x5_PL8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,57 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL8x5_PL8x8.asm + +#include "Expansion.inc" + +//------------------------------- Vertical Upconversion ------------------------------ + avg.sat (8) uwDEST_U(0, 3*16+8)<1> uwDEST_U(0, 3*8) uwDEST_U(0, (1+3)*8) // Optimization + avg.sat (8) uwDEST_V(0, 3*16+8)<1> uwDEST_V(0, 3*8) uwDEST_V(0, (1+3)*8) // Optimization + + $for(nUV_NUM_OF_ROWS/2-2; >-1; -1) { + mov (8) uwDEST_U(0, (1+%1)*16)<1> uwDEST_U(0, (1+%1)*8) + avg.sat (8) uwDEST_U(0, %1*16+8)<1> uwDEST_U(0, %1*8) uwDEST_U(0, (1+%1)*8) + + mov (8) uwDEST_V(0, (1+%1)*16)<1> uwDEST_V(0, (1+%1)*8) + avg.sat (8) uwDEST_V(0, %1*16+8)<1> uwDEST_V(0, %1*8) uwDEST_V(0, (1+%1)*8) + } + +// End of PL8x5_PL8x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,60 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL8x8_PL8x4.asm +// +// Convert PL 8x8 to PL8x4 in GRF +//--------------------------------------------------------------- +// Symbols needed to be defined before including this module +// +// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned +// ORIX: +//--------------------------------------------------------------- + +#include "PL8x8_PL8x4.inc" + +// Convert PL8x8 to PL8x4 --------------------------------------------------------- + + mov (8) ubDEST_U(0,16)<2> ubDEST_U(1)<16;8,2> //selecting U every other row + mov (16) ubDEST_U(0,32)<2> ubDEST_U(2)<32;8,2> //selecting U every other row + mov (8) ubDEST_V(0,16)<2> ubDEST_V(1)<16;8,2> //selecting V every other row + mov (16) ubDEST_V(0,32)<2> ubDEST_V(2)<32;8,2> //selecting V every other row + +// End of PL8x8_PL8x4.asm ------------------------------------------------------- \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_PL8x4.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,66 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL8x8_PL8x4.inc +// +// Setup module for convert PL8x8 to PL8x4 +// +// + +// Source/destination region definitions +// +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +#if (nSRC_REGION==nREGION_1) + + //REGION_1 selected + #define ubDEST_Y ubTOP_Y + #define ubDEST_U ubTOP_U + #define ubDEST_V ubTOP_V + +#elif (nSRC_REGION==nREGION_2) + + //REGION_2 selected + #define ubDEST_Y ubBOT_Y + #define ubDEST_U ubBOT_U + #define ubDEST_V ubBOT_V + + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,86 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + +// Module name: PL8x8_Save_P208.asm +// +// Save entire current planar frame data block of size 16x8 +//--------------------------------------------------------------- +// Symbols needed to be defined before including this module +// +// DWORD_ALIGNED_DEST: only if DEST_Y, DEST_U, DEST_V data are DWord aligned +// ORIX: +//--------------------------------------------------------------- + +#include "PL8x8_Save_P208.inc" + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +#if !defined(SAVE_UV_ONLY) +// Save current planar frame Y block data (16x8) ------------------------------- + + mov (2) mMSGHDR.0<1>:d wORIX<2;2,1>:w // Block origin + mov (1) mMSGHDR.2<1>:ud nDPW_BLOCK_SIZE_Y:ud // Block width and height (16x8) + +WritePlanarToDataPort: + $for(0,0; ub2DEST_Y(%1)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,16)<1> ub2DEST_Y(%1+1)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_Y+nBI_DESTINATION_Y:ud +#endif + +//** Save 8x8 packed U and V ----------------------------------------------------- +// we could write directly wORIX to mMSGHDR and then execute asr on it, that way we could +// avoid using rMSGSRC as a buffer and have one command less in code, but it is unknown whether +//it is possible to do asr on mMSGHDR so we use rMSGSRC. + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin + + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_UV:ud // U/V block width and height (16x4) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + $for(0,0; ub2DEST_U(%2)REGION(16,2) + mov (16) mubMSGPAYLOAD(%2,1)<2> ub2DEST_V(%2)REGION(16,2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_UV+nBI_DESTINATION_UV:ud + +//End of PL8x8_Save_P208.asm + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_P208.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,91 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + +//Module name: PL8x8_Save_P208.inc +// +// Setup for storing planar data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +#define nDPW_BLOCK_SIZE_Y nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // Y block size 16x8 +#define nDPW_MSG_SIZE_Y nMSGLEN_4 // # of MRF's to hold Y block data (4) +#define nDPW_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // U/V interleaved block width and height (16x8) +#define nDPW_MSG_SIZE_UV nMSGLEN_4 // # of MRF's to hold U/V block data (4) + +#if (nSRC_REGION==nREGION_1) + #define udSRC_Y udBOT_Y_IO + #define udSRC_U udBOT_U_IO + #define udSRC_V udBOT_V_IO + #define ubSRC_Y ubBOT_Y + #define ubSRC_U ubBOT_U + #define ubSRC_V ubBOT_V + + #define uwSRC_U uwBOT_U //For masking operation + #define uwSRC_V uwBOT_V + + #define ub2DEST_Y ub2TOP_Y + #define ub2DEST_U ub2TOP_U + #define ub2DEST_V ub2TOP_V + +#elif (nSRC_REGION==nREGION_2) + #define udSRC_Y udTOP_Y_IO + #define udSRC_U udTOP_U_IO + #define udSRC_V udTOP_V_IO + #define ubSRC_Y ubTOP_Y + #define ubSRC_U ubTOP_U + #define ubSRC_V ubTOP_V + + #define uwSRC_U uwTOP_U //For masking operation + #define uwSRC_V uwTOP_V + + #define ub2DEST_Y ub2BOT_Y + #define ub2DEST_U ub2BOT_U + #define ub2DEST_V ub2BOT_V + +#endif + +///* Yoni - masking is not relevant for ILK?!? +//#define TEMP0 REG(r,54) +//.declare TEMP Base=TEMP0 ElementSize=2 SrcRegion=<8;8,1> Type=uw +///* Yoni - masking is not relevant for ILK?!? + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,101 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL8x8_Save_PA.asm +// +// Save planar YUV422 to packed YUV422 format data +// +// Note: SRC_* must reference to regions with data type "BYTE" +// in order to save to byte-aligned byte location + +#include "PL8x8_Save_PA.inc" + + add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub nDEST_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + + // Pack Y + $for(0; ubSRC_Y(0,%1*32) + } + + // Pack U/V + $for(0; ubSRC_U(0, %1*16) + mov (8) r[pCF_V_OFFSET, %1*nGRFWIB]<4> ubSRC_V(0, %1*16) + } + + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled + mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_YUV:ud { NoDDChk } // Block width and height (32x8) + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WritePackedToDataPort + + //If mask is not all 1's, then load the entire 32x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load 32x8 packed YUV 422 ---------------------------------------------------- + send (8) udSRC_YUV(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_YUV+nBI_DESTINATION_YUV:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + // Destination is Byte aligned + $for(0; + (-f0.1) mov (16) uwDEST_YUV(%1)<1> uwSRC_YUV(%1) //check the UV merge - vK + } + +WritePackedToDataPort: + // Packed YUV data are stored in one of the I/O regions before moving to MRF + // Note: This is necessary since indirect addressing is not supported for MRF. + // Packed data block should be saved as 32x8 pixel block + $for(0; udDEST_YUV(%1)REGION(8,1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_YUV+nBI_DESTINATION_YUV:ud + +// End of PL8x8_Save_PA diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL8x8_Save_PA.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,82 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL8x8_Save_PA.inc +// +// Setup for storing packed data +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_YUV nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // YUV block size 32x8 +#define nDPW_MSG_SIZE_YUV nMSGLEN_8 // # of MRF's to hold YUV block data (8) + +// For masking +#undef nDPR_MSG_SIZE_YUV +#define nDPR_MSG_SIZE_YUV nRESLEN_8 // # of MRF's to hold YUV block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define udSRC_YUV udTOP_Y_IO + #define udDEST_YUV udBOT_Y_IO + #define nDEST_YUV_REG nBOT_Y + //For masking operation + #define ubSRC_Y ub2TOP_Y + #define ubSRC_U ub2TOP_U + #define ubSRC_V ub2TOP_V + #define uwSRC_YUV uwTOP_Y + #define uwDEST_YUV uwBOT_Y + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define udSRC_YUV udBOT_Y_IO + #define udDEST_YUV udTOP_Y_IO + #define nDEST_YUV_REG nTOP_Y + //For masking operation + #define ubSRC_Y ub2BOT_Y + #define ubSRC_U ub2BOT_U + #define ubSRC_V ub2BOT_V + #define uwSRC_YUV uwBOT_Y + #define uwDEST_YUV uwTOP_Y + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL9x5_PL16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL9x5_PL16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL9x5_PL16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL9x5_PL16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,67 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL9x5_PL16x8.asm + +#define EXPAND_9x5 +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (nUV_NUM_OF_ROWS-2; >-1; -1) { + avg.sat (16) uwDEST_U(0, %1*16)<1> uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*16)<1> uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> + } + +#undef nUV_NUM_OF_ROWS +#define nUV_NUM_OF_ROWS 8 //use packed version of all post-processing kernels + +//------------------------------- Vertical Upconversion ------------------------------ + avg.sat (16) uwDEST_U(0, 3*32+16)<1> uwDEST_U(0, 3*16) uwDEST_U(0, (1+3)*16) + avg.sat (16) uwDEST_V(0, 3*32+16)<1> uwDEST_V(0, 3*16) uwDEST_V(0, (1+3)*16) + + $for(nUV_NUM_OF_ROWS/2-2; >-1; -1) { + mov (16) uwDEST_U(0, (1+%1)*32)<1> uwDEST_U(0, (1+%1)*16) + avg.sat (16) uwDEST_U(0, %1*32+16)<1> uwDEST_U(0, %1*16) uwDEST_U(0, (1+%1)*16) + + mov (16) uwDEST_V(0, (1+%1)*32)<1> uwDEST_V(0, (1+%1)*16) + avg.sat (16) uwDEST_V(0, %1*32+16)<1> uwDEST_V(0, %1*16) uwDEST_V(0, (1+%1)*16) + } + +// End of PL9x5_PL16x8 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL9x8_PL16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL9x8_PL16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/PL9x8_PL16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/PL9x8_PL16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,51 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: PL9x5_PL16x8.asm + +#include "Expansion.inc" + +//------------------------------ Horizontal Upconversion ----------------------------- + $for (0; uwDEST_U(0, %1*16)<1;2,0> uwDEST_U(0, %1*16)<1;2,1> + avg.sat (16) uwDEST_V(0, %1*16)<1> uwDEST_V(0, %1*16)<1;2,0> uwDEST_V(0, %1*16)<1;2,1> + } + +// End of PL9x5_PL16x8 \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/readSampler16x1.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/readSampler16x1.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/readSampler16x1.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/readSampler16x1.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,85 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: readSampler16x1.asm +// +// Read one row of pix through sampler +// + + + +//#define SAMPLER_MSG_DSC 0x166A0000 // ILK Sampler Message Descriptor + + + +// Send Message [DevILK] Message Descriptor +// MBZ MsgL=5 MsgR=8 H MBZ SIMD MsgType SmplrIndx BindTab +// 000 0 101 0 1000 1 0 10 0000 0000 00000000 +// 0 A 8 A 0 0 0 0 + +// MsgL=1+2*2(u,v)=5 MsgR=8 + +#define SAMPLER_MSG_DSC 0x0A8A0000 // ILK Sampler Message Descriptor + + + + + + + + // Assume MSGSRC is set already in the caller + //mov (8) rMSGSRC.0<1>:ud 0:ud // Unused fileds + + + + // Read 16 sampled pixels and stored them in float32 in 8 GRFs + // 422 data is expanded to 444, return 8 GRF in the order of RGB- (UYV-). + // 420 data has three surfaces, return 8 GRF. Valid is always in the 1st GRF when in R8. Make sure no overwrite the following 3 GRFs. + // alpha data is expanded to 4444, return 8 GRF in the order of RGBA (UYVA). + + mov(16) mMSGHDR<1>:uw rMSGSRC<16;16,1>:uw + send (16) DATABUF(0)<1> mMSGHDR udDUMMY_NULL 0x2 SAMPLER_MSG_DSC+SAMPLER_IDX+BINDING_IDX:ud + + + + + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,102 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: RGB16x8_Save_RGB16.asm +// +// Save packed RGB565 frame data block of size 16x8 +// +// To save 16x8 block (32x8 byte layout for RGB565) we need 1 send instruction +// ----- +// | 1 | +// ----- + +#include "RGB16x8_Save_RGB16.inc" + +//convert 32 bit RGB to 16 bit RGB + // Truncate A8R8G8B8 to A6R5G6B5 within byte. + // That is keeping 5 MSB of R and B, and 6 MSB of G. + + $for (0, 0; ubDEST_ARGB(%2,0)<32;8,4> 3:w // B >> 3 + + shl (16) uwTEMP_RGB16(0)<1> uwDEST_ARGB(%2,1)<16;8,2> 8:w // R << 8 + and (16) uwTEMP_RGB16(0)<1> uwTEMP_RGB16(0) 0xF800:uw + or (16) uwCSC_TEMP(%1,0)<1> uwCSC_TEMP(%1,0)<16;16,1> uwTEMP_RGB16(0) + + shr (16) uwTEMP_RGB16(0)<1> uwDEST_ARGB(%2,0)<16;8,2> 5:w // G >> 5 + and (16) uwTEMP_RGB16(0)<1> uwTEMP_RGB16(0) 0x07E0:uw + or (16) uwCSC_TEMP(%1,0)<1> uwCSC_TEMP(%1,0)<16;16,1> uwTEMP_RGB16(0) + } + + mov (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w // Block origin (1st quadrant) + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 1:w // H. block origin need to be doubled for byte offset + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_RGB16:ud // Block width and height (32x8) + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WriteRGB16ToDataPort + + //If mask is not all 1's, then load the entire 32x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load 32x8 packed RGB565 ----------------------------------------------------- + send (8) udSRC_RGB16(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_RGB16+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0; + (-f0.1) mov (16) uwCSC_TEMP(%1)<1> uwSRC_RGB16(%1) + } + +WriteRGB16ToDataPort: + // Move packed data to MRF and output + $for(0; udCSC_TEMP(%1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_RGB16+nBI_DESTINATION_RGB:ud + +// End of RGB16x8_Save_RGB16 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB16.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,79 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: RGB16x8_Save_RGB16.inc +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_RGB16 nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // RGB16 block size 32x8 +#define nDPW_MSG_SIZE_RGB16 nMSGLEN_8 // # of MRF's to hold RGB16 block data (8) + +// For conversion to 16bit +.declare uwTEMP_RGB16 Base=REG(r,nTEMP1) ElementSize=2 SrcRegion=<16;16,1> Type=uw //1 GRF + +// For masking +#undef nDPR_MSG_SIZE_RGB16 +#define nDPR_MSG_SIZE_RGB16 nRESLEN_8 // # of MRF's to hold ARGB block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define ubDEST_ARGB ubTOP_Y //Data from previous module + #define uwDEST_ARGB uwTOP_Y //Data from previous module + #define udCSC_TEMP udBOT_Y_IO //Data Converted to 16 bits + #define uwCSC_TEMP uwBOT_Y + //For masking operation + #define udSRC_RGB16 udTOP_Y_IO //To hold the destination data that shouldn't be modified + #define uwSRC_RGB16 uwTOP_Y + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define ubDEST_ARGB ubBOT_Y //Data from previous module + #define uwDEST_ARGB uwBOT_Y //Data from previous module + #define udCSC_TEMP udTOP_Y_IO //Data Converted to 16 bits + #define uwCSC_TEMP uwTOP_Y + //For masking operation + #define udSRC_RGB16 udBOT_Y_IO //To hold the destination data that shouldn't be modified + #define uwSRC_RGB16 uwBOT_Y + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,118 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: RGB16x8_Save_RGB.asm +// +// Save packed ARGB 444 frame data block of size 16x8 +// +// To save 16x8 block (64x8 byte layout for ARGB8888) we need 2 send instructions +// --------- +// | 1 | 2 | +// --------- + +#include "RGB16x8_Save_RGB.inc" + + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 2:w { NoDDClr } // H. block origin need to be quadrupled + mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_ARGB:ud { NoDDChk } // Block width and height (32x8) + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WriteARGBToDataPort + + //If mask is not all 1's, then load the entire 64x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load first block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF00FF00:ud //Check first block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi SkipFirstBlockMerge //If full mask then skip this block + + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 0; + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } + +SkipFirstBlockMerge: + // Load second block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF0000FF:ud //Check second block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi WriteARGBToDataPort //If full mask then skip this block + + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud // Point to 1st part again + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) shr (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw 8:uw //load the mask for second block + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 1; + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } + +WriteARGBToDataPort: + // Move packed data to MRF and output + $for(0; udDEST_ARGB(%1*2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + $for(0; udDEST_ARGB(%1*2+1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + +// End of RGB16x8_Save_RGB diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_RGB.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,68 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: RGB16x8_Save_RGB.inc +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_ARGB nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // ARGB block size 32x8 +#define nDPW_MSG_SIZE_ARGB nMSGLEN_8 // # of MRF's to hold ARGB block data (8) + +// For masking +#undef nDPR_MSG_SIZE_ARGB +#define nDPR_MSG_SIZE_ARGB nRESLEN_8 // # of MRF's to hold ARGB block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define udDEST_ARGB udTOP_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udBOT_Y_IO //To hold the destination data that shouldn't be modified + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define udDEST_ARGB udBOT_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udTOP_Y_IO //To hold the destination data that shouldn't be modified + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,137 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: RGB16x8_Save_Y416.asm +// +// Save packed ARGB 444 frame data block of size 16x8 +// +// To save 16x8 block (128x8 byte layout for ARGB 16bit per component) we need 4 send instructions +// ----------------- +// | 1 | 2 | 3 | 4 | +// ----------------- + +#include "RGB16x8_Save_RGB.inc" + + shl (1) rMSGSRC.0<1>:d wORIX<0;1,0>:w 3:w { NoDDClr } // H. block origin need to become 8 times + mov (1) rMSGSRC.1<1>:d wORIY<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_ARGB:ud { NoDDChk } // Block width and height (32x8) + + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud +/* Not needed for validation kernels for now -vK +//Use the mask to determine which pixels shouldn't be over-written + and (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0x00FFFFFF:ud + cmp.ge.f0.0(1) dNULLREG acc0.0<0;1,0>:ud 0x00FFFFFF:ud //Check if all pixels in the block need to be modified + (f0.0) jmpi WriteARGBToDataPort + + //If mask is not all 1's, then load the entire 64x8 block + //so that only those bytes may be modified that need to be (using the mask) + + // Load first block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF00FF00:ud //Check first block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi SkipFirstBlockMerge //If full mask then skip this block + + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) mov (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw //use sel instruction - vK + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 0; + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } + +SkipFirstBlockMerge: + // Load second block 16x8 packed ARGB 444 --------------------------------------- + or (1) acc0.0<1>:ud udBLOCK_MASK<0;1,0>:ud 0xFF0000FF:ud //Check second block + cmp.e.f0.0 (1) dNULLREG acc0.0<0;1,0>:ud 0xFFFFFFFF:ud + (f0.0) jmpi WriteARGBToDataPort //If full mask then skip this block + + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + send (8) udSRC_ARGB(0)<1> mMSGHDR udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud // Point to 1st part again + + //Merge the data + mov (1) f0.0:uw ubBLOCK_MASK_V:ub //Load the mask on flag reg + (f0.0) shr (8) rMASK_TEMP<1>:uw uwBLOCK_MASK_H:uw 8:uw //load the mask for second block + (-f0.0) mov (8) rMASK_TEMP<1>:uw 0:uw + + $for(0, 1; + (-f0.1) mov (8) udDEST_ARGB(%2)<1> udSRC_ARGB(%1) + } +*/ +WriteARGBToDataPort: + // Move packed data to MRF and output + + //Write 1st 4X8 pixels + $for(0; udDEST_ARGB(%1*4) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + //Write 2nd 4X8 pixels + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 32:d // Point to 2nd part + $for(0; udDEST_ARGB(%1*4+1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + //Write 3rd 4X8 pixels + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 64:d // Point to 2nd part + $for(0; udDEST_ARGB(%1*4+2) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + + //Write 4th 4X8 pixels + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + add (1) mMSGHDR.0<1>:d rMSGSRC.0<0;1,0>:d 96:d // Point to 2nd part + $for(0; udDEST_ARGB(%1*4+3) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_ARGB+nBI_DESTINATION_RGB:ud + +// End of RGB16x8_Save_Y416 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB16x8_Save_Y416.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,68 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: RGB16x8_Save_Y416.inc +// + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + +// For saving +#define nDPW_BLOCK_SIZE_ARGB nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // ARGB block size 32x8 +#define nDPW_MSG_SIZE_ARGB nMSGLEN_8 // # of MRF's to hold ARGB block data (8) + +// For masking +#undef nDPR_MSG_SIZE_ARGB +#define nDPR_MSG_SIZE_ARGB nRESLEN_8 // # of MRF's to hold ARGB block data (8) +#define rMASK_TEMP REG(r,nTEMP0) +.declare uwMASK_TEMP Base=rMASK_TEMP ElementSize=2 SrcRegion=<8;8,1> Type=uw //1 GRF + +#if (nSRC_REGION==nREGION_1) + // For saving + #define udDEST_ARGB udTOP_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udBOT_Y_IO //To hold the destination data that shouldn't be modified + +#elif (nSRC_REGION==nREGION_2) + // For saving + #define udDEST_ARGB udBOT_Y_IO //The output of previous stage is stored here; This is modified and is written to render cache + //For masking operation + #define udSRC_ARGB udTOP_Y_IO //To hold the destination data that shouldn't be modified + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB_Pack.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB_Pack.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGB_Pack.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGB_Pack.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,70 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + +.declare SRC_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare SRC_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare SRC_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare SRC_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw + +#define DEST_ARGB ubBOT_ARGB + +#undef nSRC_REGION +#define nSRC_REGION nREGION_2 + + +//Pack directly to mrf as optimization - vK + +$for(0, 0; <8; 1, 2) { +// mov (16) DEST_ARGB(%2,0)<4> SRC_B(%1) { Compr, NoDDClr } // 16 B +// mov (16) DEST_ARGB(%2,1)<4> SRC_G(%1) { Compr, NoDDClr, NoDDChk } // 16 G +// mov (16) DEST_ARGB(%2,2)<4> SRC_R(%1) { Compr, NoDDClr, NoDDChk } // 16 R //these 2 inst can be merged - vK +// mov (16) DEST_ARGB(%2,3)<4> SRC_A(%1) { Compr, NoDDChk } //DEST_RGB_FORMAT<0;1,0>:ub { Compr, NoDDChk } // 16 A + + mov (8) DEST_ARGB(%2, 0)<4> SRC_B(%1) { NoDDClr } // 8 B + mov (8) DEST_ARGB(%2, 1)<4> SRC_G(%1) { NoDDClr, NoDDChk } // 8 G + mov (8) DEST_ARGB(%2, 2)<4> SRC_R(%1) { NoDDClr, NoDDChk } // 8 R + mov (8) DEST_ARGB(%2, 3)<4> SRC_A(%1) { NoDDChk } // 8 A + + mov (8) DEST_ARGB(%2+1,0)<4> SRC_B(%1,8) { NoDDClr } // 8 B + mov (8) DEST_ARGB(%2+1,1)<4> SRC_G(%1,8) { NoDDClr, NoDDChk } // 8 G + mov (8) DEST_ARGB(%2+1,2)<4> SRC_R(%1,8) { NoDDClr, NoDDChk } // 8 R + mov (8) DEST_ARGB(%2+1,3)<4> SRC_A(%1,8) { NoDDChk } // 8 A +} diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,87 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: RGBA_Load_16x8.asm (copied from AYUV_Load_16x8.asm) +//---------------------------------------------------------------- + + +#include "RGBX_Load_16x8.inc" + +// In order to load 64x8 RGBA data (16x8 pixels), we need to divide the data +// into two regions and load them separately. +// +// 32 byte 32 byte +//|----------------|----------------| +//| | | +//| A | B |8 +//| | | +//| | | +//|----------------|----------------| + +// Load the first 32x8 data block +// Packed data block should be loaded as 32x8 pixel block + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Block origin + shl (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:w 2:w { NoDDClr } // H. block origin need to be four times larger + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_RGBA:ud { NoDDChk } // Block width and height (32x8) + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud + send (8) udSRC_RGBA(0)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_RGBA+nBI_CURRENT_SRC_YUV:ud + +//Load the second 32x8 data block +// Offset the origin X - move to next 32 colomns + add (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 32:w // Increase X origin by 8 + +// Size stays the same - 32x8 + mov (8) mMSGHDRY<1>:ud rMSGSRC<8;8,1>:ud // Copy message description to message header + send (8) udSRC_RGBA(8)<1> mMSGHDRY udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nDPR_MSG_SIZE_RGBA+nBI_CURRENT_SRC_YUV:ud + +// Give AYUV region addresses to address register + // a0.0 is 0x38*32, a0.1 is 0x40*32. 0x40-0x38=8 (pixel) + mov (1) SRC_RGBA_OFFSET<1>:ud 0x00400038*32:ud //Address registers contain starting addresses of two halves + +#if !defined(FIX_POINT_CONVERSION) && !defined(FLOAT_POINT_CONVERSION) + //Directly move the data to destination + $for(0; r[SRC_RGBA_OFFSET,%1*32+3]<8,4>:ub // A/R + mov (16) uwDEST_U(%1)<1> r[SRC_RGBA_OFFSET,%1*32+2]<8,4>:ub // Y/G + mov (16) uwDEST_V(%1)<1> r[SRC_RGBA_OFFSET,%1*32+1]<8,4>:ub // U/B + } +#endif + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,78 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ +#ifndef RGBA_LOAD_16X8_INC +#define RGBA_LOAD_16X8_INC + +// Module name: RGBA_Load_16x8.inc +// +// RGBA data are first loaded to bottom I/O REGION_2, then does color conversion from RGB to YUV +// finally, YUV data are stored in top I/O REGION_1 with planar format + +#undef nY_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block + +#define nDPR_BLOCK_SIZE_RGBA nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // RGBA block size 32x8 (it is half size) +#define nDPR_MSG_SIZE_RGBA nRESLEN_8 // # of MRF's to hold RGBA block data (8) + +//Temporary storage for unpacked AYUV data +#define rUNPACK_TEMP REG(r,nTEMP0) +.declare udUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=4 SrcRegion=<8;8,1> Type=ud //1 GRF +.declare ubUNPACK_TEMP Base=rUNPACK_TEMP ElementSize=1 SrcRegion=<32;32,1> Type=ub //1 GRF + +.declare ubBOT_Y_IO Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(32,1) Type=ub + + +#define udSRC_RGBA udBOT_Y_IO +#define ubSRC_RGBA ubBOT_Y_IO +#define nSRC_RGBA_REG nBOT_Y + +#define uwDEST_Y uwTOP_Y +#define uwDEST_U uwTOP_U +#define uwDEST_V uwTOP_V + +#define SRC_RGBA_OFFSET a0.0 +#define SRC_RGBA_OFFSET_1 a0.0 +#define SRC_RGBA_OFFSET_2 a0.1 + +#define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +// End of RGBA_Load_16x8.inc +#endif \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Fix.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Fix.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Fix.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Fix.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,145 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Authors: + * Halley Zhao + */ + +// Module name: PL16x8_PL8x4.asm +//---------------------------------------------------------------- + +#include "RGBX_Load_16x8.inc" + +#if (0) + #define nTEMP0 34 // transformation coefficient + #define nTEMP1 35 // one row of Y (first half register is used) + #define nTEMP2 36 // first half of one row + #define nTEMP3 37 // second half of one row + #define nTEMP4 38 // mul and add + #define nTEMP5 39 // mul and add + #define nTEMP6 40 // mul and add + #define nTEMP7 41 // mul and add + #define nTEMP8 42 // sum of mul + #define nTEMP10 44 + #define nTEMP12 46 + #define nTEMP14 48 + #define nTEMP16 50 + #define nTEMP17 51 + #define nTEMP18 52 + + #define nTEMP24 58 +#endif + +$for(0; :uw r[SRC_RGBA_OFFSET_1, %1*32 + 0]<0; 16,1>:ub ubRGB_to_Y_Coef_Fix<0;4,1>:ub + mul (16) REG2(r, nTEMP5, 0)<1>:uw r[SRC_RGBA_OFFSET_1, %1*32 + 16]<0; 16,1>:ub ubRGB_to_Y_Coef_Fix<0;4,1>:ub + mul (16) REG2(r, nTEMP6, 0)<1>:uw r[SRC_RGBA_OFFSET_2, %1*32 + 0]<0; 16,1>:ub ubRGB_to_Y_Coef_Fix<0;4,1>:ub + mul (16) REG2(r, nTEMP7, 0)<1>:uw r[SRC_RGBA_OFFSET_2, %1*32 + 16]<0; 16,1>:ub ubRGB_to_Y_Coef_Fix<0;4,1>:ub + + add (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:uw REG2(r, nTEMP4, 1)<0;4,4>:uw + add (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:uw REG2(r, nTEMP5, 1)<0;4,4>:uw + add (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:uw REG2(r, nTEMP6, 1)<0;4,4>:uw + add (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:uw REG2(r, nTEMP7, 1)<0;4,4>:uw + add (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:uw REG2(r, nTEMP4, 2)<0;4,4>:uw + add (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:uw REG2(r, nTEMP5, 2)<0;4,4>:uw + add (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:uw REG2(r, nTEMP6, 2)<0;4,4>:uw + add (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:uw REG2(r, nTEMP7, 2)<0;4,4>:uw + + // #### write Y to the 1 row + mov (4) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP4, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 4)<1>:uw REG2(r, nTEMP5, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 8)<1>:uw REG2(r, nTEMP6, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 12)<1>:uw REG2(r, nTEMP7, 0)<0; 4, 4>:uw + add (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:uw 0x1080:uw + mov (16) REG2(r, nTEMP8, 0)<1>:ub REG2(r, nTEMP8, 1)<0; 16, 2>:ub + mov (16) uwDEST_Y(%1)<1> REG2(r,nTEMP8, 0)<0;16,1>:ub + + // ###### do one row for U + // #### mul and add + mul (16) REG2(r, nTEMP4, 0)<1>:w r[SRC_RGBA_OFFSET_1, %1*32 + 0]<0; 16,1>:ub bRGB_to_U_Coef_Fix<0;4,1>:b + mul (16) REG2(r, nTEMP5, 0)<1>:w r[SRC_RGBA_OFFSET_1, %1*32 + 16]<0; 16,1>:ub bRGB_to_U_Coef_Fix<0;4,1>:b + mul (16) REG2(r, nTEMP6, 0)<1>:w r[SRC_RGBA_OFFSET_2, %1*32 + 0]<0; 16,1>:ub bRGB_to_U_Coef_Fix<0;4,1>:b + mul (16) REG2(r, nTEMP7, 0)<1>:w r[SRC_RGBA_OFFSET_2, %1*32 + 16]<0; 16,1>:ub bRGB_to_U_Coef_Fix<0;4,1>:b + + add (4) REG2(r, nTEMP4, 0)<4>:w REG2(r, nTEMP4, 0)<0;4,4>:w REG2(r, nTEMP4, 1)<0;4,4>:w + add (4) REG2(r, nTEMP5, 0)<4>:w REG2(r, nTEMP5, 0)<0;4,4>:w REG2(r, nTEMP5, 1)<0;4,4>:w + add (4) REG2(r, nTEMP6, 0)<4>:w REG2(r, nTEMP6, 0)<0;4,4>:w REG2(r, nTEMP6, 1)<0;4,4>:w + add (4) REG2(r, nTEMP7, 0)<4>:w REG2(r, nTEMP7, 0)<0;4,4>:w REG2(r, nTEMP7, 1)<0;4,4>:w + add (4) REG2(r, nTEMP4, 0)<4>:w REG2(r, nTEMP4, 0)<0;4,4>:w REG2(r, nTEMP4, 2)<0;4,4>:w + add (4) REG2(r, nTEMP5, 0)<4>:w REG2(r, nTEMP5, 0)<0;4,4>:w REG2(r, nTEMP5, 2)<0;4,4>:w + add (4) REG2(r, nTEMP6, 0)<4>:w REG2(r, nTEMP6, 0)<0;4,4>:w REG2(r, nTEMP6, 2)<0;4,4>:w + add (4) REG2(r, nTEMP7, 0)<4>:w REG2(r, nTEMP7, 0)<0;4,4>:w REG2(r, nTEMP7, 2)<0;4,4>:w + + // #### write U to the 1 row + mov (4) REG2(r, nTEMP8, 0)<1>:w REG2(r, nTEMP4, 0)<0; 4, 4>:w + mov (4) REG2(r, nTEMP8, 4)<1>:w REG2(r, nTEMP5, 0)<0; 4, 4>:w + mov (4) REG2(r, nTEMP8, 8)<1>:w REG2(r, nTEMP6, 0)<0; 4, 4>:w + mov (4) REG2(r, nTEMP8, 12)<1>:w REG2(r, nTEMP7, 0)<0; 4, 4>:w + add (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:w 0x8080:uw + mov (16) REG2(r, nTEMP8, 0)<1>:ub REG2(r, nTEMP8, 1)<0; 16, 2>:ub + mov (16) uwDEST_U(%1)<1> REG2(r,nTEMP8, 0)<0;16,1>:ub + + // ###### do one row for V + // #### mul and add + mul (16) REG2(r, nTEMP4, 0)<1>:w r[SRC_RGBA_OFFSET_1, %1*32 + 0]<0; 16,1>:ub bRGB_to_V_Coef_Fix<0;4,1>:b + mul (16) REG2(r, nTEMP5, 0)<1>:w r[SRC_RGBA_OFFSET_1, %1*32 + 16]<0; 16,1>:ub bRGB_to_V_Coef_Fix<0;4,1>:b + mul (16) REG2(r, nTEMP6, 0)<1>:w r[SRC_RGBA_OFFSET_2, %1*32 + 0]<0; 16,1>:ub bRGB_to_V_Coef_Fix<0;4,1>:b + mul (16) REG2(r, nTEMP7, 0)<1>:w r[SRC_RGBA_OFFSET_2, %1*32 + 16]<0; 16,1>:ub bRGB_to_V_Coef_Fix<0;4,1>:b + + add (4) REG2(r, nTEMP4, 0)<4>:w REG2(r, nTEMP4, 0)<0;4,4>:w REG2(r, nTEMP4, 1)<0;4,4>:w + add (4) REG2(r, nTEMP5, 0)<4>:w REG2(r, nTEMP5, 0)<0;4,4>:w REG2(r, nTEMP5, 1)<0;4,4>:w + add (4) REG2(r, nTEMP6, 0)<4>:w REG2(r, nTEMP6, 0)<0;4,4>:w REG2(r, nTEMP6, 1)<0;4,4>:w + add (4) REG2(r, nTEMP7, 0)<4>:w REG2(r, nTEMP7, 0)<0;4,4>:w REG2(r, nTEMP7, 1)<0;4,4>:w + add (4) REG2(r, nTEMP4, 0)<4>:w REG2(r, nTEMP4, 0)<0;4,4>:w REG2(r, nTEMP4, 2)<0;4,4>:w + add (4) REG2(r, nTEMP5, 0)<4>:w REG2(r, nTEMP5, 0)<0;4,4>:w REG2(r, nTEMP5, 2)<0;4,4>:w + add (4) REG2(r, nTEMP6, 0)<4>:w REG2(r, nTEMP6, 0)<0;4,4>:w REG2(r, nTEMP6, 2)<0;4,4>:w + add (4) REG2(r, nTEMP7, 0)<4>:w REG2(r, nTEMP7, 0)<0;4,4>:w REG2(r, nTEMP7, 2)<0;4,4>:w + + // #### write V to the 1 row + mov (4) REG2(r, nTEMP8, 0)<1>:w REG2(r, nTEMP4, 0)<0; 4, 4>:w + mov (4) REG2(r, nTEMP8, 4)<1>:w REG2(r, nTEMP5, 0)<0; 4, 4>:w + mov (4) REG2(r, nTEMP8, 8)<1>:w REG2(r, nTEMP6, 0)<0; 4, 4>:w + mov (4) REG2(r, nTEMP8, 12)<1>:w REG2(r, nTEMP7, 0)<0; 4, 4>:w + add (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:w 0x8080:uw + mov (16) REG2(r, nTEMP8, 0)<1>:ub REG2(r, nTEMP8, 1)<0; 16, 2>:ub + mov (16) uwDEST_V(%1)<1> REG2(r,nTEMP8, 0)<0;16,1>:ub +} + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Float.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Float.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Float.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_Save_YUV_Float.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,182 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Authors: + * Halley Zhao + */ + +// Module name: RGBX_Save_YUV_Float.asm +//---------------------------------------------------------------- + +#include "RGBX_Load_16x8.inc" + +#if (0) + // 8 grf reg for one row of pixel (2 pixel per grf) + #define nTEMP0 34 + #define nTEMP1 35 + #define nTEMP2 36 + #define nTEMP3 37 + #define nTEMP4 38 + #define nTEMP5 39 + #define nTEMP6 40 + #define nTEMP7 41 + + #define nTEMP8 42 // transformation coefficient + #define nTEMP10 44 // transformation coefficient + + #define nTEMP12 46 // save Y/U/V in ub format + #define nTEMP14 48 // save YUV in ud format + #define nTEMP16 50 // dp4 result + #define nTEMP17 51 + #define nTEMP18 52 + + #define nTEMP24 58 +#endif + +$for(0; :f r[SRC_RGBA_OFFSET_1,%1*32 + 0]<4,1>:ub + mov (4) REG(r, nTEMP1)<1>:f r[SRC_RGBA_OFFSET_1,%1*32 + 8]<4,1>:ub + mov (4) REG(r, nTEMP2)<1>:f r[SRC_RGBA_OFFSET_1,%1*32 + 16]<4,1>:ub + mov (4) REG(r, nTEMP3)<1>:f r[SRC_RGBA_OFFSET_1,%1*32 + 24]<4,1>:ub + mov (4) REG(r, nTEMP4)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 0]<4,1>:ub + mov (4) REG(r, nTEMP5)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 8]<4,1>:ub + mov (4) REG(r, nTEMP6)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 16]<4,1>:ub + mov (4) REG(r, nTEMP7)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 24]<4,1>:ub + mov (4) REG2(r, nTEMP0, 4)<1>:f r[SRC_RGBA_OFFSET_1,%1*32 + 4]<4,1>:ub + mov (4) REG2(r, nTEMP1, 4)<1>:f r[SRC_RGBA_OFFSET_1,%1*32 + 12]<4,1>:ub + mov (4) REG2(r, nTEMP2, 4)<1>:f r[SRC_RGBA_OFFSET_1,%1*32 + 20]<4,1>:ub + mov (4) REG2(r, nTEMP3, 4)<1>:f r[SRC_RGBA_OFFSET_1,%1*32 + 28]<4,1>:ub + mov (4) REG2(r, nTEMP4, 4)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 4]<4,1>:ub + mov (4) REG2(r, nTEMP5, 4)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 12]<4,1>:ub + mov (4) REG2(r, nTEMP6, 4)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 20]<4,1>:ub + mov (4) REG2(r, nTEMP7, 4)<1>:f r[SRC_RGBA_OFFSET_2,%1*32 + 24]<4,1>:ub + + // ###### do one row for Y + // ##### dp4(nTEMP16) and save result to uw format(nTEMP12) + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(0, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 0)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(1, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 2)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(2, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 4)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(3, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 6)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(4, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 8)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(5, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 10)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(6, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 12)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(7, 0)<0;8,1> fRGB_to_Y_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 14)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + // #### write Y to the 1 row + mov (16) uwDEST_Y(%1)<1> REG2(r,nTEMP12, 0)<0;16,1>:ub + + // ###### do one row for U + // ##### dp4(nTEMP16) and save result to uw format(nTEMP12) + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(0, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 0)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(1, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 2)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(2, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 4)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(3, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 6)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(4, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 8)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(5, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 10)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(6, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 12)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(7, 0)<0;8,1> fRGB_to_U_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 14)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + add (16) REG2(r, nTEMP12, 0)<1>:w REG2(r, nTEMP12, 0)<0;16,1>:w 128:w + // #### write U to the 1 row + mov (16) uwDEST_U(%1)<1> REG2(r,nTEMP12, 0)<0;16,2>:ub + + // ###### do one row for V + // ##### dp4(nTEMP16) and save result to uw format(nTEMP12) + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(0, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 0)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(1, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 2)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(2, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 4)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(3, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 6)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(4, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 8)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(5, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 10)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(6, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 12)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_BGRX(7, 0)<0;8,1> fRGB_to_V_Coef_Float<0;4,1>:f + mov (2) REG2(r, nTEMP14, 0)<1>:d REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 14)<1>:w REG2(r, nTEMP14, 0)<0;2,2>:w + add (16) REG2(r, nTEMP12, 0)<1>:w REG2(r, nTEMP12, 0)<0;16,1>:w 128:w + + // #### write V to the 1 row + mov (16) uwDEST_V(%1)<1> REG2(r,nTEMP12, 0)<0;16,2>:ub +} diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_to_YUV_Coef.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_to_YUV_Coef.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/RGBX_to_YUV_Coef.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/RGBX_to_YUV_Coef.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,94 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Authors: + * Halley Zhao + */ + +// Module name: RGB_to_YUV_Coef.asm +//---------------------------------------------------------------- + +// is src surface |R|G|B|X| layout? otherwise it is |B|G|R|X| +and.nz.f0.1 (1) dNULLREG r1.1:ud 0xFF000000:ud +#ifdef FIX_POINT_CONVERSION + // Y = ( ( 66 * R + 129 * G + 25 * B + 128 ) >> 8) + 16 + (-f0.1) mov (1) REG2(r, nTEMP0, 0):ud 0x00428119:ud // used as unsigned byte + ( f0.1) mov (1) REG2(r, nTEMP0, 0):ud 0x00198142:ud // used as unsigned byte + // U = ( ( -38 * R - 74 * G + 112 * B + 128 ) >> 8) + 128 + (-f0.1) mov (1) REG2(r, nTEMP0, 1):ud 0x00DAB670:ud // used as signed byte + ( f0.1) mov (1) REG2(r, nTEMP0, 1):ud 0x0070B6DA:ud // used as signed byte + // V = ( ( 112 * R - 94 * G - 18 * B + 128 ) >> 8) + 128 + (-f0.1) mov (1) REG2(r, nTEMP0, 2):ud 0x0070A2EEud // used as signed byte + ( f0.1) mov (1) REG2(r, nTEMP0, 2):ud 0x00EEA270ud // used as signed byte + + #define ubRGB_to_Y_Coef_Fix REG2(r, nTEMP0, 0) + #define bRGB_to_U_Coef_Fix REG2(r, nTEMP0, 4) + #define bRGB_to_V_Coef_Fix REG2(r, nTEMP0, 8) +#else + // Y = 0.299R + 0.587G + 0.114B + (-f0.1) mov (1) REG2(r, nTEMP8, 0):f 0.114f // B coef + ( f0.1) mov (1) REG2(r, nTEMP8, 2):f 0.114f // R coef + mov (1) REG2(r, nTEMP8, 1):f 0.587f // G coef + (-f0.1) mov (1) REG2(r, nTEMP8, 2):f 0.299f // R coef + ( f0.1) mov (1) REG2(r, nTEMP8, 0):f 0.299f // B coef + mov (1) REG2(r, nTEMP8, 3):f 0.000f // A coef + + // Cb= -0.169R - 0.331G + 0.499B + 128 + // U = -0.147R - 0.289G + 0.436B + 128 + (-f0.1) mov (1) REG2(r, nTEMP8, 4):f 0.436f // B coef + ( f0.1) mov (1) REG2(r, nTEMP8, 6):f 0.436f // R coef + mov (1) REG2(r, nTEMP8, 5):f -0.289f // G coef + (-f0.1) mov (1) REG2(r, nTEMP8, 6):f -0.147f // R coef + ( f0.1) mov (1) REG2(r, nTEMP8, 4):f -0.147f // B coef + mov (1) REG2(r, nTEMP8, 7):f 0.000f // A coef + + // Cr= 0.499R - 0.418G - 0.0813B+ 128 + // V = 0.615R - 0.515G - 0.100B + 128 + (-f0.1) mov (1) REG2(r, nTEMP10, 0):f -0.100f // B coef + ( f0.1) mov (1) REG2(r, nTEMP10, 2):f -0.100f // R coef + mov (1) REG2(r, nTEMP10, 1):f -0.515f // G coef + (-f0.1) mov (1) REG2(r, nTEMP10, 2):f 0.615f // R coef + ( f0.1) mov (1) REG2(r, nTEMP10, 0):f 0.615f // B coef + mov (1) REG2(r, nTEMP10, 3):f 0.000f // A coef + + #define fRGB_to_Y_Coef_Float REG2(r, nTEMP8, 0) + #define fRGB_to_U_Coef_Float REG2(r, nTEMP8, 4) + #define fRGB_to_V_Coef_Float REG2(r, nTEMP10, 0) + .declare fROW_BGRX Base=REG(r,nTEMP0) ElementSize=4 SrcRegion=REGION(8,8) Type=f // r nTEMP0 - r nTEMP7 +#endif + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/SetupVPKernel.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/SetupVPKernel.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/SetupVPKernel.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/SetupVPKernel.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,64 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Modual name: SetupVPKernel.asm +// +// Initial setup for running video-processing kernels +// + +#include "common.inc" + +// +// Now, begin source code.... +// +.code + +#include "Init_All_Regs.asm" + +mov (8) rMSGSRC.0<1>:ud r0.0<8;8,1>:ud // Initialize message payload header with R0 +#if defined (INC_BLENDING) + mul (1) fALPHA_STEP_X:f fSCALING_STEP_RATIO:f fVIDEO_STEP_X:f //StepX_ratio = AlphaStepX / VideoStepX +#endif + +// End of SetupVPKernel + + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/undefall.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/undefall.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/undefall.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/undefall.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,95 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Modual name: undefall.inc +// +// undefine all global symbol for new process +// + +//Source definitions +#undef ubSRC_Y +#undef ubSRC_U +#undef ubSRC_V + +#undef ub2SRC_Y +#undef ub2SRC_U +#undef ub2SRC_V + +#undef ub4SRC_Y +#undef ub4SRC_U +#undef ub4SRC_V + +#undef uwSRC_Y +#undef uwSRC_U +#undef uwSRC_V + +#undef udSRC_Y +#undef udSRC_U +#undef udSRC_V + +#undef udSRC_YUV +#undef nSRC_YUV_REG + +//Destination definitions +#undef ubDEST_Y +#undef ubDEST_U +#undef ubDEST_V + +#undef ub2DEST_Y +#undef ub2DEST_U +#undef ub2DEST_V + +#undef ub4DEST_Y +#undef ub4DEST_U +#undef ub4DEST_V + +#undef uwDEST_Y +#undef uwDEST_U +#undef uwDEST_V + +#undef udDEST_Y +#undef udDEST_U +#undef udDEST_V + +#undef udDEST_YUV +#undef nDEST_YUV_REG +#undef ubDEST_ARGB + +// End of undefall.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/YUV_to_RGBX_Coef.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/YUV_to_RGBX_Coef.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/YUV_to_RGBX_Coef.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/YUV_to_RGBX_Coef.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,129 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Authors: + * Halley Zhao + */ + +// Module name: YUV_to_RGBX_Coef.asm +//---------------------------------------------------------------- +#define ubDEST_RGBX ubTOP_Y // I'd like use them for color conversion + +// is dst surface |R|G|B|X| layout? otherwise, it is |B|G|R|X| layout +and.nz.f0.1 (1) dNULLREG r1.2:ud 0xFF000000:ud +#ifdef FIX_POINT_CONVERSION + // ###### set up transformation coefficient + // R = clip(( 298 * C + 0 * D + 409 * E + 128) >> 8) + // R = clip((0x012A * C + 0 * D + 0x0199 * E + 128) >> 8) + (-f0.1) mov (1) REG2(r, nTEMP0, 0):ud 0x0000012A:ud + (-f0.1) mov (1) REG2(r, nTEMP0, 1):ud 0x00000199:ud + ( f0.1) mov (1) REG2(r, nTEMP0, 4):ud 0x0000012A:ud + ( f0.1) mov (1) REG2(r, nTEMP0, 5):ud 0x00000199:ud + + // G = clip(( 298 * C - 100 * D - 208 * E + 128) >> 8) + // G = clip(( 0x012A * C - 0x64 * D - 0xD0 * E + 128) >> 8) + // G = clip(( 0x012A * C + 0xFF9C * D + 0xFF30 * E + 128) >> 8) + mov (1) REG2(r, nTEMP0, 2):ud 0xFF9C012A:ud + mov (1) REG2(r, nTEMP0, 3):ud 0x0000FF30:ud + + // B = clip(( 298 * C + 516 * D + 0 * E + 128) >> 8) + // B = clip((0x012A* C + 0x0204 * D + 0 * E + 128) >> 8) + (-f0.1) mov (1) REG2(r, nTEMP0, 4):ud 0x0204012A:ud + (-f0.1) mov (1) REG2(r, nTEMP0, 5):ud 0x00000000:ud + ( f0.1) mov (1) REG2(r, nTEMP0, 0):ud 0x0204012A:ud + ( f0.1) mov (1) REG2(r, nTEMP0, 1):ud 0x00000000:ud + + // asr.sat (24) REG2(r,nTEMP0,0)<1> REG2(r,nTEMP0,0)<0;24,1> 1:w + asr.sat (8) REG2(r,nTEMP0, 0)<1>:w REG2(r,nTEMP0, 0)<0;8,1>:w 1:w + asr.sat (4) REG2(r,nTEMP0,8)<1>:w REG2(r,nTEMP0,8)<0;4,1>:w 1:w + + // C = Y' - 16 D = U - 128 E = V - 128 + mov (1) REG2(r, nTEMP0, 6):ud 0x008080F0:ud + + #define wYUV_to_RGB_CH2_Coef_Fix REG2(r, nTEMP0, 0) + #define wYUV_to_RGB_CH1_Coef_Fix REG2(r, nTEMP0, 4) + #define wYUV_to_RGB_CH0_Coef_Fix REG2(r, nTEMP0, 8) + #define bYUV_OFF REG2(r,nTEMP0,24) + + // debug use + #define bYUV_to_RGB_CH2_Coef_Fix REG2(r, nTEMP0, 0) + #define bYUV_to_RGB_CH1_Coef_Fix REG2(r, nTEMP0, 8) + #define bYUV_to_RGB_CH0_Coef_Fix REG2(r, nTEMP0, 16) + +#else + // R = Y + 1.13983*V + // R = clip( Y + 1.402*(Cr-128)) // ITU-R + (-f0.1) mov (1) REG2(r, nTEMP8, 3):f 0.000f // A coef + (-f0.1) mov (1) REG2(r, nTEMP8, 2):f 1.402f // V coef + (-f0.1) mov (1) REG2(r, nTEMP8, 1):f 0.0f // U coef + (-f0.1) mov (1) REG2(r, nTEMP8, 0):f 1.0f // Y coef + + ( f0.1) mov (1) REG2(r, nTEMP10, 3):f 0.000f // A coef + ( f0.1) mov (1) REG2(r, nTEMP10, 2):f 1.402f // V coef + ( f0.1) mov (1) REG2(r, nTEMP10, 1):f 0.0f // U coef + ( f0.1) mov (1) REG2(r, nTEMP10, 0):f 1.0f // Y coef + + // G = Y - 0.39465*U - 0.58060*V + // G = clip( Y - 0.344*(Cb-128) - 0.714*(Cr-128)) + mov (1) REG2(r, nTEMP8, 7):f 0.000f // A coef + mov (1) REG2(r, nTEMP8, 6):f -0.714f // V coef + mov (1) REG2(r, nTEMP8, 5):f -0.344f // U coef + mov (1) REG2(r, nTEMP8, 4):f 1.0f // Y coef + + // B = Y + 2.03211*U + // B = clip( Y + 1.772*(Cb-128)) + (-f0.1) mov (1) REG2(r, nTEMP10, 3):f 0.000f // A coef + (-f0.1) mov (1) REG2(r, nTEMP10, 2):f 0.0f // V coef + (-f0.1) mov (1) REG2(r, nTEMP10, 1):f 1.772f // U coef + (-f0.1) mov (1) REG2(r, nTEMP10, 0):f 1.0f // Y coef + + ( f0.1) mov (1) REG2(r, nTEMP8, 3):f 0.000f // A coef + ( f0.1) mov (1) REG2(r, nTEMP8, 2):f 0.0f // V coef + ( f0.1) mov (1) REG2(r, nTEMP8, 1):f 1.772f // U coef + ( f0.1) mov (1) REG2(r, nTEMP8, 0):f 1.0f // Y coef + + mov (1) REG2(r, nTEMP10, 4):ud 0x008080F0:ud + + #define fYUV_to_RGB_CH2_Coef_Float REG2(r, nTEMP8, 0) + #define fYUV_to_RGB_CH1_Coef_Float REG2(r, nTEMP8, 4) + #define fYUV_to_RGB_CH0_Coef_Float REG2(r, nTEMP10, 0) + #define bYUV_OFF REG2(r,nTEMP10,16) + + .declare fROW_YUVA Base=REG(r,nTEMP0) ElementSize=4 SrcRegion=REGION(8,8) Type=f // r nTEMP0 - r nTEMP7 + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Fix.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Fix.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Fix.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Fix.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,200 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Authors: + * Halley Zhao + */ + +// Module name: YUVX_Save_RGBX_Fix.asm +//---------------------------------------------------------------- + +#include "RGBX_Load_16x8.inc" + +#if (0) + #define nTEMP0 34 // transformation coefficient + #define nTEMP1 35 // one row of R (first half register is used) + #define nTEMP2 36 // one row of G (first half register is used) + #define nTEMP3 37 // one row of B (first half register is used) + #define nTEMP4 38 // mul and add + #define nTEMP5 39 // mul and add + #define nTEMP6 40 // mul and add + #define nTEMP7 41 // mul and add + #define nTEMP8 42 // sum of mul + #define nTEMP10 44 + #define nTEMP10 44 // split ub pixel to word width 1st quarter + #define nTEMP12 46 // split ub pixel to word width 2nd quarter + #define nTEMP14 48 // split ub pixel to word width 3rd quarter + #define nTEMP16 50 // split ub pixel to word width 4th quarter + #define nTEMP17 51 + #define nTEMP18 52 + + #define nTEMP24 58 // temp using for repeat U/V in NV12_Load_8x4.asm +#endif + +#define ONE_ROW_DEBUG 0 + +#if (ONE_ROW_DEBUG) + #define ROW_NUM 0 + #define DBG_ROWNUM_BASE 1 + CHANNEL_2 2 +#else + #define ROW_NUM %1 + $for(0; :w ubDEST_RGBX(0,ROW_NUM*64 )<0;16,1> bYUV_OFF<0;4,1>:b + add (16) REG2(r,nTEMP12,0)<1>:w ubDEST_RGBX(0,ROW_NUM*64+16)<0;16,1> bYUV_OFF<0;4,1>:b + add (16) REG2(r,nTEMP14,0)<1>:w ubDEST_RGBX(0,ROW_NUM*64+32)<0;16,1> bYUV_OFF<0;4,1>:b + add (16) REG2(r,nTEMP16,0)<1>:w ubDEST_RGBX(0,ROW_NUM*64+48)<0;16,1> bYUV_OFF<0;4,1>:b + +#if (ONE_ROW_DEBUG) + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64 )<1> REG2(r,nTEMP10, 0)<0;16,2>:ub + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64+16)<1> REG2(r,nTEMP12, 0)<0;16,2>:ub + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64+32)<1> REG2(r,nTEMP14, 0)<0;16,2>:ub + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64+48)<1> REG2(r,nTEMP16, 0)<0;16,2>:ub +#endif + + // |Y|U|V|X|==>|R|G|B|X| + // ###### do one row for R + // #### mul and add + mul.sat (16) REG2(r, nTEMP4, 0)<1>:w REG2(r,nTEMP10,0)<0;16,1>:w wYUV_to_RGB_CH2_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP5, 0)<1>:w REG2(r,nTEMP12,0)<0;16,1>:w wYUV_to_RGB_CH2_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP6, 0)<1>:w REG2(r,nTEMP14,0)<0;16,1>:w wYUV_to_RGB_CH2_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP7, 0)<1>:w REG2(r,nTEMP16,0)<0;16,1>:w wYUV_to_RGB_CH2_Coef_Fix<0;4,1>:w + + #if (ONE_ROW_DEBUG) + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+1)*64+CHANNEL_2 )<4> bYUV_to_RGB_CH2_Coef_Fix<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+1)*64+CHANNEL_2+32)<4> bYUV_to_RGB_CH2_Coef_Fix<0;8,1>:ub + + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL_2 )<4> REG2(r,nTEMP4, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL_2+32)<4> REG2(r,nTEMP4, 8)<0;8,1>:ub + #endif + + add.sat (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:w REG2(r, nTEMP4, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:w REG2(r, nTEMP5, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:w REG2(r, nTEMP6, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:w REG2(r, nTEMP7, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:uw REG2(r, nTEMP4, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:uw REG2(r, nTEMP5, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:uw REG2(r, nTEMP6, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:uw REG2(r, nTEMP7, 2)<0;4,4>:w + + // #### write one row of R to rnTEMP1 + mov (4) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP4, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 4)<1>:uw REG2(r, nTEMP5, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 8)<1>:uw REG2(r, nTEMP6, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 12)<1>:uw REG2(r, nTEMP7, 0)<0; 4, 4>:uw + + #if (ONE_ROW_DEBUG) + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL_2 )<4> REG2(r,nTEMP8, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL_2+32)<4> REG2(r,nTEMP8, 8)<0;8,1>:ub + #endif + + add.sat (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:uw 0x80:uw + shl.sat (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:uw 1:w + mov (16) REG2(r, nTEMP1, 0)<1>:ub REG2(r, nTEMP8, 1)<0; 16, 2>:ub + + #if (ONE_ROW_DEBUG) + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL_2 )<4> REG2(r,nTEMP8, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL_2+32)<4> REG2(r,nTEMP8, 8)<0;8,1>:ub + #endif + // ###### do one row for G + // #### mul and add + mul.sat (16) REG2(r, nTEMP4, 0)<1>:w REG2(r,nTEMP10,0)<0;16,1>:w wYUV_to_RGB_CH1_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP5, 0)<1>:w REG2(r,nTEMP12,0)<0;16,1>:w wYUV_to_RGB_CH1_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP6, 0)<1>:w REG2(r,nTEMP14,0)<0;16,1>:w wYUV_to_RGB_CH1_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP7, 0)<1>:w REG2(r,nTEMP16,0)<0;16,1>:w wYUV_to_RGB_CH1_Coef_Fix<0;4,1>:w + + add.sat (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:w REG2(r, nTEMP4, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:w REG2(r, nTEMP5, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:w REG2(r, nTEMP6, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:w REG2(r, nTEMP7, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:uw REG2(r, nTEMP4, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:uw REG2(r, nTEMP5, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:uw REG2(r, nTEMP6, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:uw REG2(r, nTEMP7, 2)<0;4,4>:w + + // #### write one row of G to rnTEMP2 + mov (4) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP4, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 4)<1>:uw REG2(r, nTEMP5, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 8)<1>:uw REG2(r, nTEMP6, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 12)<1>:uw REG2(r, nTEMP7, 0)<0; 4, 4>:uw + + add (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:uw 0x80:uw // saturation + shl.sat (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:uw 1:w + mov (16) REG2(r, nTEMP2, 0)<1>:ub REG2(r, nTEMP8, 1)<0; 16, 2>:ub + + // ###### do one row for B + // #### mul and add + mul.sat (16) REG2(r, nTEMP4, 0)<1>:w REG2(r,nTEMP10,0)<0;16,1>:w wYUV_to_RGB_CH0_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP5, 0)<1>:w REG2(r,nTEMP12,0)<0;16,1>:w wYUV_to_RGB_CH0_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP6, 0)<1>:w REG2(r,nTEMP14,0)<0;16,1>:w wYUV_to_RGB_CH0_Coef_Fix<0;4,1>:w + mul.sat (16) REG2(r, nTEMP7, 0)<1>:w REG2(r,nTEMP16,0)<0;16,1>:w wYUV_to_RGB_CH0_Coef_Fix<0;4,1>:w + + // I had reduced the following add because U coef is zero for B; but in order to support BGR/RGB at the same time, I have to add it back. + add.sat (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:w REG2(r, nTEMP4, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:w REG2(r, nTEMP5, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:w REG2(r, nTEMP6, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:w REG2(r, nTEMP7, 1)<0;4,4>:w + add.sat (4) REG2(r, nTEMP4, 0)<4>:uw REG2(r, nTEMP4, 0)<0;4,4>:uw REG2(r, nTEMP4, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP5, 0)<4>:uw REG2(r, nTEMP5, 0)<0;4,4>:uw REG2(r, nTEMP5, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP6, 0)<4>:uw REG2(r, nTEMP6, 0)<0;4,4>:uw REG2(r, nTEMP6, 2)<0;4,4>:w + add.sat (4) REG2(r, nTEMP7, 0)<4>:uw REG2(r, nTEMP7, 0)<0;4,4>:uw REG2(r, nTEMP7, 2)<0;4,4>:w + + // #### write one row of B to rnTEMP3 + mov (4) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP4, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 4)<1>:uw REG2(r, nTEMP5, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 8)<1>:uw REG2(r, nTEMP6, 0)<0; 4, 4>:uw + mov (4) REG2(r, nTEMP8, 12)<1>:uw REG2(r, nTEMP7, 0)<0; 4, 4>:uw + + add.sat (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:uw 0x80:uw // saturation + shl.sat (16) REG2(r, nTEMP8, 0)<1>:uw REG2(r, nTEMP8, 0)<0; 16, 1>:uw 1:w + mov (16) REG2(r, nTEMP3, 0)<1>:ub REG2(r, nTEMP8, 1)<0; 16, 2>:ub + + // B + mov (8) ubDEST_RGBX(0,ROW_NUM*64 )<4> REG2(r,nTEMP3, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,ROW_NUM*64+32)<4> REG2(r,nTEMP3, 8)<0;8,1>:ub + // G + mov (8) ubDEST_RGBX(0,ROW_NUM*64+1 )<4> REG2(r,nTEMP2, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,ROW_NUM*64+1+32)<4> REG2(r,nTEMP2, 8)<0;8,1>:ub + // R + mov (8) ubDEST_RGBX(0,ROW_NUM*64+2 )<4> REG2(r,nTEMP1, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,ROW_NUM*64+2+32)<4> REG2(r,nTEMP1, 8)<0;8,1>:ub +#if (!ONE_ROW_DEBUG) + } +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Float.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Float.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Float.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Common/YUVX_Save_RGBX_Float.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,317 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Authors: + * Halley Zhao + */ + +// Module name: YUVX_Save_RGBX_Float.asm +//---------------------------------------------------------------- + +#include "RGBX_Load_16x8.inc" + +#if (0) + // 8 grf reg for one row of pixel (2 pixel per grf) + #define nTEMP0 34 + #define nTEMP1 35 + #define nTEMP2 36 + #define nTEMP3 37 + #define nTEMP4 38 + #define nTEMP5 39 + #define nTEMP6 40 + #define nTEMP7 41 + + #define nTEMP8 42 // transformation coefficient + #define nTEMP10 44 // transformation coefficient + + #define nTEMP12 46 // save Y/U/V in ub format + #define nTEMP14 48 // save YUV in ud format + #define nTEMP16 50 // dp4 result + #define nTEMP17 51 + #define nTEMP18 52 // temp used for repeat U/V in NV12_Load_8x4.asm + + #define nTEMP24 58 // it is not safe to use in my case. I try to use it for repeat U/V in NV12_Load_8x4.asm, Y data is taint in row 4/5 +#endif + +#define ONE_ROW_DEBUG 0 + +#if (ONE_ROW_DEBUG) + // if you want to debug a row which is not the first one, try the following: + // 1. define ROW_NUM_READ to the row you want to debug + // 2. ROW_NUM_WRITE can be same to DBG_ROWNUM_READ to overwrite original YUV data, or define it to a new row + // 3. change (DBG_ROWNUM_BASE+?)=ROW_NUM_READ or ROW_NUM_WRITE to DBG_ROWNUM_0, to not conflict with others + #define ROW_NUM_READ 0 + #define ROW_NUM_WRITE 0 + #define DBG_ROWNUM_BASE 1 + #define DBG_ROWNUM_0 0 +#else + #define ROW_NUM_READ %1 + #define ROW_NUM_WRITE %1 + $for(0; :f r[SRC_RGBA_OFFSET_1,ROW_NUM_READ*32 + 0]<4,1>:ub REG2(r, nTEMP10, 16)<0;4,1>:b + + add (16) REG2(r,nTEMP12,0)<1>:w ubDEST_RGBX(0,ROW_NUM_READ*64 )<0;16,1> bYUV_OFF<0;4,1>:b + add (16) REG2(r,nTEMP14,0)<1>:w ubDEST_RGBX(0,ROW_NUM_READ*64+16)<0;16,1> bYUV_OFF<0;4,1>:b + add (16) REG2(r,nTEMP16,0)<1>:w ubDEST_RGBX(0,ROW_NUM_READ*64+32)<0;16,1> bYUV_OFF<0;4,1>:b + add (16) REG2(r,nTEMP17,0)<1>:w ubDEST_RGBX(0,ROW_NUM_READ*64+48)<0;16,1> bYUV_OFF<0;4,1>:b + + mov (8) fROW_YUVA(0,0)<1> REG2(r, nTEMP12, 0)<0;8,1>:w + mov (8) fROW_YUVA(1,0)<1> REG2(r, nTEMP12, 8)<0;8,1>:w + mov (8) fROW_YUVA(2,0)<1> REG2(r, nTEMP14, 0)<0;8,1>:w + mov (8) fROW_YUVA(3,0)<1> REG2(r, nTEMP14, 8)<0;8,1>:w + mov (8) fROW_YUVA(4,0)<1> REG2(r, nTEMP16, 0)<0;8,1>:w + mov (8) fROW_YUVA(5,0)<1> REG2(r, nTEMP16, 8)<0;8,1>:w + mov (8) fROW_YUVA(6,0)<1> REG2(r, nTEMP17, 0)<0;8,1>:w + mov (8) fROW_YUVA(7,0)<1> REG2(r, nTEMP17, 8)<0;8,1>:w + + #if (ONE_ROW_DEBUG) + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(0,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 0)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + // write Y-16, U-128, V-128 to the 2nd row of RGB (convert float to int first, write whole ud): 1st half, 2 pixels + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64 )<1> REG2(r,nTEMP14, 0)<0;16,1>:ub + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64+16)<1> REG2(r,nTEMP14, 16)<0;16,1>:ub + + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(1,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 8)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + // write Y-16, U-128, V-128 to the 2nd row of RGB (convert float to int first, write whole ud): 2nd half, 2 pixels + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64+32)<1> REG2(r,nTEMP14, 0)<0;16,1>:ub + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE)*64+48)<1> REG2(r,nTEMP14, 16)<0;16,1>:ub + + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(2,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 16)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(3,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 24)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + // write Y-16, U-128, V-128 to the 3rd row of RGB (convert float to int first, only LSB is used): 1st half, 8 pixels + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+1)*64 )<1> REG2(r,nTEMP12, 0)<0;16,1>:ub + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+1)*64+16)<1> REG2(r,nTEMP12, 16)<0;16,1>:ub + + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(4,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 0)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(5,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 8)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(6,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 16)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + mov.sat (8) REG2(r, nTEMP14, 0)<1>:ud fROW_YUVA(7,0)<0;8,1>:f + mov (8) REG2(r, nTEMP12, 24)<1>:ub REG2(r, nTEMP14, 0)<0;8,4>:ub + + // write Y-16, U-128, V-128 to the 3rd row of RGB (convert float to int first, only LSB is used): 2nd half, 8 pixels + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+1)*64+32)<1> REG2(r,nTEMP12, 0)<0;16,1>:ub + mov (16) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+1)*64+48)<1> REG2(r,nTEMP12, 16)<0;16,1>:ub + #endif + + // ######## do one row for Red ######## + #define fCOEF_REG fYUV_to_RGB_CH2_Coef_Float + #define CHANNEL 2 + // ##### dp4(nTEMP16) and save result to uw format(nTEMP12) + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(0, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 0)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + #if (ONE_ROW_DEBUG) + // write dp4 (raw float) of 2 pixel to the 4/5th row + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL )<4> REG2(r,nTEMP16, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL+32)<4> REG2(r,nTEMP16, 8)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL )<4> REG2(r,nTEMP16, 16)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL+32)<4> REG2(r,nTEMP16, 24)<0;8,1>:ub + + // write dp4 (convert float to ud first, write whole ud) of 2 pixel to the 6/7th row + mov (8) REG2(r, nTEMP17, 0)<1>:d REG2(r, nTEMP16, 0)<0;8,1>:f + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL )<4> REG2(r,nTEMP17, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL+32)<4> REG2(r,nTEMP17, 8)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+5)*64+CHANNEL )<4> REG2(r,nTEMP17, 16)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+5)*64+CHANNEL+32)<4> REG2(r,nTEMP17, 24)<0;8,1>:ub + #endif + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(1, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 2)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(2, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 4)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(3, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 6)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(4, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 8)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(5, 0)<5;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 10)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(6, 0)<6;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 12)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(7, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 14)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + // #### write this channel + mov (8) ubDEST_RGBX(0,ROW_NUM_WRITE*64+CHANNEL )<4> REG2(r,nTEMP12, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,ROW_NUM_WRITE*64+CHANNEL+32)<4> REG2(r,nTEMP12, 8)<0;8,1>:ub + + // ######## do one row for Green ######## + #define fCOEF_REG fYUV_to_RGB_CH1_Coef_Float // reg for green coefficient + #define CHANNEL 1 + // ##### dp4(nTEMP16) and save result to uw format(nTEMP12) + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(0, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 0)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + #if (ONE_ROW_DEBUG) + // write dp4 (raw float) of 2 pixel to the 4/5th row + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL )<4> REG2(r,nTEMP16, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL+32)<4> REG2(r,nTEMP16, 8)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL )<4> REG2(r,nTEMP16, 16)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL+32)<4> REG2(r,nTEMP16, 24)<0;8,1>:ub + + // write dp4 (convert float to ud first, write whole ud) of 2 pixel to the 6/7th row + mov (8) REG2(r, nTEMP17, 0)<1>:d REG2(r, nTEMP16, 0)<0;8,1>:f + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL )<4> REG2(r,nTEMP17, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL+32)<4> REG2(r,nTEMP17, 8)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+5)*64+CHANNEL )<4> REG2(r,nTEMP17, 16)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+5)*64+CHANNEL+32)<4> REG2(r,nTEMP17, 24)<0;8,1>:ub + #endif + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(1, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 2)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(2, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 4)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(3, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 6)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(4, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 8)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(5, 0)<5;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 10)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(6, 0)<6;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 12)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(7, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 14)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + // #### write this channel + mov (8) ubDEST_RGBX(0,ROW_NUM_WRITE*64+CHANNEL )<4> REG2(r,nTEMP12, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,ROW_NUM_WRITE*64+CHANNEL+32)<4> REG2(r,nTEMP12, 8)<0;8,1>:ub + + // ###### do one row for Blue channel + #define fCOEF_REG fYUV_to_RGB_CH0_Coef_Float // reg for Blue coefficient + #define CHANNEL 0 + // ##### dp4(nTEMP16) and save result to uw format(nTEMP12) + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(0, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 0)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + #if (ONE_ROW_DEBUG) + // write dp4 (raw float) of 2 pixel to the 4/5th row + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL )<4> REG2(r,nTEMP16, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+2)*64+CHANNEL+32)<4> REG2(r,nTEMP16, 8)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL )<4> REG2(r,nTEMP16, 16)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+3)*64+CHANNEL+32)<4> REG2(r,nTEMP16, 24)<0;8,1>:ub + + // write dp4 (convert float to ud first, write whole ud) of 2 pixel to the 6/7th row + mov (8) REG2(r, nTEMP17, 0)<1>:d REG2(r, nTEMP16, 0)<0;8,1>:f + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL )<4> REG2(r,nTEMP17, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+4)*64+CHANNEL+32)<4> REG2(r,nTEMP17, 8)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+5)*64+CHANNEL )<4> REG2(r,nTEMP17, 16)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,(DBG_ROWNUM_BASE+5)*64+CHANNEL+32)<4> REG2(r,nTEMP17, 24)<0;8,1>:ub + #endif + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(1, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 2)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(2, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 4)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(3, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 6)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(4, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 8)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(5, 0)<5;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 10)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(6, 0)<6;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 12)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + dp4 (8) REG2(r, nTEMP16, 0)<1>:f fROW_YUVA(7, 0)<0;8,1> fCOEF_REG<0;4,1>:f + mov.sat (2) REG2(r, nTEMP14, 0)<1>:ud REG2(r, nTEMP16, 0)<0;2,4>:f + mov (2) REG2(r, nTEMP12, 14)<1>:ub REG2(r, nTEMP14, 0)<0;2,4>:ub + + // #### write this channel + mov (8) ubDEST_RGBX(0,ROW_NUM_WRITE*64+CHANNEL )<4> REG2(r,nTEMP12, 0)<0;8,1>:ub + mov (8) ubDEST_RGBX(0,ROW_NUM_WRITE*64+CHANNEL+32)<4> REG2(r,nTEMP12, 8)<0;8,1>:ub +#if (!ONE_ROW_DEBUG) + } +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_IEF.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_IEF.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_IEF.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_IEF.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,138 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: AVS_IEF.inc + +#ifndef _AVS_INF_INC_ +#define _AVS_INF_INC_ + +#include "undefall.inc" //Undefine the SRC and DEST sysmbols + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (V) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (U) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + +#define mAVS_8x8_HDR m0 // Message Header +#define mAVS_PAYLOAD m1 // Message Payload Header + +#define mAVS_8x8_HDR_2 m2 // Message Header +#define mAVS_PAYLOAD_2 m3 // Message Payload Header + +#define mAVS_8x8_HDR_UV m2 // Message Header +#define mAVS_PAYLOAD_UV m3 // Message Payload Header + +#define rAVS_8x8_HDR rMSGSRC // Mirror of Message Header +#define rAVS_PAYLOAD r9 // Mirror of Message Payload Header + + // AVS payload + // m1.7 Ignored + // m1.6 Pixel 0 V Address ---> ORIY (Y0) + // m1.5 Delta V ---> Step Y + // m1.4 Ignored + // m1.3 Ignored + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 U 2nd Derivative ---> NLAS dx + // m1.0 Delta U ---> Step X + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel + // 19 Header Present 1 + // 18 MBZ 0 + // 17:16 SIMD Mode 11 ---> SIMD64 + // 15:12 Message Type 0011 ---> sample_8x8 + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx +#define nAVS_MSG_DSC_1CH 0x044BB000 +#define nAVS_MSG_DSC_2CH 0x048BB000 +#define nAVS_MSG_DSC_3CH 0x04CBB000 +#define nAVS_MSG_DSC_4CH 0x050BB000 + +#define nAVS_RED_CHANNEL_ONLY 0x0000E000 // Enable Red channel only +#define nAVS_GREEN_CHANNEL_ONLY 0x0000D000 // Enable Green channel only +#define nAVS_RED_BLUE_CHANNELS 0x0000A000 // Enable Red and Blue channels +#define nAVS_RGB_CHANNELS 0x00008000 // Enable RGB(YUV) channels +#define nAVS_ALL_CHANNELS 0x00000000 // Enable all channels (ARGB\AYUV) + + + +.declare ubAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=1 SrcRegion=REGION(16,1) Type=ub +.declare uwAVS_RESPONSE Base=REG(r,nTEMP8) ElementSize=2 SrcRegion=REGION(16,1) Type=uw + +.declare ubAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=1 SrcRegion=REGION(16,1) Type=ub +.declare uwAVS_RESPONSE_2 Base=REG(r,nTEMP24) ElementSize=2 SrcRegion=REGION(16,1) Type=uw + + +#if (nSRC_REGION==nREGION_2) + #define uwDEST_Y uwBOT_Y + #define uwDEST_U uwBOT_U + #define uwDEST_V uwBOT_V + + #define ubDEST_Y ubBOT_Y + + #undef nSRC_REGION + #define nSRC_REGION nREGION_2 + +#else //(nSRC_REGION==nREGION_1) + #define uwDEST_Y uwTOP_Y + #define uwDEST_U uwTOP_U + #define uwDEST_V uwTOP_V + + #define ubDEST_Y ubTOP_Y + + #undef nSRC_REGION + #define nSRC_REGION nREGION_1 + +#endif + + +#endif //_AVS_INF_INC_ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupFirstBlock.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupFirstBlock.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupFirstBlock.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupFirstBlock.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,65 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//------------------------------------------------------------------------------ +// AVS_SetupFirstBlock.asm +//------------------------------------------------------------------------------ + + // Setup Message Header +// mov (8) mAVS_8x8_HDR<1>:ud rMSGSRC<8;8,1>:ud + + // Check NLAS Enable bit + and.z.f0.0 (1) wNULLREG uwNLAS_ENABLE:uw BIT15:uw + (f0.0)mov (1) fVIDEO_STEP_DELTA:f 0.0:f + + // Setup Message Payload Header for 1st block of Media Sampler 8x8 + mov (1) rAVS_PAYLOAD.0:f fVIDEO_STEP_DELTA:f //NLAS dx + mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f //Step X + mov (1) rAVS_PAYLOAD.5:f fVIDEO_STEP_Y:f //Step Y + mov (2) rAVS_PAYLOAD.2<4>:f fSRC_VID_H_ORI<2;2,1>:f //Orig X and Y + + + + + + + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupSecondBlock.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupSecondBlock.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupSecondBlock.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/AVS_SetupSecondBlock.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,57 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//------------------------------------------------------------------------------ +// AVS_SetupSecondBlock.asm +//------------------------------------------------------------------------------ + + //NLAS calculations for 2nd block of Media Sampler 8x8: + // X(i) = X0 + dx*i + ddx*i*(i-1)/2 ==> X(8) = X0 + dx*8 +ddx*28 + // dx(i)= dx(0) + ddx*i ==> dx(8)= dx + ddx*8 + + // Calculating X(8) + mov (1) acc0.2<1>:f fSRC_VID_H_ORI:f + mac (1) acc0.2<1>:f fVIDEO_STEP_X:f 8.0:f + mac (1) rAVS_PAYLOAD.2:f fVIDEO_STEP_DELTA:f 28.0:f + + // Calculating dx(8) + mov (1) acc0.1<1>:f fVIDEO_STEP_X:f + mac (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_DELTA:f 8.0:f + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DI_Hist_Save.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DI_Hist_Save.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DI_Hist_Save.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DI_Hist_Save.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,54 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + +// Write denoise history to memory +shr (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w 2:w NODDCLR // X,Y origin / 4 +add (1) rMSGSRC.0<1>:ud rMSGSRC.0<0;1,0>:ud uwSPITCH_DIV2<0;1,0>:uw NODDCLR_NODDCHK // Add pitch to X origin +mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_HIST:ud NODDCHK // block width and height (4x2) + +mov (8) mMSGHDR_HIST<1>:ud rMSGSRC.0<8;8,1>:ud // message header +mov (1) mudMSGHDR_HIST(1)<1> udRESP(nDI_HIST_OFFSET,0)<0;1,0> // Move denoise history to MRF + +send (8) dNULLREG mMSGHDR_HIST udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_HIST+nBI_STMM_HISTORY_OUTPUT:ud + + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DI.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DI.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DI.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DI.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,224 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: DI.inc + +#ifdef GT +// GT DI Kernel +#else // ILK +// ILK DI Kernel +#endif + + +//--------------------------------------------------------------------------- +// Binding table indices +//--------------------------------------------------------------------------- +#define nBIDX_DI_PRV 10 // Previous DI-ed frame +#define nBIDX_DI_CUR 13 // Current DI-ed frame +#define nBIDX_DN 7 // Denoised frame +#define nBIDX_STAT 20 // Statistics +#define nBIDX_DI_Source 4 // Source Surface + + +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor +#define nSMPL_ENGINE 0x2 +#define nDATAPORT_WRITE 0x5 +#define nTS_EOT 0x27 // with End-Of-Thread bit ON + + // Message descriptor for end-of-thread + // = 000 0001 (message len) 00000 (resp len) + // 0 (header present 0) 00000000000000 0 (URB dereferenced) 0000 +#define nEOT_MSGDSC 0x02000000 + + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + +// comment begin +// The following is commented out because of walker feature +// It corresponds to the #ifdef GT #else and #endif +//#define nSMPL_MSGDSC 0x040b8000 +//#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 +//#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 +//#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 +//#define nSMPL_RESP_LEN_NODN 0x00900000 // 9 +//#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 +// comment end + +#ifdef GT + +#define nSMPL_MSGDSC 0x040b8000 +#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 +#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 //DI disable, the XY stored in 5th GRF, no impact to return length +#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 //DI disable, the XY stored in 5th GRF, no impact to return length +#define nSMPL_RESP_LEN_NODN 0x00a00000 // 10 //NO DN, originally use 9, now we need use 10 to store the XY with walker +#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 + +#else + +#define nSMPL_MSGDSC 0x040b8000 +#define nSMPL_RESP_LEN_DI 0x00c00000 // 12 +#define nSMPL_RESP_LEN_NODI_PL 0x00500000 // 5 +#define nSMPL_RESP_LEN_NODI_PA 0x00900000 // 9 +#define nSMPL_RESP_LEN_NODN 0x00900000 // 9 +#define nSMPL_RESP_LEN_PDI 0x00b00000 // 11 + +#endif + + // Message descriptor for dataport media write +#ifdef GT + // = 000 0000 (message len - set later) 00000 (resp len 0) + // 1 (header present 1) 0 0 1010 (media block write) 00000 + // 00000000 (binding table index - set later) + // = 0x00094000 +#define nDPMW_MSGDSC 0x00094000 +#else // ILK + // = 000 0000 (message len - set later) 00000 (resp len 0) + // 1 (header present 1) 000 0 010 (media block write) 0000 + // 00000000 (binding table index - set later) + // = 0x00082000 +#define nDPMW_MSGDSC 0x00082000 +#endif +#define nDPMW_MSG_LEN_STMM 0x04000000 // 2 - STMM +#define nDPMW_MSG_LEN_DH 0x04000000 // 2 - Denoise history +#define nDPMW_MSG_LEN_PA_DN 0x0a000000 // 5 - Denoised output +#define nDPMW_MSG_LEN_PA_NODI 0x12000000 // 9 - Denoised output - denoise only - DI disabled +#define nDPMW_MSG_LEN_PL_DN 0x06000000 // 3 - Denoised output +#define nDPMW_MSG_LEN_PL_NODI 0x0a000000 // 5 - Denoised output - denoise only - DI disabled +#define nDPMW_MSG_LEN_DI 0x0a000000 // 5 - DI output + + +//--------------------------------------------------------------------------- +// Static and inline parameters +//--------------------------------------------------------------------------- +// Static parameters +.declare ubTFLD_FIRST Base=r1.27 ElementSize=1 Type=ub // top field first +.declare ubSRCYUVOFFSET Base=r1.4 ElementSize=1 Type=ub // source packed format +.declare ubDSTYUVOFFSET Base=r1.8 ElementSize=1 Type=ub // destination packed format +.declare uwSPITCH_DIV2 Base=r1.10 ElementSize=2 Type=uw // statistics surface pitch divided by 2 + +// Inline parameters +.declare uwXORIGIN Base=r5.0 ElementSize=2 Type=uw // X and Y origin +.declare uwYORIGIN Base=r5.1 ElementSize=2 Type=uw + + +//--------------------------------------------------------------------------- +// Kernel GRF variables +//--------------------------------------------------------------------------- +// Message response (Denoised & DI-ed pixels & statistics) +.declare dRESP Base=r8 ElementSize=4 Type=d // Response message (12 or 5 or 11) +.declare ubRESP Base=r8 ElementSize=1 Type=ub + +.declare dSTMM Base=r16 ElementSize=4 Type=d // STMM +.declare ubDN_HIST_NODI Base=r12 ElementSize=1 Type=ub // Denoise history data (DI disabled) +.declare ubDN_HIST_DI Base=r17 ElementSize=1 Type=ub // Denoise history data (DI enabled) +.declare uwRETURNED_POSITION_DI Base=r17 ElementSize=2 Type=uw // XY_Return_Data (DI enabled) +.declare uwRETURNED_POSITION_DN Base=r12 ElementSize=2 Type=uw // XY_Return_Data (DI disabled) + +.declare ub1ST_FLD_DN Base=r12 ElementSize=1 Type=ub // 1st field Denoised data (DI enabled) +.declare d1ST_FLD_DN Base=r12 ElementSize=4 Type=d +.declare ub2ND_FLD_DN Base=r18 ElementSize=1 Type=ub // 2nd field Denoised data (DI enabled) +.declare d2ND_FLD_DN Base=r18 ElementSize=4 Type=d +.declare ubPRV_DI Base=r8 ElementSize=1 Type=ub // Previous frame DI (DI enabled) +.declare ubCUR_DI Base=r12 ElementSize=1 Type=ub // Previous frame DI (DI enabled) + +// Packed denoised output +.declare ubDN_YUV Base=r22 ElementSize=1 Type=ub // Denoised YUV422 +.declare dDN_YUV Base=r22 ElementSize=4 Type=d +#define npDN_YUV 704 // = 22*32 = 0x280 + +// Packed DI output +.declare dDI_YUV_PRV Base=r32 ElementSize=4 Type=d // Previous frame DI output +.declare dDI_YUV_CUR Base=r36 ElementSize=4 Type=d // Current frame DI output +#define npDI_YUV 1024 // = 32*32 = 0x + +// For packed output +#define p422_YOFFSET a0.2 +#define p422_UOFFSET a0.3 +#define p422_VOFFSET a0.4 +#define pDN_TFLDSRC a0.6 +#define pDN_BFLDSRC a0.7 +#define npRESP 192 // = 6*32 + +// Message source +.declare udMSGSRC Base=r70 ElementSize=4 Type=ud +.declare uwMSGSRC Base=r70 ElementSize=2 Type=uw +.declare dMSGSRC Base=r70 ElementSize=4 Type=d + + +//--------------------------------------------------------------------------- +// Kernel MRF variables +//--------------------------------------------------------------------------- +#define mMSGHDR_SMPL m1 // Sampler response: m1~m2 +.declare mudMSGHDR_SMPL Base=m1 ElementSize=4 Type=ud +.declare muwMSGHDR_SMPL Base=m1 ElementSize=2 Type=uw +#define mMSGHDR_DN m3 // Denoise output: m3~m7 for PA, m3~m5 for PL +.declare mdMSGHDR_DN Base=m3 ElementSize=4 Type=d +#define mMSGHDR_STAT m8 // Statistics output: m8~m9 +.declare mdMSGHDR_STAT Base=m8 ElementSize=4 Type=d +.declare mubMSGHDR_STAT Base=m8 ElementSize=1 Type=ub +#define mMSGHDR_DI m10 // DI output: m10~m14 +.declare mdMSGHDR_DI Base=m10 ElementSize=4 Type=d +#define mMSGHDR_EOT m15 // EOT + +#ifdef GT +#define MSGSRC +#else +#define MSGSRC null:ud +#endif + + +//--------------------------------------------------------------------------- +// End of thread instruction +//--------------------------------------------------------------------------- +#ifdef GT +#define END_THREAD send (8) null<1>:d mMSGHDR_EOT nTS_EOT nEOT_MSGDSC +#else // ILK +#define END_THREAD send (8) null<1>:d mMSGHDR_EOT null:ud nTS_EOT nEOT_MSGDSC +#endif + + +// end of DI.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DI_SAVE_PA.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DI_SAVE_PA.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DI_SAVE_PA.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DI_SAVE_PA.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,86 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // H. block origin need to be doubled + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DI:ud NODDCHK // Block width and height (32x8) + + + add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub nDEST_YUV_REG*nGRFWIB:w // Initial Y,U,V offset in YUV422 block + + // Pack 2nd field Y + $for(0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // Pack 1st field Y + $for(0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // Pack 2nd field U + $for(0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + } + // Pack 1st field U + $for(0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + } + // Pack 2nd field V + $for(0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //Vpixels + } + // Packs1st field V + $for(0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //Vpixels + } + + //save the previous frame + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + $for(0; <4; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_YUV(%1)REGION(8,1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_DI+nBI_DESTINATION_1_YUV:ud + + //save the current frame + mov (8) mMSGHDR<1>:ud rMSGSRC<8;8,1>:ud + $for(0; <4; 1) { + mov (8) mudMSGPAYLOAD(%1)<1> udDEST_YUV(%1+4)REGION(8,1) + } + send (8) dNULLREG mMSGHDR udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPW_MSG_SIZE_DI+nBI_DESTINATION_2_YUV:ud + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_COMMAND.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_COMMAND.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_COMMAND.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_COMMAND.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,47 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Activate the DNDI send command +mov (8) mudMSG_SMPL(0)<1> rMSGSRC.0<8;8,1>:ud NODDCLR // message header +mov (1) muwMSG_SMPL(1,4)<1> wORIX<0;1,0>:w NODDCLR_NODDCHK// horizontal origin +mov (1) muwMSG_SMPL(1,12)<1> wORIY<0;1,0>:w NODDCLR_NODDCHK // vertical origin +//mov (2) muwMSG_SMPL(1,4)<2> wORIX<2;2,1>:w NODDCHK// problem during compile !! when using this line + +send (8) udRESP(0)<1> mMSG_SMPL udDUMMY_NULL nSMPL_ENGINE nSMPL_DI_MSGDSC+nSMPL_RESP_LEN+nBI_CURRENT_SRC_YUV_HW_DI:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_Hist_Save.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_Hist_Save.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_Hist_Save.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI_Hist_Save.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,50 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + + +// Write denoise history to memory +shr (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w 2:w NODDCLR // X,Y origin / 4 +add (1) rMSGSRC.0<1>:ud rMSGSRC.0<0;1,0>:ud uwSPITCH_DIV2<0;1,0>:uw NODDCLR_NODDCHK// Add pitch to X origin +mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_HIST:ud NODDCHK // block width and height (4x2) + +mov (8) mMSGHDR_HIST<1>:ud rMSGSRC.0<8;8,1>:ud // message header +mov (2) mudMSGHDR_HIST(1)<1> udRESP(nNODI_HIST_OFFSET,0)<2;2,1> // Move denoise history to MRF + +send (8) dNULLREG mMSGHDR_HIST udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_HIST+nBI_STMM_HISTORY_OUTPUT:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/DNDI.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,192 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// Module name: DI.inc + +#ifdef GT +// GT DI Kernel +#else // ILK +// ILK DI Kernel +#endif + +#include "undefall.inc" + +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read +// // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) +// // 1 (header present 1) 0 11 (SIMD32/64 mode) +// // 1000 (message type) 0000 (DI state index) +// // 00000000 (binding table index - set later) +// // = 0x040b8000 +#define nSMPL_DI_MSGDSC 0x040b8000 + +#define nSMPL_RESP_LEN_DNDI nRESLEN_12 // 12 - for DN + DI Alg +#define nSMPL_RESP_LEN_DN_PL nRESLEN_5 // 5 - for DN Planar Alg +#define nSMPL_RESP_LEN_DN_PA nRESLEN_9 // 9 - for DN Packed Alg +#define nSMPL_RESP_LEN_DI nRESLEN_9 // 9 - for DI Only Alg +#define nSMPL_RESP_LEN_PDI nRESLEN_11 // 11 - for Partial DI Alg + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header +#define nDPMW_MSG_LEN_STMM nMSGLEN_1 // 1 - For STMM Save +#define nDPMW_MSG_LEN_HIST nMSGLEN_1 // 1 - For Denoise History Save +#define nDPMW_MSG_LEN_PA_DN_DI nMSGLEN_4 // 4 - For DN Curr Save +#define nDPMW_MSG_LEN_PA_DN_NODI nMSGLEN_8 // 8 - For DN Curr Save (denoise only - DI disabled) +#define nDPMW_MSG_LEN_PL_DN_DI nMSGLEN_2 // 2 - For DN Curr Save +#define nDPMW_MSG_LEN_PL_DN_NODI nMSGLEN_4 // 4 - For DN Curr Save (denoise only - DI disabled) + +#define nDPW_BLOCK_SIZE_STMM nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // Y block size 8x4 + +#undef nDPW_BLOCK_SIZE_DI +#undef nDPW_MSG_SIZE_DI +#define nDPW_BLOCK_SIZE_DI nBLOCK_WIDTH_32+nBLOCK_HEIGHT_4 +#define nDPW_MSG_SIZE_DI nMSGLEN_4 + + +//--------------------------------------------------------------------------- +// Kernel GRF variables +//--------------------------------------------------------------------------- +// Defines for DI enabled +#define nDI_PREV_FRAME_LUMA_OFFSET 0 +#define nDI_PREV_FRAME_CHROMA_OFFSET 2 +#define nDI_CURR_FRAME_LUMA_OFFSET 4 +#define nDI_CURR_FRAME_CHROMA_OFFSET 6 +#define nDI_STMM_OFFSET 8 +#define nDI_HIST_OFFSET 9 +#define nDI_CURR_2ND_FIELD_LUMA_OFFSET 10 +#define nDI_CURR_2ND_FIELD_CHROMA_OFFSET 11 + +// Defines for DI disabled +#define nNODI_LUMA_OFFSET 0 +#define nNODI_HIST_OFFSET 4 +#define nNODI_CHROMA_OFFSET 5 + +#ifdef DI_ENABLE + #define nHIST_OFFSET nDI_HIST_OFFSET + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + +#endif + +#ifdef DI_DISABLE + #define nHIST_OFFSET nNODI_HIST_OFFSET +#endif + +#if (nSRC_REGION==nREGION_2) + #define ub2SRC_Y ub2BOT_Y + #define ub2SRC_U ub2BOT_U + #define ub2SRC_V ub2BOT_V + #define uwDEST_Y uwBOT_Y + #define uwDEST_U uwBOT_U + #define uwDEST_V uwBOT_V + #define nDEST_YUV_REG nTOP_Y + #define udDEST_YUV udTOP_Y_IO + + #define nRESP nTEMP0 // DI return message requires 12 GRFs + #define nDN_YUV nTOP_Y // Space for Packing DN for next run requires 8 GRFs + + #undef nSRC_REGION + #define nSRC_REGION nREGION_2 + +#else + #define ub2SRC_Y ub2TOP_Y + #define ub2SRC_U ub2TOP_U + #define ub2SRC_V ub2TOP_V + #define uwDEST_Y uwTOP_Y + #define uwDEST_U uwTOP_U + #define uwDEST_V uwTOP_V + #define nDEST_YUV_REG nBOT_Y + #define udDEST_YUV udBOT_Y_IO + #define nRESP nTEMP0 // DI return message requires 12 GRFs + #define nDN_YUV nBOT_Y // Space for Packing DN for next run requires 8 GRFs + + #undef nSRC_REGION + #define nSRC_REGION nREGION_1 // REGION_1 will be the source region for first kernel + +#endif + + + + + + + + + +// Message response (Denoised & DI-ed pixels & statistics) +.declare udRESP Base=REG(r,nRESP) ElementSize=4 SrcRegion=REGION(8,1) DstRegion=<1> Type=ud +.declare ubRESP Base=REG(r,nRESP) ElementSize=1 SrcRegion=REGION(16,1) DstRegion=<1> Type=ub + +// For Denoised Curr Output (Used as Priv in Next Run) +.declare ubDN_YUV Base=REG(r,nDN_YUV) ElementSize=1 Type=ub +.declare udDN_YUV Base=REG(r,nDN_YUV) ElementSize=4 Type=ud +#define npDN_YUV nDN_YUV*nGRFWIB + +// For DI Process Output (1st and 2nd Frames Output) +//.declare udDI_YUV_PRIV Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Previous frame DI output +//.declare udDI_YUV_CURR Base=REG(r,nTEMP0) ElementSize=4 Type=ud // Current frame DI output +//#define npDI_YUV nTEMP0*nGRFWIB + +//--------------------------------------------------------------------------- +// Kernel MRF variables +//--------------------------------------------------------------------------- +#define mMSG_SMPL m1 // Sampler Command is in: m1~m2 +.declare mudMSG_SMPL Base=mMSG_SMPL ElementSize=4 Type=ud +.declare muwMSG_SMPL Base=mMSG_SMPL ElementSize=2 Type=uw + +#define mMSGHDR_DN m1 // Denoise Output: m1~m9 for PA, m3~m5 for PL +.declare mudMSGHDR_DN Base=mMSGHDR_DN ElementSize=4 Type=ud +.declare mubMSGHDR_DN Base=mMSGHDR_DN ElementSize=1 Type=ub + +#define mMSGHDR_STMM m11 // STMM Output: m11~m12 +.declare mudMSGHDR_STMM Base=mMSGHDR_STMM ElementSize=4 Type=ud +#define mMSGHDR_HIST m13 // HIST Output: m13~m14 +.declare mudMSGHDR_HIST Base=mMSGHDR_HIST ElementSize=1 Type=ud + +#define mMSGHDR_DI_1ST m1 // DI output: m1~m5 +.declare mudMSGHDR_DI_1ST Base=mMSGHDR_DI_1ST ElementSize=4 Type=ud +#define mMSGHDR_DI_2ND m6 // DI output: m6~m10 +.declare mudMSGHDR_DI_2ND Base=mMSGHDR_DI_2ND ElementSize=4 Type=ud + +// end of DNDI.inc diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,56 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Sample.asm" + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:4:4 internal planar +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Unpack_16x8.asm" + +//------------------------------------------------------------------------------ + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,55 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_AVS_IEF_8x4.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Sample.asm" + +//------------------------------------------------------------------------------ +// Unpacking sampler data to 4:2:0 internal planar +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Unpack_8x4.asm" + +//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,55 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_AVS_IEF_8x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Sample.asm" + +//------------------------------------------------------------------------------ +// Unpacking sampler data to 4:2:2 internal planar +//------------------------------------------------------------------------------ +#include "PA_AVS_IEF_Unpack_8x8.asm" + +//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Sample.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Sample.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Sample.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Sample.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,64 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_AVS_IEF_Sample.asm ---------- + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 YUV packed +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable RGB(YUV) channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RGB_CHANNELS:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_3CH+nSI_SRC_YUV+nBI_CURRENT_SRC_YUV + // Return YUV in 12 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + mov (16) mAVS_8x8_HDR_2.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR_2 udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_3CH+nSI_SRC_YUV+nBI_CURRENT_SRC_YUV + // Return YUV in 12 GRFs + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,318 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_AVS_IEF_Unpack_16x8.asm ---------- + +#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format +// Move first 8x8 words of Y to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(9,12)<4;4,1> + +// Move first 8x8 words of U to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of V to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(7,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> 0:uw + mov (4) uwDEST_Y(1,3)<4> 0:uw + mov (4) uwDEST_Y(4,3)<4> 0:uw + mov (4) uwDEST_Y(5,3)<4> 0:uw + mov (4) uwDEST_Y(8,3)<4> 0:uw + mov (4) uwDEST_Y(9,3)<4> 0:uw + mov (4) uwDEST_Y(12,3)<4> 0:uw + mov (4) uwDEST_Y(13,3)<4> 0:uw + mov (4) uwDEST_Y(16,3)<4> 0:uw + mov (4) uwDEST_Y(17,3)<4> 0:uw + mov (4) uwDEST_Y(20,3)<4> 0:uw + mov (4) uwDEST_Y(21,3)<4> 0:uw + mov (4) uwDEST_Y(24,3)<4> 0:uw + mov (4) uwDEST_Y(25,3)<4> 0:uw + mov (4) uwDEST_Y(28,3)<4> 0:uw + mov (4) uwDEST_Y(29,3)<4> 0:uw + +// Move second 8x8 words of Y to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + +// Move second 8x8 words of U to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of V to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> 0:uw + mov (4) uwDEST_Y(3,3)<4> 0:uw + mov (4) uwDEST_Y(6,3)<4> 0:uw + mov (4) uwDEST_Y(7,3)<4> 0:uw + mov (4) uwDEST_Y(10,3)<4> 0:uw + mov (4) uwDEST_Y(11,3)<4> 0:uw + mov (4) uwDEST_Y(14,3)<4> 0:uw + mov (4) uwDEST_Y(15,3)<4> 0:uw + mov (4) uwDEST_Y(18,3)<4> 0:uw + mov (4) uwDEST_Y(19,3)<4> 0:uw + mov (4) uwDEST_Y(22,3)<4> 0:uw + mov (4) uwDEST_Y(23,3)<4> 0:uw + mov (4) uwDEST_Y(26,3)<4> 0:uw + mov (4) uwDEST_Y(27,3)<4> 0:uw + mov (4) uwDEST_Y(30,3)<4> 0:uw + mov (4) uwDEST_Y(31,3)<4> 0:uw + +/* This section will be used if 16-bit output is needed in planar format -vK + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> uwAVS_RESPONSE(2,0)<8;4,1> + mov (8) uwDEST_Y(1)<1> uwAVS_RESPONSE(2,8)<8;4,1> + mov (8) uwDEST_Y(2)<1> uwAVS_RESPONSE(3,0)<8;4,1> + mov (8) uwDEST_Y(3)<1> uwAVS_RESPONSE(3,8)<8;4,1> + mov (8) uwDEST_Y(4)<1> uwAVS_RESPONSE(8,0)<8;4,1> + mov (8) uwDEST_Y(5)<1> uwAVS_RESPONSE(8,8)<8;4,1> + mov (8) uwDEST_Y(6)<1> uwAVS_RESPONSE(9,0)<8;4,1> + mov (8) uwDEST_Y(7)<1> uwAVS_RESPONSE(9,8)<8;4,1> + + // Move first 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(0,0)<8;4,1> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(0,8)<8;4,1> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(1,0)<8;4,1> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(1,8)<8;4,1> + mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(6,0)<8;4,1> + mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(6,8)<8;4,1> + mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(7,0)<8;4,1> + mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(7,8)<8;4,1> + + // Move first 8x8 words of U to dest GRF + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,0)<8;4,1> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(4,8)<8;4,1> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(5,0)<8;4,1> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(5,8)<8;4,1> + mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,0)<8;4,1> + mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8)<8;4,1> + mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,0)<8;4,1> + mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8)<8;4,1> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> uwAVS_RESPONSE_2(2,0)<8;4,1> + mov (8) uwDEST_Y(1,8)<1> uwAVS_RESPONSE_2(2,8)<8;4,1> + mov (8) uwDEST_Y(2,8)<1> uwAVS_RESPONSE_2(3,0)<8;4,1> + mov (8) uwDEST_Y(3,8)<1> uwAVS_RESPONSE_2(3,8)<8;4,1> + mov (8) uwDEST_Y(4,8)<1> uwAVS_RESPONSE_2(8,0)<8;4,1> + mov (8) uwDEST_Y(5,8)<1> uwAVS_RESPONSE_2(8,8)<8;4,1> + mov (8) uwDEST_Y(6,8)<1> uwAVS_RESPONSE_2(9,0)<8;4,1> + mov (8) uwDEST_Y(7,8)<1> uwAVS_RESPONSE_2(9,8)<8;4,1> + + // Move second 8x8 words of V to dest GRF + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(0,0)<8;4,1> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(0,8)<8;4,1> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(1,0)<8;4,1> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(1,8)<8;4,1> + mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(6,0)<8;4,1> + mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(6,8)<8;4,1> + mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(7,0)<8;4,1> + mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(7,8)<8;4,1> + + // Move second 8x8 words of U to dest GRF + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(4,0)<8;4,1> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(4,8)<8;4,1> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(5,0)<8;4,1> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(5,8)<8;4,1> + mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,0)<8;4,1> + mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8)<8;4,1> + mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,0)<8;4,1> + mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8)<8;4,1> +*/ +#else /* OUTPUT_8_BIT */ + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move first 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(0,8+1)<16;4,2> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(1,1)<16;4,2> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(1,8+1)<16;4,2> + mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + + // Move first 8x8 words of U to dest GRF + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move second 8x8 words of V to dest GRF + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(0,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(0,8+1)<16;4,2> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(1,1)<16;4,2> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(1,8+1)<16;4,2> + mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + + // Move second 8x8 words of U to dest GRF + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> +#endif +//------------------------------------------------------------------------------ + + // Re-define new number of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,107 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_AVS_IEF_Unpack_8x8.asm ---------- + +// Yoni: In order to optimize unpacking, 3 methods are being checked: +// 1. AVS_ORIGINAL +// 2. AVS_ROUND_TO_8_BITS +// 3. AVS_INDIRECT_ACCESS +// +// Only 1 method should stay in the code + + +//#define AVS_ROUND_TO_8_BITS +//#define AVS_INDIRECT_ACCESS + + + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move first 4x8 words of V to dest GRF + mov (4) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;2,4> + mov (4) uwDEST_V(0,8)<1> ubAVS_RESPONSE(1,1)<16;2,4> + mov (4) uwDEST_V(1)<1> ubAVS_RESPONSE(6,1)<16;2,4> + mov (4) uwDEST_V(1,8)<1> ubAVS_RESPONSE(7,1)<16;2,4> + + // Move first 4x8 words of U to dest GRF + mov (4) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;2,4> + mov (4) uwDEST_U(0,8)<1> ubAVS_RESPONSE(5,1)<16;2,4> + mov (4) uwDEST_U(1)<1> ubAVS_RESPONSE(10,1)<16;2,4> + mov (4) uwDEST_U(1,8)<1> ubAVS_RESPONSE(11,1)<16;2,4> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move second 4x8 words of V to dest GRF + mov (4) uwDEST_V(0,4)<1> ubAVS_RESPONSE_2(0,1)<16;2,4> + mov (4) uwDEST_V(0,12)<1> ubAVS_RESPONSE_2(1,1)<16;2,4> + mov (4) uwDEST_V(1,4)<1> ubAVS_RESPONSE_2(6,1)<16;2,4> + mov (4) uwDEST_V(1,12)<1> ubAVS_RESPONSE_2(7,1)<16;2,4> + + // Move second 4x8 words of U to dest GRF + mov (4) uwDEST_U(0,4)<1> ubAVS_RESPONSE_2(4,1)<16;2,4> + mov (4) uwDEST_U(0,12)<1> ubAVS_RESPONSE_2(5,1)<16;2,4> + mov (4) uwDEST_U(1,4)<1> ubAVS_RESPONSE_2(10,1)<16;2,4> + mov (4) uwDEST_U(1,12)<1> ubAVS_RESPONSE_2(11,1)<16;2,4> + +//------------------------------------------------------------------------------ + + // Re-define new number of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,123 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_AVS_IEF_Unpack_8x8.asm ---------- + +// Yoni: In order to optimize unpacking, 3 methods are being checked: +// 1. AVS_ORIGINAL +// 2. AVS_ROUND_TO_8_BITS +// 3. AVS_INDIRECT_ACCESS +// +// Only 1 method should stay in the code + + +//#define AVS_ROUND_TO_8_BITS +//#define AVS_INDIRECT_ACCESS + + + // Move first 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) uwDEST_Y(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) uwDEST_Y(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_Y(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_Y(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move first 4x8 words of V to dest GRF + mov (4) uwDEST_V(0)<1> ubAVS_RESPONSE(0,1)<16;2,4> + mov (4) uwDEST_V(0,8)<1> ubAVS_RESPONSE(0,8+1)<16;2,4> + mov (4) uwDEST_V(1)<1> ubAVS_RESPONSE(1,1)<16;2,4> + mov (4) uwDEST_V(1,8)<1> ubAVS_RESPONSE(1,8+1)<16;2,4> + mov (4) uwDEST_V(2)<1> ubAVS_RESPONSE(6,1)<16;2,4> + mov (4) uwDEST_V(2,8)<1> ubAVS_RESPONSE(6,8+1)<16;2,4> + mov (4) uwDEST_V(3)<1> ubAVS_RESPONSE(7,1)<16;2,4> + mov (4) uwDEST_V(3,8)<1> ubAVS_RESPONSE(7,8+1)<16;2,4> + + // Move first 4x8 words of U to dest GRF + mov (4) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;2,4> + mov (4) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,8+1)<16;2,4> + mov (4) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;2,4> + mov (4) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,8+1)<16;2,4> + mov (4) uwDEST_U(2)<1> ubAVS_RESPONSE(10,1)<16;2,4> + mov (4) uwDEST_U(2,8)<1> ubAVS_RESPONSE(10,8+1)<16;2,4> + mov (4) uwDEST_U(3)<1> ubAVS_RESPONSE(11,1)<16;2,4> + mov (4) uwDEST_U(3,8)<1> ubAVS_RESPONSE(11,8+1)<16;2,4> + + // Move second 8x8 words of Y to dest GRF + mov (8) uwDEST_Y(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) uwDEST_Y(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) uwDEST_Y(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) uwDEST_Y(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) uwDEST_Y(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_Y(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_Y(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_Y(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move second 4x8 words of V to dest GRF + mov (4) uwDEST_V(0,4)<1> ubAVS_RESPONSE_2(0,1)<16;2,4> + mov (4) uwDEST_V(0,12)<1> ubAVS_RESPONSE_2(0,8+1)<16;2,4> + mov (4) uwDEST_V(1,4)<1> ubAVS_RESPONSE_2(1,1)<16;2,4> + mov (4) uwDEST_V(1,12)<1> ubAVS_RESPONSE_2(1,8+1)<16;2,4> + mov (4) uwDEST_V(2,4)<1> ubAVS_RESPONSE_2(6,1)<16;2,4> + mov (4) uwDEST_V(2,12)<1> ubAVS_RESPONSE_2(6,8+1)<16;2,4> + mov (4) uwDEST_V(3,4)<1> ubAVS_RESPONSE_2(7,1)<16;2,4> + mov (4) uwDEST_V(3,12)<1> ubAVS_RESPONSE_2(7,8+1)<16;2,4> + + // Move second 4x8 words of U to dest GRF + mov (4) uwDEST_U(0,4)<1> ubAVS_RESPONSE_2(4,1)<16;2,4> + mov (4) uwDEST_U(0,12)<1> ubAVS_RESPONSE_2(4,8+1)<16;2,4> + mov (4) uwDEST_U(1,4)<1> ubAVS_RESPONSE_2(5,1)<16;2,4> + mov (4) uwDEST_U(1,12)<1> ubAVS_RESPONSE_2(5,8+1)<16;2,4> + mov (4) uwDEST_U(2,4)<1> ubAVS_RESPONSE_2(10,1)<16;2,4> + mov (4) uwDEST_U(2,12)<1> ubAVS_RESPONSE_2(10,8+1)<16;2,4> + mov (4) uwDEST_U(3,4)<1> ubAVS_RESPONSE_2(11,1)<16;2,4> + mov (4) uwDEST_U(3,12)<1> ubAVS_RESPONSE_2(11,8+1)<16;2,4> + +//------------------------------------------------------------------------------ + + // Re-define new number of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DN_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DN_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DN_ALG.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DN_ALG.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,84 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_DISABLE + +#include "DNDI.inc" + +#undef nY_NUM_OF_ROWS +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block +#undef nUV_NUM_OF_ROWS +#define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + +#undef nSMPL_RESP_LEN +#define nSMPL_RESP_LEN nSMPL_RESP_LEN_DN_PA // Set the Number of GRFs in DNDI response +#undef nDPW_BLOCK_SIZE_DN +#define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_8 // DN Curr Block Size for Write is 32x8 +#undef nDPW_BLOCK_SIZE_HIST +#define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_2 // HIST Block Size for Write is 4x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// +#include "DNDI_COMMAND.asm" + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// +#include "DNDI_Hist_Save.asm" + +////////////////////////////////////// Pack and Save the DN Curr Frame for Next Run /////////////// +add (4) pCF_Y_OFFSET<1>:uw ubDEST_CF_OFFSET<4;4,1>:ub npDN_YUV:w +$for (0; :ub ubRESP(nNODI_LUMA_OFFSET,%1*16)<16;16,1> // copy line of Y +} +$for (0; :ub ubRESP(nNODI_CHROMA_OFFSET,%1*16+1)<16;8,2> // copy line of U + mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nNODI_CHROMA_OFFSET,%1*16)<16;8,2> // copy line of V +} + +shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin * 2 (422 output) +mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin +mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (32x8) +mov (8) mMSGHDR_DN<1>:ud rMSGSRC<8;8,1>:ud // message header + +$for(0; udDN_YUV(%1)REGION(8,1) // Move DN Curr to MRF +} +send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PA_DN_NODI+nBI_DESTINATION_YUV:ud + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DNDI_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DNDI_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DNDI_ALG.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_DNDI_ALG.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,169 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #ifdef DI_ONLY + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DI // set the number of GRF + #else + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #endif + + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_32+nBLOCK_HEIGHT_4 // DN Block Size for Write is 32x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + //// move the previous frame Y component to internal planar format + //$for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + //} + //// move the previous frame U,V components to internal planar format + //$for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + // mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + //} + //// move the current frame Y component to internal planar format + //$for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + //} + //// move the current frame U,V components to internal planar format + //$for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + // mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + //} + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud NODDCHK // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// +#ifdef DI_ONLY +#else + + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Pack and Save the DN Curr Frame for Next Run /////////////// + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:uw + //set the save DN position + shl (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR // X origin * 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud NODDCHK // block width and height (8x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + + + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + //$for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 0,2) + // mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,16) // 1st field luma from current frame (line 1,3) + // mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 0,2) + // mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 0,2) + // mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16+1)<16;8,2> // 1st field U from current frame (line 1,3) + // mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16)<16;8,2> // 1st field U from current frame (line 1,3) + //} + $for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 0,2) + mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,16) // 1st field luma from current frame (line 1,3) + } + + $for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 0,2) + mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16+1)<16;8,2> // 1st field U from current frame (line 1,3) + } + + $for (0,0; :ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 0,2) + mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,16)<16;8,2> // 1st field U from current frame (line 1,3) + } + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + //$for (0,0; :ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0) // 1st field luma from current frame (line 0,2) + // mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 1,3) + // mov (8) r[pCF_U_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,1)<16;8,2> // 1st field U from current frame (line 0,2) + // mov (8) r[pCF_V_OFFSET, %1*32]<4>:ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,0)<16;8,2> // 1st field V from current frame (line 0,2) + // mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 1,3) + // mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 1,3) + //} + $for (0,0; :ub ubRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0) // 1st field luma from current frame (line 0,2) + mov (16) r[pCF_Y_OFFSET, %1+1*32]<2>:ub ubRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*16) // 2nd field luma from current frame (line 1,3) + } + $for (0,0; :ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,1)<16;8,2> // 1st field U from current frame (line 0,2) + mov (8) r[pCF_U_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16+1)<16;8,2> // 2nd field U from current frame (line 1,3) + } + $for (0,0; :ub ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+%2,0)<16;8,2> // 1st field V from current frame (line 0,2) + mov (8) r[pCF_V_OFFSET, %1+1*32]<4>:ub ubRESP(nDI_CURR_2ND_FIELD_CHROMA_OFFSET,%2*16)<16;8,2> // 2nd field V from current frame (line 1,3) + } + +SAVE_DN_CURR: + $for(0; udDN_YUV(%1)REGION(8,1) + } + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PA_DN_DI+nBI_DESTINATION_YUV:ud +#endif + +// Save Processed frames +#include "DI_Save_PA.asm" + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PA_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PA_Scaling.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,100 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PA_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + +//------------------------------------------------------------------------------ + +$for (0; :ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_YUV+nBI_CURRENT_SRC_YUV + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(2) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(2)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(4) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(4)<1> acc0:f { Compr } + + mov (16) DEST_V(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(2) //possible error due to truncation - vK + mov (16) DEST_U(%1)<1> SCALE_RESPONSE_YB(4) //possible error due to truncation - vK + +} + + #define nSRC_REGION nREGION_1 + +//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,90 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL2_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y each +// 2 sampler read for 8x8 U and 8x8 V (NV11\P208 input surface) +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U and V sampling + // Enable red and blue channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + + // 2nd 8x8 U and V sampling + // Enable red and blue channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:4:4 internal planar +//------------------------------------------------------------------------------ + #include "PL2_AVS_IEF_Unpack_16x8.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,88 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL2_AVS_IEF_8x4.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y each +// 1 sampler read for 8x8 U and 8x8 V (NV11\NV12 input surface) +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U and V sampling + // Enable red and blue channels + //Only 8x4 wil be used + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + // Calculate Chroma Step Size: + // for H direction: 16 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_X = 2 * Luma_Step_X + // for V direction: 8 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_Y = Luma_Step_Y + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Step X for chroma + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:0 internal planar +//------------------------------------------------------------------------------ + #include "PL2_AVS_IEF_Unpack_8x4.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,87 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL2_AVS_IEF_8x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y each +// 1 sampler read for 8x8 U and 8x8 V (NV11\NV12 input surface) +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U and V sampling + // Enable red and blue channels + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_BLUE_CHANNELS:ud + + // Calculate Chroma Step Size: + // for H direction: 16 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_X = 2 * Luma_Step_X + // for V direction: 8 Luma samples are covered by 8 Chroma samples. Thus Chroma_Step_Y = Luma_Step_Y + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Step X for chroma + + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_2CH+nSI_SRC_UV+nBI_CURRENT_SRC_UV + // Return U and V in 8 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + // Enable green channel only + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud + + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:2 internal planar +//------------------------------------------------------------------------------ + #include "PL2_AVS_IEF_Unpack_8x8.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,301 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL2_AVS_IEF_Unpack_16x8.asm ---------- + +#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format +// Move first 8x8 words of Y to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + +// Move first 8x8 words of U to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> + +// Move first 8x8 words of V to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(7,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> 0:uw + mov (4) uwDEST_Y(1,3)<4> 0:uw + mov (4) uwDEST_Y(4,3)<4> 0:uw + mov (4) uwDEST_Y(5,3)<4> 0:uw + mov (4) uwDEST_Y(8,3)<4> 0:uw + mov (4) uwDEST_Y(9,3)<4> 0:uw + mov (4) uwDEST_Y(12,3)<4> 0:uw + mov (4) uwDEST_Y(13,3)<4> 0:uw + mov (4) uwDEST_Y(16,3)<4> 0:uw + mov (4) uwDEST_Y(17,3)<4> 0:uw + mov (4) uwDEST_Y(20,3)<4> 0:uw + mov (4) uwDEST_Y(21,3)<4> 0:uw + mov (4) uwDEST_Y(24,3)<4> 0:uw + mov (4) uwDEST_Y(25,3)<4> 0:uw + mov (4) uwDEST_Y(28,3)<4> 0:uw + mov (4) uwDEST_Y(29,3)<4> 0:uw + +// Move second 8x8 words of Y to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + +// Move second 8x8 words of U to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + +// Move second 8x8 words of V to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> 0:uw + mov (4) uwDEST_Y(3,3)<4> 0:uw + mov (4) uwDEST_Y(6,3)<4> 0:uw + mov (4) uwDEST_Y(7,3)<4> 0:uw + mov (4) uwDEST_Y(10,3)<4> 0:uw + mov (4) uwDEST_Y(11,3)<4> 0:uw + mov (4) uwDEST_Y(14,3)<4> 0:uw + mov (4) uwDEST_Y(15,3)<4> 0:uw + mov (4) uwDEST_Y(18,3)<4> 0:uw + mov (4) uwDEST_Y(19,3)<4> 0:uw + mov (4) uwDEST_Y(22,3)<4> 0:uw + mov (4) uwDEST_Y(23,3)<4> 0:uw + mov (4) uwDEST_Y(26,3)<4> 0:uw + mov (4) uwDEST_Y(27,3)<4> 0:uw + mov (4) uwDEST_Y(30,3)<4> 0:uw + mov (4) uwDEST_Y(31,3)<4> 0:uw + +/* This section will be used if 16-bit output is needed in planar format -vK + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> uwAVS_RESPONSE(%1,0)<8;4,1> + mov (8) uwDEST_Y(%1*2+1)<1> uwAVS_RESPONSE(%1,8)<8;4,1> + } + + // Move 1st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> uwAVS_RESPONSE(4,0)<8;4,1> + mov (8) uwDEST_U(1)<1> uwAVS_RESPONSE(4,8)<8;4,1> + mov (8) uwDEST_U(2)<1> uwAVS_RESPONSE(5,0)<8;4,1> + mov (8) uwDEST_U(3)<1> uwAVS_RESPONSE(5,8)<8;4,1> + mov (8) uwDEST_U(4)<1> uwAVS_RESPONSE(8,0)<8;4,1> + mov (8) uwDEST_U(5)<1> uwAVS_RESPONSE(8,8)<8;4,1> + mov (8) uwDEST_U(6)<1> uwAVS_RESPONSE(9,0)<8;4,1> + mov (8) uwDEST_U(7)<1> uwAVS_RESPONSE(9,8)<8;4,1> + + // Move 1st 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> uwAVS_RESPONSE(6,0)<8;4,1> + mov (8) uwDEST_V(1)<1> uwAVS_RESPONSE(6,8)<8;4,1> + mov (8) uwDEST_V(2)<1> uwAVS_RESPONSE(7,0)<8;4,1> + mov (8) uwDEST_V(3)<1> uwAVS_RESPONSE(7,8)<8;4,1> + mov (8) uwDEST_V(4)<1> uwAVS_RESPONSE(10,0)<8;4,1> + mov (8) uwDEST_V(5)<1> uwAVS_RESPONSE(10,8)<8;4,1> + mov (8) uwDEST_V(6)<1> uwAVS_RESPONSE(11,0)<8;4,1> + mov (8) uwDEST_V(7)<1> uwAVS_RESPONSE(11,8)<8;4,1> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> uwAVS_RESPONSE_2(%1,0)<8;4,1> + mov (8) uwDEST_Y(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1,8)<8;4,1> + } + + // Move 2st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0,8)<1> uwAVS_RESPONSE_2(4,0)<8;4,1> + mov (8) uwDEST_U(1,8)<1> uwAVS_RESPONSE_2(4,8)<8;4,1> + mov (8) uwDEST_U(2,8)<1> uwAVS_RESPONSE_2(5,0)<8;4,1> + mov (8) uwDEST_U(3,8)<1> uwAVS_RESPONSE_2(5,8)<8;4,1> + mov (8) uwDEST_U(4,8)<1> uwAVS_RESPONSE_2(8,0)<8;4,1> + mov (8) uwDEST_U(5,8)<1> uwAVS_RESPONSE_2(8,8)<8;4,1> + mov (8) uwDEST_U(6,8)<1> uwAVS_RESPONSE_2(9,0)<8;4,1> + mov (8) uwDEST_U(7,8)<1> uwAVS_RESPONSE_2(9,8)<8;4,1> + + // Move 2st 8x8 words of V to dest GRF + mov (8) uwDEST_V(0,8)<1> uwAVS_RESPONSE_2(6,0)<8;4,1> + mov (8) uwDEST_V(1,8)<1> uwAVS_RESPONSE_2(6,8)<8;4,1> + mov (8) uwDEST_V(2,8)<1> uwAVS_RESPONSE_2(7,0)<8;4,1> + mov (8) uwDEST_V(3,8)<1> uwAVS_RESPONSE_2(7,8)<8;4,1> + mov (8) uwDEST_V(4,8)<1> uwAVS_RESPONSE_2(10,0)<8;4,1> + mov (8) uwDEST_V(5,8)<1> uwAVS_RESPONSE_2(10,8)<8;4,1> + mov (8) uwDEST_V(6,8)<1> uwAVS_RESPONSE_2(11,0)<8;4,1> + mov (8) uwDEST_V(7,8)<1> uwAVS_RESPONSE_2(11,8)<8;4,1> +*/ +#else + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 1st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) uwDEST_U(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_U(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_U(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_U(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move 1st 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) uwDEST_V(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_V(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) uwDEST_V(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) uwDEST_V(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2st 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) uwDEST_U(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) uwDEST_U(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) uwDEST_U(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) uwDEST_U(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + + // Move 2st 8x8 words of V to dest GRF + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + mov (8) uwDEST_V(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) uwDEST_V(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) uwDEST_V(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) uwDEST_V(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> +#endif + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,75 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL2_AVS_IEF_8x4.asm ---------- + + // Move first 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x4 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(9,1)<16;4,2> + + // Move 8x4 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(11,1)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 4 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,83 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL2_AVS_IEF_8x8.asm ---------- + + // Move first 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) uwDEST_U(2)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_U(2,8)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) uwDEST_U(3)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_U(3,8)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + + // Move 8x8 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) uwDEST_V(2)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) uwDEST_V(2,8)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) uwDEST_V(3)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) uwDEST_V(3,8)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each GRF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL2_Scaling.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,101 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL2_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + +//------------------------------------------------------------------------------ + +$for (0; :ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_Y+nBI_CURRENT_SRC_Y + send (16) SCALE_RESPONSE_UW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_UV+nBI_CURRENT_SRC_UV + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_UD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(2) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_UD(2)<1> acc0:f { Compr } + + mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_U(%1)<1> SCALE_RESPONSE_UB(0) //possible error due to truncation - vK + mov (16) DEST_V(%1)<1> SCALE_RESPONSE_UB(2) //possible error due to truncation - vK + +} + + #define nSRC_REGION nREGION_1 + +//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,99 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL3_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y surface +// 2 sampler read for 8x8 U surface +// 2 sampler read for 8x8 V surface +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // 1st 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 1st 8x8 U sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + // 1st 8x8 V sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction to avoid back-2-back send instructions + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 2nd 8x8 U sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! + + // 2nd 8x8 V sampling + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:4:4 internal planar +//------------------------------------------------------------------------------ + #include "PL3_AVS_IEF_Unpack_16x8.asm" + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,90 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL3_AVS_IEF_8x4.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y surface +// 1 sampler read for 8x8 U surface +// 1 sampler read for 8x8 V surface +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // 1st 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U sampling ; Only 8x4 will be used + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Calculate Step X for chroma + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + // 8x8 V sampling ; Only 8x4 will be used + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f // Restore Step X for luma + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(12)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:0 internal planar +//------------------------------------------------------------------------------ + #include "PL3_AVS_IEF_Unpack_8x4.asm" + + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,90 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL3_AVS_IEF_8x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 Y surface +// 1 sampler read for 8x8 U surface +// 1 sampler read for 8x8 V surface +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + // 1st 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + + // 8x8 U sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Enable red channel + mul (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f 2.0:f // Calculate Step X for chroma + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(4)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_U+nBI_CURRENT_SRC_U + // Return U in 4 GRFs + + // 8x8 V sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_RED_CHANNEL_ONLY:ud // Dummy instruction just in order to avoid back-2-back send instructions! + mov (16) mAVS_8x8_HDR_UV.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(8)<1> mAVS_8x8_HDR_UV udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_V+nBI_CURRENT_SRC_V + // Return V in 4 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + + // 2nd 8x8 Y sampling + mov (1) rAVS_8x8_HDR.2:ud nAVS_GREEN_CHANNEL_ONLY:ud // Enable green channel + mov (1) rAVS_PAYLOAD.1:f fVIDEO_STEP_X:f // Restore Step X for luma + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(12)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_1CH+nSI_SRC_Y+nBI_CURRENT_SRC_Y + // Return Y in 4 GRFs + +//------------------------------------------------------------------------------ +// Unpacking sampler reads to 4:2:2 internal planar +//------------------------------------------------------------------------------ + #include "PL3_AVS_IEF_Unpack_8x8.asm" + + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,270 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL3_AVS_IEF_Unpack_16x8.asm ---------- + +#ifdef AVS_OUTPUT_16_BIT //Output is packed in AVYU format +// Move first 8x8 words of Y to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + +// Move first 8x8 words of U to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(7,12)<4;4,1> + +// Move first 8x8 words of V to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(9,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> 0:uw + mov (4) uwDEST_Y(1,3)<4> 0:uw + mov (4) uwDEST_Y(4,3)<4> 0:uw + mov (4) uwDEST_Y(5,3)<4> 0:uw + mov (4) uwDEST_Y(8,3)<4> 0:uw + mov (4) uwDEST_Y(9,3)<4> 0:uw + mov (4) uwDEST_Y(12,3)<4> 0:uw + mov (4) uwDEST_Y(13,3)<4> 0:uw + mov (4) uwDEST_Y(16,3)<4> 0:uw + mov (4) uwDEST_Y(17,3)<4> 0:uw + mov (4) uwDEST_Y(20,3)<4> 0:uw + mov (4) uwDEST_Y(21,3)<4> 0:uw + mov (4) uwDEST_Y(24,3)<4> 0:uw + mov (4) uwDEST_Y(25,3)<4> 0:uw + mov (4) uwDEST_Y(28,3)<4> 0:uw + mov (4) uwDEST_Y(29,3)<4> 0:uw + +// Move second 8x8 words of Y to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + +// Move second 8x8 words of U to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + +// Move second 8x8 words of V to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> 0:uw + mov (4) uwDEST_Y(3,3)<4> 0:uw + mov (4) uwDEST_Y(6,3)<4> 0:uw + mov (4) uwDEST_Y(7,3)<4> 0:uw + mov (4) uwDEST_Y(10,3)<4> 0:uw + mov (4) uwDEST_Y(11,3)<4> 0:uw + mov (4) uwDEST_Y(14,3)<4> 0:uw + mov (4) uwDEST_Y(15,3)<4> 0:uw + mov (4) uwDEST_Y(18,3)<4> 0:uw + mov (4) uwDEST_Y(19,3)<4> 0:uw + mov (4) uwDEST_Y(22,3)<4> 0:uw + mov (4) uwDEST_Y(23,3)<4> 0:uw + mov (4) uwDEST_Y(26,3)<4> 0:uw + mov (4) uwDEST_Y(27,3)<4> 0:uw + mov (4) uwDEST_Y(30,3)<4> 0:uw + mov (4) uwDEST_Y(31,3)<4> 0:uw + +/* This section will be used if 16-bit output is needed in planar format -vK + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> uwAVS_RESPONSE(%1)<8;4,1> + mov (8) uwDEST_Y(%1*2+1)<1> uwAVS_RESPONSE(%1,8)<8;4,1> + } + + // Move 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2)<1> uwAVS_RESPONSE(%1+4)<8;4,1> + mov (8) uwDEST_U(%1*2+1)<1> uwAVS_RESPONSE(%1+4,8)<8;4,1> + } + + // Move 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2)<1> uwAVS_RESPONSE(%1+8)<8;4,1> + mov (8) uwDEST_V(%1*2+1)<1> uwAVS_RESPONSE(%1+8,8)<8;4,1> + } + + // Move 2nd 8x8 words of Y to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> uwAVS_RESPONSE_2(%1)<8;4,1> + mov (8) uwDEST_Y(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1,8)<8;4,1> + } + + // Move 2nd 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2,8)<1> uwAVS_RESPONSE_2(%1+4)<8;4,1> + mov (8) uwDEST_U(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1+4,8)<8;4,1> + } + + // Move 2nd 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2,8)<1> uwAVS_RESPONSE_2(%1+8)<8;4,1> + mov (8) uwDEST_V(%1*2+1,8)<1> uwAVS_RESPONSE_2(%1+8,8)<8;4,1> + } +*/ +#else /* OUTPUT_8_BIT */ + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2)<1> ubAVS_RESPONSE(%1+4,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_U(%1*2+1)<1> ubAVS_RESPONSE(%1+4,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2)<1> ubAVS_RESPONSE(%1+8,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_V(%1*2+1)<1> ubAVS_RESPONSE(%1+8,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE_2(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1*2,8)<1> ubAVS_RESPONSE_2(%1+4,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_U(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1+4,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1*2,8)<1> ubAVS_RESPONSE_2(%1+8,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_V(%1*2+1,8)<1> ubAVS_RESPONSE_2(%1+8,8+1)<16;4,2> // Copy high byte in a word + } +#endif +//------------------------------------------------------------------------------ + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,75 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL3_AVS_IEF_Unpack_8x4.asm ---------- + + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x4 words of U to dest GRF (Copy high byte in a word) + mov (8) uwDEST_U(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) uwDEST_U(0,8)<1> ubAVS_RESPONSE(4,9)<16;4,2> + mov (8) uwDEST_U(1)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) uwDEST_U(1,8)<1> ubAVS_RESPONSE(5,9)<16;4,2> + + // Move 8x4 words of V to dest GRF + mov (8) uwDEST_V(0)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) uwDEST_V(0,8)<1> ubAVS_RESPONSE(8,9)<16;4,2> + mov (8) uwDEST_V(1)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) uwDEST_V(1,8)<1> ubAVS_RESPONSE(9,9)<16;4,2> + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE(%1+12,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE(%1+12,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 4 + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,74 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL3_AVS_IEF_Unpack_8x8.asm ---------- + + // Move 1st 8x8 words of Y to dest GRF at lower 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2)<1> ubAVS_RESPONSE(%1,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1)<1> ubAVS_RESPONSE(%1,8+1)<16;4,2> // Copy high byte in a word + } + // Move 8x8 words of U to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_U(%1)<1> ubAVS_RESPONSE(%1+4,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_U(%1,8)<1> ubAVS_RESPONSE(%1+4,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 8x8 words of V to dest GRF + $for(0; <8/2; 1) { + mov (8) uwDEST_V(%1)<1> ubAVS_RESPONSE(%1+8,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_V(%1,8)<1> ubAVS_RESPONSE(%1+8,8+1)<16;4,2> // Copy high byte in a word + } + + // Move 2nd 8x8 words of Y to dest GRF at higher 8 words of each RGF. + $for(0; <8/2; 1) { + mov (8) uwDEST_Y(%1*2,8)<1> ubAVS_RESPONSE(%1+12,1)<16;4,2> // Copy high byte in a word + mov (8) uwDEST_Y(%1*2+1,8)<1> ubAVS_RESPONSE(%1+12,8+1)<16;4,2> // Copy high byte in a word + } + +//------------------------------------------------------------------------------ + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL3_Scaling.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,102 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- PL3_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf { NoDDClr }//3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf { NoDDChk }//7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + +//------------------------------------------------------------------------------ + +$for (0; :ud rMSGSRC<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_VW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_V+nBI_CURRENT_SRC_V + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_Y+nBI_CURRENT_SRC_Y + send (16) SCALE_RESPONSE_UW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_U+nBI_CURRENT_SRC_U + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_VF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_VD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_UF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_UD(0)<1> acc0:f { Compr } + + mov (16) DEST_V(%1)<1> SCALE_RESPONSE_VB(0) //possible error due to truncation - vK + mov (16) DEST_Y(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_U(%1)<1> SCALE_RESPONSE_UB(0) //possible error due to truncation - vK + +} + + #define nSRC_REGION nREGION_1 + +//------------------------------------------------------------------------------ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DN_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DN_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DN_ALG.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DN_ALG.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,65 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_DISABLE + +#include "DNDI.inc" + +#undef nY_NUM_OF_ROWS +#define nY_NUM_OF_ROWS 8 // Number of Y rows per block + +#undef nSMPL_RESP_LEN +#define nSMPL_RESP_LEN nSMPL_RESP_LEN_DN_PL // Set the Number of GRFs in DNDI response +#undef nDPW_BLOCK_SIZE_DN +#define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_8 // DN Curr Block Size for Write is 16x8 +#undef nDPW_BLOCK_SIZE_HIST +#define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_2 // HIST Block Size for Write is 4x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// +#include "DNDI_COMMAND.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// +$for (0; ubRESP(nNODI_LUMA_OFFSET,%1*16)<16;16,1> // copy line of Y +} + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// +#include "DNDI_Hist_Save.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,115 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #ifdef DI_ONLY + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DI // set the number of GRF + #else + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #endif + + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w NODDCLR_NODDCHK // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w NODDCLR_NODDCHK // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud NODDCHK // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +#ifdef DI_ONLY +#else + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + + //set the save DN parameters + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w NODDCLR // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud NODDCLR_NODDCHK // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + } + $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + } + $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + +SAVE_DN_CURR: + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud +#endif + +// Save Processed frames +#include "DI_Save_PA.asm" + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,133 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + #undef nDPR_BLOCK_SIZE_UV + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_4 // DN Block Size for UV Write/Read is 8x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } +SAVE_DN_CURR: + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + +/////////////////////////////P208 UV Copy 422///////////////////////////////////////////////////// + //Read UV through DATAPORT + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (16x2) + mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud + send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_UV:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + asr (1) rMSGSRC.0<1>:d rMSGSRC.0<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (16x2) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_UV:ud \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,137 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + #undef nDPR_BLOCK_SIZE_UV + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_16+nBLOCK_HEIGHT_2 // DN Block Size for UV Write/Read is 16x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_COMMAND.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + // previous frame + $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (16x2) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + + mov (8) mubMSGHDR_DN(1, 0)<2> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET, 1)<16 ;8,2> + mov (8) mubMSGHDR_DN(1, 1)<2> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET, 16)<16 ;8,2> + mov (8) mubMSGHDR_DN(1, 16)<2> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET+1, 1)<16 ;8,2> + mov (8) mubMSGHDR_DN(1, 17)<2> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET+1, 16)<16 ;8,2> + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_UV:ud + + // current frame + $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_1_Y:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + asr (1) rMSGSRC.1<1>:d rMSGSRC.1<0;1,0>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (16x2) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + + mov (8) mubMSGHDR_DN(1, 0)<2> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET, 1)<16 ;8,2> + mov (8) mubMSGHDR_DN(1, 1)<2> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET, 16)<16 ;8,2> + mov (8) mubMSGHDR_DN(1, 16)<2> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+1, 1)<16 ;8,2> + mov (8) mubMSGHDR_DN(1, 17)<2> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET+1, 16)<16 ;8,2> + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_1_UV:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,131 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } +SAVE_DN_CURR: + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + +/////////////////////////////P208 UV Copy 422///////////////////////////////////////////////////// + //Read UV through DATAPORT + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // Y Block width and height (16x4) (U/V block size is the same) + mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud + send (8) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_2+nBI_CURRENT_SRC_UV:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + mov (8) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<8;8,1> + mov (8) mudMSGHDR_DN(2)<1> udBOT_U_IO(1)<8;8,1> + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_UV:ud + \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,136 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#define DI_ENABLE + + #include "DNDI.inc" + + #undef nY_NUM_OF_ROWS + #define nY_NUM_OF_ROWS 8 // Number of Y rows per block (4 rows for each frame) + #undef nUV_NUM_OF_ROWS + #define nUV_NUM_OF_ROWS 8 // Number of U/V rows per block + + #undef nSMPL_RESP_LEN + #define nSMPL_RESP_LEN nSMPL_RESP_LEN_DNDI // set the number of GRF + #undef nDPW_BLOCK_SIZE_HIST + #define nDPW_BLOCK_SIZE_HIST nBLOCK_WIDTH_4+nBLOCK_HEIGHT_1 // HIST Block Size for Write is 4x2 + #undef nDPW_BLOCK_SIZE_DN + #define nDPW_BLOCK_SIZE_DN nBLOCK_WIDTH_16+nBLOCK_HEIGHT_4 // DN Block Size for Write is 16x4 + #undef nDPR_BLOCK_SIZE_UV + #define nDPR_BLOCK_SIZE_UV nBLOCK_WIDTH_8+nBLOCK_HEIGHT_2 // DN Block Size for UV Write/Read is 8x2 + +////////////////////////////////////// Run the DN Algorithm /////////////////////////////////////// + #include "DNDI_Command.asm" + +////////////////////////////////////// Rearrange for Internal Planar ////////////////////////////// + // move the previous frame Y component to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_LUMA_OFFSET,%1*16) + } + // move the previous frame U,V components to internal planar format + $for (0; ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(0,%1*8)<1> ubRESP(nDI_PREV_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + // move the current frame Y component to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_LUMA_OFFSET,%1*16) + } + // move the current frame U,V components to internal planar format + $for (0; ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16+1)<16;8,2> //U pixels + mov (8) uwDEST_V(2,%1*8)<1> ubRESP(nDI_CURR_FRAME_CHROMA_OFFSET,%1*16)<16;8,2> //V pixels + } + +////////////////////////////////////// Save the STMM Data for Next Run ///////////////////////// + // Write STMM to memory + shr (1) rMSGSRC.0<1>:ud wORIX<0;1,0>:w 1:w // X origin / 2 + mov (1) rMSGSRC.1<1>:ud wORIY<0;1,0>:w // Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_STMM:ud // block width and height (8x4) + mov (8) mudMSGHDR_STMM(0)<1> rMSGSRC.0<8;8,1>:ud // message header + mov (8) mudMSGHDR_STMM(1)<1> udRESP(nDI_STMM_OFFSET,0) // Move STMM to MRF + send (8) dNULLREG mMSGHDR_STMM udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_STMM+nBI_STMM_HISTORY_OUTPUT:ud + +////////////////////////////////////// Save the History Data for Next Run ///////////////////////// + #include "DI_Hist_Save.asm" + +////////////////////////////////////// Save the DN Curr Frame for Next Run //////////////////////// + add (4) pCF_Y_OFFSET<1>:uw ubSRC_CF_OFFSET<4;4,1>:ub npDN_YUV:w + // check top/bottom field first + cmp.e.f0.0 (1) null<1>:w ubTFLD_FIRST<0;1,0>:ub 1:w + (f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,4)<4;4,1> // 1st field luma from current frame (line 1,3) + } + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + $for (0,0; udRESP(nDI_CURR_FRAME_LUMA_OFFSET+%2,0)<4;4,1> // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN(1,%1*4+4)<1> udRESP(nDI_CURR_2ND_FIELD_LUMA_OFFSET,%2*4)<4;4,1> // 1st field luma from current frame (line 1,3) + } +SAVE_DN_CURR: + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + mov (1) rMSGSRC.2<1>:ud nDPW_BLOCK_SIZE_DN:ud // block width and height (16x4) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + send (8) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nDPMW_MSG_LEN_PL_DN_DI+nBI_DESTINATION_Y:ud + + +/////////////////////////////IMC3 UV Copy 422///////////////////////////////////////////////////// + //Read UV through DATAPORT + add (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w wSRC_H_ORI_OFFSET<2;2,1>:w // Source Y Block origin + asr (2) rMSGSRC.0<1>:d rMSGSRC.0<2;2,1>:d 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // U/V block width and height (8x2) + mov (8) mudMSGHDR_DN<1> rMSGSRC<8;8,1>:ud + send (4) udBOT_U_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_U:ud + send (4) udBOT_V_IO(0)<1> mMSGHDR_DN udDUMMY_NULL nDATAPORT_READ nDPMR_MSGDSC+nRESLEN_1+nBI_CURRENT_SRC_V:ud + + //Write UV through DATAPORT + mov (2) rMSGSRC.0<1>:ud wORIX<2;2,1>:w // X origin and Y origin + asr (2) rMSGSRC.0<1>:d wORIX<2;2,1>:w 1:w // U/V block origin should be half of Y's + mov (1) rMSGSRC.2<1>:ud nDPR_BLOCK_SIZE_UV:ud // block width and height (8x2) + mov (8) mudMSGHDR_DN(0)<1> rMSGSRC.0<8;8,1>:ud + mov (4) mudMSGHDR_DN(1)<1> udBOT_U_IO(0)<4;4,1> + send (4) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_U:ud + mov (4) mudMSGHDR_DN(1)<1> udBOT_V_IO(0)<4;4,1> + send (4) dNULLREG mMSGHDR_DN udDUMMY_NULL nDATAPORT_WRITE nDPMW_MSGDSC+nMSGLEN_1+nBI_DESTINATION_V:ud \ No newline at end of file diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,63 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- RGB_AVS_IEF_16x8.asm ---------- + +#include "AVS_IEF.inc" + +//------------------------------------------------------------------------------ +// 2 sampler reads for 8x8 ARGB packed +//------------------------------------------------------------------------------ + + // 1st 8x8 setup + #include "AVS_SetupFirstBlock.asm" + + mov (1) rAVS_8x8_HDR.2:ud nAVS_ALL_CHANNELS:ud // Enable ARGB channels + mov (16) mAVS_8x8_HDR.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE(0)<1> mAVS_8x8_HDR udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_4CH+nSI_SRC_RGB+nBI_CURRENT_SRC_YUV + // Return ARGB in 16 GRFs + + // 2nd 8x8 setup + #include "AVS_SetupSecondBlock.asm" + mov (16) mAVS_8x8_HDR_2.0:ud rAVS_8x8_HDR.0<8;8,1>:ud // Copy msg header and payload mirrors to MRFs + send (1) uwAVS_RESPONSE_2(0)<1> mAVS_8x8_HDR_2 udDUMMY_NULL nSMPL_ENGINE nAVS_MSG_DSC_4CH+nSI_SRC_RGB+nBI_CURRENT_SRC_YUV + // Return ARGB in 16 GRFs + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,281 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- RGB_AVS_IEF_Unpack_16x8.asm ---------- +#include "AVS_IEF.inc" + +#ifdef AVS_OUTPUT_16_BIT +// Move first 8x8 words of B to dest GRF (as packed) + mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(4,0)<4;4,1> + mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(4,8)<4;4,1> + mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(4,4)<4;4,1> + mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(4,12)<4;4,1> + mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(5,0)<4;4,1> + mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(5,8)<4;4,1> + mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(5,4)<4;4,1> + mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(5,12)<4;4,1> + mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(12,0)<4;4,1> + mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(12,8)<4;4,1> + mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(12,4)<4;4,1> + mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(12,12)<4;4,1> + mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(13,0)<4;4,1> + mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(13,8)<4;4,1> + mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(13,4)<4;4,1> + mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(13,12)<4;4,1> + +// Move first 8x8 words of G to dest GRF (as packed) + mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> + mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> + mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> + mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> + mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> + mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> + mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> + mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> + mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(10,0)<4;4,1> + mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(10,8)<4;4,1> + mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(10,4)<4;4,1> + mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(10,12)<4;4,1> + mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(11,0)<4;4,1> + mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(11,8)<4;4,1> + mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(11,4)<4;4,1> + mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(11,12)<4;4,1> + +// Move first 8x8 words of R to dest GRF (as packed) + mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(0,0)<4;4,1> + mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(0,8)<4;4,1> + mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(0,4)<4;4,1> + mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(0,12)<4;4,1> + mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(1,0)<4;4,1> + mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(1,8)<4;4,1> + mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(1,4)<4;4,1> + mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(1,12)<4;4,1> + mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> + mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> + mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> + mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> + mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> + mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> + mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> + mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> + +// Move first 8x8 words of A to dest GRF (as packed) + mov (4) uwDEST_Y(0,3)<4> uwAVS_RESPONSE(6,0)<4;4,1> + mov (4) uwDEST_Y(1,3)<4> uwAVS_RESPONSE(6,8)<4;4,1> + mov (4) uwDEST_Y(4,3)<4> uwAVS_RESPONSE(6,4)<4;4,1> + mov (4) uwDEST_Y(5,3)<4> uwAVS_RESPONSE(6,12)<4;4,1> + mov (4) uwDEST_Y(8,3)<4> uwAVS_RESPONSE(7,0)<4;4,1> + mov (4) uwDEST_Y(9,3)<4> uwAVS_RESPONSE(7,8)<4;4,1> + mov (4) uwDEST_Y(12,3)<4> uwAVS_RESPONSE(7,4)<4;4,1> + mov (4) uwDEST_Y(13,3)<4> uwAVS_RESPONSE(7,12)<4;4,1> + mov (4) uwDEST_Y(16,3)<4> uwAVS_RESPONSE(14,0)<4;4,1> + mov (4) uwDEST_Y(17,3)<4> uwAVS_RESPONSE(14,8)<4;4,1> + mov (4) uwDEST_Y(20,3)<4> uwAVS_RESPONSE(14,4)<4;4,1> + mov (4) uwDEST_Y(21,3)<4> uwAVS_RESPONSE(14,12)<4;4,1> + mov (4) uwDEST_Y(24,3)<4> uwAVS_RESPONSE(15,0)<4;4,1> + mov (4) uwDEST_Y(25,3)<4> uwAVS_RESPONSE(15,8)<4;4,1> + mov (4) uwDEST_Y(28,3)<4> uwAVS_RESPONSE(15,4)<4;4,1> + mov (4) uwDEST_Y(29,3)<4> uwAVS_RESPONSE(15,12)<4;4,1> + +// Move second 8x8 words of B to dest GRF + mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> + mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> + mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> + mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> + mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> + mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> + mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> + mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> + mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(12,0)<4;4,1> + mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(12,8)<4;4,1> + mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(12,4)<4;4,1> + mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(12,12)<4;4,1> + mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(13,0)<4;4,1> + mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(13,8)<4;4,1> + mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(13,4)<4;4,1> + mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(13,12)<4;4,1> + +// Move second 8x8 words of G to dest GRF + mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> + mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> + mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> + mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> + mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> + mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> + mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> + mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> + mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> + mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> + mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> + mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> + mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> + mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> + mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> + mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> + +// Move second 8x8 words of R to dest GRF + mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> + mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> + mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> + mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> + mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> + mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> + mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> + mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> + mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> + mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> + mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> + mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> + mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> + mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> + mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> + mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> + +// Move second 8x8 words of A to dest GRF + mov (4) uwDEST_Y(2,3)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> + mov (4) uwDEST_Y(3,3)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> + mov (4) uwDEST_Y(6,3)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> + mov (4) uwDEST_Y(7,3)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> + mov (4) uwDEST_Y(10,3)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> + mov (4) uwDEST_Y(11,3)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> + mov (4) uwDEST_Y(14,3)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> + mov (4) uwDEST_Y(15,3)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> + mov (4) uwDEST_Y(18,3)<4> uwAVS_RESPONSE_2(14,0)<4;4,1> + mov (4) uwDEST_Y(19,3)<4> uwAVS_RESPONSE_2(14,8)<4;4,1> + mov (4) uwDEST_Y(22,3)<4> uwAVS_RESPONSE_2(14,4)<4;4,1> + mov (4) uwDEST_Y(23,3)<4> uwAVS_RESPONSE_2(14,12)<4;4,1> + mov (4) uwDEST_Y(26,3)<4> uwAVS_RESPONSE_2(15,0)<4;4,1> + mov (4) uwDEST_Y(27,3)<4> uwAVS_RESPONSE_2(15,8)<4;4,1> + mov (4) uwDEST_Y(30,3)<4> uwAVS_RESPONSE_2(15,4)<4;4,1> + mov (4) uwDEST_Y(31,3)<4> uwAVS_RESPONSE_2(15,12)<4;4,1> + +#else /* OUTPUT_8_BIT */ +// Move first 8x8 words of B to dest GRF + mov (8) ubDEST_Y(0,2)<4> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) ubDEST_Y(2,2)<4> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) ubDEST_Y(4,2)<4> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) ubDEST_Y(6,2)<4> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) ubDEST_Y(8,2)<4> ubAVS_RESPONSE(12,1)<16;4,2> + mov (8) ubDEST_Y(10,2)<4> ubAVS_RESPONSE(12,8+1)<16;4,2> + mov (8) ubDEST_Y(12,2)<4> ubAVS_RESPONSE(13,1)<16;4,2> + mov (8) ubDEST_Y(14,2)<4> ubAVS_RESPONSE(13,8+1)<16;4,2> + +// Move first 8x8 words of G to dest GRF + mov (8) ubDEST_Y(0,1)<4> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) ubDEST_Y(2,1)<4> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) ubDEST_Y(4,1)<4> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) ubDEST_Y(6,1)<4> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) ubDEST_Y(8,1)<4> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) ubDEST_Y(10,1)<4> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) ubDEST_Y(12,1)<4> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) ubDEST_Y(14,1)<4> ubAVS_RESPONSE(11,8+1)<16;4,2> + +// Move first 8x8 words of R to dest GRF + mov (8) ubDEST_Y(0,0)<4> ubAVS_RESPONSE(0,1)<16;4,2> + mov (8) ubDEST_Y(2,0)<4> ubAVS_RESPONSE(0,8+1)<16;4,2> + mov (8) ubDEST_Y(4,0)<4> ubAVS_RESPONSE(1,1)<16;4,2> + mov (8) ubDEST_Y(6,0)<4> ubAVS_RESPONSE(1,8+1)<16;4,2> + mov (8) ubDEST_Y(8,0)<4> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) ubDEST_Y(10,0)<4> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) ubDEST_Y(12,0)<4> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) ubDEST_Y(14,0)<4> ubAVS_RESPONSE(9,8+1)<16;4,2> + +// Move first 8x8 words of A to dest GRF + mov (8) ubDEST_Y(0,3)<4> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) ubDEST_Y(2,3)<4> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) ubDEST_Y(4,3)<4> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) ubDEST_Y(6,3)<4> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) ubDEST_Y(8,3)<4> ubAVS_RESPONSE(14,1)<16;4,2> + mov (8) ubDEST_Y(10,3)<4> ubAVS_RESPONSE(14,8+1)<16;4,2> + mov (8) ubDEST_Y(12,3)<4> ubAVS_RESPONSE(15,1)<16;4,2> + mov (8) ubDEST_Y(14,3)<4> ubAVS_RESPONSE(15,8+1)<16;4,2> + +// Move second 8x8 words of B to dest GRF + mov (8) ubDEST_Y(1,2)<4> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) ubDEST_Y(3,2)<4> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) ubDEST_Y(5,2)<4> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) ubDEST_Y(7,2)<4> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) ubDEST_Y(9,2)<4> ubAVS_RESPONSE_2(12,1)<16;4,2> + mov (8) ubDEST_Y(11,2)<4> ubAVS_RESPONSE_2(12,8+1)<16;4,2> + mov (8) ubDEST_Y(13,2)<4> ubAVS_RESPONSE_2(13,1)<16;4,2> + mov (8) ubDEST_Y(15,2)<4> ubAVS_RESPONSE_2(13,8+1)<16;4,2> + +// Move second 8x8 words of G to dest GRF + mov (8) ubDEST_Y(1,1)<4> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) ubDEST_Y(3,1)<4> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) ubDEST_Y(5,1)<4> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) ubDEST_Y(7,1)<4> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) ubDEST_Y(9,1)<4> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) ubDEST_Y(11,1)<4> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) ubDEST_Y(13,1)<4> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) ubDEST_Y(15,1)<4> ubAVS_RESPONSE_2(11,8+1)<16;4,2> + +// Move second 8x8 words of R to dest GRF + mov (8) ubDEST_Y(1,0)<4> ubAVS_RESPONSE_2(0,1)<16;4,2> + mov (8) ubDEST_Y(3,0)<4> ubAVS_RESPONSE_2(0,8+1)<16;4,2> + mov (8) ubDEST_Y(5,0)<4> ubAVS_RESPONSE_2(1,1)<16;4,2> + mov (8) ubDEST_Y(7,0)<4> ubAVS_RESPONSE_2(1,8+1)<16;4,2> + mov (8) ubDEST_Y(9,0)<4> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) ubDEST_Y(11,0)<4> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) ubDEST_Y(13,0)<4> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) ubDEST_Y(15,0)<4> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + +// Move second 8x8 words of A to dest GRF + mov (8) ubDEST_Y(1,3)<4> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) ubDEST_Y(3,3)<4> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) ubDEST_Y(5,3)<4> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) ubDEST_Y(7,3)<4> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + mov (8) ubDEST_Y(9,3)<4> ubAVS_RESPONSE_2(14,1)<16;4,2> + mov (8) ubDEST_Y(11,3)<4> ubAVS_RESPONSE_2(14,8+1)<16;4,2> + mov (8) ubDEST_Y(13,3)<4> ubAVS_RESPONSE_2(15,1)<16;4,2> + mov (8) ubDEST_Y(15,3)<4> ubAVS_RESPONSE_2(15,8+1)<16;4,2> +#endif +//------------------------------------------------------------------------------ + + // Set to write bottom region to memory + #define SRC_REGION REGION_2 + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,290 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- RGB_AVS_IEF_Unpack_16x8.asm ---------- +#include "AVS_IEF.inc" + +.declare DEST_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw + + +#ifdef AVS_OUTPUT_16_BIT +//This portion will need to be changed if unpacking is required for Y416 kernels (in case of blending etc) - vK + +//// Move first 8x8 words of B to dest GRF (as packed) +// mov (4) uwDEST_Y(0,2)<4> uwAVS_RESPONSE(4,0)<4;4,1> +// mov (4) uwDEST_Y(1,2)<4> uwAVS_RESPONSE(4,8)<4;4,1> +// mov (4) uwDEST_Y(4,2)<4> uwAVS_RESPONSE(4,4)<4;4,1> +// mov (4) uwDEST_Y(5,2)<4> uwAVS_RESPONSE(4,12)<4;4,1> +// mov (4) uwDEST_Y(8,2)<4> uwAVS_RESPONSE(5,0)<4;4,1> +// mov (4) uwDEST_Y(9,2)<4> uwAVS_RESPONSE(5,8)<4;4,1> +// mov (4) uwDEST_Y(12,2)<4> uwAVS_RESPONSE(5,4)<4;4,1> +// mov (4) uwDEST_Y(13,2)<4> uwAVS_RESPONSE(5,12)<4;4,1> +// mov (4) uwDEST_Y(16,2)<4> uwAVS_RESPONSE(12,0)<4;4,1> +// mov (4) uwDEST_Y(17,2)<4> uwAVS_RESPONSE(12,8)<4;4,1> +// mov (4) uwDEST_Y(20,2)<4> uwAVS_RESPONSE(12,4)<4;4,1> +// mov (4) uwDEST_Y(21,2)<4> uwAVS_RESPONSE(12,12)<4;4,1> +// mov (4) uwDEST_Y(24,2)<4> uwAVS_RESPONSE(13,0)<4;4,1> +// mov (4) uwDEST_Y(25,2)<4> uwAVS_RESPONSE(13,8)<4;4,1> +// mov (4) uwDEST_Y(28,2)<4> uwAVS_RESPONSE(13,4)<4;4,1> +// mov (4) uwDEST_Y(29,2)<4> uwAVS_RESPONSE(13,12)<4;4,1> +// +//// Move first 8x8 words of G to dest GRF (as packed) +// mov (4) uwDEST_Y(0,1)<4> uwAVS_RESPONSE(2,0)<4;4,1> +// mov (4) uwDEST_Y(1,1)<4> uwAVS_RESPONSE(2,8)<4;4,1> +// mov (4) uwDEST_Y(4,1)<4> uwAVS_RESPONSE(2,4)<4;4,1> +// mov (4) uwDEST_Y(5,1)<4> uwAVS_RESPONSE(2,12)<4;4,1> +// mov (4) uwDEST_Y(8,1)<4> uwAVS_RESPONSE(3,0)<4;4,1> +// mov (4) uwDEST_Y(9,1)<4> uwAVS_RESPONSE(3,8)<4;4,1> +// mov (4) uwDEST_Y(12,1)<4> uwAVS_RESPONSE(3,4)<4;4,1> +// mov (4) uwDEST_Y(13,1)<4> uwAVS_RESPONSE(3,12)<4;4,1> +// mov (4) uwDEST_Y(16,1)<4> uwAVS_RESPONSE(10,0)<4;4,1> +// mov (4) uwDEST_Y(17,1)<4> uwAVS_RESPONSE(10,8)<4;4,1> +// mov (4) uwDEST_Y(20,1)<4> uwAVS_RESPONSE(10,4)<4;4,1> +// mov (4) uwDEST_Y(21,1)<4> uwAVS_RESPONSE(10,12)<4;4,1> +// mov (4) uwDEST_Y(24,1)<4> uwAVS_RESPONSE(11,0)<4;4,1> +// mov (4) uwDEST_Y(25,1)<4> uwAVS_RESPONSE(11,8)<4;4,1> +// mov (4) uwDEST_Y(28,1)<4> uwAVS_RESPONSE(11,4)<4;4,1> +// mov (4) uwDEST_Y(29,1)<4> uwAVS_RESPONSE(11,12)<4;4,1> +// +//// Move first 8x8 words of R to dest GRF (as packed) +// mov (4) uwDEST_Y(0,0)<4> uwAVS_RESPONSE(0,0)<4;4,1> +// mov (4) uwDEST_Y(1,0)<4> uwAVS_RESPONSE(0,8)<4;4,1> +// mov (4) uwDEST_Y(4,0)<4> uwAVS_RESPONSE(0,4)<4;4,1> +// mov (4) uwDEST_Y(5,0)<4> uwAVS_RESPONSE(0,12)<4;4,1> +// mov (4) uwDEST_Y(8,0)<4> uwAVS_RESPONSE(1,0)<4;4,1> +// mov (4) uwDEST_Y(9,0)<4> uwAVS_RESPONSE(1,8)<4;4,1> +// mov (4) uwDEST_Y(12,0)<4> uwAVS_RESPONSE(1,4)<4;4,1> +// mov (4) uwDEST_Y(13,0)<4> uwAVS_RESPONSE(1,12)<4;4,1> +// mov (4) uwDEST_Y(16,0)<4> uwAVS_RESPONSE(8,0)<4;4,1> +// mov (4) uwDEST_Y(17,0)<4> uwAVS_RESPONSE(8,8)<4;4,1> +// mov (4) uwDEST_Y(20,0)<4> uwAVS_RESPONSE(8,4)<4;4,1> +// mov (4) uwDEST_Y(21,0)<4> uwAVS_RESPONSE(8,12)<4;4,1> +// mov (4) uwDEST_Y(24,0)<4> uwAVS_RESPONSE(9,0)<4;4,1> +// mov (4) uwDEST_Y(25,0)<4> uwAVS_RESPONSE(9,8)<4;4,1> +// mov (4) uwDEST_Y(28,0)<4> uwAVS_RESPONSE(9,4)<4;4,1> +// mov (4) uwDEST_Y(29,0)<4> uwAVS_RESPONSE(9,12)<4;4,1> +// +//// Move first 8x8 words of A to dest GRF (as packed) +// mov (4) uwDEST_Y(0,3)<4> uwAVS_RESPONSE(6,0)<4;4,1> +// mov (4) uwDEST_Y(1,3)<4> uwAVS_RESPONSE(6,8)<4;4,1> +// mov (4) uwDEST_Y(4,3)<4> uwAVS_RESPONSE(6,4)<4;4,1> +// mov (4) uwDEST_Y(5,3)<4> uwAVS_RESPONSE(6,12)<4;4,1> +// mov (4) uwDEST_Y(8,3)<4> uwAVS_RESPONSE(7,0)<4;4,1> +// mov (4) uwDEST_Y(9,3)<4> uwAVS_RESPONSE(7,8)<4;4,1> +// mov (4) uwDEST_Y(12,3)<4> uwAVS_RESPONSE(7,4)<4;4,1> +// mov (4) uwDEST_Y(13,3)<4> uwAVS_RESPONSE(7,12)<4;4,1> +// mov (4) uwDEST_Y(16,3)<4> uwAVS_RESPONSE(14,0)<4;4,1> +// mov (4) uwDEST_Y(17,3)<4> uwAVS_RESPONSE(14,8)<4;4,1> +// mov (4) uwDEST_Y(20,3)<4> uwAVS_RESPONSE(14,4)<4;4,1> +// mov (4) uwDEST_Y(21,3)<4> uwAVS_RESPONSE(14,12)<4;4,1> +// mov (4) uwDEST_Y(24,3)<4> uwAVS_RESPONSE(15,0)<4;4,1> +// mov (4) uwDEST_Y(25,3)<4> uwAVS_RESPONSE(15,8)<4;4,1> +// mov (4) uwDEST_Y(28,3)<4> uwAVS_RESPONSE(15,4)<4;4,1> +// mov (4) uwDEST_Y(29,3)<4> uwAVS_RESPONSE(15,12)<4;4,1> +// +//// Move second 8x8 words of B to dest GRF +// mov (4) uwDEST_Y(2,2)<4> uwAVS_RESPONSE_2(4,0)<4;4,1> +// mov (4) uwDEST_Y(3,2)<4> uwAVS_RESPONSE_2(4,8)<4;4,1> +// mov (4) uwDEST_Y(6,2)<4> uwAVS_RESPONSE_2(4,4)<4;4,1> +// mov (4) uwDEST_Y(7,2)<4> uwAVS_RESPONSE_2(4,12)<4;4,1> +// mov (4) uwDEST_Y(10,2)<4> uwAVS_RESPONSE_2(5,0)<4;4,1> +// mov (4) uwDEST_Y(11,2)<4> uwAVS_RESPONSE_2(5,8)<4;4,1> +// mov (4) uwDEST_Y(14,2)<4> uwAVS_RESPONSE_2(5,4)<4;4,1> +// mov (4) uwDEST_Y(15,2)<4> uwAVS_RESPONSE_2(5,12)<4;4,1> +// mov (4) uwDEST_Y(18,2)<4> uwAVS_RESPONSE_2(12,0)<4;4,1> +// mov (4) uwDEST_Y(19,2)<4> uwAVS_RESPONSE_2(12,8)<4;4,1> +// mov (4) uwDEST_Y(22,2)<4> uwAVS_RESPONSE_2(12,4)<4;4,1> +// mov (4) uwDEST_Y(23,2)<4> uwAVS_RESPONSE_2(12,12)<4;4,1> +// mov (4) uwDEST_Y(26,2)<4> uwAVS_RESPONSE_2(13,0)<4;4,1> +// mov (4) uwDEST_Y(27,2)<4> uwAVS_RESPONSE_2(13,8)<4;4,1> +// mov (4) uwDEST_Y(30,2)<4> uwAVS_RESPONSE_2(13,4)<4;4,1> +// mov (4) uwDEST_Y(31,2)<4> uwAVS_RESPONSE_2(13,12)<4;4,1> +// +//// Move second 8x8 words of G to dest GRF +// mov (4) uwDEST_Y(2,1)<4> uwAVS_RESPONSE_2(2,0)<4;4,1> +// mov (4) uwDEST_Y(3,1)<4> uwAVS_RESPONSE_2(2,8)<4;4,1> +// mov (4) uwDEST_Y(6,1)<4> uwAVS_RESPONSE_2(2,4)<4;4,1> +// mov (4) uwDEST_Y(7,1)<4> uwAVS_RESPONSE_2(2,12)<4;4,1> +// mov (4) uwDEST_Y(10,1)<4> uwAVS_RESPONSE_2(3,0)<4;4,1> +// mov (4) uwDEST_Y(11,1)<4> uwAVS_RESPONSE_2(3,8)<4;4,1> +// mov (4) uwDEST_Y(14,1)<4> uwAVS_RESPONSE_2(3,4)<4;4,1> +// mov (4) uwDEST_Y(15,1)<4> uwAVS_RESPONSE_2(3,12)<4;4,1> +// mov (4) uwDEST_Y(18,1)<4> uwAVS_RESPONSE_2(10,0)<4;4,1> +// mov (4) uwDEST_Y(19,1)<4> uwAVS_RESPONSE_2(10,8)<4;4,1> +// mov (4) uwDEST_Y(22,1)<4> uwAVS_RESPONSE_2(10,4)<4;4,1> +// mov (4) uwDEST_Y(23,1)<4> uwAVS_RESPONSE_2(10,12)<4;4,1> +// mov (4) uwDEST_Y(26,1)<4> uwAVS_RESPONSE_2(11,0)<4;4,1> +// mov (4) uwDEST_Y(27,1)<4> uwAVS_RESPONSE_2(11,8)<4;4,1> +// mov (4) uwDEST_Y(30,1)<4> uwAVS_RESPONSE_2(11,4)<4;4,1> +// mov (4) uwDEST_Y(31,1)<4> uwAVS_RESPONSE_2(11,12)<4;4,1> +// +//// Move second 8x8 words of R to dest GRF +// mov (4) uwDEST_Y(2,0)<4> uwAVS_RESPONSE_2(0,0)<4;4,1> +// mov (4) uwDEST_Y(3,0)<4> uwAVS_RESPONSE_2(0,8)<4;4,1> +// mov (4) uwDEST_Y(6,0)<4> uwAVS_RESPONSE_2(0,4)<4;4,1> +// mov (4) uwDEST_Y(7,0)<4> uwAVS_RESPONSE_2(0,12)<4;4,1> +// mov (4) uwDEST_Y(10,0)<4> uwAVS_RESPONSE_2(1,0)<4;4,1> +// mov (4) uwDEST_Y(11,0)<4> uwAVS_RESPONSE_2(1,8)<4;4,1> +// mov (4) uwDEST_Y(14,0)<4> uwAVS_RESPONSE_2(1,4)<4;4,1> +// mov (4) uwDEST_Y(15,0)<4> uwAVS_RESPONSE_2(1,12)<4;4,1> +// mov (4) uwDEST_Y(18,0)<4> uwAVS_RESPONSE_2(8,0)<4;4,1> +// mov (4) uwDEST_Y(19,0)<4> uwAVS_RESPONSE_2(8,8)<4;4,1> +// mov (4) uwDEST_Y(22,0)<4> uwAVS_RESPONSE_2(8,4)<4;4,1> +// mov (4) uwDEST_Y(23,0)<4> uwAVS_RESPONSE_2(8,12)<4;4,1> +// mov (4) uwDEST_Y(26,0)<4> uwAVS_RESPONSE_2(9,0)<4;4,1> +// mov (4) uwDEST_Y(27,0)<4> uwAVS_RESPONSE_2(9,8)<4;4,1> +// mov (4) uwDEST_Y(30,0)<4> uwAVS_RESPONSE_2(9,4)<4;4,1> +// mov (4) uwDEST_Y(31,0)<4> uwAVS_RESPONSE_2(9,12)<4;4,1> +// +//// Move second 8x8 words of A to dest GRF +// mov (4) uwDEST_Y(2,3)<4> uwAVS_RESPONSE_2(6,0)<4;4,1> +// mov (4) uwDEST_Y(3,3)<4> uwAVS_RESPONSE_2(6,8)<4;4,1> +// mov (4) uwDEST_Y(6,3)<4> uwAVS_RESPONSE_2(6,4)<4;4,1> +// mov (4) uwDEST_Y(7,3)<4> uwAVS_RESPONSE_2(6,12)<4;4,1> +// mov (4) uwDEST_Y(10,3)<4> uwAVS_RESPONSE_2(7,0)<4;4,1> +// mov (4) uwDEST_Y(11,3)<4> uwAVS_RESPONSE_2(7,8)<4;4,1> +// mov (4) uwDEST_Y(14,3)<4> uwAVS_RESPONSE_2(7,4)<4;4,1> +// mov (4) uwDEST_Y(15,3)<4> uwAVS_RESPONSE_2(7,12)<4;4,1> +// mov (4) uwDEST_Y(18,3)<4> uwAVS_RESPONSE_2(14,0)<4;4,1> +// mov (4) uwDEST_Y(19,3)<4> uwAVS_RESPONSE_2(14,8)<4;4,1> +// mov (4) uwDEST_Y(22,3)<4> uwAVS_RESPONSE_2(14,4)<4;4,1> +// mov (4) uwDEST_Y(23,3)<4> uwAVS_RESPONSE_2(14,12)<4;4,1> +// mov (4) uwDEST_Y(26,3)<4> uwAVS_RESPONSE_2(15,0)<4;4,1> +// mov (4) uwDEST_Y(27,3)<4> uwAVS_RESPONSE_2(15,8)<4;4,1> +// mov (4) uwDEST_Y(30,3)<4> uwAVS_RESPONSE_2(15,4)<4;4,1> +// mov (4) uwDEST_Y(31,3)<4> uwAVS_RESPONSE_2(15,12)<4;4,1> + +#else /* OUTPUT_8_BIT */ + +// Move first 8x8 words of B to dest GRF + mov (8) DEST_B(0)<1> ubAVS_RESPONSE(4,1)<16;4,2> + mov (8) DEST_B(1)<1> ubAVS_RESPONSE(4,8+1)<16;4,2> + mov (8) DEST_B(2)<1> ubAVS_RESPONSE(5,1)<16;4,2> + mov (8) DEST_B(3)<1> ubAVS_RESPONSE(5,8+1)<16;4,2> + mov (8) DEST_B(4)<1> ubAVS_RESPONSE(12,1)<16;4,2> + mov (8) DEST_B(5)<1> ubAVS_RESPONSE(12,8+1)<16;4,2> + mov (8) DEST_B(6)<1> ubAVS_RESPONSE(13,1)<16;4,2> + mov (8) DEST_B(7)<1> ubAVS_RESPONSE(13,8+1)<16;4,2> + +// Move first 8x8 words of G to dest GRF + mov (8) DEST_G(0)<1> ubAVS_RESPONSE(2,1)<16;4,2> + mov (8) DEST_G(1)<1> ubAVS_RESPONSE(2,8+1)<16;4,2> + mov (8) DEST_G(2)<1> ubAVS_RESPONSE(3,1)<16;4,2> + mov (8) DEST_G(3)<1> ubAVS_RESPONSE(3,8+1)<16;4,2> + mov (8) DEST_G(4)<1> ubAVS_RESPONSE(10,1)<16;4,2> + mov (8) DEST_G(5)<1> ubAVS_RESPONSE(10,8+1)<16;4,2> + mov (8) DEST_G(6)<1> ubAVS_RESPONSE(11,1)<16;4,2> + mov (8) DEST_G(7)<1> ubAVS_RESPONSE(11,8+1)<16;4,2> + +// Move first 8x8 words of R to dest GRF + mov (8) DEST_R(0)<1> ubAVS_RESPONSE(0,1)<16;4,2> + mov (8) DEST_R(1)<1> ubAVS_RESPONSE(0,8+1)<16;4,2> + mov (8) DEST_R(2)<1> ubAVS_RESPONSE(1,1)<16;4,2> + mov (8) DEST_R(3)<1> ubAVS_RESPONSE(1,8+1)<16;4,2> + mov (8) DEST_R(4)<1> ubAVS_RESPONSE(8,1)<16;4,2> + mov (8) DEST_R(5)<1> ubAVS_RESPONSE(8,8+1)<16;4,2> + mov (8) DEST_R(6)<1> ubAVS_RESPONSE(9,1)<16;4,2> + mov (8) DEST_R(7)<1> ubAVS_RESPONSE(9,8+1)<16;4,2> + +// Move first 8x8 words of A to dest GRF + mov (8) DEST_A(0)<1> ubAVS_RESPONSE(6,1)<16;4,2> + mov (8) DEST_A(1)<1> ubAVS_RESPONSE(6,8+1)<16;4,2> + mov (8) DEST_A(2)<1> ubAVS_RESPONSE(7,1)<16;4,2> + mov (8) DEST_A(3)<1> ubAVS_RESPONSE(7,8+1)<16;4,2> + mov (8) DEST_A(4)<1> ubAVS_RESPONSE(14,1)<16;4,2> + mov (8) DEST_A(5)<1> ubAVS_RESPONSE(14,8+1)<16;4,2> + mov (8) DEST_A(6)<1> ubAVS_RESPONSE(15,1)<16;4,2> + mov (8) DEST_A(7)<1> ubAVS_RESPONSE(15,8+1)<16;4,2> + +// Move second 8x8 words of B to dest GRF + mov (8) DEST_B(0,8)<1> ubAVS_RESPONSE_2(4,1)<16;4,2> + mov (8) DEST_B(1,8)<1> ubAVS_RESPONSE_2(4,8+1)<16;4,2> + mov (8) DEST_B(2,8)<1> ubAVS_RESPONSE_2(5,1)<16;4,2> + mov (8) DEST_B(3,8)<1> ubAVS_RESPONSE_2(5,8+1)<16;4,2> + mov (8) DEST_B(4,8)<1> ubAVS_RESPONSE_2(12,1)<16;4,2> + mov (8) DEST_B(5,8)<1> ubAVS_RESPONSE_2(12,8+1)<16;4,2> + mov (8) DEST_B(6,8)<1> ubAVS_RESPONSE_2(13,1)<16;4,2> + mov (8) DEST_B(7,8)<1> ubAVS_RESPONSE_2(13,8+1)<16;4,2> + +// Move second 8x8 words of G to dest GRF + mov (8) DEST_G(0,8)<1> ubAVS_RESPONSE_2(2,1)<16;4,2> + mov (8) DEST_G(1,8)<1> ubAVS_RESPONSE_2(2,8+1)<16;4,2> + mov (8) DEST_G(2,8)<1> ubAVS_RESPONSE_2(3,1)<16;4,2> + mov (8) DEST_G(3,8)<1> ubAVS_RESPONSE_2(3,8+1)<16;4,2> + mov (8) DEST_G(4,8)<1> ubAVS_RESPONSE_2(10,1)<16;4,2> + mov (8) DEST_G(5,8)<1> ubAVS_RESPONSE_2(10,8+1)<16;4,2> + mov (8) DEST_G(6,8)<1> ubAVS_RESPONSE_2(11,1)<16;4,2> + mov (8) DEST_G(7,8)<1> ubAVS_RESPONSE_2(11,8+1)<16;4,2> + +// Move second 8x8 words of R to dest GRF + mov (8) DEST_R(0,8)<1> ubAVS_RESPONSE_2(0,1)<16;4,2> + mov (8) DEST_R(1,8)<1> ubAVS_RESPONSE_2(0,8+1)<16;4,2> + mov (8) DEST_R(2,8)<1> ubAVS_RESPONSE_2(1,1)<16;4,2> + mov (8) DEST_R(3,8)<1> ubAVS_RESPONSE_2(1,8+1)<16;4,2> + mov (8) DEST_R(4,8)<1> ubAVS_RESPONSE_2(8,1)<16;4,2> + mov (8) DEST_R(5,8)<1> ubAVS_RESPONSE_2(8,8+1)<16;4,2> + mov (8) DEST_R(6,8)<1> ubAVS_RESPONSE_2(9,1)<16;4,2> + mov (8) DEST_R(7,8)<1> ubAVS_RESPONSE_2(9,8+1)<16;4,2> + +// Move second 8x8 words of A to dest GRF + mov (8) DEST_A(0,8)<1> ubAVS_RESPONSE_2(6,1)<16;4,2> + mov (8) DEST_A(1,8)<1> ubAVS_RESPONSE_2(6,8+1)<16;4,2> + mov (8) DEST_A(2,8)<1> ubAVS_RESPONSE_2(7,1)<16;4,2> + mov (8) DEST_A(3,8)<1> ubAVS_RESPONSE_2(7,8+1)<16;4,2> + mov (8) DEST_A(4,8)<1> ubAVS_RESPONSE_2(14,1)<16;4,2> + mov (8) DEST_A(5,8)<1> ubAVS_RESPONSE_2(14,8+1)<16;4,2> + mov (8) DEST_A(6,8)<1> ubAVS_RESPONSE_2(15,1)<16;4,2> + mov (8) DEST_A(7,8)<1> ubAVS_RESPONSE_2(15,8+1)<16;4,2> +#endif +//------------------------------------------------------------------------------ + + // Set to write bottom region to memory + #define SRC_REGION REGION_1 + + // Re-define new # of lines + #undef nUV_NUM_OF_ROWS + #undef nY_NUM_OF_ROWS + + #define nY_NUM_OF_ROWS 8 + #define nUV_NUM_OF_ROWS 8 + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_Scaling.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_Scaling.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_Scaling.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/RGB_Scaling.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,102 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +//---------- RGB_Scaling.asm ---------- +#include "Scaling.inc" + + // Build 16 elements ramp in float32 and normalized it +// mov (8) SAMPLER_RAMP(0)<1> 0x76543210:v +// add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f +mov (4) SAMPLER_RAMP(0)<1> 0x48403000:vf //3, 2, 1, 0 in float vector +mov (4) SAMPLER_RAMP(0,4)<1> 0x5C585450:vf //7, 6, 5, 4 in float vector +add (8) SAMPLER_RAMP(1)<1> SAMPLER_RAMP(0) 8.0:f + +//Module: PrepareScaleCoord.asm + + // Setup for sampler msg hdr + mov (2) rMSGSRC.0<1>:ud 0:ud { NoDDClr } // Unused fields + mov (1) rMSGSRC.2<1>:ud 0:ud { NoDDChk } // Write and offset + + // Calculate 16 v based on the step Y and vertical origin + mov (16) mfMSGPAYLOAD(2)<1> fSRC_VID_V_ORI<0;1,0>:f + mov (16) SCALE_COORD_Y<1>:f fSRC_VID_V_ORI<0;1,0>:f + + // Calculate 16 u based on the step X and hori origin +// line (16) mfMSGPAYLOAD(0)<1> SCALE_STEP_X<0;1,0>:f SAMPLER_RAMP(0) // Assign to mrf directly + mov (16) acc0:f fSRC_VID_H_ORI<0;1,0>:f { Compr } + mac (16) mfMSGPAYLOAD(0)<1> fVIDEO_STEP_X<0;1,0>:f SAMPLER_RAMP(0) { Compr } + + //Setup the constants for line instruction + mov (1) SCALE_LINE_P255<1>:f 255.0:f { NoDDClr } //{ NoDDClr, NoDDChk } + mov (1) SCALE_LINE_P0_5<1>:f 0.5:f { NoDDChk } + + +//------------------------------------------------------------------------------ + +$for (0; :ud // Copy msg header and payload mirrors to MRFs + send (16) SCALE_RESPONSE_YW(0)<1> MSGHDR_SCALE udDUMMY_NULL nSMPL_ENGINE SMPLR_MSG_DSC+nSI_SRC_SIMD16_RGB+nBI_CURRENT_SRC_RGB + + // Calculate 16 v for next line + add (16) mfMSGPAYLOAD(2)<1> SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + add (16) SCALE_COORD_Y<1>:f SCALE_COORD_Y<8;8,1>:f fVIDEO_STEP_Y<0;1,0>:f // Assign to mrf directly + + // Scale back to [0, 255], convert f to ud + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(0) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(0)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(2) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(2)<1> acc0:f { Compr } + + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(4) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(4)<1> acc0:f { Compr } + +//#if defined(SAVE_ARGB) //Only needed if Alpha value is written to the destination + line (16) acc0:f SCALE_LINE_P255<0;1,0>:f SCALE_RESPONSE_YF(6) { Compr } // Process B, V + mov (16) SCALE_RESPONSE_YD(6)<1> acc0:f { Compr } +//#endif + + mov (16) DEST_R(%1)<1> SCALE_RESPONSE_YB(0) //possible error due to truncation - vK + mov (16) DEST_G(%1)<1> SCALE_RESPONSE_YB(2) //possible error due to truncation - vK + mov (16) DEST_B(%1)<1> SCALE_RESPONSE_YB(4) //possible error due to truncation - vK + mov (16) DEST_A(%1)<1> SCALE_RESPONSE_YB(6) //possible error due to truncation - vK +} diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/Scaling.inc intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/Scaling.inc --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Core_Kernels/Scaling.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Core_Kernels/Scaling.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,105 @@ +/* + * All Video Processing kernels + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +// File name: Scaling.inc + +#ifndef _SCALING_INC_ +#define _SCALING_INC_ + +// Local variables---------------------------------------------------------------------------------- +#define MSGHDR_SCALE m1 // Message Payload Header (Uses m2, m3, m4, m5 implicitly) + +//-------------------------------------------------------------------------------------------------- +//r10.0 thru r33.0; Primary surface read from sampler (16x8) +#define DEST_Y uwTOP_Y +#define DEST_U uwTOP_U +#define DEST_V uwTOP_V + +//r10.0 thru r41.0 +.declare DEST_B Base=REG(r,10) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_G Base=REG(r,18) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_R Base=REG(r,26) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw +.declare DEST_A Base=REG(r,34) ElementSize=2 SrcRegion=REGION(8,1) DstRegion=<1> Type=uw + +//r56.0 thru r79.0 +.declare SCALE_RESPONSE_YF Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=f +.declare SCALE_RESPONSE_UF Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=f +.declare SCALE_RESPONSE_VF Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=f + +.declare SCALE_RESPONSE_YW Base=REG(r,nBOT_Y) ElementSize=2 SrcRegion=REGION(16,1) Type=uw +.declare SCALE_RESPONSE_UW Base=REG(r,nBOT_U) ElementSize=2 SrcRegion=REGION(16,1) Type=uw +.declare SCALE_RESPONSE_VW Base=REG(r,nBOT_V) ElementSize=2 SrcRegion=REGION(16,1) Type=uw + +.declare SCALE_RESPONSE_YD Base=REG(r,nBOT_Y) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare SCALE_RESPONSE_UD Base=REG(r,nBOT_U) ElementSize=4 SrcRegion=REGION(8,1) Type=ud +.declare SCALE_RESPONSE_VD Base=REG(r,nBOT_V) ElementSize=4 SrcRegion=REGION(8,1) Type=ud + +.declare SCALE_RESPONSE_YB Base=REG(r,nBOT_Y) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare SCALE_RESPONSE_UB Base=REG(r,nBOT_U) ElementSize=1 SrcRegion=REGION(8,4) Type=ub +.declare SCALE_RESPONSE_VB Base=REG(r,nBOT_V) ElementSize=1 SrcRegion=REGION(8,4) Type=ub + +.declare SAMPLER_RAMP Base=REG(r,42) ElementSize=4 SrcRegion=<8;8,1> Type=f // 2 GRFs, 16 elements + +//#define SCALE_STEP_X REG2(r,43,0) +//#define SCALE_COORD_X REG2(r,43,3) + +#define SCALE_LINE_P255 REG2(r,43,4) // = 255.0 Used in 'line' inst to multiply 255, add 0.5, and round to int. +#define SCALE_LINE_P0_5 REG2(r,43,7) // = 0.5 + +//r44.0 thru r45.0 +#define SCALE_COORD_Y REG(r,44) //2GRF + + +// Send Message [DevILK] Message Descriptor +// MBZ MsgL=5 MsgR=8 H MBZ SIMD MsgType SmplrIndx BindTab +// 000 0 101 0 1000 1 0 10 0000 0000 00000000 +// 0 A 8 A 0 0 0 0 +// MsgL=1+2*2(u,v)=5 MsgR=8 +#define SMPLR_MSG_DSC 0x0A8A0000 // ILK Sampler Message Descriptor + +// Re-define new number of lines +#undef nY_NUM_OF_ROWS +#undef nUV_NUM_OF_ROWS + +#define nY_NUM_OF_ROWS 8 +#define nUV_NUM_OF_ROWS 8 + + +#endif //_SCALING_INC_ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,232 @@ + +INTEL_G4I = + +INTEL_G4A = null.g4a +INTEL_G4B = null.g4b +INTEL_G4B_GEN5 = null.g4b.gen5 +INTEL_G6A = null.g6a +INTEL_G6B = null.g6b + +INTEL_PP_G4B_GEN5 = \ + nv12_avs_nv12.g4b.gen5 \ + nv12_dn_nv12.g4b.gen5 \ + nv12_dndi_nv12.g4b.gen5 \ + nv12_load_save_nv12.g4b.gen5 \ + nv12_load_save_pa.g4b.gen5 \ + nv12_load_save_pl3.g4b.gen5 \ + nv12_load_save_rgbx.g4b.gen5 \ + nv12_scaling_nv12.g4b.gen5 \ + pa_load_save_pa.g4b.gen5 \ + pa_load_save_nv12.g4b.gen5 \ + pa_load_save_pl3.g4b.gen5 \ + pl3_load_save_nv12.g4b.gen5 \ + pl3_load_save_pa.g4b.gen5 \ + pl3_load_save_pl3.g4b.gen5 \ + rgbx_load_save_nv12.g4b.gen5 \ + $(NULL) + +INTEL_PP_G6B = \ + nv12_avs_nv12.g6b \ + nv12_dn_nv12.g6b \ + nv12_dndi_nv12.g6b \ + nv12_load_save_nv12.g6b \ + nv12_load_save_pa.g6b \ + nv12_load_save_pl3.g6b \ + nv12_load_save_rgbx.g6b \ + nv12_scaling_nv12.g6b \ + pa_load_save_pa.g6b \ + pa_load_save_nv12.g6b \ + pa_load_save_pl3.g6b \ + pl3_load_save_nv12.g6b \ + pl3_load_save_pl3.g6b \ + pl3_load_save_pa.g6b \ + rgbx_load_save_nv12.g6b \ + $(NULL) + +INTEL_PP_ASM = \ + nv12_avs_nv12.asm \ + nv12_dn_nv12.asm \ + nv12_dndi_nv12.asm \ + nv12_load_save_nv12.asm \ + nv12_load_save_pa.asm \ + nv12_load_save_pl3.asm \ + nv12_load_save_rgbx.asm \ + nv12_scaling_nv12.asm \ + pa_load_save_pa.asm \ + pa_load_save_nv12.asm \ + pa_load_save_pl3.asm \ + pl3_load_save_nv12.asm \ + pl3_load_save_pl3.asm \ + pl3_load_save_pa.asm \ + rgbx_load_save_nv12.asm \ + $(NULL) + +INTEL_PP_ASM += \ + Common/AYUV_Load_16x8.asm \ + Common/IMC3_Load_8x4.asm \ + Common/IMC3_Load_8x5.asm \ + Common/IMC3_Load_9x5.asm \ + Common/Init_All_Regs.asm \ + Common/Multiple_Loop.asm \ + Common/Multiple_Loop_Head.asm \ + Common/NV11_Load_4x8.asm \ + Common/NV11_Load_5x8.asm \ + Common/NV12_Load_8x4.asm \ + Common/NV12_Load_8x5.asm \ + Common/NV12_Load_9x5.asm \ + Common/P208_Load_8x8.asm \ + Common/P208_Load_9x8.asm \ + Common/PA_Load_8x8.asm \ + Common/PA_Load_9x8.asm \ + Common/PL16x8_PL8x4.asm \ + Common/PL16x8_PL8x8.asm \ + Common/PL4x8_Save_NV11.asm \ + Common/PL5x8_PL16x8.asm \ + Common/PL5x8_PL8x8.asm \ + Common/PL8x4_Save_IMC3.asm \ + Common/PL8x4_Save_NV12.asm \ + Common/PL8x5_PL8x8.asm \ + Common/PL8x8_PL8x4.asm \ + Common/PL8x8_Save_P208.asm \ + Common/PL8x8_Save_PA.asm \ + Common/PL9x5_PL16x8.asm \ + Common/PL9x8_PL16x8.asm \ + Common/RGB16x8_Save_RGB.asm \ + Common/RGB16x8_Save_RGB16.asm \ + Common/RGB16x8_Save_Y416.asm \ + Common/RGB_Pack.asm \ + Common/RGBX_Load_16x8.asm \ + Common/RGBX_to_YUV_Coef.asm \ + Common/RGBX_Save_YUV_Fix.asm \ + Common/RGBX_Save_YUV_Float.asm \ + Common/YUV_to_RGBX_Coef.asm \ + Common/YUVX_Save_RGBX_Fix.asm \ + Common/YUVX_Save_RGBX_Float.asm \ + Common/SetupVPKernel.asm \ + Common/readSampler16x1.asm \ + Core_Kernels/AVS_SetupFirstBlock.asm \ + Core_Kernels/AVS_SetupSecondBlock.asm \ + Core_Kernels/DI_Hist_Save.asm \ + Core_Kernels/DI_SAVE_PA.asm \ + Core_Kernels/DNDI_COMMAND.asm \ + Core_Kernels/DNDI_Hist_Save.asm \ + Core_Kernels/PA_AVS_IEF_16x8.asm \ + Core_Kernels/PA_AVS_IEF_8x4.asm \ + Core_Kernels/PA_AVS_IEF_8x8.asm \ + Core_Kernels/PA_AVS_IEF_Sample.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PA_DNDI_ALG.asm \ + Core_Kernels/PA_DN_ALG.asm \ + Core_Kernels/PA_Scaling.asm \ + Core_Kernels/PL2_AVS_IEF_16x8.asm \ + Core_Kernels/PL2_AVS_IEF_8x4.asm \ + Core_Kernels/PL2_AVS_IEF_8x8.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PL2_Scaling.asm \ + Core_Kernels/PL3_AVS_IEF_16x8.asm \ + Core_Kernels/PL3_AVS_IEF_8x4.asm \ + Core_Kernels/PL3_AVS_IEF_8x8.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PL3_Scaling.asm \ + Core_Kernels/PL_DNDI_ALG.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm \ + Core_Kernels/PL_DN_ALG.asm \ + Core_Kernels/RGB_AVS_IEF_16x8.asm \ + Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm \ + Core_Kernels/RGB_Scaling.asm \ + $(NULL) + +INTEL_PP_INC = \ + Common/AYUV_Load_16x8.inc \ + Common/Expansion.inc \ + Common/PA_Load.inc \ + Common/PL2_Load.inc \ + Common/PL3_Load.inc \ + Common/PL4x8_Save_NV11.inc \ + Common/PL8x4_Save_IMC3.inc \ + Common/PL8x4_Save_NV12.inc \ + Common/PL8x8_PL8x4.inc \ + Common/PL8x8_Save_P208.inc \ + Common/PL8x8_Save_PA.inc \ + Common/RGB16x8_Save_RGB.inc \ + Common/RGB16x8_Save_RGB16.inc \ + Common/RGB16x8_Save_Y416.inc \ + Common/RGBX_Load_16x8.inc \ + Common/common.inc \ + Common/undefall.inc \ + Core_Kernels/AVS_IEF.inc \ + Core_Kernels/DI.inc \ + Core_Kernels/DNDI.inc \ + Core_Kernels/Scaling.inc + $(NULL) + +INTEL_PP_GEN5_ASM = $(INTEL_PP_G4B_GEN5:%.g4b.gen5=%.g5s) +INTEL_PP_GEN6_ASM = $(INTEL_PP_G6B:%.g6b=%.g6s) + +TARGETS = +if HAVE_GEN4ASM +TARGETS += $(INTEL_PP_G4B_GEN5) +TARGETS += $(INTEL_PP_G6B) +endif + +all-local: $(TARGETS) + +SUFFIXES = .g4a .g4b .g4b.gen5 .g6a .g6b .g5s .g6s .asm + +if HAVE_GEN4ASM +.g4a.g4b: + $(AM_V_GEN)m4 $*.g4a > $*.g4m && \ + $(AM_V_GEN)$(GEN4ASM) -o $@ $*.g4m && \ + $(AM_V_GEN)$(GEN4ASM) -g 5 -o $@.gen5 $*.g4m && \ + rm $*.g4m + +.g6a.g6b: + $(AM_V_GEN)m4 $< > $*.g6m && \ + $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $*.g6m && \ + rm $*.g6m + +$(INTEL_G4B): $(INTEL_G4I) + +$(INTEL_PP_GEN5_ASM): $(INTEL_PP_ASM) +.asm.g5s: + $(AM_V_GEN)cpp -D DEV_ILK -I $(srcdir)/Common/ -I $(srcdir)/Core_Kernels $< > _pp0.$@; \ + $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ + rm _pp0.$@ +.g5s.g4b.gen5: + $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 5 $< + +$(INTEL_PP_GEN6_ASM): $(INTEL_PP_ASM) +.asm.g6s: + $(AM_V_GEN)cpp -D GT -I $(srcdir)/Common/ -I $(srcdir)/Core_Kernels $< > _pp0.$@; \ + $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ + rm _pp0.$@ +.g6s.g6b: + $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 6 $< +endif + +CLEANFILES = $(INTEL_PP_GEN5_ASM) $(INTEL_PP_GEN6_ASM) + +EXTRA_DIST = \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) \ + $(INTEL_G4I) \ + $(INTEL_G6B) \ + $(INTEL_PP_ASM) \ + $(INTEL_PP_G4B_GEN5) \ + $(INTEL_PP_G6B) \ + $(INTEL_PP_INC) \ + $(NULL) + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,626 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ +VPATH = @srcdir@ +am__is_gnu_make = test -n '$(MAKEFILE_LIST)' && test -n '$(MAKELEVEL)' +am__make_running_with_option = \ + case $${target_option-} in \ + ?) ;; \ + *) echo "am__make_running_with_option: internal error: invalid" \ + "target option '$${target_option-}' specified" >&2; \ + exit 1;; \ + esac; \ + has_opt=no; \ + sane_makeflags=$$MAKEFLAGS; \ + if $(am__is_gnu_make); then \ + sane_makeflags=$$MFLAGS; \ + else \ + case $$MAKEFLAGS in \ + *\\[\ \ ]*) \ + bs=\\; \ + sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \ + | sed "s/$$bs$$bs[$$bs $$bs ]*//g"`;; \ + esac; \ + fi; \ + skip_next=no; \ + strip_trailopt () \ + { \ + flg=`printf '%s\n' "$$flg" | sed "s/$$1.*$$//"`; \ + }; \ + for flg in $$sane_makeflags; do \ + test $$skip_next = yes && { skip_next=no; continue; }; \ + case $$flg in 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@build_alias@ +build_cpu = @build_cpu@ +build_os = @build_os@ +build_vendor = @build_vendor@ +builddir = @builddir@ +datadir = @datadir@ +datarootdir = @datarootdir@ +docdir = @docdir@ +dvidir = @dvidir@ +exec_prefix = @exec_prefix@ +host = @host@ +host_alias = @host_alias@ +host_cpu = @host_cpu@ +host_os = @host_os@ +host_vendor = @host_vendor@ +htmldir = @htmldir@ +includedir = @includedir@ +infodir = @infodir@ +install_sh = @install_sh@ +libdir = @libdir@ +libexecdir = @libexecdir@ +localedir = @localedir@ +localstatedir = @localstatedir@ +mandir = @mandir@ +mkdir_p = @mkdir_p@ +oldincludedir = @oldincludedir@ +pdfdir = @pdfdir@ +prefix = @prefix@ +program_transform_name = @program_transform_name@ +psdir = @psdir@ +sbindir = @sbindir@ +sharedstatedir = @sharedstatedir@ +srcdir = @srcdir@ +sysconfdir = @sysconfdir@ +target_alias = @target_alias@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +INTEL_G4I = +INTEL_G4A = null.g4a +INTEL_G4B = null.g4b +INTEL_G4B_GEN5 = null.g4b.gen5 +INTEL_G6A = null.g6a +INTEL_G6B = null.g6b +INTEL_PP_G4B_GEN5 = \ + nv12_avs_nv12.g4b.gen5 \ + nv12_dn_nv12.g4b.gen5 \ + nv12_dndi_nv12.g4b.gen5 \ + nv12_load_save_nv12.g4b.gen5 \ + nv12_load_save_pa.g4b.gen5 \ + nv12_load_save_pl3.g4b.gen5 \ + nv12_load_save_rgbx.g4b.gen5 \ + nv12_scaling_nv12.g4b.gen5 \ + pa_load_save_pa.g4b.gen5 \ + pa_load_save_nv12.g4b.gen5 \ + pa_load_save_pl3.g4b.gen5 \ + pl3_load_save_nv12.g4b.gen5 \ + pl3_load_save_pa.g4b.gen5 \ + pl3_load_save_pl3.g4b.gen5 \ + rgbx_load_save_nv12.g4b.gen5 \ + $(NULL) + +INTEL_PP_G6B = \ + nv12_avs_nv12.g6b \ + nv12_dn_nv12.g6b \ + nv12_dndi_nv12.g6b \ + nv12_load_save_nv12.g6b \ + nv12_load_save_pa.g6b \ + nv12_load_save_pl3.g6b \ + nv12_load_save_rgbx.g6b \ + nv12_scaling_nv12.g6b \ + pa_load_save_pa.g6b \ + pa_load_save_nv12.g6b \ + pa_load_save_pl3.g6b \ + pl3_load_save_nv12.g6b \ + pl3_load_save_pl3.g6b \ + pl3_load_save_pa.g6b \ + rgbx_load_save_nv12.g6b \ + $(NULL) + +INTEL_PP_ASM = nv12_avs_nv12.asm nv12_dn_nv12.asm nv12_dndi_nv12.asm \ + nv12_load_save_nv12.asm nv12_load_save_pa.asm \ + nv12_load_save_pl3.asm nv12_load_save_rgbx.asm \ + nv12_scaling_nv12.asm pa_load_save_pa.asm \ + pa_load_save_nv12.asm pa_load_save_pl3.asm \ + pl3_load_save_nv12.asm pl3_load_save_pl3.asm \ + pl3_load_save_pa.asm rgbx_load_save_nv12.asm $(NULL) \ + Common/AYUV_Load_16x8.asm Common/IMC3_Load_8x4.asm \ + Common/IMC3_Load_8x5.asm Common/IMC3_Load_9x5.asm \ + Common/Init_All_Regs.asm Common/Multiple_Loop.asm \ + Common/Multiple_Loop_Head.asm Common/NV11_Load_4x8.asm \ + Common/NV11_Load_5x8.asm Common/NV12_Load_8x4.asm \ + Common/NV12_Load_8x5.asm Common/NV12_Load_9x5.asm \ + Common/P208_Load_8x8.asm Common/P208_Load_9x8.asm \ + Common/PA_Load_8x8.asm Common/PA_Load_9x8.asm \ + Common/PL16x8_PL8x4.asm Common/PL16x8_PL8x8.asm \ + Common/PL4x8_Save_NV11.asm Common/PL5x8_PL16x8.asm \ + Common/PL5x8_PL8x8.asm Common/PL8x4_Save_IMC3.asm \ + Common/PL8x4_Save_NV12.asm Common/PL8x5_PL8x8.asm \ + Common/PL8x8_PL8x4.asm Common/PL8x8_Save_P208.asm \ + Common/PL8x8_Save_PA.asm Common/PL9x5_PL16x8.asm \ + Common/PL9x8_PL16x8.asm Common/RGB16x8_Save_RGB.asm \ + Common/RGB16x8_Save_RGB16.asm Common/RGB16x8_Save_Y416.asm \ + Common/RGB_Pack.asm Common/RGBX_Load_16x8.asm \ + Common/RGBX_to_YUV_Coef.asm Common/RGBX_Save_YUV_Fix.asm \ + Common/RGBX_Save_YUV_Float.asm Common/YUV_to_RGBX_Coef.asm \ + Common/YUVX_Save_RGBX_Fix.asm Common/YUVX_Save_RGBX_Float.asm \ + Common/SetupVPKernel.asm Common/readSampler16x1.asm \ + Core_Kernels/AVS_SetupFirstBlock.asm \ + Core_Kernels/AVS_SetupSecondBlock.asm \ + Core_Kernels/DI_Hist_Save.asm Core_Kernels/DI_SAVE_PA.asm \ + Core_Kernels/DNDI_COMMAND.asm Core_Kernels/DNDI_Hist_Save.asm \ + Core_Kernels/PA_AVS_IEF_16x8.asm \ + Core_Kernels/PA_AVS_IEF_8x4.asm \ + Core_Kernels/PA_AVS_IEF_8x8.asm \ + Core_Kernels/PA_AVS_IEF_Sample.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PA_DNDI_ALG.asm Core_Kernels/PA_DN_ALG.asm \ + Core_Kernels/PA_Scaling.asm Core_Kernels/PL2_AVS_IEF_16x8.asm \ + Core_Kernels/PL2_AVS_IEF_8x4.asm \ + Core_Kernels/PL2_AVS_IEF_8x8.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PL2_Scaling.asm Core_Kernels/PL3_AVS_IEF_16x8.asm \ + Core_Kernels/PL3_AVS_IEF_8x4.asm \ + Core_Kernels/PL3_AVS_IEF_8x8.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm \ + Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm \ + Core_Kernels/PL3_Scaling.asm Core_Kernels/PL_DNDI_ALG.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm \ + Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm \ + Core_Kernels/PL_DN_ALG.asm Core_Kernels/RGB_AVS_IEF_16x8.asm \ + Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm \ + Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm \ + Core_Kernels/RGB_Scaling.asm $(NULL) +INTEL_PP_INC = \ + Common/AYUV_Load_16x8.inc \ + Common/Expansion.inc \ + Common/PA_Load.inc \ + Common/PL2_Load.inc \ + Common/PL3_Load.inc \ + Common/PL4x8_Save_NV11.inc \ + Common/PL8x4_Save_IMC3.inc \ + Common/PL8x4_Save_NV12.inc \ + Common/PL8x8_PL8x4.inc \ + Common/PL8x8_Save_P208.inc \ + Common/PL8x8_Save_PA.inc \ + Common/RGB16x8_Save_RGB.inc \ + Common/RGB16x8_Save_RGB16.inc \ + Common/RGB16x8_Save_Y416.inc \ + Common/RGBX_Load_16x8.inc \ + Common/common.inc \ + Common/undefall.inc \ + Core_Kernels/AVS_IEF.inc \ + Core_Kernels/DI.inc \ + Core_Kernels/DNDI.inc \ + Core_Kernels/Scaling.inc + +INTEL_PP_GEN5_ASM = $(INTEL_PP_G4B_GEN5:%.g4b.gen5=%.g5s) +INTEL_PP_GEN6_ASM = $(INTEL_PP_G6B:%.g6b=%.g6s) +TARGETS = $(am__append_1) +SUFFIXES = .g4a .g4b .g4b.gen5 .g6a .g6b .g5s .g6s .asm +CLEANFILES = $(INTEL_PP_GEN5_ASM) $(INTEL_PP_GEN6_ASM) +EXTRA_DIST = \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) \ + $(INTEL_G4I) \ + $(INTEL_G6B) \ + $(INTEL_PP_ASM) \ + $(INTEL_PP_G4B_GEN5) \ + $(INTEL_PP_G6B) \ + $(INTEL_PP_INC) \ + $(NULL) + + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g4a .g4b .g4b.gen5 .g6a .g6b .g5s .g6s .asm +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/post_processing/gen5_6/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/shaders/post_processing/gen5_6/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs +tags TAGS: + +ctags CTAGS: + +cscope cscopelist: + + +distdir: $(DISTFILES) + @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + list='$(DISTFILES)'; \ + dist_files=`for file in $$list; do echo $$file; done | \ + sed -e "s|^$$srcdirstrip/||;t" \ + -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ + case $$dist_files in \ + */*) $(MKDIR_P) `echo "$$dist_files" | \ + sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ + sort -u` ;; \ + esac; \ + for file in $$dist_files; do \ + if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ + if test -d $$d/$$file; then \ + dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ + if test -d "$(distdir)/$$file"; then \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ + cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ + else \ + test -f "$(distdir)/$$file" \ + || cp -p $$d/$$file "$(distdir)/$$file" \ + || exit 1; \ + fi; \ + done +check-am: all-am +check: check-am +all-am: Makefile all-local +installdirs: +install: install-am +install-exec: install-exec-am +install-data: install-data-am +uninstall: uninstall-am + +install-am: all-am + @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am + +installcheck: installcheck-am +install-strip: + if test -z '$(STRIP)'; then \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + install; \ + else \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \ + fi +mostlyclean-generic: + +clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) + +distclean-generic: + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + +maintainer-clean-generic: + @echo "This command is intended for maintainers to use" + @echo "it deletes files that may require special tools to rebuild." + -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) +clean: clean-am + +clean-am: clean-generic clean-libtool mostlyclean-am + +distclean: distclean-am + -rm -f Makefile +distclean-am: clean-am distclean-generic + +dvi: dvi-am + +dvi-am: + +html: html-am + +html-am: + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-dvi-am: + +install-exec-am: + +install-html: install-html-am + +install-html-am: + +install-info: install-info-am + +install-info-am: + +install-man: + +install-pdf: install-pdf-am + +install-pdf-am: + +install-ps: install-ps-am + +install-ps-am: + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-generic mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: all all-am all-local check check-am clean clean-generic \ + clean-libtool cscopelist-am ctags-am distclean \ + distclean-generic distclean-libtool distdir dvi dvi-am html \ + html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-pdf install-pdf-am \ + install-ps install-ps-am install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-generic \ + mostlyclean-libtool pdf pdf-am ps ps-am tags-am uninstall \ + uninstall-am + + $(NULL) + +all-local: $(TARGETS) + +@HAVE_GEN4ASM_TRUE@.g4a.g4b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)m4 $*.g4a > $*.g4m && \ +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -o $@ $*.g4m && \ +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 5 -o $@.gen5 $*.g4m && \ +@HAVE_GEN4ASM_TRUE@ rm $*.g4m + +@HAVE_GEN4ASM_TRUE@.g6a.g6b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)m4 $< > $*.g6m && \ +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $*.g6m && \ +@HAVE_GEN4ASM_TRUE@ rm $*.g6m + +@HAVE_GEN4ASM_TRUE@$(INTEL_G4B): $(INTEL_G4I) + +@HAVE_GEN4ASM_TRUE@$(INTEL_PP_GEN5_ASM): $(INTEL_PP_ASM) +@HAVE_GEN4ASM_TRUE@.asm.g5s: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -D DEV_ILK -I $(srcdir)/Common/ -I $(srcdir)/Core_Kernels $< > _pp0.$@; \ +@HAVE_GEN4ASM_TRUE@ $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ +@HAVE_GEN4ASM_TRUE@ rm _pp0.$@ +@HAVE_GEN4ASM_TRUE@.g5s.g4b.gen5: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 5 $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_PP_GEN6_ASM): $(INTEL_PP_ASM) +@HAVE_GEN4ASM_TRUE@.asm.g6s: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -D GT -I $(srcdir)/Common/ -I $(srcdir)/Core_Kernels $< > _pp0.$@; \ +@HAVE_GEN4ASM_TRUE@ $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ +@HAVE_GEN4ASM_TRUE@ rm _pp0.$@ +@HAVE_GEN4ASM_TRUE@.g6s.g6b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 6 $< + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3 @@ +/* Just for test */ + +send(16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 {align1 EOT}; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g4b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g4b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g4b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g4b 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1 @@ + { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g4b.gen5 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1 @@ + { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/null.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/null.g6b 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1 @@ + { 0x07800031, 0x24001cc8, 0x00000000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_avs_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_avs_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_avs_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_avs_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,20 @@ +// Module name: NV12_AVS_NV12 +.kernel NV12_AVS_NV12 +.code + +#define INC_SCALING + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PL2_AVS_IEF_16x8.asm" +#include "PL16x8_PL8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_avs_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,174 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x01000005, 0x20002d2c, 0x00000088, 0x80008000 }, + { 0x00010001, 0x20c003fd, 0x00000000, 0x00000000 }, + { 0x00000001, 0x212003bd, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x212403bd, 0x000000bc, 0x00000000 }, + { 0x00000001, 0x213403bd, 0x00000038, 0x00000000 }, + { 0x00200001, 0x612803bd, 0x004500a4, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00802001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x00000031, 0x25401c09, 0x208d0000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x25c01c09, 0x208d0000, 0x048bb802 }, + { 0x00000001, 0x240803bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x000000bc, 0x41000000 }, + { 0x00000048, 0x21287fbd, 0x000000c0, 0x41e00000 }, + { 0x00000001, 0x240403bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x21247fbd, 0x000000c0, 0x41000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00802001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x00000031, 0x27401c09, 0x208d0000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x27c01c09, 0x208d0000, 0x048bb802 }, + { 0x00600001, 0x21400229, 0x00aa0541, 0x00000000 }, + { 0x00600001, 0x21600229, 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{ 0x00600001, 0x23c00229, 0x00aa0681, 0x00000000 }, + { 0x00600001, 0x23e00229, 0x00aa0689, 0x00000000 }, + { 0x00600001, 0x24000229, 0x00aa06a1, 0x00000000 }, + { 0x00600001, 0x24200229, 0x00aa06a9, 0x00000000 }, + { 0x00600001, 0x21500229, 0x00aa0741, 0x00000000 }, + { 0x00600001, 0x21700229, 0x00aa0749, 0x00000000 }, + { 0x00600001, 0x21900229, 0x00aa0761, 0x00000000 }, + { 0x00600001, 0x21b00229, 0x00aa0769, 0x00000000 }, + { 0x00600001, 0x21d00229, 0x00aa0781, 0x00000000 }, + { 0x00600001, 0x21f00229, 0x00aa0789, 0x00000000 }, + { 0x00600001, 0x22100229, 0x00aa07a1, 0x00000000 }, + { 0x00600001, 0x22300229, 0x00aa07a9, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00aa07c1, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00aa07c9, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00aa07e1, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00aa07e9, 0x00000000 }, + { 0x00600001, 0x22d00229, 0x00aa0841, 0x00000000 }, + { 0x00600001, 0x22f00229, 0x00aa0849, 0x00000000 }, + { 0x00600001, 0x23100229, 0x00aa0861, 0x00000000 }, + { 0x00600001, 0x23300229, 0x00aa0869, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00aa0801, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00aa0809, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00aa0821, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00aa0829, 0x00000000 }, + { 0x00600001, 0x23d00229, 0x00aa0881, 0x00000000 }, + { 0x00600001, 0x23f00229, 0x00aa0889, 0x00000000 }, + { 0x00600001, 0x24100229, 0x00aa08a1, 0x00000000 }, + { 0x00600001, 0x24300229, 0x00aa08a9, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffec6 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffeba }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_avs_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,247 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x01000005, 0x20002d2c, 0x00000088, 0x80008000 }, + { 0x00010001, 0x20c003fd, 0x00000000, 0x00000000 }, + { 0x00000001, 0x212003bd, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x212403bd, 0x000000bc, 0x00000000 }, + { 0x00000001, 0x213403bd, 0x00000038, 0x00000000 }, + { 0x00200001, 0x612803bd, 0x004500a4, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00800001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x25401cc9, 0x00000000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00800001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x25c01cc9, 0x00000040, 0x048bb802 }, + { 0x00000001, 0x240803bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x000000bc, 0x41000000 }, + { 0x00000048, 0x21287fbd, 0x000000c0, 0x41e00000 }, + { 0x00000001, 0x240403bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x21247fbd, 0x000000c0, 0x41000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, + { 0x00800001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x27401cc9, 0x00000000, 0x044bb401 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, + { 0x00800001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02000031, 0x27c01cc9, 0x00000040, 0x048bb802 }, + { 0x00600001, 0x21400229, 0x00aa0541, 0x00000000 }, + { 0x00600001, 0x21600229, 0x00aa0549, 0x00000000 }, + { 0x00600001, 0x21800229, 0x00aa0561, 0x00000000 }, + { 0x00600001, 0x21a00229, 0x00aa0569, 0x00000000 }, + { 0x00600001, 0x21c00229, 0x00aa0581, 0x00000000 }, + { 0x00600001, 0x21e00229, 0x00aa0589, 0x00000000 }, + { 0x00600001, 0x22000229, 0x00aa05a1, 0x00000000 }, + { 0x00600001, 0x22200229, 0x00aa05a9, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00aa05c1, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00aa05c9, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00aa05e1, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00aa05e9, 0x00000000 }, + { 0x00600001, 0x22c00229, 0x00aa0641, 0x00000000 }, + { 0x00600001, 0x22e00229, 0x00aa0649, 0x00000000 }, + { 0x00600001, 0x23000229, 0x00aa0661, 0x00000000 }, + { 0x00600001, 0x23200229, 0x00aa0669, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00aa0601, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00aa0609, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00aa0621, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00aa0629, 0x00000000 }, + { 0x00600001, 0x23c00229, 0x00aa0681, 0x00000000 }, + { 0x00600001, 0x23e00229, 0x00aa0689, 0x00000000 }, + { 0x00600001, 0x24000229, 0x00aa06a1, 0x00000000 }, + { 0x00600001, 0x24200229, 0x00aa06a9, 0x00000000 }, + { 0x00600001, 0x21500229, 0x00aa0741, 0x00000000 }, + { 0x00600001, 0x21700229, 0x00aa0749, 0x00000000 }, + { 0x00600001, 0x21900229, 0x00aa0761, 0x00000000 }, + { 0x00600001, 0x21b00229, 0x00aa0769, 0x00000000 }, + { 0x00600001, 0x21d00229, 0x00aa0781, 0x00000000 }, + { 0x00600001, 0x21f00229, 0x00aa0789, 0x00000000 }, + { 0x00600001, 0x22100229, 0x00aa07a1, 0x00000000 }, + { 0x00600001, 0x22300229, 0x00aa07a9, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00aa07c1, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00aa07c9, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00aa07e1, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00aa07e9, 0x00000000 }, + { 0x00600001, 0x22d00229, 0x00aa0841, 0x00000000 }, + { 0x00600001, 0x22f00229, 0x00aa0849, 0x00000000 }, + { 0x00600001, 0x23100229, 0x00aa0861, 0x00000000 }, + { 0x00600001, 0x23300229, 0x00aa0869, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00aa0801, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00aa0809, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00aa0821, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00aa0829, 0x00000000 }, + { 0x00600001, 0x23d00229, 0x00aa0881, 0x00000000 }, + { 0x00600001, 0x23f00229, 0x00aa0889, 0x00000000 }, + { 0x00600001, 0x24100229, 0x00aa08a1, 0x00000000 }, + { 0x00600001, 0x24300229, 0x00aa08a9, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffec6 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffeba }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: NV12_DNDI_NV12 +.kernel NV12_DNDI_NV12 +.code + +#define INC_DNDI + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PL_DNDI_ALG_UVCopy_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_dndi_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,97 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, + { 0x01600031, 0x24400c01, 0x208d0000, 0x04cb8004 }, + { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00ae0481, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00ae0491, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00ae0490, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00ae04a1, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00ae04b1, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00ae04b0, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b104d0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00b104f0, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00ae0501, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00ae0500, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00ae0511, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00ae0510, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00ae0521, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00ae0520, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00ae0531, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00ae0530, 0x00000000 }, + { 0x00000008, 0x21003da1, 0x000000a0, 0x00010001 }, + { 0x00000001, 0x210401a1, 0x000000a2, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x21600022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x21800022, 0x008d0540, 0x00000000 }, + { 0x0b600031, 0x20000c04, 0x508d0000, 0x04082014 }, + { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, + { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00000003 }, + { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x21c00022, 0x00000560, 0x00000000 }, + { 0x0d600031, 0x20000c04, 0x508d0000, 0x04082014 }, + { 0x00800001, 0x20400232, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b10470, 0x00000000 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082007 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x40400232, 0x00ae0481, 0x00000000 }, + { 0x00600001, 0x40410232, 0x00ae0490, 0x00000000 }, + { 0x00600001, 0x40500232, 0x00ae04a1, 0x00000000 }, + { 0x00600001, 0x40510232, 0x00ae04b0, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082008 }, + { 0x00800001, 0x20400232, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b104d0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b104f0, 0x00000000 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0608200a }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x40400232, 0x00ae0501, 0x00000000 }, + { 0x00600001, 0x40410232, 0x00ae0510, 0x00000000 }, + { 0x00600001, 0x40500232, 0x00ae0521, 0x00000000 }, + { 0x00600001, 0x40510232, 0x00ae0530, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0408200b }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff5a }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff54 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,170 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, + { 0x02600031, 0x24400cc1, 0x00000020, 0x04cb8004 }, + { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00ae0481, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00ae0480, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00ae0491, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00ae0490, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00ae04a1, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00ae04a0, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00ae04b1, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00ae04b0, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b104d0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00b104f0, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00ae0501, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00ae0500, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00ae0511, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00ae0510, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00ae0521, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00ae0520, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00ae0531, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00ae0530, 0x00000000 }, + { 0x00000008, 0x21003da1, 0x000000a0, 0x00010001 }, + { 0x00000001, 0x210401a1, 0x000000a2, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x21600022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x21800022, 0x008d0540, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000160, 0x04094014 }, + { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, + { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00000003 }, + { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x21c00022, 0x00000560, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x000001a0, 0x04094014 }, + { 0x00800001, 0x20400232, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b10470, 0x00000000 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094007 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x40400232, 0x00ae0481, 0x00000000 }, + { 0x00600001, 0x40410232, 0x00ae0490, 0x00000000 }, + { 0x00600001, 0x40500232, 0x00ae04a1, 0x00000000 }, + { 0x00600001, 0x40510232, 0x00ae04b0, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094008 }, + { 0x00800001, 0x20400232, 0x00b104c0, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00b104d0, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00b104e0, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00b104f0, 0x00000000 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0609400a }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x40400232, 0x00ae0501, 0x00000000 }, + { 0x00600001, 0x40410232, 0x00ae0510, 0x00000000 }, + { 0x00600001, 0x40500232, 0x00ae0521, 0x00000000 }, + { 0x00600001, 0x40510232, 0x00ae0530, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0409400b }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff5a }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff54 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dn_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dn_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dn_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dn_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,26 @@ +// Module name: NV12_DN_NV12 +.kernel NV12_DN_NV12 +.code + +#define INC_DN + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" + +#define LOAD_UV_ONLY +#include "NV12_Load_8x4.asm" +#undef LOAD_UV_ONLY + +#include "PL_DN_ALG.asm" + +#include "PL8x4_Save_NV12.asm" + +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_dn_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,117 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0228a002 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, + { 0x01600031, 0x24400c01, 0x208d0000, 0x045b8004 }, + { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10480, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10490, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b104a0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00b104b0, 0x00000000 }, + { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, + { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00010003 }, + { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x21c00022, 0x004504c0, 0x00000000 }, + { 0x0d600031, 0x20000c04, 0x508d0000, 0x04082014 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff32 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff2c }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_dn_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,190 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02298002 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, + { 0x02600031, 0x24400cc1, 0x00000020, 0x045b8004 }, + { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10480, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10490, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b104a0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00b104b0, 0x00000000 }, + { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, + { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00010003 }, + { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x21c00022, 0x004504c0, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x000001a0, 0x04094014 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff32 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff2c }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: NV12_LOAD_SAVE_NV12 +.kernel NV12_LOAD_SAVE_NV12 +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "NV12_Load_8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_load_save_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,110 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0228a002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff40 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff3a }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,183 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02298002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff40 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff3a }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: NV12_LOAD_SAVE_pl1 +.kernel NV12_LOAD_SAVE_PL1 // what's usage of it? just a name? +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "NV12_Load_8x5.asm" +#include "PL8x5_PL8x8.asm" +#include "PL8x8_Save_PA.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_load_save_pl1.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,121 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0004000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0238a002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x00ae0840, 0x00000000 }, + { 0x00800001, 0x23800229, 0x00ae0841, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00ae0820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00ae0821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00ae0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00ae0801, 0x00000000 }, + { 0x80600042, 0x22b02529, 0x008d0270, 0x008d0280 }, + { 0x80600042, 0x23b02529, 0x008d0370, 0x008d0380 }, + { 0x00600001, 0x22a00129, 0x008d0270, 0x00000000 }, + { 0x80600042, 0x22902529, 0x008d0260, 0x008d0270 }, + { 0x00600001, 0x23a00129, 0x008d0370, 0x00000000 }, + { 0x80600042, 0x23902529, 0x008d0360, 0x008d0370 }, + { 0x00600001, 0x22800129, 0x008d0260, 0x00000000 }, + { 0x80600042, 0x22702529, 0x008d0250, 0x008d0260 }, + { 0x00600001, 0x23800129, 0x008d0360, 0x00000000 }, + { 0x80600042, 0x23702529, 0x008d0350, 0x008d0360 }, + { 0x00600001, 0x22600129, 0x008d0250, 0x00000000 }, + { 0x80600042, 0x22502529, 0x008d0240, 0x008d0250 }, + { 0x00600001, 0x23600129, 0x008d0350, 0x00000000 }, + { 0x80600042, 0x23502529, 0x008d0340, 0x008d0350 }, + { 0x00400040, 0x22083e28, 0x00690028, 0x07000700 }, + { 0x00800001, 0xd0000231, 0x00d20140, 0x00000000 }, + { 0x00800001, 0xd0200231, 0x00d20160, 0x00000000 }, + { 0x00800001, 0xd0400231, 0x00d20180, 0x00000000 }, + { 0x00800001, 0xd0600231, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0xd0800231, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0xd0a00231, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0xd0c00231, 0x00d20200, 0x00000000 }, + { 0x00800001, 0xd0e00231, 0x00d20220, 0x00000000 }, + { 0x00600001, 0xf4000231, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0xf8000231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xf4200231, 0x00ae0250, 0x00000000 }, + { 0x00600001, 0xf8200231, 0x00ae0350, 0x00000000 }, + { 0x00600001, 0xf4400231, 0x00ae0260, 0x00000000 }, + { 0x00600001, 0xf8400231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xf4600231, 0x00ae0270, 0x00000000 }, + { 0x00600001, 0xf8600231, 0x00ae0370, 0x00000000 }, + { 0x00600001, 0xf4800231, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0xf8800231, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0xf4a00231, 0x00ae0290, 0x00000000 }, + { 0x00600001, 0xf8a00231, 0x00ae0390, 0x00000000 }, + { 0x00600001, 0xf4c00231, 0x00ae02a0, 0x00000000 }, + { 0x00600001, 0xf8c00231, 0x00ae03a0, 0x00000000 }, + { 0x00600001, 0xf4e00231, 0x00ae02b0, 0x00000000 }, + { 0x00600001, 0xf8e00231, 0x00ae03b0, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00010001 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x01600031, 0x21400c01, 0x408d0000, 0x0288a007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x27000129, 0x02b10140, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x27200129, 0x02b10160, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x27400129, 0x02b10180, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x27600129, 0x02b101a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x27800129, 0x02b101c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x27a00129, 0x02b101e0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x27c00129, 0x02b10200, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x27e00129, 0x02b10220, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0700, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0720, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0760, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0780, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d07a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d07c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d07e0, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x12082007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff2a }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff24 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pa.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,194 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0004000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02398002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x00ae0840, 0x00000000 }, + { 0x00800001, 0x23800229, 0x00ae0841, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00ae0820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00ae0821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00ae0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00ae0801, 0x00000000 }, + { 0x80600042, 0x22b02529, 0x008d0270, 0x008d0280 }, + { 0x80600042, 0x23b02529, 0x008d0370, 0x008d0380 }, + { 0x00600001, 0x22a00129, 0x008d0270, 0x00000000 }, + { 0x80600042, 0x22902529, 0x008d0260, 0x008d0270 }, + { 0x00600001, 0x23a00129, 0x008d0370, 0x00000000 }, + { 0x80600042, 0x23902529, 0x008d0360, 0x008d0370 }, + { 0x00600001, 0x22800129, 0x008d0260, 0x00000000 }, + { 0x80600042, 0x22702529, 0x008d0250, 0x008d0260 }, + { 0x00600001, 0x23800129, 0x008d0360, 0x00000000 }, + { 0x80600042, 0x23702529, 0x008d0350, 0x008d0360 }, + { 0x00600001, 0x22600129, 0x008d0250, 0x00000000 }, + { 0x80600042, 0x22502529, 0x008d0240, 0x008d0250 }, + { 0x00600001, 0x23600129, 0x008d0350, 0x00000000 }, + { 0x80600042, 0x23502529, 0x008d0340, 0x008d0350 }, + { 0x00400040, 0x22083e28, 0x00690028, 0x07000700 }, + { 0x00800001, 0xd0000231, 0x00d20140, 0x00000000 }, + { 0x00800001, 0xd0200231, 0x00d20160, 0x00000000 }, + { 0x00800001, 0xd0400231, 0x00d20180, 0x00000000 }, + { 0x00800001, 0xd0600231, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0xd0800231, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0xd0a00231, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0xd0c00231, 0x00d20200, 0x00000000 }, + { 0x00800001, 0xd0e00231, 0x00d20220, 0x00000000 }, + { 0x00600001, 0xf4000231, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0xf8000231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xf4200231, 0x00ae0250, 0x00000000 }, + { 0x00600001, 0xf8200231, 0x00ae0350, 0x00000000 }, + { 0x00600001, 0xf4400231, 0x00ae0260, 0x00000000 }, + { 0x00600001, 0xf8400231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xf4600231, 0x00ae0270, 0x00000000 }, + { 0x00600001, 0xf8600231, 0x00ae0370, 0x00000000 }, + { 0x00600001, 0xf4800231, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0xf8800231, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0xf4a00231, 0x00ae0290, 0x00000000 }, + { 0x00600001, 0xf8a00231, 0x00ae0390, 0x00000000 }, + { 0x00600001, 0xf4c00231, 0x00ae02a0, 0x00000000 }, + { 0x00600001, 0xf8c00231, 0x00ae03a0, 0x00000000 }, + { 0x00600001, 0xf4e00231, 0x00ae02b0, 0x00000000 }, + { 0x00600001, 0xf8e00231, 0x00ae03b0, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00010001 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x04600031, 0x21400cc1, 0x00000020, 0x02898007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x27000129, 0x02b10140, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x27200129, 0x02b10160, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x27400129, 0x02b10180, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x27600129, 0x02b101a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x27800129, 0x02b101c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x27a00129, 0x02b101e0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x27c00129, 0x02b10200, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x27e00129, 0x02b10220, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0700, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0720, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0760, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0780, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d07a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d07c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d07e0, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x12094007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff2a }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff24 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: NV12_LOAD_SAVE_PL3 +.kernel NV12_LOAD_SAVE_PL3 +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "NV12_Load_8x4.asm" +#include "PL8x4_Save_IMC3.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_load_save_pl3.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,109 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0228a002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0218a008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x29000c01, 0x408d0000, 0x0218a009 }, + { 0x00800001, 0x28200229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x29200229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x28000229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x29000229, 0x008d0900, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x00910001, 0x22400231, 0x028d0800, 0x00000000 }, + { 0x00910001, 0x23400231, 0x028d0900, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x00910001, 0x22500231, 0x028d0810, 0x00000000 }, + { 0x00910001, 0x23500231, 0x028d0910, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x00910001, 0x22600231, 0x028d0820, 0x00000000 }, + { 0x00910001, 0x23600231, 0x028d0920, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x00910001, 0x22700231, 0x028d0830, 0x00000000 }, + { 0x00910001, 0x23700231, 0x028d0930, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20260, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082009 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff42 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff3c }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,182 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02298002 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02198008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x29000cc1, 0x00000020, 0x02198009 }, + { 0x00800001, 0x28200229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x29200229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x28000229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x29000229, 0x008d0900, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x00910001, 0x22400231, 0x028d0800, 0x00000000 }, + { 0x00910001, 0x23400231, 0x028d0900, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x00910001, 0x22500231, 0x028d0810, 0x00000000 }, + { 0x00910001, 0x23500231, 0x028d0910, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x00910001, 0x22600231, 0x028d0820, 0x00000000 }, + { 0x00910001, 0x23600231, 0x028d0920, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x00910001, 0x22700231, 0x028d0830, 0x00000000 }, + { 0x00910001, 0x23700231, 0x028d0930, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20260, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094009 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff42 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff3c }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,25 @@ +// Module name: NV12_LOAD_SAVE_RGBX +.kernel NV12_LOAD_SAVE_RGBX +.code +#define FIX_POINT_CONVERSION +// #define FLOAT_POINT_CONVERSION + +#include "SetupVPKernel.asm" +#include "YUV_to_RGBX_Coef.asm" +#include "Multiple_Loop_Head.asm" +#include "NV12_Load_8x4.asm" +#ifdef FIX_POINT_CONVERSION + #include "YUVX_Save_RGBX_Fix.asm" +#else + #include "YUVX_Save_RGBX_Float.asm" +#endif +#include "RGB16x8_Save_RGB.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_load_save_rgbx.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,721 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x02000005, 0x20000c24, 0x02000028, 0xff000000 }, + { 0x00110001, 0x24400061, 0x02000000, 0x0000012a }, + { 0x00110001, 0x24440061, 0x02000000, 0x00000199 }, + { 0x00010001, 0x24500061, 0x02000000, 0x0000012a }, + { 0x00010001, 0x24540061, 0x02000000, 0x00000199 }, + { 0x00000001, 0x24480061, 0x00000000, 0xff9c012a }, + { 0x00000001, 0x244c0061, 0x00000000, 0x0000ff30 }, + { 0x00110001, 0x24500061, 0x02000000, 0x0204012a }, + { 0x00110001, 0x24540061, 0x02000000, 0x00000000 }, + { 0x00010001, 0x24400061, 0x02000000, 0x0204012a }, + { 0x00010001, 0x24440061, 0x02000000, 0x00000000 }, + { 0x8060000c, 0x24403dad, 0x000d0440, 0x00010001 }, + { 0x8040000c, 0x24503dad, 0x00090450, 0x00010001 }, + { 0x00000001, 0x24580061, 0x00000000, 0x008080f0 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0228a002 }, + { 0x00600001, 0x63000231, 0x000d0770, 0x00000000 }, + { 0x00600001, 0x63200231, 0x000d0778, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x63010231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x63210231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x63020231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x63220231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62c00231, 0x000d0760, 0x00000000 }, + { 0x00600001, 0x62e00231, 0x000d0768, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x62c10231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62e10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62c20231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62e20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62800231, 0x000d0750, 0x00000000 }, + { 0x00600001, 0x62a00231, 0x000d0758, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x62810231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62a10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62820231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62a20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62400231, 0x000d0740, 0x00000000 }, + { 0x00600001, 0x62600231, 0x000d0748, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x62410231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62610231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62420231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62620231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62000231, 0x000d0730, 0x00000000 }, + { 0x00600001, 0x62200231, 0x000d0738, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x62010231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62210231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62020231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62220231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x61c00231, 0x000d0720, 0x00000000 }, + { 0x00600001, 0x61e00231, 0x000d0728, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x61c10231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x61e10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x61c20231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x61e20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x61800231, 0x000d0710, 0x00000000 }, + { 0x00600001, 0x61a00231, 0x000d0718, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x61810231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x61a10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x61820231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x61a20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x61400231, 0x000d0700, 0x00000000 }, + { 0x00600001, 0x61600231, 0x000d0708, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x61410231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x61610231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x61420231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x61620231, 0x000e0691, 0x00000000 }, + { 0x00800040, 0x2580562d, 0x00110140, 0x00090458 }, + { 0x00800040, 0x25c0562d, 0x00110150, 0x00090458 }, + { 0x00800040, 0x2600562d, 0x00110160, 0x00090458 }, + { 0x00800040, 0x2640562d, 0x00110170, 0x00090458 }, + { 0x80800041, 0x24c035ad, 0x00110580, 0x00090440 }, + { 0x80800041, 0x24e035ad, 0x001105c0, 0x00090440 }, + { 0x80800041, 0x250035ad, 0x00110600, 0x00090440 }, + { 0x80800041, 0x252035ad, 0x00110640, 0x00090440 }, + { 0x80400040, 0x64c035a9, 0x000b04c0, 0x000b04c2 }, + { 0x80400040, 0x64e035a9, 0x000b04e0, 0x000b04e2 }, + { 0x80400040, 0x650035a9, 0x000b0500, 0x000b0502 }, + { 0x80400040, 0x652035a9, 0x000b0520, 0x000b0522 }, + { 0x80400040, 0x64c03529, 0x000b04c0, 0x000b04c4 }, + { 0x80400040, 0x64e03529, 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0x00110600, 0x00090448 }, + { 0x80800041, 0x252035ad, 0x00110640, 0x00090448 }, + { 0x80400040, 0x64c035a9, 0x000b04c0, 0x000b04c2 }, + { 0x80400040, 0x64e035a9, 0x000b04e0, 0x000b04e2 }, + { 0x80400040, 0x650035a9, 0x000b0500, 0x000b0502 }, + { 0x80400040, 0x652035a9, 0x000b0520, 0x000b0522 }, + { 0x80400040, 0x64c03529, 0x000b04c0, 0x000b04c4 }, + { 0x80400040, 0x64e03529, 0x000b04e0, 0x000b04e4 }, + { 0x80400040, 0x65003529, 0x000b0500, 0x000b0504 }, + { 0x80400040, 0x65203529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x00800080 }, + { 0x80800009, 0x25403d29, 0x00110540, 0x00010001 }, + { 0x00800001, 0x24800231, 0x00120541, 0x00000000 }, + { 0x80800041, 0x24c035ad, 0x00110580, 0x00090450 }, + { 0x80800041, 0x24e035ad, 0x001105c0, 0x00090450 }, + { 0x80800041, 0x250035ad, 0x00110600, 0x00090450 }, + { 0x80800041, 0x252035ad, 0x00110640, 0x00090450 }, + { 0x80400040, 0x64c035a9, 0x000b04c0, 0x000b04c2 }, + { 0x80400040, 0x64e035a9, 0x000b04e0, 0x000b04e2 }, + { 0x80400040, 0x650035a9, 0x000b0500, 0x000b0502 }, + { 0x80400040, 0x652035a9, 0x000b0520, 0x000b0522 }, + { 0x80400040, 0x64c03529, 0x000b04c0, 0x000b04c4 }, + { 0x80400040, 0x64e03529, 0x000b04e0, 0x000b04e4 }, + { 0x80400040, 0x65003529, 0x000b0500, 0x000b0504 }, + { 0x80400040, 0x65203529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x80800040, 0x25402d29, 0x00110540, 0x00800080 }, + { 0x80800009, 0x25403d29, 0x00110540, 0x00010001 }, + { 0x00800001, 0x24a00231, 0x00120541, 0x00000000 }, + { 0x00600001, 0x63000231, 0x000d04a0, 0x00000000 }, + { 0x00600001, 0x63200231, 0x000d04a8, 0x00000000 }, + { 0x00600001, 0x63010231, 0x000d0480, 0x00000000 }, + { 0x00600001, 0x63210231, 0x000d0488, 0x00000000 }, + { 0x00600001, 0x63020231, 0x000d0460, 0x00000000 }, + { 0x00600001, 0x63220231, 0x000d0468, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00020002 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000006, 0x24000c20, 0x000000b8, 0xff00ff00 }, + { 0x01000010, 0x20000c04, 0x00000400, 0xffffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0288a007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00710001, 0x21400021, 0x028d0700, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00710001, 0x21800021, 0x028d0720, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00710001, 0x21c00021, 0x028d0740, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00710001, 0x22000021, 0x028d0760, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00710001, 0x22400021, 0x028d0780, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00710001, 0x22800021, 0x028d07a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00710001, 0x22c00021, 0x028d07c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00710001, 0x23000021, 0x028d07e0, 0x00000000 }, + { 0x00000006, 0x24000c20, 0x000000b8, 0xff0000ff }, + { 0x01000010, 0x20000c04, 0x00000400, 0xffffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000040, 0x20201ca6, 0x00000100, 0x00000020 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0288a007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610008, 0x24402d29, 0x000000b8, 0x00080008 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00710001, 0x21600021, 0x028d0700, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00710001, 0x21a00021, 0x028d0720, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00710001, 0x21e00021, 0x028d0740, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00710001, 0x22200021, 0x028d0760, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00710001, 0x22600021, 0x028d0780, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00710001, 0x22a00021, 0x028d07a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00710001, 0x22e00021, 0x028d07c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00710001, 0x23200021, 0x028d07e0, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d02c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d0300, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x12082007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000040, 0x20201ca6, 0x00000100, 0x00000020 }, + { 0x00600001, 0x20400022, 0x008d0160, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d02a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d02e0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d0320, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x12082007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffa96 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffa90 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_load_save_rgbx.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,794 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x02000005, 0x20000c24, 0x02000028, 0xff000000 }, + { 0x00110001, 0x24400061, 0x02000000, 0x0000012a }, + { 0x00110001, 0x24440061, 0x02000000, 0x00000199 }, + { 0x00010001, 0x24500061, 0x02000000, 0x0000012a }, + { 0x00010001, 0x24540061, 0x02000000, 0x00000199 }, + { 0x00000001, 0x24480061, 0x00000000, 0xff9c012a }, + { 0x00000001, 0x244c0061, 0x00000000, 0x0000ff30 }, + { 0x00110001, 0x24500061, 0x02000000, 0x0204012a }, + { 0x00110001, 0x24540061, 0x02000000, 0x00000000 }, + { 0x00010001, 0x24400061, 0x02000000, 0x0204012a }, + { 0x00010001, 0x24440061, 0x02000000, 0x00000000 }, + { 0x8060000c, 0x24403dad, 0x000d0440, 0x00010001 }, + { 0x8040000c, 0x24503dad, 0x00090450, 0x00010001 }, + { 0x00000001, 0x24580061, 0x00000000, 0x008080f0 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02298002 }, + { 0x00600001, 0x63000231, 0x000d0770, 0x00000000 }, + { 0x00600001, 0x63200231, 0x000d0778, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x63010231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x63210231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x63020231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x63220231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62c00231, 0x000d0760, 0x00000000 }, + { 0x00600001, 0x62e00231, 0x000d0768, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0830, 0x00000000 }, + { 0x00600001, 0x62c10231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62e10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62c20231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62e20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62800231, 0x000d0750, 0x00000000 }, + { 0x00600001, 0x62a00231, 0x000d0758, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x62810231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62a10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62820231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62a20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62400231, 0x000d0740, 0x00000000 }, + { 0x00600001, 0x62600231, 0x000d0748, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0820, 0x00000000 }, + { 0x00600001, 0x62410231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62610231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62420231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62620231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x62000231, 0x000d0730, 0x00000000 }, + { 0x00600001, 0x62200231, 0x000d0738, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x62010231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x62210231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x62020231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x62220231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x61c00231, 0x000d0720, 0x00000000 }, + { 0x00600001, 0x61e00231, 0x000d0728, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0810, 0x00000000 }, + { 0x00600001, 0x61c10231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x61e10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x61c20231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x61e20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x61800231, 0x000d0710, 0x00000000 }, + { 0x00600001, 0x61a00231, 0x000d0718, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x61810231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x61a10231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x61820231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x61a20231, 0x000e0691, 0x00000000 }, + { 0x00600001, 0x61400231, 0x000d0700, 0x00000000 }, + { 0x00600001, 0x61600231, 0x000d0708, 0x00000000 }, + { 0x00600001, 0x46800129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x46820129, 0x000d0800, 0x00000000 }, + { 0x00600001, 0x61410231, 0x000e0680, 0x00000000 }, + { 0x00600001, 0x61610231, 0x000e0690, 0x00000000 }, + { 0x00600001, 0x61420231, 0x000e0681, 0x00000000 }, + { 0x00600001, 0x61620231, 0x000e0691, 0x00000000 }, + { 0x00800040, 0x2580562d, 0x00110140, 0x00090458 }, + { 0x00800040, 0x25c0562d, 0x00110150, 0x00090458 }, + { 0x00800040, 0x2600562d, 0x00110160, 0x00090458 }, + { 0x00800040, 0x2640562d, 0x00110170, 0x00090458 }, + { 0x80800041, 0x24c035ad, 0x00110580, 0x00090440 }, + { 0x80800041, 0x24e035ad, 0x001105c0, 0x00090440 }, + { 0x80800041, 0x250035ad, 0x00110600, 0x00090440 }, + { 0x80800041, 0x252035ad, 0x00110640, 0x00090440 }, + { 0x80400040, 0x64c035a9, 0x000b04c0, 0x000b04c2 }, + { 0x80400040, 0x64e035a9, 0x000b04e0, 0x000b04e2 }, + { 0x80400040, 0x650035a9, 0x000b0500, 0x000b0502 }, + { 0x80400040, 0x652035a9, 0x000b0520, 0x000b0522 }, + { 0x80400040, 0x64c03529, 0x000b04c0, 0x000b04c4 }, + { 0x80400040, 0x64e03529, 0x000b04e0, 0x000b04e4 }, + { 0x80400040, 0x65003529, 0x000b0500, 0x000b0504 }, + { 0x80400040, 0x65203529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x80800040, 0x25402d29, 0x00110540, 0x00800080 }, + { 0x80800009, 0x25403d29, 0x00110540, 0x00010001 }, + { 0x00800001, 0x24600231, 0x00120541, 0x00000000 }, + { 0x80800041, 0x24c035ad, 0x00110580, 0x00090448 }, + { 0x80800041, 0x24e035ad, 0x001105c0, 0x00090448 }, + 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{ 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x00800080 }, + { 0x80800009, 0x25403d29, 0x00110540, 0x00010001 }, + { 0x00800001, 0x24800231, 0x00120541, 0x00000000 }, + { 0x80800041, 0x24c035ad, 0x00110580, 0x00090450 }, + { 0x80800041, 0x24e035ad, 0x001105c0, 0x00090450 }, + { 0x80800041, 0x250035ad, 0x00110600, 0x00090450 }, + { 0x80800041, 0x252035ad, 0x00110640, 0x00090450 }, + { 0x80400040, 0x64c035a9, 0x000b04c0, 0x000b04c2 }, + { 0x80400040, 0x64e035a9, 0x000b04e0, 0x000b04e2 }, + { 0x80400040, 0x650035a9, 0x000b0500, 0x000b0502 }, + { 0x80400040, 0x652035a9, 0x000b0520, 0x000b0522 }, + { 0x80400040, 0x64c03529, 0x000b04c0, 0x000b04c4 }, + { 0x80400040, 0x64e03529, 0x000b04e0, 0x000b04e4 }, + { 0x80400040, 0x65003529, 0x000b0500, 0x000b0504 }, + { 0x80400040, 0x65203529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x80800040, 0x25402d29, 0x00110540, 0x00800080 }, + { 0x80800009, 0x25403d29, 0x00110540, 0x00010001 }, + { 0x00800001, 0x24a00231, 0x00120541, 0x00000000 }, + { 0x00600001, 0x63000231, 0x000d04a0, 0x00000000 }, + { 0x00600001, 0x63200231, 0x000d04a8, 0x00000000 }, + { 0x00600001, 0x63010231, 0x000d0480, 0x00000000 }, + { 0x00600001, 0x63210231, 0x000d0488, 0x00000000 }, + { 0x00600001, 0x63020231, 0x000d0460, 0x00000000 }, + { 0x00600001, 0x63220231, 0x000d0468, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00020002 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000062 }, + { 0x00000006, 0x24000c20, 0x000000b8, 0xff00ff00 }, + { 0x01000010, 0x20000c04, 0x00000400, 0xffffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02898007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00710001, 0x21400021, 0x028d0700, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00710001, 0x21800021, 0x028d0720, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00710001, 0x21c00021, 0x028d0740, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00710001, 0x22000021, 0x028d0760, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00710001, 0x22400021, 0x028d0780, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00710001, 0x22800021, 0x028d07a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00710001, 0x22c00021, 0x028d07c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00710001, 0x23000021, 0x028d07e0, 0x00000000 }, + { 0x00000006, 0x24000c20, 0x000000b8, 0xff0000ff }, + { 0x01000010, 0x20000c04, 0x00000400, 0xffffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00000040, 0x20201ca6, 0x00000100, 0x00000020 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02898007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610008, 0x24402d29, 0x000000b8, 0x00080008 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00710001, 0x21600021, 0x028d0700, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00710001, 0x21a00021, 0x028d0720, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00710001, 0x21e00021, 0x028d0740, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00710001, 0x22200021, 0x028d0760, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00710001, 0x22600021, 0x028d0780, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00710001, 0x22a00021, 0x028d07a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00710001, 0x22e00021, 0x028d07c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00710001, 0x23200021, 0x028d07e0, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d02c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d0300, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x12094007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000040, 0x20201ca6, 0x00000100, 0x00000020 }, + { 0x00600001, 0x20400022, 0x008d0160, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d02a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d02e0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d0320, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x12094007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffa96 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffa90 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,20 @@ +// Module name: NV12_SCALING_NV12 +.kernel NV12_SCALING_NV12 +.code + +#define INC_SCALING + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PL2_Scaling.asm" +#include "PL16x8_PL8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_scaling_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,226 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00400001, 0x254002fd, 0x00000000, 0x48403000 }, + { 0x00400001, 0x255002fd, 0x00000000, 0x5c585450 }, + { 0x00600040, 0x25607fbd, 0x008d0540, 0x41000000 }, + { 0x00200401, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x00000000 }, + { 0x00802001, 0x208003be, 0x000000a8, 0x00000000 }, + { 0x00802001, 0x258003bd, 0x000000a8, 0x00000000 }, + { 0x00802001, 0x240003bc, 0x000000a4, 0x00000000 }, + { 0x00802048, 0x204077be, 0x000000bc, 0x008d0540 }, + { 0x00000401, 0x257003fd, 0x00000000, 0x437f0000 }, + { 0x00000801, 0x257c03fd, 0x00000000, 0x3f000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23800229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22a00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23a00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22c00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23c00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22e00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23e00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23000229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24000229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, + { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, + { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, + { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23200229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffe5e }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe52 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/nv12_scaling_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,299 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00400001, 0x254002fd, 0x00000000, 0x48403000 }, + { 0x00400001, 0x255002fd, 0x00000000, 0x5c585450 }, + { 0x00600040, 0x25607fbd, 0x008d0540, 0x41000000 }, + { 0x00200401, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x208003be, 0x000000a8, 0x00000000 }, + { 0x00800001, 0x258003bd, 0x000000a8, 0x00000000 }, + { 0x00800001, 0x240003bc, 0x000000a4, 0x00000000 }, + { 0x00800048, 0x204077be, 0x000000bc, 0x008d0540 }, + { 0x00000401, 0x257003fd, 0x00000000, 0x437f0000 }, + { 0x00000801, 0x257c03fd, 0x00000000, 0x3f000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23800229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22a00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23a00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22c00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23c00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x22e00229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x23e00229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23000229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24000229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, + { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, + { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, + { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, + { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, + { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, + { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, + { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00cf0700, 0x00000000 }, + { 0x00800001, 0x23200229, 0x00cf0800, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00cf0840, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, + { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffe5e }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, + { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, + { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe52 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: PA_LOAD_SAVE_NV12 +.kernel PA_LOAD_SAVE_NV12 +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PA_Load_8x8.asm" +#include "PL8x8_PL8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of nv12_load_save_pl1.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,124 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000009, 0x21003da5, 0x00000100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0288a001 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x00800001, 0x21400229, 0x00d29000, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00cf9400, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00cf9800, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00d29020, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00cf9420, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00cf9820, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00d29040, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00cf9440, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00cf9840, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00d29060, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00cf9460, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00cf9860, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00d29080, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00cf9480, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00cf9880, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00d290a0, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00cf94a0, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00cf98a0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00d290c0, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00cf94c0, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00cf98c0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00d290e0, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00cf94e0, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00cf98e0, 0x00000000 }, + { 0x00600001, 0x42500231, 0x00ae0260, 0x00000000 }, + { 0x00800001, 0x42600231, 0x00ce0280, 0x00000000 }, + { 0x00600001, 0x43500231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0x43600231, 0x00ce0380, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff24 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff1e }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,197 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000009, 0x21003da5, 0x00000100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02898001 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x00800001, 0x21400229, 0x00d29000, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00cf9400, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00cf9800, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00d29020, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00cf9420, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00cf9820, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00d29040, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00cf9440, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00cf9840, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00d29060, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00cf9460, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00cf9860, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00d29080, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00cf9480, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00cf9880, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00d290a0, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00cf94a0, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00cf98a0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00d290c0, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00cf94c0, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00cf98c0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00d290e0, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00cf94e0, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00cf98e0, 0x00000000 }, + { 0x00600001, 0x42500231, 0x00ae0260, 0x00000000 }, + { 0x00800001, 0x42600231, 0x00ce0280, 0x00000000 }, + { 0x00600001, 0x43500231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0x43600231, 0x00ce0380, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff24 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff1e }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: PA_LOAD_SAVE_PA +.kernel PA_LOAD_SAVE_PA +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PA_Load_8x8.asm" +#include "PL8x8_Save_PA.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of pa_load_save_pa.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pa.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pa.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pa.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pa.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,115 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000009, 0x21003da5, 0x00000100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0288a001 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x00800001, 0x21400229, 0x00d29000, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00cf9400, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00cf9800, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00d29020, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00cf9420, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00cf9820, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00d29040, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00cf9440, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00cf9840, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00d29060, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00cf9460, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00cf9860, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00d29080, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00cf9480, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00cf9880, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00d290a0, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00cf94a0, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00cf98a0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00d290c0, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00cf94c0, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00cf98c0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00d290e0, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00cf94e0, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00cf98e0, 0x00000000 }, + { 0x00400040, 0x22083e28, 0x00690028, 0x07000700 }, + { 0x00800001, 0xd0000231, 0x00d20140, 0x00000000 }, + { 0x00800001, 0xd0200231, 0x00d20160, 0x00000000 }, + { 0x00800001, 0xd0400231, 0x00d20180, 0x00000000 }, + { 0x00800001, 0xd0600231, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0xd0800231, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0xd0a00231, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0xd0c00231, 0x00d20200, 0x00000000 }, + { 0x00800001, 0xd0e00231, 0x00d20220, 0x00000000 }, + { 0x00600001, 0xf4000231, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0xf8000231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xf4200231, 0x00ae0250, 0x00000000 }, + { 0x00600001, 0xf8200231, 0x00ae0350, 0x00000000 }, + { 0x00600001, 0xf4400231, 0x00ae0260, 0x00000000 }, + { 0x00600001, 0xf8400231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xf4600231, 0x00ae0270, 0x00000000 }, + { 0x00600001, 0xf8600231, 0x00ae0370, 0x00000000 }, + { 0x00600001, 0xf4800231, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0xf8800231, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0xf4a00231, 0x00ae0290, 0x00000000 }, + { 0x00600001, 0xf8a00231, 0x00ae0390, 0x00000000 }, + { 0x00600001, 0xf4c00231, 0x00ae02a0, 0x00000000 }, + { 0x00600001, 0xf8c00231, 0x00ae03a0, 0x00000000 }, + { 0x00600001, 0xf4e00231, 0x00ae02b0, 0x00000000 }, + { 0x00600001, 0xf8e00231, 0x00ae03b0, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00010001 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x01600031, 0x21400c01, 0x408d0000, 0x0288a007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x27000129, 0x02b10140, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x27200129, 0x02b10160, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x27400129, 0x02b10180, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x27600129, 0x02b101a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x27800129, 0x02b101c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x27a00129, 0x02b101e0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x27c00129, 0x02b10200, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x27e00129, 0x02b10220, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0700, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0720, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0760, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0780, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d07a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d07c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d07e0, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x12082007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff36 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff30 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pa.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pa.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pa.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pa.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,188 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000009, 0x21003da5, 0x00000100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02898001 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x00800001, 0x21400229, 0x00d29000, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00cf9400, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00cf9800, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00d29020, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00cf9420, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00cf9820, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00d29040, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00cf9440, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00cf9840, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00d29060, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00cf9460, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00cf9860, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00d29080, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00cf9480, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00cf9880, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00d290a0, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00cf94a0, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00cf98a0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00d290c0, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00cf94c0, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00cf98c0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00d290e0, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00cf94e0, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00cf98e0, 0x00000000 }, + { 0x00400040, 0x22083e28, 0x00690028, 0x07000700 }, + { 0x00800001, 0xd0000231, 0x00d20140, 0x00000000 }, + { 0x00800001, 0xd0200231, 0x00d20160, 0x00000000 }, + { 0x00800001, 0xd0400231, 0x00d20180, 0x00000000 }, + { 0x00800001, 0xd0600231, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0xd0800231, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0xd0a00231, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0xd0c00231, 0x00d20200, 0x00000000 }, + { 0x00800001, 0xd0e00231, 0x00d20220, 0x00000000 }, + { 0x00600001, 0xf4000231, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0xf8000231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xf4200231, 0x00ae0250, 0x00000000 }, + { 0x00600001, 0xf8200231, 0x00ae0350, 0x00000000 }, + { 0x00600001, 0xf4400231, 0x00ae0260, 0x00000000 }, + { 0x00600001, 0xf8400231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xf4600231, 0x00ae0270, 0x00000000 }, + { 0x00600001, 0xf8600231, 0x00ae0370, 0x00000000 }, + { 0x00600001, 0xf4800231, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0xf8800231, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0xf4a00231, 0x00ae0290, 0x00000000 }, + { 0x00600001, 0xf8a00231, 0x00ae0390, 0x00000000 }, + { 0x00600001, 0xf4c00231, 0x00ae02a0, 0x00000000 }, + { 0x00600001, 0xf8c00231, 0x00ae03a0, 0x00000000 }, + { 0x00600001, 0xf4e00231, 0x00ae02b0, 0x00000000 }, + { 0x00600001, 0xf8e00231, 0x00ae03b0, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00010001 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x04600031, 0x21400cc1, 0x00000020, 0x02898007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x27000129, 0x02b10140, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x27200129, 0x02b10160, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x27400129, 0x02b10180, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x27600129, 0x02b101a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x27800129, 0x02b101c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x27a00129, 0x02b101e0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x27c00129, 0x02b10200, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x27e00129, 0x02b10220, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0700, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0720, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0760, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0780, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d07a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d07c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d07e0, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x12094007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff36 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff30 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: PA_LOAD_SAVE_PL3 +.kernel PA_LOAD_SAVE_PL3 +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "PA_Load_8x8.asm" +#include "PL8x8_PL8x4.asm" +#include "PL8x4_Save_IMC3.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of pa_load_save_pl3.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,127 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000009, 0x21003da5, 0x00000100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0288a001 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x00800001, 0x21400229, 0x00d29000, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00cf9400, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00cf9800, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00d29020, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00cf9420, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00cf9820, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00d29040, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00cf9440, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00cf9840, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00d29060, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00cf9460, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00cf9860, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00d29080, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00cf9480, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00cf9880, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00d290a0, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00cf94a0, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00cf98a0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00d290c0, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00cf94c0, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00cf98c0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00d290e0, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00cf94e0, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00cf98e0, 0x00000000 }, + { 0x00600001, 0x42500231, 0x00ae0260, 0x00000000 }, + { 0x00800001, 0x42600231, 0x00ce0280, 0x00000000 }, + { 0x00600001, 0x43500231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0x43600231, 0x00ce0380, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000005a }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0218a008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x29000c01, 0x408d0000, 0x0218a009 }, + { 0x00800001, 0x28600229, 0x008d0830, 0x00000000 }, + { 0x00800001, 0x29600229, 0x008d0930, 0x00000000 }, + { 0x00800001, 0x28400229, 0x008d0820, 0x00000000 }, + { 0x00800001, 0x29400229, 0x008d0920, 0x00000000 }, + { 0x00800001, 0x28200229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x29200229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x28000229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x29000229, 0x008d0900, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x00910001, 0x22400231, 0x028d0800, 0x00000000 }, + { 0x00910001, 0x23400231, 0x028d0900, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x00910001, 0x22500231, 0x028d0810, 0x00000000 }, + { 0x00910001, 0x23500231, 0x028d0910, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x00910001, 0x22600231, 0x028d0820, 0x00000000 }, + { 0x00910001, 0x23600231, 0x028d0920, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x00910001, 0x22700231, 0x028d0830, 0x00000000 }, + { 0x00910001, 0x23700231, 0x028d0930, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20260, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082009 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff1e }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff18 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pa_load_save_pl3.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,200 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000009, 0x21003da5, 0x00000100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02898001 }, + { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, + { 0x00800001, 0x21400229, 0x00d29000, 0x00000000 }, + { 0x00600001, 0x22400229, 0x00cf9400, 0x00000000 }, + { 0x00600001, 0x23400229, 0x00cf9800, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00d29020, 0x00000000 }, + { 0x00600001, 0x22500229, 0x00cf9420, 0x00000000 }, + { 0x00600001, 0x23500229, 0x00cf9820, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00d29040, 0x00000000 }, + { 0x00600001, 0x22600229, 0x00cf9440, 0x00000000 }, + { 0x00600001, 0x23600229, 0x00cf9840, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00d29060, 0x00000000 }, + { 0x00600001, 0x22700229, 0x00cf9460, 0x00000000 }, + { 0x00600001, 0x23700229, 0x00cf9860, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00d29080, 0x00000000 }, + { 0x00600001, 0x22800229, 0x00cf9480, 0x00000000 }, + { 0x00600001, 0x23800229, 0x00cf9880, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00d290a0, 0x00000000 }, + { 0x00600001, 0x22900229, 0x00cf94a0, 0x00000000 }, + { 0x00600001, 0x23900229, 0x00cf98a0, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00d290c0, 0x00000000 }, + { 0x00600001, 0x22a00229, 0x00cf94c0, 0x00000000 }, + { 0x00600001, 0x23a00229, 0x00cf98c0, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00d290e0, 0x00000000 }, + { 0x00600001, 0x22b00229, 0x00cf94e0, 0x00000000 }, + { 0x00600001, 0x23b00229, 0x00cf98e0, 0x00000000 }, + { 0x00600001, 0x42500231, 0x00ae0260, 0x00000000 }, + { 0x00800001, 0x42600231, 0x00ce0280, 0x00000000 }, + { 0x00600001, 0x43500231, 0x00ae0360, 0x00000000 }, + { 0x00800001, 0x43600231, 0x00ce0380, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000005a }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02198008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x29000cc1, 0x00000020, 0x02198009 }, + { 0x00800001, 0x28600229, 0x008d0830, 0x00000000 }, + { 0x00800001, 0x29600229, 0x008d0930, 0x00000000 }, + { 0x00800001, 0x28400229, 0x008d0820, 0x00000000 }, + { 0x00800001, 0x29400229, 0x008d0920, 0x00000000 }, + { 0x00800001, 0x28200229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x29200229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x28000229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x29000229, 0x008d0900, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x00910001, 0x22400231, 0x028d0800, 0x00000000 }, + { 0x00910001, 0x23400231, 0x028d0900, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x00910001, 0x22500231, 0x028d0810, 0x00000000 }, + { 0x00910001, 0x23500231, 0x028d0910, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x00910001, 0x22600231, 0x028d0820, 0x00000000 }, + { 0x00910001, 0x23600231, 0x028d0920, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x00910001, 0x22700231, 0x028d0830, 0x00000000 }, + { 0x00910001, 0x23700231, 0x028d0930, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20260, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094009 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff1e }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff18 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: PL3_LOAD_SAVE_NV12 +.kernel PL3_LOAD_SAVE_NV12 +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "IMC3_Load_8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of pl3_load_save_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,112 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0020000c, 0x21003ca5, 0x00450100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0218a002 }, + { 0x00600001, 0x20600022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x29000c01, 0x408d0000, 0x0218a003 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x23600229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x22400229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x008d0900, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff3c }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff36 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,185 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0020000c, 0x21003ca5, 0x00450100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02198002 }, + { 0x00600001, 0x20600022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x29000cc1, 0x00000040, 0x02198003 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x23600229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x22400229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x008d0900, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff3c }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff36 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: PL3_LOAD_SAVE_pa +.kernel PL3_LOAD_SAVE_PA // what's usage of it? just a name? +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "IMC3_Load_8x5.asm" +#include "PL8x5_PL8x8.asm" +#include "PL8x8_Save_PA.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of pl3_load_save_pa.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,123 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0020000c, 0x21003ca5, 0x00450100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00040007 }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0228a002 }, + { 0x00600001, 0x20600022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x29000c01, 0x408d0000, 0x0228a003 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x008d0820, 0x00000000 }, + { 0x00800001, 0x23800229, 0x008d0920, 0x00000000 }, + { 0x00800001, 0x22600229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x23600229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x22400229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x008d0900, 0x00000000 }, + { 0x80600042, 0x22b02529, 0x008d0270, 0x008d0280 }, + { 0x80600042, 0x23b02529, 0x008d0370, 0x008d0380 }, + { 0x00600001, 0x22a00129, 0x008d0270, 0x00000000 }, + { 0x80600042, 0x22902529, 0x008d0260, 0x008d0270 }, + { 0x00600001, 0x23a00129, 0x008d0370, 0x00000000 }, + { 0x80600042, 0x23902529, 0x008d0360, 0x008d0370 }, + { 0x00600001, 0x22800129, 0x008d0260, 0x00000000 }, + { 0x80600042, 0x22702529, 0x008d0250, 0x008d0260 }, + { 0x00600001, 0x23800129, 0x008d0360, 0x00000000 }, + { 0x80600042, 0x23702529, 0x008d0350, 0x008d0360 }, + { 0x00600001, 0x22600129, 0x008d0250, 0x00000000 }, + { 0x80600042, 0x22502529, 0x008d0240, 0x008d0250 }, + { 0x00600001, 0x23600129, 0x008d0350, 0x00000000 }, + { 0x80600042, 0x23502529, 0x008d0340, 0x008d0350 }, + { 0x00400040, 0x22083e28, 0x00690028, 0x07000700 }, + { 0x00800001, 0xd0000231, 0x00d20140, 0x00000000 }, + { 0x00800001, 0xd0200231, 0x00d20160, 0x00000000 }, + { 0x00800001, 0xd0400231, 0x00d20180, 0x00000000 }, + { 0x00800001, 0xd0600231, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0xd0800231, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0xd0a00231, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0xd0c00231, 0x00d20200, 0x00000000 }, + { 0x00800001, 0xd0e00231, 0x00d20220, 0x00000000 }, + { 0x00600001, 0xf4000231, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0xf8000231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xf4200231, 0x00ae0250, 0x00000000 }, + { 0x00600001, 0xf8200231, 0x00ae0350, 0x00000000 }, + { 0x00600001, 0xf4400231, 0x00ae0260, 0x00000000 }, + { 0x00600001, 0xf8400231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xf4600231, 0x00ae0270, 0x00000000 }, + { 0x00600001, 0xf8600231, 0x00ae0370, 0x00000000 }, + { 0x00600001, 0xf4800231, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0xf8800231, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0xf4a00231, 0x00ae0290, 0x00000000 }, + { 0x00600001, 0xf8a00231, 0x00ae0390, 0x00000000 }, + { 0x00600001, 0xf4c00231, 0x00ae02a0, 0x00000000 }, + { 0x00600001, 0xf8c00231, 0x00ae03a0, 0x00000000 }, + { 0x00600001, 0xf4e00231, 0x00ae02b0, 0x00000000 }, + { 0x00600001, 0xf8e00231, 0x00ae03b0, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00010001 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x01600031, 0x21400c01, 0x408d0000, 0x0288a007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x27000129, 0x02b10140, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x27200129, 0x02b10160, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x27400129, 0x02b10180, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x27600129, 0x02b101a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x27800129, 0x02b101c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x27a00129, 0x02b101e0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x27c00129, 0x02b10200, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x27e00129, 0x02b10220, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0700, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0720, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0760, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0780, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d07a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d07c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d07e0, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x12082007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff26 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff20 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pa.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,196 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0020000c, 0x21003ca5, 0x00450100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00040007 }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02298002 }, + { 0x00600001, 0x20600022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x29000cc1, 0x00000040, 0x02298003 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22800229, 0x008d0820, 0x00000000 }, + { 0x00800001, 0x23800229, 0x008d0920, 0x00000000 }, + { 0x00800001, 0x22600229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x23600229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x22400229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x008d0900, 0x00000000 }, + { 0x80600042, 0x22b02529, 0x008d0270, 0x008d0280 }, + { 0x80600042, 0x23b02529, 0x008d0370, 0x008d0380 }, + { 0x00600001, 0x22a00129, 0x008d0270, 0x00000000 }, + { 0x80600042, 0x22902529, 0x008d0260, 0x008d0270 }, + { 0x00600001, 0x23a00129, 0x008d0370, 0x00000000 }, + { 0x80600042, 0x23902529, 0x008d0360, 0x008d0370 }, + { 0x00600001, 0x22800129, 0x008d0260, 0x00000000 }, + { 0x80600042, 0x22702529, 0x008d0250, 0x008d0260 }, + { 0x00600001, 0x23800129, 0x008d0360, 0x00000000 }, + { 0x80600042, 0x23702529, 0x008d0350, 0x008d0360 }, + { 0x00600001, 0x22600129, 0x008d0250, 0x00000000 }, + { 0x80600042, 0x22502529, 0x008d0240, 0x008d0250 }, + { 0x00600001, 0x23600129, 0x008d0350, 0x00000000 }, + { 0x80600042, 0x23502529, 0x008d0340, 0x008d0350 }, + { 0x00400040, 0x22083e28, 0x00690028, 0x07000700 }, + { 0x00800001, 0xd0000231, 0x00d20140, 0x00000000 }, + { 0x00800001, 0xd0200231, 0x00d20160, 0x00000000 }, + { 0x00800001, 0xd0400231, 0x00d20180, 0x00000000 }, + { 0x00800001, 0xd0600231, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0xd0800231, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0xd0a00231, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0xd0c00231, 0x00d20200, 0x00000000 }, + { 0x00800001, 0xd0e00231, 0x00d20220, 0x00000000 }, + { 0x00600001, 0xf4000231, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0xf8000231, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0xf4200231, 0x00ae0250, 0x00000000 }, + { 0x00600001, 0xf8200231, 0x00ae0350, 0x00000000 }, + { 0x00600001, 0xf4400231, 0x00ae0260, 0x00000000 }, + { 0x00600001, 0xf8400231, 0x00ae0360, 0x00000000 }, + { 0x00600001, 0xf4600231, 0x00ae0270, 0x00000000 }, + { 0x00600001, 0xf8600231, 0x00ae0370, 0x00000000 }, + { 0x00600001, 0xf4800231, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0xf8800231, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0xf4a00231, 0x00ae0290, 0x00000000 }, + { 0x00600001, 0xf8a00231, 0x00ae0390, 0x00000000 }, + { 0x00600001, 0xf4c00231, 0x00ae02a0, 0x00000000 }, + { 0x00600001, 0xf8c00231, 0x00ae03a0, 0x00000000 }, + { 0x00600001, 0xf4e00231, 0x00ae02b0, 0x00000000 }, + { 0x00600001, 0xf8e00231, 0x00ae03b0, 0x00000000 }, + { 0x00000409, 0x21003da5, 0x000000a0, 0x00010001 }, + { 0x00000c01, 0x210401a5, 0x000000a2, 0x00000000 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x04600031, 0x21400cc1, 0x00000020, 0x02898007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x27000129, 0x02b10140, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x27200129, 0x02b10160, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x27400129, 0x02b10180, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x27600129, 0x02b101a0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x27800129, 0x02b101c0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x27a00129, 0x02b101e0, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x27c00129, 0x02b10200, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x27e00129, 0x02b10220, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0700, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d0720, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x20a00022, 0x008d0760, 0x00000000 }, + { 0x00600001, 0x20c00022, 0x008d0780, 0x00000000 }, + { 0x00600001, 0x20e00022, 0x008d07a0, 0x00000000 }, + { 0x00600001, 0x21000022, 0x008d07c0, 0x00000000 }, + { 0x00600001, 0x21200022, 0x008d07e0, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x12094007 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff26 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff20 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: PL3_LOAD_SAVE_pl3 +.kernel PL3_LOAD_SAVE_PL3 +.code + +#include "SetupVPKernel.asm" +#include "Multiple_Loop_Head.asm" +#include "IMC3_Load_8x4.asm" +#include "PL8x4_Save_IMC3.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of pl3_load_save_pl3.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,111 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, + { 0x0020000c, 0x21003ca5, 0x00450100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x28000c01, 0x408d0000, 0x0218a002 }, + { 0x00600001, 0x20600022, 0x008d0100, 0x00000000 }, + { 0x02600031, 0x29000c01, 0x408d0000, 0x0218a003 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x23600229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x22400229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x008d0900, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0218a008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x29000c01, 0x408d0000, 0x0218a009 }, + { 0x00800001, 0x28200229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x29200229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x28000229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x29000229, 0x008d0900, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x00910001, 0x22400231, 0x028d0800, 0x00000000 }, + { 0x00910001, 0x23400231, 0x028d0900, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x00910001, 0x22500231, 0x028d0810, 0x00000000 }, + { 0x00910001, 0x23500231, 0x028d0910, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x00910001, 0x22600231, 0x028d0820, 0x00000000 }, + { 0x00910001, 0x23600231, 0x028d0920, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x00910001, 0x22700231, 0x028d0830, 0x00000000 }, + { 0x00910001, 0x23700231, 0x028d0930, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20260, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x04082009 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff3e }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff38 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,184 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, + { 0x0020000c, 0x21003ca5, 0x00450100, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000040, 0x02198002 }, + { 0x00600001, 0x20600022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x29000cc1, 0x00000040, 0x02198003 }, + { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, + { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, + { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, + { 0x00800001, 0x22600229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x23600229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x22400229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x23400229, 0x008d0900, 0x00000000 }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000052 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02198008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x29000cc1, 0x00000020, 0x02198009 }, + { 0x00800001, 0x28200229, 0x008d0810, 0x00000000 }, + { 0x00800001, 0x29200229, 0x008d0910, 0x00000000 }, + { 0x00800001, 0x28000229, 0x008d0800, 0x00000000 }, + { 0x00800001, 0x29000229, 0x008d0900, 0x00000000 }, + { 0x00000001, 0x26000228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x000000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x00910001, 0x22400231, 0x028d0800, 0x00000000 }, + { 0x00910001, 0x23400231, 0x028d0900, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x00910001, 0x22500231, 0x028d0810, 0x00000000 }, + { 0x00910001, 0x23500231, 0x028d0910, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x00910001, 0x22600231, 0x028d0820, 0x00000000 }, + { 0x00910001, 0x23600231, 0x028d0920, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x00910001, 0x22700231, 0x028d0830, 0x00000000 }, + { 0x00910001, 0x23700231, 0x028d0930, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x0020000c, 0x21003da5, 0x004500a0, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20260, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094008 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x04094009 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xffffff3e }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xffffff38 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,26 @@ +// Module name: RGBX_LOAD_SAVE_NV12 +.kernel RGBX_LOAD_SAVE_NV12 +.code +#define FIX_POINT_CONVERSION +// #define FLOAT_POINT_CONVERSION + +#include "SetupVPKernel.asm" +#include "RGBX_to_YUV_Coef.asm" +#include "Multiple_Loop_Head.asm" +#include "RGBX_Load_16x8.asm" +#ifdef FIX_POINT_CONVERSION + #include "RGBX_Save_YUV_Fix.asm" +#else + #include "RGBX_Save_YUV_Float.asm" +#endif +#include "PL16x8_PL8x4.asm" +#include "PL8x4_Save_NV12.asm" +#include "Multiple_Loop.asm" + +END_THREAD // End of Thread + +.end_code + +.end_kernel + +// end of rgbx_load_save_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,570 @@ + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x02000005, 0x20000c24, 0x02000024, 0xff000000 }, + { 0x00110001, 0x24400061, 0x02000000, 0x00428119 }, + { 0x00010001, 0x24400061, 0x02000000, 0x00198142 }, + { 0x00110001, 0x24440061, 0x02000000, 0x00dab670 }, + { 0x00010001, 0x24440061, 0x02000000, 0x0070b6da }, + { 0x00110001, 0x24480061, 0x02000000, 0x0070a2ee }, + { 0x00010001, 0x24480061, 0x02000000, 0x00eea270 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000409, 0x21003da5, 0x00000100, 0x00020002 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0288a001 }, + { 0x00000040, 0x21003ca5, 0x00000100, 0x00200020 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0288a001 }, + { 0x00000001, 0x22000060, 0x00000000, 0x08000700 }, + { 0x00800041, 0x24c04629, 0x00118000, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x00118010, 0x00090440 }, + { 0x00800041, 0x25004629, 0x00118400, 0x00090440 }, + { 0x00800041, 0x25204629, 0x00118410, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118000, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x00118010, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x00118400, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x00118410, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118000, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x00118010, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x00118400, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x00118410, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x00118020, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x00118030, 0x00090440 }, + { 0x00800041, 0x25004629, 0x00118420, 0x00090440 }, + { 0x00800041, 0x25204629, 0x00118430, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x21600229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118020, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x00118030, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x00118420, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x00118430, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22600229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118020, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x00118030, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x00118420, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x00118430, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23600229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x00118040, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x00118050, 0x00090440 }, + { 0x00800041, 0x25004629, 0x00118440, 0x00090440 }, + { 0x00800041, 0x25204629, 0x00118450, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x21800229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118040, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x00118050, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x00118440, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x00118450, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22800229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118040, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x00118050, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x00118440, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x00118450, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23800229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x00118060, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x00118070, 0x00090440 }, + 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{ 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x24000229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x001180e0, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x001180f0, 0x00090440 }, + { 0x00800041, 0x25004629, 0x001184e0, 0x00090440 }, + { 0x00800041, 0x25204629, 0x001184f0, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180e0, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x001180f0, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x001184e0, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x001184f0, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23200229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180e0, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x001180f0, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x001184e0, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x001184f0, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00110540, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffbb6 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbb0 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,643 @@ + { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, + { 0x02000005, 0x20000c24, 0x02000024, 0xff000000 }, + { 0x00110001, 0x24400061, 0x02000000, 0x00428119 }, + { 0x00010001, 0x24400061, 0x02000000, 0x00198142 }, + { 0x00110001, 0x24440061, 0x02000000, 0x00dab670 }, + { 0x00010001, 0x24440061, 0x02000000, 0x0070b6da }, + { 0x00110001, 0x24480061, 0x02000000, 0x0070a2ee }, + { 0x00010001, 0x24480061, 0x02000000, 0x00eea270 }, + { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, + { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, + { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, + { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, + { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, + { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, + { 0x00000409, 0x21003da5, 0x00000100, 0x00020002 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0007001f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02898001 }, + { 0x00000040, 0x21003ca5, 0x00000100, 0x00200020 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02898001 }, + { 0x00000001, 0x22000060, 0x00000000, 0x08000700 }, + { 0x00800041, 0x24c04629, 0x00118000, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x00118010, 0x00090440 }, + { 0x00800041, 0x25004629, 0x00118400, 0x00090440 }, + { 0x00800041, 0x25204629, 0x00118410, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x21400229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118000, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x00118010, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x00118400, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x00118410, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22400229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x00118000, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x00118010, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x00118400, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x00118410, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23400229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x00118020, 0x00090440 }, + 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{ 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23c00229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x001180a0, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x001180b0, 0x00090440 }, + { 0x00800041, 0x25004629, 0x001184a0, 0x00090440 }, + { 0x00800041, 0x25204629, 0x001184b0, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x21e00229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180a0, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x001180b0, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x001184a0, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x001184b0, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22e00229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180a0, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x001180b0, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x001184a0, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x001184b0, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23e00229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x001180c0, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x001180d0, 0x00090440 }, + { 0x00800041, 0x25004629, 0x001184c0, 0x00090440 }, + { 0x00800041, 0x25204629, 0x001184d0, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22000229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180c0, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x001180d0, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x001184c0, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x001184d0, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23000229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180c0, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x001180d0, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x001184c0, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x001184d0, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x24000229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c04629, 0x001180e0, 0x00090440 }, + { 0x00800041, 0x24e04629, 0x001180f0, 0x00090440 }, + { 0x00800041, 0x25004629, 0x001184e0, 0x00090440 }, + { 0x00800041, 0x25204629, 0x001184f0, 0x00090440 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c02529, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e02529, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x65002529, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x65202529, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x25400129, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x25480129, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x25500129, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x25580129, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402d29, 0x00110540, 0x10801080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x22200229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180e0, 0x00090444 }, + { 0x00800041, 0x24e0562d, 0x001180f0, 0x00090444 }, + { 0x00800041, 0x2500562d, 0x001184e0, 0x00090444 }, + { 0x00800041, 0x2520562d, 0x001184f0, 0x00090444 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x23200229, 0x00110540, 0x00000000 }, + { 0x00800041, 0x24c0562d, 0x001180e0, 0x00090448 }, + { 0x00800041, 0x24e0562d, 0x001180f0, 0x00090448 }, + { 0x00800041, 0x2500562d, 0x001184e0, 0x00090448 }, + { 0x00800041, 0x2520562d, 0x001184f0, 0x00090448 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c2 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e2 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0502 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0522 }, + { 0x00400040, 0x64c035ad, 0x000b04c0, 0x000b04c4 }, + { 0x00400040, 0x64e035ad, 0x000b04e0, 0x000b04e4 }, + { 0x00400040, 0x650035ad, 0x000b0500, 0x000b0504 }, + { 0x00400040, 0x652035ad, 0x000b0520, 0x000b0524 }, + { 0x00400001, 0x254001ad, 0x000b04c0, 0x00000000 }, + { 0x00400001, 0x254801ad, 0x000b04e0, 0x00000000 }, + { 0x00400001, 0x255001ad, 0x000b0500, 0x00000000 }, + { 0x00400001, 0x255801ad, 0x000b0520, 0x00000000 }, + { 0x00800040, 0x25402da9, 0x00110540, 0x80808080 }, + { 0x00800001, 0x25400231, 0x00120541, 0x00000000 }, + { 0x00800001, 0x24200229, 0x00110540, 0x00000000 }, + { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, + { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, + { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, + { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, + { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, + { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, + { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, + { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, + { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, + { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, + { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, + { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, + { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, + { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, + { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, + { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, + { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, + { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, + { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, + { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, + { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, + { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, + { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, + { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, + { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, + { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, + { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, + { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, + { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, + { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, + { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, + { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, + { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, + { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, + { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, + { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, + { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, + { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, + { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, + { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, + { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, + { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, + { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, + { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, + { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, + { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, + { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, + { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, + { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, + { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, + { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, + { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, + { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, + { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, + { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, + { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, + { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, + { 0x00010220, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x20b80129, 0x000000c8, 0x00000000 }, + { 0x01000010, 0x20003dac, 0x00000086, 0x00010001 }, + { 0x00010001, 0x20b80129, 0x000000c4, 0x00000000 }, + { 0x00010001, 0x20ba0231, 0x000000c6, 0x00000000 }, + { 0x00010220, 0x34001c00, 0x02001400, 0xfffffbb6 }, + { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, + { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, + { 0x00000220, 0x34001c00, 0x00001400, 0xfffffbb0 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, + { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/avs.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/avs.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/avs.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/avs.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,19 @@ +// Module name: AVS +.kernel AVS +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL2.g4a" +#include "PL2_AVS_Buf_0.g4a" +#include "PL2_AVS_Buf_1.g4a" +#include "PL2_AVS_Buf_2.g4a" +#include "PL2_AVS_Buf_3.g4a" +#include "Save_AVS_NV12.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel + +// end of DNDI diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/avs.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/avs.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/avs.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/avs.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,604 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000290 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/avs.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/avs.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/avs.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/avs.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,604 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000052 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/DI_Core.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/DI_Core.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/DI_Core.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/DI_Core.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,331 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 22 // Total instruction count +// 1 // Total kernel count + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// End of common.inc + +// FileName: DI.asm +// Author: Vivek Kumar +// Description: Tasks for DI only case (16x4 block) + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/DI_Save_NV12_16x4.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/DI_Save_NV12_16x4.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/DI_Save_NV12_16x4.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/DI_Save_NV12_16x4.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,301 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 20 // Total instruction count +// 1 // Total kernel count + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// End of common.inc + +// FileName: DI_Save_NV12_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in NV12 format + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + +mov (2) r27.0<1>:d r9.0<2;2,1>:w { NoDDClr } +mov (1) r27.2<1>:ud 0x3000F:ud { NoDDChk } // Block width and height (16x4) + +//Bottom field Y + mov (8) mudMSGHDR_DI_OUT1(1)<1> udDNDI_RESP(0,0) + mov (8) mudMSGHDR_DI_OUT1(2)<1> udDNDI_RESP(0,8) +// Top field Y + mov (8) mudMSGHDR_DI_OUT2(1)<1> udDNDI_RESP(4,0) + mov (8) mudMSGHDR_DI_OUT2(2)<1> udDNDI_RESP(4,8) + +//copy message desrcptor to the message header +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r23.0<1>:ud r27<8;8,1>:ud + +//Change origin to U/V block +asr (1) r27.1<1>:d r27.1<0;1,0>:d 1:w { NoDDClr } // U/V block origin should be half of Y's +mov (1) r27.2<1>:ud 0x1000F:ud { NoDDChk } // Block width and height (16x2) + +// Bottom field U/V +mov (16) r21.0<2>:ub ubDNDI_RESP(2, 1)<32;8,2> { NoDDClr } +mov (16) r21.1<2>:ub ubDNDI_RESP(2, 0)<32;8,2> { NoDDChk } + +// Top field U/V +mov (16) r26.0<2>:ub ubDNDI_RESP(6, 1)<32;8,2> { NoDDClr } +mov (16) r26.1<2>:ub ubDNDI_RESP(6, 0)<32;8,2> { NoDDChk } + +//copy message desrcptor to the message header +mov (8) r21<1>:ud r27<8;8,1>:ud +mov (8) r26<1>:ud r27<8;8,1>:ud + +//Send out Y component on previous frame to surface +send (8) null<1>:d r18.0 0x5 0x60A801B:ud +//Send out Y component on current frame to surface +send (8) null<1>:d r23.0 0x5 0x60A801E:ud +//Send out U/V component on previous frame to surface +send (8) null<1>:d r21 0x5 0x40A801C:ud +//Send out U/V component on current frame to surface +send (8) null<1>:d r26 0x5 0x40A801F:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/DI_Save_PA_16x4.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/DI_Save_PA_16x4.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/DI_Save_PA_16x4.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/DI_Save_PA_16x4.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,311 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 33 // Total instruction count +// 1 // Total kernel count + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// End of common.inc + +// FileName: DI_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in Packed format + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20 + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x8) + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r23.0<1>:ud r27<8;8,1>:ud + +// Pack 2nd field Y + mov (16) r[a0.4, 0]<2> ubDNDI_RESP(0,0) { NoDDClr } + mov (16) r[a0.4, 32]<2> ubDNDI_RESP(0,16) { NoDDClr } + mov (16) r[a0.4, 64]<2> ubDNDI_RESP(0,32) { NoDDClr } + mov (16) r[a0.4, 96]<2> ubDNDI_RESP(0,48) { NoDDClr } +// Pack 2nd field U + mov (8) r[a0.5, 0]<4> ubDNDI_RESP(2,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 32]<4> ubDNDI_RESP(2,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 64]<4> ubDNDI_RESP(2,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 96]<4> ubDNDI_RESP(2,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 2nd field V + mov (8) r[a0.6, 0]<4> ubDNDI_RESP(2,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 32]<4> ubDNDI_RESP(2,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 64]<4> ubDNDI_RESP(2,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 96]<4> ubDNDI_RESP(2,48)<16;8,2> { NoDDChk } //Vpixels + +// Pack 1st field Y + mov (16) r[a0.4, 160]<2> ubDNDI_RESP(4,0) { NoDDClr } + mov (16) r[a0.4, 192]<2> ubDNDI_RESP(4,16) { NoDDClr } + mov (16) r[a0.4, 224]<2> ubDNDI_RESP(4,32) { NoDDClr } + mov (16) r[a0.4, 256]<2> ubDNDI_RESP(4,48) { NoDDClr } +// Pack 1st field U + mov (8) r[a0.5, 160]<4> ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 192]<4> ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 224]<4> ubDNDI_RESP(6,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 256]<4> ubDNDI_RESP(6,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 1st field V + mov (8) r[a0.6, 160]<4> ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 192]<4> ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 224]<4> ubDNDI_RESP(6,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 256]<4> ubDNDI_RESP(6,48)<16;8,2> { NoDDChk } //Vpixels + +//save the previous frame +send (8) null<1>:d r18.0 0x5 0xA0A801B:ud + +//save the current frame +send (8) null<1>:d r23.0 0x5 0xA0A801E:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/dndi.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/dndi.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/dndi.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/dndi.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,11 @@ +// Module name: DNDI +.kernel DNDI +.code + +#include "NV12_DI_NV12.g4a" + +.end_code + +.end_kernel + +// end of DNDI diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/dndi.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/dndi.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/dndi.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/dndi.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,46 @@ + { 0x00600001, 0x22400021, 0x008d0000, 0x00000000 }, + { 0x00000401, 0x226801ad, 0x00000120, 0x00000000 }, + { 0x00000801, 0x227801ad, 0x00000122, 0x00000000 }, + { 0x02600031, 0x25c00e21, 0x00000240, 0x04ae8003 }, + { 0x00200001, 0x2120012d, 0x004506fc, 0x00000000 }, + { 0x00600001, 0x22800021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x22a00021, 0x008d06c0, 0x00000000 }, + { 0x00000408, 0x22803da1, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x228401a1, 0x00000122, 0x00000000 }, + { 0x00000801, 0x22880061, 0x00000000, 0x00030007 }, + { 0x05600031, 0x20000e24, 0x00000280, 0x040a8021 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000021, 0x008d0000, 0x00000000 }, + { 0x00000408, 0x23003da1, 0x00000120, 0x00010001 }, + { 0x00000041, 0x24043da0, 0x00000122, 0x00030003 }, + { 0x00000c08, 0x23043c01, 0x00000404, 0x00020002 }, + { 0x00000801, 0x23080061, 0x00000000, 0x00020007 }, + { 0x00200040, 0x23002421, 0x00450300, 0x00450038 }, + { 0x00000401, 0x23200021, 0x000006e4, 0x00000000 }, + { 0x00200c01, 0x432c0021, 0x004506ec, 0x00000000 }, + { 0x00200801, 0x43280021, 0x004506f4, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000300, 0x040a8021 }, + { 0x00600001, 0x23800021, 0x008d0000, 0x00000000 }, + { 0x00000401, 0x238001a5, 0x00000120, 0x00000000 }, + { 0x00000c01, 0x238401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23880061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x22400021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x22e00021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x22600021, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x22800021, 0x008d05e0, 0x00000000 }, + { 0x00600001, 0x23000021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0660, 0x00000000 }, + { 0x0000040c, 0x23843ca5, 0x00000384, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x0001000f }, + { 0x00800401, 0x42c00231, 0x00ce0601, 0x00000000 }, + { 0x00800801, 0x42c10231, 0x00ce0600, 0x00000000 }, + { 0x00800401, 0x43600231, 0x00ce0681, 0x00000000 }, + { 0x00800801, 0x43610231, 0x00ce0680, 0x00000000 }, + { 0x00600001, 0x22a00021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0380, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000240, 0x060a801b }, + { 0x05600031, 0x20000e24, 0x000002e0, 0x060a801e }, + { 0x05600031, 0x20000e24, 0x000002a0, 0x040a801c }, + { 0x05600031, 0x20000e24, 0x00000340, 0x040a801f }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/dndi.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/dndi.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/dndi.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/dndi.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,46 @@ + { 0x00600001, 0x22400021, 0x008d0000, 0x00000000 }, + { 0x00000401, 0x226801ad, 0x00000120, 0x00000000 }, + { 0x00000801, 0x227801ad, 0x00000122, 0x00000000 }, + { 0x02600031, 0x25c00e21, 0x00000240, 0x04ae8003 }, + { 0x00200001, 0x2120012d, 0x004506fc, 0x00000000 }, + { 0x00600001, 0x22800021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x22a00021, 0x008d06c0, 0x00000000 }, + { 0x00000408, 0x22803da1, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x228401a1, 0x00000122, 0x00000000 }, + { 0x00000801, 0x22880061, 0x00000000, 0x00030007 }, + { 0x05600031, 0x20000e24, 0x00000280, 0x040a8021 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000021, 0x008d0000, 0x00000000 }, + { 0x00000408, 0x23003da1, 0x00000120, 0x00010001 }, + { 0x00000041, 0x24043da0, 0x00000122, 0x00030003 }, + { 0x00000c08, 0x23043c01, 0x00000404, 0x00020002 }, + { 0x00000801, 0x23080061, 0x00000000, 0x00020007 }, + { 0x00200040, 0x23002421, 0x00450300, 0x00450038 }, + { 0x00000401, 0x23200021, 0x000006e4, 0x00000000 }, + { 0x00200c01, 0x432c0021, 0x004506ec, 0x00000000 }, + { 0x00200801, 0x43280021, 0x004506f4, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000300, 0x040a8021 }, + { 0x00600001, 0x23800021, 0x008d0000, 0x00000000 }, + { 0x00000401, 0x238001a5, 0x00000120, 0x00000000 }, + { 0x00000c01, 0x238401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23880061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x22400021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x22e00021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x22600021, 0x008d05c0, 0x00000000 }, + { 0x00600001, 0x22800021, 0x008d05e0, 0x00000000 }, + { 0x00600001, 0x23000021, 0x008d0640, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0660, 0x00000000 }, + { 0x0000040c, 0x23843ca5, 0x00000384, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x0001000f }, + { 0x00800401, 0x42c00231, 0x00ce0601, 0x00000000 }, + { 0x00800801, 0x42c10231, 0x00ce0600, 0x00000000 }, + { 0x00800401, 0x43600231, 0x00ce0681, 0x00000000 }, + { 0x00800801, 0x43610231, 0x00ce0680, 0x00000000 }, + { 0x00600001, 0x22a00021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0380, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000240, 0x060a801b }, + { 0x05600031, 0x20000e24, 0x000002e0, 0x060a801e }, + { 0x05600031, 0x20000e24, 0x000002a0, 0x040a801c }, + { 0x05600031, 0x20000e24, 0x00000340, 0x040a801f }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/EOT.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/EOT.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/EOT.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/EOT.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,188 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 2 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,108 @@ +INTEL_PP_G7B = \ + avs.g7b \ + dndi.g7b \ + nv12_dn_nv12.g7b \ + pa_to_pl2.g7b \ + pa_to_pl3.g7b \ + pa_to_pa.g7b \ + pl2_to_pa.g7b \ + pl2_to_pl2.g7b \ + pl2_to_pl3.g7b \ + pl2_to_rgbx.g7b \ + pl3_to_pa.g7b \ + pl3_to_pl2.g7b \ + pl3_to_pl3.g7b \ + rgbx_to_nv12.g7b \ + $(NULL) + +INTEL_PP_G4A = \ + DI_Core.g4a \ + DI_Save_NV12_16x4.g4a \ + DI_Save_PA_16x4.g4a \ + EOT.g4a \ + NV12_DI_NV12.g4a \ + NV12_DNDI_422CP.g4a \ + NV12_DNDI_PA.g4a \ + NV12_DNUV_NV12.g4a \ + NV12_DN_422CP.g4a \ + NV12_DN_NV12.g4a \ + PA_AVS_Buf_0.g4a \ + PA_AVS_Buf_1.g4a \ + PA_AVS_Buf_2.g4a \ + PA_AVS_Buf_3.g4a \ + PA_DI_422CP.g4a \ + PA_DI_PA.g4a \ + PA_DNDI_422CP.g4a \ + PA_DNDI_PA.g4a \ + PA_DNUV_PA.g4a \ + PA_DN_422CP.g4a \ + PA_DN_PA.g4a \ + PL2_AVS_Buf_0.g4a \ + PL2_AVS_Buf_1.g4a \ + PL2_AVS_Buf_2.g4a \ + PL2_AVS_Buf_3.g4a \ + PL3_AVS_Buf_0.g4a \ + PL3_AVS_Buf_1.g4a \ + PL3_AVS_Buf_2.g4a \ + PL3_AVS_Buf_3.g4a \ + PL3_DNDI_422CP.g4a \ + PL3_DNDI_PA.g4a \ + PL3_DNUV_PL3.g4a \ + PL3_DN_422CP.g4a \ + PL3_DN_PL3.g4a \ + PL_DI_422CP.g4a \ + PL_DI_PA.g4a \ + RGB_to_YUV.g4a \ + Save_AVS_PA.g4a \ + Save_AVS_PL3.g4a \ + Save_AVS_NV12.g4a \ + Save_AVS_RGB.g4a \ + Save_AVS_RGBX.g4a \ + Set_AVS_Buf_0123_BGRA.g4a \ + Set_AVS_Buf_0123_PL2.g4a \ + Set_AVS_Buf_0123_PL3.g4a \ + Set_AVS_Buf_0123_VUYA.g4a \ + Set_AVS_Buf_0123_VYUA.g4a \ + Set_Layer_0.g4a \ + VP_Setup.g4a \ + YUV_to_RGB.g4a \ + $(NULL) + +INTEL_PP_ASM = $(INTEL_PP_G7B:%.g7b=%.asm) +INTEL_PP_GEN7_ASM = $(INTEL_PP_G7B:%.g7b=%.g7s) + +INTEL_PP_G75B = $(INTEL_PP_G7B:%.g7b=%.g75b) + +TARGETS = +if HAVE_GEN4ASM +TARGETS += $(INTEL_PP_G7B) $(INTEL_PP_G75B) +endif + +all-local: $(TARGETS) + +SUFFIXES = .g7b .g7s .asm + +if HAVE_GEN4ASM +$(INTEL_PP_GEN7_ASM): $(INTEL_PP_ASM) $(INTEL_PP_G4A) +.asm.g7s: + $(AM_V_GEN)cpp $< > _pp0.$@; \ + $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ + rm _pp0.$@ +.g7s.g7b: + $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 7 $< + +.g7s.g75b: + $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 7.5 $< +endif + +CLEANFILES = $(INTEL_PP_GEN7_ASM) + +EXTRA_DIST = \ + $(INTEL_PP_ASM) \ + $(INTEL_PP_G4A) \ + $(INTEL_PP_G75B) \ + $(INTEL_PP_G7B) \ + $(NULL) + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Makefile.in 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+ Set_Layer_0.g4a \ + VP_Setup.g4a \ + YUV_to_RGB.g4a \ + $(NULL) + +INTEL_PP_ASM = $(INTEL_PP_G7B:%.g7b=%.asm) +INTEL_PP_GEN7_ASM = $(INTEL_PP_G7B:%.g7b=%.g7s) +INTEL_PP_G75B = $(INTEL_PP_G7B:%.g7b=%.g75b) +TARGETS = $(am__append_1) +SUFFIXES = .g7b .g7s .asm +CLEANFILES = $(INTEL_PP_GEN7_ASM) +EXTRA_DIST = \ + $(INTEL_PP_ASM) \ + $(INTEL_PP_G4A) \ + $(INTEL_PP_G75B) \ + $(INTEL_PP_G7B) \ + $(NULL) + + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g7b .g7s .asm .g75b +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/post_processing/gen7/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + 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+@HAVE_GEN4ASM_TRUE@$(INTEL_PP_GEN7_ASM): $(INTEL_PP_ASM) $(INTEL_PP_G4A) +@HAVE_GEN4ASM_TRUE@.asm.g7s: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp $< > _pp0.$@; \ +@HAVE_GEN4ASM_TRUE@ $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ +@HAVE_GEN4ASM_TRUE@ rm _pp0.$@ +@HAVE_GEN4ASM_TRUE@.g7s.g7b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 7 $< + +@HAVE_GEN4ASM_TRUE@.g7s.g75b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 7.5 $< + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DI_NV12.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DI_NV12.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DI_NV12.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DI_NV12.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,414 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 57 // Total instruction count +// 1 // Total kernel count + +.kernel NV12_DI_NV12 +.code + + + +// FileName: DI.asm +// Author: Vivek Kumar +// Description: Tasks for DI only case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DI_Save_NV12_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in Packed format + + +// add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20 + +mov (8) r28.0<1>:ud r0.0<8;8,1>:ud +mov (1) r28.0<1>:d r9.0<0;1,0>:w { NoDDClr } // H. block origin need to be doubled +mov (1) r28.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r28.2<1>:ud 0x3000F:ud { NoDDChk } // Block width and height (32x8) + +//prepare the message headers +mov (8) r18.0<1>:ud r28<8;8,1>:ud +mov (8) r23.0<1>:ud r28<8;8,1>:ud + +//Bottom field Y +mov (8) mudMSGHDR_DI_OUT1(1)<1> udDNDI_RESP(0,0) +mov (8) mudMSGHDR_DI_OUT1(2)<1> udDNDI_RESP(0,8) +// Top field Y +mov (8) mudMSGHDR_DI_OUT2(1)<1> udDNDI_RESP(4,0) +mov (8) mudMSGHDR_DI_OUT2(2)<1> udDNDI_RESP(4,8) + +//Change origin to U/V block +asr (1) r28.1<1>:d r28.1<0;1,0>:d 1:w { NoDDClr } // U/V block origin should be half of Y's +mov (1) r28.2<1>:ud 0x1000F:ud { NoDDChk } // Block width and height (16x2) + +// Bottom field U/V +mov (16) r22.0<2>:ub ubDNDI_RESP(2, 1)<32;8,2> { NoDDClr } +mov (16) r22.1<2>:ub ubDNDI_RESP(2, 0)<32;8,2> { NoDDChk } + +// Top field U/V +mov (16) r27.0<2>:ub ubDNDI_RESP(6, 1)<32;8,2> { NoDDClr } +mov (16) r27.1<2>:ub ubDNDI_RESP(6, 0)<32;8,2> { NoDDChk } + +//copy message desrcptor to the message header +mov (8) r21<1>:ud r28<8;8,1>:ud +mov (8) r26<1>:ud r28<8;8,1>:ud + +//Send out Y component on previous frame to surface +send (8) null<1>:d r18 0x5 0x60A801B:ud +//Send out Y component on current frame to surface +send (8) null<1>:d r23 0x5 0x60A801E:ud +//Send out U/V component on previous frame to surface +send (8) null<1>:d r21 0x5 0x40A801C:ud +//Send out U/V component on current frame to surface +send (8) null<1>:d r26 0x5 0x40A801F:ud + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DN_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DN_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DN_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DN_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,561 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 113 // Total instruction count +// 1 // Total kernel count + +.kernel NV12_DN_422CP +.code + + + +// FileName: DN_PL_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) for planar format + + + +// FileName: DN.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x45E8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(4,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + + mov (2) mudMSGHDR_HIST(1)<1> udDNDI_RESP(4,0)<2;2,1> // Move denoise history to MRF (4x2) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x10003:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x50003:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | X | X | X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + //| X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + mov (1) mubMSGHDR_ENC_STATS(1,0)<1> ubDNDI_RESP(4,8)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,3)<1> uwDNDI_RESP(4,11)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,4)<1> uwDNDI_RESP(4,12)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,9)<1> uwDNDI_RESP(4,8)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,10)<1> uwDNDI_RESP(4,9)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_NV12_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Load_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + +//CHANGE : Read extra UV data to convert to 422. -rT +//we are reading extra data in ALL cases irrespective of whether upsampling is reqd or not later on, to keep things simple. + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (1) r27.1<1>:d r27.1<0;1,0>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x4000F:ud { NoDDChk } // U/V block width and height (8x5) + mov (8) mudMSGHDR_UVCOPY(0)<1> r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2390001:ud + + //Update Header for Save + mov (1) mudMSGHDR_UVCOPY(0,2)<1> 0x3000F:ud // U/V block width and height (8x4) + + + +// FileName: DN_Save_Y_16x8.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of Y channel of DN output for reference + + +mov (8) mudDN_Y_OUT(0,0)<1> r0<8;8,1>:ud // message header +mov (2) mudDN_Y_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin +mov (1) mudDN_Y_OUT(0,2)<1> 0x7000F:ud { NoDDChk } // block width and height (16x8) + +//send out data through data port +send (8) null<1>:d mudDN_Y_OUT 0x5 0xA0A8018:ud + + + +// FileName: DN_Save_UV_NV12_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Save_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + +//Reuse the header from Load component +//Header is modified at the end of load - to be usable for save. + + mov (8) mudMSGHDR_UVCOPY(1)<1> udDNDI_UV_RESP(0)<8;8,1> + mov (8) mudMSGHDR_UVCOPY(2)<1> udDNDI_UV_RESP(1)<8;8,1> + send (8) null<1>:d r36 0x5 0x60A8019:ud + + + +// FileName: DN_Upsample_UV_NV12_16x8.asm +// Author: Tatiya, Rupesh +// Description: Upconvert 420 UV to 422 + + + +// FileName: UVCopy_Upsample_UV_16x8.asm +// Author: Tatiya, Rupesh +// Description: Convert 42X UV to 422 - to be used for IECP. + + + avg.sat (16) uwDNDI_UVCOPY_TEMP(0) ubDNDI_UV_RESP(0,0)<16;16,1> ubDNDI_UV_RESP(0,0)<16;16,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(1) ubDNDI_UV_RESP(0,0)<16;16,1> ubDNDI_UV_RESP(0,16)<16;16,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(2) ubDNDI_UV_RESP(0,16)<16;16,1> ubDNDI_UV_RESP(0,16)<16;16,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(3) ubDNDI_UV_RESP(0,16)<16;16,1> ubDNDI_UV_RESP(0,32)<16;16,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(4) ubDNDI_UV_RESP(0,32)<16;16,1> ubDNDI_UV_RESP(0,32)<16;16,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(5) ubDNDI_UV_RESP(0,32)<16;16,1> ubDNDI_UV_RESP(0,48)<16;16,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(6) ubDNDI_UV_RESP(0,48)<16;16,1> ubDNDI_UV_RESP(0,48)<16;16,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(7) ubDNDI_UV_RESP(0,48)<16;16,1> ubDNDI_UV_RESP(0,64)<16;16,1> + + mov (16) ubDNDI_RESP(5,1)<2> ubDNDI_UVCOPY_TEMP(0,0)<32;8,4> { NoDDClr } //Copy U data + mov (16) ubDNDI_RESP(5,0)<2> ubDNDI_UVCOPY_TEMP(0,2)<32;8,4> { NoDDChk } //Copy V data + mov (16) ubDNDI_RESP(5,33)<2> ubDNDI_UVCOPY_TEMP(2,0)<32;8,4> { NoDDClr } //Copy U data + mov (16) ubDNDI_RESP(5,32)<2> ubDNDI_UVCOPY_TEMP(2,2)<32;8,4> { NoDDChk } //Copy V data + mov (16) ubDNDI_RESP(5,65)<2> ubDNDI_UVCOPY_TEMP(4,0)<32;8,4> { NoDDClr } //Copy U data + mov (16) ubDNDI_RESP(5,64)<2> ubDNDI_UVCOPY_TEMP(4,2)<32;8,4> { NoDDChk } //Copy V data + mov (16) ubDNDI_RESP(5,97)<2> ubDNDI_UVCOPY_TEMP(6,0)<32;8,4> { NoDDClr } //Copy U data + mov (16) ubDNDI_RESP(5,96)<2> ubDNDI_UVCOPY_TEMP(6,2)<32;8,4> { NoDDChk } //Copy V data + + + +// FileName: DN_Save_422CP_16x8.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of DN output to the color pipe in 4-2-2 format + + +.declare mubMSGHDR_DN_OUT_2 Base=r36.0 ElementSize=1 Type=ub + + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +shl (1) mdMSGHDR_DN_OUT(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mdMSGHDR_DN_OUT(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x7000F:ud { NoDDClr, NoDDChk } // block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) mudMSGHDR_DN_OUT(0,3)<1> r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +// First 8 x 8 Block + mov (8) mubMSGHDR_DN_OUT(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(3)<2> ubDNDI_RESP(0,64)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(3,16)<2> ubDNDI_RESP(0,80)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(4)<2> ubDNDI_RESP(0,96)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(4,16)<2> ubDNDI_RESP(0,112)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(1,1)<4> ubDNDI_RESP(5,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(1,17)<4> ubDNDI_RESP(5,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(1,3)<4> ubDNDI_RESP(5,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(1,19)<4> ubDNDI_RESP(5,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,1)<4> ubDNDI_RESP(5,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,17)<4> ubDNDI_RESP(5,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(2,3)<4> ubDNDI_RESP(5,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,19)<4> ubDNDI_RESP(5,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,1)<4> ubDNDI_RESP(5,65)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,17)<4> ubDNDI_RESP(5,81)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(3,3)<4> ubDNDI_RESP(5,64)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,19)<4> ubDNDI_RESP(5,80)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,1)<4> ubDNDI_RESP(5,97)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,17)<4> ubDNDI_RESP(5,113)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(4,3)<4> ubDNDI_RESP(5,96)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,19)<4> ubDNDI_RESP(5,112)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Second 8 x 8 Block +mov (8) r36.0<1>:ud r31.0<8;8,1>:ud +add (1) r36.0<1>:ud r36.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DN_OUT_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(3)<2> ubDNDI_RESP(0,72)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(3,16)<2> ubDNDI_RESP(0,88)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(4)<2> ubDNDI_RESP(0,104)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(4,16)<2> ubDNDI_RESP(0,120)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(1,1)<4> ubDNDI_RESP(5,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(1,17)<4> ubDNDI_RESP(5,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(1,3)<4> ubDNDI_RESP(5,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(1,19)<4> ubDNDI_RESP(5,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,1)<4> ubDNDI_RESP(5,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,17)<4> ubDNDI_RESP(5,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(2,3)<4> ubDNDI_RESP(5,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,19)<4> ubDNDI_RESP(5,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,1)<4> ubDNDI_RESP(5,73)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,17)<4> ubDNDI_RESP(5,89)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(3,3)<4> ubDNDI_RESP(5,72)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,19)<4> ubDNDI_RESP(5,88)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,1)<4> ubDNDI_RESP(5,105)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,17)<4> ubDNDI_RESP(5,121)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(4,3)<4> ubDNDI_RESP(5,104)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,19)<4> ubDNDI_RESP(5,120)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +//send out data through data port +send (8) null<1>:d r31.0 0x5 0xA0A801B:ud +send (8) null<1>:d r36.0 0x5 0xA0A801B:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DNDI_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DNDI_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DNDI_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DNDI_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,579 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 116 // Total instruction count +// 1 // Total kernel count + +.kernel NV12_DNDI_422CP +.code + + + +// FileName: DNDI_PL_Core.asm +// Author: Tatiya, Rupesh + + + +// FileName: DNDI_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN+DI case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4BE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + mov (1) mudMSGHDR_HIST(1)<1> udDNDI_RESP(9,0)<0;1,0> // Move denoise history to MRF (4x1) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x3:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_NV12_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Load_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (1) r27.1<1>:d r27.1<0;1,0>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x1000F:ud { NoDDChk } // U/V block width and height (8x4) + mov (8) mudMSGHDR_UVCOPY(0)<1> r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2190001:ud + + + +// FileName: DN_Save_Y_16x4.asm +// Author: Vivek Kumar +// Description: Save one 16x4 blocks of Y channel of DN output for reference + + + // check top/bottom field first +cmp.e.f0.0 (1) null<1>:w r1.28<0;1,0>:ub 1:w + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +mov (2) mdMSGHDR_DN_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x3000F:ud { NoDDChk } // block width and height (32x8) + +(f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(4,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(5,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(4,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(5,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + +SAVE_DN_CURR: +//send out data through data port +send (8) null<1>:d r31.0 0x5 0x60A8018:ud + + + +// FileName: DI_Save_422CP_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in 422 format to Color Pipe (IECP) + + +.declare mubMSGHDR_DI_OUT1_1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT1_2 Base=r21.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_1 Base=r24.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_2 Base=r27.0 ElementSize=1 Type=ub + + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:ud r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:ud r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3000F:ud { NoDDClr, NoDDChk } // Block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) r27.3<1>:ud r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r24.0<1>:ud r27<8;8,1>:ud + + +// Pack 2nd field Y; First 8x4 block + mov (8) mubMSGHDR_DI_OUT1_1(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; First 8x4 block + mov (4) mubMSGHDR_DI_OUT1_1(1,1)<4> ubDNDI_RESP(2,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,17)<4> ubDNDI_RESP(2,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(1,3)<4> ubDNDI_RESP(2,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,19)<4> ubDNDI_RESP(2,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,1)<4> ubDNDI_RESP(2,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,17)<4> ubDNDI_RESP(2,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(2,3)<4> ubDNDI_RESP(2,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,19)<4> ubDNDI_RESP(2,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + + +// Pack 2nd field Y; Second 8x4 block +mov (8) r21.0<1>:ud r18.0<8;8,1>:ud +add (1) r21.0<1>:ud r21.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT1_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; Second 8x4 block + mov (4) mubMSGHDR_DI_OUT1_2(1,1)<4> ubDNDI_RESP(2,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,17)<4> ubDNDI_RESP(2,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(1,3)<4> ubDNDI_RESP(2,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,19)<4> ubDNDI_RESP(2,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,1)<4> ubDNDI_RESP(2,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,17)<4> ubDNDI_RESP(2,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(2,3)<4> ubDNDI_RESP(2,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,19)<4> ubDNDI_RESP(2,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r18.0 0x5 0x60A801B:ud +send (8) null<1>:d r21.0 0x5 0x60A801B:ud + +// Pack 1st field Y; 1st 8x4 block + mov (8) mubMSGHDR_DI_OUT2_1(1)<2> ubDNDI_RESP(4,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(1,16)<2> ubDNDI_RESP(4,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2)<2> ubDNDI_RESP(4,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2,16)<2> ubDNDI_RESP(4,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U,V; 1st 8x4 block + mov (4) mubMSGHDR_DI_OUT2_1(1,1)<4> ubDNDI_RESP(6,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,17)<4> ubDNDI_RESP(6,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(1,3)<4> ubDNDI_RESP(6,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,19)<4> ubDNDI_RESP(6,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,1)<4> ubDNDI_RESP(6,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,17)<4> ubDNDI_RESP(6,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(2,3)<4> ubDNDI_RESP(6,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,19)<4> ubDNDI_RESP(6,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Pack 1st field Y; 2nd 8x4 block +mov (8) r27.0<1>:ud r24.0<8;8,1>:ud +add (1) r27.0<1>:ud r27.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT2_2(1)<2> ubDNDI_RESP(4,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(1,16)<2> ubDNDI_RESP(4,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2)<2> ubDNDI_RESP(4,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2,16)<2> ubDNDI_RESP(4,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U, V; 2nd 8x4 block + mov (4) mubMSGHDR_DI_OUT2_2(1,1)<4> ubDNDI_RESP(6,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,17)<4> ubDNDI_RESP(6,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(1,3)<4> ubDNDI_RESP(6,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,19)<4> ubDNDI_RESP(6,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,1)<4> ubDNDI_RESP(6,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,17)<4> ubDNDI_RESP(6,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(2,3)<4> ubDNDI_RESP(6,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,19)<4> ubDNDI_RESP(6,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r24.0 0x5 0x60A801E:ud +send (8) null<1>:d r27.0 0x5 0x60A801E:ud + + + +// FileName: DN_Save_UV_NV12_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Save_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + +//Reuse the header from Load component + + mov (8) mudMSGHDR_UVCOPY(1)<1> udDNDI_UV_RESP(0)<8;8,1> + send (8) null<1>:d r36 0x5 0x40A8019:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DNDI_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DNDI_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DNDI_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DNDI_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,517 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 86 // Total instruction count +// 1 // Total kernel count + +.kernel NV12_DNDI_PA +.code + + + +// FileName: DNDI_PL_Core.asm +// Author: Tatiya, Rupesh + + + +// FileName: DNDI_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN+DI case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4BE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + mov (1) mudMSGHDR_HIST(1)<1> udDNDI_RESP(9,0)<0;1,0> // Move denoise history to MRF (4x1) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x3:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_NV12_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Load_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (1) r27.1<1>:d r27.1<0;1,0>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x1000F:ud { NoDDChk } // U/V block width and height (8x4) + mov (8) mudMSGHDR_UVCOPY(0)<1> r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2190001:ud + + + +// FileName: DN_Save_Y_16x4.asm +// Author: Vivek Kumar +// Description: Save one 16x4 blocks of Y channel of DN output for reference + + + // check top/bottom field first +cmp.e.f0.0 (1) null<1>:w r1.28<0;1,0>:ub 1:w + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +mov (2) mdMSGHDR_DN_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x3000F:ud { NoDDChk } // block width and height (32x8) + +(f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(4,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(5,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(4,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(5,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + +SAVE_DN_CURR: +//send out data through data port +send (8) null<1>:d r31.0 0x5 0x60A8018:ud + + + +// FileName: DI_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in Packed format + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20 + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x8) + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r23.0<1>:ud r27<8;8,1>:ud + +// Pack 2nd field Y + mov (16) r[a0.4, 0]<2> ubDNDI_RESP(0,0) { NoDDClr } + mov (16) r[a0.4, 32]<2> ubDNDI_RESP(0,16) { NoDDClr } + mov (16) r[a0.4, 64]<2> ubDNDI_RESP(0,32) { NoDDClr } + mov (16) r[a0.4, 96]<2> ubDNDI_RESP(0,48) { NoDDClr } +// Pack 2nd field U + mov (8) r[a0.5, 0]<4> ubDNDI_RESP(2,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 32]<4> ubDNDI_RESP(2,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 64]<4> ubDNDI_RESP(2,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 96]<4> ubDNDI_RESP(2,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 2nd field V + mov (8) r[a0.6, 0]<4> ubDNDI_RESP(2,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 32]<4> ubDNDI_RESP(2,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 64]<4> ubDNDI_RESP(2,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 96]<4> ubDNDI_RESP(2,48)<16;8,2> { NoDDChk } //Vpixels + +// Pack 1st field Y + mov (16) r[a0.4, 160]<2> ubDNDI_RESP(4,0) { NoDDClr } + mov (16) r[a0.4, 192]<2> ubDNDI_RESP(4,16) { NoDDClr } + mov (16) r[a0.4, 224]<2> ubDNDI_RESP(4,32) { NoDDClr } + mov (16) r[a0.4, 256]<2> ubDNDI_RESP(4,48) { NoDDClr } +// Pack 1st field U + mov (8) r[a0.5, 160]<4> ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 192]<4> ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 224]<4> ubDNDI_RESP(6,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 256]<4> ubDNDI_RESP(6,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 1st field V + mov (8) r[a0.6, 160]<4> ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 192]<4> ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 224]<4> ubDNDI_RESP(6,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 256]<4> ubDNDI_RESP(6,48)<16;8,2> { NoDDChk } //Vpixels + +//save the previous frame +send (8) null<1>:d r18.0 0x5 0xA0A801B:ud + +//save the current frame +send (8) null<1>:d r23.0 0x5 0xA0A801E:ud + + + +// FileName: DN_Save_UV_NV12_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Save_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + +//Reuse the header from Load component + + mov (8) mudMSGHDR_UVCOPY(1)<1> udDNDI_UV_RESP(0)<8;8,1> + send (8) null<1>:d r36 0x5 0x40A8019:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/nv12_dn_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/nv12_dn_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/nv12_dn_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/nv12_dn_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,5 @@ +// Module name: DN + +#include "NV12_DN_NV12.g4a" + +// end of DNDI diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DN_NV12.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DN_NV12.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DN_NV12.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DN_NV12.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,442 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 40 // Total instruction count +// 1 // Total kernel count + +.kernel NV12_DN_NV12 +.code + + + +// FileName: DN_PL_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) for planar format + + + +// FileName: DN.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x45E8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(4,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + + mov (2) mudMSGHDR_HIST(1)<1> udDNDI_RESP(4,0)<2;2,1> // Move denoise history to MRF (4x2) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x10003:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x50003:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | X | X | X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + //| X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + mov (1) mubMSGHDR_ENC_STATS(1,0)<1> ubDNDI_RESP(4,8)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,3)<1> uwDNDI_RESP(4,11)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,4)<1> uwDNDI_RESP(4,12)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,9)<1> uwDNDI_RESP(4,8)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,10)<1> uwDNDI_RESP(4,9)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_NV12_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Load_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + +//CHANGE : Read extra UV data to convert to 422. -rT +//we are reading extra data in ALL cases irrespective of whether upsampling is reqd or not later on, to keep things simple. + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (1) r27.1<1>:d r27.1<0;1,0>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x4000F:ud { NoDDChk } // U/V block width and height (8x5) + mov (8) mudMSGHDR_UVCOPY(0)<1> r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2390001:ud + + //Update Header for Save + mov (1) mudMSGHDR_UVCOPY(0,2)<1> 0x3000F:ud // U/V block width and height (8x4) + + + +// FileName: DN_Save_Y_16x8.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of Y channel of DN output for reference + + +mov (8) mudDN_Y_OUT(0,0)<1> r0<8;8,1>:ud // message header +mov (2) mudDN_Y_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin +mov (1) mudDN_Y_OUT(0,2)<1> 0x7000F:ud { NoDDChk } // block width and height (16x8) + +//send out data through data port +send (8) null<1>:d mudDN_Y_OUT 0x5 0xA0A8018:ud + + + +// FileName: DN_Save_UV_NV12_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Save_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + +//Reuse the header from Load component +//Header is modified at the end of load - to be usable for save. + + mov (8) mudMSGHDR_UVCOPY(1)<1> udDNDI_UV_RESP(0)<8;8,1> + mov (8) mudMSGHDR_UVCOPY(2)<1> udDNDI_UV_RESP(1)<8;8,1> + send (8) null<1>:d r36 0x5 0x60A8019:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/nv12_dn_nv12.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/nv12_dn_nv12.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/nv12_dn_nv12.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/nv12_dn_nv12.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,40 @@ + { 0x00600001, 0x22400021, 0x008d0000, 0x00000000 }, + { 0x00000401, 0x226801ad, 0x00000120, 0x00000000 }, + { 0x00000801, 0x227801ad, 0x00000122, 0x00000000 }, + { 0x02600031, 0x25c00e21, 0x00000240, 0x045e8003 }, + { 0x00200001, 0x2120012d, 0x0045065c, 0x00000000 }, + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00200001, 0x22e00021, 0x00450640, 0x00000000 }, + { 0x00200008, 0x23603da1, 0x00450120, 0x00020002 }, + { 0x00000440, 0x23602421, 0x00000360, 0x00000038 }, + { 0x00000801, 0x23680061, 0x00000000, 0x00010003 }, + { 0x00600001, 0x22c00021, 0x008d0360, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x000002c0, 0x040a8021 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000021, 0x008d0000, 0x00000000 }, + { 0x00000408, 0x23003da1, 0x00000120, 0x00010001 }, + { 0x00000041, 0x24043da0, 0x00000122, 0x00030003 }, + { 0x00000c08, 0x23043c01, 0x00000404, 0x00020002 }, + { 0x00000801, 0x23080061, 0x00000000, 0x00050003 }, + { 0x00200040, 0x23002421, 0x00450300, 0x00450038 }, + { 0x00000401, 0x23200231, 0x00000648, 0x00000000 }, + { 0x00000c01, 0x23260129, 0x00000656, 0x00000000 }, + { 0x00200c01, 0x23280129, 0x00450658, 0x00000000 }, + { 0x00000c01, 0x23320129, 0x00000650, 0x00000000 }, + { 0x00200801, 0x23340129, 0x00450652, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000300, 0x040a8021 }, + { 0x00200040, 0x236035a5, 0x00450120, 0x00450088 }, + { 0x0000040c, 0x23643ca5, 0x00000364, 0x00010001 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0004000f }, + { 0x00600001, 0x24800021, 0x008d0360, 0x00000000 }, + { 0x04600031, 0x27400e21, 0x00000480, 0x02390001 }, + { 0x00000001, 0x24880061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x25a00021, 0x008d0000, 0x00000000 }, + { 0x00200401, 0x25a001a1, 0x00450120, 0x00000000 }, + { 0x00000801, 0x25a80061, 0x00000000, 0x0007000f }, + { 0x05600031, 0x20000e24, 0x000005a0, 0x0a0a8018 }, + { 0x00600001, 0x24a00021, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x24c00021, 0x008d0760, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000480, 0x060a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/nv12_dn_nv12.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/nv12_dn_nv12.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/nv12_dn_nv12.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/nv12_dn_nv12.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,40 @@ + { 0x00600001, 0x22400021, 0x008d0000, 0x00000000 }, + { 0x00000401, 0x226801ad, 0x00000120, 0x00000000 }, + { 0x00000801, 0x227801ad, 0x00000122, 0x00000000 }, + { 0x02600031, 0x25c00e21, 0x00000240, 0x045e8003 }, + { 0x00200001, 0x2120012d, 0x0045065c, 0x00000000 }, + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00200001, 0x22e00021, 0x00450640, 0x00000000 }, + { 0x00200008, 0x23603da1, 0x00450120, 0x00020002 }, + { 0x00000440, 0x23602421, 0x00000360, 0x00000038 }, + { 0x00000801, 0x23680061, 0x00000000, 0x00010003 }, + { 0x00600001, 0x22c00021, 0x008d0360, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x000002c0, 0x040a8021 }, + { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x23000021, 0x008d0000, 0x00000000 }, + { 0x00000408, 0x23003da1, 0x00000120, 0x00010001 }, + { 0x00000041, 0x24043da0, 0x00000122, 0x00030003 }, + { 0x00000c08, 0x23043c01, 0x00000404, 0x00020002 }, + { 0x00000801, 0x23080061, 0x00000000, 0x00050003 }, + { 0x00200040, 0x23002421, 0x00450300, 0x00450038 }, + { 0x00000401, 0x23200231, 0x00000648, 0x00000000 }, + { 0x00000c01, 0x23260129, 0x00000656, 0x00000000 }, + { 0x00200c01, 0x23280129, 0x00450658, 0x00000000 }, + { 0x00000c01, 0x23320129, 0x00000650, 0x00000000 }, + { 0x00200801, 0x23340129, 0x00450652, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000300, 0x040a8021 }, + { 0x00200040, 0x236035a5, 0x00450120, 0x00450088 }, + { 0x0000040c, 0x23643ca5, 0x00000364, 0x00010001 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0004000f }, + { 0x00600001, 0x24800021, 0x008d0360, 0x00000000 }, + { 0x04600031, 0x27400e21, 0x00000480, 0x02390001 }, + { 0x00000001, 0x24880061, 0x00000000, 0x0003000f }, + { 0x00600001, 0x25a00021, 0x008d0000, 0x00000000 }, + { 0x00200401, 0x25a001a1, 0x00450120, 0x00000000 }, + { 0x00000801, 0x25a80061, 0x00000000, 0x0007000f }, + { 0x05600031, 0x20000e24, 0x000005a0, 0x0a0a8018 }, + { 0x00600001, 0x24a00021, 0x008d0740, 0x00000000 }, + { 0x00600001, 0x24c00021, 0x008d0760, 0x00000000 }, + { 0x05600031, 0x20000e24, 0x00000480, 0x060a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DNUV_NV12.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DNUV_NV12.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/NV12_DNUV_NV12.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/NV12_DNUV_NV12.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2513 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 1153 // Total instruction count +// 1 // Total kernel count + + +.kernel NV12_DNUV_NV12 +.code + + + +//Module : DN_UV_Setup +//Author : Tatiya, Rupesh +//Description : Initial Set-up for DN_UV + + + + +// Module name : ChromaDenoise.inc +// Author : Tatiya, Rupesh + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================================================== +//Interface for serpent mode Chroma Denoise, added by Le +//====================================================== +//r1 + + +//noise history thresholds (low and high) + + +//temporal difference thresholds (high and low) + + +//noise history thresholds (low and high) +//#define ubNoiseHistMaxHigh r1.22 +//#define ubNoiseHistMaxLow r1.23 +//#define ubNoiseHistDeltaHigh r1.24 +//#define ubNoiseHistDeltaLow r1.25 + +//Gaussian thresholds + + +//temporal difference thresholds (default) + + +//r2 +//history thresholds (default) + + +//denoise factor (0-63) + + +//====================== Binding table (Explicit To DNUV)========================================= +//Used by DN_UV kernels + + + //Pointer to Current Frame UV + + +//r1-r6 + //CURBE GRFs used as TEMP : Used for max computation and storing max temporarily. : r1-r6 + + + .declare ubCURBE_TEMP Base=r1.0 ElementSize=1 Type=ub + .declare uwCURBE_TEMP Base=r1.0 ElementSize=2 Type=uw + .declare wCURBE_TEMP Base=r1.0 ElementSize=2 Type=w + .declare fCURBE_TEMP Base=r1.0 ElementSize=4 Type=f + .declare udCURBE_TEMP Base=r1.0 ElementSize=4 Type=ud + .declare uwMAX_ABS_DIFF Base=r5.0 ElementSize=2 Type=uw + + //r1 + + + //r3 + + + //r4 + +//r7 + //All of the following has to defined in Same GRF for optimal performance. + + +//r8-24 + //Previous Frame UV + + .declare udPREV_UV Base=r8.0 ElementSize=4 Type=ud + .declare ubPREV_UV Base=r8.0 ElementSize=1 Type=ub + + +//r25-48 + //TEMP Space for any Usage. + + +//========================================================================= +//Definations and declarations for serpent mode Chroma Denoise, added by Le +//========================================================================= + + + .declare udGNE_UV Base=r24.0 ElementSize=4 Type=ud + .declare fGNE_UV Base=r24.0 ElementSize=4 Type=f + .declare ubGNE_UV Base=r24.0 ElementSize=1 Type=ub + + .declare udMSGHDR_BNE_SERP Base=r25.0 ElementSize=4 Type=ud + .declare udMSGSRC_BNE_SERP Base=r26.0 ElementSize=4 Type=ud + + + .declare ubDN_UV_Thresholds Base=r26.0 ElementSize=1 Type=ub + .declare ubDN_UV_Thresholds_Temp Base=r27.0 ElementSize=1 Type=ub + .declare udDN_UV_Thresholds Base=r26.0 ElementSize=4 Type=ud + .declare udDN_UV_Thresholds_Temp Base=r27.0 ElementSize=4 Type=ud + .declare fDN_UV_Thresholds Base=r26.0 ElementSize=4 Type=f + .declare fDN_UV_Thresholds_Temp Base=r27.0 ElementSize=4 Type=f + + +//==================================================================================== + + + //TEMP23: To hold V data for PL3 surfaces + .declare udCURR_V_TEMP Base=r25.0 ElementSize=4 Type=ud + .declare ubCURR_V_TEMP Base=r25.0 ElementSize=1 Type=ub + + //GRFs to calculate Median: r25-r42 + .declare ubMEDIAN_TEMP Base=r25.0 ElementSize=1 Type=ub + + //18 GRFs to hold difference : r25-r42 + .declare wDIFF Base=r25.0 ElementSize=2 Type=w + .declare uwDIFF Base=r25.0 ElementSize=2 Type=uw + + //Temporal Diff + .declare wDIFF_TEMPORAL Base=r25.0 ElementSize=2 Type=w + .declare ubDIFF_TEMPORAL Base=r25.0 ElementSize=1 Type=ub + + //4 GRFs to hold Sobel Value : r43-46 + .declare wSOBEL_X Base=r43.0 ElementSize=2 Type=w + .declare uwSOBEL Base=r43.0 ElementSize=2 Type=uw + + + //2 GRFs to hold SOAD temporarily: r47-48 + .declare uwSOAD Base=r47.0 ElementSize=2 Type=uw + + //Temp GRFs to hold extra YUYV pixels: r43-r48 + .declare ubTEMP5 Base=r43.0 ElementSize=1 Type=ub + + //Temp GRFs in Median Calculation: r47-r48 + .declare ubTEMP1 Base=r47.0 ElementSize=1 Type=ub + + .declare uwTEMP0 Base=r48.0 ElementSize=2 Type=uw + .declare ubTEMP0 Base=r48.0 ElementSize=1 Type=ub + + //Temp Space to store Median : r49-50 + + .declare ubMEDIAN Base=r49.0 ElementSize=1 Type=ub + +//r49 + + +//r50 + //Message Source + + +//r51 + //DN_UV History Surface + + .declare udHIST_UV Base=r51.0 ElementSize=4 Type=ud + .declare ubHIST_UV Base=r51.0 ElementSize=1 Type=ub + +//r52 - r91 + //r52 + //Current Frame UV + + + .declare udCURR_UV Base=r52.0 ElementSize=4 Type=ud + .declare ubCURR_UV Base=r52.0 ElementSize=1 Type=ub + + //r54 + //CURBE COPY + + + //r55 + + + .declare uwSOAD_MIN_8x4 Base=r56.0 ElementSize=2 Type=uw + + //r61 + + + //r62 + + + //History Surface Temp Origin + + + //r63 + //Current Frame Y Temp Origin + + + //BNE Surface Origin + + + //r70 + + .declare uwDIFF_TEMPORAL_SUM4x4 Base=r70.0 ElementSize=2 Type=uw //4 GRFs + + //r74-91 : For Saving Dest UV (PL2/PL3) + + + .declare ubMSGPAYLOAD_UV0 Base=r75.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_U Base=r75.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_UV1 Base=r84.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_V Base=r84.0 ElementSize=1 Type=ub + + //r90 + + .declare uwDIFF_TEMPORAL_SUM4x4_FINAL Base=r90.0 ElementSize=2 Type=uw //2 GRFs + +//r92-127 + //Current Frame Y + + + //r92 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_0 Base=r92 ElementSize=2 Type=uw + //r101 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_1 Base=r101 ElementSize=2 Type=uw + //r110 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_2 Base=r110 ElementSize=2 Type=uw + //r119 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_3 Base=r119 ElementSize=2 Type=uw + + .declare udCURR_Y0 Base=r93.0 ElementSize=4 Type=ud + .declare ubCURR_Y0 Base=r93.0 ElementSize=1 Type=ub + .declare udCURR_Y1 Base=r102.0 ElementSize=4 Type=ud + .declare ubCURR_Y1 Base=r102.0 ElementSize=1 Type=ub + .declare udCURR_Y2 Base=r111.0 ElementSize=4 Type=ud + .declare ubCURR_Y2 Base=r111.0 ElementSize=1 Type=ub + .declare udCURR_Y3 Base=r120.0 ElementSize=4 Type=ud + .declare ubCURR_Y3 Base=r120.0 ElementSize=1 Type=ub + + //r92: To hold U data for PL3 surfaces + .declare udCURR_U_TEMP Base=r92.0 ElementSize=4 Type=ud + .declare ubCURR_U_TEMP Base=r92.0 ElementSize=1 Type=ub + + //r112: To hold U data for PL3 surfaces + .declare udPREV_U_TEMP Base=r112.0 ElementSize=4 Type=ud + .declare ubPREV_U_TEMP Base=r112.0 ElementSize=1 Type=ub + + //r120: To hold U data for PL3 surfaces + .declare udPREV_V_TEMP Base=r120.0 ElementSize=4 Type=ud + .declare ubPREV_V_TEMP Base=r120.0 ElementSize=1 Type=ub + + + // Initialize message source with r0. + mov (8) r50.0<1>:ud r0.0<8;8,1>:ud + mov (8) r92.0<1>:ud r0.0<8;8,1>:ud + mov (8) r101.0<1>:ud r0.0<8;8,1>:ud + mov (8) r110.0<1>:ud r0.0<8;8,1>:ud + mov (8) r119.0<1>:ud r0.0<8;8,1>:ud + + + +//Module Name : DN_UV_PL2_Load_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Current Frame UV data for PL2 input. + + + +//Module name : DN_UV_Load_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Current Frame (UV only). +// We need 4 extra rows (2 per field) and 2 extra pixel (1 each side) for both U and V each. +// The processing size is 16x16 U and V each. So we need : U size - 18x20, V size - 18x20, UV size - 36x20, YUYV size - 72x20. + + + + +//36x20 interleaved UV block is partitioned as follows: +// <------ 18 --------> <--------18 -------> +// ----------------------------------------- +// | 20x8 A !| 20x8 D ! +// | (overlapped) !| (overlapped) ! +// |-------------------!|------------------! +// | 20x8 B !| 20x8 E ! +// | (overlapped) !| (overlapped) ! +// |-------------------!|------------------! +// | 20x4 C !| 20x4 F ! +// | (overlapped) !| (overlapped) ! +// ----------------------------------------- +// +// Cordinates: (x-2, y-2), (x+14, y-2), (x-2, y+6), (x+14, y+6), (x-2, y+14), (x+14, y+14) + + //UV surface origin: (ORIX, ORIY/2) + add (2) r9.4<1>:w r9.0<2;2,1>:w r4.4<2;2,1>:w { AccWrEn } // Source Block origin + shr (1) r9.5<1>:w acc0.5<0;1,0>:w 1:w + mov (2) acc0.0<1>:d r9.4<2;2,1>:w + + //A + add (2) r50.0<1>:d acc0.0<2;2,1>:d -2:d { AccWrEn } + mov (1) r50.2<1>:ud 0x70013:ud + send (8) udCURR_UV(0)<1> r50 0x4 0x2890004:ud + + //B + add (1) r50.1<1>:d acc0.1<0;1,0>:d 8:d + send (8) udCURR_UV(8)<1> r50 0x4 0x2890004:ud + + //C + add (1) r50.1<1>:d acc0.1<0;1,0>:d 16:d + mov (1) r50.2<1>:ud 0x30013:ud + send (8) udCURR_UV(16)<1> r50 0x4 0x2490004:ud + + //D + add (1) r50.0<1>:d acc0.0<0;1,0>:d 16:d { AccWrEn } + mov (1) r50.1<1>:d acc0.1<0;1,0>:d + mov (1) r50.2<1>:ud 0x70013:ud + send (8) udCURR_UV(20)<1> r50 0x4 0x2890004:ud + + //E + add (1) r50.1<1>:d acc0.1<0;1,0>:d 8:d + send (8) udCURR_UV(28)<1> r50 0x4 0x2890004:ud + + //F + add (1) r50.1<1>:d acc0.1<0;1,0>:d 16:d + mov (1) r50.2<1>:ud 0x30013:ud + send (8) udCURR_UV(36)<1> r50 0x4 0x2490004:ud + + //History Origin, Current Y origin and BNE surface origin - all are in inline GRF. Use , . -rT. + + //Calculate Origin For History Surface: (ORIX/4, ORIY/8) + mov (16) acc0.0<1>:w r9.0<0;2,1>:w + shr (1) r9.2<1>:w acc0.2<0;1,0>:w 2:w + shr (1) r9.3<1>:w acc0.3<0;1,0>:w 3:w + + //Calculate Origin For BNE Surface: (ORIX/8, ORIY/16) + shr (1) r9.6<1>:w acc0.6<0;1,0>:w 3:w + shr (1) r9.7<1>:w acc0.7<0;1,0>:w 4:w + + + +//Module Name : DN_UV_PL2_Load_Prev_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Pevious Frame UV data for PL2 input. + + + +//Module Name : DN_UV_Load_Prev_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Prev Frame (UV only). U size - 16x16, V size - 16x16, UV size - 32x16, YUYV size - 64x16. + + + + + mov (2) r50.0<1>:d r9.4<2;2,1>:w { AccWrEn } // Source lock origin + mov (1) r50.2<1>:ud 0xF000F:ud // U/V block width and height (16x16) + send (8) udPREV_UV(0)<1> r50 0x4 0x2890001:ud + + add (1) r50.0<1>:ud acc0.0<0;1,0>:d 16:w // Add 16 to X origin + send (8) udPREV_UV(8)<1> r50 0x4 0x2890001:ud + + + //TODO - See if History loading can be combined with Prev Frame Load. - rT + + +//Module name : DN_UV_Load_Hist_UV +//Author : Tatiya, Rupesh +//Description : Load DN History for UV denoise. 4x4 for each U & V. + + + + + mov (2) r50.0<1>:d r9.2<2;2,1>:w + mov (1) r50.2<1>:ud 0x30007:ud + send (8) udHIST_UV(0)<1> r50 0x4 0x2190022:ud + + + +//Module Name : DN_UV_420_Load_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Load Curr Frame Y data for 420 Input + + + +//Module Name : DN_UV_Load_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Loads Y of Current frame. + + + + + //For 16x16 U and 16x16 V for 420, we need to read 32x32 Y. + + mov (8) acc0.0<1>:ud r0.0<8;8,1>:ud + mov (1) acc0.2<1>:ud 0xF000F:ud + add (2) acc0.0<1>:ud r9.0<2;2,1>:w r4.4<2;2,1>:w + + mov (8) r92.0<1>:ud acc0.0<8;8,1>:ud + + mov (8) r101.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r110.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r119.0<1>:ud acc0.0<8;8,1>:ud + + add (1) r101.1<1>:d acc0.1<0;1,0>:d 16:d + + add (1) r110.0<1>:d acc0.0<0;1,0>:d 16:d + + add (2) r119.0<1>:d acc0.0<2;2,1>:d 16:d + + send (8) udCURR_Y0(0)<1> r92 0x4 0x2890003:ud + send (8) udCURR_Y1(0)<1> r101 0x4 0x2890003:ud + send (8) udCURR_Y2(0)<1> r110 0x4 0x2890003:ud + send (8) udCURR_Y3(0)<1> r119 0x4 0x2890003:ud + + + +//Module Name : DN_UV_Noise_Detection_UV +//Author : Tatiya, Rupesh +//Description : Performs noise detection on 16x16 U and 16x16 V each. + + + +//Module Name : DN_UV_Move_CURBE_Inline_UV.asm +//Author : Tatiya, Rupesh + + + + + //Mov CURBE data to another space - so that it can be used as Temp Space --> r1 - r6 + mov (4) r54.28<1>:ub r2.28<4;4,1>:ub //Dest. YUY2 offset + mov (2) r54.5<1>:ud r4.0<4;2,2>:ud //Src YUY2 offset and Origin offset + mov (4) r55.28<1>:ub r1.0<4;4,1>:ub + + mov (8) r61.20<1>:ub r1.4<8;8,1>:ub + mov (4) r61.28<1>:ub r1.12<4;4,1>:ub + + //Move Inline Data to another space - so that it can be used as Temp Space --> r7 + mov (4) r62.10<1>:w r9.0<4;4,1>:w + mov (4) r63.10<1>:w r9.4<4;4,1>:w + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + mov (1) a0.0:uw 1664:uw + mov (1) a0.1:uw 1816:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 1792:uw + mov (1) a0.1:uw 1820:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 1920:uw + mov (1) a0.1:uw 1848:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2048:uw + mov (1) a0.1:uw 1852:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + mov (1) a0.0:uw 2304:uw + mov (1) a0.1:uw 1880:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2432:uw + mov (1) a0.1:uw 1884:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2560:uw + mov (1) a0.1:uw 1912:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2688:uw + mov (1) a0.1:uw 1916:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + +//Module : DN_UV_Noise_Reduction_UV +//Author : Tatiya, Rupesh +//Description : Performs Noise Reduction on 16x16 U and 16x16 V. +//Tasks : 1. Update weight history +// 2. Find if it block is motion block +// 3. Compute Denoised Pixel. + + + + +//History is 1+1 byte every 4x4 U and 4x4 V. + + cmp.l.f0.0 (16) null<1>:w ubHIST_UV(0,0)<16;16,1> r61.20<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w ubHIST_UV(0,0)<16;16,1> r61.22<0;2,1>:ub + + mov (16) uwCURBE_TEMP(0)<1> 0:w + mov (16) uwCURBE_TEMP(1)<1> 0:w + + //Compute diff betn curr and prev. - First 16 lines + // 8 lines here + add (16) wDIFF_TEMPORAL(0)<1> ubCURR_UV(2,2)<16;16,1> -ubPREV_UV(0,0)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(1)<1> ubCURR_UV(3,2)<16;16,1> -ubPREV_UV(0,16)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(2)<1> ubCURR_UV(4,2)<16;16,1> -ubPREV_UV(0,32)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(3)<1> ubCURR_UV(5,2)<16;16,1> -ubPREV_UV(0,48)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(4)<1> ubCURR_UV(6,2)<16;16,1> -ubPREV_UV(0,64)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(5)<1> ubCURR_UV(7,2)<16;16,1> -ubPREV_UV(0,80)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(6)<1> ubCURR_UV(8,2)<16;16,1> -ubPREV_UV(0,96)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(7)<1> ubCURR_UV(9,2)<16;16,1> -ubPREV_UV(0,112)<16;16,1> //Diff UV interleaved + + //Update WT HIST + (-f0.0) shr (16) uwCURBE_TEMP(0)<1> ubHIST_UV(0,0)<16;16,1> 1:w + (f1.0) add (16) uwCURBE_TEMP(2)<1> ubHIST_UV(0,0)<16;16,1> r61.24<0;2,1>:ub + (f0.0) mov (16) uwCURBE_TEMP(2)<1> r61.20<0;2,1>:ub + (-f0.0.anyv) mov (16) uwCURBE_TEMP(2)<1> ubHIST_UV(0,0)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w ubHIST_UV(0,16)<16;16,1> r61.20<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w ubHIST_UV(0,16)<16;16,1> r61.22<0;2,1>:ub + + //Compute diff betn curr and prev. - First 16 lines + // 8 more lines here + add (16) wDIFF_TEMPORAL(8)<1> ubCURR_UV(10,2)<16;16,1> -ubPREV_UV(0,128)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(9)<1> ubCURR_UV(11,2)<16;16,1> -ubPREV_UV(0,144)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(10)<1> ubCURR_UV(12,2)<16;16,1> -ubPREV_UV(0,160)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(11)<1> ubCURR_UV(13,2)<16;16,1> -ubPREV_UV(0,176)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(12)<1> ubCURR_UV(14,2)<16;16,1> -ubPREV_UV(0,192)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(13)<1> ubCURR_UV(15,2)<16;16,1> -ubPREV_UV(0,208)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(14)<1> ubCURR_UV(16,2)<16;16,1> -ubPREV_UV(0,224)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(15)<1> ubCURR_UV(17,2)<16;16,1> -ubPREV_UV(0,240)<16;16,1> //Diff UV interleaved + + (-f0.0) shr (16) uwCURBE_TEMP(1)<1> ubHIST_UV(0,16)<16;16,1> 1:w + (f1.0) add (16) uwCURBE_TEMP(3)<1> ubHIST_UV(0,16)<16;16,1> r61.24<0;2,1>:ub + (f0.0) mov (16) uwCURBE_TEMP(3)<1> r61.20<0;2,1>:ub + (-f0.0.anyv) mov(16) uwCURBE_TEMP(3)<1> ubHIST_UV(0,16)<16;16,1> + + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(0)<16;16,1> (abs)wDIFF_TEMPORAL(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(2)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(3)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(4)<16;16,1> (abs)wDIFF_TEMPORAL(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(6)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(7)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(8)<16;16,1> (abs)wDIFF_TEMPORAL(9)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(10)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(2)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(11)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(12)<16;16,1> (abs)wDIFF_TEMPORAL(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(14)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(3)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(15)<16;16,1> + +//Compute diff betn curr and prev. - Second 16 lines +//13 lines. + add (16) wDIFF_TEMPORAL(16)<1> ubCURR_UV(22,2)<16;16,1> -ubPREV_UV(8,0)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(17)<1> ubCURR_UV(23,2)<16;16,1> -ubPREV_UV(8,16)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(18)<1> ubCURR_UV(24,2)<16;16,1> -ubPREV_UV(8,32)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(19)<1> ubCURR_UV(25,2)<16;16,1> -ubPREV_UV(8,48)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(20)<1> ubCURR_UV(26,2)<16;16,1> -ubPREV_UV(8,64)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(21)<1> ubCURR_UV(27,2)<16;16,1> -ubPREV_UV(8,80)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(22)<1> ubCURR_UV(28,2)<16;16,1> -ubPREV_UV(8,96)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(23)<1> ubCURR_UV(29,2)<16;16,1> -ubPREV_UV(8,112)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(24)<1> ubCURR_UV(30,2)<16;16,1> -ubPREV_UV(8,128)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(25)<1> ubCURR_UV(31,2)<16;16,1> -ubPREV_UV(8,144)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(26)<1> ubCURR_UV(32,2)<16;16,1> -ubPREV_UV(8,160)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(27)<1> ubCURR_UV(33,2)<16;16,1> -ubPREV_UV(8,176)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(28)<1> ubCURR_UV(34,2)<16;16,1> -ubPREV_UV(8,192)<16;16,1> //Diff UV interleaved + +//3 more lines + add (16) wCURBE_TEMP(4)<1> ubCURR_UV(35,2)<16;16,1> -ubPREV_UV(8,208)<16;16,1> //Diff UV interleaved + add (16) wCURBE_TEMP(5)<1> ubCURR_UV(36,2)<16;16,1> -ubPREV_UV(8,224)<16;16,1> //Diff UV interleaved + add (16) wCURBE_TEMP(6)<1> ubCURR_UV(37,2)<16;16,1> -ubPREV_UV(8,240)<16;16,1> //Diff UV interleaved + + //16x4 to 8x4 - First 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> uwDIFF_TEMPORAL_SUM4x4(2,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(2,2)<4;2,1> + + //8x4 to 4x4 - First 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4_FINAL(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> { AccWrEn } + + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(16)<16;16,1> (abs)wDIFF_TEMPORAL(17)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(18)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(19)<16;16,1> + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(20)<16;16,1> (abs)wDIFF_TEMPORAL(21)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(22)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(23)<16;16,1> + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(24)<16;16,1> (abs)wDIFF_TEMPORAL(25)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(26)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(2)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(27)<16;16,1> + + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(28)<16;16,1> (abs)wCURBE_TEMP(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wCURBE_TEMP(5)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(3)<1> acc0.0<16;16,1>:uw (abs)wCURBE_TEMP(6)<16;16,1> + + //Find if block is motion block - First 16 lines + cmp.g.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_FINAL(0)<16;16,1> r61.26<0;2,1>:ub + + //Move TEMPORAL_SUM4x4 for SIMD16 use later. + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,0)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,2)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,4)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,6)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,8)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,10)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,12)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,14)<0;2,1> + + //Pick Appropriate Weight History Based on motion. - First 16 lines + (-f0.0) mov (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(2)<16;16,1> + + //Actual DN - First 16 lines + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(0)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(0)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(2,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(2,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(2,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,0)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,8)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(0)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(0)<1> ubCURR_UV(2,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(0)<1> wDIFF_TEMPORAL(0)<16;16,1> ubCURR_UV(2,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(1)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(1)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(3,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(3,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(3,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,16)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,24)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(1)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(1)<1> ubCURR_UV(3,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(1)<1> wDIFF_TEMPORAL(1)<16;16,1> ubCURR_UV(3,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(2)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(2)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(4,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(4,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(4,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,32)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,40)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(2)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(2)<1> ubCURR_UV(4,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(2)<1> wDIFF_TEMPORAL(2)<16;16,1> ubCURR_UV(4,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(3)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(3)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(5,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(5,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(5,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,48)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,56)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(3)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(3)<1> ubCURR_UV(5,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(3)<1> wDIFF_TEMPORAL(3)<16;16,1> ubCURR_UV(5,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(4)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(4)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(6,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(6,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(6,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,64)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,72)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(4)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(4)<1> ubCURR_UV(6,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(4)<1> wDIFF_TEMPORAL(4)<16;16,1> ubCURR_UV(6,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(5)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(5)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(7,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(7,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(7,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,80)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,88)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(5)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(5)<1> ubCURR_UV(7,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(5)<1> wDIFF_TEMPORAL(5)<16;16,1> ubCURR_UV(7,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(6)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(6)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(8,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(8,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(8,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,96)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,104)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(6)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(6)<1> ubCURR_UV(8,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(6)<1> wDIFF_TEMPORAL(6)<16;16,1> ubCURR_UV(8,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(7)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(7)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(9,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(9,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(9,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,112)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,120)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(7)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(7)<1> ubCURR_UV(9,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(7)<1> wDIFF_TEMPORAL(7)<16;16,1> ubCURR_UV(9,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(8)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(8)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(10,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(10,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(10,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,128)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,136)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(8)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(8)<1> ubCURR_UV(10,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(8)<1> wDIFF_TEMPORAL(8)<16;16,1> ubCURR_UV(10,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(9)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(9)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(11,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(11,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(11,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,144)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,152)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(9)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(9)<1> ubCURR_UV(11,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(9)<1> wDIFF_TEMPORAL(9)<16;16,1> ubCURR_UV(11,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(10)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(10)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(12,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(12,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(12,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,160)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,168)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(10)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(10)<1> ubCURR_UV(12,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(10)<1> wDIFF_TEMPORAL(10)<16;16,1> ubCURR_UV(12,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(11)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(11)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(13,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(13,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(13,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,176)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,184)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(11)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(11)<1> ubCURR_UV(13,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(11)<1> wDIFF_TEMPORAL(11)<16;16,1> ubCURR_UV(13,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(12)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(12)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(14,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(14,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(14,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,192)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,200)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(12)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(12)<1> ubCURR_UV(14,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(12)<1> wDIFF_TEMPORAL(12)<16;16,1> ubCURR_UV(14,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(13)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(13)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(15,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(15,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(15,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,208)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,216)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(13)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(13)<1> ubCURR_UV(15,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(13)<1> wDIFF_TEMPORAL(13)<16;16,1> ubCURR_UV(15,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(14)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(14)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(16,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(16,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(16,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,224)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,232)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(14)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(14)<1> ubCURR_UV(16,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(14)<1> wDIFF_TEMPORAL(14)<16;16,1> ubCURR_UV(16,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(15)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(15)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(17,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(17,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(17,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,240)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,248)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(15)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(15)<1> ubCURR_UV(17,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(15)<1> wDIFF_TEMPORAL(15)<16;16,1> ubCURR_UV(17,2)<16;16,1> + + + //16x4 to 8x4 - Second 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> uwDIFF_TEMPORAL_SUM4x4(2,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(2,2)<4;2,1> + + //8x4 to 4x4 - Second 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4_FINAL(1)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> { AccWrEn } + + //Find if block is motion block - Second 16 lines + cmp.g.f1.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_FINAL(1)<16;16,1> r61.26<0;2,1>:ub + + //Move TEMPORAL_SUM4x4 for SIMD16 use later. + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,0)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,2)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,4)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,6)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,8)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,10)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,12)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,14)<0;2,1> + + //Pick Appropriate Weight History Based on motion. - Second 16 lines + (-f1.0) mov (16) uwCURBE_TEMP(1)<1> uwCURBE_TEMP(3)<16;16,1> + + //Actual DN - Second 16 lines + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(16)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(16)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(22,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(22,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(22,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,0)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,8)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(16)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(16)<1> ubCURR_UV(22,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(16)<1> wDIFF_TEMPORAL(16)<16;16,1> ubCURR_UV(22,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(17)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(17)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(23,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(23,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(23,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,16)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,24)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(17)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(17)<1> ubCURR_UV(23,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(17)<1> wDIFF_TEMPORAL(17)<16;16,1> ubCURR_UV(23,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(18)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(18)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(24,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(24,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(24,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,32)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,40)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(18)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(18)<1> ubCURR_UV(24,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(18)<1> wDIFF_TEMPORAL(18)<16;16,1> ubCURR_UV(24,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(19)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(19)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(25,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(25,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(25,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,48)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,56)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(19)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(19)<1> ubCURR_UV(25,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(19)<1> wDIFF_TEMPORAL(19)<16;16,1> ubCURR_UV(25,2)<16;16,1> + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(20)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(20)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(26,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(26,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(26,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,64)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,72)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(20)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(20)<1> ubCURR_UV(26,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(20)<1> wDIFF_TEMPORAL(20)<16;16,1> ubCURR_UV(26,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(21)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(21)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(27,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(27,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(27,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,80)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,88)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(21)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(21)<1> ubCURR_UV(27,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(21)<1> wDIFF_TEMPORAL(21)<16;16,1> ubCURR_UV(27,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(22)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(22)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(28,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(28,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(28,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,96)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,104)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(22)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(22)<1> ubCURR_UV(28,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(22)<1> wDIFF_TEMPORAL(22)<16;16,1> ubCURR_UV(28,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(23)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(23)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(29,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(29,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(29,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,112)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,120)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(23)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(23)<1> ubCURR_UV(29,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(23)<1> wDIFF_TEMPORAL(23)<16;16,1> ubCURR_UV(29,2)<16;16,1> + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(24)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(24)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(30,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(30,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(30,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,128)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,136)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(24)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(24)<1> ubCURR_UV(30,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(24)<1> wDIFF_TEMPORAL(24)<16;16,1> ubCURR_UV(30,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(25)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(25)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(31,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(31,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(31,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,144)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,152)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(25)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(25)<1> ubCURR_UV(31,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(25)<1> wDIFF_TEMPORAL(25)<16;16,1> ubCURR_UV(31,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(26)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(26)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(32,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(32,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(32,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,160)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,168)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(26)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(26)<1> ubCURR_UV(32,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(26)<1> wDIFF_TEMPORAL(26)<16;16,1> ubCURR_UV(32,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(27)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(27)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(33,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(33,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(33,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,176)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,184)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(27)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(27)<1> ubCURR_UV(33,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(27)<1> wDIFF_TEMPORAL(27)<16;16,1> ubCURR_UV(33,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(28)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(28)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(34,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(34,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(34,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,192)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,200)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(28)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(28)<1> ubCURR_UV(34,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(28)<1> wDIFF_TEMPORAL(28)<16;16,1> ubCURR_UV(34,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(4)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(4)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(35,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(35,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(35,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,208)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,216)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(4)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(4)<1> ubCURR_UV(35,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(4)<1> wCURBE_TEMP(4)<16;16,1> ubCURR_UV(35,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(5)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(5)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(36,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(36,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(36,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,224)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,232)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(5)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(5)<1> ubCURR_UV(36,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(5)<1> wCURBE_TEMP(5)<16;16,1> ubCURR_UV(36,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(6)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(6)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(37,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(37,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(37,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,240)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,248)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(6)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(6)<1> ubCURR_UV(37,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(6)<1> wCURBE_TEMP(6)<16;16,1> ubCURR_UV(37,2)<16;16,1> + + //Pack Weight History WORD -> BYTE + mov (16) ubCURBE_TEMP(3,0)<1> ubCURBE_TEMP(0)<32;16,2> + mov (16) ubCURBE_TEMP(3,16)<1> ubCURBE_TEMP(1)<32;16,2> + + + +//Module Name : DN_UV_Compute_BNE_UV +//Author : Tatiya, Rupesh +//Description : Computes minimum SOAD for each 16x4 block. + + cmp.l.f0.0 (8) null:w uwSOAD_MIN_8x4(0,12)<16;4,1> uwSOAD_MIN_8x4(2,12)<16;4,1> + (f0.0)sel (8) uwCURBE_TEMP(1,0)<1> uwSOAD_MIN_8x4(0,12)<16;4,1> uwSOAD_MIN_8x4(2,12)<16;4,1> + + mov (8) ubCURBE_TEMP(1)<1> ubCURBE_TEMP(1)<16;8,2> + + + +//Module Name : DN_UV_PL2_Pack_Denoised_UV +//Name : Tatiya, Rupesh +//Description : Pack UV denoised data based on PL2 input. + + + +//Module Name : DN_UV_Pack_Denoised_UV +//Name : Tatiya, Rupesh +//Description : Pack UV denoised data based on PL2/PL3/PA. + + +//First 16 lines. + mov (16) ubMSGPAYLOAD_UV0(0,0)<1> ubDIFF_TEMPORAL(0)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(0,16)<1> ubDIFF_TEMPORAL(1)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(1,0)<1> ubDIFF_TEMPORAL(2)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(1,16)<1> ubDIFF_TEMPORAL(3)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(2,0)<1> ubDIFF_TEMPORAL(4)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(2,16)<1> ubDIFF_TEMPORAL(5)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(3,0)<1> ubDIFF_TEMPORAL(6)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(3,16)<1> ubDIFF_TEMPORAL(7)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(4,0)<1> ubDIFF_TEMPORAL(8)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(4,16)<1> ubDIFF_TEMPORAL(9)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(5,0)<1> ubDIFF_TEMPORAL(10)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(5,16)<1> ubDIFF_TEMPORAL(11)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(6,0)<1> ubDIFF_TEMPORAL(12)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(6,16)<1> ubDIFF_TEMPORAL(13)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(7,0)<1> ubDIFF_TEMPORAL(14)<32;16,2> + mov (16) ubMSGPAYLOAD_UV0(7,16)<1> ubDIFF_TEMPORAL(15)<32;16,2> + +//Second 16 lines. +//12 lines first + mov (16) ubMSGPAYLOAD_UV1(0,0)<1> ubDIFF_TEMPORAL(16)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(0,16)<1> ubDIFF_TEMPORAL(17)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(1,0)<1> ubDIFF_TEMPORAL(18)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(1,16)<1> ubDIFF_TEMPORAL(19)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(2,0)<1> ubDIFF_TEMPORAL(20)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(2,16)<1> ubDIFF_TEMPORAL(21)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(3,0)<1> ubDIFF_TEMPORAL(22)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(3,16)<1> ubDIFF_TEMPORAL(23)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(4,0)<1> ubDIFF_TEMPORAL(24)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(4,16)<1> ubDIFF_TEMPORAL(25)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(5,0)<1> ubDIFF_TEMPORAL(26)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(5,16)<1> ubDIFF_TEMPORAL(27)<32;16,2> + + //3 lines next + mov (16) ubMSGPAYLOAD_UV1(6,0)<1> ubDIFF_TEMPORAL(28)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(6,16)<1> ubCURBE_TEMP(4)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(7,0)<1> ubCURBE_TEMP(5)<32;16,2> + mov (16) ubMSGPAYLOAD_UV1(7,16)<1> ubCURBE_TEMP(6)<32;16,2> + + + +//Module Name : DN_UV_420_Save_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Save Curr Frame Y data for 420 Input + + + +//Module Name : DN_UV_Load_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Saves Y or YUY2 of Current frame. + + + + + mov (8) acc0.0<1>:ud r0.0<8;8,1>:ud + mov (2) acc0.0<1>:d r62.10<2;2,1>:w + + mov (1) acc0.2<1>:d 0xF000F:ud + + mov (8) r92.0<1>:ud acc0.0<8;8,1>:ud + + mov (8) r101.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r110.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r119.0<1>:ud acc0.0<8;8,1>:ud + + add (1) r101.1<1>:d acc0.1<0;1,0>:d 16:d + + add (1) r110.0<1>:d acc0.0<0;1,0>:d 16:d + + add (2) r119.0<1>:d acc0.0<2;2,1>:d 16:d + + send (8) null<1>:d r92 0x5 0x120A8018:ud + send (8) null<1>:d r101 0x5 0x120A8018:ud + send (8) null<1>:d r110 0x5 0x120A8018:ud + send (8) null<1>:d r119 0x5 0x120A8018:ud + + + //TODO - See if History saving can be combined with Curr Frame Save. - rT + + +//Module Name : DN_UV_Save_Hist_UV +//Author : Tatiya, Rupesh +//Description : Saves DN history for UV data. + + mov (8) r3.0<1>:ud r0.0<8;8,1>:ud + mov (2) r3.0<1>:d r62.12<2;2,1>:w + mov (1) r3.2<1>:d 0x30007:ud + + send (8) null<1>:d r3 0x5 0x40A8021:ud + + + +//Module Name : DN_UV_Save_BNE_UV +//Author : Tatiya, Rupesh +//Description : Saves BNE values for 16x16 U and 16x16 V. + + mov (8) r1.0<1>:ud r0.0<8;8,1>:ud + mov (2) r1.0<1>:d r63.12<2;2,1>:w + mov (1) r1.2<1>:d 0x10003:ud + + send (8) null<1>:d r1 0x5 0x40A8023:ud + + + +//Module Name : DN_UV_PL2_Save_Curr_Frame_UV +//Author : Tatiya, Rupesh + + + +//Module name : DN_UV_Save_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description : Saves Current Frame (UV only). + + + + + mov (8) r74<1>:ud r0.0<8;8,1>:ud + mov (8) r83<1>:ud r0.0<8;8,1>:ud + + mov (1) r74.0<1>:d r62.10<0;1,0>:w + shr (1) r74.1<1>:d r62.11<0;1,0>:w 1:w + mov (1) r74.2<1>:d 0xF000F:ud + + add (1) r83.0<1>:d r62.10<0;1,0>:w 16:d + shr (1) r83.1<1>:d r62.11<0;1,0>:w 1:w + mov (1) r83.2<1>:d 0xF000F:ud + + send (8) null<1>:d r74 0x5 0x120A8019:ud + send (8) null<1>:d r83 0x5 0x120A8019:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + + //All sub-routines here + + +// Module Name : Noise_Detection +// Author : Tatiya, Rupesh +// Description : Performs noise detection on 32 pixels of U (8x4) and 32 pixels of V (8x4). + +DN_UV_NOISE_DETECTION_UV: + +// Find Field Block Median +// +// Purpose : Find the median value of the nine pixels in the same field +// which are centered at current pixel. +// +// Works on 9 pixels centered at the current pixel +// NOTE: pixels are within same field. +// v4 - current pixel +// +// v2 v1 v0 +// * * * <--- Different field - not used +// v5 v4 v3 +// * * * <--- Different field - not used +// v8 v7 v6 + +// Algorithm to find median modifies the data. +// Copy the data needed to calculate median so the original source data stays intact. +// + +//TODO - Change Interleaved implementation to separated one if - , does not work on predication. - rT + +//Delete Later - rT +//mov (1) pCUR_UV:uw 52*32:uw + +// v0 +mov (16) ubMEDIAN_TEMP(0,0)<1> r[a0.0,0]<16;16,1> +// v0 +mov (16) ubMEDIAN_TEMP(0,16)<1> r[a0.0,32]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(1,0)<1> r[a0.0,2]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(1,16)<1> r[a0.0,34]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(2,0)<1> r[a0.0,4]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(2,16)<1> r[a0.0,36]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(3,0)<1> r[a0.0,64]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(3,16)<1> r[a0.0,96]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(4,0)<1> r[a0.0,66]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(4,16)<1> r[a0.0,98]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(5,0)<1> r[a0.0,68]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(5,16)<1> r[a0.0,100]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(6,0)<1> r[a0.0,128]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(6,16)<1> r[a0.0,160]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(7,0)<1> r[a0.0,130]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(7,16)<1> r[a0.0,162]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(8,0)<1> r[a0.0,132]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(8,16)<1> r[a0.0,164]<16;16,1> + +//TODO - Optimize one instruction here. +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw +// v0 +mov (16) ubMEDIAN_TEMP(9,0)<1> r[a0.0,0]<16;16,1> +// v0 +mov (16) ubMEDIAN_TEMP(9,16)<1> r[a0.0,32]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(10,0)<1> r[a0.0,2]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(10,16)<1> r[a0.0,34]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(11,0)<1> r[a0.0,4]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(11,16)<1> r[a0.0,36]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(12,0)<1> r[a0.0,64]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(12,16)<1> r[a0.0,96]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(13,0)<1> r[a0.0,66]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(13,16)<1> r[a0.0,98]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(14,0)<1> r[a0.0,68]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(14,16)<1> r[a0.0,100]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(15,0)<1> r[a0.0,128]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(15,16)<1> r[a0.0,160]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(16,0)<1> r[a0.0,130]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(16,16)<1> r[a0.0,162]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(17,0)<1> r[a0.0,132]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(17,16)<1> r[a0.0,164]<16;16,1> + +//TODO - Optimize one instruction here. +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw + +// MedianSwap +// +// MedianSwap(inOutLeft, inOutRight) +// { +// if (inOutLeft > inOutRight) +// { +// temp = inOutLeft +// inOutLeft = inOutRight +// inOutRight = temp +// } +// } + +// MedianSwap(v1, v2) - U +// MedianSwap(v4, v5) - U +// MedianSwap(v1, v2) - V +// MedianSwap(v4, v5) - V + +cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> +cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> +cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> +cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(1,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(1,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(1,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> +(f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> +(f1.0) mov (16) ubMEDIAN_TEMP(1,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> +(f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> +(f0.1) mov (16) ubMEDIAN_TEMP(5,0)<2> ubTEMP1(0,16)<16;16,1> +(f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(1,0)<16;16,1> +(f1.1) mov (16) ubMEDIAN_TEMP(5,1)<2> ubTEMP1(1,16)<16;16,1> + +// MedianSwap(v7, v8) - U +// MedianSwap(v0, v1) - U +// MedianSwap(v7, v8) - V +// MedianSwap(v0, v1) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(7,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(0,0)<32;16,2> ubMEDIAN_TEMP(1,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(7,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(0,1)<32;16,2> ubMEDIAN_TEMP(1,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(7,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(0,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(7,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(0,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(7,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(0,0)<2> ubMEDIAN_TEMP(1,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(7,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(0,1)<2> ubMEDIAN_TEMP(1,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(1,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(1,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v3, v4) - U + // MedianSwap(v6, v7) - U + // MedianSwap(v3, v4) - V + // MedianSwap(v6, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(3,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(6,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(3,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(6,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(3,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(6,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(3,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(6,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(3,0)<2> ubMEDIAN_TEMP(4,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(6,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(3,1)<2> ubMEDIAN_TEMP(4,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(6,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(7,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(4,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(7,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v1, v2) - U + // MedianSwap(v4, v5) - U + // MedianSwap(v1, v2) - V + // MedianSwap(v4, v5) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(1,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(1,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(1,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(1,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(5,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(5,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v7, v8) - U + // MedianSwap(v0, v3) - U + // MedianSwap(v7, v8) - V + // MedianSwap(v0, v3) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(7,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(0,0)<32;16,2> ubMEDIAN_TEMP(3,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(7,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(0,1)<32;16,2> ubMEDIAN_TEMP(3,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(7,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(0,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(7,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(0,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(7,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(0,0)<2> ubMEDIAN_TEMP(3,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(7,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(0,1)<2> ubMEDIAN_TEMP(3,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(3,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(3,1)<2> ubTEMP1(1,16)<16;16,1> + + // NOTE: + // Compare v0 to v6 to find the minimum. + // Store the minimum for future use. + //TODO - Find if MIN is needed. + //cmp.l.f0.0 (16) null:w ubMEDIAN_TEMP(%1+0,0)<32;16,2> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //cmp.l.f1.0 (16) null:w ubMEDIAN_TEMP(%1+0,1)<32;16,2> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + //(f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,0)<32;16,2> + //(f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,1)<32;16,2> + //(-f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //(-f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + + // MedianSwap(v5, v8) - U + // MedianSwap(v4, v7) - U + // MedianSwap(v5, v8) - V + // MedianSwap(v4, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(5,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(5,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(5,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(5,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(5,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(5,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(7,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(7,1)<2> ubTEMP1(1,16)<16;16,1> + +// NOTE: +// Compare v2 to v8 to find the maximum. +// Store the maximum for future use. + //TODO - Find if MAX is needed. +// cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(%1+2,0)<32;16,2> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +// cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(%1+2,1)<32;16,2> ubMEDIAN_TEMP(%1+8,1)<32;16,2> +//(f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,0)<32;16,2> +//(f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,1)<32;16,2> +//(-f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +//(-f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,1)<32;16,2> + +// MedianSwap(v3, v6) - U +// MedianSwap(v1, v4) - U +// MedianSwap(v3, v6) - V +// MedianSwap(v1, v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(3,0)<32;16,2> ubMEDIAN_TEMP(6,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(3,1)<32;16,2> ubMEDIAN_TEMP(6,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(6,0)<2> ubMEDIAN_TEMP(3,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(1,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(6,1)<2> ubMEDIAN_TEMP(3,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(1,1)<32;16,2> + + // MedianSwap(v2,v5) - U + // MedianSwap(v4,v7) - U + // MedianSwap(v2,v5) - V + // MedianSwap(v4,v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(2,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(2,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(0,16)<16;16,1> + + // MedianSwap(v6,v4) - U + // MedianSwap(v6,v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(6,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(6,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(6,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(6,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> +cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> +cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> +cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> +cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(10,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(10,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(10,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> +(f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> +(f1.0) mov (16) ubMEDIAN_TEMP(10,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> +(f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> +(f0.1) mov (16) ubMEDIAN_TEMP(14,0)<2> ubTEMP1(0,16)<16;16,1> +(f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(1,0)<16;16,1> +(f1.1) mov (16) ubMEDIAN_TEMP(14,1)<2> ubTEMP1(1,16)<16;16,1> + +// MedianSwap(v7, v8) - U +// MedianSwap(v0, v1) - U +// MedianSwap(v7, v8) - V +// MedianSwap(v0, v1) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(16,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(9,0)<32;16,2> ubMEDIAN_TEMP(10,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(16,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(9,1)<32;16,2> ubMEDIAN_TEMP(10,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(16,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(9,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(16,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(9,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(16,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(9,0)<2> ubMEDIAN_TEMP(10,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(16,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(9,1)<2> ubMEDIAN_TEMP(10,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(10,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(10,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v3, v4) - U + // MedianSwap(v6, v7) - U + // MedianSwap(v3, v4) - V + // MedianSwap(v6, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(12,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(15,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(12,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(15,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(12,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(15,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(12,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(15,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(12,0)<2> ubMEDIAN_TEMP(13,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(15,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(12,1)<2> ubMEDIAN_TEMP(13,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(15,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(16,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(13,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(16,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v1, v2) - U + // MedianSwap(v4, v5) - U + // MedianSwap(v1, v2) - V + // MedianSwap(v4, v5) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(10,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(10,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(10,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(10,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(14,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(14,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v7, v8) - U + // MedianSwap(v0, v3) - U + // MedianSwap(v7, v8) - V + // MedianSwap(v0, v3) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(16,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(9,0)<32;16,2> ubMEDIAN_TEMP(12,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(16,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(9,1)<32;16,2> ubMEDIAN_TEMP(12,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(16,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(9,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(16,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(9,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(16,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(9,0)<2> ubMEDIAN_TEMP(12,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(16,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(9,1)<2> ubMEDIAN_TEMP(12,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(12,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(12,1)<2> ubTEMP1(1,16)<16;16,1> + + // NOTE: + // Compare v0 to v6 to find the minimum. + // Store the minimum for future use. + //TODO - Find if MIN is needed. + //cmp.l.f0.0 (16) null:w ubMEDIAN_TEMP(%1+0,0)<32;16,2> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //cmp.l.f1.0 (16) null:w ubMEDIAN_TEMP(%1+0,1)<32;16,2> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + //(f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,0)<32;16,2> + //(f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,1)<32;16,2> + //(-f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //(-f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + + // MedianSwap(v5, v8) - U + // MedianSwap(v4, v7) - U + // MedianSwap(v5, v8) - V + // MedianSwap(v4, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(14,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(14,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(14,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(14,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(14,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(14,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(16,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(16,1)<2> ubTEMP1(1,16)<16;16,1> + +// NOTE: +// Compare v2 to v8 to find the maximum. +// Store the maximum for future use. + //TODO - Find if MAX is needed. +// cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(%1+2,0)<32;16,2> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +// cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(%1+2,1)<32;16,2> ubMEDIAN_TEMP(%1+8,1)<32;16,2> +//(f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,0)<32;16,2> +//(f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,1)<32;16,2> +//(-f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +//(-f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,1)<32;16,2> + +// MedianSwap(v3, v6) - U +// MedianSwap(v1, v4) - U +// MedianSwap(v3, v6) - V +// MedianSwap(v1, v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(12,0)<32;16,2> ubMEDIAN_TEMP(15,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(12,1)<32;16,2> ubMEDIAN_TEMP(15,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(15,0)<2> ubMEDIAN_TEMP(12,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(10,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(15,1)<2> ubMEDIAN_TEMP(12,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(10,1)<32;16,2> + + // MedianSwap(v2,v5) - U + // MedianSwap(v4,v7) - U + // MedianSwap(v2,v5) - V + // MedianSwap(v4,v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(11,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(11,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(0,16)<16;16,1> + + // MedianSwap(v6,v4) - U + // MedianSwap(v6,v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(15,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(15,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(15,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(15,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + +// Sobel Value calculation for the current pixel v4 +// v2 v1 v0 +// * * * <--- Different field - not used +// v5 v4 v3 +// * * * <--- Different field - not used +// v8 v7 v6 +// +// Gx = -v0 - 2*v3 - v6 + v2 + 2*v5 + v8 +// Gy = v0 + 2*v1 + v2 - v6 - 2*v7 - v8 +// +// Sobel = (|Gx| + |Gy|) >> 3 + +//TODO - Change Later - rT +add (1) a0.0:uw a0.0<0;1,0>:uw -128:uw + +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,132]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,0]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,4]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(0)<1> r[a0.0,68]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,164]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,32]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,36]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(1)<1> r[a0.0,100]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,196]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,192]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,68]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(2)<1> r[a0.0,132]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,228]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,224]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,100]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(3)<1> r[a0.0,164]<16;16,1>:ub 2:w + +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,2]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,0]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,132]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,4]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,130]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(0)<16;16,1> + +shr (16) uwSOBEL(0)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,34]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,32]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,164]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,36]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,162]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(1)<16;16,1> + +shr (16) uwSOBEL(1)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,66]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,196]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,68]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,192]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,194]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(2)<16;16,1> + +shr (16) uwSOBEL(2)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,98]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,228]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,100]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,224]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,226]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(3)<16;16,1> + +shr (16) uwSOBEL(3)<1> acc0.0<16;16,1>:uw 3:uw + +//Mov Median in CURBE_TEMP to free up temp space. +mov (16) ubMEDIAN(0,0)<1> ubMEDIAN_TEMP(4,0)<16;16,1> +mov (16) ubMEDIAN(0,16)<1> ubMEDIAN_TEMP(4,16)<16;16,1> +mov (16) ubMEDIAN(0,32)<1> ubMEDIAN_TEMP(13,0)<16;16,1> +mov (16) ubMEDIAN(0,48)<1> ubMEDIAN_TEMP(13,16)<16;16,1> + +// Find: +// absDiff = abs(ubCurY - ubMedian) +// Find the difference between pixel and median value. + +//Median is interleaved. So difference is also interleaved. + +//------------------------------------------------------------------------------------------ +//Process 16 U and 16 V pixels here and rest later. +// first row - v0,v1,v2 +add (16) wDIFF(0)<1> r[a0.0,0]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(1)<1> r[a0.0,2]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(2)<1> r[a0.0,4]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> + +// second row - v3,v4,v5 +add (16) wDIFF(3)<1> r[a0.0,64]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(4)<1> r[a0.0,66]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(5)<1> r[a0.0,68]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> + +// third row - v6,v7,v8 +add (16) wDIFF(6)<1> r[a0.0,128]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(7)<1> r[a0.0,130]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(8)<1> r[a0.0,132]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +// first row - v0,v1,v2 +add (16) wDIFF(9)<1> r[a0.0,32]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(10)<1> r[a0.0,34]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(11)<1> r[a0.0,36]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +// second row - v3,v4,v5 +add (16) wDIFF(12)<1> r[a0.0,96]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(13)<1> r[a0.0,98]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(14)<1> r[a0.0,100]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +// third row - v6,v7,v8 +add (16) wDIFF(15)<1> r[a0.0,160]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(16)<1> r[a0.0,162]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(17)<1> r[a0.0,164]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +//TODO - Change Later - rT +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw + +// Find sum of all absolute differences AND +// maximum absolute difference for 16 U and 16 V here. +//First 2 rows of 8x4 +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(2)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(3)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(6)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(7)<16;16,1> + add (16) uwSOAD(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF(8)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//------------ + //DIFF(0-7) is not needed here. Populate it. + // first row - v0,v1,v2 + add (16) wDIFF(0)<1> r[a0.0,0]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(1)<1> r[a0.0,2]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(2)<1> r[a0.0,4]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + + // second row - v3,v4,v5 + add (16) wDIFF(3)<1> r[a0.0,64]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(4)<1> r[a0.0,66]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(5)<1> r[a0.0,68]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + + // third row - v6,v7 + add (16) wDIFF(6)<1> r[a0.0,128]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(7)<1> r[a0.0,130]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> +//------------ + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(0)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> + +//------------ + //Load v8 - DIFF(8) + add (16) wDIFF(8)<1> r[a0.0,132]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> +//------------ +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(11)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(12)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(14)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(15)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(16)<16;16,1> + add (16) uwSOAD(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF(17)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//------------ + //DIFF(0-7) is not needed here. Populate it. + // first row - v0,v1,v2 + add (16) wDIFF(9)<1> r[a0.0,32]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(10)<1> r[a0.0,34]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(11)<1> r[a0.0,36]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + + // second row - v3,v4,v5 + add (16) wDIFF(12)<1> r[a0.0,96]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(13)<1> r[a0.0,98]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(14)<1> r[a0.0,100]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + + // third row - v6,v7 + add (16) wDIFF(15)<1> r[a0.0,160]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(16)<1> r[a0.0,162]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> +//------------ + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(1)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> + +//------------ + //Load v8 - DIFF(8) + add (16) wDIFF(17)<1> r[a0.0,164]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> +//------------ + +//if ((sobel_edge_measure < m_SobelEdgeThreshold) && ((block_max-block_min) < m_LocalDiffThreshold)) +// if (sigma_mb_min > sigma) +// sigma_mb_min = sigma; + +//NOTE: block_min is always zero as median is one of the value in 3x3 block. So no need o calculate it. +// So just do - +//if ((sobel_edge_measure < m_SobelEdgeThreshold) && ((block_max) < m_LocalDiffThreshold) && ( sigma < sigma_mb_min)) +// sigma_mb_min = sigma; + +//We are processing 32 bytes of U and 32 bytes of V - each of size 8x4. +//Compare first 8 bytes with max possible (255). +//Start above condition from second 8 bytes. + +//TODO - Change Later - rT +// mov (1) pCUR_MIN_SOAD_8x4:uw 1752:uw //r54.24:ub + +//First row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(0)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(0)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(0)<16;16,1> 255:uw +(f0.0) sel (16) uwSOBEL(0)<1> uwSOAD(0)<16;16,1> 255:uw + +//Second row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(1)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(1)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(1)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(1)<16;16,1> + +// Find sum of all absolute differences AND +// maximum absolute difference for 16 U and 16 V here. +//Second 2 rows of 8x4 +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(2)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(3)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(6)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(7)<16;16,1> + add (16) uwSOAD(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF(8)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(0)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(11)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(12)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(14)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(15)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(16)<16;16,1> + add (16) uwSOAD(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF(17)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(1)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> + +//Third row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(2)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(0)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(0)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(0)<16;16,1> + +//Fourth row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(3)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(1)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(1)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(1)<16;16,1> + + cmp.l.f0.0 (8) null:uw uwSOBEL(0,0)<8;8,1> uwSOBEL(0,8)<8;8,1> +(f0.0) sel (8) uwSOBEL(0)<1> uwSOBEL(0,0)<8;8,1> uwSOBEL(0,8)<8;8,1> + + cmp.l.f0.0 (4) null:uw uwSOBEL(0,0)<4;4,1> uwSOBEL(0,4)<4;4,1> +(f0.0) sel (4) uwSOBEL(0)<1> uwSOBEL(0,0)<4;4,1> uwSOBEL(0,4)<4;4,1> + + cmp.l.f0.0 (2) null:uw uwSOBEL(0,0)<2;2,1> uwSOBEL(0,2)<2;2,1> +(f0.0) sel (2) r[a0.1,0]<1>:uw uwSOBEL(0,0)<2;2,1> uwSOBEL(0,2)<2;2,1> + + + + + + +// End of common.inc + +mov (1) ip:ud r9.7<0;1,0>:d + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_0.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_0.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_0.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_0.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,561 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 39 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PA_AVS_Buf_0.asm +// Author: Vivek Kumar +// Description: Loads 8x8 AVS/IEF Packed data into Buffer 0 + + + +// FileName : PA_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF Packed data into Buffer N + +//On IVB, for AVS module - set buffer pointers offset according to AVS Layout. +//Change it to Sample Unorm layout in Shuffle modules. + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_0_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x50EB400:ud //msg desc + + mov (1) r16.2:ud 0x00000000:ud // Enable ARGB channels + + + //OPT: rAVS_PAYLOAD.1 and .7 --> use NODDCLR, NODDCHK -rT + mov (1) r25.7<1>:ud r9.7:ud { NoDDClr } + mov (1) r25.1<1>:ud r9.12:uw { NoDDChk } + + + // set the vertical block number + + + mov (8) r17.0:ud r25.0<8;8,1>:ud + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_AVS_WA_DONE_L0_0_ + + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + + +GEN7_AVS_WA_DONE_L0_0_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_0(0)<1> r16 0x2 a0.0:ud + // Returns packed data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_1.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_1.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_1.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_1.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,553 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 37 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PA_AVS_Buf_1.asm +// Author: Vivek Kumar +// Description: Loads 8x8 AVS/IEF Packed data into Buffer 1 + + + +// FileName : PA_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF Packed data into Buffer N + +//On IVB, for AVS module - set buffer pointers offset according to AVS Layout. +//Change it to Sample Unorm layout in Shuffle modules. + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_1_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x50EB400:ud //msg desc + + mov (1) r16.2:ud 0x00000000:ud // Enable ARGB channels + + + // set the vertical block number + + add (1) r25.1<1>:ud r9.12:uw 1:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_AVS_WA_DONE_L0_1_ + + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + + +GEN7_AVS_WA_DONE_L0_1_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_1(0)<1> r16 0x2 a0.0:ud + // Returns packed data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_1_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_2.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_2.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_2.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_2.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,554 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 37 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PA_AVS_Buf_2.asm +// Author: Vivek Kumar +// Description: Loads 8x8 AVS/IEF Packed data into Buffer 2 + + + +// FileName : PA_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF Packed data into Buffer N + +//On IVB, for AVS module - set buffer pointers offset according to AVS Layout. +//Change it to Sample Unorm layout in Shuffle modules. + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_2_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x50EB400:ud //msg desc + + mov (1) r16.2:ud 0x00000000:ud // Enable ARGB channels + + + // set the vertical block number + + + add (1) r25.1<1>:ud r9.12:uw 2:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_AVS_WA_DONE_L0_2_ + + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + + +GEN7_AVS_WA_DONE_L0_2_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_2(0)<1> r16 0x2 a0.0:ud + // Returns packed data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_2_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_3.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_3.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_AVS_Buf_3.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_AVS_Buf_3.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,554 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 37 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PA_AVS_Buf_3.asm +// Author: Vivek Kumar +// Description: Loads 8x8 AVS/IEF Packed data into Buffer 3 + + + +// FileName : PA_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF Packed data into Buffer N + +//On IVB, for AVS module - set buffer pointers offset according to AVS Layout. +//Change it to Sample Unorm layout in Shuffle modules. + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_3_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x50EB400:ud //msg desc + + mov (1) r16.2:ud 0x00000000:ud // Enable ARGB channels + + + // set the vertical block number + + + add (1) r25.1<1>:ud r9.12:uw 3:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_AVS_WA_DONE_L0_3_ + + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + + +GEN7_AVS_WA_DONE_L0_3_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_3(0)<1> r16 0x2 a0.0:ud + // Returns packed data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_3_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DI_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DI_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DI_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DI_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,483 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 87 // Total instruction count +// 1 // Total kernel count + +.kernel PA_DI_422CP +.code + + + +// FileName: DI.asm +// Author: Vivek Kumar +// Description: Tasks for DI only case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DI_Save_422CP_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in 422 format to Color Pipe (IECP) + + +.declare mubMSGHDR_DI_OUT1_1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT1_2 Base=r21.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_1 Base=r24.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_2 Base=r27.0 ElementSize=1 Type=ub + + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:ud r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:ud r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3000F:ud { NoDDClr, NoDDChk } // Block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) r27.3<1>:ud r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r24.0<1>:ud r27<8;8,1>:ud + + +// Pack 2nd field Y; First 8x4 block + mov (8) mubMSGHDR_DI_OUT1_1(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; First 8x4 block + mov (4) mubMSGHDR_DI_OUT1_1(1,1)<4> ubDNDI_RESP(2,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,17)<4> ubDNDI_RESP(2,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(1,3)<4> ubDNDI_RESP(2,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,19)<4> ubDNDI_RESP(2,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,1)<4> ubDNDI_RESP(2,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,17)<4> ubDNDI_RESP(2,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(2,3)<4> ubDNDI_RESP(2,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,19)<4> ubDNDI_RESP(2,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + + +// Pack 2nd field Y; Second 8x4 block +mov (8) r21.0<1>:ud r18.0<8;8,1>:ud +add (1) r21.0<1>:ud r21.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT1_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; Second 8x4 block + mov (4) mubMSGHDR_DI_OUT1_2(1,1)<4> ubDNDI_RESP(2,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,17)<4> ubDNDI_RESP(2,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(1,3)<4> ubDNDI_RESP(2,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,19)<4> ubDNDI_RESP(2,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,1)<4> ubDNDI_RESP(2,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,17)<4> ubDNDI_RESP(2,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(2,3)<4> ubDNDI_RESP(2,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,19)<4> ubDNDI_RESP(2,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r18.0 0x5 0x60A801B:ud +send (8) null<1>:d r21.0 0x5 0x60A801B:ud + +// Pack 1st field Y; 1st 8x4 block + mov (8) mubMSGHDR_DI_OUT2_1(1)<2> ubDNDI_RESP(4,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(1,16)<2> ubDNDI_RESP(4,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2)<2> ubDNDI_RESP(4,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2,16)<2> ubDNDI_RESP(4,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U,V; 1st 8x4 block + mov (4) mubMSGHDR_DI_OUT2_1(1,1)<4> ubDNDI_RESP(6,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,17)<4> ubDNDI_RESP(6,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(1,3)<4> ubDNDI_RESP(6,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,19)<4> ubDNDI_RESP(6,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,1)<4> ubDNDI_RESP(6,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,17)<4> ubDNDI_RESP(6,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(2,3)<4> ubDNDI_RESP(6,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,19)<4> ubDNDI_RESP(6,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Pack 1st field Y; 2nd 8x4 block +mov (8) r27.0<1>:ud r24.0<8;8,1>:ud +add (1) r27.0<1>:ud r27.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT2_2(1)<2> ubDNDI_RESP(4,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(1,16)<2> ubDNDI_RESP(4,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2)<2> ubDNDI_RESP(4,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2,16)<2> ubDNDI_RESP(4,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U, V; 2nd 8x4 block + mov (4) mubMSGHDR_DI_OUT2_2(1,1)<4> ubDNDI_RESP(6,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,17)<4> ubDNDI_RESP(6,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(1,3)<4> ubDNDI_RESP(6,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,19)<4> ubDNDI_RESP(6,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,1)<4> ubDNDI_RESP(6,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,17)<4> ubDNDI_RESP(6,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(2,3)<4> ubDNDI_RESP(6,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,19)<4> ubDNDI_RESP(6,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r24.0 0x5 0x60A801E:ud +send (8) null<1>:d r27.0 0x5 0x60A801E:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DI_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DI_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DI_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DI_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,421 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 57 // Total instruction count +// 1 // Total kernel count + +.kernel PA_DI_PA +.code + + + +// FileName: DI.asm +// Author: Vivek Kumar +// Description: Tasks for DI only case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DI_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in Packed format + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20 + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x8) + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r23.0<1>:ud r27<8;8,1>:ud + +// Pack 2nd field Y + mov (16) r[a0.4, 0]<2> ubDNDI_RESP(0,0) { NoDDClr } + mov (16) r[a0.4, 32]<2> ubDNDI_RESP(0,16) { NoDDClr } + mov (16) r[a0.4, 64]<2> ubDNDI_RESP(0,32) { NoDDClr } + mov (16) r[a0.4, 96]<2> ubDNDI_RESP(0,48) { NoDDClr } +// Pack 2nd field U + mov (8) r[a0.5, 0]<4> ubDNDI_RESP(2,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 32]<4> ubDNDI_RESP(2,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 64]<4> ubDNDI_RESP(2,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 96]<4> ubDNDI_RESP(2,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 2nd field V + mov (8) r[a0.6, 0]<4> ubDNDI_RESP(2,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 32]<4> ubDNDI_RESP(2,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 64]<4> ubDNDI_RESP(2,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 96]<4> ubDNDI_RESP(2,48)<16;8,2> { NoDDChk } //Vpixels + +// Pack 1st field Y + mov (16) r[a0.4, 160]<2> ubDNDI_RESP(4,0) { NoDDClr } + mov (16) r[a0.4, 192]<2> ubDNDI_RESP(4,16) { NoDDClr } + mov (16) r[a0.4, 224]<2> ubDNDI_RESP(4,32) { NoDDClr } + mov (16) r[a0.4, 256]<2> ubDNDI_RESP(4,48) { NoDDClr } +// Pack 1st field U + mov (8) r[a0.5, 160]<4> ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 192]<4> ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 224]<4> ubDNDI_RESP(6,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 256]<4> ubDNDI_RESP(6,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 1st field V + mov (8) r[a0.6, 160]<4> ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 192]<4> ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 224]<4> ubDNDI_RESP(6,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 256]<4> ubDNDI_RESP(6,48)<16;8,2> { NoDDChk } //Vpixels + +//save the previous frame +send (8) null<1>:d r18.0 0x5 0xA0A801B:ud + +//save the current frame +send (8) null<1>:d r23.0 0x5 0xA0A801E:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DN_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DN_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DN_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DN_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,513 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 114 // Total instruction count +// 1 // Total kernel count + +.kernel PA_DN_422CP +.code + + + +// FileName: DN_PA_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) for Packed format + + + +// FileName: DN.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x49E8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(4,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + + mov (2) mudMSGHDR_HIST(1)<1> udDNDI_RESP(4,0)<2;2,1> // Move denoise history to MRF (4x2) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x10003:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x50003:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | X | X | X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + //| X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + mov (1) mubMSGHDR_ENC_STATS(1,0)<1> ubDNDI_RESP(4,8)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,3)<1> uwDNDI_RESP(4,11)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,4)<1> uwDNDI_RESP(4,12)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,9)<1> uwDNDI_RESP(4,8)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,10)<1> uwDNDI_RESP(4,9)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Save_PA.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of DN output in Packed format + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 1024:w // Initial Y,U,V offset in YUV422 block; it starts at m14 + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +shl (1) mdMSGHDR_DN_OUT(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mdMSGHDR_DN_OUT(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x7001F:ud { NoDDChk } // block width and height (32x8) + + mov (16) r[a0.4,0]<2>:ub ubDNDI_RESP(0,0)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,32]<2>:ub ubDNDI_RESP(0,16)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,64]<2>:ub ubDNDI_RESP(0,32)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,96]<2>:ub ubDNDI_RESP(0,48)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,128]<2>:ub ubDNDI_RESP(0,64)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,160]<2>:ub ubDNDI_RESP(0,80)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,192]<2>:ub ubDNDI_RESP(0,96)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,224]<2>:ub ubDNDI_RESP(0,112)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) r[a0.5,0]<4>:ub ubDNDI_RESP(5,1)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,0]<4>:ub ubDNDI_RESP(5,0)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,32]<4>:ub ubDNDI_RESP(5,17)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,32]<4>:ub ubDNDI_RESP(5,16)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,64]<4>:ub ubDNDI_RESP(5,33)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,64]<4>:ub ubDNDI_RESP(5,32)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,96]<4>:ub ubDNDI_RESP(5,49)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,96]<4>:ub ubDNDI_RESP(5,48)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,128]<4>:ub ubDNDI_RESP(5,65)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,128]<4>:ub ubDNDI_RESP(5,64)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,160]<4>:ub ubDNDI_RESP(5,81)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,160]<4>:ub ubDNDI_RESP(5,80)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,192]<4>:ub ubDNDI_RESP(5,97)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,192]<4>:ub ubDNDI_RESP(5,96)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,224]<4>:ub ubDNDI_RESP(5,113)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,224]<4>:ub ubDNDI_RESP(5,112)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + +//send out data through data port +send (8) null<1>:d r31.0 0x5 0x120A8018:ud + + + +// FileName: DN_Save_422CP_16x8.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of DN output to the color pipe in 4-2-2 format + + +.declare mubMSGHDR_DN_OUT_2 Base=r36.0 ElementSize=1 Type=ub + + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +shl (1) mdMSGHDR_DN_OUT(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mdMSGHDR_DN_OUT(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x7000F:ud { NoDDClr, NoDDChk } // block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) mudMSGHDR_DN_OUT(0,3)<1> r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +// First 8 x 8 Block + mov (8) mubMSGHDR_DN_OUT(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(3)<2> ubDNDI_RESP(0,64)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(3,16)<2> ubDNDI_RESP(0,80)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(4)<2> ubDNDI_RESP(0,96)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(4,16)<2> ubDNDI_RESP(0,112)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(1,1)<4> ubDNDI_RESP(5,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(1,17)<4> ubDNDI_RESP(5,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(1,3)<4> ubDNDI_RESP(5,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(1,19)<4> ubDNDI_RESP(5,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,1)<4> ubDNDI_RESP(5,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,17)<4> ubDNDI_RESP(5,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(2,3)<4> ubDNDI_RESP(5,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,19)<4> ubDNDI_RESP(5,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,1)<4> ubDNDI_RESP(5,65)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,17)<4> ubDNDI_RESP(5,81)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(3,3)<4> ubDNDI_RESP(5,64)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,19)<4> ubDNDI_RESP(5,80)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,1)<4> ubDNDI_RESP(5,97)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,17)<4> ubDNDI_RESP(5,113)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(4,3)<4> ubDNDI_RESP(5,96)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,19)<4> ubDNDI_RESP(5,112)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Second 8 x 8 Block +mov (8) r36.0<1>:ud r31.0<8;8,1>:ud +add (1) r36.0<1>:ud r36.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DN_OUT_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(3)<2> ubDNDI_RESP(0,72)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(3,16)<2> ubDNDI_RESP(0,88)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(4)<2> ubDNDI_RESP(0,104)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(4,16)<2> ubDNDI_RESP(0,120)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(1,1)<4> ubDNDI_RESP(5,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(1,17)<4> ubDNDI_RESP(5,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(1,3)<4> ubDNDI_RESP(5,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(1,19)<4> ubDNDI_RESP(5,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,1)<4> ubDNDI_RESP(5,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,17)<4> ubDNDI_RESP(5,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(2,3)<4> ubDNDI_RESP(5,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,19)<4> ubDNDI_RESP(5,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,1)<4> ubDNDI_RESP(5,73)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,17)<4> ubDNDI_RESP(5,89)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(3,3)<4> ubDNDI_RESP(5,72)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,19)<4> ubDNDI_RESP(5,88)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,1)<4> ubDNDI_RESP(5,105)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,17)<4> ubDNDI_RESP(5,121)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(4,3)<4> ubDNDI_RESP(5,104)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,19)<4> ubDNDI_RESP(5,120)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +//send out data through data port +send (8) null<1>:d r31.0 0x5 0xA0A801B:ud +send (8) null<1>:d r36.0 0x5 0xA0A801B:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DNDI_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DNDI_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DNDI_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DNDI_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,559 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 127 // Total instruction count +// 1 // Total kernel count + +.kernel PA_DNDI_422CP +.code + + + +// FileName: DNDI_PL_Core.asm +// Author: Tatiya, Rupesh + + + +// FileName: DNDI_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN+DI case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4CE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + mov (1) mudMSGHDR_HIST(1)<1> udDNDI_RESP(9,0)<0;1,0> // Move denoise history to MRF (4x1) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x3:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save one 16x4 blocks of DN output in Packed format for reference + + + // check top/bottom field first +cmp.e.f0.0 (1) null<1>:w r1.28<0;1,0>:ub 1:w + +add (4) a0.4<1>:uw r4.0<4;4,1>:ub 1024:w // Initial Y,U,V offset in YUV422 block; it starts at m14 + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +shl (1) mdMSGHDR_DN_OUT(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mdMSGHDR_DN_OUT(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x3001F:ud { NoDDChk } // block width and height (32x8) + +(f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + mov (16) r[a0.4, 0]<2>:ub ubDNDI_RESP(10,0) { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (16) r[a0.4, 32]<2>:ub ubDNDI_RESP(4,16) { NoDDClr } // 1st field luma from current frame (line 1,3) + mov (16) r[a0.4, 64]<2>:ub ubDNDI_RESP(10,16) { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (16) r[a0.4, 96]<2>:ub ubDNDI_RESP(5,16) { NoDDClr } // 1st field luma from current frame (line 1,3) + mov (8) r[a0.5, 0]<4>:ub ubDNDI_RESP(11,1)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 0,2) + mov (8) r[a0.5, 32]<4>:ub ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 1,3) + mov (8) r[a0.5, 64]<4>:ub ubDNDI_RESP(11,17)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 0,2) + mov (8) r[a0.5, 96]<4>:ub ubDNDI_RESP(7,17)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 1,3) + mov (8) r[a0.6, 0]<4>:ub ubDNDI_RESP(11,0)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 0,2) + mov (8) r[a0.6, 32]<4>:ub ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } // 1st field U from current frame (line 1,3) + mov (8) r[a0.6, 64]<4>:ub ubDNDI_RESP(11,16)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 0,2) + mov (8) r[a0.6, 96]<4>:ub ubDNDI_RESP(7,16)<16;8,2> { NoDDChk } // 1st field U from current frame (line 1,3) +jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + mov (16) r[a0.4, 0]<2>:ub ubDNDI_RESP(4,0) { NoDDClr } // 1st field luma from current frame (line 0,2) + mov (16) r[a0.4, 32]<2>:ub ubDNDI_RESP(10,0) { NoDDClr } // 2nd field luma from current frame (line 1,3) + mov (16) r[a0.4, 64]<2>:ub ubDNDI_RESP(5,0) { NoDDClr } // 1st field luma from current frame (line 0,2) + mov (16) r[a0.4, 96]<2>:ub ubDNDI_RESP(10,16) { NoDDClr } // 2nd field luma from current frame (line 1,3) + mov (8) r[a0.5, 0]<4>:ub ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 0,2) + mov (8) r[a0.5, 32]<4>:ub ubDNDI_RESP(11,1)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 1,3) + mov (8) r[a0.5, 64]<4>:ub ubDNDI_RESP(7,1)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 0,2) + mov (8) r[a0.5, 96]<4>:ub ubDNDI_RESP(11,17)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 1,3) + mov (8) r[a0.6, 0]<4>:ub ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } // 1st field V from current frame (line 0,2) + mov (8) r[a0.6, 32]<4>:ub ubDNDI_RESP(11,0)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 1,3) + mov (8) r[a0.6, 64]<4>:ub ubDNDI_RESP(7,0)<16;8,2> { NoDDChk } // 1st field V from current frame (line 0,2) + mov (8) r[a0.6, 96]<4>:ub ubDNDI_RESP(11,16)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 1,3) + +SAVE_DN_CURR: +//send out data through data port +send (8) null<1>:d r31.0 0x5 0xA0A8018:ud + + + +// FileName: DI_Save_422CP_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in 422 format to Color Pipe (IECP) + + +.declare mubMSGHDR_DI_OUT1_1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT1_2 Base=r21.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_1 Base=r24.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_2 Base=r27.0 ElementSize=1 Type=ub + + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:ud r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:ud r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3000F:ud { NoDDClr, NoDDChk } // Block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) r27.3<1>:ud r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r24.0<1>:ud r27<8;8,1>:ud + + +// Pack 2nd field Y; First 8x4 block + mov (8) mubMSGHDR_DI_OUT1_1(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; First 8x4 block + mov (4) mubMSGHDR_DI_OUT1_1(1,1)<4> ubDNDI_RESP(2,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,17)<4> ubDNDI_RESP(2,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(1,3)<4> ubDNDI_RESP(2,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,19)<4> ubDNDI_RESP(2,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,1)<4> ubDNDI_RESP(2,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,17)<4> ubDNDI_RESP(2,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(2,3)<4> ubDNDI_RESP(2,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,19)<4> ubDNDI_RESP(2,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + + +// Pack 2nd field Y; Second 8x4 block +mov (8) r21.0<1>:ud r18.0<8;8,1>:ud +add (1) r21.0<1>:ud r21.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT1_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; Second 8x4 block + mov (4) mubMSGHDR_DI_OUT1_2(1,1)<4> ubDNDI_RESP(2,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,17)<4> ubDNDI_RESP(2,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(1,3)<4> ubDNDI_RESP(2,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,19)<4> ubDNDI_RESP(2,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,1)<4> ubDNDI_RESP(2,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,17)<4> ubDNDI_RESP(2,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(2,3)<4> ubDNDI_RESP(2,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,19)<4> ubDNDI_RESP(2,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r18.0 0x5 0x60A801B:ud +send (8) null<1>:d r21.0 0x5 0x60A801B:ud + +// Pack 1st field Y; 1st 8x4 block + mov (8) mubMSGHDR_DI_OUT2_1(1)<2> ubDNDI_RESP(4,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(1,16)<2> ubDNDI_RESP(4,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2)<2> ubDNDI_RESP(4,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2,16)<2> ubDNDI_RESP(4,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U,V; 1st 8x4 block + mov (4) mubMSGHDR_DI_OUT2_1(1,1)<4> ubDNDI_RESP(6,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,17)<4> ubDNDI_RESP(6,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(1,3)<4> ubDNDI_RESP(6,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,19)<4> ubDNDI_RESP(6,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,1)<4> ubDNDI_RESP(6,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,17)<4> ubDNDI_RESP(6,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(2,3)<4> ubDNDI_RESP(6,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,19)<4> ubDNDI_RESP(6,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Pack 1st field Y; 2nd 8x4 block +mov (8) r27.0<1>:ud r24.0<8;8,1>:ud +add (1) r27.0<1>:ud r27.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT2_2(1)<2> ubDNDI_RESP(4,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(1,16)<2> ubDNDI_RESP(4,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2)<2> ubDNDI_RESP(4,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2,16)<2> ubDNDI_RESP(4,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U, V; 2nd 8x4 block + mov (4) mubMSGHDR_DI_OUT2_2(1,1)<4> ubDNDI_RESP(6,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,17)<4> ubDNDI_RESP(6,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(1,3)<4> ubDNDI_RESP(6,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,19)<4> ubDNDI_RESP(6,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,1)<4> ubDNDI_RESP(6,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,17)<4> ubDNDI_RESP(6,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(2,3)<4> ubDNDI_RESP(6,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,19)<4> ubDNDI_RESP(6,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r24.0 0x5 0x60A801E:ud +send (8) null<1>:d r27.0 0x5 0x60A801E:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DNDI_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DNDI_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DNDI_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DNDI_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,497 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 97 // Total instruction count +// 1 // Total kernel count + +.kernel PA_DNDI_PA +.code + + + +// FileName: DNDI_PL_Core.asm +// Author: Tatiya, Rupesh + + + +// FileName: DNDI_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN+DI case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4CE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + mov (1) mudMSGHDR_HIST(1)<1> udDNDI_RESP(9,0)<0;1,0> // Move denoise history to MRF (4x1) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x3:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save one 16x4 blocks of DN output in Packed format for reference + + + // check top/bottom field first +cmp.e.f0.0 (1) null<1>:w r1.28<0;1,0>:ub 1:w + +add (4) a0.4<1>:uw r4.0<4;4,1>:ub 1024:w // Initial Y,U,V offset in YUV422 block; it starts at m14 + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +shl (1) mdMSGHDR_DN_OUT(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mdMSGHDR_DN_OUT(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x3001F:ud { NoDDChk } // block width and height (32x8) + +(f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + mov (16) r[a0.4, 0]<2>:ub ubDNDI_RESP(10,0) { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (16) r[a0.4, 32]<2>:ub ubDNDI_RESP(4,16) { NoDDClr } // 1st field luma from current frame (line 1,3) + mov (16) r[a0.4, 64]<2>:ub ubDNDI_RESP(10,16) { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (16) r[a0.4, 96]<2>:ub ubDNDI_RESP(5,16) { NoDDClr } // 1st field luma from current frame (line 1,3) + mov (8) r[a0.5, 0]<4>:ub ubDNDI_RESP(11,1)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 0,2) + mov (8) r[a0.5, 32]<4>:ub ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 1,3) + mov (8) r[a0.5, 64]<4>:ub ubDNDI_RESP(11,17)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 0,2) + mov (8) r[a0.5, 96]<4>:ub ubDNDI_RESP(7,17)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 1,3) + mov (8) r[a0.6, 0]<4>:ub ubDNDI_RESP(11,0)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 0,2) + mov (8) r[a0.6, 32]<4>:ub ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } // 1st field U from current frame (line 1,3) + mov (8) r[a0.6, 64]<4>:ub ubDNDI_RESP(11,16)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 0,2) + mov (8) r[a0.6, 96]<4>:ub ubDNDI_RESP(7,16)<16;8,2> { NoDDChk } // 1st field U from current frame (line 1,3) +jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + mov (16) r[a0.4, 0]<2>:ub ubDNDI_RESP(4,0) { NoDDClr } // 1st field luma from current frame (line 0,2) + mov (16) r[a0.4, 32]<2>:ub ubDNDI_RESP(10,0) { NoDDClr } // 2nd field luma from current frame (line 1,3) + mov (16) r[a0.4, 64]<2>:ub ubDNDI_RESP(5,0) { NoDDClr } // 1st field luma from current frame (line 0,2) + mov (16) r[a0.4, 96]<2>:ub ubDNDI_RESP(10,16) { NoDDClr } // 2nd field luma from current frame (line 1,3) + mov (8) r[a0.5, 0]<4>:ub ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 0,2) + mov (8) r[a0.5, 32]<4>:ub ubDNDI_RESP(11,1)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 1,3) + mov (8) r[a0.5, 64]<4>:ub ubDNDI_RESP(7,1)<16;8,2> { NoDDClr, NoDDChk } // 1st field U from current frame (line 0,2) + mov (8) r[a0.5, 96]<4>:ub ubDNDI_RESP(11,17)<16;8,2> { NoDDClr, NoDDChk } // 2nd field U from current frame (line 1,3) + mov (8) r[a0.6, 0]<4>:ub ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } // 1st field V from current frame (line 0,2) + mov (8) r[a0.6, 32]<4>:ub ubDNDI_RESP(11,0)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 1,3) + mov (8) r[a0.6, 64]<4>:ub ubDNDI_RESP(7,0)<16;8,2> { NoDDChk } // 1st field V from current frame (line 0,2) + mov (8) r[a0.6, 96]<4>:ub ubDNDI_RESP(11,16)<16;8,2> { NoDDChk } // 2nd field V from current frame (line 1,3) + +SAVE_DN_CURR: +//send out data through data port +send (8) null<1>:d r31.0 0x5 0xA0A8018:ud + + + +// FileName: DI_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in Packed format + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20 + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x8) + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r23.0<1>:ud r27<8;8,1>:ud + +// Pack 2nd field Y + mov (16) r[a0.4, 0]<2> ubDNDI_RESP(0,0) { NoDDClr } + mov (16) r[a0.4, 32]<2> ubDNDI_RESP(0,16) { NoDDClr } + mov (16) r[a0.4, 64]<2> ubDNDI_RESP(0,32) { NoDDClr } + mov (16) r[a0.4, 96]<2> ubDNDI_RESP(0,48) { NoDDClr } +// Pack 2nd field U + mov (8) r[a0.5, 0]<4> ubDNDI_RESP(2,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 32]<4> ubDNDI_RESP(2,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 64]<4> ubDNDI_RESP(2,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 96]<4> ubDNDI_RESP(2,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 2nd field V + mov (8) r[a0.6, 0]<4> ubDNDI_RESP(2,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 32]<4> ubDNDI_RESP(2,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 64]<4> ubDNDI_RESP(2,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 96]<4> ubDNDI_RESP(2,48)<16;8,2> { NoDDChk } //Vpixels + +// Pack 1st field Y + mov (16) r[a0.4, 160]<2> ubDNDI_RESP(4,0) { NoDDClr } + mov (16) r[a0.4, 192]<2> ubDNDI_RESP(4,16) { NoDDClr } + mov (16) r[a0.4, 224]<2> ubDNDI_RESP(4,32) { NoDDClr } + mov (16) r[a0.4, 256]<2> ubDNDI_RESP(4,48) { NoDDClr } +// Pack 1st field U + mov (8) r[a0.5, 160]<4> ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 192]<4> ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 224]<4> ubDNDI_RESP(6,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 256]<4> ubDNDI_RESP(6,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 1st field V + mov (8) r[a0.6, 160]<4> ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 192]<4> ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 224]<4> ubDNDI_RESP(6,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 256]<4> ubDNDI_RESP(6,48)<16;8,2> { NoDDChk } //Vpixels + +//save the previous frame +send (8) null<1>:d r18.0 0x5 0xA0A801B:ud + +//save the current frame +send (8) null<1>:d r23.0 0x5 0xA0A801E:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DN_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DN_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DN_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DN_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,425 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 57 // Total instruction count +// 1 // Total kernel count + +.kernel PA_DN_PA +.code + + + +// FileName: DN_PA_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) for Packed format + + + +// FileName: DN.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x49E8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(4,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + + mov (2) mudMSGHDR_HIST(1)<1> udDNDI_RESP(4,0)<2;2,1> // Move denoise history to MRF (4x2) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x10003:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x50003:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | X | X | X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + //| X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + mov (1) mubMSGHDR_ENC_STATS(1,0)<1> ubDNDI_RESP(4,8)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,3)<1> uwDNDI_RESP(4,11)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,4)<1> uwDNDI_RESP(4,12)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,9)<1> uwDNDI_RESP(4,8)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,10)<1> uwDNDI_RESP(4,9)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Save_PA.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of DN output in Packed format + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 1024:w // Initial Y,U,V offset in YUV422 block; it starts at m14 + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +shl (1) mdMSGHDR_DN_OUT(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mdMSGHDR_DN_OUT(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x7001F:ud { NoDDChk } // block width and height (32x8) + + mov (16) r[a0.4,0]<2>:ub ubDNDI_RESP(0,0)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,32]<2>:ub ubDNDI_RESP(0,16)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,64]<2>:ub ubDNDI_RESP(0,32)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,96]<2>:ub ubDNDI_RESP(0,48)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,128]<2>:ub ubDNDI_RESP(0,64)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,160]<2>:ub ubDNDI_RESP(0,80)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,192]<2>:ub ubDNDI_RESP(0,96)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (16) r[a0.4,224]<2>:ub ubDNDI_RESP(0,112)<16;16,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) r[a0.5,0]<4>:ub ubDNDI_RESP(5,1)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,0]<4>:ub ubDNDI_RESP(5,0)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,32]<4>:ub ubDNDI_RESP(5,17)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,32]<4>:ub ubDNDI_RESP(5,16)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,64]<4>:ub ubDNDI_RESP(5,33)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,64]<4>:ub ubDNDI_RESP(5,32)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,96]<4>:ub ubDNDI_RESP(5,49)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,96]<4>:ub ubDNDI_RESP(5,48)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,128]<4>:ub ubDNDI_RESP(5,65)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,128]<4>:ub ubDNDI_RESP(5,64)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,160]<4>:ub ubDNDI_RESP(5,81)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,160]<4>:ub ubDNDI_RESP(5,80)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,192]<4>:ub ubDNDI_RESP(5,97)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,192]<4>:ub ubDNDI_RESP(5,96)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (8) r[a0.5,224]<4>:ub ubDNDI_RESP(5,113)<16;8,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (8) r[a0.6,224]<4>:ub ubDNDI_RESP(5,112)<16;8,2> { NoDDChk } // copy line of V directly to memory as optimization + +//send out data through data port +send (8) null<1>:d r31.0 0x5 0x120A8018:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DNUV_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DNUV_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PA_DNUV_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PA_DNUV_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2726 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 1319 // Total instruction count +// 1 // Total kernel count + + +.kernel YUY2_DNUV_YUY2 +.code + + + +//Module : DN_UV_Setup +//Author : Tatiya, Rupesh +//Description : Initial Set-up for DN_UV + + + + +// Module name : ChromaDenoise.inc +// Author : Tatiya, Rupesh + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================================================== +//Interface for serpent mode Chroma Denoise, added by Le +//====================================================== +//r1 + + +//noise history thresholds (low and high) + + +//temporal difference thresholds (high and low) + + +//noise history thresholds (low and high) +//#define ubNoiseHistMaxHigh r1.22 +//#define ubNoiseHistMaxLow r1.23 +//#define ubNoiseHistDeltaHigh r1.24 +//#define ubNoiseHistDeltaLow r1.25 + +//Gaussian thresholds + + +//temporal difference thresholds (default) + + +//r2 +//history thresholds (default) + + +//denoise factor (0-63) + + +//====================== Binding table (Explicit To DNUV)========================================= +//Used by DN_UV kernels + + + //Pointer to Current Frame UV + + +//r1-r6 + //CURBE GRFs used as TEMP : Used for max computation and storing max temporarily. : r1-r6 + + + .declare ubCURBE_TEMP Base=r1.0 ElementSize=1 Type=ub + .declare uwCURBE_TEMP Base=r1.0 ElementSize=2 Type=uw + .declare wCURBE_TEMP Base=r1.0 ElementSize=2 Type=w + .declare fCURBE_TEMP Base=r1.0 ElementSize=4 Type=f + .declare udCURBE_TEMP Base=r1.0 ElementSize=4 Type=ud + .declare uwMAX_ABS_DIFF Base=r5.0 ElementSize=2 Type=uw + + //r1 + + + //r3 + + + //r4 + +//r7 + //All of the following has to defined in Same GRF for optimal performance. + + +//r8-24 + //Previous Frame UV + + .declare udPREV_UV Base=r8.0 ElementSize=4 Type=ud + .declare ubPREV_UV Base=r8.0 ElementSize=1 Type=ub + + +//r25-48 + //TEMP Space for any Usage. + + +//========================================================================= +//Definations and declarations for serpent mode Chroma Denoise, added by Le +//========================================================================= + + + .declare udGNE_UV Base=r24.0 ElementSize=4 Type=ud + .declare fGNE_UV Base=r24.0 ElementSize=4 Type=f + .declare ubGNE_UV Base=r24.0 ElementSize=1 Type=ub + + .declare udMSGHDR_BNE_SERP Base=r25.0 ElementSize=4 Type=ud + .declare udMSGSRC_BNE_SERP Base=r26.0 ElementSize=4 Type=ud + + + .declare ubDN_UV_Thresholds Base=r26.0 ElementSize=1 Type=ub + .declare ubDN_UV_Thresholds_Temp Base=r27.0 ElementSize=1 Type=ub + .declare udDN_UV_Thresholds Base=r26.0 ElementSize=4 Type=ud + .declare udDN_UV_Thresholds_Temp Base=r27.0 ElementSize=4 Type=ud + .declare fDN_UV_Thresholds Base=r26.0 ElementSize=4 Type=f + .declare fDN_UV_Thresholds_Temp Base=r27.0 ElementSize=4 Type=f + + +//==================================================================================== + + + //TEMP23: To hold V data for PL3 surfaces + .declare udCURR_V_TEMP Base=r25.0 ElementSize=4 Type=ud + .declare ubCURR_V_TEMP Base=r25.0 ElementSize=1 Type=ub + + //GRFs to calculate Median: r25-r42 + .declare ubMEDIAN_TEMP Base=r25.0 ElementSize=1 Type=ub + + //18 GRFs to hold difference : r25-r42 + .declare wDIFF Base=r25.0 ElementSize=2 Type=w + .declare uwDIFF Base=r25.0 ElementSize=2 Type=uw + + //Temporal Diff + .declare wDIFF_TEMPORAL Base=r25.0 ElementSize=2 Type=w + .declare ubDIFF_TEMPORAL Base=r25.0 ElementSize=1 Type=ub + + //4 GRFs to hold Sobel Value : r43-46 + .declare wSOBEL_X Base=r43.0 ElementSize=2 Type=w + .declare uwSOBEL Base=r43.0 ElementSize=2 Type=uw + + + //2 GRFs to hold SOAD temporarily: r47-48 + .declare uwSOAD Base=r47.0 ElementSize=2 Type=uw + + //Temp GRFs to hold extra YUYV pixels: r43-r48 + .declare ubTEMP5 Base=r43.0 ElementSize=1 Type=ub + + //Temp GRFs in Median Calculation: r47-r48 + .declare ubTEMP1 Base=r47.0 ElementSize=1 Type=ub + + .declare uwTEMP0 Base=r48.0 ElementSize=2 Type=uw + .declare ubTEMP0 Base=r48.0 ElementSize=1 Type=ub + + //Temp Space to store Median : r49-50 + + .declare ubMEDIAN Base=r49.0 ElementSize=1 Type=ub + +//r49 + + +//r50 + //Message Source + + +//r51 + //DN_UV History Surface + + .declare udHIST_UV Base=r51.0 ElementSize=4 Type=ud + .declare ubHIST_UV Base=r51.0 ElementSize=1 Type=ub + +//r52 - r91 + //r52 + //Current Frame UV + + + .declare udCURR_UV Base=r52.0 ElementSize=4 Type=ud + .declare ubCURR_UV Base=r52.0 ElementSize=1 Type=ub + + //r54 + //CURBE COPY + + + //r55 + + + .declare uwSOAD_MIN_8x4 Base=r56.0 ElementSize=2 Type=uw + + //r61 + + + //r62 + + + //History Surface Temp Origin + + + //r63 + //Current Frame Y Temp Origin + + + //BNE Surface Origin + + + //r70 + + .declare uwDIFF_TEMPORAL_SUM4x4 Base=r70.0 ElementSize=2 Type=uw //4 GRFs + + //r74-91 : For Saving Dest UV (PL2/PL3) + + + .declare ubMSGPAYLOAD_UV0 Base=r75.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_U Base=r75.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_UV1 Base=r84.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_V Base=r84.0 ElementSize=1 Type=ub + + //r90 + + .declare uwDIFF_TEMPORAL_SUM4x4_FINAL Base=r90.0 ElementSize=2 Type=uw //2 GRFs + +//r92-127 + //Current Frame Y + + + //r92 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_0 Base=r92 ElementSize=2 Type=uw + //r101 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_1 Base=r101 ElementSize=2 Type=uw + //r110 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_2 Base=r110 ElementSize=2 Type=uw + //r119 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_3 Base=r119 ElementSize=2 Type=uw + + .declare udCURR_Y0 Base=r93.0 ElementSize=4 Type=ud + .declare ubCURR_Y0 Base=r93.0 ElementSize=1 Type=ub + .declare udCURR_Y1 Base=r102.0 ElementSize=4 Type=ud + .declare ubCURR_Y1 Base=r102.0 ElementSize=1 Type=ub + .declare udCURR_Y2 Base=r111.0 ElementSize=4 Type=ud + .declare ubCURR_Y2 Base=r111.0 ElementSize=1 Type=ub + .declare udCURR_Y3 Base=r120.0 ElementSize=4 Type=ud + .declare ubCURR_Y3 Base=r120.0 ElementSize=1 Type=ub + + //r92: To hold U data for PL3 surfaces + .declare udCURR_U_TEMP Base=r92.0 ElementSize=4 Type=ud + .declare ubCURR_U_TEMP Base=r92.0 ElementSize=1 Type=ub + + //r112: To hold U data for PL3 surfaces + .declare udPREV_U_TEMP Base=r112.0 ElementSize=4 Type=ud + .declare ubPREV_U_TEMP Base=r112.0 ElementSize=1 Type=ub + + //r120: To hold U data for PL3 surfaces + .declare udPREV_V_TEMP Base=r120.0 ElementSize=4 Type=ud + .declare ubPREV_V_TEMP Base=r120.0 ElementSize=1 Type=ub + + + // Initialize message source with r0. + mov (8) r50.0<1>:ud r0.0<8;8,1>:ud + mov (8) r92.0<1>:ud r0.0<8;8,1>:ud + mov (8) r101.0<1>:ud r0.0<8;8,1>:ud + mov (8) r110.0<1>:ud r0.0<8;8,1>:ud + mov (8) r119.0<1>:ud r0.0<8;8,1>:ud + + + +//Module Name : DN_UV_YUY2_Load_Curr_Frame_YUV +//Author : Tatiya, Rupesh +//Description : Loads Current Frame YUV data for YUY2 input. + + + +//Module name : DN_UV_Load_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Current Frame (UV only). +// We need 4 extra rows (2 per field) and 2 extra pixel (1 each side) for both U and V each. +// The processing size is 16x16 U and V each. So we need : U size - 18x20, V size - 18x20, UV size - 36x20, YUYV size - 72x20. + + + + +//72x20 interleaved YUYV block is partitioned as follows: +// <------ 36 --------> <--------36 -------> +// ------------------------------------------ +// | | 32x2 B1 | 32x2 B2 | | +// | 4 |--------------------------------| 4 | +// | x | | | x | +// |20 | 32x8 A1 | 32x8 A3 | 20| +// | |---------------|----------------| | +// | C1| 32x8 A2 | 32x8 A4 | C2| +// | | | | | +// | |--------------------------------| | +// | | 32x2 B3 | 32x2 B4 | | +// ------------------------------------------ +// +// Cordinates: (x, y), (x, y+8), (x+32, y), (x+32, y+8), (x-4, y-2), (x+64, y-2),(x, y-2), (x+32, y-2), (x, y+16), (x+32, y+16) + + //UV surface origin: (2xORIX, ORIY) + add (2) r9.4<1>:w r9.0<2;2,1>:w r4.4<2;2,1>:w { AccWrEn } // Source Block origin + shl (1) r9.4<1>:w acc0.4<0;1,0>:w 1:w + + //A1 + mov (2) r92.0<1>:d r9.4<2;2,1>:w { AccWrEn } // Source Block origin + mov (1) r92.2<1>:ud 0x7001F:ud + send (8) udCURR_Y0(0)<1> r92 0x4 0x2890003:ud + + //A2 + mov (1) r101.0<1>:d acc0.0<0;1,0>:d + add (1) r101.1<1>:d acc0.1<0;1,0>:d 8:d + mov (1) r101.2<1>:ud 0x7001F:ud + send (8) udCURR_Y1(0)<1> r101 0x4 0x2890003:ud + + //B1 + mov (1) r50.0<1>:d acc0.0<0;1,0>:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d -2:d + mov (1) r50.2<1>:ud 0x1001F:ud + send (8) udCURR_UV(0)<1> r50 0x4 0x2290003:ud + + //B3 + mov (1) r50.0<1>:d acc0.0<0;1,0>:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d 16:d + send (8) udCURR_UV(18)<1> r50 0x4 0x2290003:ud + + //C1 + add (1) r50.0<1>:d acc0.0<0;1,0>:d -4:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d -2:d + mov (1) r50.2<1>:ud 0x130003:ud + send (8) ubTEMP5(0)<1> r50 0x4 0x2390003:ud + + //A3 + add (1) r110.0<1>:d acc0.0<0;1,0>:d 32:d + mov (1) r110.1<1>:d acc0.1<0;1,0>:d + mov (1) r110.2<1>:ud 0x7001F:ud + send (8) udCURR_Y2(0)<1> r110 0x4 0x2890003:ud + + //A4 + add (1) r119.0<1>:d acc0.0<0;1,0>:d 32:d + add (1) r119.1<1>:d acc0.1<0;1,0>:d 8:d + mov (1) r119.2<1>:ud 0x7001F:ud + send (8) udCURR_Y3(0)<1> r119 0x4 0x2890003:ud + + //B2 + add (1) r50.0<1>:d acc0.0<0;1,0>:d 32:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d -2:d + mov (1) r50.2<1>:ud 0x1001F:ud + send (8) udCURR_UV(20)<1> r50 0x4 0x2290003:ud + + //B4 + add (1) r50.0<1>:d acc0.0<0;1,0>:d 32:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d 16:d + send (8) udCURR_UV(38)<1> r50 0x4 0x2290003:ud + + //C2 + add (1) r50.0<1>:d acc0.0<0;1,0>:d 64:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d -2:d + mov (1) r50.2<1>:ud 0x130003:ud + send (8) ubTEMP5(3)<1> r50 0x4 0x2390003:ud + + //History Origin, Current Y origin and BNE surface origin - all are in inline GRF. Use , . -rT. + + //Calculate Origin For History Surface: (ORIX/4, ORIY/4) + shr (2) r9.2<1>:w r9.0<2;2,1>:w 2:w + + //Calculate Origin For BNE Surface: (ORIX/8, ORIY/8) + shr (2) r9.6<1>:w r9.0<2;2,1>:w 3:w + + + +//Module Name : DN_UV_YUY2_Load_Prev_Frame_YUV.asm +//Author : Tatiya, Rupesh +//Description : Loads Pevious Frame YUV data for YUY2 input. + + + +//Module Name : DN_UV_Load_Prev_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Prev Frame (UV only). U size - 16x16, V size - 16x16, UV size - 32x16, YUYV size - 64x16. + + + + + mov (2) r50.0<1>:d r9.4<2;2,1>:w { AccWrEn } // Source lock origin + mov (1) r50.2<1>:ud 0x7001F:ud // U/V block width and height (16x16) + send (8) udPREV_UV(0)<1> r50 0x4 0x2890000:ud + + add (1) r50.1<1>:ud acc0.1<0;1,0>:d 8:w // Add 16 to X origin + send (8) udPREV_UV(8)<1> r50 0x4 0x2890000:ud + + add (1) r50.0<1>:ud acc0.0<0;1,0>:d 32:w + mov (1) r50.1<1>:ud acc0.1<0;1,0>:d + send (8) udPREV_UV(16)<1> r50 0x4 0x2890000:ud + + add (1) r50.1<1>:ud acc0.0<0;1,0>:d 8:w + send (8) udPREV_UV(24)<1> r50 0x4 0x2890000:ud + + + //TODO - See if History loading can be combined with Prev Frame Load. - rT + + +//Module name : DN_UV_Load_Hist_UV +//Author : Tatiya, Rupesh +//Description : Load DN History for UV denoise. 4x4 for each U & V. + + + + + mov (2) r50.0<1>:d r9.2<2;2,1>:w + mov (1) r50.2<1>:ud 0x30007:ud + send (8) udHIST_UV(0)<1> r50 0x4 0x2190022:ud + + + +//Module Name: DN_UV_YUY2_Extract_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description: Extract UV data from current YUY2 frame. + +//72x20 interleaved YUYV block is partitioned as follows: +// <------ 36 --------> <--------36 -------> +// ------------------------------------------ +// | | 32x2 B1 | 32x2 B2 | | +// | 4 |--------------------------------| 4 | +// | x | | | x | +// |20 | 32x8 A1 | 32x8 A3 | 20| +// | |---------------|----------------| | +// | C1| 32x8 A2 | 32x8 A4 | C2| +// | | | | | +// | |--------------------------------| | +// | | 32x2 B3 | 32x2 B4 | | +// ------------------------------------------ + + // Set SRC pointers according to Input packing i.e. YUYV, YVYU, UYVY, VYUY + add (1) a0.0<1>:uw r4.1<0;1,0>:ub 2976:w //A1 + add (1) a0.1<1>:uw r4.1<0;1,0>:ub 3264:w //A2 + add (1) a0.2<1>:uw r4.1<0;1,0>:ub 3552:w //A3 + add (1) a0.3<1>:uw r4.1<0;1,0>:ub 3840:w //A4 + add (1) a0.4<1>:uw r4.1<0;1,0>:ub 1664:w //B1 + add (1) a0.5<1>:uw r4.1<0;1,0>:ub 2240:w //B3B2 + add (1) a0.6<1>:uw r4.1<0;1,0>:ub 2880:w //B4 + add (1) a0.7<1>:uw r4.1<0;1,0>:ub 1376:w //C1C2 + + //Left 20x20 UV : 16x16 UV (Original)+4 extra rows(2 per field on top/bottom)+4 extra pixels(2 on left/right) + + //A1 + mov (16) ubCURR_UV(2,2)<1> r[a0.0, 0]<32;16,2> + mov (16) ubCURR_UV(3,2)<1> r[a0.0, 32]<32;16,2> + mov (16) ubCURR_UV(4,2)<1> r[a0.0, 64]<32;16,2> + mov (16) ubCURR_UV(5,2)<1> r[a0.0, 96]<32;16,2> + mov (16) ubCURR_UV(6,2)<1> r[a0.0, 128]<32;16,2> + mov (16) ubCURR_UV(7,2)<1> r[a0.0, 160]<32;16,2> + mov (16) ubCURR_UV(8,2)<1> r[a0.0, 192]<32;16,2> + mov (16) ubCURR_UV(9,2)<1> r[a0.0, 224]<32;16,2> + + //A2 + mov (16) ubCURR_UV(10,2)<1> r[a0.1, 0]<32;16,2> + mov (16) ubCURR_UV(11,2)<1> r[a0.1, 32]<32;16,2> + mov (16) ubCURR_UV(12,2)<1> r[a0.1, 64]<32;16,2> + mov (16) ubCURR_UV(13,2)<1> r[a0.1, 96]<32;16,2> + mov (16) ubCURR_UV(14,2)<1> r[a0.1, 128]<32;16,2> + mov (16) ubCURR_UV(15,2)<1> r[a0.1, 160]<32;16,2> + mov (16) ubCURR_UV(16,2)<1> r[a0.1, 192]<32;16,2> + mov (16) ubCURR_UV(17,2)<1> r[a0.1, 224]<32;16,2> + + //B1 + mov (16) ubCURR_UV(0,2)<1> r[a0.4, 0]<32;16,2> + mov (16) ubCURR_UV(1,2)<1> r[a0.4, 32]<32;16,2> + + //B3 + mov (16) ubCURR_UV(18,2)<1> r[a0.5, 0]<32;16,2> + mov (16) ubCURR_UV(19,2)<1> r[a0.5, 32]<32;16,2> + + //TODO - Find a way to reduce this 40 SIMD2 instructions - rT + //C1 + mov (2) ubCURR_UV(0,0)<1> r[a0.7, 0]<4;2,2> + mov (2) ubCURR_UV(1,0)<1> r[a0.7, 4]<4;2,2> + mov (2) ubCURR_UV(2,0)<1> r[a0.7, 8]<4;2,2> + mov (2) ubCURR_UV(3,0)<1> r[a0.7, 12]<4;2,2> + mov (2) ubCURR_UV(4,0)<1> r[a0.7, 16]<4;2,2> + mov (2) ubCURR_UV(5,0)<1> r[a0.7, 20]<4;2,2> + mov (2) ubCURR_UV(6,0)<1> r[a0.7, 24]<4;2,2> + mov (2) ubCURR_UV(7,0)<1> r[a0.7, 28]<4;2,2> + mov (2) ubCURR_UV(8,0)<1> r[a0.7, 32]<4;2,2> + mov (2) ubCURR_UV(9,0)<1> r[a0.7, 36]<4;2,2> + mov (2) ubCURR_UV(10,0)<1> r[a0.7, 40]<4;2,2> + mov (2) ubCURR_UV(11,0)<1> r[a0.7, 44]<4;2,2> + mov (2) ubCURR_UV(12,0)<1> r[a0.7, 48]<4;2,2> + mov (2) ubCURR_UV(13,0)<1> r[a0.7, 52]<4;2,2> + mov (2) ubCURR_UV(14,0)<1> r[a0.7, 56]<4;2,2> + mov (2) ubCURR_UV(15,0)<1> r[a0.7, 60]<4;2,2> + mov (2) ubCURR_UV(16,0)<1> r[a0.7, 64]<4;2,2> + mov (2) ubCURR_UV(17,0)<1> r[a0.7, 68]<4;2,2> + mov (2) ubCURR_UV(18,0)<1> r[a0.7, 72]<4;2,2> + mov (2) ubCURR_UV(19,0)<1> r[a0.7, 76]<4;2,2> + + //2 right bytes from B2 - 2 rows + mov (2) ubCURR_UV(0,18)<1> r[a0.5, 64]<4;2,2> + mov (2) ubCURR_UV(1,18)<1> r[a0.5, 96]<4;2,2> + + //2 right bytes from A3 - 8 rows + mov (2) ubCURR_UV(2,18)<1> r[a0.2, 0]<4;2,2> + mov (2) ubCURR_UV(3,18)<1> r[a0.2, 32]<4;2,2> + mov (2) ubCURR_UV(4,18)<1> r[a0.2, 64]<4;2,2> + mov (2) ubCURR_UV(5,18)<1> r[a0.2, 96]<4;2,2> + mov (2) ubCURR_UV(6,18)<1> r[a0.2, 128]<4;2,2> + mov (2) ubCURR_UV(7,18)<1> r[a0.2, 160]<4;2,2> + mov (2) ubCURR_UV(8,18)<1> r[a0.2, 192]<4;2,2> + mov (2) ubCURR_UV(9,18)<1> r[a0.2, 224]<4;2,2> + + //2 right bytes from A4 - 8 rows + mov (2) ubCURR_UV(10,18)<1> r[a0.3, 0]<4;2,2> + mov (2) ubCURR_UV(11,18)<1> r[a0.3, 32]<4;2,2> + mov (2) ubCURR_UV(12,18)<1> r[a0.3, 64]<4;2,2> + mov (2) ubCURR_UV(13,18)<1> r[a0.3, 96]<4;2,2> + mov (2) ubCURR_UV(14,18)<1> r[a0.3, 128]<4;2,2> + mov (2) ubCURR_UV(15,18)<1> r[a0.3, 160]<4;2,2> + mov (2) ubCURR_UV(16,18)<1> r[a0.3, 192]<4;2,2> + mov (2) ubCURR_UV(17,18)<1> r[a0.3, 224]<4;2,2> + + //2 right bytes from B4 - 2 rows + mov (2) ubCURR_UV(18,18)<1> r[a0.6, 0]<4;2,2> + mov (2) ubCURR_UV(19,18)<1> r[a0.6, 32]<4;2,2> + + //Right 20x20 UV : 16x16 UV (Original)+4 extra rows(2 per field on top/bottom)+4 extra pixels(2 on left/right) + + //A3 + mov (16) ubCURR_UV(22,2)<1> r[a0.2, 0]<32;16,2> + mov (16) ubCURR_UV(23,2)<1> r[a0.2, 32]<32;16,2> + mov (16) ubCURR_UV(24,2)<1> r[a0.2, 64]<32;16,2> + mov (16) ubCURR_UV(25,2)<1> r[a0.2, 96]<32;16,2> + mov (16) ubCURR_UV(26,2)<1> r[a0.2, 128]<32;16,2> + mov (16) ubCURR_UV(27,2)<1> r[a0.2, 160]<32;16,2> + mov (16) ubCURR_UV(28,2)<1> r[a0.2, 192]<32;16,2> + mov (16) ubCURR_UV(29,2)<1> r[a0.2, 224]<32;16,2> + + //A4 + mov (16) ubCURR_UV(30,2)<1> r[a0.3, 0]<32;16,2> + mov (16) ubCURR_UV(31,2)<1> r[a0.3, 32]<32;16,2> + mov (16) ubCURR_UV(32,2)<1> r[a0.3, 64]<32;16,2> + mov (16) ubCURR_UV(33,2)<1> r[a0.3, 96]<32;16,2> + mov (16) ubCURR_UV(34,2)<1> r[a0.3, 128]<32;16,2> + mov (16) ubCURR_UV(35,2)<1> r[a0.3, 160]<32;16,2> + mov (16) ubCURR_UV(36,2)<1> r[a0.3, 192]<32;16,2> + mov (16) ubCURR_UV(37,2)<1> r[a0.3, 224]<32;16,2> + + //B2 + mov (16) ubCURR_UV(20,2)<1> r[a0.5, 64]<32;16,2> + mov (16) ubCURR_UV(21,2)<1> r[a0.5, 96]<32;16,2> + + //B4 + mov (16) ubCURR_UV(38,2)<1> r[a0.6, 0]<32;16,2> + mov (16) ubCURR_UV(39,2)<1> r[a0.6, 32]<32;16,2> + + //TODO - Find a way to reduce this 40 SIMD2 instructions - rT + //C2 + mov (2) ubCURR_UV(20,18)<1> r[a0.7, 96]<4;2,2> + mov (2) ubCURR_UV(21,18)<1> r[a0.7, 100]<4;2,2> + mov (2) ubCURR_UV(22,18)<1> r[a0.7, 104]<4;2,2> + mov (2) ubCURR_UV(23,18)<1> r[a0.7, 108]<4;2,2> + mov (2) ubCURR_UV(24,18)<1> r[a0.7, 112]<4;2,2> + mov (2) ubCURR_UV(25,18)<1> r[a0.7, 116]<4;2,2> + mov (2) ubCURR_UV(26,18)<1> r[a0.7, 120]<4;2,2> + mov (2) ubCURR_UV(27,18)<1> r[a0.7, 124]<4;2,2> + mov (2) ubCURR_UV(28,18)<1> r[a0.7, 128]<4;2,2> + mov (2) ubCURR_UV(29,18)<1> r[a0.7, 132]<4;2,2> + mov (2) ubCURR_UV(30,18)<1> r[a0.7, 136]<4;2,2> + mov (2) ubCURR_UV(31,18)<1> r[a0.7, 140]<4;2,2> + mov (2) ubCURR_UV(32,18)<1> r[a0.7, 144]<4;2,2> + mov (2) ubCURR_UV(33,18)<1> r[a0.7, 148]<4;2,2> + mov (2) ubCURR_UV(34,18)<1> r[a0.7, 152]<4;2,2> + mov (2) ubCURR_UV(35,18)<1> r[a0.7, 156]<4;2,2> + mov (2) ubCURR_UV(36,18)<1> r[a0.7, 160]<4;2,2> + mov (2) ubCURR_UV(37,18)<1> r[a0.7, 164]<4;2,2> + mov (2) ubCURR_UV(38,18)<1> r[a0.7, 168]<4;2,2> + mov (2) ubCURR_UV(39,18)<1> r[a0.7, 172]<4;2,2> + + //2 left bytes from B1 - 2 rows + mov (2) ubCURR_UV(20,0)<1> r[a0.4, 28]<4;2,2> + mov (2) ubCURR_UV(21,0)<1> r[a0.4, 60]<4;2,2> + + //2 left bytes from A1 - 8 rows + mov (2) ubCURR_UV(22,0)<1> r[a0.0, 28]<4;2,2> + mov (2) ubCURR_UV(23,0)<1> r[a0.0, 60]<4;2,2> + mov (2) ubCURR_UV(24,0)<1> r[a0.0, 92]<4;2,2> + mov (2) ubCURR_UV(25,0)<1> r[a0.0, 124]<4;2,2> + mov (2) ubCURR_UV(26,0)<1> r[a0.0, 156]<4;2,2> + mov (2) ubCURR_UV(27,0)<1> r[a0.0, 188]<4;2,2> + mov (2) ubCURR_UV(28,0)<1> r[a0.0, 220]<4;2,2> + mov (2) ubCURR_UV(29,0)<1> r[a0.0, 252]<4;2,2> + + //2 left bytes from A2 - 8 rows + mov (2) ubCURR_UV(30,0)<1> r[a0.1, 28]<4;2,2> + mov (2) ubCURR_UV(31,0)<1> r[a0.1, 60]<4;2,2> + mov (2) ubCURR_UV(32,0)<1> r[a0.1, 92]<4;2,2> + mov (2) ubCURR_UV(33,0)<1> r[a0.1, 124]<4;2,2> + mov (2) ubCURR_UV(34,0)<1> r[a0.1, 156]<4;2,2> + mov (2) ubCURR_UV(35,0)<1> r[a0.1, 188]<4;2,2> + mov (2) ubCURR_UV(36,0)<1> r[a0.1, 220]<4;2,2> + mov (2) ubCURR_UV(37,0)<1> r[a0.1, 252]<4;2,2> + + //2 left bytes from B3 - 2 rows + mov (2) ubCURR_UV(38,0)<1> r[a0.5, 28]<4;2,2> + mov (2) ubCURR_UV(39,0)<1> r[a0.5, 60]<4;2,2> + + + +// Module Name : DN_UV_YUY2_Extract_Prev_Frame_UV +// Author : Tatiya, Rupesh +// Description : Extract UV from previous frame YUY2. + + // Set SRC pointers according to Input packing i.e. YUYV, YVYU, UYVY, VYUY + add (1) a0.0<1>:uw r4.1<0;1,0>:ub 256:w + add (1) a0.1<1>:uw r4.1<0;1,0>:ub 768:w + + mov (16) ubPREV_UV(0,0)<1> r[a0.0, 0]<32;16,2>:ub + mov (16) ubPREV_UV(0,16)<1> r[a0.0, 32]<32;16,2>:ub + mov (16) ubPREV_UV(1,0)<1> r[a0.0, 64]<32;16,2>:ub + mov (16) ubPREV_UV(1,16)<1> r[a0.0, 96]<32;16,2>:ub + mov (16) ubPREV_UV(2,0)<1> r[a0.0, 128]<32;16,2>:ub + mov (16) ubPREV_UV(2,16)<1> r[a0.0, 160]<32;16,2>:ub + mov (16) ubPREV_UV(3,0)<1> r[a0.0, 192]<32;16,2>:ub + mov (16) ubPREV_UV(3,16)<1> r[a0.0, 224]<32;16,2>:ub + mov (16) ubPREV_UV(4,0)<1> r[a0.0, 256]<32;16,2>:ub + mov (16) ubPREV_UV(4,16)<1> r[a0.0, 288]<32;16,2>:ub + mov (16) ubPREV_UV(5,0)<1> r[a0.0, 320]<32;16,2>:ub + mov (16) ubPREV_UV(5,16)<1> r[a0.0, 352]<32;16,2>:ub + mov (16) ubPREV_UV(6,0)<1> r[a0.0, 384]<32;16,2>:ub + mov (16) ubPREV_UV(6,16)<1> r[a0.0, 416]<32;16,2>:ub + mov (16) ubPREV_UV(7,0)<1> r[a0.0, 448]<32;16,2>:ub + mov (16) ubPREV_UV(7,16)<1> r[a0.0, 480]<32;16,2>:ub + + mov (16) ubPREV_UV(8,0)<1> r[a0.1, 0]<32;16,2>:ub + mov (16) ubPREV_UV(8,16)<1> r[a0.1, 32]<32;16,2>:ub + mov (16) ubPREV_UV(9,0)<1> r[a0.1, 64]<32;16,2>:ub + mov (16) ubPREV_UV(9,16)<1> r[a0.1, 96]<32;16,2>:ub + mov (16) ubPREV_UV(10,0)<1> r[a0.1, 128]<32;16,2>:ub + mov (16) ubPREV_UV(10,16)<1> r[a0.1, 160]<32;16,2>:ub + mov (16) ubPREV_UV(11,0)<1> r[a0.1, 192]<32;16,2>:ub + mov (16) ubPREV_UV(11,16)<1> r[a0.1, 224]<32;16,2>:ub + mov (16) ubPREV_UV(12,0)<1> r[a0.1, 256]<32;16,2>:ub + mov (16) ubPREV_UV(12,16)<1> r[a0.1, 288]<32;16,2>:ub + mov (16) ubPREV_UV(13,0)<1> r[a0.1, 320]<32;16,2>:ub + mov (16) ubPREV_UV(13,16)<1> r[a0.1, 352]<32;16,2>:ub + mov (16) ubPREV_UV(14,0)<1> r[a0.1, 384]<32;16,2>:ub + mov (16) ubPREV_UV(14,16)<1> r[a0.1, 416]<32;16,2>:ub + mov (16) ubPREV_UV(15,0)<1> r[a0.1, 448]<32;16,2>:ub + mov (16) ubPREV_UV(15,16)<1> r[a0.1, 480]<32;16,2>:ub + + + +//Module Name : DN_UV_Noise_Detection_UV +//Author : Tatiya, Rupesh +//Description : Performs noise detection on 16x16 U and 16x16 V each. + + + +//Module Name : DN_UV_Move_CURBE_Inline_UV.asm +//Author : Tatiya, Rupesh + + + + + //Mov CURBE data to another space - so that it can be used as Temp Space --> r1 - r6 + mov (4) r54.28<1>:ub r2.28<4;4,1>:ub //Dest. YUY2 offset + mov (2) r54.5<1>:ud r4.0<4;2,2>:ud //Src YUY2 offset and Origin offset + mov (4) r55.28<1>:ub r1.0<4;4,1>:ub + + mov (8) r61.20<1>:ub r1.4<8;8,1>:ub + mov (4) r61.28<1>:ub r1.12<4;4,1>:ub + + //Move Inline Data to another space - so that it can be used as Temp Space --> r7 + mov (4) r62.10<1>:w r9.0<4;4,1>:w + mov (4) r63.10<1>:w r9.4<4;4,1>:w + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + mov (1) a0.0:uw 1664:uw + mov (1) a0.1:uw 1816:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 1792:uw + mov (1) a0.1:uw 1820:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 1920:uw + mov (1) a0.1:uw 1848:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2048:uw + mov (1) a0.1:uw 1852:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + mov (1) a0.0:uw 2304:uw + mov (1) a0.1:uw 1880:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2432:uw + mov (1) a0.1:uw 1884:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2560:uw + mov (1) a0.1:uw 1912:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2688:uw + mov (1) a0.1:uw 1916:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + +//Module : DN_UV_Noise_Reduction_UV +//Author : Tatiya, Rupesh +//Description : Performs Noise Reduction on 16x16 U and 16x16 V. +//Tasks : 1. Update weight history +// 2. Find if it block is motion block +// 3. Compute Denoised Pixel. + + + + +//History is 1+1 byte every 4x4 U and 4x4 V. + + cmp.l.f0.0 (16) null<1>:w ubHIST_UV(0,0)<16;16,1> r61.20<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w ubHIST_UV(0,0)<16;16,1> r61.22<0;2,1>:ub + + mov (16) uwCURBE_TEMP(0)<1> 0:w + mov (16) uwCURBE_TEMP(1)<1> 0:w + + //Compute diff betn curr and prev. - First 16 lines + // 8 lines here + add (16) wDIFF_TEMPORAL(0)<1> ubCURR_UV(2,2)<16;16,1> -ubPREV_UV(0,0)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(1)<1> ubCURR_UV(3,2)<16;16,1> -ubPREV_UV(0,16)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(2)<1> ubCURR_UV(4,2)<16;16,1> -ubPREV_UV(0,32)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(3)<1> ubCURR_UV(5,2)<16;16,1> -ubPREV_UV(0,48)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(4)<1> ubCURR_UV(6,2)<16;16,1> -ubPREV_UV(0,64)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(5)<1> ubCURR_UV(7,2)<16;16,1> -ubPREV_UV(0,80)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(6)<1> ubCURR_UV(8,2)<16;16,1> -ubPREV_UV(0,96)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(7)<1> ubCURR_UV(9,2)<16;16,1> -ubPREV_UV(0,112)<16;16,1> //Diff UV interleaved + + //Update WT HIST + (-f0.0) shr (16) uwCURBE_TEMP(0)<1> ubHIST_UV(0,0)<16;16,1> 1:w + (f1.0) add (16) uwCURBE_TEMP(2)<1> ubHIST_UV(0,0)<16;16,1> r61.24<0;2,1>:ub + (f0.0) mov (16) uwCURBE_TEMP(2)<1> r61.20<0;2,1>:ub + (-f0.0.anyv) mov (16) uwCURBE_TEMP(2)<1> ubHIST_UV(0,0)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w ubHIST_UV(0,16)<16;16,1> r61.20<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w ubHIST_UV(0,16)<16;16,1> r61.22<0;2,1>:ub + + //Compute diff betn curr and prev. - First 16 lines + // 8 more lines here + add (16) wDIFF_TEMPORAL(8)<1> ubCURR_UV(10,2)<16;16,1> -ubPREV_UV(0,128)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(9)<1> ubCURR_UV(11,2)<16;16,1> -ubPREV_UV(0,144)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(10)<1> ubCURR_UV(12,2)<16;16,1> -ubPREV_UV(0,160)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(11)<1> ubCURR_UV(13,2)<16;16,1> -ubPREV_UV(0,176)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(12)<1> ubCURR_UV(14,2)<16;16,1> -ubPREV_UV(0,192)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(13)<1> ubCURR_UV(15,2)<16;16,1> -ubPREV_UV(0,208)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(14)<1> ubCURR_UV(16,2)<16;16,1> -ubPREV_UV(0,224)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(15)<1> ubCURR_UV(17,2)<16;16,1> -ubPREV_UV(0,240)<16;16,1> //Diff UV interleaved + + (-f0.0) shr (16) uwCURBE_TEMP(1)<1> ubHIST_UV(0,16)<16;16,1> 1:w + (f1.0) add (16) uwCURBE_TEMP(3)<1> ubHIST_UV(0,16)<16;16,1> r61.24<0;2,1>:ub + (f0.0) mov (16) uwCURBE_TEMP(3)<1> r61.20<0;2,1>:ub + (-f0.0.anyv) mov(16) uwCURBE_TEMP(3)<1> ubHIST_UV(0,16)<16;16,1> + + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(0)<16;16,1> (abs)wDIFF_TEMPORAL(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(2)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(3)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(4)<16;16,1> (abs)wDIFF_TEMPORAL(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(6)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(7)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(8)<16;16,1> (abs)wDIFF_TEMPORAL(9)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(10)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(2)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(11)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(12)<16;16,1> (abs)wDIFF_TEMPORAL(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(14)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(3)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(15)<16;16,1> + +//Compute diff betn curr and prev. - Second 16 lines +//13 lines. + add (16) wDIFF_TEMPORAL(16)<1> ubCURR_UV(22,2)<16;16,1> -ubPREV_UV(8,0)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(17)<1> ubCURR_UV(23,2)<16;16,1> -ubPREV_UV(8,16)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(18)<1> ubCURR_UV(24,2)<16;16,1> -ubPREV_UV(8,32)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(19)<1> ubCURR_UV(25,2)<16;16,1> -ubPREV_UV(8,48)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(20)<1> ubCURR_UV(26,2)<16;16,1> -ubPREV_UV(8,64)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(21)<1> ubCURR_UV(27,2)<16;16,1> -ubPREV_UV(8,80)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(22)<1> ubCURR_UV(28,2)<16;16,1> -ubPREV_UV(8,96)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(23)<1> ubCURR_UV(29,2)<16;16,1> -ubPREV_UV(8,112)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(24)<1> ubCURR_UV(30,2)<16;16,1> -ubPREV_UV(8,128)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(25)<1> ubCURR_UV(31,2)<16;16,1> -ubPREV_UV(8,144)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(26)<1> ubCURR_UV(32,2)<16;16,1> -ubPREV_UV(8,160)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(27)<1> ubCURR_UV(33,2)<16;16,1> -ubPREV_UV(8,176)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(28)<1> ubCURR_UV(34,2)<16;16,1> -ubPREV_UV(8,192)<16;16,1> //Diff UV interleaved + +//3 more lines + add (16) wCURBE_TEMP(4)<1> ubCURR_UV(35,2)<16;16,1> -ubPREV_UV(8,208)<16;16,1> //Diff UV interleaved + add (16) wCURBE_TEMP(5)<1> ubCURR_UV(36,2)<16;16,1> -ubPREV_UV(8,224)<16;16,1> //Diff UV interleaved + add (16) wCURBE_TEMP(6)<1> ubCURR_UV(37,2)<16;16,1> -ubPREV_UV(8,240)<16;16,1> //Diff UV interleaved + + //16x4 to 8x4 - First 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> uwDIFF_TEMPORAL_SUM4x4(2,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(2,2)<4;2,1> + + //8x4 to 4x4 - First 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4_FINAL(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> { AccWrEn } + + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(16)<16;16,1> (abs)wDIFF_TEMPORAL(17)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(18)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(19)<16;16,1> + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(20)<16;16,1> (abs)wDIFF_TEMPORAL(21)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(22)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(23)<16;16,1> + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(24)<16;16,1> (abs)wDIFF_TEMPORAL(25)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(26)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(2)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(27)<16;16,1> + + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(28)<16;16,1> (abs)wCURBE_TEMP(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wCURBE_TEMP(5)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(3)<1> acc0.0<16;16,1>:uw (abs)wCURBE_TEMP(6)<16;16,1> + + //Find if block is motion block - First 16 lines + cmp.g.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_FINAL(0)<16;16,1> r61.26<0;2,1>:ub + + //Move TEMPORAL_SUM4x4 for SIMD16 use later. + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,0)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,2)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,4)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,6)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,8)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,10)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,12)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,14)<0;2,1> + + //Pick Appropriate Weight History Based on motion. - First 16 lines + (-f0.0) mov (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(2)<16;16,1> + + //Actual DN - First 16 lines + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(0)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(0)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(2,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(2,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(2,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,0)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,8)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(0)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(0)<1> ubCURR_UV(2,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(0)<1> wDIFF_TEMPORAL(0)<16;16,1> ubCURR_UV(2,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(1)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(1)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(3,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(3,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(3,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,16)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,24)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(1)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(1)<1> ubCURR_UV(3,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(1)<1> wDIFF_TEMPORAL(1)<16;16,1> ubCURR_UV(3,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(2)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(2)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(4,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(4,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(4,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,32)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,40)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(2)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(2)<1> ubCURR_UV(4,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(2)<1> wDIFF_TEMPORAL(2)<16;16,1> ubCURR_UV(4,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(3)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(3)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(5,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(5,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(5,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,48)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,56)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(3)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(3)<1> ubCURR_UV(5,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(3)<1> wDIFF_TEMPORAL(3)<16;16,1> ubCURR_UV(5,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(4)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(4)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(6,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(6,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(6,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,64)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,72)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(4)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(4)<1> ubCURR_UV(6,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(4)<1> wDIFF_TEMPORAL(4)<16;16,1> ubCURR_UV(6,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(5)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(5)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(7,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(7,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(7,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,80)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,88)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(5)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(5)<1> ubCURR_UV(7,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(5)<1> wDIFF_TEMPORAL(5)<16;16,1> ubCURR_UV(7,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(6)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(6)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(8,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(8,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(8,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,96)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,104)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(6)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(6)<1> ubCURR_UV(8,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(6)<1> wDIFF_TEMPORAL(6)<16;16,1> ubCURR_UV(8,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(7)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(7)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(9,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(9,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(9,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,112)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,120)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(7)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(7)<1> ubCURR_UV(9,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(7)<1> wDIFF_TEMPORAL(7)<16;16,1> ubCURR_UV(9,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(8)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(8)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(10,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(10,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(10,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,128)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,136)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(8)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(8)<1> ubCURR_UV(10,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(8)<1> wDIFF_TEMPORAL(8)<16;16,1> ubCURR_UV(10,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(9)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(9)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(11,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(11,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(11,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,144)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,152)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(9)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(9)<1> ubCURR_UV(11,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(9)<1> wDIFF_TEMPORAL(9)<16;16,1> ubCURR_UV(11,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(10)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(10)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(12,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(12,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(12,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,160)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,168)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(10)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(10)<1> ubCURR_UV(12,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(10)<1> wDIFF_TEMPORAL(10)<16;16,1> ubCURR_UV(12,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(11)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(11)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(13,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(13,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(13,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,176)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,184)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(11)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(11)<1> ubCURR_UV(13,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(11)<1> wDIFF_TEMPORAL(11)<16;16,1> ubCURR_UV(13,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(12)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(12)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(14,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(14,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(14,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,192)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,200)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(12)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(12)<1> ubCURR_UV(14,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(12)<1> wDIFF_TEMPORAL(12)<16;16,1> ubCURR_UV(14,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(13)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(13)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(15,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(15,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(15,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,208)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,216)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(13)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(13)<1> ubCURR_UV(15,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(13)<1> wDIFF_TEMPORAL(13)<16;16,1> ubCURR_UV(15,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(14)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(14)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(16,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(16,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(16,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,224)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,232)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(14)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(14)<1> ubCURR_UV(16,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(14)<1> wDIFF_TEMPORAL(14)<16;16,1> ubCURR_UV(16,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(15)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(15)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(17,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(17,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(17,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,240)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,248)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(15)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(15)<1> ubCURR_UV(17,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(15)<1> wDIFF_TEMPORAL(15)<16;16,1> ubCURR_UV(17,2)<16;16,1> + + + //16x4 to 8x4 - Second 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> uwDIFF_TEMPORAL_SUM4x4(2,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(2,2)<4;2,1> + + //8x4 to 4x4 - Second 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4_FINAL(1)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> { AccWrEn } + + //Find if block is motion block - Second 16 lines + cmp.g.f1.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_FINAL(1)<16;16,1> r61.26<0;2,1>:ub + + //Move TEMPORAL_SUM4x4 for SIMD16 use later. + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,0)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,2)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,4)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,6)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,8)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,10)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,12)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,14)<0;2,1> + + //Pick Appropriate Weight History Based on motion. - Second 16 lines + (-f1.0) mov (16) uwCURBE_TEMP(1)<1> uwCURBE_TEMP(3)<16;16,1> + + //Actual DN - Second 16 lines + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(16)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(16)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(22,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(22,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(22,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,0)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,8)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(16)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(16)<1> ubCURR_UV(22,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(16)<1> wDIFF_TEMPORAL(16)<16;16,1> ubCURR_UV(22,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(17)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(17)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(23,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(23,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(23,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,16)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,24)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(17)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(17)<1> ubCURR_UV(23,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(17)<1> wDIFF_TEMPORAL(17)<16;16,1> ubCURR_UV(23,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(18)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(18)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(24,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(24,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(24,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,32)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,40)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(18)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(18)<1> ubCURR_UV(24,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(18)<1> wDIFF_TEMPORAL(18)<16;16,1> ubCURR_UV(24,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(19)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(19)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(25,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(25,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(25,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,48)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,56)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(19)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(19)<1> ubCURR_UV(25,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(19)<1> wDIFF_TEMPORAL(19)<16;16,1> ubCURR_UV(25,2)<16;16,1> + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(20)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(20)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(26,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(26,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(26,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,64)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,72)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(20)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(20)<1> ubCURR_UV(26,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(20)<1> wDIFF_TEMPORAL(20)<16;16,1> ubCURR_UV(26,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(21)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(21)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(27,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(27,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(27,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,80)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,88)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(21)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(21)<1> ubCURR_UV(27,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(21)<1> wDIFF_TEMPORAL(21)<16;16,1> ubCURR_UV(27,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(22)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(22)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(28,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(28,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(28,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,96)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,104)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(22)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(22)<1> ubCURR_UV(28,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(22)<1> wDIFF_TEMPORAL(22)<16;16,1> ubCURR_UV(28,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(23)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(23)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(29,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(29,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(29,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,112)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,120)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(23)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(23)<1> ubCURR_UV(29,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(23)<1> wDIFF_TEMPORAL(23)<16;16,1> ubCURR_UV(29,2)<16;16,1> + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(24)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(24)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(30,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(30,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(30,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,128)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,136)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(24)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(24)<1> ubCURR_UV(30,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(24)<1> wDIFF_TEMPORAL(24)<16;16,1> ubCURR_UV(30,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(25)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(25)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(31,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(31,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(31,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,144)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,152)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(25)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(25)<1> ubCURR_UV(31,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(25)<1> wDIFF_TEMPORAL(25)<16;16,1> ubCURR_UV(31,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(26)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(26)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(32,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(32,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(32,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,160)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,168)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(26)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(26)<1> ubCURR_UV(32,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(26)<1> wDIFF_TEMPORAL(26)<16;16,1> ubCURR_UV(32,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(27)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(27)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(33,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(33,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(33,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,176)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,184)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(27)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(27)<1> ubCURR_UV(33,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(27)<1> wDIFF_TEMPORAL(27)<16;16,1> ubCURR_UV(33,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(28)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(28)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(34,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(34,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(34,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,192)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,200)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(28)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(28)<1> ubCURR_UV(34,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(28)<1> wDIFF_TEMPORAL(28)<16;16,1> ubCURR_UV(34,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(4)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(4)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(35,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(35,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(35,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,208)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,216)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(4)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(4)<1> ubCURR_UV(35,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(4)<1> wCURBE_TEMP(4)<16;16,1> ubCURR_UV(35,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(5)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(5)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(36,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(36,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(36,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,224)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,232)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(5)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(5)<1> ubCURR_UV(36,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(5)<1> wCURBE_TEMP(5)<16;16,1> ubCURR_UV(36,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(6)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(6)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(37,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(37,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(37,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,240)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,248)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(6)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(6)<1> ubCURR_UV(37,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(6)<1> wCURBE_TEMP(6)<16;16,1> ubCURR_UV(37,2)<16;16,1> + + //Pack Weight History WORD -> BYTE + mov (16) ubCURBE_TEMP(3,0)<1> ubCURBE_TEMP(0)<32;16,2> + mov (16) ubCURBE_TEMP(3,16)<1> ubCURBE_TEMP(1)<32;16,2> + + + +//Module Name : DN_UV_Compute_BNE_UV +//Author : Tatiya, Rupesh +//Description : Computes minimum SOAD for each 16x4 block. + + cmp.l.f0.0 (8) null:w uwSOAD_MIN_8x4(0,12)<16;4,1> uwSOAD_MIN_8x4(2,12)<16;4,1> + (f0.0)sel (8) uwCURBE_TEMP(1,0)<1> uwSOAD_MIN_8x4(0,12)<16;4,1> uwSOAD_MIN_8x4(2,12)<16;4,1> + + mov (8) ubCURBE_TEMP(1)<1> ubCURBE_TEMP(1)<16;8,2> + + + +//Module Name : DN_UV_YUY2_Pack_Denoised_UV +//Name : Tatiya, Rupesh +//Description : Pack UV denoised data based on YUY2 input. + + + +//Module Name : DN_UV_Pack_Denoised_UV +//Name : Tatiya, Rupesh +//Description : Pack UV denoised data based on PL2/PL3/PA. + + + add (1) a0.0<1>:uw r54.21<0;1,0>:ub 2976:w + add (1) a0.1<1>:uw r54.21<0;1,0>:ub 3264:w + add (1) a0.2<1>:uw r54.21<0;1,0>:ub 3552:w + add (1) a0.3<1>:uw r54.21<0;1,0>:ub 3840:w + +//First 8 lines. + mov (16) r[a0.0, 0]<2>:ub ubDIFF_TEMPORAL(0)<32;16,2> + mov (16) r[a0.0, 32]<2>:ub ubDIFF_TEMPORAL(1)<32;16,2> + mov (16) r[a0.0, 64]<2>:ub ubDIFF_TEMPORAL(2)<32;16,2> + mov (16) r[a0.0, 96]<2>:ub ubDIFF_TEMPORAL(3)<32;16,2> + mov (16) r[a0.0, 128]<2>:ub ubDIFF_TEMPORAL(4)<32;16,2> + mov (16) r[a0.0, 160]<2>:ub ubDIFF_TEMPORAL(5)<32;16,2> + mov (16) r[a0.0, 192]<2>:ub ubDIFF_TEMPORAL(6)<32;16,2> + mov (16) r[a0.0, 224]<2>:ub ubDIFF_TEMPORAL(7)<32;16,2> + +//Second 8 lines + mov (16) r[a0.1, 0]<2>:ub ubDIFF_TEMPORAL(8)<32;16,2> + mov (16) r[a0.1, 32]<2>:ub ubDIFF_TEMPORAL(9)<32;16,2> + mov (16) r[a0.1, 64]<2>:ub ubDIFF_TEMPORAL(10)<32;16,2> + mov (16) r[a0.1, 96]<2>:ub ubDIFF_TEMPORAL(11)<32;16,2> + mov (16) r[a0.1, 128]<2>:ub ubDIFF_TEMPORAL(12)<32;16,2> + mov (16) r[a0.1, 160]<2>:ub ubDIFF_TEMPORAL(13)<32;16,2> + mov (16) r[a0.1, 192]<2>:ub ubDIFF_TEMPORAL(14)<32;16,2> + mov (16) r[a0.1, 224]<2>:ub ubDIFF_TEMPORAL(15)<32;16,2> + +//Third 8 lines + mov (16) r[a0.2, 0]<2>:ub ubDIFF_TEMPORAL(16)<32;16,2> + mov (16) r[a0.2, 32]<2>:ub ubDIFF_TEMPORAL(17)<32;16,2> + mov (16) r[a0.2, 64]<2>:ub ubDIFF_TEMPORAL(18)<32;16,2> + mov (16) r[a0.2, 96]<2>:ub ubDIFF_TEMPORAL(19)<32;16,2> + mov (16) r[a0.2, 128]<2>:ub ubDIFF_TEMPORAL(20)<32;16,2> + mov (16) r[a0.2, 160]<2>:ub ubDIFF_TEMPORAL(21)<32;16,2> + mov (16) r[a0.2, 192]<2>:ub ubDIFF_TEMPORAL(22)<32;16,2> + mov (16) r[a0.2, 224]<2>:ub ubDIFF_TEMPORAL(23)<32;16,2> + +//Fourth 8 lines +//5 lines first + mov (16) r[a0.3, 0]<2>:ub ubDIFF_TEMPORAL(24)<32;16,2> + mov (16) r[a0.3, 32]<2>:ub ubDIFF_TEMPORAL(25)<32;16,2> + mov (16) r[a0.3, 64]<2>:ub ubDIFF_TEMPORAL(26)<32;16,2> + mov (16) r[a0.3, 96]<2>:ub ubDIFF_TEMPORAL(27)<32;16,2> + mov (16) r[a0.3, 128]<2>:ub ubDIFF_TEMPORAL(28)<32;16,2> + +//3 more lines + mov (16) r[a0.3, 160]<2>:ub ubCURBE_TEMP(4)<32;16,2> + mov (16) r[a0.3, 192]<2>:ub ubCURBE_TEMP(5)<32;16,2> + mov (16) r[a0.3, 224]<2>:ub ubCURBE_TEMP(6)<32;16,2> + + + //TODO - See if History saving can be combined with Curr Frame Save. - rT + + +//Module Name : DN_UV_Save_Hist_UV +//Author : Tatiya, Rupesh +//Description : Saves DN history for UV data. + + mov (8) r3.0<1>:ud r0.0<8;8,1>:ud + mov (2) r3.0<1>:d r62.12<2;2,1>:w + mov (1) r3.2<1>:d 0x30007:ud + + send (8) null<1>:d r3 0x5 0x40A8021:ud + + + +//Module Name : DN_UV_Save_BNE_UV +//Author : Tatiya, Rupesh +//Description : Saves BNE values for 16x16 U and 16x16 V. + + mov (8) r1.0<1>:ud r0.0<8;8,1>:ud + mov (2) r1.0<1>:d r63.12<2;2,1>:w + mov (1) r1.2<1>:d 0x10003:ud + + send (8) null<1>:d r1 0x5 0x40A8023:ud + + + +//Module Name : DN_UV_YUY2_Save_Curr_Frame_YUV +//Author : Tatiya, Rupesh + + + +//Module Name : DN_UV_Load_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Saves Y or YUY2 of Current frame. + + + + + mov (8) acc0.0<1>:ud r0.0<8;8,1>:ud + shl (1) r62.10<1>:w r62.10<0;1,0>:w 1:w + mov (1) acc0.0<1>:d r62.10<0;1,0>:w + mov (1) acc0.1<1>:d r62.11<0;1,0>:w + + mov (1) acc0.2<1>:d 0x7001F:ud + + mov (8) r92.0<1>:ud acc0.0<8;8,1>:ud + + mov (8) r101.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r110.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r119.0<1>:ud acc0.0<8;8,1>:ud + + add (1) r101.1<1>:d acc0.1<0;1,0>:d 8:d + + add (1) r110.0<1>:d acc0.0<0;1,0>:d 32:d + + add (1) r119.0<1>:d acc0.0<0;1,0>:d 32:d + add (1) r119.1<1>:d acc0.1<0;1,0>:d 8:d + + send (8) null<1>:d r92 0x5 0x120A8018:ud + send (8) null<1>:d r101 0x5 0x120A8018:ud + send (8) null<1>:d r110 0x5 0x120A8018:ud + send (8) null<1>:d r119 0x5 0x120A8018:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + + //All sub-routines here + + +// Module Name : Noise_Detection +// Author : Tatiya, Rupesh +// Description : Performs noise detection on 32 pixels of U (8x4) and 32 pixels of V (8x4). + +DN_UV_NOISE_DETECTION_UV: + +// Find Field Block Median +// +// Purpose : Find the median value of the nine pixels in the same field +// which are centered at current pixel. +// +// Works on 9 pixels centered at the current pixel +// NOTE: pixels are within same field. +// v4 - current pixel +// +// v2 v1 v0 +// * * * <--- Different field - not used +// v5 v4 v3 +// * * * <--- Different field - not used +// v8 v7 v6 + +// Algorithm to find median modifies the data. +// Copy the data needed to calculate median so the original source data stays intact. +// + +//TODO - Change Interleaved implementation to separated one if - , does not work on predication. - rT + +//Delete Later - rT +//mov (1) pCUR_UV:uw 52*32:uw + +// v0 +mov (16) ubMEDIAN_TEMP(0,0)<1> r[a0.0,0]<16;16,1> +// v0 +mov (16) ubMEDIAN_TEMP(0,16)<1> r[a0.0,32]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(1,0)<1> r[a0.0,2]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(1,16)<1> r[a0.0,34]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(2,0)<1> r[a0.0,4]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(2,16)<1> r[a0.0,36]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(3,0)<1> r[a0.0,64]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(3,16)<1> r[a0.0,96]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(4,0)<1> r[a0.0,66]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(4,16)<1> r[a0.0,98]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(5,0)<1> r[a0.0,68]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(5,16)<1> r[a0.0,100]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(6,0)<1> r[a0.0,128]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(6,16)<1> r[a0.0,160]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(7,0)<1> r[a0.0,130]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(7,16)<1> r[a0.0,162]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(8,0)<1> r[a0.0,132]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(8,16)<1> r[a0.0,164]<16;16,1> + +//TODO - Optimize one instruction here. +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw +// v0 +mov (16) ubMEDIAN_TEMP(9,0)<1> r[a0.0,0]<16;16,1> +// v0 +mov (16) ubMEDIAN_TEMP(9,16)<1> r[a0.0,32]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(10,0)<1> r[a0.0,2]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(10,16)<1> r[a0.0,34]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(11,0)<1> r[a0.0,4]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(11,16)<1> r[a0.0,36]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(12,0)<1> r[a0.0,64]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(12,16)<1> r[a0.0,96]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(13,0)<1> r[a0.0,66]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(13,16)<1> r[a0.0,98]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(14,0)<1> r[a0.0,68]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(14,16)<1> r[a0.0,100]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(15,0)<1> r[a0.0,128]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(15,16)<1> r[a0.0,160]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(16,0)<1> r[a0.0,130]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(16,16)<1> r[a0.0,162]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(17,0)<1> r[a0.0,132]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(17,16)<1> r[a0.0,164]<16;16,1> + +//TODO - Optimize one instruction here. +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw + +// MedianSwap +// +// MedianSwap(inOutLeft, inOutRight) +// { +// if (inOutLeft > inOutRight) +// { +// temp = inOutLeft +// inOutLeft = inOutRight +// inOutRight = temp +// } +// } + +// MedianSwap(v1, v2) - U +// MedianSwap(v4, v5) - U +// MedianSwap(v1, v2) - V +// MedianSwap(v4, v5) - V + +cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> +cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> +cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> +cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(1,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(1,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(1,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> +(f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> +(f1.0) mov (16) ubMEDIAN_TEMP(1,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> +(f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> +(f0.1) mov (16) ubMEDIAN_TEMP(5,0)<2> ubTEMP1(0,16)<16;16,1> +(f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(1,0)<16;16,1> +(f1.1) mov (16) ubMEDIAN_TEMP(5,1)<2> ubTEMP1(1,16)<16;16,1> + +// MedianSwap(v7, v8) - U +// MedianSwap(v0, v1) - U +// MedianSwap(v7, v8) - V +// MedianSwap(v0, v1) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(7,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(0,0)<32;16,2> ubMEDIAN_TEMP(1,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(7,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(0,1)<32;16,2> ubMEDIAN_TEMP(1,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(7,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(0,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(7,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(0,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(7,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(0,0)<2> ubMEDIAN_TEMP(1,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(7,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(0,1)<2> ubMEDIAN_TEMP(1,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(1,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(1,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v3, v4) - U + // MedianSwap(v6, v7) - U + // MedianSwap(v3, v4) - V + // MedianSwap(v6, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(3,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(6,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(3,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(6,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(3,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(6,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(3,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(6,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(3,0)<2> ubMEDIAN_TEMP(4,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(6,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(3,1)<2> ubMEDIAN_TEMP(4,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(6,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(7,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(4,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(7,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v1, v2) - U + // MedianSwap(v4, v5) - U + // MedianSwap(v1, v2) - V + // MedianSwap(v4, v5) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(1,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(1,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(1,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(1,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(5,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(5,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v7, v8) - U + // MedianSwap(v0, v3) - U + // MedianSwap(v7, v8) - V + // MedianSwap(v0, v3) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(7,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(0,0)<32;16,2> ubMEDIAN_TEMP(3,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(7,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(0,1)<32;16,2> ubMEDIAN_TEMP(3,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(7,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(0,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(7,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(0,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(7,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(0,0)<2> ubMEDIAN_TEMP(3,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(7,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(0,1)<2> ubMEDIAN_TEMP(3,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(3,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(3,1)<2> ubTEMP1(1,16)<16;16,1> + + // NOTE: + // Compare v0 to v6 to find the minimum. + // Store the minimum for future use. + //TODO - Find if MIN is needed. + //cmp.l.f0.0 (16) null:w ubMEDIAN_TEMP(%1+0,0)<32;16,2> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //cmp.l.f1.0 (16) null:w ubMEDIAN_TEMP(%1+0,1)<32;16,2> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + //(f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,0)<32;16,2> + //(f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,1)<32;16,2> + //(-f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //(-f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + + // MedianSwap(v5, v8) - U + // MedianSwap(v4, v7) - U + // MedianSwap(v5, v8) - V + // MedianSwap(v4, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(5,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(5,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(5,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(5,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(5,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(5,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(7,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(7,1)<2> ubTEMP1(1,16)<16;16,1> + +// NOTE: +// Compare v2 to v8 to find the maximum. +// Store the maximum for future use. + //TODO - Find if MAX is needed. +// cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(%1+2,0)<32;16,2> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +// cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(%1+2,1)<32;16,2> ubMEDIAN_TEMP(%1+8,1)<32;16,2> +//(f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,0)<32;16,2> +//(f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,1)<32;16,2> +//(-f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +//(-f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,1)<32;16,2> + +// MedianSwap(v3, v6) - U +// MedianSwap(v1, v4) - U +// MedianSwap(v3, v6) - V +// MedianSwap(v1, v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(3,0)<32;16,2> ubMEDIAN_TEMP(6,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(3,1)<32;16,2> ubMEDIAN_TEMP(6,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(6,0)<2> ubMEDIAN_TEMP(3,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(1,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(6,1)<2> ubMEDIAN_TEMP(3,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(1,1)<32;16,2> + + // MedianSwap(v2,v5) - U + // MedianSwap(v4,v7) - U + // MedianSwap(v2,v5) - V + // MedianSwap(v4,v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(2,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(2,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(0,16)<16;16,1> + + // MedianSwap(v6,v4) - U + // MedianSwap(v6,v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(6,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(6,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(6,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(6,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> +cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> +cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> +cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> +cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(10,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(10,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(10,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> +(f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> +(f1.0) mov (16) ubMEDIAN_TEMP(10,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> +(f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> +(f0.1) mov (16) ubMEDIAN_TEMP(14,0)<2> ubTEMP1(0,16)<16;16,1> +(f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(1,0)<16;16,1> +(f1.1) mov (16) ubMEDIAN_TEMP(14,1)<2> ubTEMP1(1,16)<16;16,1> + +// MedianSwap(v7, v8) - U +// MedianSwap(v0, v1) - U +// MedianSwap(v7, v8) - V +// MedianSwap(v0, v1) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(16,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(9,0)<32;16,2> ubMEDIAN_TEMP(10,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(16,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(9,1)<32;16,2> ubMEDIAN_TEMP(10,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(16,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(9,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(16,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(9,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(16,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(9,0)<2> ubMEDIAN_TEMP(10,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(16,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(9,1)<2> ubMEDIAN_TEMP(10,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(10,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(10,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v3, v4) - U + // MedianSwap(v6, v7) - U + // MedianSwap(v3, v4) - V + // MedianSwap(v6, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(12,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(15,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(12,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(15,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(12,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(15,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(12,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(15,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(12,0)<2> ubMEDIAN_TEMP(13,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(15,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(12,1)<2> ubMEDIAN_TEMP(13,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(15,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(16,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(13,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(16,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v1, v2) - U + // MedianSwap(v4, v5) - U + // MedianSwap(v1, v2) - V + // MedianSwap(v4, v5) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(10,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(10,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(10,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(10,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(14,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(14,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v7, v8) - U + // MedianSwap(v0, v3) - U + // MedianSwap(v7, v8) - V + // MedianSwap(v0, v3) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(16,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(9,0)<32;16,2> ubMEDIAN_TEMP(12,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(16,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(9,1)<32;16,2> ubMEDIAN_TEMP(12,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(16,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(9,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(16,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(9,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(16,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(9,0)<2> ubMEDIAN_TEMP(12,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(16,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(9,1)<2> ubMEDIAN_TEMP(12,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(12,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(12,1)<2> ubTEMP1(1,16)<16;16,1> + + // NOTE: + // Compare v0 to v6 to find the minimum. + // Store the minimum for future use. + //TODO - Find if MIN is needed. + //cmp.l.f0.0 (16) null:w ubMEDIAN_TEMP(%1+0,0)<32;16,2> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //cmp.l.f1.0 (16) null:w ubMEDIAN_TEMP(%1+0,1)<32;16,2> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + //(f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,0)<32;16,2> + //(f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,1)<32;16,2> + //(-f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //(-f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + + // MedianSwap(v5, v8) - U + // MedianSwap(v4, v7) - U + // MedianSwap(v5, v8) - V + // MedianSwap(v4, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(14,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(14,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(14,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(14,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(14,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(14,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(16,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(16,1)<2> ubTEMP1(1,16)<16;16,1> + +// NOTE: +// Compare v2 to v8 to find the maximum. +// Store the maximum for future use. + //TODO - Find if MAX is needed. +// cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(%1+2,0)<32;16,2> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +// cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(%1+2,1)<32;16,2> ubMEDIAN_TEMP(%1+8,1)<32;16,2> +//(f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,0)<32;16,2> +//(f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,1)<32;16,2> +//(-f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +//(-f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,1)<32;16,2> + +// MedianSwap(v3, v6) - U +// MedianSwap(v1, v4) - U +// MedianSwap(v3, v6) - V +// MedianSwap(v1, v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(12,0)<32;16,2> ubMEDIAN_TEMP(15,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(12,1)<32;16,2> ubMEDIAN_TEMP(15,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(15,0)<2> ubMEDIAN_TEMP(12,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(10,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(15,1)<2> ubMEDIAN_TEMP(12,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(10,1)<32;16,2> + + // MedianSwap(v2,v5) - U + // MedianSwap(v4,v7) - U + // MedianSwap(v2,v5) - V + // MedianSwap(v4,v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(11,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(11,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(0,16)<16;16,1> + + // MedianSwap(v6,v4) - U + // MedianSwap(v6,v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(15,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(15,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(15,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(15,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + +// Sobel Value calculation for the current pixel v4 +// v2 v1 v0 +// * * * <--- Different field - not used +// v5 v4 v3 +// * * * <--- Different field - not used +// v8 v7 v6 +// +// Gx = -v0 - 2*v3 - v6 + v2 + 2*v5 + v8 +// Gy = v0 + 2*v1 + v2 - v6 - 2*v7 - v8 +// +// Sobel = (|Gx| + |Gy|) >> 3 + +//TODO - Change Later - rT +add (1) a0.0:uw a0.0<0;1,0>:uw -128:uw + +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,132]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,0]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,4]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(0)<1> r[a0.0,68]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,164]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,32]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,36]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(1)<1> r[a0.0,100]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,196]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,192]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,68]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(2)<1> r[a0.0,132]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,228]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,224]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,100]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(3)<1> r[a0.0,164]<16;16,1>:ub 2:w + +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,2]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,0]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,132]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,4]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,130]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(0)<16;16,1> + +shr (16) uwSOBEL(0)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,34]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,32]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,164]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,36]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,162]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(1)<16;16,1> + +shr (16) uwSOBEL(1)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,66]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,196]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,68]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,192]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,194]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(2)<16;16,1> + +shr (16) uwSOBEL(2)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,98]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,228]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,100]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,224]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,226]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(3)<16;16,1> + +shr (16) uwSOBEL(3)<1> acc0.0<16;16,1>:uw 3:uw + +//Mov Median in CURBE_TEMP to free up temp space. +mov (16) ubMEDIAN(0,0)<1> ubMEDIAN_TEMP(4,0)<16;16,1> +mov (16) ubMEDIAN(0,16)<1> ubMEDIAN_TEMP(4,16)<16;16,1> +mov (16) ubMEDIAN(0,32)<1> ubMEDIAN_TEMP(13,0)<16;16,1> +mov (16) ubMEDIAN(0,48)<1> ubMEDIAN_TEMP(13,16)<16;16,1> + +// Find: +// absDiff = abs(ubCurY - ubMedian) +// Find the difference between pixel and median value. + +//Median is interleaved. So difference is also interleaved. + +//------------------------------------------------------------------------------------------ +//Process 16 U and 16 V pixels here and rest later. +// first row - v0,v1,v2 +add (16) wDIFF(0)<1> r[a0.0,0]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(1)<1> r[a0.0,2]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(2)<1> r[a0.0,4]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> + +// second row - v3,v4,v5 +add (16) wDIFF(3)<1> r[a0.0,64]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(4)<1> r[a0.0,66]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(5)<1> r[a0.0,68]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> + +// third row - v6,v7,v8 +add (16) wDIFF(6)<1> r[a0.0,128]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(7)<1> r[a0.0,130]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(8)<1> r[a0.0,132]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +// first row - v0,v1,v2 +add (16) wDIFF(9)<1> r[a0.0,32]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(10)<1> r[a0.0,34]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(11)<1> r[a0.0,36]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +// second row - v3,v4,v5 +add (16) wDIFF(12)<1> r[a0.0,96]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(13)<1> r[a0.0,98]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(14)<1> r[a0.0,100]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +// third row - v6,v7,v8 +add (16) wDIFF(15)<1> r[a0.0,160]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(16)<1> r[a0.0,162]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(17)<1> r[a0.0,164]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +//TODO - Change Later - rT +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw + +// Find sum of all absolute differences AND +// maximum absolute difference for 16 U and 16 V here. +//First 2 rows of 8x4 +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(2)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(3)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(6)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(7)<16;16,1> + add (16) uwSOAD(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF(8)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//------------ + //DIFF(0-7) is not needed here. Populate it. + // first row - v0,v1,v2 + add (16) wDIFF(0)<1> r[a0.0,0]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(1)<1> r[a0.0,2]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(2)<1> r[a0.0,4]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + + // second row - v3,v4,v5 + add (16) wDIFF(3)<1> r[a0.0,64]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(4)<1> r[a0.0,66]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(5)<1> r[a0.0,68]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + + // third row - v6,v7 + add (16) wDIFF(6)<1> r[a0.0,128]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(7)<1> r[a0.0,130]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> +//------------ + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(0)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> + +//------------ + //Load v8 - DIFF(8) + add (16) wDIFF(8)<1> r[a0.0,132]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> +//------------ +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(11)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(12)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(14)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(15)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(16)<16;16,1> + add (16) uwSOAD(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF(17)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//------------ + //DIFF(0-7) is not needed here. Populate it. + // first row - v0,v1,v2 + add (16) wDIFF(9)<1> r[a0.0,32]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(10)<1> r[a0.0,34]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(11)<1> r[a0.0,36]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + + // second row - v3,v4,v5 + add (16) wDIFF(12)<1> r[a0.0,96]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(13)<1> r[a0.0,98]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(14)<1> r[a0.0,100]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + + // third row - v6,v7 + add (16) wDIFF(15)<1> r[a0.0,160]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(16)<1> r[a0.0,162]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> +//------------ + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(1)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> + +//------------ + //Load v8 - DIFF(8) + add (16) wDIFF(17)<1> r[a0.0,164]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> +//------------ + +//if ((sobel_edge_measure < m_SobelEdgeThreshold) && ((block_max-block_min) < m_LocalDiffThreshold)) +// if (sigma_mb_min > sigma) +// sigma_mb_min = sigma; + +//NOTE: block_min is always zero as median is one of the value in 3x3 block. So no need o calculate it. +// So just do - +//if ((sobel_edge_measure < m_SobelEdgeThreshold) && ((block_max) < m_LocalDiffThreshold) && ( sigma < sigma_mb_min)) +// sigma_mb_min = sigma; + +//We are processing 32 bytes of U and 32 bytes of V - each of size 8x4. +//Compare first 8 bytes with max possible (255). +//Start above condition from second 8 bytes. + +//TODO - Change Later - rT +// mov (1) pCUR_MIN_SOAD_8x4:uw 1752:uw //r54.24:ub + +//First row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(0)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(0)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(0)<16;16,1> 255:uw +(f0.0) sel (16) uwSOBEL(0)<1> uwSOAD(0)<16;16,1> 255:uw + +//Second row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(1)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(1)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(1)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(1)<16;16,1> + +// Find sum of all absolute differences AND +// maximum absolute difference for 16 U and 16 V here. +//Second 2 rows of 8x4 +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(2)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(3)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(6)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(7)<16;16,1> + add (16) uwSOAD(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF(8)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(0)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(11)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(12)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(14)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(15)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(16)<16;16,1> + add (16) uwSOAD(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF(17)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(1)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> + +//Third row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(2)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(0)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(0)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(0)<16;16,1> + +//Fourth row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(3)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(1)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(1)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(1)<16;16,1> + + cmp.l.f0.0 (8) null:uw uwSOBEL(0,0)<8;8,1> uwSOBEL(0,8)<8;8,1> +(f0.0) sel (8) uwSOBEL(0)<1> uwSOBEL(0,0)<8;8,1> uwSOBEL(0,8)<8;8,1> + + cmp.l.f0.0 (4) null:uw uwSOBEL(0,0)<4;4,1> uwSOBEL(0,4)<4;4,1> +(f0.0) sel (4) uwSOBEL(0)<1> uwSOBEL(0,0)<4;4,1> uwSOBEL(0,4)<4;4,1> + + cmp.l.f0.0 (2) null:uw uwSOBEL(0,0)<2;2,1> uwSOBEL(0,2)<2;2,1> +(f0.0) sel (2) r[a0.1,0]<1>:uw uwSOBEL(0,0)<2;2,1> uwSOBEL(0,2)<2;2,1> + + + + + + +// End of common.inc + +mov (1) ip:ud r9.7<0;1,0>:d + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PA_TO_PL3 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_VYUA.g4a" +#include "PA_AVS_Buf_0.g4a" +#include "PA_AVS_Buf_1.g4a" +#include "PA_AVS_Buf_2.g4a" +#include "PA_AVS_Buf_3.g4a" +#include "Save_AVS_PA.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pa.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pa.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pa.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pa.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,677 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x000062ea }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006420 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000240 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082e2c, 0x0069005c, 0x03a003a0 }, + { 0x00000409, 0x23603da5, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x236401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x08000800 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000002 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000006 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000a }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000e }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pa.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pa.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pa.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pa.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,677 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x000062ea }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006420 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000048 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082e2c, 0x0069005c, 0x03a003a0 }, + { 0x00000409, 0x23603da5, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x236401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x08000800 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000002 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000006 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000a }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000e }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl2.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl2.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl2.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PA_TO_pl2 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_VYUA.g4a" +#include "PA_AVS_Buf_0.g4a" +#include "PA_AVS_Buf_1.g4a" +#include "PA_AVS_Buf_2.g4a" +#include "PA_AVS_Buf_3.g4a" +#include "Save_AVS_NV12.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl2.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl2.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl2.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl2.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,584 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x000062ea }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006420 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000240 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl2.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl2.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl2.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl2.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,584 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x000062ea }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006420 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000048 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PA_TO_PL3 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_VYUA.g4a" +#include "PA_AVS_Buf_0.g4a" +#include "PA_AVS_Buf_1.g4a" +#include "PA_AVS_Buf_2.g4a" +#include "PA_AVS_Buf_3.g4a" +#include "Save_AVS_PL3.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl3.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl3.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl3.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl3.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,587 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x000062ea }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006420 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000240 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00200408, 0x24a03da5, 0x00450120, 0x00010001 }, + { 0x00200408, 0x25c03da5, 0x00450120, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x00070007 }, + { 0x00000801, 0x25c80061, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24c80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x25e00231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x25e80231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24d00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24d80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x25f00231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x25f80231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24e00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24e80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x26000231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x26080231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24f00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24f80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x26100231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x26180231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8019 }, + { 0x05000031, 0x20000e24, 0x000005c0, 0x060a801a }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl3.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl3.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pa_to_pl3.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pa_to_pl3.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,587 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x000062ea }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006420 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000048 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00200408, 0x24a03da5, 0x00450120, 0x00010001 }, + { 0x00200408, 0x25c03da5, 0x00450120, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x00070007 }, + { 0x00000801, 0x25c80061, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24c80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x25e00231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x25e80231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24d00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24d80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x25f00231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x25f80231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24e00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24e80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x26000231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x26080231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24f00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24f80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x26100231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x26180231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8019 }, + { 0x05000031, 0x20000e24, 0x000005c0, 0x060a801a }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_0.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_0.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_0.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_0.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,564 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_0_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + mov (1) r25.7<1>:ud r9.7:ud { NoDDClr } + mov (1) r25.1<1>:ud r9.12:uw { NoDDChk } + + + // set the vertical block number + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL2_AVS_WA_DONE_L0_0_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL2_AVS_WA_DONE_L0_0_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_0(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x48EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_0(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_1.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_1.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_1.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_1.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,557 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 42 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_1.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 1 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_1_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + add (1) r25.1<1>:ud r9.12:uw 1:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL2_AVS_WA_DONE_L0_1_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL2_AVS_WA_DONE_L0_1_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_1(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x48EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_1(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_1_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_2.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_2.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_2.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_2.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,558 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 42 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_2.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 2 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_2_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + + add (1) r25.1<1>:ud r9.12:uw 2:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL2_AVS_WA_DONE_L0_2_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL2_AVS_WA_DONE_L0_2_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_2(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x48EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_2(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_2_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_3.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_3.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL2_AVS_Buf_3.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL2_AVS_Buf_3.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,558 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 42 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_3.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_3_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + + add (1) r25.1<1>:ud r9.12:uw 3:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL2_AVS_WA_DONE_L0_3_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL2_AVS_WA_DONE_L0_3_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + send (1) uwBUFFER_3(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x48EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_3(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_3_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL2_TO_PA +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL2.g4a" +#include "PL2_AVS_Buf_0.g4a" +#include "PL2_AVS_Buf_1.g4a" +#include "PL2_AVS_Buf_2.g4a" +#include "PL2_AVS_Buf_3.g4a" +#include "Save_AVS_PA.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pa.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pa.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pa.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pa.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,697 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000290 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082e2c, 0x0069005c, 0x03a003a0 }, + { 0x00000409, 0x23603da5, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x236401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x08000800 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000002 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000006 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000a }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000e }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pa.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pa.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pa.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pa.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,697 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000052 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082e2c, 0x0069005c, 0x03a003a0 }, + { 0x00000409, 0x23603da5, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x236401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x08000800 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000002 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000006 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000a }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000e }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl2.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl2.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl2.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL2_TO_PL2 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL2.g4a" +#include "PL2_AVS_Buf_0.g4a" +#include "PL2_AVS_Buf_1.g4a" +#include "PL2_AVS_Buf_2.g4a" +#include "PL2_AVS_Buf_3.g4a" +#include "Save_AVS_NV12.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl2.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl2.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl2.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl2.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,604 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000290 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl2.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl2.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl2.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl2.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,604 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000052 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL2_TO_PL3 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL2.g4a" +#include "PL2_AVS_Buf_0.g4a" +#include "PL2_AVS_Buf_1.g4a" +#include "PL2_AVS_Buf_2.g4a" +#include "PL2_AVS_Buf_3.g4a" +#include "Save_AVS_PL3.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl3.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl3.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl3.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl3.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,607 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000290 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00200408, 0x24a03da5, 0x00450120, 0x00010001 }, + { 0x00200408, 0x25c03da5, 0x00450120, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x00070007 }, + { 0x00000801, 0x25c80061, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24c80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x25e00231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x25e80231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24d00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24d80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x25f00231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x25f80231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24e00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24e80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x26000231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x26080231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24f00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24f80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x26100231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x26180231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8019 }, + { 0x05000031, 0x20000e24, 0x000005c0, 0x060a801a }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl3.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl3.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_pl3.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_pl3.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,607 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000052 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00200408, 0x24a03da5, 0x00450120, 0x00010001 }, + { 0x00200408, 0x25c03da5, 0x00450120, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x00070007 }, + { 0x00000801, 0x25c80061, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24c80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x25e00231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x25e80231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24d00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24d80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x25f00231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x25f80231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24e00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24e80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x26000231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x26080231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24f00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24f80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x26100231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x26180231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8019 }, + { 0x05000031, 0x20000e24, 0x000005c0, 0x060a801a }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_rgbx.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_rgbx.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_rgbx.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_rgbx.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: AVS +.kernel PL2_TO_PA +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL2.g4a" +#include "PL2_AVS_Buf_0.g4a" +#include "PL2_AVS_Buf_1.g4a" +#include "PL2_AVS_Buf_2.g4a" +#include "PL2_AVS_Buf_3.g4a" +#include "YUV_to_RGB.g4a" +#include "Save_AVS_RGBX.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_rgbx.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_rgbx.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_rgbx.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_rgbx.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,1180 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000290 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000280 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22000128, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 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{ 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x26e00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a01ca5, 0x00000360, 0x00000020 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x25c41ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x26e41ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x26e01ca5, 0x00000360, 0x00000020 }, + { 0x00400040, 0x22002d08, 0x00690208, 0x04000400 }, + { 0x00600001, 0x63a00231, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x63a10231, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x63a20231, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x63a30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63c00231, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x63c10231, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x63c20231, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x63c30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64c00231, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x64c10231, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x64c20231, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x64c30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64e00231, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x64e10231, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x64e20231, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x64e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63e00231, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x63e10231, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x63e20231, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x63e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64000231, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x64010231, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x64020231, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x64030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65000231, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x65010231, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x65020231, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x65030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65200231, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x65210231, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x65220231, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x65230231, 0x0000005f, 0x00000000 }, + { 0x05800031, 0x20000e24, 0x00000380, 0x0a0a8018 }, + { 0x05800031, 0x20000e24, 0x000004a0, 0x0a0a8018 }, + { 0x00400040, 0x22002d08, 0x00690208, 0x06000600 }, + { 0x00600001, 0x65e00231, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x65e10231, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x65e20231, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x65e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66000231, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x66010231, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x66020231, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x66030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67000231, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x67010231, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x67020231, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x67030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67200231, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x67210231, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x67220231, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x67230231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66200231, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x66210231, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x66220231, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x66230231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66400231, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x66410231, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x66420231, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x66430231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67400231, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x67410231, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x67420231, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x67430231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67600231, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x67610231, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x67620231, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x67630231, 0x0000005f, 0x00000000 }, + { 0x05800031, 0x20000e24, 0x000005c0, 0x0a0a8018 }, + { 0x05800031, 0x20000e24, 0x000006e0, 0x0a0a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_rgbx.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_rgbx.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl2_to_rgbx.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl2_to_rgbx.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,1180 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000052 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x048eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22000128, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0610231, 0x00cf05c0, 0x00000000 }, + { 0x00400040, 0x22002d28, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x2480023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0610231, 0x00cf05c0, 0x00000000 }, + { 0x00400040, 0x22002d28, 0x006902c0, 0x04000400 }, + { 0x00600001, 0x2480023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 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{ 0x00600001, 0x24c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0610231, 0x00cf05c0, 0x00000000 }, + { 0x00400040, 0x22002d28, 0x006902c0, 0x06000600 }, + { 0x00600001, 0x2480023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 0x002004c0, 0x000000fc }, + { 0x00800040, 0x250077bd, 0x00200500, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000e4 }, + { 0x80800048, 0x238077bd, 0x008d0500, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x000000f4 }, + { 0x80800048, 0x23c077bd, 0x008d0500, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d0480, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d04c0, 0x00000104 }, + { 0x80800048, 0x240077bd, 0x008d0500, 0x00000108 }, + { 0x00800041, 0x23807fbd, 0x008d0380, 0x437f0000 }, + { 0x00800041, 0x23c07fbd, 0x008d03c0, 0x437f0000 }, + { 0x00800041, 0x24007fbd, 0x008d0400, 0x437f0000 }, + { 0x00800001, 0x454003ad, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2480023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x24a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x24c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x24e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2500023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2520023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24807fbd, 0x00200480, 0x3b8080c4 }, + { 0x00800041, 0x24c07fbd, 0x002004c0, 0x3b8080c4 }, + { 0x00800041, 0x25007fbd, 0x00200500, 0x3b8080c4 }, + { 0x00800040, 0x248077bd, 0x00200480, 0x000000ec }, + { 0x00800040, 0x24c077bd, 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{ 0x00800001, 0xc0610231, 0x00cf05c0, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x000062ea }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x02800005, 0x20003d2c, 0x00000046, 0x00010001 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00010001, 0x22200109, 0x00000200, 0x00000000 }, + { 0x00010001, 0x22000108, 0x00000204, 0x00000000 }, + { 0x00010001, 0x22040128, 0x00000220, 0x00000000 }, + { 0x00000409, 0x23603da5, 0x00000120, 0x00020002 }, + { 0x00000c01, 0x236401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0003001f }, + { 0x00400001, 0x22080108, 0x00690200, 0x00000000 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x26e00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x23e00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25000021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x26200021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x27400021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a01ca5, 0x00000360, 0x00000020 }, + { 0x00000040, 0x25c41ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x26e41ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x26e01ca5, 0x00000360, 0x00000020 }, + { 0x00600001, 0x63a00231, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x63a10231, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x63a20231, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x63a30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63c00231, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x63c10231, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x63c20231, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x63c30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64c00231, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x64c10231, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x64c20231, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x64c30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64e00231, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x64e10231, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x64e20231, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x64e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63e00231, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x63e10231, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x63e20231, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x63e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64000231, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x64010231, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x64020231, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x64030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65000231, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x65010231, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x65020231, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x65030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65200231, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x65210231, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x65220231, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x65230231, 0x0000005f, 0x00000000 }, + { 0x05800031, 0x20000e24, 0x00000380, 0x0a0a8018 }, + { 0x05800031, 0x20000e24, 0x000004a0, 0x0a0a8018 }, + { 0x00400040, 0x22002d08, 0x00690208, 0x02000200 }, + { 0x00600001, 0x65e00231, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x65e10231, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x65e20231, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x65e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66000231, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x66010231, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x66020231, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x66030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67000231, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x67010231, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x67020231, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x67030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67200231, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x67210231, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x67220231, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x67230231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66200231, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x66210231, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x66220231, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x66230231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66400231, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x66410231, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x66420231, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x66430231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67400231, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x67410231, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x67420231, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x67430231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67600231, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x67610231, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x67620231, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x67630231, 0x0000005f, 0x00000000 }, + { 0x05800031, 0x20000e24, 0x000005c0, 0x0a0a8018 }, + { 0x05800031, 0x20000e24, 0x000006e0, 0x0a0a8018 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x26e00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a01ca5, 0x00000360, 0x00000020 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x25c41ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x26e41ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x26e01ca5, 0x00000360, 0x00000020 }, + { 0x00400040, 0x22002d08, 0x00690208, 0x04000400 }, + { 0x00600001, 0x63a00231, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x63a10231, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x63a20231, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x63a30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63c00231, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x63c10231, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x63c20231, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x63c30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64c00231, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x64c10231, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x64c20231, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x64c30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64e00231, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x64e10231, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x64e20231, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x64e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63e00231, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x63e10231, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x63e20231, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x63e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64000231, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x64010231, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x64020231, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x64030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65000231, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x65010231, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x65020231, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x65030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65200231, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x65210231, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x65220231, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x65230231, 0x0000005f, 0x00000000 }, + { 0x05800031, 0x20000e24, 0x00000380, 0x0a0a8018 }, + { 0x05800031, 0x20000e24, 0x000004a0, 0x0a0a8018 }, + { 0x00400040, 0x22002d08, 0x00690208, 0x06000600 }, + { 0x00600001, 0x65e00231, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x65e10231, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x65e20231, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x65e30231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66000231, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x66010231, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x66020231, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x66030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67000231, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x67010231, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x67020231, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x67030231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67200231, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x67210231, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x67220231, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x67230231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66200231, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x66210231, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x66220231, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x66230231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66400231, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x66410231, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x66420231, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x66430231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67400231, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x67410231, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x67420231, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x67430231, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67600231, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x67610231, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x67620231, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x67630231, 0x0000005f, 0x00000000 }, + { 0x05800031, 0x20000e24, 0x000005c0, 0x0a0a8018 }, + { 0x05800031, 0x20000e24, 0x000006e0, 0x0a0a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_0.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_0.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_0.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_0.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,571 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 47 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL3_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL3 data into Buffer 0 + + + +// FileName : PL3_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL3 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_0_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + mov (1) r25.7<1>:ud r9.7:ud { NoDDClr } + mov (1) r25.1<1>:ud r9.12:uw { NoDDChk } + + + // set the vertical block number + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL3_AVS_WA_DONE_L0_0_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL3_AVS_WA_DONE_L0_0_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + + send (1) uwBUFFER_0(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_0(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EBC02:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_0(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_1.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_1.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_1.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_1.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,564 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 45 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL3_AVS_Buf_1.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL3 data into Buffer 1 + + + +// FileName : PL3_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL3 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_1_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + add (1) r25.1<1>:ud r9.12:uw 1:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL3_AVS_WA_DONE_L0_1_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL3_AVS_WA_DONE_L0_1_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + + send (1) uwBUFFER_1(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_1(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EBC02:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_1(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_1_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_2.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_2.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_2.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_2.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,565 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 45 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL3_AVS_Buf_2.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL3 data into Buffer 2 + + + +// FileName : PL3_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL3 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_2_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + + add (1) r25.1<1>:ud r9.12:uw 2:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL3_AVS_WA_DONE_L0_2_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL3_AVS_WA_DONE_L0_2_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + + send (1) uwBUFFER_2(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_2(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EBC02:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_2(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_2_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_3.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_3.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_AVS_Buf_3.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_AVS_Buf_3.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,565 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 45 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL3_AVS_Buf_3.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL3 data into Buffer 3 + + + +// FileName : PL3_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL3 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //Check if layer is to be skipped + + + // f0.1 pre-computed in Set_Layer_0 + (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_3_ + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc + + mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + + add (1) r25.1<1>:ud r9.12:uw 3:ud + + + mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces + // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + // { + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + // } + // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + // { + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + // } + // else{ + // modified_u_coord = u_coord; + // } + // Where u_left = u – 2*du + 3*ddu for IEF On + // And u_left = u for IEF Off case + // + + // check whether Gen7 AVS WA is enabled, + mov (1) r14.8:uw f0.0:uw // save f0.0 + mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma + + and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw + (-f0.0)jmpi (1) GEN7_PL3_AVS_WA_DONE_L0_3_ + + // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula + + and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw + (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f + (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f + (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f + (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left + (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left + + and (1) r14.1:ud r2.3:uw 0xFFF8:uw + asr (1) r14.1:ud r14.1:ud 3:d + mov (1) r14.1:f r14.1:ud + + // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) + mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width + add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 + add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 + + //Check if the values are < 0 and account for (int) cast of negative numbers + + //(int)(u_left*width) + cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f + mov (1) r14.0:d r14.0:f + (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d + + //(int)(u_left*width + 5.0/256) + cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f + mov (1) r14.2:d r14.2:f + (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d + + //(int)(u_left*width + 255.0/256) + cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f + mov (1) r14.3:d r14.3:f + (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d + + mov (1) f0.0:uw 0:uw // clear flag + //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) + cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d + // modified_u_coord = u_coord – 5.0/(256*width); //floating point + (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f + //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) + (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d + // modified_u_coord = u_coord + 1.0/(256*width); //floating point + (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f + +GEN7_PL3_AVS_WA_DONE_L0_3_: + mov (1) f0.0:uw r14.8:uw // restore f0.0 + + + send (1) uwBUFFER_3(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB801:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_3(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EBC02:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_3(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_3_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DN_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DN_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DN_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DN_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,566 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 117 // Total instruction count +// 1 // Total kernel count + +.kernel PL3_DN_422CP +.code + + + +// FileName: DN_PL_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) for planar format + + + +// FileName: DN.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x45E8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(4,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + + mov (2) mudMSGHDR_HIST(1)<1> udDNDI_RESP(4,0)<2;2,1> // Move denoise history to MRF (4x2) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x10003:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x50003:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | X | X | X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + //| X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + mov (1) mubMSGHDR_ENC_STATS(1,0)<1> ubDNDI_RESP(4,8)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,3)<1> uwDNDI_RESP(4,11)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,4)<1> uwDNDI_RESP(4,12)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,9)<1> uwDNDI_RESP(4,8)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,10)<1> uwDNDI_RESP(4,9)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_IMC3_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Load_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + +//CHANGE : Read extra UV data to convert to 422. -rT +//we are reading extra data in ALL cases irrespective of whether upsampling is reqd or not later on, to keep things simple. + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (2) r27.0<1>:d r27.0<2;2,1>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x40007:ud { NoDDChk } // U/V block width and height (8x5) + mov (8) r36<1>:ud r27.0<8;8,1>:ud + mov (8) r38<1>:ud r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2290001:ud + send (8) udDNDI_UV_RESP(2)<1> r38 0x4 0x2290002:ud + + //Update Header for Save + mov (1) mudMSGHDR_UCOPY(0,2)<1> 0x30007:ud // U block width and height (8x4) + mov (1) mudMSGHDR_VCOPY(0,2)<1> 0x30007:ud // V block width and height (8x4) + + + +// FileName: DN_Save_Y_16x8.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of Y channel of DN output for reference + + +mov (8) mudDN_Y_OUT(0,0)<1> r0<8;8,1>:ud // message header +mov (2) mudDN_Y_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin +mov (1) mudDN_Y_OUT(0,2)<1> 0x7000F:ud { NoDDChk } // block width and height (16x8) + +//send out data through data port +send (8) null<1>:d mudDN_Y_OUT 0x5 0xA0A8018:ud + + + +// FileName: DN_Save_UV_IMC3_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Save_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + +//Reuse the header from Load component +//Header is modified at the end of load - to be usable for save. + + + mov (8) mudMSGHDR_UCOPY(1)<1> udDNDI_UV_RESP(0)<8;8,1> + mov (8) mudMSGHDR_VCOPY(1)<1> udDNDI_UV_RESP(2)<8;8,1> + send (4) null<1>:d r36 0x5 0x40A8019:ud + send (4) null<1>:d r38 0x5 0x40A801A:ud + + + +// FileName: DN_Upsample_UV_IMC3_16x8.asm +// Author: Tatiya, Rupesh +// Description: Upconvert 420 UV to 422 + + + +// FileName: UVCopy_Upsample_UV_16x8.asm +// Author: Tatiya, Rupesh +// Description: Convert 42X UV to 422 - to be used for IECP. + + + avg.sat (16) uwDNDI_UVCOPY_TEMP(0) ubDNDI_UV_RESP(0,0)<0;8,1> ubDNDI_UV_RESP(0,0)<8;8,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(4) ubDNDI_UV_RESP(2,0)<0;8,1> ubDNDI_UV_RESP(2,0)<8;8,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(1) ubDNDI_UV_RESP(0,8)<0;8,1> ubDNDI_UV_RESP(0,8)<8;8,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(5) ubDNDI_UV_RESP(2,8)<0;8,1> ubDNDI_UV_RESP(2,8)<8;8,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(2) ubDNDI_UV_RESP(0,16)<0;8,1> ubDNDI_UV_RESP(0,16)<8;8,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(6) ubDNDI_UV_RESP(2,16)<0;8,1> ubDNDI_UV_RESP(2,16)<8;8,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(3) ubDNDI_UV_RESP(0,24)<0;8,1> ubDNDI_UV_RESP(0,24)<8;8,1> + avg.sat (16) uwDNDI_UVCOPY_TEMP(7) ubDNDI_UV_RESP(2,24)<0;8,1> ubDNDI_UV_RESP(2,24)<8;8,1> + + mov (16) ubDNDI_RESP(5, 1)<2> ubDNDI_UVCOPY_TEMP(0,0)<32;16,2> { NoDDClr } + mov (16) ubDNDI_RESP(5, 0)<2> ubDNDI_UVCOPY_TEMP(4,0)<32;16,2> { NoDDChk } + mov (16) ubDNDI_RESP(5, 33)<2> ubDNDI_UVCOPY_TEMP(1,0)<32;16,2> { NoDDClr } + mov (16) ubDNDI_RESP(5, 32)<2> ubDNDI_UVCOPY_TEMP(5,0)<32;16,2> { NoDDChk } + mov (16) ubDNDI_RESP(5, 65)<2> ubDNDI_UVCOPY_TEMP(2,0)<32;16,2> { NoDDClr } + mov (16) ubDNDI_RESP(5, 64)<2> ubDNDI_UVCOPY_TEMP(6,0)<32;16,2> { NoDDChk } + mov (16) ubDNDI_RESP(5, 97)<2> ubDNDI_UVCOPY_TEMP(3,0)<32;16,2> { NoDDClr } + mov (16) ubDNDI_RESP(5, 96)<2> ubDNDI_UVCOPY_TEMP(7,0)<32;16,2> { NoDDChk } + + + +// FileName: DN_Save_422CP_16x8.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of DN output to the color pipe in 4-2-2 format + + +.declare mubMSGHDR_DN_OUT_2 Base=r36.0 ElementSize=1 Type=ub + + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +shl (1) mdMSGHDR_DN_OUT(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mdMSGHDR_DN_OUT(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x7000F:ud { NoDDClr, NoDDChk } // block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) mudMSGHDR_DN_OUT(0,3)<1> r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +// First 8 x 8 Block + mov (8) mubMSGHDR_DN_OUT(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(3)<2> ubDNDI_RESP(0,64)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(3,16)<2> ubDNDI_RESP(0,80)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(4)<2> ubDNDI_RESP(0,96)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT(4,16)<2> ubDNDI_RESP(0,112)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(1,1)<4> ubDNDI_RESP(5,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(1,17)<4> ubDNDI_RESP(5,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(1,3)<4> ubDNDI_RESP(5,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(1,19)<4> ubDNDI_RESP(5,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,1)<4> ubDNDI_RESP(5,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,17)<4> ubDNDI_RESP(5,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(2,3)<4> ubDNDI_RESP(5,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(2,19)<4> ubDNDI_RESP(5,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,1)<4> ubDNDI_RESP(5,65)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,17)<4> ubDNDI_RESP(5,81)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(3,3)<4> ubDNDI_RESP(5,64)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(3,19)<4> ubDNDI_RESP(5,80)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,1)<4> ubDNDI_RESP(5,97)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,17)<4> ubDNDI_RESP(5,113)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT(4,3)<4> ubDNDI_RESP(5,96)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT(4,19)<4> ubDNDI_RESP(5,112)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Second 8 x 8 Block +mov (8) r36.0<1>:ud r31.0<8;8,1>:ud +add (1) r36.0<1>:ud r36.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DN_OUT_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(3)<2> ubDNDI_RESP(0,72)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(3,16)<2> ubDNDI_RESP(0,88)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(4)<2> ubDNDI_RESP(0,104)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DN_OUT_2(4,16)<2> ubDNDI_RESP(0,120)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(1,1)<4> ubDNDI_RESP(5,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(1,17)<4> ubDNDI_RESP(5,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(1,3)<4> ubDNDI_RESP(5,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(1,19)<4> ubDNDI_RESP(5,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,1)<4> ubDNDI_RESP(5,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,17)<4> ubDNDI_RESP(5,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(2,3)<4> ubDNDI_RESP(5,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(2,19)<4> ubDNDI_RESP(5,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,1)<4> ubDNDI_RESP(5,73)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,17)<4> ubDNDI_RESP(5,89)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(3,3)<4> ubDNDI_RESP(5,72)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(3,19)<4> ubDNDI_RESP(5,88)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,1)<4> ubDNDI_RESP(5,105)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,17)<4> ubDNDI_RESP(5,121)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DN_OUT_2(4,3)<4> ubDNDI_RESP(5,104)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DN_OUT_2(4,19)<4> ubDNDI_RESP(5,120)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +//send out data through data port +send (8) null<1>:d r31.0 0x5 0xA0A801B:ud +send (8) null<1>:d r36.0 0x5 0xA0A801B:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DNDI_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DNDI_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DNDI_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DNDI_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,584 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 120 // Total instruction count +// 1 // Total kernel count + +.kernel PL3_DNDI_422CP +.code + + + +// FileName: DNDI_PL_Core.asm +// Author: Tatiya, Rupesh + + + +// FileName: DNDI_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN+DI case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4BE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + mov (1) mudMSGHDR_HIST(1)<1> udDNDI_RESP(9,0)<0;1,0> // Move denoise history to MRF (4x1) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x3:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_IMC3_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Load_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (2) r27.0<1>:d r27.0<2;2,1>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x10007:ud { NoDDChk } // U/V block width and height (8x2) + mov (8) r36<1>:ud r27.0<8;8,1>:ud + mov (8) r38<1>:ud r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2190001:ud + send (8) udDNDI_UV_RESP(1)<1> r38 0x4 0x2190002:ud + + + +// FileName: DN_Save_Y_16x4.asm +// Author: Vivek Kumar +// Description: Save one 16x4 blocks of Y channel of DN output for reference + + + // check top/bottom field first +cmp.e.f0.0 (1) null<1>:w r1.28<0;1,0>:ub 1:w + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +mov (2) mdMSGHDR_DN_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x3000F:ud { NoDDChk } // block width and height (32x8) + +(f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(4,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(5,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(4,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(5,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + +SAVE_DN_CURR: +//send out data through data port +send (8) null<1>:d r31.0 0x5 0x60A8018:ud + + + +// FileName: DI_Save_422CP_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in 422 format to Color Pipe (IECP) + + +.declare mubMSGHDR_DI_OUT1_1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT1_2 Base=r21.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_1 Base=r24.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_2 Base=r27.0 ElementSize=1 Type=ub + + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:ud r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:ud r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3000F:ud { NoDDClr, NoDDChk } // Block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) r27.3<1>:ud r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r24.0<1>:ud r27<8;8,1>:ud + + +// Pack 2nd field Y; First 8x4 block + mov (8) mubMSGHDR_DI_OUT1_1(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; First 8x4 block + mov (4) mubMSGHDR_DI_OUT1_1(1,1)<4> ubDNDI_RESP(2,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,17)<4> ubDNDI_RESP(2,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(1,3)<4> ubDNDI_RESP(2,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,19)<4> ubDNDI_RESP(2,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,1)<4> ubDNDI_RESP(2,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,17)<4> ubDNDI_RESP(2,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(2,3)<4> ubDNDI_RESP(2,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,19)<4> ubDNDI_RESP(2,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + + +// Pack 2nd field Y; Second 8x4 block +mov (8) r21.0<1>:ud r18.0<8;8,1>:ud +add (1) r21.0<1>:ud r21.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT1_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; Second 8x4 block + mov (4) mubMSGHDR_DI_OUT1_2(1,1)<4> ubDNDI_RESP(2,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,17)<4> ubDNDI_RESP(2,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(1,3)<4> ubDNDI_RESP(2,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,19)<4> ubDNDI_RESP(2,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,1)<4> ubDNDI_RESP(2,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,17)<4> ubDNDI_RESP(2,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(2,3)<4> ubDNDI_RESP(2,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,19)<4> ubDNDI_RESP(2,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r18.0 0x5 0x60A801B:ud +send (8) null<1>:d r21.0 0x5 0x60A801B:ud + +// Pack 1st field Y; 1st 8x4 block + mov (8) mubMSGHDR_DI_OUT2_1(1)<2> ubDNDI_RESP(4,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(1,16)<2> ubDNDI_RESP(4,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2)<2> ubDNDI_RESP(4,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2,16)<2> ubDNDI_RESP(4,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U,V; 1st 8x4 block + mov (4) mubMSGHDR_DI_OUT2_1(1,1)<4> ubDNDI_RESP(6,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,17)<4> ubDNDI_RESP(6,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(1,3)<4> ubDNDI_RESP(6,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,19)<4> ubDNDI_RESP(6,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,1)<4> ubDNDI_RESP(6,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,17)<4> ubDNDI_RESP(6,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(2,3)<4> ubDNDI_RESP(6,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,19)<4> ubDNDI_RESP(6,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Pack 1st field Y; 2nd 8x4 block +mov (8) r27.0<1>:ud r24.0<8;8,1>:ud +add (1) r27.0<1>:ud r27.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT2_2(1)<2> ubDNDI_RESP(4,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(1,16)<2> ubDNDI_RESP(4,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2)<2> ubDNDI_RESP(4,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2,16)<2> ubDNDI_RESP(4,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U, V; 2nd 8x4 block + mov (4) mubMSGHDR_DI_OUT2_2(1,1)<4> ubDNDI_RESP(6,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,17)<4> ubDNDI_RESP(6,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(1,3)<4> ubDNDI_RESP(6,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,19)<4> ubDNDI_RESP(6,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,1)<4> ubDNDI_RESP(6,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,17)<4> ubDNDI_RESP(6,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(2,3)<4> ubDNDI_RESP(6,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,19)<4> ubDNDI_RESP(6,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r24.0 0x5 0x60A801E:ud +send (8) null<1>:d r27.0 0x5 0x60A801E:ud + + + +// FileName: DN_Save_UV_IMC3_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Save_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + +//Reuse the header from Load component + + + mov (4) mudMSGHDR_UCOPY(1)<1> udDNDI_UV_RESP(0)<4;4,1> + mov (4) mudMSGHDR_VCOPY(1)<1> udDNDI_UV_RESP(1)<4;4,1> + send (4) null<1>:d r36 0x5 0x40A8019:ud + send (4) null<1>:d r38 0x5 0x40A801A:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DNDI_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DNDI_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DNDI_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DNDI_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,522 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 90 // Total instruction count +// 1 // Total kernel count + +.kernel PL3_DNDI_PA +.code + + + +// FileName: DNDI_PL_Core.asm +// Author: Tatiya, Rupesh + + + +// FileName: DNDI_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN+DI case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4BE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + mov (1) mudMSGHDR_HIST(1)<1> udDNDI_RESP(9,0)<0;1,0> // Move denoise history to MRF (4x1) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x3:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_IMC3_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Load_16x4.asm +// Author: Vivek Kumar +// Description: Read UV for 16x4 block through DATAPORT + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (2) r27.0<1>:d r27.0<2;2,1>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x10007:ud { NoDDChk } // U/V block width and height (8x2) + mov (8) r36<1>:ud r27.0<8;8,1>:ud + mov (8) r38<1>:ud r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2190001:ud + send (8) udDNDI_UV_RESP(1)<1> r38 0x4 0x2190002:ud + + + +// FileName: DN_Save_Y_16x4.asm +// Author: Vivek Kumar +// Description: Save one 16x4 blocks of Y channel of DN output for reference + + + // check top/bottom field first +cmp.e.f0.0 (1) null<1>:w r1.28<0;1,0>:ub 1:w + +mov (8) mudMSGHDR_DN_OUT(0)<1> r0<8;8,1>:ud // message header +mov (2) mdMSGHDR_DN_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin * 2 (422 output) +mov (1) mudMSGHDR_DN_OUT(0,2)<1> 0x3000F:ud { NoDDChk } // block width and height (32x8) + +(f0.0) jmpi (1) TOP_FIELD_FIRST + +BOTTOM_FIELD_FIRST: + + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(4,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(5,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + + jmpi (1) SAVE_DN_CURR + +TOP_FIELD_FIRST: + mov (4) mudMSGHDR_DN_OUT(1,0)<1> udDNDI_RESP(4,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(1,4)<1> udDNDI_RESP(10,0)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + mov (4) mudMSGHDR_DN_OUT(2,0)<1> udDNDI_RESP(5,0)<4;4,1> { NoDDClr } // 2nd field luma from current frame (line 0,2) + mov (4) mudMSGHDR_DN_OUT(2,4)<1> udDNDI_RESP(10,4)<4;4,1> { NoDDChk } // 1st field luma from current frame (line 1,3) + +SAVE_DN_CURR: +//send out data through data port +send (8) null<1>:d r31.0 0x5 0x60A8018:ud + + + +// FileName: DI_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in Packed format + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20 + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x8) + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r23.0<1>:ud r27<8;8,1>:ud + +// Pack 2nd field Y + mov (16) r[a0.4, 0]<2> ubDNDI_RESP(0,0) { NoDDClr } + mov (16) r[a0.4, 32]<2> ubDNDI_RESP(0,16) { NoDDClr } + mov (16) r[a0.4, 64]<2> ubDNDI_RESP(0,32) { NoDDClr } + mov (16) r[a0.4, 96]<2> ubDNDI_RESP(0,48) { NoDDClr } +// Pack 2nd field U + mov (8) r[a0.5, 0]<4> ubDNDI_RESP(2,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 32]<4> ubDNDI_RESP(2,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 64]<4> ubDNDI_RESP(2,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 96]<4> ubDNDI_RESP(2,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 2nd field V + mov (8) r[a0.6, 0]<4> ubDNDI_RESP(2,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 32]<4> ubDNDI_RESP(2,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 64]<4> ubDNDI_RESP(2,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 96]<4> ubDNDI_RESP(2,48)<16;8,2> { NoDDChk } //Vpixels + +// Pack 1st field Y + mov (16) r[a0.4, 160]<2> ubDNDI_RESP(4,0) { NoDDClr } + mov (16) r[a0.4, 192]<2> ubDNDI_RESP(4,16) { NoDDClr } + mov (16) r[a0.4, 224]<2> ubDNDI_RESP(4,32) { NoDDClr } + mov (16) r[a0.4, 256]<2> ubDNDI_RESP(4,48) { NoDDClr } +// Pack 1st field U + mov (8) r[a0.5, 160]<4> ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 192]<4> ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 224]<4> ubDNDI_RESP(6,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 256]<4> ubDNDI_RESP(6,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 1st field V + mov (8) r[a0.6, 160]<4> ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 192]<4> ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 224]<4> ubDNDI_RESP(6,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 256]<4> ubDNDI_RESP(6,48)<16;8,2> { NoDDChk } //Vpixels + +//save the previous frame +send (8) null<1>:d r18.0 0x5 0xA0A801B:ud + +//save the current frame +send (8) null<1>:d r23.0 0x5 0xA0A801E:ud + + + +// FileName: DN_Save_UV_IMC3_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + + +// FileName: UVCopy_Save_16x4.asm +// Author: Vivek Kumar +// Description: Save UV for 16x4 block through DATAPORT + + +//Reuse the header from Load component + + + mov (4) mudMSGHDR_UCOPY(1)<1> udDNDI_UV_RESP(0)<4;4,1> + mov (4) mudMSGHDR_VCOPY(1)<1> udDNDI_UV_RESP(1)<4;4,1> + send (4) null<1>:d r36 0x5 0x40A8019:ud + send (4) null<1>:d r38 0x5 0x40A801A:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DN_PL3.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DN_PL3.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DN_PL3.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DN_PL3.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,447 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + +.kernel PL3_DN_PL3 +.code + + + +// FileName: DN_PL_Core.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) for planar format + + + +// FileName: DN.asm +// Author: Vivek Kumar +// Description: Tasks for DN only case (16x8 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x45E8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(4,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DN_Hist_Save.asm +// Author: Vivek Kumar +// Description: Saves DN history data to statistics surface + +// Write denoise history to memory +mov (8) r27<1>:ud r0.0<8;8,1>:ud // message header + + + mov (2) mudMSGHDR_HIST(1)<1> udDNDI_RESP(4,0)<2;2,1> // Move denoise history to MRF (4x2) + + +shr (2) r27.0<1>:ud r9.0<2;2,1>:w 2:w // X,Y origin / 4 +add (1) r27.0<1>:ud r27.0<0;1,0>:ud r1.12<0;1,0>:uw { NoDDClr } // Add pitch to X origin +mov (1) r27.2<1>:ud 0x10003:ud { NoDDChk } // block width and height + +mov (8) mudMSGHDR_HIST(0)<1> r27.0<8;8,1>:ud +send (8) null<1>:d r22 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x50003:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | X | X | X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + //| X | X | + //---------------------------------------------------- + //| X | SVCM | X | + //---------------------------------------------------- + //| SHCM | STAD | X | + //---------------------------------------------------- + mov (1) mubMSGHDR_ENC_STATS(1,0)<1> ubDNDI_RESP(4,8)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,3)<1> uwDNDI_RESP(4,11)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,4)<1> uwDNDI_RESP(4,12)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (1) muwMSGHDR_ENC_STATS(1,9)<1> uwDNDI_RESP(4,8)<0;1,0> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) muwMSGHDR_ENC_STATS(1,10)<1> uwDNDI_RESP(4,9)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DN_Load_UV_IMC3_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Load_16x8.asm +// Author: Vivek Kumar +// Description: Read UV for 16x8 block through DATAPORT + +//CHANGE : Read extra UV data to convert to 422. -rT +//we are reading extra data in ALL cases irrespective of whether upsampling is reqd or not later on, to keep things simple. + + + add (2) r27.0<1>:d r9.0<2;2,1>:w r4.4<2;2,1>:w // Source Y Block origin + asr (2) r27.0<1>:d r27.0<2;2,1>:d 1:w { NoDDClr } // U/V block origin should be half of Y's + mov (1) r27.2<1>:ud 0x40007:ud { NoDDChk } // U/V block width and height (8x5) + mov (8) r36<1>:ud r27.0<8;8,1>:ud + mov (8) r38<1>:ud r27.0<8;8,1>:ud + send (8) udDNDI_UV_RESP(0)<1> r36 0x4 0x2290001:ud + send (8) udDNDI_UV_RESP(2)<1> r38 0x4 0x2290002:ud + + //Update Header for Save + mov (1) mudMSGHDR_UCOPY(0,2)<1> 0x30007:ud // U block width and height (8x4) + mov (1) mudMSGHDR_VCOPY(0,2)<1> 0x30007:ud // V block width and height (8x4) + + + +// FileName: DN_Save_Y_16x8.asm +// Author: Vivek Kumar +// Description: Save one 16x8 blocks of Y channel of DN output for reference + + +mov (8) mudDN_Y_OUT(0,0)<1> r0<8;8,1>:ud // message header +mov (2) mudDN_Y_OUT(0,0)<1> r9.0<2;2,1>:w { NoDDClr } // X origin +mov (1) mudDN_Y_OUT(0,2)<1> 0x7000F:ud { NoDDChk } // block width and height (16x8) + +//send out data through data port +send (8) null<1>:d mudDN_Y_OUT 0x5 0xA0A8018:ud + + + +// FileName: DN_Save_UV_IMC3_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + + +// FileName: UVCopy_Save_16x8.asm +// Author: Vivek Kumar +// Description: Save UV for 16x8 block through DATAPORT + + +//Reuse the header from Load component +//Header is modified at the end of load - to be usable for save. + + + mov (8) mudMSGHDR_UCOPY(1)<1> udDNDI_UV_RESP(0)<8;8,1> + mov (8) mudMSGHDR_VCOPY(1)<1> udDNDI_UV_RESP(2)<8;8,1> + send (4) null<1>:d r36 0x5 0x40A8019:ud + send (4) null<1>:d r38 0x5 0x40A801A:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DNUV_PL3.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DNUV_PL3.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL3_DNUV_PL3.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL3_DNUV_PL3.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2706 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 1295 // Total instruction count +// 1 // Total kernel count + + +.kernel PL3_DNUV_PL3 +.code + + + +//Module : DN_UV_Setup +//Author : Tatiya, Rupesh +//Description : Initial Set-up for DN_UV + + + + +// Module name : ChromaDenoise.inc +// Author : Tatiya, Rupesh + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================================================== +//Interface for serpent mode Chroma Denoise, added by Le +//====================================================== +//r1 + + +//noise history thresholds (low and high) + + +//temporal difference thresholds (high and low) + + +//noise history thresholds (low and high) +//#define ubNoiseHistMaxHigh r1.22 +//#define ubNoiseHistMaxLow r1.23 +//#define ubNoiseHistDeltaHigh r1.24 +//#define ubNoiseHistDeltaLow r1.25 + +//Gaussian thresholds + + +//temporal difference thresholds (default) + + +//r2 +//history thresholds (default) + + +//denoise factor (0-63) + + +//====================== Binding table (Explicit To DNUV)========================================= +//Used by DN_UV kernels + + + //Pointer to Current Frame UV + + +//r1-r6 + //CURBE GRFs used as TEMP : Used for max computation and storing max temporarily. : r1-r6 + + + .declare ubCURBE_TEMP Base=r1.0 ElementSize=1 Type=ub + .declare uwCURBE_TEMP Base=r1.0 ElementSize=2 Type=uw + .declare wCURBE_TEMP Base=r1.0 ElementSize=2 Type=w + .declare fCURBE_TEMP Base=r1.0 ElementSize=4 Type=f + .declare udCURBE_TEMP Base=r1.0 ElementSize=4 Type=ud + .declare uwMAX_ABS_DIFF Base=r5.0 ElementSize=2 Type=uw + + //r1 + + + //r3 + + + //r4 + +//r7 + //All of the following has to defined in Same GRF for optimal performance. + + +//r8-24 + //Previous Frame UV + + .declare udPREV_UV Base=r8.0 ElementSize=4 Type=ud + .declare ubPREV_UV Base=r8.0 ElementSize=1 Type=ub + + +//r25-48 + //TEMP Space for any Usage. + + +//========================================================================= +//Definations and declarations for serpent mode Chroma Denoise, added by Le +//========================================================================= + + + .declare udGNE_UV Base=r24.0 ElementSize=4 Type=ud + .declare fGNE_UV Base=r24.0 ElementSize=4 Type=f + .declare ubGNE_UV Base=r24.0 ElementSize=1 Type=ub + + .declare udMSGHDR_BNE_SERP Base=r25.0 ElementSize=4 Type=ud + .declare udMSGSRC_BNE_SERP Base=r26.0 ElementSize=4 Type=ud + + + .declare ubDN_UV_Thresholds Base=r26.0 ElementSize=1 Type=ub + .declare ubDN_UV_Thresholds_Temp Base=r27.0 ElementSize=1 Type=ub + .declare udDN_UV_Thresholds Base=r26.0 ElementSize=4 Type=ud + .declare udDN_UV_Thresholds_Temp Base=r27.0 ElementSize=4 Type=ud + .declare fDN_UV_Thresholds Base=r26.0 ElementSize=4 Type=f + .declare fDN_UV_Thresholds_Temp Base=r27.0 ElementSize=4 Type=f + + +//==================================================================================== + + + //TEMP23: To hold V data for PL3 surfaces + .declare udCURR_V_TEMP Base=r25.0 ElementSize=4 Type=ud + .declare ubCURR_V_TEMP Base=r25.0 ElementSize=1 Type=ub + + //GRFs to calculate Median: r25-r42 + .declare ubMEDIAN_TEMP Base=r25.0 ElementSize=1 Type=ub + + //18 GRFs to hold difference : r25-r42 + .declare wDIFF Base=r25.0 ElementSize=2 Type=w + .declare uwDIFF Base=r25.0 ElementSize=2 Type=uw + + //Temporal Diff + .declare wDIFF_TEMPORAL Base=r25.0 ElementSize=2 Type=w + .declare ubDIFF_TEMPORAL Base=r25.0 ElementSize=1 Type=ub + + //4 GRFs to hold Sobel Value : r43-46 + .declare wSOBEL_X Base=r43.0 ElementSize=2 Type=w + .declare uwSOBEL Base=r43.0 ElementSize=2 Type=uw + + + //2 GRFs to hold SOAD temporarily: r47-48 + .declare uwSOAD Base=r47.0 ElementSize=2 Type=uw + + //Temp GRFs to hold extra YUYV pixels: r43-r48 + .declare ubTEMP5 Base=r43.0 ElementSize=1 Type=ub + + //Temp GRFs in Median Calculation: r47-r48 + .declare ubTEMP1 Base=r47.0 ElementSize=1 Type=ub + + .declare uwTEMP0 Base=r48.0 ElementSize=2 Type=uw + .declare ubTEMP0 Base=r48.0 ElementSize=1 Type=ub + + //Temp Space to store Median : r49-50 + + .declare ubMEDIAN Base=r49.0 ElementSize=1 Type=ub + +//r49 + + +//r50 + //Message Source + + +//r51 + //DN_UV History Surface + + .declare udHIST_UV Base=r51.0 ElementSize=4 Type=ud + .declare ubHIST_UV Base=r51.0 ElementSize=1 Type=ub + +//r52 - r91 + //r52 + //Current Frame UV + + + .declare udCURR_UV Base=r52.0 ElementSize=4 Type=ud + .declare ubCURR_UV Base=r52.0 ElementSize=1 Type=ub + + //r54 + //CURBE COPY + + + //r55 + + + .declare uwSOAD_MIN_8x4 Base=r56.0 ElementSize=2 Type=uw + + //r61 + + + //r62 + + + //History Surface Temp Origin + + + //r63 + //Current Frame Y Temp Origin + + + //BNE Surface Origin + + + //r70 + + .declare uwDIFF_TEMPORAL_SUM4x4 Base=r70.0 ElementSize=2 Type=uw //4 GRFs + + //r74-91 : For Saving Dest UV (PL2/PL3) + + + .declare ubMSGPAYLOAD_UV0 Base=r75.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_U Base=r75.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_UV1 Base=r84.0 ElementSize=1 Type=ub + + + .declare ubMSGPAYLOAD_V Base=r84.0 ElementSize=1 Type=ub + + //r90 + + .declare uwDIFF_TEMPORAL_SUM4x4_FINAL Base=r90.0 ElementSize=2 Type=uw //2 GRFs + +//r92-127 + //Current Frame Y + + + //r92 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_0 Base=r92 ElementSize=2 Type=uw + //r101 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_1 Base=r101 ElementSize=2 Type=uw + //r110 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_2 Base=r110 ElementSize=2 Type=uw + //r119 + .declare uwDIFF_TEMPORAL_SUM4x4_TEMP_3 Base=r119 ElementSize=2 Type=uw + + .declare udCURR_Y0 Base=r93.0 ElementSize=4 Type=ud + .declare ubCURR_Y0 Base=r93.0 ElementSize=1 Type=ub + .declare udCURR_Y1 Base=r102.0 ElementSize=4 Type=ud + .declare ubCURR_Y1 Base=r102.0 ElementSize=1 Type=ub + .declare udCURR_Y2 Base=r111.0 ElementSize=4 Type=ud + .declare ubCURR_Y2 Base=r111.0 ElementSize=1 Type=ub + .declare udCURR_Y3 Base=r120.0 ElementSize=4 Type=ud + .declare ubCURR_Y3 Base=r120.0 ElementSize=1 Type=ub + + //r92: To hold U data for PL3 surfaces + .declare udCURR_U_TEMP Base=r92.0 ElementSize=4 Type=ud + .declare ubCURR_U_TEMP Base=r92.0 ElementSize=1 Type=ub + + //r112: To hold U data for PL3 surfaces + .declare udPREV_U_TEMP Base=r112.0 ElementSize=4 Type=ud + .declare ubPREV_U_TEMP Base=r112.0 ElementSize=1 Type=ub + + //r120: To hold U data for PL3 surfaces + .declare udPREV_V_TEMP Base=r120.0 ElementSize=4 Type=ud + .declare ubPREV_V_TEMP Base=r120.0 ElementSize=1 Type=ub + + + // Initialize message source with r0. + mov (8) r50.0<1>:ud r0.0<8;8,1>:ud + mov (8) r92.0<1>:ud r0.0<8;8,1>:ud + mov (8) r101.0<1>:ud r0.0<8;8,1>:ud + mov (8) r110.0<1>:ud r0.0<8;8,1>:ud + mov (8) r119.0<1>:ud r0.0<8;8,1>:ud + + + +//Module Name : DN_UV_PL3_Load_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Current Frame U/V data for PL3 input. + + + +//Module name : DN_UV_Load_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Current Frame (UV only). +// We need 4 extra rows (2 per field) and 2 extra pixel (1 each side) for both U and V each. +// The processing size is 16x16 U and V each. So we need : U size - 18x20, V size - 18x20, UV size - 36x20, YUYV size - 72x20. + + + + +//18x20 U/V block is partitioned as follows: +// <------ 18 ------> +// ------------------ +// | 18x8 A1 | +// | | +// |----------------| +// | 18x8 A2 | +// | | +// |----------------| +// | 18x4 A2 | +// |----------------| +// +// Cordinates: (x-1, y-2), (x-1, y+6), (x-1, y+14) + +//1. Load U data into starting at CURR_Y0 (r93-r122) +//2. Load V data into TEMP space (r25-r44) + + //U/V surface origin: (ORIX/2, ORIY/2) + add (2) r9.4<1>:w r9.0<2;2,1>:w r4.4<2;2,1>:w { AccWrEn } // Source Block origin + shr (2) r9.4<1>:w acc0.4<2;2,1>:w 1:w //U Data + mov (2) acc0.0<1>:d r9.4<2;2,1>:w + + //A1 + add (1) r50.0<1>:d acc0.0<0;1,0>:d -1:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d -2:d + mov (1) r50.2<1>:ud 0x70011:ud + send (8) udCURR_U_TEMP(0)<1> r50 0x4 0x2890004:ud + + //A2 + add (1) r50.1<1>:d acc0.1<0;1,0>:d 6:d + send (8) udCURR_U_TEMP(8)<1> r50 0x4 0x2890004:ud + + //A3 + add (1) r50.1<1>:d acc0.1<0;1,0>:d 14:d + mov (1) r50.2<1>:ud 0x30011:ud + send (8) udCURR_U_TEMP(16)<1> r50 0x4 0x2490004:ud + + //V Data + //A1 + add (1) r50.0<1>:d acc0.0<0;1,0>:d -1:d + add (1) r50.1<1>:d acc0.1<0;1,0>:d -2:d + mov (1) r50.2<1>:ud 0x70011:ud + send (8) udCURR_V_TEMP(0)<1> r50 0x4 0x2890005:ud + + //A2 + add (1) r50.1<1>:d acc0.1<0;1,0>:d 6:d + send (8) udCURR_V_TEMP(8)<1> r50 0x4 0x2890005:ud + + //A3 + add (1) r50.1<1>:d acc0.1<0;1,0>:d 14:d + mov (1) r50.2<1>:ud 0x30011:ud + send (8) udCURR_V_TEMP(16)<1> r50 0x4 0x2490005:ud + + //History Origin, Current Y origin and BNE surface origin - all are in inline GRF. Use , . -rT. + + //Calculate Origin For History Surface: (ORIX/4, ORIY/8) + mov (16) acc0.0<1>:w r9.0<0;2,1>:w { AccWrEn } + shr (1) r9.2<1>:w acc0.2<0;1,0>:w 2:w + shr (1) r9.3<1>:w acc0.3<0;1,0>:w 3:w + + //Calculate Origin For BNE Surface: (ORIX/8, ORIY/16) + shr (1) r9.6<1>:w acc0.6<0;1,0>:w 3:w + shr (1) r9.7<1>:w acc0.7<0;1,0>:w 4:w + + + +//Module Name : DN_UV_PL3_Load_Prev_Frame_UV.asm +//Author : Tatiya, Rupesh +//Description : Loads Pevious Frame UV data for PL3 input. + + + +//Module Name : DN_UV_Load_Prev_Frame_UV +//Author : Tatiya, Rupesh +//Description : Loads Prev Frame (UV only). U size - 16x16, V size - 16x16, UV size - 32x16, YUYV size - 64x16. + + + + +//1. Load U in bottom half of UV space for prev frame (r17-r24) +//2. Load V in bottom quarter of Y space for curr frame (r120-r127) + + mov (2) r50.0<1>:d r9.4<2;2,1>:w { AccWrEn } // Source lock origin + mov (1) r50.2<1>:ud 0xF000F:ud // U/V block width and height (16x16) + + mov (8) r49.0<1>:ud r50<8;8,1>:ud + + send (8) udPREV_U_TEMP(0)<1> r50 0x4 0x2890001:ud //U data + send (8) udPREV_V_TEMP(0)<1> r49 0x4 0x2890002:ud //V data + + + //TODO - See if History loading can be combined with Prev Frame Load. - rT + + +//Module name : DN_UV_Load_Hist_UV +//Author : Tatiya, Rupesh +//Description : Load DN History for UV denoise. 4x4 for each U & V. + + + + + mov (2) r50.0<1>:d r9.2<2;2,1>:w + mov (1) r50.2<1>:ud 0x30007:ud + send (8) udHIST_UV(0)<1> r50 0x4 0x2190022:ud + + + +//File Name : DN_UV_PL3_Interleave_Curr_Frame_UV.asm +//Author : Tatiya, Rupesh +//Description : Interleave separately loaded U and V for PL3 format. +// This is needed because Noise Detection and Noise Reduction works on interleaved UV data. + +//1. U data: Starting at CURR_Y0 (r93-r122) +//2. V data: TEMP space (r25-r44) + +//In one GRF, we need 10 U (1+8+1) bytes, but there's no SIMD10. So use SIMD16 and discard last 6 bytes. + + +//Move U data + mov (16) ubCURR_UV(0,0)<2> ubCURR_U_TEMP(0,0)<16;16,1> + mov (16) ubCURR_UV(20,0)<2> ubCURR_U_TEMP(0,8)<16;16,1> + + mov (16) ubCURR_UV(1,0)<2> ubCURR_U_TEMP(1,0)<16;16,1> + mov (16) ubCURR_UV(21,0)<2> ubCURR_U_TEMP(1,8)<16;16,1> + + mov (16) ubCURR_UV(2,0)<2> ubCURR_U_TEMP(2,0)<16;16,1> + mov (16) ubCURR_UV(22,0)<2> ubCURR_U_TEMP(2,8)<16;16,1> + + mov (16) ubCURR_UV(3,0)<2> ubCURR_U_TEMP(3,0)<16;16,1> + mov (16) ubCURR_UV(23,0)<2> ubCURR_U_TEMP(3,8)<16;16,1> + + mov (16) ubCURR_UV(4,0)<2> ubCURR_U_TEMP(4,0)<16;16,1> + mov (16) ubCURR_UV(24,0)<2> ubCURR_U_TEMP(4,8)<16;16,1> + + mov (16) ubCURR_UV(5,0)<2> ubCURR_U_TEMP(5,0)<16;16,1> + mov (16) ubCURR_UV(25,0)<2> ubCURR_U_TEMP(5,8)<16;16,1> + + mov (16) ubCURR_UV(6,0)<2> ubCURR_U_TEMP(6,0)<16;16,1> + mov (16) ubCURR_UV(26,0)<2> ubCURR_U_TEMP(6,8)<16;16,1> + + mov (16) ubCURR_UV(7,0)<2> ubCURR_U_TEMP(7,0)<16;16,1> + mov (16) ubCURR_UV(27,0)<2> ubCURR_U_TEMP(7,8)<16;16,1> + + mov (16) ubCURR_UV(8,0)<2> ubCURR_U_TEMP(8,0)<16;16,1> + mov (16) ubCURR_UV(28,0)<2> ubCURR_U_TEMP(8,8)<16;16,1> + + mov (16) ubCURR_UV(9,0)<2> ubCURR_U_TEMP(9,0)<16;16,1> + mov (16) ubCURR_UV(29,0)<2> ubCURR_U_TEMP(9,8)<16;16,1> + + mov (16) ubCURR_UV(10,0)<2> ubCURR_U_TEMP(10,0)<16;16,1> + mov (16) ubCURR_UV(30,0)<2> ubCURR_U_TEMP(10,8)<16;16,1> + + mov (16) ubCURR_UV(11,0)<2> ubCURR_U_TEMP(11,0)<16;16,1> + mov (16) ubCURR_UV(31,0)<2> ubCURR_U_TEMP(11,8)<16;16,1> + + mov (16) ubCURR_UV(12,0)<2> ubCURR_U_TEMP(12,0)<16;16,1> + mov (16) ubCURR_UV(32,0)<2> ubCURR_U_TEMP(12,8)<16;16,1> + + mov (16) ubCURR_UV(13,0)<2> ubCURR_U_TEMP(13,0)<16;16,1> + mov (16) ubCURR_UV(33,0)<2> ubCURR_U_TEMP(13,8)<16;16,1> + + mov (16) ubCURR_UV(14,0)<2> ubCURR_U_TEMP(14,0)<16;16,1> + mov (16) ubCURR_UV(34,0)<2> ubCURR_U_TEMP(14,8)<16;16,1> + + mov (16) ubCURR_UV(15,0)<2> ubCURR_U_TEMP(15,0)<16;16,1> + mov (16) ubCURR_UV(35,0)<2> ubCURR_U_TEMP(15,8)<16;16,1> + + mov (16) ubCURR_UV(16,0)<2> ubCURR_U_TEMP(16,0)<16;16,1> + mov (16) ubCURR_UV(36,0)<2> ubCURR_U_TEMP(16,8)<16;16,1> + + mov (16) ubCURR_UV(17,0)<2> ubCURR_U_TEMP(17,0)<16;16,1> + mov (16) ubCURR_UV(37,0)<2> ubCURR_U_TEMP(17,8)<16;16,1> + + mov (16) ubCURR_UV(18,0)<2> ubCURR_U_TEMP(18,0)<16;16,1> + mov (16) ubCURR_UV(38,0)<2> ubCURR_U_TEMP(18,8)<16;16,1> + + mov (16) ubCURR_UV(19,0)<2> ubCURR_U_TEMP(19,0)<16;16,1> + mov (16) ubCURR_UV(39,0)<2> ubCURR_U_TEMP(19,8)<16;16,1> + + +//Move V data + mov (16) ubCURR_UV(0,1)<2> ubCURR_V_TEMP(0,0)<16;16,1> + mov (16) ubCURR_UV(20,1)<2> ubCURR_V_TEMP(0,8)<16;16,1> + mov (16) ubCURR_UV(1,1)<2> ubCURR_V_TEMP(1,0)<16;16,1> + mov (16) ubCURR_UV(21,1)<2> ubCURR_V_TEMP(1,8)<16;16,1> + mov (16) ubCURR_UV(2,1)<2> ubCURR_V_TEMP(2,0)<16;16,1> + mov (16) ubCURR_UV(22,1)<2> ubCURR_V_TEMP(2,8)<16;16,1> + mov (16) ubCURR_UV(3,1)<2> ubCURR_V_TEMP(3,0)<16;16,1> + mov (16) ubCURR_UV(23,1)<2> ubCURR_V_TEMP(3,8)<16;16,1> + mov (16) ubCURR_UV(4,1)<2> ubCURR_V_TEMP(4,0)<16;16,1> + mov (16) ubCURR_UV(24,1)<2> ubCURR_V_TEMP(4,8)<16;16,1> + mov (16) ubCURR_UV(5,1)<2> ubCURR_V_TEMP(5,0)<16;16,1> + mov (16) ubCURR_UV(25,1)<2> ubCURR_V_TEMP(5,8)<16;16,1> + mov (16) ubCURR_UV(6,1)<2> ubCURR_V_TEMP(6,0)<16;16,1> + mov (16) ubCURR_UV(26,1)<2> ubCURR_V_TEMP(6,8)<16;16,1> + mov (16) ubCURR_UV(7,1)<2> ubCURR_V_TEMP(7,0)<16;16,1> + mov (16) ubCURR_UV(27,1)<2> ubCURR_V_TEMP(7,8)<16;16,1> + mov (16) ubCURR_UV(8,1)<2> ubCURR_V_TEMP(8,0)<16;16,1> + mov (16) ubCURR_UV(28,1)<2> ubCURR_V_TEMP(8,8)<16;16,1> + mov (16) ubCURR_UV(9,1)<2> ubCURR_V_TEMP(9,0)<16;16,1> + mov (16) ubCURR_UV(29,1)<2> ubCURR_V_TEMP(9,8)<16;16,1> + mov (16) ubCURR_UV(10,1)<2> ubCURR_V_TEMP(10,0)<16;16,1> + mov (16) ubCURR_UV(30,1)<2> ubCURR_V_TEMP(10,8)<16;16,1> + mov (16) ubCURR_UV(11,1)<2> ubCURR_V_TEMP(11,0)<16;16,1> + mov (16) ubCURR_UV(31,1)<2> ubCURR_V_TEMP(11,8)<16;16,1> + mov (16) ubCURR_UV(12,1)<2> ubCURR_V_TEMP(12,0)<16;16,1> + mov (16) ubCURR_UV(32,1)<2> ubCURR_V_TEMP(12,8)<16;16,1> + mov (16) ubCURR_UV(13,1)<2> ubCURR_V_TEMP(13,0)<16;16,1> + mov (16) ubCURR_UV(33,1)<2> ubCURR_V_TEMP(13,8)<16;16,1> + mov (16) ubCURR_UV(14,1)<2> ubCURR_V_TEMP(14,0)<16;16,1> + mov (16) ubCURR_UV(34,1)<2> ubCURR_V_TEMP(14,8)<16;16,1> + mov (16) ubCURR_UV(15,1)<2> ubCURR_V_TEMP(15,0)<16;16,1> + mov (16) ubCURR_UV(35,1)<2> ubCURR_V_TEMP(15,8)<16;16,1> + mov (16) ubCURR_UV(16,1)<2> ubCURR_V_TEMP(16,0)<16;16,1> + mov (16) ubCURR_UV(36,1)<2> ubCURR_V_TEMP(16,8)<16;16,1> + mov (16) ubCURR_UV(17,1)<2> ubCURR_V_TEMP(17,0)<16;16,1> + mov (16) ubCURR_UV(37,1)<2> ubCURR_V_TEMP(17,8)<16;16,1> + mov (16) ubCURR_UV(18,1)<2> ubCURR_V_TEMP(18,0)<16;16,1> + mov (16) ubCURR_UV(38,1)<2> ubCURR_V_TEMP(18,8)<16;16,1> + mov (16) ubCURR_UV(19,1)<2> ubCURR_V_TEMP(19,0)<16;16,1> + mov (16) ubCURR_UV(39,1)<2> ubCURR_V_TEMP(19,8)<16;16,1> + + + +//File Name : DN_UV_PL3_Interleave_Prev_Frame_UV.asm +//Author : Tatiya, Rupesh +//Description : Interleave separately loaded U and V for PL3 format. +// This is needed because Noise Detection and Noise Reduction works on interleaved UV data. + +//1.U Data: bottom half of UV space for prev frame (r17-r24) +//2.V Data: bottom quarter of Y space for curr frame (r120-r127) + + mov (16) ubPREV_UV(0,0)<2> ubPREV_U_TEMP(0,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(8,0)<2> ubPREV_U_TEMP(0,8)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(1,0)<2> ubPREV_U_TEMP(1,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(9,0)<2> ubPREV_U_TEMP(1,8)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(2,0)<2> ubPREV_U_TEMP(2,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(10,0)<2> ubPREV_U_TEMP(2,8)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(3,0)<2> ubPREV_U_TEMP(3,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(11,0)<2> ubPREV_U_TEMP(3,8)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(4,0)<2> ubPREV_U_TEMP(4,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(12,0)<2> ubPREV_U_TEMP(4,8)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(5,0)<2> ubPREV_U_TEMP(5,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(13,0)<2> ubPREV_U_TEMP(5,8)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(6,0)<2> ubPREV_U_TEMP(6,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(14,0)<2> ubPREV_U_TEMP(6,8)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(7,0)<2> ubPREV_U_TEMP(7,0)<16;8,1> { NoDDClr } + mov (16) ubPREV_UV(15,0)<2> ubPREV_U_TEMP(7,8)<16;8,1> { NoDDClr } + + mov (16) ubPREV_UV(0,1)<2> ubPREV_V_TEMP(0,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(8,1)<2> ubPREV_V_TEMP(0,8)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(1,1)<2> ubPREV_V_TEMP(1,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(9,1)<2> ubPREV_V_TEMP(1,8)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(2,1)<2> ubPREV_V_TEMP(2,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(10,1)<2> ubPREV_V_TEMP(2,8)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(3,1)<2> ubPREV_V_TEMP(3,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(11,1)<2> ubPREV_V_TEMP(3,8)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(4,1)<2> ubPREV_V_TEMP(4,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(12,1)<2> ubPREV_V_TEMP(4,8)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(5,1)<2> ubPREV_V_TEMP(5,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(13,1)<2> ubPREV_V_TEMP(5,8)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(6,1)<2> ubPREV_V_TEMP(6,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(14,1)<2> ubPREV_V_TEMP(6,8)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(7,1)<2> ubPREV_V_TEMP(7,0)<16;8,1> { NoDDChk } + mov (16) ubPREV_UV(15,1)<2> ubPREV_V_TEMP(7,8)<16;8,1> { NoDDChk } + + + +//Module Name : DN_UV_420_Load_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Load Curr Frame Y data for 420 Input + + + +//Module Name : DN_UV_Load_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Loads Y of Current frame. + + + + + //For 16x16 U and 16x16 V for 420, we need to read 32x32 Y. + + mov (8) acc0.0<1>:ud r0.0<8;8,1>:ud + mov (1) acc0.2<1>:ud 0xF000F:ud + add (2) acc0.0<1>:ud r9.0<2;2,1>:w r4.4<2;2,1>:w + + mov (8) r92.0<1>:ud acc0.0<8;8,1>:ud + + mov (8) r101.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r110.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r119.0<1>:ud acc0.0<8;8,1>:ud + + add (1) r101.1<1>:d acc0.1<0;1,0>:d 16:d + + add (1) r110.0<1>:d acc0.0<0;1,0>:d 16:d + + add (2) r119.0<1>:d acc0.0<2;2,1>:d 16:d + + send (8) udCURR_Y0(0)<1> r92 0x4 0x2890003:ud + send (8) udCURR_Y1(0)<1> r101 0x4 0x2890003:ud + send (8) udCURR_Y2(0)<1> r110 0x4 0x2890003:ud + send (8) udCURR_Y3(0)<1> r119 0x4 0x2890003:ud + + + +//Module Name : DN_UV_Noise_Detection_UV +//Author : Tatiya, Rupesh +//Description : Performs noise detection on 16x16 U and 16x16 V each. + + + +//Module Name : DN_UV_Move_CURBE_Inline_UV.asm +//Author : Tatiya, Rupesh + + + + + //Mov CURBE data to another space - so that it can be used as Temp Space --> r1 - r6 + mov (4) r54.28<1>:ub r2.28<4;4,1>:ub //Dest. YUY2 offset + mov (2) r54.5<1>:ud r4.0<4;2,2>:ud //Src YUY2 offset and Origin offset + mov (4) r55.28<1>:ub r1.0<4;4,1>:ub + + mov (8) r61.20<1>:ub r1.4<8;8,1>:ub + mov (4) r61.28<1>:ub r1.12<4;4,1>:ub + + //Move Inline Data to another space - so that it can be used as Temp Space --> r7 + mov (4) r62.10<1>:w r9.0<4;4,1>:w + mov (4) r63.10<1>:w r9.4<4;4,1>:w + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + mov (1) a0.0:uw 1664:uw + mov (1) a0.1:uw 1816:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 1792:uw + mov (1) a0.1:uw 1820:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 1920:uw + mov (1) a0.1:uw 1848:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2048:uw + mov (1) a0.1:uw 1852:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + mov (1) a0.0:uw 2304:uw + mov (1) a0.1:uw 1880:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2432:uw + mov (1) a0.1:uw 1884:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2560:uw + mov (1) a0.1:uw 1912:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + + + +//Module Name : DN_UV_Noise_Detection_Set_Top_Region_N +//Author : Tatiya, Rupesh +//Description : Sets sub-region region N from Top region. + + + //TODO - remove one instruction here using arithmatic. -rT + mov (1) a0.0:uw 2688:uw + mov (1) a0.1:uw 1916:uw + + + + +add (1) r9.7<1>:d ip:ud 32:d { NoCompact } + jmpi (1) DN_UV_NOISE_DETECTION_UV { NoCompact } + + + +//Module : DN_UV_Noise_Reduction_UV +//Author : Tatiya, Rupesh +//Description : Performs Noise Reduction on 16x16 U and 16x16 V. +//Tasks : 1. Update weight history +// 2. Find if it block is motion block +// 3. Compute Denoised Pixel. + + + + +//History is 1+1 byte every 4x4 U and 4x4 V. + + cmp.l.f0.0 (16) null<1>:w ubHIST_UV(0,0)<16;16,1> r61.20<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w ubHIST_UV(0,0)<16;16,1> r61.22<0;2,1>:ub + + mov (16) uwCURBE_TEMP(0)<1> 0:w + mov (16) uwCURBE_TEMP(1)<1> 0:w + + //Compute diff betn curr and prev. - First 16 lines + // 8 lines here + add (16) wDIFF_TEMPORAL(0)<1> ubCURR_UV(2,2)<16;16,1> -ubPREV_UV(0,0)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(1)<1> ubCURR_UV(3,2)<16;16,1> -ubPREV_UV(0,16)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(2)<1> ubCURR_UV(4,2)<16;16,1> -ubPREV_UV(0,32)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(3)<1> ubCURR_UV(5,2)<16;16,1> -ubPREV_UV(0,48)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(4)<1> ubCURR_UV(6,2)<16;16,1> -ubPREV_UV(0,64)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(5)<1> ubCURR_UV(7,2)<16;16,1> -ubPREV_UV(0,80)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(6)<1> ubCURR_UV(8,2)<16;16,1> -ubPREV_UV(0,96)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(7)<1> ubCURR_UV(9,2)<16;16,1> -ubPREV_UV(0,112)<16;16,1> //Diff UV interleaved + + //Update WT HIST + (-f0.0) shr (16) uwCURBE_TEMP(0)<1> ubHIST_UV(0,0)<16;16,1> 1:w + (f1.0) add (16) uwCURBE_TEMP(2)<1> ubHIST_UV(0,0)<16;16,1> r61.24<0;2,1>:ub + (f0.0) mov (16) uwCURBE_TEMP(2)<1> r61.20<0;2,1>:ub + (-f0.0.anyv) mov (16) uwCURBE_TEMP(2)<1> ubHIST_UV(0,0)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w ubHIST_UV(0,16)<16;16,1> r61.20<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w ubHIST_UV(0,16)<16;16,1> r61.22<0;2,1>:ub + + //Compute diff betn curr and prev. - First 16 lines + // 8 more lines here + add (16) wDIFF_TEMPORAL(8)<1> ubCURR_UV(10,2)<16;16,1> -ubPREV_UV(0,128)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(9)<1> ubCURR_UV(11,2)<16;16,1> -ubPREV_UV(0,144)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(10)<1> ubCURR_UV(12,2)<16;16,1> -ubPREV_UV(0,160)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(11)<1> ubCURR_UV(13,2)<16;16,1> -ubPREV_UV(0,176)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(12)<1> ubCURR_UV(14,2)<16;16,1> -ubPREV_UV(0,192)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(13)<1> ubCURR_UV(15,2)<16;16,1> -ubPREV_UV(0,208)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(14)<1> ubCURR_UV(16,2)<16;16,1> -ubPREV_UV(0,224)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(15)<1> ubCURR_UV(17,2)<16;16,1> -ubPREV_UV(0,240)<16;16,1> //Diff UV interleaved + + (-f0.0) shr (16) uwCURBE_TEMP(1)<1> ubHIST_UV(0,16)<16;16,1> 1:w + (f1.0) add (16) uwCURBE_TEMP(3)<1> ubHIST_UV(0,16)<16;16,1> r61.24<0;2,1>:ub + (f0.0) mov (16) uwCURBE_TEMP(3)<1> r61.20<0;2,1>:ub + (-f0.0.anyv) mov(16) uwCURBE_TEMP(3)<1> ubHIST_UV(0,16)<16;16,1> + + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(0)<16;16,1> (abs)wDIFF_TEMPORAL(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(2)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(3)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(4)<16;16,1> (abs)wDIFF_TEMPORAL(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(6)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(7)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(8)<16;16,1> (abs)wDIFF_TEMPORAL(9)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(10)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(2)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(11)<16;16,1> + //16x16 to 16x4 - First 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(12)<16;16,1> (abs)wDIFF_TEMPORAL(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(14)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(3)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(15)<16;16,1> + +//Compute diff betn curr and prev. - Second 16 lines +//13 lines. + add (16) wDIFF_TEMPORAL(16)<1> ubCURR_UV(22,2)<16;16,1> -ubPREV_UV(8,0)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(17)<1> ubCURR_UV(23,2)<16;16,1> -ubPREV_UV(8,16)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(18)<1> ubCURR_UV(24,2)<16;16,1> -ubPREV_UV(8,32)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(19)<1> ubCURR_UV(25,2)<16;16,1> -ubPREV_UV(8,48)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(20)<1> ubCURR_UV(26,2)<16;16,1> -ubPREV_UV(8,64)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(21)<1> ubCURR_UV(27,2)<16;16,1> -ubPREV_UV(8,80)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(22)<1> ubCURR_UV(28,2)<16;16,1> -ubPREV_UV(8,96)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(23)<1> ubCURR_UV(29,2)<16;16,1> -ubPREV_UV(8,112)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(24)<1> ubCURR_UV(30,2)<16;16,1> -ubPREV_UV(8,128)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(25)<1> ubCURR_UV(31,2)<16;16,1> -ubPREV_UV(8,144)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(26)<1> ubCURR_UV(32,2)<16;16,1> -ubPREV_UV(8,160)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(27)<1> ubCURR_UV(33,2)<16;16,1> -ubPREV_UV(8,176)<16;16,1> //Diff UV interleaved + add (16) wDIFF_TEMPORAL(28)<1> ubCURR_UV(34,2)<16;16,1> -ubPREV_UV(8,192)<16;16,1> //Diff UV interleaved + +//3 more lines + add (16) wCURBE_TEMP(4)<1> ubCURR_UV(35,2)<16;16,1> -ubPREV_UV(8,208)<16;16,1> //Diff UV interleaved + add (16) wCURBE_TEMP(5)<1> ubCURR_UV(36,2)<16;16,1> -ubPREV_UV(8,224)<16;16,1> //Diff UV interleaved + add (16) wCURBE_TEMP(6)<1> ubCURR_UV(37,2)<16;16,1> -ubPREV_UV(8,240)<16;16,1> //Diff UV interleaved + + //16x4 to 8x4 - First 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> uwDIFF_TEMPORAL_SUM4x4(2,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(2,2)<4;2,1> + + //8x4 to 4x4 - First 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4_FINAL(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> { AccWrEn } + + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(16)<16;16,1> (abs)wDIFF_TEMPORAL(17)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(18)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(19)<16;16,1> + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(20)<16;16,1> (abs)wDIFF_TEMPORAL(21)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(22)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(23)<16;16,1> + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(24)<16;16,1> (abs)wDIFF_TEMPORAL(25)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(26)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(2)<1> acc0.0<16;16,1>:uw (abs)wDIFF_TEMPORAL(27)<16;16,1> + + //16x16 to 16x4 - Second 16 lines + add (16) acc0.0<1>:uw (abs)wDIFF_TEMPORAL(28)<16;16,1> (abs)wCURBE_TEMP(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wCURBE_TEMP(5)<16;16,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(3)<1> acc0.0<16;16,1>:uw (abs)wCURBE_TEMP(6)<16;16,1> + + //Find if block is motion block - First 16 lines + cmp.g.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_FINAL(0)<16;16,1> r61.26<0;2,1>:ub + + //Move TEMPORAL_SUM4x4 for SIMD16 use later. + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,0)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,2)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,4)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,6)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,8)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,10)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,12)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(0,14)<0;2,1> + + //Pick Appropriate Weight History Based on motion. - First 16 lines + (-f0.0) mov (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(2)<16;16,1> + + //Actual DN - First 16 lines + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(0)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(0)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(2,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(2,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(2,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,0)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,8)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(0)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(0)<1> ubCURR_UV(2,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(0)<1> wDIFF_TEMPORAL(0)<16;16,1> ubCURR_UV(2,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(1)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(1)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(3,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(3,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(3,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,16)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,24)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(1)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(1)<1> ubCURR_UV(3,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(1)<1> wDIFF_TEMPORAL(1)<16;16,1> ubCURR_UV(3,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(2)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(2)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(4,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(4,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(4,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,32)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,40)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(2)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(2)<1> ubCURR_UV(4,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(2)<1> wDIFF_TEMPORAL(2)<16;16,1> ubCURR_UV(4,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(3)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(3)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(5,2)<8;8,1> -uwCURBE_TEMP(0,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(5,10)<8;8,1> -uwCURBE_TEMP(0,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(5,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,48)<8;8,1> uwCURBE_TEMP(0,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,56)<8;8,1> uwCURBE_TEMP(0,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(3)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(3)<1> ubCURR_UV(5,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(3)<1> wDIFF_TEMPORAL(3)<16;16,1> ubCURR_UV(5,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(4)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(4)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(6,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(6,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(6,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,64)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,72)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(4)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(4)<1> ubCURR_UV(6,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(4)<1> wDIFF_TEMPORAL(4)<16;16,1> ubCURR_UV(6,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(5)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(5)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(7,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(7,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(7,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,80)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,88)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(5)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(5)<1> ubCURR_UV(7,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(5)<1> wDIFF_TEMPORAL(5)<16;16,1> ubCURR_UV(7,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(6)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(6)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(8,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(8,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(8,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,96)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,104)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(6)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(6)<1> ubCURR_UV(8,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(6)<1> wDIFF_TEMPORAL(6)<16;16,1> ubCURR_UV(8,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(7)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(7)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(9,2)<8;8,1> -uwCURBE_TEMP(0,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(9,10)<8;8,1> -uwCURBE_TEMP(0,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(9,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,112)<8;8,1> uwCURBE_TEMP(0,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,120)<8;8,1> uwCURBE_TEMP(0,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(7)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(7)<1> ubCURR_UV(9,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(7)<1> wDIFF_TEMPORAL(7)<16;16,1> ubCURR_UV(9,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(8)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(8)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(10,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(10,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(10,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,128)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,136)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(8)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(8)<1> ubCURR_UV(10,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(8)<1> wDIFF_TEMPORAL(8)<16;16,1> ubCURR_UV(10,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(9)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(9)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(11,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(11,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(11,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,144)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,152)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(9)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(9)<1> ubCURR_UV(11,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(9)<1> wDIFF_TEMPORAL(9)<16;16,1> ubCURR_UV(11,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(10)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(10)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(12,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(12,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(12,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,160)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,168)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(10)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(10)<1> ubCURR_UV(12,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(10)<1> wDIFF_TEMPORAL(10)<16;16,1> ubCURR_UV(12,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(11)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(11)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(13,2)<8;8,1> -uwCURBE_TEMP(0,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(13,10)<8;8,1> -uwCURBE_TEMP(0,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(13,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,176)<8;8,1> uwCURBE_TEMP(0,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,184)<8;8,1> uwCURBE_TEMP(0,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(11)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(11)<1> ubCURR_UV(13,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(11)<1> wDIFF_TEMPORAL(11)<16;16,1> ubCURR_UV(13,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(12)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(12)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(14,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(14,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(14,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,192)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,200)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(12)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(12)<1> ubCURR_UV(14,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(12)<1> wDIFF_TEMPORAL(12)<16;16,1> ubCURR_UV(14,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(13)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(13)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(15,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(15,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(15,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,208)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,216)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(13)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(13)<1> ubCURR_UV(15,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(13)<1> wDIFF_TEMPORAL(13)<16;16,1> ubCURR_UV(15,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(14)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(14)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(16,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(16,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(16,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,224)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,232)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(14)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(14)<1> ubCURR_UV(16,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(14)<1> wDIFF_TEMPORAL(14)<16;16,1> ubCURR_UV(16,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(15)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(15)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(17,2)<8;8,1> -uwCURBE_TEMP(0,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(17,10)<8;8,1> -uwCURBE_TEMP(0,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(17,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(0,240)<8;8,1> uwCURBE_TEMP(0,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(0,248)<8;8,1> uwCURBE_TEMP(0,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(15)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(15)<1> ubCURR_UV(17,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(15)<1> wDIFF_TEMPORAL(15)<16;16,1> ubCURR_UV(17,2)<16;16,1> + + + //16x4 to 8x4 - Second 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4(0)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> + add (16) uwDIFF_TEMPORAL_SUM4x4(1)<1> uwDIFF_TEMPORAL_SUM4x4(2,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(2,2)<4;2,1> + + //8x4 to 4x4 - Second 16 lines + add (16) uwDIFF_TEMPORAL_SUM4x4_FINAL(1)<1> uwDIFF_TEMPORAL_SUM4x4(0,0)<4;2,1> uwDIFF_TEMPORAL_SUM4x4(0,2)<4;2,1> { AccWrEn } + + //Find if block is motion block - Second 16 lines + cmp.g.f1.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_FINAL(1)<16;16,1> r61.26<0;2,1>:ub + + //Move TEMPORAL_SUM4x4 for SIMD16 use later. + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,0)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,2)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,4)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,6)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,8)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,10)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,0)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,12)<0;2,1> + mov (8) uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0,8)<1> uwDIFF_TEMPORAL_SUM4x4_FINAL(1,14)<0;2,1> + + //Pick Appropriate Weight History Based on motion. - Second 16 lines + (-f1.0) mov (16) uwCURBE_TEMP(1)<1> uwCURBE_TEMP(3)<16;16,1> + + //Actual DN - Second 16 lines + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(16)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(16)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(22,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(22,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(22,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,0)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,8)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(16)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(16)<1> ubCURR_UV(22,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(16)<1> wDIFF_TEMPORAL(16)<16;16,1> ubCURR_UV(22,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(17)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(17)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(23,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(23,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(23,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,16)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,24)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(17)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(17)<1> ubCURR_UV(23,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(17)<1> wDIFF_TEMPORAL(17)<16;16,1> ubCURR_UV(23,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(18)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(18)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(24,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(24,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(24,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,32)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,40)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(18)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(18)<1> ubCURR_UV(24,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(18)<1> wDIFF_TEMPORAL(18)<16;16,1> ubCURR_UV(24,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(19)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(19)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(25,2)<8;8,1> -uwCURBE_TEMP(1,0)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(25,10)<8;8,1> -uwCURBE_TEMP(1,2)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(25,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,48)<8;8,1> uwCURBE_TEMP(1,0)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,56)<8;8,1> uwCURBE_TEMP(1,2)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(19)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(19)<1> ubCURR_UV(25,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_0(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(19)<1> wDIFF_TEMPORAL(19)<16;16,1> ubCURR_UV(25,2)<16;16,1> + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(20)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(20)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(26,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(26,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(26,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,64)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,72)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(20)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(20)<1> ubCURR_UV(26,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(20)<1> wDIFF_TEMPORAL(20)<16;16,1> ubCURR_UV(26,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(21)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(21)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(27,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(27,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(27,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,80)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,88)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(21)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(21)<1> ubCURR_UV(27,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(21)<1> wDIFF_TEMPORAL(21)<16;16,1> ubCURR_UV(27,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(22)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(22)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(28,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(28,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(28,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,96)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,104)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(22)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(22)<1> ubCURR_UV(28,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(22)<1> wDIFF_TEMPORAL(22)<16;16,1> ubCURR_UV(28,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(23)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(23)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(29,2)<8;8,1> -uwCURBE_TEMP(1,4)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(29,10)<8;8,1> -uwCURBE_TEMP(1,6)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(29,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,112)<8;8,1> uwCURBE_TEMP(1,4)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,120)<8;8,1> uwCURBE_TEMP(1,6)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(23)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(23)<1> ubCURR_UV(29,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_1(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(23)<1> wDIFF_TEMPORAL(23)<16;16,1> ubCURR_UV(29,2)<16;16,1> + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(24)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(24)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(30,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(30,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(30,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,128)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,136)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(24)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(24)<1> ubCURR_UV(30,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(24)<1> wDIFF_TEMPORAL(24)<16;16,1> ubCURR_UV(30,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(25)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(25)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(31,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(31,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(31,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,144)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,152)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(25)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(25)<1> ubCURR_UV(31,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(25)<1> wDIFF_TEMPORAL(25)<16;16,1> ubCURR_UV(31,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(26)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(26)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(32,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(32,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(32,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,160)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,168)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(26)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(26)<1> ubCURR_UV(32,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(26)<1> wDIFF_TEMPORAL(26)<16;16,1> ubCURR_UV(32,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(27)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(27)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(33,2)<8;8,1> -uwCURBE_TEMP(1,8)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(33,10)<8;8,1> -uwCURBE_TEMP(1,10)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(33,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,176)<8;8,1> uwCURBE_TEMP(1,8)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,184)<8;8,1> uwCURBE_TEMP(1,10)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(27)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(27)<1> ubCURR_UV(33,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_2(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(27)<1> wDIFF_TEMPORAL(27)<16;16,1> ubCURR_UV(33,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(28)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wDIFF_TEMPORAL(28)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(34,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(34,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(34,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,192)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,200)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wDIFF_TEMPORAL(28)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wDIFF_TEMPORAL(28)<1> ubCURR_UV(34,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wDIFF_TEMPORAL(28)<1> wDIFF_TEMPORAL(28)<16;16,1> ubCURR_UV(34,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(4)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(4)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(35,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(35,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(35,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,208)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,216)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(4)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(4)<1> ubCURR_UV(35,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(4)<1> wCURBE_TEMP(4)<16;16,1> ubCURR_UV(35,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(5)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(5)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(36,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(36,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(36,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,224)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,232)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(5)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(5)<1> ubCURR_UV(36,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(5)<1> wCURBE_TEMP(5)<16;16,1> ubCURR_UV(36,2)<16;16,1> + + cmp.l.f0.0 (16) null<1>:w (abs)wCURBE_TEMP(6)<16;16,1> r61.28<0;2,1>:ub + cmp.l.f1.0 (16) null<1>:w (abs)wCURBE_TEMP(6)<16;16,1> r61.30<0;2,1>:ub + mul (8) acc0.0<1>:w ubCURR_UV(37,2)<8;8,1> -uwCURBE_TEMP(1,12)<0;2,1> + mul (8) acc0.8<1>:w ubCURR_UV(37,10)<8;8,1> -uwCURBE_TEMP(1,14)<0;2,1> + mac (16) acc0<1>:w ubCURR_UV(37,2)<16;16,1> 256:w + mac (8) acc0.0<1>:w ubPREV_UV(8,240)<8;8,1> uwCURBE_TEMP(1,12)<0;2,1> + mac (8) acc0.8<1>:w ubPREV_UV(8,248)<8;8,1> uwCURBE_TEMP(1,14)<0;2,1> + add (16) acc0<1>:w acc0<16;16,1>:w 128:w + (f0.0) shr (16) wCURBE_TEMP(6)<1> acc0<16;16,1>:w 8:w + (-f0.0) mov (16) wCURBE_TEMP(6)<1> ubCURR_UV(37,2)<16;16,1> + cmp.le.f0.0 (16) null<1>:w uwDIFF_TEMPORAL_SUM4x4_TEMP_3(0)<16;16,1> r61.26<0;2,1>:ub + (-f0.0.allv) avg (16) wCURBE_TEMP(6)<1> wCURBE_TEMP(6)<16;16,1> ubCURR_UV(37,2)<16;16,1> + + //Pack Weight History WORD -> BYTE + mov (16) ubCURBE_TEMP(3,0)<1> ubCURBE_TEMP(0)<32;16,2> + mov (16) ubCURBE_TEMP(3,16)<1> ubCURBE_TEMP(1)<32;16,2> + + + +//Module Name : DN_UV_Compute_BNE_UV +//Author : Tatiya, Rupesh +//Description : Computes minimum SOAD for each 16x4 block. + + cmp.l.f0.0 (8) null:w uwSOAD_MIN_8x4(0,12)<16;4,1> uwSOAD_MIN_8x4(2,12)<16;4,1> + (f0.0)sel (8) uwCURBE_TEMP(1,0)<1> uwSOAD_MIN_8x4(0,12)<16;4,1> uwSOAD_MIN_8x4(2,12)<16;4,1> + + mov (8) ubCURBE_TEMP(1)<1> ubCURBE_TEMP(1)<16;8,2> + + + +//File Name : DN_UV_PL3_Unpack_Denoised_UV.asm +//Author : Tatiya, Rupesh +//Description : Upack the interleaved UV data + +//First 16 lines. + mov (8) ubMSGPAYLOAD_U(0,0)<1> ubDIFF_TEMPORAL(0,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(0,16)<1> ubDIFF_TEMPORAL(1,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(0,0)<1> ubDIFF_TEMPORAL(0,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(0,16)<1> ubDIFF_TEMPORAL(1,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(1,0)<1> ubDIFF_TEMPORAL(2,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(1,16)<1> ubDIFF_TEMPORAL(3,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(1,0)<1> ubDIFF_TEMPORAL(2,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(1,16)<1> ubDIFF_TEMPORAL(3,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(2,0)<1> ubDIFF_TEMPORAL(4,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(2,16)<1> ubDIFF_TEMPORAL(5,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(2,0)<1> ubDIFF_TEMPORAL(4,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(2,16)<1> ubDIFF_TEMPORAL(5,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(3,0)<1> ubDIFF_TEMPORAL(6,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(3,16)<1> ubDIFF_TEMPORAL(7,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(3,0)<1> ubDIFF_TEMPORAL(6,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(3,16)<1> ubDIFF_TEMPORAL(7,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(4,0)<1> ubDIFF_TEMPORAL(8,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(4,16)<1> ubDIFF_TEMPORAL(9,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(4,0)<1> ubDIFF_TEMPORAL(8,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(4,16)<1> ubDIFF_TEMPORAL(9,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(5,0)<1> ubDIFF_TEMPORAL(10,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(5,16)<1> ubDIFF_TEMPORAL(11,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(5,0)<1> ubDIFF_TEMPORAL(10,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(5,16)<1> ubDIFF_TEMPORAL(11,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(6,0)<1> ubDIFF_TEMPORAL(12,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(6,16)<1> ubDIFF_TEMPORAL(13,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(6,0)<1> ubDIFF_TEMPORAL(12,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(6,16)<1> ubDIFF_TEMPORAL(13,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(7,0)<1> ubDIFF_TEMPORAL(14,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(7,16)<1> ubDIFF_TEMPORAL(15,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(7,0)<1> ubDIFF_TEMPORAL(14,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(7,16)<1> ubDIFF_TEMPORAL(15,2)<32;8,4> + +//Second 16 lines. +//12 lines first + mov (8) ubMSGPAYLOAD_U(0,8)<1> ubDIFF_TEMPORAL(16,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(0,24)<1> ubDIFF_TEMPORAL(17,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(0,8)<1> ubDIFF_TEMPORAL(16,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(0,24)<1> ubDIFF_TEMPORAL(17,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(1,8)<1> ubDIFF_TEMPORAL(18,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(1,24)<1> ubDIFF_TEMPORAL(19,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(1,8)<1> ubDIFF_TEMPORAL(18,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(1,24)<1> ubDIFF_TEMPORAL(19,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(2,8)<1> ubDIFF_TEMPORAL(20,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(2,24)<1> ubDIFF_TEMPORAL(21,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(2,8)<1> ubDIFF_TEMPORAL(20,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(2,24)<1> ubDIFF_TEMPORAL(21,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(3,8)<1> ubDIFF_TEMPORAL(22,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(3,24)<1> ubDIFF_TEMPORAL(23,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(3,8)<1> ubDIFF_TEMPORAL(22,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(3,24)<1> ubDIFF_TEMPORAL(23,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(4,8)<1> ubDIFF_TEMPORAL(24,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(4,24)<1> ubDIFF_TEMPORAL(25,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(4,8)<1> ubDIFF_TEMPORAL(24,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(4,24)<1> ubDIFF_TEMPORAL(25,2)<32;8,4> + mov (8) ubMSGPAYLOAD_U(5,8)<1> ubDIFF_TEMPORAL(26,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(5,24)<1> ubDIFF_TEMPORAL(27,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(5,8)<1> ubDIFF_TEMPORAL(26,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(5,24)<1> ubDIFF_TEMPORAL(27,2)<32;8,4> + + //3 lines next + mov (8) ubMSGPAYLOAD_U(6,8)<1> ubDIFF_TEMPORAL(28,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(6,24)<1> ubCURBE_TEMP(4,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(6,8)<1> ubDIFF_TEMPORAL(28,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(6,24)<1> ubCURBE_TEMP(4,2)<32;8,4> + + mov (8) ubMSGPAYLOAD_U(7,8)<1> ubCURBE_TEMP(5,0)<32;8,4> + mov (8) ubMSGPAYLOAD_U(7,24)<1> ubCURBE_TEMP(6,0)<32;8,4> + mov (8) ubMSGPAYLOAD_V(7,8)<1> ubCURBE_TEMP(5,2)<32;8,4> + mov (8) ubMSGPAYLOAD_V(7,24)<1> ubCURBE_TEMP(6,2)<32;8,4> + + + +//Module Name : DN_UV_420_Save_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Save Curr Frame Y data for 420 Input + + + +//Module Name : DN_UV_Load_Curr_Frame_Y +//Author : Tatiya, Rupesh +//Description : Saves Y or YUY2 of Current frame. + + + + + mov (8) acc0.0<1>:ud r0.0<8;8,1>:ud + mov (2) acc0.0<1>:d r62.10<2;2,1>:w + + mov (1) acc0.2<1>:d 0xF000F:ud + + mov (8) r92.0<1>:ud acc0.0<8;8,1>:ud + + mov (8) r101.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r110.0<1>:ud acc0.0<8;8,1>:ud + mov (8) r119.0<1>:ud acc0.0<8;8,1>:ud + + add (1) r101.1<1>:d acc0.1<0;1,0>:d 16:d + + add (1) r110.0<1>:d acc0.0<0;1,0>:d 16:d + + add (2) r119.0<1>:d acc0.0<2;2,1>:d 16:d + + send (8) null<1>:d r92 0x5 0x120A8018:ud + send (8) null<1>:d r101 0x5 0x120A8018:ud + send (8) null<1>:d r110 0x5 0x120A8018:ud + send (8) null<1>:d r119 0x5 0x120A8018:ud + + + //TODO - See if History saving can be combined with Curr Frame Save. - rT + + +//Module Name : DN_UV_Save_Hist_UV +//Author : Tatiya, Rupesh +//Description : Saves DN history for UV data. + + mov (8) r3.0<1>:ud r0.0<8;8,1>:ud + mov (2) r3.0<1>:d r62.12<2;2,1>:w + mov (1) r3.2<1>:d 0x30007:ud + + send (8) null<1>:d r3 0x5 0x40A8021:ud + + + +//Module Name : DN_UV_Save_BNE_UV +//Author : Tatiya, Rupesh +//Description : Saves BNE values for 16x16 U and 16x16 V. + + mov (8) r1.0<1>:ud r0.0<8;8,1>:ud + mov (2) r1.0<1>:d r63.12<2;2,1>:w + mov (1) r1.2<1>:d 0x10003:ud + + send (8) null<1>:d r1 0x5 0x40A8023:ud + + + +//File Name : DN_UV_PL3_Save_Curr_Frame_UV.asm +//Author : Tatiya, Rupesh +//Description : Save U and V data for PL3 surface + + + +//Module name : DN_UV_Save_Curr_Frame_UV +//Author : Tatiya, Rupesh +//Description : Saves Current Frame (UV only). + + + + + mov (8) r74<1>:ud r0.0<8;8,1>:ud + mov (8) r83<1>:ud r0.0<8;8,1>:ud + + shr (2) r74.0<1>:d r62.10<2;2,1>:w 1:w + mov (1) r74.2<1>:d 0xF000F:ud + + mov (8) r83.0<1>:ud r74.0<8;8,1>:ud + + send (8) null<1>:d r74 0x5 0x120A8019:ud + send (8) null<1>:d r83 0x5 0x120A801A:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + + //All sub-routines here + + +// Module Name : Noise_Detection +// Author : Tatiya, Rupesh +// Description : Performs noise detection on 32 pixels of U (8x4) and 32 pixels of V (8x4). + +DN_UV_NOISE_DETECTION_UV: + +// Find Field Block Median +// +// Purpose : Find the median value of the nine pixels in the same field +// which are centered at current pixel. +// +// Works on 9 pixels centered at the current pixel +// NOTE: pixels are within same field. +// v4 - current pixel +// +// v2 v1 v0 +// * * * <--- Different field - not used +// v5 v4 v3 +// * * * <--- Different field - not used +// v8 v7 v6 + +// Algorithm to find median modifies the data. +// Copy the data needed to calculate median so the original source data stays intact. +// + +//TODO - Change Interleaved implementation to separated one if - , does not work on predication. - rT + +//Delete Later - rT +//mov (1) pCUR_UV:uw 52*32:uw + +// v0 +mov (16) ubMEDIAN_TEMP(0,0)<1> r[a0.0,0]<16;16,1> +// v0 +mov (16) ubMEDIAN_TEMP(0,16)<1> r[a0.0,32]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(1,0)<1> r[a0.0,2]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(1,16)<1> r[a0.0,34]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(2,0)<1> r[a0.0,4]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(2,16)<1> r[a0.0,36]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(3,0)<1> r[a0.0,64]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(3,16)<1> r[a0.0,96]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(4,0)<1> r[a0.0,66]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(4,16)<1> r[a0.0,98]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(5,0)<1> r[a0.0,68]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(5,16)<1> r[a0.0,100]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(6,0)<1> r[a0.0,128]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(6,16)<1> r[a0.0,160]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(7,0)<1> r[a0.0,130]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(7,16)<1> r[a0.0,162]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(8,0)<1> r[a0.0,132]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(8,16)<1> r[a0.0,164]<16;16,1> + +//TODO - Optimize one instruction here. +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw +// v0 +mov (16) ubMEDIAN_TEMP(9,0)<1> r[a0.0,0]<16;16,1> +// v0 +mov (16) ubMEDIAN_TEMP(9,16)<1> r[a0.0,32]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(10,0)<1> r[a0.0,2]<16;16,1> +// v1 +mov (16) ubMEDIAN_TEMP(10,16)<1> r[a0.0,34]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(11,0)<1> r[a0.0,4]<16;16,1> +// v2 +mov (16) ubMEDIAN_TEMP(11,16)<1> r[a0.0,36]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(12,0)<1> r[a0.0,64]<16;16,1> +// v3 +mov (16) ubMEDIAN_TEMP(12,16)<1> r[a0.0,96]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(13,0)<1> r[a0.0,66]<16;16,1> +// v4 +mov (16) ubMEDIAN_TEMP(13,16)<1> r[a0.0,98]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(14,0)<1> r[a0.0,68]<16;16,1> +// v5 +mov (16) ubMEDIAN_TEMP(14,16)<1> r[a0.0,100]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(15,0)<1> r[a0.0,128]<16;16,1> +// v6 +mov (16) ubMEDIAN_TEMP(15,16)<1> r[a0.0,160]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(16,0)<1> r[a0.0,130]<16;16,1> +// v7 +mov (16) ubMEDIAN_TEMP(16,16)<1> r[a0.0,162]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(17,0)<1> r[a0.0,132]<16;16,1> +// v8 +mov (16) ubMEDIAN_TEMP(17,16)<1> r[a0.0,164]<16;16,1> + +//TODO - Optimize one instruction here. +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw + +// MedianSwap +// +// MedianSwap(inOutLeft, inOutRight) +// { +// if (inOutLeft > inOutRight) +// { +// temp = inOutLeft +// inOutLeft = inOutRight +// inOutRight = temp +// } +// } + +// MedianSwap(v1, v2) - U +// MedianSwap(v4, v5) - U +// MedianSwap(v1, v2) - V +// MedianSwap(v4, v5) - V + +cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> +cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> +cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> +cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(1,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(1,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(1,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> +(f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> +(f1.0) mov (16) ubMEDIAN_TEMP(1,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> +(f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> +(f0.1) mov (16) ubMEDIAN_TEMP(5,0)<2> ubTEMP1(0,16)<16;16,1> +(f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(1,0)<16;16,1> +(f1.1) mov (16) ubMEDIAN_TEMP(5,1)<2> ubTEMP1(1,16)<16;16,1> + +// MedianSwap(v7, v8) - U +// MedianSwap(v0, v1) - U +// MedianSwap(v7, v8) - V +// MedianSwap(v0, v1) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(7,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(0,0)<32;16,2> ubMEDIAN_TEMP(1,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(7,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(0,1)<32;16,2> ubMEDIAN_TEMP(1,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(7,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(0,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(7,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(0,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(7,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(0,0)<2> ubMEDIAN_TEMP(1,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(7,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(0,1)<2> ubMEDIAN_TEMP(1,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(1,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(1,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v3, v4) - U + // MedianSwap(v6, v7) - U + // MedianSwap(v3, v4) - V + // MedianSwap(v6, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(3,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(6,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(3,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(6,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(3,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(6,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(3,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(6,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(3,0)<2> ubMEDIAN_TEMP(4,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(6,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(3,1)<2> ubMEDIAN_TEMP(4,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(6,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(7,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(4,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(7,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v1, v2) - U + // MedianSwap(v4, v5) - U + // MedianSwap(v1, v2) - V + // MedianSwap(v4, v5) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(1,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(1,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(1,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(1,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(5,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(5,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v7, v8) - U + // MedianSwap(v0, v3) - U + // MedianSwap(v7, v8) - V + // MedianSwap(v0, v3) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(7,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(0,0)<32;16,2> ubMEDIAN_TEMP(3,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(7,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(0,1)<32;16,2> ubMEDIAN_TEMP(3,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(7,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(0,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(7,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(0,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(7,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(0,0)<2> ubMEDIAN_TEMP(3,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(7,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(0,1)<2> ubMEDIAN_TEMP(3,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(3,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(3,1)<2> ubTEMP1(1,16)<16;16,1> + + // NOTE: + // Compare v0 to v6 to find the minimum. + // Store the minimum for future use. + //TODO - Find if MIN is needed. + //cmp.l.f0.0 (16) null:w ubMEDIAN_TEMP(%1+0,0)<32;16,2> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //cmp.l.f1.0 (16) null:w ubMEDIAN_TEMP(%1+0,1)<32;16,2> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + //(f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,0)<32;16,2> + //(f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,1)<32;16,2> + //(-f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //(-f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + + // MedianSwap(v5, v8) - U + // MedianSwap(v4, v7) - U + // MedianSwap(v5, v8) - V + // MedianSwap(v4, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(5,0)<32;16,2> ubMEDIAN_TEMP(8,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(5,1)<32;16,2> ubMEDIAN_TEMP(8,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(5,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(5,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(5,0)<2> ubMEDIAN_TEMP(8,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(5,1)<2> ubMEDIAN_TEMP(8,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(8,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(7,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(8,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(7,1)<2> ubTEMP1(1,16)<16;16,1> + +// NOTE: +// Compare v2 to v8 to find the maximum. +// Store the maximum for future use. + //TODO - Find if MAX is needed. +// cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(%1+2,0)<32;16,2> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +// cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(%1+2,1)<32;16,2> ubMEDIAN_TEMP(%1+8,1)<32;16,2> +//(f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,0)<32;16,2> +//(f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,1)<32;16,2> +//(-f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +//(-f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,1)<32;16,2> + +// MedianSwap(v3, v6) - U +// MedianSwap(v1, v4) - U +// MedianSwap(v3, v6) - V +// MedianSwap(v1, v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(3,0)<32;16,2> ubMEDIAN_TEMP(6,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(1,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(3,1)<32;16,2> ubMEDIAN_TEMP(6,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(1,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(6,0)<2> ubMEDIAN_TEMP(3,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(1,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(6,1)<2> ubMEDIAN_TEMP(3,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(1,1)<32;16,2> + + // MedianSwap(v2,v5) - U + // MedianSwap(v4,v7) - U + // MedianSwap(v2,v5) - V + // MedianSwap(v4,v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(2,0)<32;16,2> ubMEDIAN_TEMP(5,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(7,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(2,1)<32;16,2> ubMEDIAN_TEMP(5,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(7,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubMEDIAN_TEMP(5,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(7,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(2,1)<2> ubMEDIAN_TEMP(5,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(7,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(4,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(2,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(2,1)<2> ubTEMP1(0,16)<16;16,1> + + // MedianSwap(v6,v4) - U + // MedianSwap(v6,v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(6,0)<32;16,2> ubMEDIAN_TEMP(4,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(6,1)<32;16,2> ubMEDIAN_TEMP(4,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(6,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(6,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(4,0)<32;16,2> ubMEDIAN_TEMP(2,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(4,1)<32;16,2> ubMEDIAN_TEMP(2,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(4,0)<2> ubMEDIAN_TEMP(2,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(4,1)<2> ubMEDIAN_TEMP(2,1)<32;16,2> +cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> +cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> +cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> +cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(10,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(10,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(10,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> +(f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> +(f1.0) mov (16) ubMEDIAN_TEMP(10,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> +(f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + +(f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> +(f0.1) mov (16) ubMEDIAN_TEMP(14,0)<2> ubTEMP1(0,16)<16;16,1> +(f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(1,0)<16;16,1> +(f1.1) mov (16) ubMEDIAN_TEMP(14,1)<2> ubTEMP1(1,16)<16;16,1> + +// MedianSwap(v7, v8) - U +// MedianSwap(v0, v1) - U +// MedianSwap(v7, v8) - V +// MedianSwap(v0, v1) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(16,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(9,0)<32;16,2> ubMEDIAN_TEMP(10,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(16,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(9,1)<32;16,2> ubMEDIAN_TEMP(10,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(16,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(9,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(16,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(9,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(16,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(9,0)<2> ubMEDIAN_TEMP(10,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(16,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(9,1)<2> ubMEDIAN_TEMP(10,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(10,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(10,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v3, v4) - U + // MedianSwap(v6, v7) - U + // MedianSwap(v3, v4) - V + // MedianSwap(v6, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(12,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(15,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(12,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(15,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(12,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(15,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(12,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(15,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(12,0)<2> ubMEDIAN_TEMP(13,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(15,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(12,1)<2> ubMEDIAN_TEMP(13,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(15,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(16,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(13,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(16,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v1, v2) - U + // MedianSwap(v4, v5) - U + // MedianSwap(v1, v2) - V + // MedianSwap(v4, v5) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(10,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(10,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(10,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(10,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(14,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(14,1)<2> ubTEMP1(1,16)<16;16,1> + + // MedianSwap(v7, v8) - U + // MedianSwap(v0, v3) - U + // MedianSwap(v7, v8) - V + // MedianSwap(v0, v3) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(16,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(9,0)<32;16,2> ubMEDIAN_TEMP(12,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(16,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(9,1)<32;16,2> ubMEDIAN_TEMP(12,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(16,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(9,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(16,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(9,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(16,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(9,0)<2> ubMEDIAN_TEMP(12,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(16,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(9,1)<2> ubMEDIAN_TEMP(12,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(12,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(12,1)<2> ubTEMP1(1,16)<16;16,1> + + // NOTE: + // Compare v0 to v6 to find the minimum. + // Store the minimum for future use. + //TODO - Find if MIN is needed. + //cmp.l.f0.0 (16) null:w ubMEDIAN_TEMP(%1+0,0)<32;16,2> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //cmp.l.f1.0 (16) null:w ubMEDIAN_TEMP(%1+0,1)<32;16,2> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + //(f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,0)<32;16,2> + //(f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+0,1)<32;16,2> + //(-f0.0) mov (16) ubCURR_MIN(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,0)<32;16,2> + //(-f1.0) mov (16) ubCURR_MIN(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+6,1)<32;16,2> + + // MedianSwap(v5, v8) - U + // MedianSwap(v4, v7) - U + // MedianSwap(v5, v8) - V + // MedianSwap(v4, v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(14,0)<32;16,2> ubMEDIAN_TEMP(17,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(14,1)<32;16,2> ubMEDIAN_TEMP(17,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(14,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(1,0)<1> ubMEDIAN_TEMP(14,1)<32;16,2> + mov (16) ubTEMP1(1,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(14,0)<2> ubMEDIAN_TEMP(17,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(14,1)<2> ubMEDIAN_TEMP(17,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(17,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(16,0)<2> ubTEMP1(0,16)<16;16,1> + (f1.0) mov (16) ubMEDIAN_TEMP(17,1)<2> ubTEMP1(1,0)<16;16,1> + (f1.1) mov (16) ubMEDIAN_TEMP(16,1)<2> ubTEMP1(1,16)<16;16,1> + +// NOTE: +// Compare v2 to v8 to find the maximum. +// Store the maximum for future use. + //TODO - Find if MAX is needed. +// cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(%1+2,0)<32;16,2> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +// cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(%1+2,1)<32;16,2> ubMEDIAN_TEMP(%1+8,1)<32;16,2> +//(f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,0)<32;16,2> +//(f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+2,1)<32;16,2> +//(-f0.0) mov (16) ubCURR_MAX(0,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,0)<32;16,2> +//(-f1.0) mov (16) ubCURR_MAX(1,%2*16+0)<1> ubMEDIAN_TEMP(%1+8,1)<32;16,2> + +// MedianSwap(v3, v6) - U +// MedianSwap(v1, v4) - U +// MedianSwap(v3, v6) - V +// MedianSwap(v1, v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(12,0)<32;16,2> ubMEDIAN_TEMP(15,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(10,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(12,1)<32;16,2> ubMEDIAN_TEMP(15,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(10,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(15,0)<2> ubMEDIAN_TEMP(12,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(10,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(15,1)<2> ubMEDIAN_TEMP(12,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(10,1)<32;16,2> + + // MedianSwap(v2,v5) - U + // MedianSwap(v4,v7) - U + // MedianSwap(v2,v5) - V + // MedianSwap(v4,v7) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(11,0)<32;16,2> ubMEDIAN_TEMP(14,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(16,0)<32;16,2> + cmp.g.f1.0 (16) null:w ubMEDIAN_TEMP(11,1)<32;16,2> ubMEDIAN_TEMP(14,1)<32;16,2> + cmp.g.f1.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(16,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubMEDIAN_TEMP(14,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(16,0)<32;16,2> + (f1.0) mov (16) ubMEDIAN_TEMP(11,1)<2> ubMEDIAN_TEMP(14,1)<32;16,2> + (f1.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(16,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + + mov (16) ubTEMP1(0,0)<1> ubMEDIAN_TEMP(13,0)<32;16,2> + mov (16) ubTEMP1(0,16)<1> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(11,0)<2> ubTEMP1(0,0)<16;16,1> + (f0.1) mov (16) ubMEDIAN_TEMP(11,1)<2> ubTEMP1(0,16)<16;16,1> + + // MedianSwap(v6,v4) - U + // MedianSwap(v6,v4) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(15,0)<32;16,2> ubMEDIAN_TEMP(13,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(15,1)<32;16,2> ubMEDIAN_TEMP(13,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(15,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(15,1)<32;16,2> + + // MedianSwap(v4,v2) - U + // MedianSwap(v4,v2) - V + cmp.g.f0.0 (16) null:w ubMEDIAN_TEMP(13,0)<32;16,2> ubMEDIAN_TEMP(11,0)<32;16,2> + cmp.g.f0.1 (16) null:w ubMEDIAN_TEMP(13,1)<32;16,2> ubMEDIAN_TEMP(11,1)<32;16,2> + + (f0.0) mov (16) ubMEDIAN_TEMP(13,0)<2> ubMEDIAN_TEMP(11,0)<32;16,2> + (f0.1) mov (16) ubMEDIAN_TEMP(13,1)<2> ubMEDIAN_TEMP(11,1)<32;16,2> + +// Sobel Value calculation for the current pixel v4 +// v2 v1 v0 +// * * * <--- Different field - not used +// v5 v4 v3 +// * * * <--- Different field - not used +// v8 v7 v6 +// +// Gx = -v0 - 2*v3 - v6 + v2 + 2*v5 + v8 +// Gy = v0 + 2*v1 + v2 - v6 - 2*v7 - v8 +// +// Sobel = (|Gx| + |Gy|) >> 3 + +//TODO - Change Later - rT +add (1) a0.0:uw a0.0<0;1,0>:uw -128:uw + +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,132]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,0]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,4]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(0)<1> r[a0.0,68]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,164]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,32]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,36]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(1)<1> r[a0.0,100]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,196]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,192]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,68]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(2)<1> r[a0.0,132]<16;16,1>:ub 2:w +// - 2 * v3 +mul (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -2:w +// + v8 +mac (16) acc0.0<1>:w r[a0.0,228]<16;16,1>:ub 1:w +// - v0 +mac (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub -1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,224]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,100]<16;16,1>:ub 1:w +// + 2 * v5 +mac (16) wSOBEL_X(3)<1> r[a0.0,164]<16;16,1>:ub 2:w + +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,2]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,0]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,132]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,4]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,128]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,130]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(0)<16;16,1> + +shr (16) uwSOBEL(0)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,34]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,32]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,164]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,36]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,160]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,162]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(1)<16;16,1> + +shr (16) uwSOBEL(1)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,66]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,64]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,196]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,68]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,192]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,194]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(2)<16;16,1> + +shr (16) uwSOBEL(2)<1> acc0.0<16;16,1>:uw 3:uw +// + 2 * v1 +mul (16) acc0.0<1>:w r[a0.0,98]<16;16,1>:ub 2:w +// + v0 +mac (16) acc0.0<1>:w r[a0.0,96]<16;16,1>:ub 1:w +// - v8 +mac (16) acc0.0<1>:w r[a0.0,228]<16;16,1>:ub -1:w +// + v2 +mac (16) acc0.0<1>:w r[a0.0,100]<16;16,1>:ub 1:w +// - v6 +mac (16) acc0.0<1>:w r[a0.0,224]<16;16,1>:ub -1:w +// - 2 * v7 +mac (16) acc0.0<1>:w r[a0.0,226]<16;16,1>:ub -2:w + +add (16) acc0.0<1>:uw (abs)acc0.0<16;16,1>:w (abs)wSOBEL_X(3)<16;16,1> + +shr (16) uwSOBEL(3)<1> acc0.0<16;16,1>:uw 3:uw + +//Mov Median in CURBE_TEMP to free up temp space. +mov (16) ubMEDIAN(0,0)<1> ubMEDIAN_TEMP(4,0)<16;16,1> +mov (16) ubMEDIAN(0,16)<1> ubMEDIAN_TEMP(4,16)<16;16,1> +mov (16) ubMEDIAN(0,32)<1> ubMEDIAN_TEMP(13,0)<16;16,1> +mov (16) ubMEDIAN(0,48)<1> ubMEDIAN_TEMP(13,16)<16;16,1> + +// Find: +// absDiff = abs(ubCurY - ubMedian) +// Find the difference between pixel and median value. + +//Median is interleaved. So difference is also interleaved. + +//------------------------------------------------------------------------------------------ +//Process 16 U and 16 V pixels here and rest later. +// first row - v0,v1,v2 +add (16) wDIFF(0)<1> r[a0.0,0]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(1)<1> r[a0.0,2]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(2)<1> r[a0.0,4]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> + +// second row - v3,v4,v5 +add (16) wDIFF(3)<1> r[a0.0,64]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(4)<1> r[a0.0,66]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(5)<1> r[a0.0,68]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> + +// third row - v6,v7,v8 +add (16) wDIFF(6)<1> r[a0.0,128]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(7)<1> r[a0.0,130]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +add (16) wDIFF(8)<1> r[a0.0,132]<16;16,1>:ub -ubMEDIAN(0,0)<16;16,1> +// first row - v0,v1,v2 +add (16) wDIFF(9)<1> r[a0.0,32]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(10)<1> r[a0.0,34]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(11)<1> r[a0.0,36]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +// second row - v3,v4,v5 +add (16) wDIFF(12)<1> r[a0.0,96]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(13)<1> r[a0.0,98]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(14)<1> r[a0.0,100]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +// third row - v6,v7,v8 +add (16) wDIFF(15)<1> r[a0.0,160]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(16)<1> r[a0.0,162]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> +add (16) wDIFF(17)<1> r[a0.0,164]<16;16,1>:ub -ubMEDIAN(0,16)<16;16,1> + +//TODO - Change Later - rT +add (1) a0.0:uw a0.0<0;1,0>:uw 64:uw + +// Find sum of all absolute differences AND +// maximum absolute difference for 16 U and 16 V here. +//First 2 rows of 8x4 +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(2)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(3)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(6)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(7)<16;16,1> + add (16) uwSOAD(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF(8)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//------------ + //DIFF(0-7) is not needed here. Populate it. + // first row - v0,v1,v2 + add (16) wDIFF(0)<1> r[a0.0,0]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(1)<1> r[a0.0,2]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(2)<1> r[a0.0,4]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + + // second row - v3,v4,v5 + add (16) wDIFF(3)<1> r[a0.0,64]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(4)<1> r[a0.0,66]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(5)<1> r[a0.0,68]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + + // third row - v6,v7 + add (16) wDIFF(6)<1> r[a0.0,128]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> + add (16) wDIFF(7)<1> r[a0.0,130]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> +//------------ + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(0)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> + +//------------ + //Load v8 - DIFF(8) + add (16) wDIFF(8)<1> r[a0.0,132]<16;16,1>:ub -ubMEDIAN(1,0)<16;16,1> +//------------ +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(11)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(12)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(14)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(15)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(16)<16;16,1> + add (16) uwSOAD(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF(17)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//------------ + //DIFF(0-7) is not needed here. Populate it. + // first row - v0,v1,v2 + add (16) wDIFF(9)<1> r[a0.0,32]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(10)<1> r[a0.0,34]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(11)<1> r[a0.0,36]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + + // second row - v3,v4,v5 + add (16) wDIFF(12)<1> r[a0.0,96]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(13)<1> r[a0.0,98]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(14)<1> r[a0.0,100]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + + // third row - v6,v7 + add (16) wDIFF(15)<1> r[a0.0,160]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> + add (16) wDIFF(16)<1> r[a0.0,162]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> +//------------ + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(1)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> + +//------------ + //Load v8 - DIFF(8) + add (16) wDIFF(17)<1> r[a0.0,164]<16;16,1>:ub -ubMEDIAN(1,16)<16;16,1> +//------------ + +//if ((sobel_edge_measure < m_SobelEdgeThreshold) && ((block_max-block_min) < m_LocalDiffThreshold)) +// if (sigma_mb_min > sigma) +// sigma_mb_min = sigma; + +//NOTE: block_min is always zero as median is one of the value in 3x3 block. So no need o calculate it. +// So just do - +//if ((sobel_edge_measure < m_SobelEdgeThreshold) && ((block_max) < m_LocalDiffThreshold) && ( sigma < sigma_mb_min)) +// sigma_mb_min = sigma; + +//We are processing 32 bytes of U and 32 bytes of V - each of size 8x4. +//Compare first 8 bytes with max possible (255). +//Start above condition from second 8 bytes. + +//TODO - Change Later - rT +// mov (1) pCUR_MIN_SOAD_8x4:uw 1752:uw //r54.24:ub + +//First row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(0)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(0)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(0)<16;16,1> 255:uw +(f0.0) sel (16) uwSOBEL(0)<1> uwSOAD(0)<16;16,1> 255:uw + +//Second row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(1)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(1)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(1)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(1)<16;16,1> + +// Find sum of all absolute differences AND +// maximum absolute difference for 16 U and 16 V here. +//Second 2 rows of 8x4 +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(2)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(3)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(4)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(5)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(6)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(7)<16;16,1> + add (16) uwSOAD(0)<1> acc0.0<16;16,1>:uw (abs)wDIFF(8)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(0)<16;16,1> (abs)wDIFF(1)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(2)<16;16,1> (abs)wDIFF(3)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(4)<16;16,1> (abs)wDIFF(5)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(6)<16;16,1> (abs)wDIFF(7)<16;16,1> + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(0)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(8)<16;16,1> +//Compare 0-1, 2-3, 4-5, 6-7 +cmp.g.f0.0 (16) null:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +cmp.g.f0.1 (16) null:uw (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +cmp.g.f1.0 (16) null:uw (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +cmp.g.f1.1 (16) null:uw (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Calculate SAD + add (16) acc0.0<1>:uw (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(11)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(12)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(13)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(14)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(15)<16;16,1> + add (16) acc0.0<1>:uw acc0.0<16;16,1>:uw (abs)wDIFF(16)<16;16,1> + add (16) uwSOAD(1)<1> acc0.0<16;16,1>:uw (abs)wDIFF(17)<16;16,1> + +(f0.0) sel (16) uwCURBE_TEMP(0)<1> (abs)wDIFF(9)<16;16,1> (abs)wDIFF(10)<16;16,1> +(f0.1) sel (16) uwCURBE_TEMP(1)<1> (abs)wDIFF(11)<16;16,1> (abs)wDIFF(12)<16;16,1> +(f1.0) sel (16) uwCURBE_TEMP(2)<1> (abs)wDIFF(13)<16;16,1> (abs)wDIFF(14)<16;16,1> +(f1.1) sel (16) uwCURBE_TEMP(3)<1> (abs)wDIFF(15)<16;16,1> (abs)wDIFF(16)<16;16,1> + +//Compare Max(0,1) - Max(2,3), Max(4,5) - Max(6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +cmp.g.f0.1 (16) null:uw uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(1)<16;16,1> +(f0.1)sel (16) uwCURBE_TEMP(2)<1> uwCURBE_TEMP(2)<16;16,1> uwCURBE_TEMP(3)<16;16,1> + +//Compare Max(0,1,2,3) - Max(4,5,6,7) +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> +(f0.0)sel (16) uwCURBE_TEMP(0)<1> uwCURBE_TEMP(0)<16;16,1> uwCURBE_TEMP(2)<16;16,1> + +//Compare Max(0,1,2,3,4,5,6,7) - 8 +cmp.g.f0.0 (16) null:uw uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> +(f0.0)sel (16) uwMAX_ABS_DIFF(1)<1> uwCURBE_TEMP(0)<16;16,1> (abs)wDIFF(17)<16;16,1> + +//Third row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(2)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(0)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(0)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(0)<16;16,1> + +//Fourth row of 8x4 + cmp.l.f0.0 (16) null:uw uwSOBEL(3)<16;16,1> r55.30<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwMAX_ABS_DIFF(1)<16;16,1> r55.28<0;2,1>:ub +(f0.0) cmp.l.f0.0 (16) null:uw uwSOAD(1)<16;16,1> uwSOBEL(0)<16;16,1> +(f0.0) mov (16) uwSOBEL(0)<1> uwSOAD(1)<16;16,1> + + cmp.l.f0.0 (8) null:uw uwSOBEL(0,0)<8;8,1> uwSOBEL(0,8)<8;8,1> +(f0.0) sel (8) uwSOBEL(0)<1> uwSOBEL(0,0)<8;8,1> uwSOBEL(0,8)<8;8,1> + + cmp.l.f0.0 (4) null:uw uwSOBEL(0,0)<4;4,1> uwSOBEL(0,4)<4;4,1> +(f0.0) sel (4) uwSOBEL(0)<1> uwSOBEL(0,0)<4;4,1> uwSOBEL(0,4)<4;4,1> + + cmp.l.f0.0 (2) null:uw uwSOBEL(0,0)<2;2,1> uwSOBEL(0,2)<2;2,1> +(f0.0) sel (2) r[a0.1,0]<1>:uw uwSOBEL(0,0)<2;2,1> uwSOBEL(0,2)<2;2,1> + + + + + + +// End of common.inc + +mov (1) ip:ud r9.7<0;1,0>:d + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL3_TO_PA +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL3.g4a" +#include "PL3_AVS_Buf_0.g4a" +#include "PL3_AVS_Buf_1.g4a" +#include "PL3_AVS_Buf_2.g4a" +#include "PL3_AVS_Buf_3.g4a" +#include "Save_AVS_PA.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pa.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pa.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pa.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pa.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,709 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002c0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082e2c, 0x0069005c, 0x03a003a0 }, + { 0x00000409, 0x23603da5, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x236401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x08000800 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000002 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000006 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000a }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000e }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pa.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pa.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pa.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pa.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,709 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000058 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082e2c, 0x0069005c, 0x03a003a0 }, + { 0x00000409, 0x23603da5, 0x00000120, 0x00010001 }, + { 0x00000c01, 0x236401a5, 0x00000122, 0x00000000 }, + { 0x00000801, 0x23680061, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x80400040, 0xc0002d29, 0x008a8000, 0x00800080 }, + { 0x80400040, 0xc0202d29, 0x008a8020, 0x00800080 }, + { 0x80400040, 0xc0402d29, 0x008a8040, 0x00800080 }, + { 0x80400040, 0xc0602d29, 0x008a8060, 0x00800080 }, + { 0x80600040, 0xa4002d29, 0x008d8400, 0x00800080 }, + { 0x80600040, 0xa4202d29, 0x008d8420, 0x00800080 }, + { 0x80600040, 0xa4402d29, 0x008d8440, 0x00800080 }, + { 0x80600040, 0xa4602d29, 0x008d8460, 0x00800080 }, + { 0x80400040, 0xc8002d29, 0x008a8800, 0x00800080 }, + { 0x80400040, 0xc8202d29, 0x008a8820, 0x00800080 }, + { 0x80400040, 0xc8402d29, 0x008a8840, 0x00800080 }, + { 0x80400040, 0xc8602d29, 0x008a8860, 0x00800080 }, + { 0x80400040, 0xc0102d29, 0x008a8010, 0x00800080 }, + { 0x80400040, 0xc0302d29, 0x008a8030, 0x00800080 }, + { 0x80400040, 0xc0502d29, 0x008a8050, 0x00800080 }, + { 0x80400040, 0xc0702d29, 0x008a8070, 0x00800080 }, + { 0x80600040, 0xa4102d29, 0x008d8410, 0x00800080 }, + { 0x80600040, 0xa4302d29, 0x008d8430, 0x00800080 }, + { 0x80600040, 0xa4502d29, 0x008d8450, 0x00800080 }, + { 0x80600040, 0xa4702d29, 0x008d8470, 0x00800080 }, + { 0x80400040, 0xc8102d29, 0x008a8810, 0x00800080 }, + { 0x80400040, 0xc8302d29, 0x008a8830, 0x00800080 }, + { 0x80400040, 0xc8502d29, 0x008a8850, 0x00800080 }, + { 0x80400040, 0xc8702d29, 0x008a8870, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x08000800 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000002 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x02000200 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000004 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x00000006 }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x00000008 }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000a }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x06000600 }, + { 0x00000040, 0x23841ca5, 0x00000364, 0x0000000c }, + { 0x00000040, 0x24a41ca5, 0x00000364, 0x0000000e }, + { 0x00600401, 0xf8000231, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0xf8200231, 0x00cf8021, 0x00000000 }, + { 0x00800c01, 0xd0000231, 0x00d28401, 0x00000000 }, + { 0x00800c01, 0xd0200231, 0x00d28421, 0x00000000 }, + { 0x00600801, 0xf4000231, 0x00cf8801, 0x00000000 }, + { 0x00600801, 0xf4200231, 0x00cf8821, 0x00000000 }, + { 0x00600401, 0xf9200231, 0x00cf8041, 0x00000000 }, + { 0x00600401, 0xf9400231, 0x00cf8061, 0x00000000 }, + { 0x00800c01, 0xd1200231, 0x00d28441, 0x00000000 }, + { 0x00800c01, 0xd1400231, 0x00d28461, 0x00000000 }, + { 0x00600801, 0xf5200231, 0x00cf8841, 0x00000000 }, + { 0x00600801, 0xf5400231, 0x00cf8861, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x060a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl2.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl2.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl2.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL3_TO_PL2 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL3.g4a" +#include "PL3_AVS_Buf_0.g4a" +#include "PL3_AVS_Buf_1.g4a" +#include "PL3_AVS_Buf_2.g4a" +#include "PL3_AVS_Buf_3.g4a" +#include "Save_AVS_NV12.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl2.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl2.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl2.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl2.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,616 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002c0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl2.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl2.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl2.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl2.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,616 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000058 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL3_TO_PL3 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_PL3.g4a" +#include "PL3_AVS_Buf_0.g4a" +#include "PL3_AVS_Buf_1.g4a" +#include "PL3_AVS_Buf_2.g4a" +#include "PL3_AVS_Buf_3.g4a" +#include "Save_AVS_PL3.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl3.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl3.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl3.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl3.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,619 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002c0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000002b0 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00200408, 0x24a03da5, 0x00450120, 0x00010001 }, + { 0x00200408, 0x25c03da5, 0x00450120, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x00070007 }, + { 0x00000801, 0x25c80061, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24c80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x25e00231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x25e80231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24d00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24d80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x25f00231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x25f80231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24e00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24e80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x26000231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x26080231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24f00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24f80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x26100231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x26180231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8019 }, + { 0x05000031, 0x20000e24, 0x000005c0, 0x060a801a }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl3.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl3.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/pl3_to_pl3.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/pl3_to_pl3.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,619 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000058 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000056 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000d000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x00000001, 0x21d403bd, 0x00000228, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x00000001, 0x222803bd, 0x000001d4, 0x00000000 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044eb801 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e800229, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x044ebc02 }, + { 0x00000001, 0x22080061, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00200408, 0x24a03da5, 0x00450120, 0x00010001 }, + { 0x00200408, 0x25c03da5, 0x00450120, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x00070007 }, + { 0x00000801, 0x25c80061, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24c80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x25e00231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x25e80231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24d00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24d80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x25f00231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x25f80231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x24e00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x24e80231, 0x00cf8841, 0x00000000 }, + { 0x00600401, 0x26000231, 0x00cf8001, 0x00000000 }, + { 0x00600c01, 0x26080231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600c01, 0x24f00231, 0x00cf9801, 0x00000000 }, + { 0x00600801, 0x24f80231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x26100231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x26180231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x060a8019 }, + { 0x05000031, 0x20000e24, 0x000005c0, 0x060a801a }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL_DI_422CP.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL_DI_422CP.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL_DI_422CP.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL_DI_422CP.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,483 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 87 // Total instruction count +// 1 // Total kernel count + +.kernel PL_DI_422CP +.code + + + +// FileName: DI.asm +// Author: Vivek Kumar +// Description: Tasks for DI only case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DI_Save_422CP_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in 422 format to Color Pipe (IECP) + + +.declare mubMSGHDR_DI_OUT1_1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT1_2 Base=r21.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_1 Base=r24.0 ElementSize=1 Type=ub + + +.declare mubMSGHDR_DI_OUT2_2 Base=r27.0 ElementSize=1 Type=ub + + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:ud r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:ud r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3000F:ud { NoDDClr, NoDDChk } // Block width and height (16x8) + +//M0.3 - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer +//Compose area-of-interest bit + color pipe state pointer +or (1) r27.3<1>:ud r2.4<0;1,0>:ud r9.26<0;1,0>:b { NoDDChk } + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r24.0<1>:ud r27<8;8,1>:ud + + +// Pack 2nd field Y; First 8x4 block + mov (8) mubMSGHDR_DI_OUT1_1(1)<2> ubDNDI_RESP(0,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(1,16)<2> ubDNDI_RESP(0,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2)<2> ubDNDI_RESP(0,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_1(2,16)<2> ubDNDI_RESP(0,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; First 8x4 block + mov (4) mubMSGHDR_DI_OUT1_1(1,1)<4> ubDNDI_RESP(2,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,17)<4> ubDNDI_RESP(2,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(1,3)<4> ubDNDI_RESP(2,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(1,19)<4> ubDNDI_RESP(2,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,1)<4> ubDNDI_RESP(2,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,17)<4> ubDNDI_RESP(2,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_1(2,3)<4> ubDNDI_RESP(2,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_1(2,19)<4> ubDNDI_RESP(2,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + + +// Pack 2nd field Y; Second 8x4 block +mov (8) r21.0<1>:ud r18.0<8;8,1>:ud +add (1) r21.0<1>:ud r21.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT1_2(1)<2> ubDNDI_RESP(0,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(1,16)<2> ubDNDI_RESP(0,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2)<2> ubDNDI_RESP(0,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT1_2(2,16)<2> ubDNDI_RESP(0,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 2nd field U, V; Second 8x4 block + mov (4) mubMSGHDR_DI_OUT1_2(1,1)<4> ubDNDI_RESP(2,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,17)<4> ubDNDI_RESP(2,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(1,3)<4> ubDNDI_RESP(2,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(1,19)<4> ubDNDI_RESP(2,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,1)<4> ubDNDI_RESP(2,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,17)<4> ubDNDI_RESP(2,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT1_2(2,3)<4> ubDNDI_RESP(2,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT1_2(2,19)<4> ubDNDI_RESP(2,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r18.0 0x5 0x60A801B:ud +send (8) null<1>:d r21.0 0x5 0x60A801B:ud + +// Pack 1st field Y; 1st 8x4 block + mov (8) mubMSGHDR_DI_OUT2_1(1)<2> ubDNDI_RESP(4,0)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(1,16)<2> ubDNDI_RESP(4,16)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2)<2> ubDNDI_RESP(4,32)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_1(2,16)<2> ubDNDI_RESP(4,48)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U,V; 1st 8x4 block + mov (4) mubMSGHDR_DI_OUT2_1(1,1)<4> ubDNDI_RESP(6,1)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,17)<4> ubDNDI_RESP(6,17)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(1,3)<4> ubDNDI_RESP(6,0)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(1,19)<4> ubDNDI_RESP(6,16)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,1)<4> ubDNDI_RESP(6,33)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,17)<4> ubDNDI_RESP(6,49)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_1(2,3)<4> ubDNDI_RESP(6,32)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_1(2,19)<4> ubDNDI_RESP(6,48)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +// Pack 1st field Y; 2nd 8x4 block +mov (8) r27.0<1>:ud r24.0<8;8,1>:ud +add (1) r27.0<1>:ud r27.0<0;1,0>:w 0x10:w + + mov (8) mubMSGHDR_DI_OUT2_2(1)<2> ubDNDI_RESP(4,8)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(1,16)<2> ubDNDI_RESP(4,24)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2)<2> ubDNDI_RESP(4,40)<8;8,1> { NoDDClr } // copy line of Y directly to memory as optimization + mov (8) mubMSGHDR_DI_OUT2_2(2,16)<2> ubDNDI_RESP(4,56)<8;8,1> { NoDDClr, NoDDChk } // copy line of Y directly to memory as optimization + +// Pack 1st field U, V; 2nd 8x4 block + mov (4) mubMSGHDR_DI_OUT2_2(1,1)<4> ubDNDI_RESP(6,9)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,17)<4> ubDNDI_RESP(6,25)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(1,3)<4> ubDNDI_RESP(6,8)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(1,19)<4> ubDNDI_RESP(6,24)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,1)<4> ubDNDI_RESP(6,41)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,17)<4> ubDNDI_RESP(6,57)<8;4,2> { NoDDClr, NoDDChk } // copy line of U directly to memory as optimization + + mov (4) mubMSGHDR_DI_OUT2_2(2,3)<4> ubDNDI_RESP(6,40)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + mov (4) mubMSGHDR_DI_OUT2_2(2,19)<4> ubDNDI_RESP(6,56)<8;4,2> { NoDDChk } // copy line of V directly to memory as optimization + +send (8) null<1>:d r24.0 0x5 0x60A801E:ud +send (8) null<1>:d r27.0 0x5 0x60A801E:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL_DI_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL_DI_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/PL_DI_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/PL_DI_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,421 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 57 // Total instruction count +// 1 // Total kernel count + +.kernel PL_DI_PA +.code + + + +// FileName: DI.asm +// Author: Vivek Kumar +// Description: Tasks for DI only case (16x4 block) + + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: DNDI.inc +// Author: Vivek Kumar +// Description: Include file for DN, DI and DNDI +// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED + + + + +// End of common.inc + + +//Interface: +//Static Parameters: +//r1 + + +//====================== Binding table (Explicit To DNDI)========================================= + + +.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud +.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d +.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w + + +.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud + + +.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud + + +.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud +.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw +.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud +.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d +.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud +.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d +.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud +.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud + + +.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub + + +.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud +.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub + +//r45 +//Use r45 as message header, so no need to "mov" the data. + +.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5 +.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +// Message response (UV Copy); Use buffer 5 +.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Temp GRFs: For 42X to 422 Conversion +.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs +.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs +//--------------------------------------------------------------------------- +// Message descriptors +//--------------------------------------------------------------------------- +// Extended message descriptor + // Message descriptor for sampler read + // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11) + // 1 (header present 1) 0 11 (SIMD32/64 mode) + // 1000 (message type) 0000 (DI state index) + // 00000000 (binding table index - set later) + // = 0x040b8000 + + +// Attention: The Message Length is The Number of GRFs with Data Only, without the Header + + +//--------------------------------------------------------------------------- +// VDI Return Data format +//--------------------------------------------------------------------------- +// Defines for DI enabled + + +// Defines for DI disabled + + + +// FileName: DNDI_Command.asm +// Author: Vivek Kumar +// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block + +// Prepare the DNDI send command +mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header +mov (1) mwMSGHDR_DNDI(1,4)<1> r9.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK +mov (1) mwMSGHDR_DNDI(1,12)<1> r9.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK + +send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud + +// On Gen6, with VDI walker, use the XY pair returned rather than programmed above +// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled +mov (2) r9.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15 + + + +// FileName: DI_STMM_Save.asm +// Author: Vivek Kumar +// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block) + +// Write STMM to memory +mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header +mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF + +shr (1) mudMSGHDR_STMM(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2 +mov (1) mudMSGHDR_STMM(0,1)<1> r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin +mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4) + +send (8) null<1>:d r20 0x5 0x40A8021:ud + + + +// FileName: DNDI_Enc_Stats_Save.asm +// Author: Vivek Kumar +// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block) + +// Write encoder statistics to memory +//Currently enable this only on Gen6 validation +mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF +mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header + +shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r9.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2 +mul (1) acc0.1<1>:ud r9.1<0;1,0>:w 3:w // Y origin * 3 +shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4 +mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3) +add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin + + + //Data block for Encoder Statistics + //---------------------------------------------------- + //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes + //---------------------------------------------------- + //| BNE | MCNT | FCNT | TCNT | X | X | X | X | + //---------------------------------------------------- + //| DcTpT | SVCM | DcBpT | DcTpB | + //---------------------------------------------------- + //| SHCM | STAD | DcTcB | DcBpB | + //---------------------------------------------------- + mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF + mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF + + +send (8) null<1>:d r24 0x5 0x40A8021:ud + + + +// FileName: DI_Save_PA_16x4.asm +// Author: Vivek Kumar +// Description: Save two 16x4 blocks of DI output in Packed format + + +add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20 + +mov (8) r27.0<1>:ud r0.0<8;8,1>:ud +shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be doubled +mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin +mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x8) + +//prepare the message headers +mov (8) r18.0<1>:ud r27<8;8,1>:ud +mov (8) r23.0<1>:ud r27<8;8,1>:ud + +// Pack 2nd field Y + mov (16) r[a0.4, 0]<2> ubDNDI_RESP(0,0) { NoDDClr } + mov (16) r[a0.4, 32]<2> ubDNDI_RESP(0,16) { NoDDClr } + mov (16) r[a0.4, 64]<2> ubDNDI_RESP(0,32) { NoDDClr } + mov (16) r[a0.4, 96]<2> ubDNDI_RESP(0,48) { NoDDClr } +// Pack 2nd field U + mov (8) r[a0.5, 0]<4> ubDNDI_RESP(2,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 32]<4> ubDNDI_RESP(2,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 64]<4> ubDNDI_RESP(2,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 96]<4> ubDNDI_RESP(2,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 2nd field V + mov (8) r[a0.6, 0]<4> ubDNDI_RESP(2,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 32]<4> ubDNDI_RESP(2,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 64]<4> ubDNDI_RESP(2,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 96]<4> ubDNDI_RESP(2,48)<16;8,2> { NoDDChk } //Vpixels + +// Pack 1st field Y + mov (16) r[a0.4, 160]<2> ubDNDI_RESP(4,0) { NoDDClr } + mov (16) r[a0.4, 192]<2> ubDNDI_RESP(4,16) { NoDDClr } + mov (16) r[a0.4, 224]<2> ubDNDI_RESP(4,32) { NoDDClr } + mov (16) r[a0.4, 256]<2> ubDNDI_RESP(4,48) { NoDDClr } +// Pack 1st field U + mov (8) r[a0.5, 160]<4> ubDNDI_RESP(6,1)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 192]<4> ubDNDI_RESP(6,17)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 224]<4> ubDNDI_RESP(6,33)<16;8,2> { NoDDClr, NoDDChk } //U pixels + mov (8) r[a0.5, 256]<4> ubDNDI_RESP(6,49)<16;8,2> { NoDDClr, NoDDChk } //U pixels +// Pack 1st field V + mov (8) r[a0.6, 160]<4> ubDNDI_RESP(6,0)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 192]<4> ubDNDI_RESP(6,16)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 224]<4> ubDNDI_RESP(6,32)<16;8,2> { NoDDChk } //Vpixels + mov (8) r[a0.6, 256]<4> ubDNDI_RESP(6,48)<16;8,2> { NoDDChk } //Vpixels + +//save the previous frame +send (8) null<1>:d r18.0 0x5 0xA0A801B:ud + +//save the current frame +send (8) null<1>:d r23.0 0x5 0xA0A801E:ud + + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 + + +.end_code +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/RGB_to_YUV.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/RGB_to_YUV.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/RGB_to_YUV.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/RGB_to_YUV.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,932 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: + * Zhao Yakui + */ + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: YUV_to_RGB.asm +// +// Convert YUV to RGB, handle it by 16x4 block +// + + +// Description: Includes all definitions explicit to Fast Composite. + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare bBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +//Pointer to mask reg + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + +//Unnecessary to use the MSGPayLoad, So it is temporiarily used for conversion of YUV->RGB + +.declare fBUFFER_R Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_G Base=r30.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_B Base=r32.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + +.declare fBUFFER_Y Base=r36.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_U Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_V Base=r40.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + +.declare wTempY Base=r42.0 ElementSize=2 Type=w +.declare wTempU Base=r44.0 ElementSize=2 Type=w +.declare wTempV Base=r46.0 ElementSize=2 Type=w + +.declare ubTempY Base=r42.0 ElementSize=1 Type=ub +.declare ubTempU Base=r44.0 ElementSize=1 Type=ub +.declare ubTempV Base=r46.0 ElementSize=1 Type=ub + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + // ITU-R conversion, Now we are using ITU-R conversion + // Y = 0.299R + 0.587G + 0.114B + // U = -0.169R - 0.331G + 0.499B + 128 + // V = 0.499R - 0.418G - 0.0813B+ 128 + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + //It always uses the YUVA layout. +//for BUFFER_0 + mov (4) a0.0<1>:uw r22.0<4;4,1>:uw + mov (4) a0.4<1>:uw r22.0<4;4,1>:uw + // YUV uses the a0.5,a0.6 and a0.4 as the indirect-register + // Y = a0.5, U=a0.6, V=a0.4 + // if channel swap? + // This means that it should be BGRX(B is the LSB) or RGBX + // 1 means that it is BGRX. + and.nz.f0.0 null<1>:w r2.0<0;1,0>:uw 0x01:w + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0:uw + (f0.0) mov (1) a0.0:uw a0.1:uw + (f0.0) mov (1) a0.1:uw uwTemp0<0;1,0> + +//the first line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + + +//the second line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + +//for Buffer_1 + + add (8) a0.0<1>:uw a0.0<8;8,1>:uw 512:uw +//the first line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + + +//the second line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + +//for Buffer_2 + add (8) a0.0<1>:uw a0.0<8;8,1>:uw 512:uw +//the first line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + +//the second line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + +//for Buffer_3 + add (8) a0.0<1>:uw a0.0<8;8,1>:uw 512:uw +//the first line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + + +//the second line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/rgbx_to_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/rgbx_to_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/rgbx_to_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/rgbx_to_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: AVS +.kernel RGBX_TO_NV12 +.code + +#include "VP_Setup.g4a" +#include "Set_Layer_0.g4a" +#include "Set_AVS_Buf_0123_BGRA.g4a" +#include "PA_AVS_Buf_0.g4a" +#include "PA_AVS_Buf_1.g4a" +#include "PA_AVS_Buf_2.g4a" +#include "PA_AVS_Buf_3.g4a" +#include "RGB_to_YUV.g4a" +#include "Save_AVS_NV12.g4a" +#include "EOT.g4a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/rgbx_to_nv12.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/rgbx_to_nv12.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/rgbx_to_nv12.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/rgbx_to_nv12.g75b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,1009 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000090 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x000000f0 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000180 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x000000d0 }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000240 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000230 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x000001a0 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22000128, 0x006902c0, 0x00000000 }, + { 0x00400001, 0x22080128, 0x006902c0, 0x00000000 }, + { 0x02800005, 0x20003d2c, 0x00000040, 0x00010001 }, + { 0x00010001, 0x22200109, 0x00000200, 0x00000000 }, + { 0x00010001, 0x22000108, 0x00000202, 0x00000000 }, + { 0x00010001, 0x22020128, 0x00000220, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22002d08, 0x008d0200, 0x02000200 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22002d08, 0x008d0200, 0x02000200 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22002d08, 0x008d0200, 0x02000200 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/rgbx_to_nv12.g7b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/rgbx_to_nv12.g7b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/rgbx_to_nv12.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/rgbx_to_nv12.g7b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,1009 @@ + { 0x00600001, 0x23600021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200021, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400021, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x206077bd, 0x008d0060, 0x00000130 }, + { 0x00200001, 0x211401bd, 0x00450120, 0x00000000 }, + { 0x01600010, 0x20002e24, 0x0000005a, 0x00010001 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00000000 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000114 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240003bc, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c077bd, 0x00000060, 0x00000220 }, + { 0x00000001, 0x240003bc, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a077bd, 0x00000080, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00020002 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000114 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240403bc, 0x000000c4, 0x00000000 }, + { 0x00110048, 0x20c477bd, 0x00000064, 0x00000220 }, + { 0x00000001, 0x240403bc, 0x000000a4, 0x00000000 }, + { 0x00000048, 0x20a477bd, 0x00000084, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00040004 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000114 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240803bc, 0x000000c8, 0x00000000 }, + { 0x00110048, 0x20c877bd, 0x00000068, 0x00000220 }, + { 0x00000001, 0x240803bc, 0x000000a8, 0x00000000 }, + { 0x00000048, 0x20a877bd, 0x00000088, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00060006 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000114 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x240c03bc, 0x000000cc, 0x00000000 }, + { 0x00110048, 0x20cc77bd, 0x0000006c, 0x00000220 }, + { 0x00000001, 0x240c03bc, 0x000000ac, 0x00000000 }, + { 0x00000048, 0x20ac77bd, 0x0000008c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x00080008 }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000114 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241003bc, 0x000000d0, 0x00000000 }, + { 0x00110048, 0x20d077bd, 0x00000070, 0x00000220 }, + { 0x00000001, 0x241003bc, 0x000000b0, 0x00000000 }, + { 0x00000048, 0x20b077bd, 0x00000090, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000a000a }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000114 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241403bc, 0x000000d4, 0x00000000 }, + { 0x00110048, 0x20d477bd, 0x00000074, 0x00000220 }, + { 0x00000001, 0x241403bc, 0x000000b4, 0x00000000 }, + { 0x00000048, 0x20b477bd, 0x00000094, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000c000c }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000114 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241803bc, 0x000000d8, 0x00000000 }, + { 0x00110048, 0x20d877bd, 0x00000078, 0x00000220 }, + { 0x00000001, 0x241803bc, 0x000000b8, 0x00000000 }, + { 0x00000048, 0x20b877bd, 0x00000098, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000008, 0x22202d29, 0x00000044, 0x000e000e }, + { 0x00000005, 0x22202d29, 0x00000220, 0x00030003 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00010001 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000012 }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00020002 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x01000010, 0x20002d2c, 0x02000220, 0x00030003 }, + { 0x00010220, 0x34001c00, 0x02001400, 0x00000030 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000114 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000118 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000118 }, + { 0x00000001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x00000024 }, + { 0x00110001, 0x2200013d, 0x00000040, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004114, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00000040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00000040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000220 }, + { 0x00000220, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00110001, 0x2200013d, 0x00000042, 0x00000000 }, + { 0x00110040, 0x222077bd, 0x00004118, 0x00000200 }, + { 0x00110040, 0x22207fbd, 0x00000220, 0xc1800000 }, + { 0x00110001, 0x241c03bc, 0x000000dc, 0x00000000 }, + { 0x00110048, 0x20dc77bd, 0x0000007c, 0x00000220 }, + { 0x00000001, 0x241c03bc, 0x000000bc, 0x00000000 }, + { 0x00000048, 0x20bc77bd, 0x0000009c, 0x00000114 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a00169, 0x00000000, 0xffffffff }, + { 0x02000010, 0x20002d24, 0x02000124, 0x00000000 }, + { 0x02010010, 0x20002d24, 0x02000126, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x0000001a }, + { 0x00000005, 0x23022d31, 0x00000044, 0x00030003 }, + { 0x00000401, 0x233803bd, 0x00000134, 0x00000000 }, + { 0x00000c01, 0x233003bd, 0x00000060, 0x00000000 }, + { 0x00000c01, 0x233403bd, 0x00000080, 0x00000000 }, + { 0x00000c01, 0x232803bd, 0x000000c0, 0x00000000 }, + { 0x00000801, 0x232c03bd, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x240803bc, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24087fbc, 0x00000060, 0x41000000 }, + { 0x00000448, 0x22e87fbd, 0x00000134, 0x41e00000 }, + { 0x00000c41, 0x22e47fbd, 0x00000080, 0x40800000 }, + { 0x00000001, 0x241003bc, 0x00000060, 0x00000000 }, + { 0x00000c48, 0x22f07fbd, 0x00000134, 0x41000000 }, + { 0x00000801, 0x22f40061, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006ea2 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00460046 }, + { 0x00400009, 0x22c02d8d, 0x00690400, 0x00050005 }, + { 0x00400001, 0x2400036c, 0x00000000, 0x00006204 }, + { 0x00400040, 0x24002d8c, 0x00690400, 0x00400040 }, + { 0x00400409, 0x22402d8d, 0x00690400, 0x00050005 }, + { 0x00000801, 0x22500061, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00061, 0x00000000, 0x00400040 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000048 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000401, 0x233c0021, 0x0000013c, 0x00000000 }, + { 0x00000801, 0x23240121, 0x00000138, 0x00000000 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x28000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000001 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2a000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000002 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2c000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00110220, 0x34001c00, 0x02001400, 0x00000046 }, + { 0x00000040, 0x22000c20, 0x000002f4, 0x050eb400 }, + { 0x00000001, 0x22080061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23240d21, 0x00000138, 0x00000003 }, + { 0x00600001, 0x22200021, 0x008d0320, 0x00000000 }, + { 0x00000001, 0x21d00109, 0x00000600, 0x00000000 }, + { 0x02000005, 0x20002d28, 0x00000046, 0x00020002 }, + { 0x00110220, 0x34001c00, 0x00001400, 0x00000034 }, + { 0x02600005, 0x20002d28, 0x00000046, 0x00040004 }, + { 0x00610001, 0x240003bc, 0x00000228, 0x00000000 }, + { 0x00610048, 0x24007fbc, 0x00000230, 0xc0000000 }, + { 0x00610048, 0x24007fbc, 0x00000238, 0x40400000 }, + { 0x00010001, 0x21c8039d, 0x00210400, 0x00000000 }, + { 0x00110001, 0x21c803bd, 0x00000228, 0x00000000 }, + { 0x00000005, 0x21c42d21, 0x00000046, 0xfff8fff8 }, + { 0x0000000c, 0x21c41c21, 0x000001c4, 0x00000003 }, + { 0x00000001, 0x21c4003d, 0x000001c4, 0x00000000 }, + { 0x00000041, 0x21c077bd, 0x000001c8, 0x000001c4 }, + { 0x00000040, 0x21c87fbd, 0x000001c0, 0x3ca00000 }, + { 0x00000040, 0x21cc7fbd, 0x000001c0, 0x3f7f0000 }, + { 0x05000010, 0x20007fbc, 0x000001c0, 0x00000000 }, + { 0x00000001, 0x21c003a5, 0x000001c0, 0x00000000 }, + { 0x00010040, 0x21c01ca5, 0x000001c0, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001c8, 0x00000000 }, + { 0x00000001, 0x21c803a5, 0x000001c8, 0x00000000 }, + { 0x00010040, 0x21c81ca5, 0x000001c8, 0xffffffff }, + { 0x05000010, 0x20007fbc, 0x000001cc, 0x00000000 }, + { 0x00000001, 0x21cc03a5, 0x000001cc, 0x00000000 }, + { 0x00010040, 0x21cc1ca5, 0x000001cc, 0xffffffff }, + { 0x00000001, 0x26000168, 0x00000000, 0x00000000 }, + { 0x03000010, 0x200014a4, 0x040001c8, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x04000228, 0x0000404c }, + { 0x01110010, 0x200014a4, 0x000001cc, 0x000001c0 }, + { 0x00010040, 0x222877bd, 0x00000228, 0x00000048 }, + { 0x00000001, 0x26000128, 0x000001d0, 0x00000000 }, + { 0x02000031, 0x2e000229, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22000128, 0x006902c0, 0x00000000 }, + { 0x00400001, 0x22080128, 0x006902c0, 0x00000000 }, + { 0x02800005, 0x20003d2c, 0x00000040, 0x00010001 }, + { 0x00010001, 0x22200109, 0x00000200, 0x00000000 }, + { 0x00010001, 0x22000108, 0x00000202, 0x00000000 }, + { 0x00010001, 0x22020128, 0x00000220, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22002d08, 0x008d0200, 0x02000200 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22002d08, 0x008d0200, 0x02000200 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22002d08, 0x008d0200, 0x02000200 }, + { 0x00600001, 0x2380023d, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8801, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8811, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0000169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4010231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8010231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0010231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8821, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8831, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0200169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4210231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8210231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0210231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8841, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8851, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0400169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4410231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8410231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0410231, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x2380023d, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23a0023d, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x23c0023d, 0x00ae8861, 0x00000000 }, + { 0x00600001, 0x23e0023d, 0x00ae8871, 0x00000000 }, + { 0x00600001, 0x2400023d, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x2420023d, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24007fbc, 0x008d0380, 0x3e991687 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24807fbd, 0x008d0400, 0x3de978d5 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c07fbd, 0x008d0400, 0x3eff7cee }, + { 0x00800001, 0x240003fc, 0x00000000, 0x43000000 }, + { 0x00800048, 0x24007fbc, 0x008d0380, 0x3eff7cee }, + { 0x00800048, 0x24007fbc, 0x008d03c0, 0xbed60419 }, + { 0x00800048, 0x25007fbd, 0x008d0400, 0xbda6809d }, + { 0x00800001, 0x454003ad, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x458003ad, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c003ad, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xb4600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb8600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xb0600169, 0x00000000, 0x00000000 }, + { 0x00800001, 0xd4610231, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xd8610231, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xd0610231, 0x00cf05c0, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00600001, 0x23800021, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d0360, 0x00000000 }, + { 0x00200401, 0x238001a5, 0x00450120, 0x00000000 }, + { 0x00000401, 0x24a001a5, 0x00000120, 0x00000000 }, + { 0x00000c08, 0x24a43da5, 0x00000122, 0x00010001 }, + { 0x00000801, 0x23880061, 0x00000000, 0x000f000f }, + { 0x00000801, 0x24a80061, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x80800040, 0xa4002d29, 0x00b18400, 0x00800080 }, + { 0x80800040, 0xa4202d29, 0x00b18420, 0x00800080 }, + { 0x80800040, 0xa4402d29, 0x00b18440, 0x00800080 }, + { 0x80800040, 0xa4602d29, 0x00b18460, 0x00800080 }, + { 0x80600040, 0xc8002d29, 0x00ae8800, 0x00800080 }, + { 0x80600040, 0xc8402d29, 0x00ae8840, 0x00800080 }, + { 0x80600040, 0xc0002d29, 0x00ae8000, 0x00800080 }, + { 0x80600040, 0xc0402d29, 0x00ae8040, 0x00800080 }, + { 0x80800040, 0xb4002d29, 0x00b19400, 0x00800080 }, + { 0x80800040, 0xb4202d29, 0x00b19420, 0x00800080 }, + { 0x80800040, 0xb4402d29, 0x00b19440, 0x00800080 }, + { 0x80800040, 0xb4602d29, 0x00b19460, 0x00800080 }, + { 0x80600040, 0xd8002d29, 0x00ae9800, 0x00800080 }, + { 0x80600040, 0xd8402d29, 0x00ae9840, 0x00800080 }, + { 0x80600040, 0xd0002d29, 0x00ae9000, 0x00800080 }, + { 0x80600040, 0xd0402d29, 0x00ae9040, 0x00800080 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x02000200 }, + { 0x00800401, 0x23a00231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x23b00231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x23c00231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x23d00231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x44c00231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x44d00231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x44c10231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x44d10231, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22002da8, 0x006902c0, 0x04000400 }, + { 0x00800401, 0x23e00231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x23f00231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24000231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24100231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x44e00231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x44f00231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x44e10231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x44f10231, 0x00cf9041, 0x00000000 }, + { 0x00400040, 0x22082da8, 0x006902c0, 0x06000600 }, + { 0x00800401, 0x24200231, 0x00d28401, 0x00000000 }, + { 0x00800801, 0x24300231, 0x00d28421, 0x00000000 }, + { 0x00800401, 0x24400231, 0x00d28441, 0x00000000 }, + { 0x00800801, 0x24500231, 0x00d28461, 0x00000000 }, + { 0x00600401, 0x45000231, 0x00cf8801, 0x00000000 }, + { 0x00600c01, 0x45100231, 0x00cf8841, 0x00000000 }, + { 0x00600c01, 0x45010231, 0x00cf8001, 0x00000000 }, + { 0x00600801, 0x45110231, 0x00cf8041, 0x00000000 }, + { 0x00800401, 0x24600231, 0x00d29401, 0x00000000 }, + { 0x00800801, 0x24700231, 0x00d29421, 0x00000000 }, + { 0x00800401, 0x24800231, 0x00d29441, 0x00000000 }, + { 0x00800801, 0x24900231, 0x00d29461, 0x00000000 }, + { 0x00600401, 0x45200231, 0x00cf9801, 0x00000000 }, + { 0x00600c01, 0x45300231, 0x00cf9841, 0x00000000 }, + { 0x00600c01, 0x45210231, 0x00cf9001, 0x00000000 }, + { 0x00600801, 0x45310231, 0x00cf9041, 0x00000000 }, + { 0x05000031, 0x20000e24, 0x00000380, 0x120a8018 }, + { 0x05000031, 0x20000e24, 0x000004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20001e24, 0x00000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,573 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 131 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_NV12.asm +// +// Save NV12 420 frame data block of size 16x16 +// +// To save 16x16 block (16x16 bytes of Y and 16x8 bytes of interleaved UV), we need 2 send instructions with of size 16x16 and 16x8 each. +// --------------- +// | 16x16 | +// | YUYV | +// --------------- +// | 16x8 UV | +// --------------- + +//----------------------------------------------------------------- +//The layout of data is as follows: +//mMSGHDR0 : Y data header (16x16) +//mubMSGPAYLOAD0 : Y data payload (8 GRFs) +//mMSGHDR1 : U data header (16x8) +//mubMSGPAYLOAD1 : U data payload (4 GRFs) +//------------------------------------------------------------------ + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4:uw r22.0<4;4,1>:w 512:uw + + //Set up header for Y,U and V data + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + + mov (2) r28.0<1>:d r9.0<2;2,1>:w { NoDDClr } //ORI Y (LUMA) = ORI + mov (1) r37.0<1>:d r9.0<0;1,0>:w { NoDDClr } //H ORI (CHROMA) = H ORI + shr (1) r37.1<1>:d r9.1<0;1,0>:w 1:w { NoDDClr, NoDDChk } //V ORI (CHROMA) = V ORI/2 + + mov (1) r28.2<1>:ud 0xF000F:ud { NoDDChk } // Y Block width and height (16x16) + mov (1) r37.2<1>:ud 0x7000F:ud { NoDDChk } // UV Block width and height(16x8) + +// Unscramble, and pack data directly to MRFs + +// Data 16x16 block is divided as - +// --------- +// | 0 | +// --------- +// | 1 | +// --------- +// | 2 | +// --------- +// | 3 | +// --------- +// All sub-blocks are of size 16x4 +// 0: ubBUFFER_0 +// 1: ubBUFFER_1, ubBUFFER_0+16 +// 2: ubBUFFER_2 +// 3: ubBUFFER_3, ubBUFFER_2+16 + + //Y Rounding 16x4 top part + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + // V Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.0:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + + //Y Rounding, 16x4 bottom part + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + // V Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.4:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + + //Y Rounding 16x4 top part + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + // V Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + //Y Rounding, 16x4 bottom part + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + // V Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + // restore pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4 registers + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4:uw r22.0<4;4,1>:w 512:uw + +//Buffer 0 +//Move Y to msg payload + mov (16) mubMSGPAYLOAD0(0,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(0,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(1,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(1,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + +//Move U to msg payload + mov (8) mubMSGPAYLOAD1(0,0)<2> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(0,16)<2> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + +//Move V to msg payload + mov (8) mubMSGPAYLOAD1(0,1)<2> r[a0.0, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0,17)<2> r[a0.0, 65]<32;8,4>:ub { NoDDChk } + + add (4) a0.0:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + +//Buffer 1 + mov (16) mubMSGPAYLOAD0(2,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(2,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(3,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(3,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,0)<2> r[a0.6, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(1,16)<2> r[a0.6, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,1)<2> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1,17)<2> r[a0.4, 65]<32;8,4>:ub { NoDDChk } + + add (4) a0.4:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + +//Buffer 2 + mov (16) mubMSGPAYLOAD0(4,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(4,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(5,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(5,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(2,0)<2> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(2,16)<2> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD1(2,1)<2> r[a0.0, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(2,17)<2> r[a0.0, 65]<32;8,4>:ub { NoDDChk } + +//Buffer 3 + mov (16) mubMSGPAYLOAD0(6,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(6,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(7,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(7,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(3,0)<2> r[a0.6, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(3,16)<2> r[a0.6, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD1(3,1)<2> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(3,17)<2> r[a0.4, 65]<32;8,4>:ub { NoDDChk } +//=========================================================================== + +send (1) null<1>:d r28 0x5 0x120A8018:ud +send (1) null<1>:d r37 0x5 0xA0A8019:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_PA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_PA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_PA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_PA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,647 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 174 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_PA.asm +// +// Save PA 422 frame data block of size 16x16 +// +// To save 16x16 block (32x16 bytes of YUYV) we need 2 send instructions with of size 16x16 each. +// ------------------------------- +// | 16x16 | 16x16 | +// | YUYV | YUYV | +// ------------------------------- +// these 2 sends are replaced by 8 32x2 sends to improve performance + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + + //wBUFF_CHNL_PTR points to buffer 0. + //Add appropriate offsets to get pointers for all buffers (1,2,3). + //Offset is zero for buffer 0. + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + + //Set DEST pointers according to output packing i.e. YUYV, YVYU, UYVY, VYUY + add (4) a0.4<1>:w r2.28<4;4,1>:ub 928:uw + + shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be 2 times + mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) r27.2<1>:ud 0x1001F:ud { NoDDChk } // Block width and height (32x2) + +// Rounding + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0:uw r22.0<4;4,1>:w 512:uw + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0:uw r22.0<4;4,1>:w 1024:uw + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0:uw r22.0<4;4,1>:w 1536:uw + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0:uw r22.0<4;4,1>:w 2048:uw + // restore pointer + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + add (1) r37.1<1>:d r27.1<0;1,0>:d 2:d // Point to 2nd part + + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0x5 0x60A8018:ud + send (1) null<1>:d r37 0x5 0x60A8018:ud + + // restore pointer + add (4) a0.0:uw r22.0<4;4,1>:w 512:uw + + add (1) r28.1<1>:d r27.1<0;1,0>:d 4:d // Point to 2nd part + add (1) r37.1<1>:d r27.1<0;1,0>:d 6:d // Point to 2nd part + + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0x5 0x60A8018:ud + send (1) null<1>:d r37 0x5 0x60A8018:ud + + // restore pointer + add (4) a0.0:uw r22.0<4;4,1>:w 1024:uw + + add (1) r28.1<1>:d r27.1<0;1,0>:d 8:d // Point to 2nd part + add (1) r37.1<1>:d r27.1<0;1,0>:d 10:d // Point to 2nd part + + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0x5 0x60A8018:ud + send (1) null<1>:d r37 0x5 0x60A8018:ud + + // restore pointer + add (4) a0.0:uw r22.0<4;4,1>:w 1536:uw + + add (1) r28.1<1>:d r27.1<0;1,0>:d 12:d // Point to 2nd part + add (1) r37.1<1>:d r27.1<0;1,0>:d 14:d // Point to 2nd part + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0x5 0x60A8018:ud + send (1) null<1>:d r37 0x5 0x60A8018:ud + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_PL3.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_PL3.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_PL3.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_PL3.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,586 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 84 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_PL3.asm +// +// Save PL3 420 frame data block of size 16x16 +// +// To save 16x16 block (16x16 byte of Y and 8x8 byte of U and V each) we need 3 send instructions with one of size 16x16 and two of size 8x8. +// ----------------- +// | 16x16 Y | +// | | +// ----------------- +// | 8x8 U | +// --------- +// | 8x8 V | +// --------- + +//----------------------------------------------------------------- +//The layout of data is as follows: +//mMSGHDR0 : Y data header (16x16) +//mubMSGPAYLOAD0 : Y data payload (8 GRFs) +//mMSGHDR1 : U data header (8x8) +//mubMSGPAYLOAD1 : U data payload (2 GRFs) +//mMSGHDR2 : V data header (8x8) +//mubMSGPAYLOAD2 : V data payload (2 GRFs) +//------------------------------------------------------------------ + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4:uw r22.0<4;4,1>:w 512:uw + + //Set up header for Y,U and V data + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + mov (8) r46<1>:ud r27<8;8,1>:ud + + mov (2) r28.0<1>:d r9.0<2;2,1>:w { NoDDClr } //ORI Y (LUMA) = ORI + shr (2) r37.0<1>:d r9.0<2;2,1>:w 1:w { NoDDClr } //H/V ORI U = H/V ORI/2 + shr (2) r46.0<1>:d r9.0<2;2,1>:w 1:w { NoDDClr } //H/V ORI V = H/V ORI/2 + + mov (1) r28.2<1>:ud 0xF000F:ud { NoDDChk } // Y Block width and height (16x16) + mov (1)r37.2<1>:ud 0x70007:ud { NoDDChk } // U Block width and height (8x8) + mov (1)r46.2<1>:ud 0x70007:ud { NoDDChk } // V Block width and height (8x8) + +// Unscramble, and pack data directly to MRFs + +// Data 16x16 block is divided as - +// --------- +// | 0 | +// --------- +// | 1 | +// --------- +// | 2 | +// --------- +// | 3 | +// --------- +// All sub-blocks are of size 16x4 +// 0: ubBUFFER_0 +// 1: ubBUFFER_1, ubBUFFER_0+16 +// 2: ubBUFFER_2 +// 3: ubBUFFER_3, ubBUFFER_2+16 + + //Y Rounding, first + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.0:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + + //Y Rounding, second + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.4:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + + //Y Rounding, third + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + + //Y Rounding, fourth + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + // restore the TOP and BOT pointers + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4:uw r22.0<4;4,1>:w 512:uw + +//Buffer 0 +//Move Y to msg payload + mov (16) mubMSGPAYLOAD0(0,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(0,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(1,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(1,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + +//Move U to msg payload + mov (8) mubMSGPAYLOAD1(0,0)<1> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(0,8)<1> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + +//Move V to msg payload + mov (8) mubMSGPAYLOAD2(0,0)<1> r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD2(0,8)<1> r[a0.0, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + add (4) a0.0:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + +//Buffer 1 + mov (16) mubMSGPAYLOAD0(2,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(2,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(3,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(3,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(0,16)<1> r[a0.6, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0,24)<1> r[a0.6, 65]<32;8,4>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(0,16)<1> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(0,24)<1> r[a0.4, 65]<32;8,4>:ub { NoDDChk } + + add (4) a0.4:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + +//Buffer 2 + mov (16) mubMSGPAYLOAD0(4,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(4,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(5,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(5,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,0)<1> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(1,8)<1> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD2(1,0)<1> r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD2(1,8)<1> r[a0.0, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + +//Buffer 3 + mov (16) mubMSGPAYLOAD0(6,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(6,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(7,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(7,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,16)<1> r[a0.6, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1,24)<1> r[a0.6, 65]<32;8,4>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(1,16)<1> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(1,24)<1> r[a0.4, 65]<32;8,4>:ub { NoDDChk } + +//=========================================================================== + +send (1) null<1>:d r28 0x5 0x120A8018:ud +send (1) null<1>:d r37 0x5 0x60A8019:ud +send (1) null<1>:d r46 0x5 0x60A801A:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_RGB.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_RGB.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_RGB.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_RGB.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,690 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 198 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_RGB.asm +// +// Save packed ARGB 444 frame data block of size 16x16 +// +// To save 16x16 block (64x16 byte layout for ARGB8888) we need 4 send instructions with 16x16 in each +// ----------------- +// | 0 | 1 | 2 | 3 | +// ----------------- +// the 4 16x16 block send has been replaced by 16 32x2 sends to get better performance + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + +// At the save module we have all 8 address sub-registers available. +// So we will use PING-PONG type of scheme to save the data using +// pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help +// reduce dependency. - rT + +// channel switching based on bit 0 of uWRGB_BGR_CH_SWITCH + + // if channel swap? + and.nz.f0.0 null<1>:w r2.3<0;1,0>:uw 0x01:w + +//wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. +//Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). +//Offsets are zero for buffer 0 and buffer 4. + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0:uw + (f0.0) mov (1) a0.0:uw a0.2:uw + (f0.0) mov (1) a0.2:uw uwTemp0<0;1,0> + + shl (1) r27.0<1>:d r9.0<0;1,0>:w 2:w { NoDDClr } // H. block origin need to be quadrupled + mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) r27.2<1>:ud 0x1001F:ud { NoDDChk } // Block width and height (32x2) + + add (4) a0.4:uw a0.0<4;4,1>:w r22.8<0;2,1>:w + + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + mov (8) r46<1>:ud r27<8;8,1>:ud + mov (8) r55<1>:ud r27<8;8,1>:ud + + mov (8) r31<1>:ud r27<8;8,1>:ud + mov (8) r40<1>:ud r27<8;8,1>:ud + mov (8) r49<1>:ud r27<8;8,1>:ud + mov (8) r58<1>:ud r27<8;8,1>:ud + + +//for BUFFER 0 + add (1) r37.1<1>:d r27.1<0;1,0>:d 2:d + add (1) r46.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r55.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r55.1<1>:d r27.1<0;1,0>:d 2:d + +// for BUFFER 1 + add (1) r31.1<1>:d r27.1<0;1,0>:d 4:d + add (1) r40.1<1>:d r27.1<0;1,0>:d 6:d + add (1) r49.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r49.1<1>:d r27.1<0;1,0>:d 4:d + add (1) r58.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r58.1<1>:d r27.1<0;1,0>:d 6:d + // write Buf_0 to 1st quarter of four horizontal output blocks + +// Please note the scattered order of NODDCLR, NODDCHK flags. Since the sub-registers +// of destination reg are not updated at one place and hence even flags are scattered. -rT + + mov (8) mubMSGPAYLOAD0(0, 0)<4> r[a0.2, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD0(0, 1)<4> r[a0.1, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(0, 2)<4> r[a0.0, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD0(1, 0)<4> r[a0.2, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD0(1, 1)<4> r[a0.1, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(1, 2)<4> r[a0.0, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(0, 0)<4> r[a0.6, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD1(0, 1)<4> r[a0.5, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0, 2)<4> r[a0.4, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1, 0)<4> r[a0.6, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD1(1, 1)<4> r[a0.5, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1, 2)<4> r[a0.4, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(0, 0)<4> r[a0.2, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD2(0, 1)<4> r[a0.1, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(0, 2)<4> r[a0.0, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(1, 0)<4> r[a0.2, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD2(1, 1)<4> r[a0.1, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(1, 2)<4> r[a0.0, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD3(0, 0)<4> r[a0.6, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD3(0, 1)<4> r[a0.5, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(0, 2)<4> r[a0.4, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD3(1, 0)<4> r[a0.6, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD3(1, 1)<4> r[a0.5, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(1, 2)<4> r[a0.4, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(1, 3)<4> r2.31:ub { NoDDChk } + + // write Buf_1 to 2nd quarter of four horizontal output blocks + add (4) a0.0:uw r22.0<4;4,1>:w 512:uw + + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0:uw + (f0.0) mov (1) a0.0:uw a0.2:uw + (f0.0) mov (1) a0.2:uw uwTemp0<0;1,0> + + add (4) a0.4:uw a0.0<4;4,1>:w r22.8<0;2,1>:w + + mov (8) mubMSGPAYLOAD4(0, 0)<4> r[a0.2, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD4(0, 1)<4> r[a0.1, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(0, 2)<4> r[a0.0, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD4(1, 0)<4> r[a0.2, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD4(1, 1)<4> r[a0.1, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(1, 2)<4> r[a0.0, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD5(0, 0)<4> r[a0.6, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD5(0, 1)<4> r[a0.5, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(0, 2)<4> r[a0.4, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD5(1, 0)<4> r[a0.6, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD5(1, 1)<4> r[a0.5, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(1, 2)<4> r[a0.4, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD6(0, 0)<4> r[a0.2, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD6(0, 1)<4> r[a0.1, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(0, 2)<4> r[a0.0, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD6(1, 0)<4> r[a0.2, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD6(1, 1)<4> r[a0.1, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(1, 2)<4> r[a0.0, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD7(0, 0)<4> r[a0.6, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD7(0, 1)<4> r[a0.5, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(0, 2)<4> r[a0.4, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD7(1, 0)<4> r[a0.6, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD7(1, 1)<4> r[a0.5, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(1, 2)<4> r[a0.4, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(1, 3)<4> r2.31:ub { NoDDChk } + + // send buffer 0 and buffer 1 + send (1) null<1>:d r28 0x5 0x60A8018:ud + send (1) null<1>:d r37 0x5 0x60A8018:ud + send (1) null<1>:d r46 0x5 0x60A8018:ud + send (1) null<1>:d r55 0x5 0x60A8018:ud + + send (1) null<1>:d r31 0x5 0x60A8018:ud + send (1) null<1>:d r40 0x5 0x60A8018:ud + send (1) null<1>:d r49 0x5 0x60A8018:ud + send (1) null<1>:d r58 0x5 0x60A8018:ud + +//========== +//prepare headers +//for BUFFER 2 + add (1) r28.1<1>:d r27.1<0;1,0>:d 8:d + add (1) r37.1<1>:d r27.1<0;1,0>:d 10:d + add (1) r46.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r46.1<1>:d r27.1<0;1,0>:d 8:d + add (1) r55.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r55.1<1>:d r27.1<0;1,0>:d 10:d +// for BUFFER 3 + add (1) r31.1<1>:d r27.1<0;1,0>:d 12:d + add (1) r40.1<1>:d r27.1<0;1,0>:d 14:d + add (1) r49.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r49.1<1>:d r27.1<0;1,0>:d 12:d + add (1) r58.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r58.1<1>:d r27.1<0;1,0>:d 14:d + +//=========== + + // write Buf_2 to 3rd quarter of four horizontal output blocks + add (4) a0.0:uw r22.0<4;4,1>:w 1024:uw + + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0:uw + (f0.0) mov (1) a0.0:uw a0.2:uw + (f0.0) mov (1) a0.2:uw uwTemp0<0;1,0> + + add (4) a0.4:uw a0.0<4;4,1>:w r22.8<0;2,1>:w + + mov (8) mubMSGPAYLOAD0(0, 0)<4> r[a0.2, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD0(0, 1)<4> r[a0.1, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(0, 2)<4> r[a0.0, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD0(1, 0)<4> r[a0.2, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD0(1, 1)<4> r[a0.1, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(1, 2)<4> r[a0.0, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD0(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(0, 0)<4> r[a0.6, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD1(0, 1)<4> r[a0.5, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0, 2)<4> r[a0.4, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1, 0)<4> r[a0.6, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD1(1, 1)<4> r[a0.5, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1, 2)<4> r[a0.4, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(0, 0)<4> r[a0.2, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD2(0, 1)<4> r[a0.1, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(0, 2)<4> r[a0.0, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(1, 0)<4> r[a0.2, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD2(1, 1)<4> r[a0.1, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(1, 2)<4> r[a0.0, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD3(0, 0)<4> r[a0.6, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD3(0, 1)<4> r[a0.5, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(0, 2)<4> r[a0.4, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD3(1, 0)<4> r[a0.6, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD3(1, 1)<4> r[a0.5, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(1, 2)<4> r[a0.4, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD3(1, 3)<4> r2.31:ub { NoDDChk } + + // write Buf_3 to 4th quarter of four horizontal output blocks + add (4) a0.0:uw r22.0<4;4,1>:w 1536:uw + + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0:uw + (f0.0) mov (1) a0.0:uw a0.2:uw + (f0.0) mov (1) a0.2:uw uwTemp0<0;1,0> + + add (4) a0.4:uw a0.0<4;4,1>:w r22.8<0;2,1>:w + + mov (8) mubMSGPAYLOAD4(0, 0)<4> r[a0.2, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD4(0, 1)<4> r[a0.1, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(0, 2)<4> r[a0.0, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD4(1, 0)<4> r[a0.2, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD4(1, 1)<4> r[a0.1, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(1, 2)<4> r[a0.0, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD4(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD5(0, 0)<4> r[a0.6, 1]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD5(0, 1)<4> r[a0.5, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(0, 2)<4> r[a0.4, 1]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD5(1, 0)<4> r[a0.6, 33]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD5(1, 1)<4> r[a0.5, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(1, 2)<4> r[a0.4, 33]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD5(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD6(0, 0)<4> r[a0.2, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD6(0, 1)<4> r[a0.1, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(0, 2)<4> r[a0.0, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD6(1, 0)<4> r[a0.2, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD6(1, 1)<4> r[a0.1, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(1, 2)<4> r[a0.0, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD6(1, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD7(0, 0)<4> r[a0.6, 17]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD7(0, 1)<4> r[a0.5, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(0, 2)<4> r[a0.4, 17]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(0, 3)<4> r2.31:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD7(1, 0)<4> r[a0.6, 49]<16;8,2> { NoDDClr } + mov (8) mubMSGPAYLOAD7(1, 1)<4> r[a0.5, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(1, 2)<4> r[a0.4, 49]<16;8,2> { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD7(1, 3)<4> r2.31:ub { NoDDChk } + + // send buffer 2 and buffer 3 + send (1) null<1>:d r28 0x5 0x60A8018:ud + send (1) null<1>:d r37 0x5 0x60A8018:ud + send (1) null<1>:d r46 0x5 0x60A8018:ud + send (1) null<1>:d r55 0x5 0x60A8018:ud + + send (1) null<1>:d r31 0x5 0x60A8018:ud + send (1) null<1>:d r40 0x5 0x60A8018:ud + send (1) null<1>:d r49 0x5 0x60A8018:ud + send (1) null<1>:d r58 0x5 0x60A8018:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_RGBX.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_RGBX.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Save_AVS_RGBX.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Save_AVS_RGBX.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,661 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: + * Zhao Yakui + */ + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_RGBX.asm +// +// Save packed ARGB 444 frame data block of size 16x16 +// +// To save 16x16 block (64x16 byte layout for ARGB8888) we need 4 send instructions with 32x8 in each +// -------- +// | 0 | 1 | +// | 2 | 3 | +// --------- +// the 4 32x8 block send is used + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + +// At the save module we have all 8 address sub-registers available. +// So we will use PING-PONG type of scheme to save the data using +// pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help +// reduce dependency. - rT + + //Internal LAYOUT:(RRGGBBAA) + //Assign buffer channel order for Buffer 0123 in the order RGBA a0.3>A, a0.2>B, a0.1>G, a0.0>R + // R = 0, G= 4, B = 8, A = 12. + mov (4) acc0.0<1>:w 0x62EA:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw + + // if channel swap? + // This means that it should be BGRA(B is the LSB) or RGBA + // the internal format is always RGBA(MSB-A-B-G-R). + and.nz.f0.0 null<1>:w r2.3<0;1,0>:uw 0x01:w + +//wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. +//Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). +//Offsets are zero for buffer 0 and buffer 4. + add (4) a0.0:uw r22.0<4;4,1>:w 0:uw + + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0<0;1,0>:uw + (f0.0) mov (1) a0.0<1>:uw a0.2<0;1,0>:uw + (f0.0) mov (1) a0.2<1>:uw uwTemp0<0;1,0> + + shl (1) r27.0<1>:d r9.0<0;1,0>:w 2:w { NoDDClr } // H. block origin need to be quadrupled + mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x4) + + mov (4) a0.4<1>:uw a0.0<4;4,1>:uw + + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + mov (8) r46<1>:ud r27<8;8,1>:ud + mov (8) r55<1>:ud r27<8;8,1>:ud + + mov (8) r31<1>:ud r27<8;8,1>:ud + mov (8) r40<1>:ud r27<8;8,1>:ud + mov (8) r49<1>:ud r27<8;8,1>:ud + mov (8) r58<1>:ud r27<8;8,1>:ud + +//Buffer 0/1 are written by using 4 32x4. + + add (1) r37.0<1>:d r27.0<0;1,0>:d 32:d + + add (1) r46.1<1>:d r27.1<0;1,0>:d 4:d + + add (1) r55.1<1>:d r27.1<0;1,0>:d 4:d + add (1) r55.0<1>:d r27.0<0;1,0>:d 32:d + + // write Buf_0 to 1st quarter of four horizontal output blocks + +// Please note the scattered order of NODDCLR, NODDCHK flags. Since the sub-registers +// of destination reg are not updated at one place and hence even flags are scattered. -rT + +/* for block 0 the left part of buffer 0 and 1 */ + mov (8) mubMSGPAYLOAD0(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 3)<4> r2.31:ub + +/* For Buffer 0 */ + send (16) null<1>:d r28 0x5 0x0A0A8018:ud + send (16) null<1>:d r37 0x5 0x0A0A8018:ud + + add (4) a0.0<1>:uw a0.4<4;4,1>:uw 512:uw + mov (8) mubMSGPAYLOAD2(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 3)<4> r2.31:ub + // send Buffer 1 + send (16) null<1>:d r46 0x5 0x0A0A8018:ud + send (16) null<1>:d r55 0x5 0x0A0A8018:ud + + +/* for Buffer 2/3 */ + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + mov (8) r46<1>:ud r27<8;8,1>:ud + mov (8) r55<1>:ud r27<8;8,1>:ud + + add (1) r28.1<1>:d r27.1<0;1,0>:d 8:d + + add (1) r37.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r37.1<1>:d r27.1<0;1,0>:d 8:d + + add (1) r46.1<1>:d r27.1<0;1,0>:d 12:d + + add (1) r55.1<1>:d r27.1<0;1,0>:d 12:d + add (1) r55.0<1>:d r27.0<0;1,0>:d 32:d + + add (4) a0.0<1>:uw a0.4<4;4,1>:uw 1024:uw + + mov (8) mubMSGPAYLOAD0(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 3)<4> r2.31:ub + +// Send Buffer 2 + send (16) null<1>:d r28 0x5 0x0A0A8018:ud + send (16) null<1>:d r37 0x5 0x0A0A8018:ud + + add (4) a0.0<1>:uw a0.4<4;4,1>:uw 1536:uw + mov (8) mubMSGPAYLOAD2(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 3)<4> r2.31:ub + // send buffer 3 + send (16) null<1>:d r46 0x5 0x0A0A8018:ud + send (16) null<1>:d r55 0x5 0x0A0A8018:ud + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_BGRA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_BGRA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_BGRA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_BGRA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,388 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_BGRA.asm + + + +//Module Name: Set_Buf_0123_BGRA + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT:(UUYYVVAA) + //AVS RGBX LAYOUT (RRGGBBAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + // V = 8, Y= 0, U = 4, A = 12. + // And a0.x is used as indirect-register for RGBX. R=a0.1, G=a0.2, B=a0.0 + // B = 8, R= 0, G = 4, A = 12 + mov (4) acc0.0<1>:w 0x6EA2:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + + //SU LAYOUT:(VYUAVYUA) + //V = 4, Y = 2, U = 0, A = 6 + //B = 4, G = 2, R = 0, A = 6 + mov (4) acc0.0<1>:w 0x6204:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL2.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL2.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL2.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL2.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,383 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_PL2.asm + + + +//Module Name: Set_Buf_0123_PL2 + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT: (YYUUVVAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + //For PL2-AVS: V = 8, Y= 0, U = 4, A = 12. + mov (4) acc0.0<1>:w 0x6EA2:v //Subtract 6 from 0,4,8,12 + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw //add 6 back + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw //Convert to BYTE address. + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + //SU LAYOUT:(YUVAYUVA) + //V = 4, Y = 0, U = 2, A = 6 + mov (4) acc0.0<1>:w 0x6204:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL3.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL3.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL3.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL3.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,383 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_PL3.asm + + + +//Module Name: Set_Buf_0123_PL3 + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT: (YYUUVVAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + //For PL3-AVS: V = 8, Y= 0, U = 4, A = 12. + mov (4) acc0.0<1>:w 0x6EA2:v //Subtract 6 from 0,4,8,12 + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw //add 6 back + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw //Convert to BYTE address. + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + //SU LAYOUT:(YUVAYUVA) + //V = 4, Y = 0, U = 2, A = 6 + mov (4) acc0.0<1>:w 0x6204:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VUYA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VUYA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VUYA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VUYA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,384 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_YUVA.asm + + + +// Module Name : Set_Buf_0123_VUYA + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //For AVS: We use surface state as R8G8B8A8_UNORM and hence set pointers to VUYA. + //AVS LAYOUT:(VVUUYYAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + //V = 0, Y= 8, U = 4, A = 12. + mov (4) acc0.0<1>:w 0x6E2A:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw + + //Used by Shuffle. + //SU LAYOUT:(VUYAVUYA) + //V = 0, Y = 4, U = 2, A = 6 + mov (4) acc0.0<1>:w 0x6240:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VYUA.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VYUA.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VYUA.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VYUA.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,384 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_VYUA.asm + + + +//Module Name: Set_Buf_0123_VYUA + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT:(VVYYUUAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + // V = 0, Y= 4, U = 8, A = 12. + mov (4) acc0.0<1>:w 0x62EA:v //Subtract 6 from 0,4,8,12 + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw //add 6 back + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw //Convert to BYTE address. + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + + //SU LAYOUT:(VYUAVYUA) + //V = 0, Y = 2, U = 4, A = 6 + mov (4) acc0.0<1>:w 0x6420:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_Layer_0.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_Layer_0.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/Set_Layer_0.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/Set_Layer_0.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,489 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 18 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + + + + + +//Module name: Set_Layer_N.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Used to generate LABELS at compile time. + + +//definitions for Expand Mask +.declare uwMask_Temp1 Base=r17.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF +.declare ubMask_Temp1 Base=r17.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF +.declare udMask_Temp1 Base=r17.0 ElementSize=4 Type=ud // 1 GRF +.declare uwMask_Temp2 Base=r16.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF +.declare ubMask_Temp2 Base=r16.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF +.declare udMask_Temp2 Base=r16.0 ElementSize=4 Type=ud // 1 GRF + +.declare uwMask_Temp3 Base=r15.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF +.declare ubMask_Temp3 Base=r15.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF + +.declare udALPHA_MASK_REG Base=r21.0 ElementSize=4 Type=ud // 1 GRF +.declare udALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=4 Type=ud // 1 GRF + + +//Initialize mask reg to FFFF + + mov (16) uwALPHA_MASK_REG(0)<1> 0xFFFF:uw + + +//Fast jump for - +//LAYER0: we determine whether layer 0 is to be loaded and processed or not based +// on block mask in module "Set_Layer_0" and store result in f0.1. +// This flag is then directly used to while loading buf0-3 and colorfill. +// (So flag f0.1 should not be changed from Set_Layer_0 till Colorfill) +// +//LAYER1-7: For all other layers, we compute whether layer is to be loaded and processed +// based on block mask in module "Set_Layer_1-7" and store result in SKIP_LAYER +// variable. +// While Loading buf 4 and 5, we move SKIP_LAYER to f0.0 every time and use it +// for Loading. +// For processing though, we move SKIP_LAYER only once to f0.1 in module +// "Set_Buf0_Buf4" and use f0.1 for deciding whether layer 1-7 (all 4 sub blocks) +// is to be processed or not. +// (So flag f0.1) should not be modififed from module "Set_Buf0_Buf4" till module +// that processess sub-block 3). +// +//None of the above fast jumps, apply to CSC modules. We always perform CSC irrespective of mask. +// +//Example: (Without going into finer details) +// Typical Combined kernel: +// +// (let var = decision whether to load/process that layer) +// +// Set_Layer_0 //f0.1 <- var +// .. +// Set_Layer_1 //f0.1 <- var, SKIP_LAYER <- var +// .. +// Load buf 0 //use f0.1 +// Load buf 4 //f0.0 <- SKIP_LAYER +// Load buf 1 //use f0.1 +// Load buf 5 //f0.0 <- SKIP_LAYER +// Load buf 2 //use f0.1 +// Load buf 3 //use f0.1 +// .. +// .. +// Colorfill +// .. +// Set_Buf0_Buf4 //f0.1 <- SKIP_LAYER +// process0-4 //Use f0.1 +// Load buf 4 +// Set_Buf1_Buf5 +// process1-5 +// Load buf 5 +// .. +// Set_Layer_2 //f0.1 <-var, SKIP_LAYER <- var +// .. +// Set_Buf2_Buf4 +// process2-4 +// Load buf 4 +// Set_Buf3_Buf5 +// process3-5 +// Load buf 5 +// .. + + + //For layer 0, use f0.1 directly + cmp.ne.f0.1 (1) null<1>:d r9.2:uw 0:uw + (f0.1)cmp.ne.f0.1 (1) null<1>:d r9.3:uw 0:uw + (-f0.1) jmpi (1) SKIP_LAYER_L0 + + + and (1) r24.2:ub r2.2<0;1,0>:uw 3:uw + + + //Copy all AVS Payload data + // Setup Message Payload Header for 1st block of Media Sampler 8x8 (16x4 for IVB+) + mov (1) r25.6:f r9.5:f { NoDDClr } //NLAS dx + mov (1) r25.4:f r3.0:f { NoDDClr, NoDDChk } //Step X + mov (1) r25.5:f r4.0:f { NoDDClr, NoDDChk } //Step Y + + + mov (1) r25.2:f r6.0<0;1,0>:f { NoDDClr, NoDDChk } //Orig X + mov (1) r25.3:f r5.0<0;1,0>:f { NoDDChk } //Orig Y + + //NLAS calculations for 2nd half of blocks of Media Sampler 8x8: + // X(i) = X0 + dx*i + ddx*i*(i-1)/2 ==> X(8) = X0 + dx*8 +ddx*28 + // dx(i)= dx(0) + ddx*i ==> dx(8)= dx + ddx*8 + + //OPTIMIZATION: fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY - are sub registers of same GRF. Use NODDCLR NODDCHK. -rT + + // Calculating X(8) + mov (1) acc0.2:f r6.0:f + mac (1) acc0.2:f r3.0:f 8.0:f + mac (1) r23.2:f r9.5:f 28.0:f { NoDDClr } + + // Calculating Y(4) + mul (1) r23.1<1>:f r4.0:f 4.0:f { NoDDClr, NoDDChk } //dY*4 + + // Calculating dx(8) + mov (1) acc0.4:f r3.0:f + mac (1) r23.4:f r9.5:f 8.0:f { NoDDClr, NoDDChk } + + // Binding Index + mov (1) r23.5:ud 0:ud { NoDDChk } + + +SKIP_LAYER_L0: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/VP_Setup.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/VP_Setup.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/VP_Setup.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/VP_Setup.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,875 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +// 326 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: VP_Setup.asm +// Author: Vivek Kumar +// Description: Sets up all parameters for the Video Processing Kernel + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Setup pointer to the inline parameter + +// Copy MSG HDR + mov (8) r27.0<1>:ud r0.0<8;8,1>:ud // Initialize message payload header with R0 + + +//temp; remove it once unread msg warnings are resolved -vK +mov (8) r25:ud r0.0<8;8,1>:ud +mov (8) r26:ud r0.0<8;8,1>:ud + +// Calculate StepX for all layers and overwrite it on the ratio + mul (8) r3.0<1>:f r3.0<8;8,1>:f r9.4<0;1,0>:f //StepX_ratio = StepX / VideoStepX + + //Normalised Ratio of Horizontal step size with main video for all layers now becomes + //Normalised Horizontal step size for all layers + +// Calculate block origin for all layers and overwrite it on the frame origin + mov (2) r8.5<1>:f r9.0<2;2,1>:w //Convert origin from word to float + + cmp.e.f0.0 (8) null<1>:d r2.26:ub 1:uw + + + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 0:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L0 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L0 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L0 + + // rotate 0 degree +ROTATE_0_L0: + (-f0.0)mov (1) acc0.0:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.0:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L0 + + // rotate 90 degree +ROTATE_90_L0: + (-f0.0)mov (1) acc0.0:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.0:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L0 + + // rotate 180 degree +ROTATE_180_L0: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.0:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.0:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L0 + + // rotate 270 degree +ROTATE_270_L0: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.0:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.0:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L0: + nop + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 2:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L1 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L1 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L1 + + // rotate 0 degree +ROTATE_0_L1: + (-f0.0)mov (1) acc0.1:f r6.1<0;1,0>:f + (-f0.0)mac (1) r6.1<1>:f r3.1<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.1:f r5.1<0;1,0>:f + mac (1) r5.1<1>:f r4.1<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L1 + + // rotate 90 degree +ROTATE_90_L1: + (-f0.0)mov (1) acc0.1:f r6.1<0;1,0>:f + (-f0.0)mac (1) r6.1<1>:f r3.1<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.1:f r5.1<0;1,0>:f + mac (1) r5.1<1>:f r4.1<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L1 + + // rotate 180 degree +ROTATE_180_L1: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.1:f r6.1<0;1,0>:f + (-f0.0)mac (1) r6.1<1>:f r3.1<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.1:f r5.1<0;1,0>:f + mac (1) r5.1<1>:f r4.1<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L1 + + // rotate 270 degree +ROTATE_270_L1: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.1:f r6.1<0;1,0>:f + (-f0.0)mac (1) r6.1<1>:f r3.1<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.1:f r5.1<0;1,0>:f + mac (1) r5.1<1>:f r4.1<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L1: + nop + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 4:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L2 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L2 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L2 + + // rotate 0 degree +ROTATE_0_L2: + (-f0.0)mov (1) acc0.2:f r6.2<0;1,0>:f + (-f0.0)mac (1) r6.2<1>:f r3.2<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.2:f r5.2<0;1,0>:f + mac (1) r5.2<1>:f r4.2<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L2 + + // rotate 90 degree +ROTATE_90_L2: + (-f0.0)mov (1) acc0.2:f r6.2<0;1,0>:f + (-f0.0)mac (1) r6.2<1>:f r3.2<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.2:f r5.2<0;1,0>:f + mac (1) r5.2<1>:f r4.2<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L2 + + // rotate 180 degree +ROTATE_180_L2: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.2:f r6.2<0;1,0>:f + (-f0.0)mac (1) r6.2<1>:f r3.2<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.2:f r5.2<0;1,0>:f + mac (1) r5.2<1>:f r4.2<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L2 + + // rotate 270 degree +ROTATE_270_L2: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.2:f r6.2<0;1,0>:f + (-f0.0)mac (1) r6.2<1>:f r3.2<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.2:f r5.2<0;1,0>:f + mac (1) r5.2<1>:f r4.2<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L2: + nop + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 6:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L3 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L3 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L3 + + // rotate 0 degree +ROTATE_0_L3: + (-f0.0)mov (1) acc0.3:f r6.3<0;1,0>:f + (-f0.0)mac (1) r6.3<1>:f r3.3<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.3:f r5.3<0;1,0>:f + mac (1) r5.3<1>:f r4.3<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L3 + + // rotate 90 degree +ROTATE_90_L3: + (-f0.0)mov (1) acc0.3:f r6.3<0;1,0>:f + (-f0.0)mac (1) r6.3<1>:f r3.3<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.3:f r5.3<0;1,0>:f + mac (1) r5.3<1>:f r4.3<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L3 + + // rotate 180 degree +ROTATE_180_L3: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.3:f r6.3<0;1,0>:f + (-f0.0)mac (1) r6.3<1>:f r3.3<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.3:f r5.3<0;1,0>:f + mac (1) r5.3<1>:f r4.3<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L3 + + // rotate 270 degree +ROTATE_270_L3: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.3:f r6.3<0;1,0>:f + (-f0.0)mac (1) r6.3<1>:f r3.3<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.3:f r5.3<0;1,0>:f + mac (1) r5.3<1>:f r4.3<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L3: + nop + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 8:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L4 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L4 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L4 + + // rotate 0 degree +ROTATE_0_L4: + (-f0.0)mov (1) acc0.4:f r6.4<0;1,0>:f + (-f0.0)mac (1) r6.4<1>:f r3.4<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.4:f r5.4<0;1,0>:f + mac (1) r5.4<1>:f r4.4<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L4 + + // rotate 90 degree +ROTATE_90_L4: + (-f0.0)mov (1) acc0.4:f r6.4<0;1,0>:f + (-f0.0)mac (1) r6.4<1>:f r3.4<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.4:f r5.4<0;1,0>:f + mac (1) r5.4<1>:f r4.4<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L4 + + // rotate 180 degree +ROTATE_180_L4: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.4:f r6.4<0;1,0>:f + (-f0.0)mac (1) r6.4<1>:f r3.4<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.4:f r5.4<0;1,0>:f + mac (1) r5.4<1>:f r4.4<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L4 + + // rotate 270 degree +ROTATE_270_L4: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.4:f r6.4<0;1,0>:f + (-f0.0)mac (1) r6.4<1>:f r3.4<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.4:f r5.4<0;1,0>:f + mac (1) r5.4<1>:f r4.4<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L4: + nop + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 10:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L5 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L5 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L5 + + // rotate 0 degree +ROTATE_0_L5: + (-f0.0)mov (1) acc0.5:f r6.5<0;1,0>:f + (-f0.0)mac (1) r6.5<1>:f r3.5<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.5:f r5.5<0;1,0>:f + mac (1) r5.5<1>:f r4.5<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L5 + + // rotate 90 degree +ROTATE_90_L5: + (-f0.0)mov (1) acc0.5:f r6.5<0;1,0>:f + (-f0.0)mac (1) r6.5<1>:f r3.5<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.5:f r5.5<0;1,0>:f + mac (1) r5.5<1>:f r4.5<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L5 + + // rotate 180 degree +ROTATE_180_L5: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.5:f r6.5<0;1,0>:f + (-f0.0)mac (1) r6.5<1>:f r3.5<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.5:f r5.5<0;1,0>:f + mac (1) r5.5<1>:f r4.5<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L5 + + // rotate 270 degree +ROTATE_270_L5: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.5:f r6.5<0;1,0>:f + (-f0.0)mac (1) r6.5<1>:f r3.5<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.5:f r5.5<0;1,0>:f + mac (1) r5.5<1>:f r4.5<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L5: + nop + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 12:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L6 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L6 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L6 + + // rotate 0 degree +ROTATE_0_L6: + (-f0.0)mov (1) acc0.6:f r6.6<0;1,0>:f + (-f0.0)mac (1) r6.6<1>:f r3.6<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.6:f r5.6<0;1,0>:f + mac (1) r5.6<1>:f r4.6<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L6 + + // rotate 90 degree +ROTATE_90_L6: + (-f0.0)mov (1) acc0.6:f r6.6<0;1,0>:f + (-f0.0)mac (1) r6.6<1>:f r3.6<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.6:f r5.6<0;1,0>:f + mac (1) r5.6<1>:f r4.6<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L6 + + // rotate 180 degree +ROTATE_180_L6: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.6:f r6.6<0;1,0>:f + (-f0.0)mac (1) r6.6<1>:f r3.6<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.6:f r5.6<0;1,0>:f + mac (1) r5.6<1>:f r4.6<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L6 + + // rotate 270 degree +ROTATE_270_L6: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.6:f r6.6<0;1,0>:f + (-f0.0)mac (1) r6.6<1>:f r3.6<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.6:f r5.6<0;1,0>:f + mac (1) r5.6<1>:f r4.6<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L6: + nop + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 14:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L7 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L7 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L7 + + // rotate 0 degree +ROTATE_0_L7: + (-f0.0)mov (1) acc0.7:f r6.7<0;1,0>:f + (-f0.0)mac (1) r6.7<1>:f r3.7<0;1,0>:f r8.5<0;1,0>:f + + mov (1) acc0.7:f r5.7<0;1,0>:f + mac (1) r5.7<1>:f r4.7<0;1,0>:f r8.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L7 + + // rotate 90 degree +ROTATE_90_L7: + (-f0.0)mov (1) acc0.7:f r6.7<0;1,0>:f + (-f0.0)mac (1) r6.7<1>:f r3.7<0;1,0>:f r8.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.7:f r5.7<0;1,0>:f + mac (1) r5.7<1>:f r4.7<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L7 + + // rotate 180 degree +ROTATE_180_L7: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.7:f r6.7<0;1,0>:f + (-f0.0)mac (1) r6.7<1>:f r3.7<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.7:f r5.7<0;1,0>:f + mac (1) r5.7<1>:f r4.7<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L7 + + // rotate 270 degree +ROTATE_270_L7: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r8.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.7:f r6.7<0;1,0>:f + (-f0.0)mac (1) r6.7<1>:f r3.7<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.7:f r5.7<0;1,0>:f + mac (1) r5.7<1>:f r4.7<0;1,0>:f r8.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L7: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/YUV_to_RGB.g4a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/YUV_to_RGB.g4a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen7/YUV_to_RGB.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen7/YUV_to_RGB.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,1017 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * This file was originally licensed under the following license + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: + * Zhao Yakui + */ + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: YUV_to_RGB.asm +// +// Convert YUV to RGB, handle it by 16x4 block +// + + +// Description: Includes all definitions explicit to Fast Composite. + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare bBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + +//Unnecessary to use the MSGPayLoad, So it is temporiarily used for conversion of YUV->RGB + +.declare fBUFFER_R Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_G Base=r30.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_B Base=r32.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + +.declare fBUFFER_Y Base=r36.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_U Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_V Base=r40.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + + +.declare wTempR Base=r42.0 ElementSize=2 Type=w +.declare wTempG Base=r44.0 ElementSize=2 Type=w +.declare wTempB Base=r46.0 ElementSize=2 Type=w + +.declare ubTempR Base=r42.0 ElementSize=1 Type=ub +.declare ubTempG Base=r44.0 ElementSize=1 Type=ub +.declare ubTempB Base=r46.0 ElementSize=1 Type=ub + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare wTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + // NTSC standard + // R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255)) + // G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255)) + // B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255)) + // ITU-R conversion, Now we are using ITU-R conversion + // R = clip( Y + 1.402*(Cr-128)) // ITU-R + // G = clip( Y - 0.344*(Cb-128) - 0.714*(Cr-128)) + // B = clip( Y + 1.772*(Cb-128)) + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + //Y/U/V is also stored as R/G/B for the internal purpose +//for BUFFER_0 + mov (4) a0.0<1>:uw r22.0<4;4,1>:uw +//the first line in the block 0 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 0 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 0 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 0 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + + +//for BUFFER_1 + add (4) a0.0<1>:uw r22.0<4;4,1>:uw 512:uw +//the first line in the block 1 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 1 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 1 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 1 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + + +//for BUFFER_2 + add (4) a0.0<1>:uw r22.0<4;4,1>:uw 1024:uw +//the first line in the block 2 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 2 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 2 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 2 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + + +//for BUFFER_3 + add (4) a0.0<1>:uw r22.0<4;4,1>:uw 1536:uw +//the first line in the block 3 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 3 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 3 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 3 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,9 @@ +INTEL_PP_PRE_G75B = \ + sharpening_h_blur.g75b \ + sharpening_unmask.g75b \ + sharpening_v_blur.g75b + +EXTRA_DIST = $(INTEL_PP_PRE_G75B) + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,453 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + +@SET_MAKE@ +VPATH = @srcdir@ +am__is_gnu_make = test -n '$(MAKEFILE_LIST)' && test -n '$(MAKELEVEL)' +am__make_running_with_option = \ + case $${target_option-} in \ + ?) ;; \ + *) echo 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0x00000000 }, +{ 0x00000001, 0x602400b1, 0x00000040, 0x00000000 }, +{ 0x00000001, 0x204003a5, 0x00000128, 0x00000000 }, +{ 0x00000001, 0x41ef0231, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x602400b1, 0x00000040, 0x00000000 }, +{ 0x00000001, 0x204003a5, 0x0000012c, 0x00000000 }, +{ 0x00000001, 0x41f70231, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x602400b1, 0x00000040, 0x00000000 }, +{ 0x00000001, 0x204003a5, 0x00000130, 0x00000000 }, +{ 0x00000001, 0x41ff0231, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x602400b1, 0x00000040, 0x00000000 }, +{ 0x00000001, 0x204003a5, 0x00000134, 0x00000000 }, +{ 0x00000001, 0x42070231, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x602400b1, 0x00000040, 0x00000000 }, +{ 0x00000001, 0x204003a5, 0x00000138, 0x00000000 }, +{ 0x00000001, 0x420f0231, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x602400b1, 0x00000040, 0x00000000 }, +{ 0x00000001, 0x204003a5, 0x0000013c, 0x00000000 }, +{ 0x00000001, 0x42170231, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x21880061, 0x00000000, 0x000f0007 }, +{ 0x00000001, 0x602400b1, 0x00000040, 0x00000000 }, +{ 0x00000001, 0x218003bd, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x421f0231, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x218403bd, 0x00000028, 0x00000000 }, +{ 0x0c600031, 0x200003a0, 0x00000180, 0x00000200 }, +{ 0x00000040, 0x202c2c21, 0x0000002c, 0x00080008 }, +{ 0x00000040, 0x20243c21, 0x00000020, 0xfffcfffc }, +{ 0x05000010, 0x20000420, 0x0000002c, 0x00000024 }, +{ 0x00010220, 0x34001c00, 0x00001400, 0xffff9830 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000340, 0x02290000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x000f0003 }, +{ 0x00000001, 0x20400161, 0x00000000, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000028, 0x00000000 }, +{ 0x0c600031, 0x204003a1, 0x00000040, 0x00000200 }, +{ 0x00800001, 0x206003bd, 0x008d0040, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000344, 0x060a8000 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x000f0003 }, +{ 0x00000001, 0x20400161, 0x00000000, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000028, 0x00000000 }, +{ 0x0c600031, 0x200003a0, 0x00000040, 0x00000200 }, +{ 0x00000040, 0x20243c21, 0x00000020, 0xfffcfffc }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000340, 0x02290000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x000f0003 }, +{ 0x00000001, 0x204003bd, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000028, 0x00000000 }, +{ 0x0c600031, 0x204003a1, 0x00000040, 0x00000200 }, +{ 0x00800001, 0x206003bd, 0x008d0040, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000344, 0x060a8000 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x000f0003 }, +{ 0x00000001, 0x204003bd, 0x00000024, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000028, 0x00000000 }, +{ 0x0c600031, 0x200003a0, 0x00000040, 0x00000200 }, +{ 0x00600001, 0x2e0003bd, 0x008d0000, 0x00000000 }, +{ 0x07000031, 0x20000fa0, 0x00000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/sharpening_unmask.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/sharpening_unmask.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/sharpening_unmask.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/sharpening_unmask.g75b 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,170 @@ +{ 0x00000001, 0x21280161, 0x00000000, 0x00000000 }, +{ 0x00000001, 0x202c0161, 0x00000000, 0x00000000 }, +{ 0x00000001, 0x21480161, 0x00000000, 0x00050005 }, +{ 0x00000001, 0x21680161, 0x00000000, 0x00040004 }, +{ 0x00000001, 0x21880161, 0x00000000, 0x00020002 }, +{ 0x00000001, 0x21080161, 0x00000000, 0x00010001 }, +{ 0x06000010, 0x20002c20, 0x04000020, 0x00000000 }, +{ 0x00010220, 0x34001c00, 0x04001400, 0x00000530 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000128, 0x02190000 }, +{ 0x06000010, 0x20002c20, 0x02000030, 0x00000000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x00030003 }, +{ 0x00000001, 0x204003bd, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000028, 0x00000000 }, +{ 0x0c600031, 0x206003a1, 0x00000040, 0x00000200 }, +{ 0x00000040, 0x22000c20, 0x00000188, 0x02190000 }, +{ 0x00400001, 0x21a003bd, 0x00690060, 0x00000000 }, +{ 0x0c600031, 0x204003a1, 0x00000040, 0x00000200 }, +{ 0x00400001, 0x21c003bd, 0x00690040, 0x00000000 }, +{ 0x00010220, 0x34001c00, 0x02001400, 0x00000150 }, +{ 0x00000001, 0x218201ed, 0x00000000, 0x00800080 }, +{ 0x00400001, 0x217003bd, 0x006901a0, 0x00000000 }, +{ 0x00400001, 0x215003bd, 0x006901c0, 0x00000000 }, +{ 0x0020002c, 0x21601c01, 0x00490000, 0x00000460 }, +{ 0x00000001, 0x210c01ed, 0x00000000, 0x00800080 }, +{ 0x00400001, 0x217003bd, 0x006901a0, 0x00000000 }, +{ 0x00400001, 0x215003bd, 0x00690150, 0x00000000 }, +{ 0x0020002c, 0x21201c01, 0x00490000, 0x00000500 }, +{ 0x00400001, 0x217003bd, 0x00690150, 0x00000000 }, +{ 0x00000001, 0x218001ed, 0x00000000, 0x00800080 }, +{ 0x00400001, 0x215003bd, 0x00690150, 0x00000000 }, +{ 0x0020002c, 0x21001c01, 0x00490000, 0x00000570 }, +{ 0x00000001, 0x218001ed, 0x00000000, 0x00800080 }, +{ 0x0020002c, 0x21001c01, 0x00490000, 0x00000550 }, +{ 0x00000001, 0x4180002d, 0x00000030, 0x00000000 }, +{ 0x00400001, 0x217003bd, 0x00690150, 0x00000000 }, +{ 0x00000001, 0x202401ad, 0x00000180, 0x00000000 }, +{ 0x00400001, 0x215003bd, 0x006901a0, 0x00000000 }, +{ 0x0020002c, 0x21001c01, 0x00490000, 0x00000500 }, +{ 0x00400001, 0x219003bd, 0x00690150, 0x00000000 }, +{ 0x00000220, 0x34001c00, 0x00001400, 0x00000010 }, +{ 0x00400001, 0x219003bd, 0x006901a0, 0x00000000 }, +{ 0x01000010, 0x20002c20, 0x00000034, 0x00000000 }, +{ 0x00010220, 0x34001c00, 0x00001400, 0x00000160 }, +{ 0x00000001, 0x210e01ed, 0x00000000, 0x00800080 }, +{ 0x00400001, 0x217003bd, 0x006901a0, 0x00000000 }, +{ 0x00400001, 0x215003bd, 0x006901c0, 0x00000000 }, +{ 0x0020002c, 0x21801c01, 0x00490000, 0x000005e0 }, +{ 0x00000001, 0x210c01ed, 0x00000000, 0x00800080 }, +{ 0x00400001, 0x217003bd, 0x006901a0, 0x00000000 }, +{ 0x00400001, 0x215003bd, 0x00690150, 0x00000000 }, +{ 0x0020002c, 0x21201c01, 0x00490000, 0x00000380 }, +{ 0x00600040, 0x41503e31, 0x00ae4150, 0x00ff00ff }, +{ 0x00000001, 0x211001ed, 0x00000000, 0x00800080 }, +{ 0x00600040, 0x41513e31, 0x00ae4151, 0x00ff00ff }, +{ 0x00400001, 0x217003bd, 0x00690150, 0x00000000 }, +{ 0x0020002c, 0x21401c01, 0x00490000, 0x00000630 }, +{ 0x00000001, 0x211001ed, 0x00000000, 0x00800080 }, +{ 0x0020002c, 0x21401c01, 0x00490000, 0x00000610 }, +{ 0x00000001, 0x4110002d, 0x00000034, 0x00000000 }, +{ 0x00400001, 0x217003bd, 0x00690150, 0x00000000 }, +{ 0x00000001, 0x202401ad, 0x00000110, 0x00000000 }, +{ 0x00400001, 0x215003bd, 0x00690190, 0x00000000 }, +{ 0x0020002c, 0x21401c01, 0x00490000, 0x000005c0 }, +{ 0x00400001, 0x21e003bd, 0x00690150, 0x00000000 }, +{ 0x00000220, 0x34001c00, 0x00001400, 0x00000010 }, +{ 0x00400001, 0x21e003bd, 0x00690190, 0x00000000 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000168, 0x040a8000 }, +{ 0x00400001, 0x206003bd, 0x006901e0, 0x00000000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x00030003 }, +{ 0x00000001, 0x204003bd, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000028, 0x00000000 }, +{ 0x0c600031, 0x200003a0, 0x00000040, 0x00000200 }, +{ 0x0000000c, 0x20242c21, 0x00000028, 0x00010001 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000108, 0x02190000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x00010003 }, +{ 0x00000001, 0x204003bd, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000024, 0x00000000 }, +{ 0x0c600031, 0x204003a1, 0x00000040, 0x00000200 }, +{ 0x00200001, 0x206003bd, 0x00450040, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000148, 0x040a8000 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x00010003 }, +{ 0x00000001, 0x204003bd, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x204403bd, 0x00000024, 0x00000000 }, +{ 0x0c600031, 0x200003a0, 0x00000040, 0x00000200 }, +{ 0x00000040, 0x202c2c21, 0x0000002c, 0x00040004 }, +{ 0x05000010, 0x20000420, 0x0600002c, 0x00000020 }, +{ 0x00010220, 0x34001c00, 0x06001400, 0xfffffad0 }, +{ 0x00600001, 0x2e0003bd, 0x008d0000, 0x00000000 }, +{ 0x07000031, 0x20000fa0, 0x00000e00, 0x82000010 }, +{ 0x00000040, 0x20243da5, 0x00004182, 0x00800080 }, +{ 0x00600041, 0x20c03625, 0x008d0178, 0x00000182 }, +{ 0x00600041, 0x20803625, 0x008d0170, 0x00000182 }, +{ 0x05600010, 0x2000462c, 0x00ae0170, 0x00ae0150 }, +{ 0x00600041, 0x206044a5, 0x00000024, 0x008d0158 }, +{ 0x00600041, 0x204044a5, 0x00000024, 0x008d0150 }, +{ 0x00600040, 0x20a014a5, 0x008d00c0, 0x008d0060 }, +{ 0x00600040, 0x208014a5, 0x008d0080, 0x008d0040 }, +{ 0x0080000c, 0x40403cad, 0x008d0080, 0x00070007 }, +{ 0x05601010, 0x2000462c, 0x00ae0171, 0x00ae0151 }, +{ 0x00800001, 0x204001ad, 0x00ae0040, 0x00000000 }, +{ 0x00610001, 0x415001b1, 0x00ae0040, 0x00000000 }, +{ 0x00611001, 0x415101b1, 0x00ae0042, 0x00000000 }, +{ 0x0020002d, 0x20000024, 0x00450160, 0x00000000 }, +{ 0x00800040, 0x2040462d, 0x00b10150, 0x00b14170 }, +{ 0x00000040, 0x20243da5, 0x0000410c, 0x00800080 }, +{ 0x05800010, 0x20003dac, 0x04b10040, 0x00000000 }, +{ 0x00810001, 0x204001ad, 0x04b14040, 0x00000000 }, +{ 0x00600041, 0x208044a5, 0x00000024, 0x008d0158 }, +{ 0x00600041, 0x206044a5, 0x00000024, 0x008d0150 }, +{ 0x00800041, 0x20a035a5, 0x008d0040, 0x0000010c }, +{ 0x00800040, 0x204014a5, 0x008d00a0, 0x008d0060 }, +{ 0x0080000c, 0x60403cb1, 0x008d0040, 0x00070007 }, +{ 0x00800001, 0x21500231, 0x00cf0040, 0x00000000 }, +{ 0x0020002d, 0x20000024, 0x00450120, 0x00000000 }, +{ 0x00600040, 0x20803e25, 0x008d4170, 0x00ff00ff }, +{ 0x00600040, 0x20403e25, 0x008d4150, 0x00ff00ff }, +{ 0x00600040, 0x20a03e25, 0x008d4178, 0x00ff00ff }, +{ 0x00600040, 0x20603e25, 0x008d4158, 0x00ff00ff }, +{ 0x00000040, 0x20243da5, 0x00004180, 0x00800080 }, +{ 0x10600041, 0x240014a4, 0x008d0040, 0x008d0080 }, +{ 0x10600049, 0x200014a4, 0x008d0040, 0x008d0080 }, +{ 0x00600001, 0x20c00085, 0x008d0400, 0x00000000 }, +{ 0x10600041, 0x240014a4, 0x008d0060, 0x008d00a0 }, +{ 0x10600049, 0x200014a4, 0x008d0060, 0x008d00a0 }, +{ 0x00600001, 0x20e00085, 0x008d0400, 0x00000000 }, +{ 0x00000001, 0x204001e5, 0x00000000, 0x00ff00ff }, +{ 0x0c600038, 0x208014a5, 0x008d00e0, 0x00000040 }, +{ 0x0c600038, 0x206014a5, 0x008d00c0, 0x00000040 }, +{ 0x00800040, 0x40403cad, 0x008d4060, 0x00ff00ff }, +{ 0x00800001, 0x204001ad, 0x00ae0040, 0x00000000 }, +{ 0x00600041, 0x208044a5, 0x00000024, 0x008d0158 }, +{ 0x00800041, 0x20a035a5, 0x008d0040, 0x00000180 }, +{ 0x00600041, 0x206044a5, 0x00000024, 0x008d0150 }, +{ 0x00800040, 0x204014a5, 0x008d00a0, 0x008d0060 }, +{ 0x0080000c, 0x60403cb1, 0x008d0040, 0x00070007 }, +{ 0x00800001, 0x21500231, 0x00cf0040, 0x00000000 }, +{ 0x0020002d, 0x20000024, 0x00450100, 0x00000000 }, +{ 0x00000040, 0x20243da5, 0x0000410e, 0x00800080 }, +{ 0x00600041, 0x20c03625, 0x008d0178, 0x0000010e }, +{ 0x00600041, 0x20803625, 0x008d0170, 0x0000010e }, +{ 0x03600010, 0x2000462c, 0x02ae0170, 0x00ae0150 }, +{ 0x00600041, 0x206044a5, 0x00000024, 0x008d0158 }, +{ 0x00600041, 0x204044a5, 0x00000024, 0x008d0150 }, +{ 0x00600040, 0x20a014a5, 0x008d00c0, 0x008d0060 }, +{ 0x00600040, 0x208014a5, 0x008d0080, 0x008d0040 }, +{ 0x0080000c, 0x40403cad, 0x008d0080, 0x00070007 }, +{ 0x03601010, 0x2000462c, 0x02ae0171, 0x00ae0151 }, +{ 0x00800001, 0x204001ad, 0x00ae0040, 0x00000000 }, +{ 0x00610001, 0x415001b1, 0x02ae0040, 0x00000000 }, +{ 0x00611001, 0x415101b1, 0x02ae0042, 0x00000000 }, +{ 0x0020002d, 0x20000024, 0x00450180, 0x00000000 }, +{ 0x00000001, 0x208001e5, 0x00000000, 0x00ff00ff }, +{ 0x00600041, 0x20604625, 0x008d0178, 0x008d0158 }, +{ 0x00600041, 0x20404625, 0x008d0170, 0x008d0150 }, +{ 0x00000040, 0x20243da5, 0x00004110, 0x00800080 }, +{ 0x0c600038, 0x20c014a5, 0x008d0060, 0x00000080 }, +{ 0x0c600038, 0x20a014a5, 0x008d0040, 0x00000080 }, +{ 0x00800001, 0x404000ad, 0x008d00a0, 0x00000000 }, +{ 0x00800001, 0x204001ad, 0x00ae0040, 0x00000000 }, +{ 0x00600041, 0x208044a5, 0x00000024, 0x008d0158 }, +{ 0x00800041, 0x20a035a5, 0x008d0040, 0x00000110 }, +{ 0x00600041, 0x206044a5, 0x00000024, 0x008d0150 }, +{ 0x00800040, 0x204014a5, 0x008d00a0, 0x008d0060 }, +{ 0x0080000c, 0x60403cb1, 0x008d0040, 0x00070007 }, +{ 0x00800001, 0x21500231, 0x00cf0040, 0x00000000 }, +{ 0x0020002d, 0x20000024, 0x00450140, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/sharpening_v_blur.g75b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/sharpening_v_blur.g75b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen75/sharpening_v_blur.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen75/sharpening_v_blur.g75b 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,368 @@ +{ 0x00000001, 0x23600161, 0x00000000, 0x00000000 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000001, 0x23640161, 0x00000000, 0x00020002 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, +{ 0x00000001, 0x204003bd, 0x0000002c, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000360, 0x02490000 }, +{ 0x00000001, 0x20440161, 0x00000000, 0x00000000 }, +{ 0x00000001, 0x20280161, 0x00000000, 0x00040004 }, +{ 0x0c600031, 0x22e003a1, 0x00000040, 0x00000200 }, +{ 0x00000040, 0x20203c21, 0x00000024, 0xfffcfffc }, +{ 0x06000010, 0x20002c20, 0x02000020, 0x00040004 }, +{ 0x00010220, 0x34001c00, 0x02001400, 0x00001470 }, +{ 0x00600001, 0x204003bd, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000c20, 0x00000360, 0x02490000 }, +{ 0x00800001, 0x22a003bd, 0x008d0320, 0x00000000 }, +{ 0x00800001, 0x226003bd, 0x008d02e0, 0x00000000 }, +{ 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, +{ 0x00000001, 0x204003bd, 0x0000002c, 0x00000000 }, +{ 0x00000040, 0x20442c21, 0x00000028, 0x00040004 }, +{ 0x00600001, 0x20a0023d, 0x008d0278, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d0270, 0x00000000 }, +{ 0x00600001, 0x2060023d, 0x008d0268, 0x00000000 }, +{ 0x0c600031, 0x22e003a1, 0x00000040, 0x00000200 }, +{ 0x00000001, 0x202003fd, 0x00000000, 0x332bcc77 }, +{ 0x00800041, 0x20c07fbd, 0x008d0080, 0x3875735f }, +{ 0x00600001, 0x2040023d, 0x008d0260, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392061c8, 0x00872002 }, +{ 0x0060015b, 0x091e0000, 0x392071c8, 0x00c72002 }, +{ 0x00600001, 0x20a0023d, 0x008d0288, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d0280, 0x00000000 }, +{ 0x00000001, 0x214003fd, 0x00000000, 0x3e525448 }, +{ 0x00000001, 0x216003fd, 0x00000000, 0x3875735f }, +{ 0x00600001, 0x2040023d, 0x008d0270, 0x00000000 }, +{ 0x00000001, 0x203003fd, 0x00000000, 0x3c1d98ad }, +{ 0x00600001, 0x2060023d, 0x008d0278, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00600001, 0x20a0023d, 0x008d0298, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d0290, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x00600001, 0x20a0023d, 0x008d02a8, 0x00000000 }, +{ 0x00000001, 0x215003fd, 0x00000000, 0x3f11e168 }, +{ 0x00600001, 0x2080023d, 0x008d02a0, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072015 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472015 }, +{ 0x00600001, 0x20a0023d, 0x008d02b8, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d02b0, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x00600001, 0x20a0023d, 0x008d02c8, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d02c0, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x00600001, 0x20a0023d, 0x008d02d8, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d02d0, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072016 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0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00600001, 0x2080023d, 0x008d02b0, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d02b8, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072015 }, +{ 0x00600001, 0x2060023d, 0x008d0288, 0x00000000 }, +{ 0x00600001, 0x2040023d, 0x008d0280, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472015 }, +{ 0x00600001, 0x2080023d, 0x008d02c0, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d02c8, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00600001, 0x2080023d, 0x008d02d0, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d02d8, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00600001, 0x2080023d, 0x008d02e0, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d02e8, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 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0x00600001, 0x2080023d, 0x008d0300, 0x00000000 }, +{ 0x00600001, 0x2060023d, 0x008d0298, 0x00000000 }, +{ 0x00600001, 0x2040023d, 0x008d0290, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d0308, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072002 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472002 }, +{ 0x00600001, 0x20a0023d, 0x008d02a8, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d02a0, 0x00000000 }, +{ 0x00800001, 0x222003a5, 0x008d0100, 0x00000000 }, +{ 0x00800041, 0x20c07fbd, 0x008d0080, 0x3875735f }, +{ 0x00800001, 0x622000b1, 0x008d0220, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d02b8, 0x00000000 }, +{ 0x00600001, 0x2080023d, 0x008d02b0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392071c8, 0x00c72002 }, +{ 0x0060015b, 0x081e0000, 0x392061c8, 0x00872002 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00600001, 0x2040023d, 0x008d02a0, 0x00000000 }, +{ 0x00600001, 0x2060023d, 0x008d02a8, 0x00000000 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0x00600001, 0x20a0023d, 0x008d02e8, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00600001, 0x2080023d, 0x008d02f0, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d02f8, 0x00000000 }, +{ 0x00800001, 0x21e00231, 0x00cf0220, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472015 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072015 }, +{ 0x00600001, 0x2080023d, 0x008d0300, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d0308, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00600001, 0x2060023d, 0x008d02c8, 0x00000000 }, +{ 0x00600001, 0x2040023d, 0x008d02c0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x00600001, 0x2080023d, 0x008d0310, 0x00000000 }, +{ 0x00600001, 0x20a0023d, 0x008d0318, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00600001, 0x2080023d, 0x008d0320, 0x00000000 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under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 2 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//End of Thread message + +mov (8) r127<1>:ud r0.0<8;8,1>:ud + send (1) null<1>:d r127 0x27 0x02000010 diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,79 @@ +INTEL_PP_G8B = \ + pl2_to_pl2.g8b \ + pl2_to_pl3.g8b \ + pl3_to_pl2.g8b \ + pl3_to_pl3.g8b \ + pl2_to_rgbx.g8b \ + rgbx_to_nv12.g8b \ + pl2_to_pa.g8b \ + pl3_to_pa.g8b \ + pa_to_pl2.g8b \ + pa_to_pl3.g8b \ + pa_to_pa.g8b \ + $(NULL) + +INTEL_PP_PRE_G8B = \ + sharpening_h_blur.g8b \ + sharpening_unmask.g8b \ + sharpening_v_blur.g8b + +INTEL_PP_G8A = \ + EOT.g8a \ + PL2_AVS_Buf_0.g8a \ + PL2_AVS_Buf_1.g8a \ + PL2_AVS_Buf_2.g8a \ + PL2_AVS_Buf_3.g8a \ + PL3_AVS_Buf_0.g8a \ + PL3_AVS_Buf_1.g8a \ + PL3_AVS_Buf_2.g8a \ + PL3_AVS_Buf_3.g8a \ + PA_AVS_Buf_0.g8a \ + PA_AVS_Buf_1.g8a \ + PA_AVS_Buf_2.g8a \ + PA_AVS_Buf_3.g8a \ + Save_AVS_NV12.g8a \ + Save_AVS_PL3.g8a \ + Save_AVS_RGBX.g8a \ + Save_AVS_PA.g8a \ + Set_AVS_Buf_0123_PL2.g8a \ + Set_AVS_Buf_0123_PL3.g8a \ + Set_AVS_Buf_0123_BGRA.g8a \ + Set_AVS_Buf_0123_VYUA.g8a \ + YUV_to_RGB.g8a \ + RGB_to_YUV.g8a \ + Set_Layer_0.g8a \ + VP_Setup.g8a \ + $(NULL) + +INTEL_PP_ASM = $(INTEL_PP_G8B:%.g8b=%.asm) +INTEL_PP_GEN8_ASM = $(INTEL_PP_G8B:%.g8b=%.g8s) + +TARGETS = +if HAVE_GEN4ASM +TARGETS += $(INTEL_PP_G8B) +endif + +all-local: $(TARGETS) + +SUFFIXES = .g8b .g8s .asm + +if HAVE_GEN4ASM +$(INTEL_PP_GEN8_ASM): $(INTEL_PP_ASM) $(INTEL_PP_G8A) +.asm.g8s: + $(AM_V_GEN)cpp $< > _pp0.$@; \ + $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ + rm _pp0.$@ +.g8s.g8b: + $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 8 $< +endif + +CLEANFILES = $(INTEL_PP_GEN7_ASM) + +EXTRA_DIST = \ + $(INTEL_PP_ASM) \ + $(INTEL_PP_G8A) \ + $(INTEL_PP_G8B) \ + $(INTEL_PP_PRE_G8B) + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,519 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty of MERCHANTABILITY or FITNESS FOR A +# PARTICULAR PURPOSE. + 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+dvidir = @dvidir@ +exec_prefix = @exec_prefix@ +host = @host@ +host_alias = @host_alias@ +host_cpu = @host_cpu@ +host_os = @host_os@ +host_vendor = @host_vendor@ +htmldir = @htmldir@ +includedir = @includedir@ +infodir = @infodir@ +install_sh = @install_sh@ +libdir = @libdir@ +libexecdir = @libexecdir@ +localedir = @localedir@ +localstatedir = @localstatedir@ +mandir = @mandir@ +mkdir_p = @mkdir_p@ +oldincludedir = @oldincludedir@ +pdfdir = @pdfdir@ +prefix = @prefix@ +program_transform_name = @program_transform_name@ +psdir = @psdir@ +sbindir = @sbindir@ +sharedstatedir = @sharedstatedir@ +srcdir = @srcdir@ +sysconfdir = @sysconfdir@ +target_alias = @target_alias@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +INTEL_PP_G8B = \ + pl2_to_pl2.g8b \ + pl2_to_pl3.g8b \ + pl3_to_pl2.g8b \ + pl3_to_pl3.g8b \ + pl2_to_rgbx.g8b \ + rgbx_to_nv12.g8b \ + pl2_to_pa.g8b \ + pl3_to_pa.g8b \ + pa_to_pl2.g8b \ + pa_to_pl3.g8b \ + pa_to_pa.g8b \ + $(NULL) + +INTEL_PP_PRE_G8B = \ + sharpening_h_blur.g8b \ + sharpening_unmask.g8b \ + sharpening_v_blur.g8b + +INTEL_PP_G8A = \ + EOT.g8a \ + PL2_AVS_Buf_0.g8a \ + PL2_AVS_Buf_1.g8a \ + PL2_AVS_Buf_2.g8a \ + PL2_AVS_Buf_3.g8a \ + PL3_AVS_Buf_0.g8a \ + PL3_AVS_Buf_1.g8a \ + PL3_AVS_Buf_2.g8a \ + PL3_AVS_Buf_3.g8a \ + PA_AVS_Buf_0.g8a \ + PA_AVS_Buf_1.g8a \ + PA_AVS_Buf_2.g8a \ + PA_AVS_Buf_3.g8a \ + Save_AVS_NV12.g8a \ + Save_AVS_PL3.g8a \ + Save_AVS_RGBX.g8a \ + Save_AVS_PA.g8a \ + Set_AVS_Buf_0123_PL2.g8a \ + Set_AVS_Buf_0123_PL3.g8a \ + Set_AVS_Buf_0123_BGRA.g8a \ + Set_AVS_Buf_0123_VYUA.g8a \ + YUV_to_RGB.g8a \ + RGB_to_YUV.g8a \ + Set_Layer_0.g8a \ + VP_Setup.g8a \ + $(NULL) + +INTEL_PP_ASM = $(INTEL_PP_G8B:%.g8b=%.asm) +INTEL_PP_GEN8_ASM = $(INTEL_PP_G8B:%.g8b=%.g8s) +TARGETS = $(am__append_1) +SUFFIXES = .g8b .g8s .asm +CLEANFILES = $(INTEL_PP_GEN7_ASM) +EXTRA_DIST = \ + $(INTEL_PP_ASM) \ + $(INTEL_PP_G8A) \ + $(INTEL_PP_G8B) \ + $(INTEL_PP_PRE_G8B) + + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g8b .g8s .asm +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/post_processing/gen8/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/shaders/post_processing/gen8/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs +tags TAGS: + +ctags CTAGS: + +cscope cscopelist: + + +distdir: $(DISTFILES) + @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + list='$(DISTFILES)'; \ + dist_files=`for file in $$list; do echo $$file; done | \ + sed -e "s|^$$srcdirstrip/||;t" \ + -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ + case $$dist_files in \ + */*) $(MKDIR_P) `echo "$$dist_files" | \ + sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ + sort -u` ;; \ + esac; \ + for file in $$dist_files; do \ + if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ + if test -d $$d/$$file; then \ + dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ + if test -d "$(distdir)/$$file"; then \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ + cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ + else \ + test -f "$(distdir)/$$file" \ + || cp -p $$d/$$file "$(distdir)/$$file" \ + || exit 1; \ + fi; \ + done +check-am: all-am +check: check-am +all-am: Makefile all-local +installdirs: +install: install-am +install-exec: install-exec-am +install-data: install-data-am +uninstall: uninstall-am + +install-am: all-am + @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am + +installcheck: installcheck-am +install-strip: + if test -z '$(STRIP)'; then \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + install; \ + else \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \ + fi +mostlyclean-generic: + +clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) + +distclean-generic: + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + +maintainer-clean-generic: + @echo "This command is intended for maintainers to use" + @echo "it deletes files that may require special tools to rebuild." + -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) +clean: clean-am + +clean-am: clean-generic clean-libtool mostlyclean-am + +distclean: distclean-am + -rm -f Makefile +distclean-am: clean-am distclean-generic + +dvi: dvi-am + +dvi-am: + +html: html-am + +html-am: + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-dvi-am: + +install-exec-am: + +install-html: install-html-am + +install-html-am: + +install-info: install-info-am + +install-info-am: + +install-man: + +install-pdf: install-pdf-am + +install-pdf-am: + +install-ps: install-ps-am + +install-ps-am: + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-generic mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: all all-am all-local check check-am clean clean-generic \ + clean-libtool cscopelist-am ctags-am distclean \ + distclean-generic distclean-libtool distdir dvi dvi-am html \ + html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-pdf install-pdf-am \ + install-ps install-ps-am install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-generic \ + mostlyclean-libtool pdf pdf-am ps ps-am tags-am uninstall \ + uninstall-am + + +all-local: $(TARGETS) + +@HAVE_GEN4ASM_TRUE@$(INTEL_PP_GEN8_ASM): $(INTEL_PP_ASM) $(INTEL_PP_G8A) +@HAVE_GEN4ASM_TRUE@.asm.g8s: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp $< > _pp0.$@; \ +@HAVE_GEN4ASM_TRUE@ $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ +@HAVE_GEN4ASM_TRUE@ rm _pp0.$@ +@HAVE_GEN4ASM_TRUE@.g8s.g8b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 8 $< + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_0.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_0.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_0.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_0.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,457 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x50EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x00000000:ud // Enable ARGB channels + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 0:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_0(0)<1> r16 0x2 a0.0:ud + // Returns RGBA data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_1.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_1.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_1.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_1.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,457 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x50EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x00000000:ud // Enable ARGB channels + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 1:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_1(0)<1> r16 0x2 a0.0:ud + // Returns RGBA data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_2.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_2.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_2.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_2.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,457 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x50EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x00000000:ud // Enable ARGB channels + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 2:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_2(0)<1> r16 0x2 a0.0:ud + // Returns RGBA data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_3.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_3.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PA_AVS_Buf_3.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PA_AVS_Buf_3.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,457 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x50EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x00000000:ud // Enable ARGB channels + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 3:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_3(0)<1> r16 0x2 a0.0:ud + // Returns RGBA data in 16 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel YUY2_TO_NV12 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_VYUA.g8a" +#include "PA_AVS_Buf_0.g8a" +#include "PA_AVS_Buf_1.g8a" +#include "PA_AVS_Buf_2.g8a" +#include "PA_AVS_Buf_3.g8a" +#include "Save_AVS_PA.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pa.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pa.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pa.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pa.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,279 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x000062ea }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006420 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22082260, 0x1669005c, 0x03a003a0 }, + { 0x00000209, 0x23601a28, 0x1e000120, 0x00010001 }, + { 0x00000601, 0x23641a28, 0x00000122, 0x00000000 }, + { 0x00000401, 0x23680608, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x08000800 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000002 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000004 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000006 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000a }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000e }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl2.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl2.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl2.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel YUY2_TO_NV12 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_VYUA.g8a" +#include "PA_AVS_Buf_0.g8a" +#include "PA_AVS_Buf_1.g8a" +#include "PA_AVS_Buf_2.g8a" +#include "PA_AVS_Buf_3.g8a" +#include "Save_AVS_NV12.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl2.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl2.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl2.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl2.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,186 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x000062ea }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006420 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00000201, 0x24a01a28, 0x00000120, 0x00000000 }, + { 0x00000608, 0x24a41a28, 0x1e000122, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x44c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x44d02288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x44c12288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x44d12288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x44e02288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x44f02288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x44e12288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x44f12288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x45002288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x45102288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x45012288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x45112288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x45202288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x45302288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x45212288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x45312288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel YUY2_TO_NV12 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_VYUA.g8a" +#include "PA_AVS_Buf_0.g8a" +#include "PA_AVS_Buf_1.g8a" +#include "PA_AVS_Buf_2.g8a" +#include "PA_AVS_Buf_3.g8a" +#include "Save_AVS_PL3.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl3.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl3.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pa_to_pl3.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pa_to_pl3.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,189 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x000062ea }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006420 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00200208, 0x24a01a28, 0x1e450120, 0x00010001 }, + { 0x00200208, 0x25c01a28, 0x1e450120, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x00070007 }, + { 0x00000401, 0x25c80608, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24c82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x25e02288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x25e82288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24d02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24d82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x25f02288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x25f82288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24e02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24e82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x26002288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x26082288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24f02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24f82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x26102288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x26182288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8019 }, + { 0x0c000031, 0x20002220, 0x060005c0, 0x060a801a }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_0.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_0.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_0.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_0.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,462 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + + // set the vertical block number + + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_0(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x48EB001:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_0(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_1.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_1.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_1.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_1.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,458 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 42 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_1.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 1 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + mov (1) r25.1<1>:ud 1:ud + + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_1(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x48EB001:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_1(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_1_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_2.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_2.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_2.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_2.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,458 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 42 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_2.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 2 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + + mov (1) r25.1<1>:ud 2:ud + + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_2(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x48EB001:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_2(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_2_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_3.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_3.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL2_AVS_Buf_3.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL2_AVS_Buf_3.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,460 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 42 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_3.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + // set the vertical block number + + + mov (1) r25.1<1>:ud 3:ud + + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_3(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x48EB001:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000A000:ud // Enable Red+Blue channel + + send (1) uwBUFFER_3(4)<1> r16 0x2 a0.0:ud + // Returns UV data in 8 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_3_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL2_TO_PA +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_PL2.g8a" +#include "PL2_AVS_Buf_0.g8a" +#include "PL2_AVS_Buf_1.g8a" +#include "PL2_AVS_Buf_2.g8a" +#include "PL2_AVS_Buf_3.g8a" +#include "Save_AVS_PA.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pa.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pa.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pa.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pa.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,287 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22082260, 0x1669005c, 0x03a003a0 }, + { 0x00000209, 0x23601a28, 0x1e000120, 0x00010001 }, + { 0x00000601, 0x23641a28, 0x00000122, 0x00000000 }, + { 0x00000401, 0x23680608, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x08000800 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000002 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000004 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000006 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000a }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000e }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl2.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl2.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl2.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL2_TO_PL2 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_PL2.g8a" +#include "PL2_AVS_Buf_0.g8a" +#include "PL2_AVS_Buf_1.g8a" +#include "PL2_AVS_Buf_2.g8a" +#include "PL2_AVS_Buf_3.g8a" +#include "Save_AVS_NV12.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl2.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl2.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl2.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl2.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,194 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00000201, 0x24a01a28, 0x00000120, 0x00000000 }, + { 0x00000608, 0x24a41a28, 0x1e000122, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x44c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x44d02288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x44c12288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x44d12288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x44e02288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x44f02288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x44e12288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x44f12288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x45002288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x45102288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x45012288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x45112288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x45202288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x45302288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x45212288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x45312288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL2_TO_PL3 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_PL2.g8a" +#include "PL2_AVS_Buf_0.g8a" +#include "PL2_AVS_Buf_1.g8a" +#include "PL2_AVS_Buf_2.g8a" +#include "PL2_AVS_Buf_3.g8a" +#include "Save_AVS_PL3.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl3.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl3.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_pl3.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_pl3.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,197 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00200208, 0x24a01a28, 0x1e450120, 0x00010001 }, + { 0x00200208, 0x25c01a28, 0x1e450120, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x00070007 }, + { 0x00000401, 0x25c80608, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24c82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x25e02288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x25e82288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24d02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24d82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x25f02288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x25f82288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24e02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24e82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x26002288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x26082288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24f02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24f82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x26102288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x26182288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8019 }, + { 0x0c000031, 0x20002220, 0x060005c0, 0x060a801a }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_rgbx.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_rgbx.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_rgbx.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_rgbx.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: AVS +.kernel PL2_TO_PL2 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_PL2.g8a" +#include "PL2_AVS_Buf_0.g8a" +#include "PL2_AVS_Buf_1.g8a" +#include "PL2_AVS_Buf_2.g8a" +#include "PL2_AVS_Buf_3.g8a" +#include "YUV_to_RGB.g8a" +#include "Save_AVS_RGBX.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_rgbx.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_rgbx.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl2_to_rgbx.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl2_to_rgbx.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,770 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22001240, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x248022e8, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x24a022e8, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x24c022e8, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x24e022e8, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x250022e8, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x252022e8, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24803ae8, 0x3e200480, 0x3b8080c4 }, + { 0x00800041, 0x24c03ae8, 0x3e2004c0, 0x3b8080c4 }, + { 0x00800041, 0x25003ae8, 0x3e200500, 0x3b8080c4 }, + { 0x00800040, 0x24803ae8, 0x3a200480, 0x000000ec }, + { 0x00800040, 0x24c03ae8, 0x3a2004c0, 0x000000fc }, + { 0x00800040, 0x25003ae8, 0x3a200500, 0x0000010c }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000e0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000e4 }, + { 0x80800048, 0x23803ae8, 0x3a8d0500, 0x000000e8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000f0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000f4 }, + { 0x80800048, 0x23c03ae8, 0x3a8d0500, 0x000000f8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x00000100 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x00000104 }, + { 0x80800048, 0x24003ae8, 0x3a8d0500, 0x00000108 }, + { 0x00800041, 0x23803ae8, 0x3e8d0380, 0x437f0000 }, + { 0x00800041, 0x23c03ae8, 0x3e8d03c0, 0x437f0000 }, + { 0x00800041, 0x24003ae8, 0x3e8d0400, 0x437f0000 }, + { 0x00800001, 0x45403a68, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc2012288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc4012288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0012288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x248022e8, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x24a022e8, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x24c022e8, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x24e022e8, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x250022e8, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x252022e8, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24803ae8, 0x3e200480, 0x3b8080c4 }, + { 0x00800041, 0x24c03ae8, 0x3e2004c0, 0x3b8080c4 }, + { 0x00800041, 0x25003ae8, 0x3e200500, 0x3b8080c4 }, + { 0x00800040, 0x24803ae8, 0x3a200480, 0x000000ec }, + { 0x00800040, 0x24c03ae8, 0x3a2004c0, 0x000000fc }, + { 0x00800040, 0x25003ae8, 0x3a200500, 0x0000010c }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000e0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000e4 }, + { 0x80800048, 0x23803ae8, 0x3a8d0500, 0x000000e8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000f0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000f4 }, + { 0x80800048, 0x23c03ae8, 0x3a8d0500, 0x000000f8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x00000100 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x00000104 }, + { 0x80800048, 0x24003ae8, 0x3a8d0500, 0x00000108 }, + { 0x00800041, 0x23803ae8, 0x3e8d0380, 0x437f0000 }, + { 0x00800041, 0x23c03ae8, 0x3e8d03c0, 0x437f0000 }, + { 0x00800041, 0x24003ae8, 0x3e8d0400, 0x437f0000 }, + { 0x00800001, 0x45403a68, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc2212288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc4212288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0212288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x248022e8, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x24a022e8, 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{ 0x00600001, 0x66232288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66402288, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x66412288, 0x00ae8261, 0x00000000 }, + { 0x00600001, 0x66422288, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x66432288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67402288, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x67412288, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x67422288, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x67432288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67602288, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x67612288, 0x00ae8271, 0x00000000 }, + { 0x00600001, 0x67622288, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x67632288, 0x0000005f, 0x00000000 }, + { 0x0c800031, 0x20002220, 0x060005c0, 0x0a0a8018 }, + { 0x0c800031, 0x20002220, 0x060006e0, 0x0a0a8018 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x26e00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a00a28, 0x0e000360, 0x00000020 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x25c40a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x26e40a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x26e00a28, 0x0e000360, 0x00000020 }, + { 0x00400040, 0x22001040, 0x16690208, 0x04000400 }, + { 0x00600001, 0x63a02288, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x63a12288, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x63a22288, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x63a32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63c02288, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x63c12288, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x63c22288, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x63c32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64c02288, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x64c12288, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x64c22288, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x64c32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64e02288, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x64e12288, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x64e22288, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x64e32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63e02288, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x63e12288, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x63e22288, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x63e32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64002288, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x64012288, 0x00ae8261, 0x00000000 }, + { 0x00600001, 0x64022288, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x64032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65002288, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x65012288, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x65022288, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x65032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65202288, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x65212288, 0x00ae8271, 0x00000000 }, + { 0x00600001, 0x65222288, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x65232288, 0x0000005f, 0x00000000 }, + { 0x0c800031, 0x20002220, 0x06000380, 0x0a0a8018 }, + { 0x0c800031, 0x20002220, 0x060004a0, 0x0a0a8018 }, + { 0x00400040, 0x22001040, 0x16690208, 0x06000600 }, + { 0x00600001, 0x65e02288, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x65e12288, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x65e22288, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x65e32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66002288, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x66012288, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x66022288, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x66032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67002288, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x67012288, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x67022288, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x67032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67202288, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x67212288, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x67222288, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x67232288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66202288, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x66212288, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x66222288, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x66232288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66402288, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x66412288, 0x00ae8261, 0x00000000 }, + { 0x00600001, 0x66422288, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x66432288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67402288, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x67412288, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x67422288, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x67432288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67602288, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x67612288, 0x00ae8271, 0x00000000 }, + { 0x00600001, 0x67622288, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x67632288, 0x0000005f, 0x00000000 }, + { 0x0c800031, 0x20002220, 0x060005c0, 0x0a0a8018 }, + { 0x0c800031, 0x20002220, 0x060006e0, 0x0a0a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_0.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_0.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_0.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_0.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,470 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 0:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_0(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB001:ud // msg desc; 1 is added to change BI to UV + + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_0(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB002:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_0(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_1.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_1.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_1.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_1.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,470 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 1:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_1(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB001:ud // msg desc; 1 is added to change BI to UV + + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_1(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB002:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_1(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_2.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_2.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_2.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_2.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,470 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 2:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_2(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB001:ud // msg desc; 1 is added to change BI to UV + + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_2(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB002:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_2(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_3.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_3.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/PL3_AVS_Buf_3.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/PL3_AVS_Buf_3.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,470 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 44 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: PL2_AVS_Buf_0.asm +// Author: Tatiya, Rupesh +// Description: Loads 8x8 AVS/IEF PL2 data into Buffer 0 + + + +// FileName : PL2_AVS_Buf.asm +// Author : Tatiya, Rupesh +// Description : Loads 8x8 AVS/IEF PL2 data into Buffer N + + + +// Module name: Scaling.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + // Message Header + // m0.7 31:0 Debug + // m0.6 31:0 Debug + // m0.5 31:0 Ignored + // m0.4 31:0 Ignored + // m0.3 31:0 Ignored + // m0.2 31:16 Ignored + // 15 Alpha Write Channel Mask enable=0, disable=1 + // 14 Blue Write Channel Mask (U) + // 13 Green Write Channel Mask (Y) + // 12 Red Write Channel Mask (V) + // 11:0 Ignored + // m0.1 Ignored + // m0.0 Ignored + + + // AVS payload + // m1.7 Group ID Number + // m1.6 U 2nd Derivative ---> NLAS dx + // m1.5 Delta V ---> Step Y + // m1.4 Delta U ---> Step X + // m1.3 Pixel 0 V Address ---> ORIY (Y0) + // m1.2 Pixel 0 U Address ---> ORIX (X0) + // m1.1 Vertical Block Number + // m1.0 Reserved + + // Sampler Message Descriptor + // 31:29 Reserved 000 + // 28:25 Message length 0010 + // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) + // 19 Header Present 1 + // 18:17 SIMD Mode 11 ---> SIMD32/64 + // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) + // 11:8 Sampler Index xxxx + // 7:0 Binding Table Index xxxxxxxx + + + // Msg Header M0.2 + // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back + // 14:14 Blue Write Channel Mask + // 13:13 Green Write Channel Mask + // 12:12 Red Write Channel Mask + + +//By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 + + +//used to generate LABELS at compile time. + + + // 18:17 SIMD Mode 10 ---> SIMD16 + // 16:12 Message Type xxxxx ---> 00000 (SIMD16) + + +//r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) +//r18-19 - 2 GRFs to store sampler ramp. + + .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub + + + .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub + .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + + // Sampler ramp is used for Scaling 0X_0.34X + .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements + + + //#define rMSGDSC_UV r23.0 + + +//End of _SCALING_ + + + //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. + //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. + mov (1) r22.4<1>:ud 0x400040:ud + + + mov (1) r16.3<1>:ud r0.3<0;1,0>:ud + + + //AVS_PAYLOAD already has all the data loaded at this point + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB000:ud //msg desc + + mov (1) r16.2<1>:ud 0x0000D000:ud // Enable Red channel + + + + // set the vertical block number + + mov (1) r25.1<1>:ud 3:ud + + mov (8) r17.0<1>:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs + + send (1) uwBUFFER_3(0)<1> r16 0x2 a0.0:ud + // Returns Y data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB001:ud // msg desc; 1 is added to change BI to UV + + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_3(4)<1> r16 0x2 a0.0:ud + // Returns U data in 4 GRFs in scrambled order + + add (1) a0.0<1>:ud r23.5<0;1,0>:ud 0x44EB002:ud // msg desc; 1 is added to change BI to UV + mov (1) r16.2<1>:ud 0x0000E000:ud // Enable Red channel + + send (1) uwBUFFER_3(8)<1> r16 0x2 a0.0:ud + // Returns V data in 4 GRFs in scrambled order + +SKIP_AVS_LOAD_L0_0_: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pa.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pa.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pa.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pa.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL3_TO_PL3 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_PL3.g8a" +#include "PL3_AVS_Buf_0.g8a" +#include "PL3_AVS_Buf_1.g8a" +#include "PL3_AVS_Buf_2.g8a" +#include "PL3_AVS_Buf_3.g8a" +#include "Save_AVS_PA.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pa.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pa.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pa.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pa.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,303 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22082260, 0x1669005c, 0x03a003a0 }, + { 0x00000209, 0x23601a28, 0x1e000120, 0x00010001 }, + { 0x00000601, 0x23641a28, 0x00000122, 0x00000000 }, + { 0x00000401, 0x23680608, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x08000800 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000002 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000004 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000006 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000a }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000e }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl2.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl2.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl2.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl2.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL3_TO_PL2 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_PL3.g8a" +#include "PL3_AVS_Buf_0.g8a" +#include "PL3_AVS_Buf_1.g8a" +#include "PL3_AVS_Buf_2.g8a" +#include "PL3_AVS_Buf_3.g8a" +#include "Save_AVS_NV12.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl2.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl2.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl2.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl2.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,210 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00000201, 0x24a01a28, 0x00000120, 0x00000000 }, + { 0x00000608, 0x24a41a28, 0x1e000122, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x44c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x44d02288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x44c12288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x44d12288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x44e02288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x44f02288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x44e12288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x44f12288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x45002288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x45102288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x45012288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x45112288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x45202288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x45302288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x45212288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x45312288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl3.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl3.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl3.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl3.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,17 @@ +// Module name: AVS +.kernel PL3_TO_PL3 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_PL3.g8a" +#include "PL3_AVS_Buf_0.g8a" +#include "PL3_AVS_Buf_1.g8a" +#include "PL3_AVS_Buf_2.g8a" +#include "PL3_AVS_Buf_3.g8a" +#include "Save_AVS_PL3.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl3.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl3.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/pl3_to_pl3.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/pl3_to_pl3.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,213 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00200208, 0x24a01a28, 0x1e450120, 0x00010001 }, + { 0x00200208, 0x25c01a28, 0x1e450120, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x00070007 }, + { 0x00000401, 0x25c80608, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24c82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x25e02288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x25e82288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24d02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24d82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x25f02288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x25f82288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24e02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24e82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x26002288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x26082288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24f02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24f82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x26102288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x26182288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8019 }, + { 0x0c000031, 0x20002220, 0x060005c0, 0x060a801a }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/RGB_to_YUV.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/RGB_to_YUV.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/RGB_to_YUV.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/RGB_to_YUV.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,910 @@ +/* + * Copyright 2000-2013 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: + * Zhao Yakui + */ + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: YUV_to_RGB.asm +// +// Convert YUV to RGB, handle it by 16x4 block +// + + +// Description: Includes all definitions explicit to Fast Composite. + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare bBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +//Pointer to mask reg + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + +//Unnecessary to use the MSGPayLoad, So it is temporiarily used for conversion of YUV->RGB + +.declare fBUFFER_R Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_G Base=r30.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_B Base=r32.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + +.declare fBUFFER_Y Base=r36.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_U Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_V Base=r40.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + +.declare wTempY Base=r42.0 ElementSize=2 Type=w +.declare wTempU Base=r44.0 ElementSize=2 Type=w +.declare wTempV Base=r46.0 ElementSize=2 Type=w + +.declare ubTempY Base=r42.0 ElementSize=1 Type=ub +.declare ubTempU Base=r44.0 ElementSize=1 Type=ub +.declare ubTempV Base=r46.0 ElementSize=1 Type=ub + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + // ITU-R conversion, Now we are using ITU-R conversion + // Y = 0.299R + 0.587G + 0.114B + // U = -0.169R - 0.331G + 0.499B + 128 + // V = 0.499R - 0.418G - 0.0813B+ 128 + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + //It always uses the YUVA layout. +//for BUFFER_0 + mov (4) a0.0<1>:uw r22.0<4;4,1>:uw + mov (4) a0.4<1>:uw r22.0<4;4,1>:uw + // YUV uses the a0.5,a0.6 and a0.4 as the indirect-register + // Y = a0.5, U=a0.6, V=a0.4 + // if channel swap? + // This means that it should be BGRX(B is the LSB) or RGBX + // 1 means that it is BGRX. + and.nz.f0.0 null<1>:w r2.0<0;1,0>:uw 0x01:w + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0:uw + (f0.0) mov (1) a0.0:uw a0.1:uw + (f0.0) mov (1) a0.1:uw uwTemp0<0;1,0> + +//the first line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + + +//the second line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 0 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + +//for Buffer_1 + + add (8) a0.0<1>:uw a0.0<8;8,1>:uw 512:uw +//the first line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + + +//the second line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 1 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + +//for Buffer_2 + add (8) a0.0<1>:uw a0.0<8;8,1>:uw 512:uw +//the first line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + +//the second line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 2 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + +//for Buffer_3 + add (8) a0.0<1>:uw a0.0<8;8,1>:uw 512:uw +//the first line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 0]<1>:uw 0:uw + mov (16) r[a0.6, 0]<1>:uw 0:uw + mov (16) r[a0.4, 0]<1>:uw 0:uw + mov (16) r[a0.5,1]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,1]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,1]<2>:ub ubTempV(0, 0)<32;8,4> + + +//the second line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 32]<1>:uw 0:uw + mov (16) r[a0.6, 32]<1>:uw 0:uw + mov (16) r[a0.4, 32]<1>:uw 0:uw + mov (16) r[a0.5,33]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,33]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,33]<2>:ub ubTempV(0, 0)<32;8,4> + +//the third line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 64]<1>:uw 0:uw + mov (16) r[a0.6, 64]<1>:uw 0:uw + mov (16) r[a0.4, 64]<1>:uw 0:uw + mov (16) r[a0.5,65]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,65]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,65]<2>:ub ubTempV(0, 0)<32;8,4> + +//the fourth line in the block 3 + mov (8) fBUFFER_R(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_R(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_G(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_G(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_B(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_B(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.299f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> 0.587f + mac (16) fBUFFER_Y(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.114f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> -0.169f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.331f + mac (16) fBUFFER_U(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 0.499f + + mov (16) acc0.0<1>:f 128.0f + mac (16) acc0.0<1>:f fBUFFER_R(0, 0)<8;8,1> 0.499f + mac (16) acc0.0<1>:f fBUFFER_G(0, 0)<8;8,1> -0.418f + mac (16) fBUFFER_V(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> -0.0813f + + mov (16) wTempY(0,0)<2> fBUFFER_Y(0, 0)<8;8,1> + mov (16) wTempU(0,0)<2> fBUFFER_U(0, 0)<8;8,1> + mov (16) wTempV(0,0)<2> fBUFFER_V(0, 0)<8;8,1> + + mov (16) r[a0.5, 96]<1>:uw 0:uw + mov (16) r[a0.6, 96]<1>:uw 0:uw + mov (16) r[a0.4, 96]<1>:uw 0:uw + mov (16) r[a0.5,97]<2>:ub ubTempY(0, 0)<32;8,4> + mov (16) r[a0.6,97]<2>:ub ubTempU(0, 0)<32;8,4> + mov (16) r[a0.4,97]<2>:ub ubTempV(0, 0)<32;8,4> + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/rgbx_to_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/rgbx_to_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/rgbx_to_nv12.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/rgbx_to_nv12.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,18 @@ +// Module name: AVS +.kernel RGBX_TO_NV12 +.code + +#include "VP_Setup.g8a" +#include "Set_Layer_0.g8a" +#include "Set_AVS_Buf_0123_BGRA.g8a" +#include "PA_AVS_Buf_0.g8a" +#include "PA_AVS_Buf_1.g8a" +#include "PA_AVS_Buf_2.g8a" +#include "PA_AVS_Buf_3.g8a" +#include "RGB_to_YUV.g8a" +#include "Save_AVS_NV12.g8a" +#include "EOT.g8a" + +.end_code + +.end_kernel diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/rgbx_to_nv12.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/rgbx_to_nv12.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/rgbx_to_nv12.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/rgbx_to_nv12.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,611 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22001240, 0x006902c0, 0x00000000 }, + { 0x00400001, 0x22081240, 0x006902c0, 0x00000000 }, + { 0x02800005, 0x20001260, 0x1e000040, 0x00010001 }, + { 0x00010001, 0x22201048, 0x00000200, 0x00000000 }, + { 0x00010001, 0x22001040, 0x00000202, 0x00000000 }, + { 0x00010001, 0x22021240, 0x00000220, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca012288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc012288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8012288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca212288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc212288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8212288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + 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{ 0x00600001, 0x240022e8, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca612288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc612288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8612288, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22001040, 0x168d0200, 0x02000200 }, + { 0x00600001, 0x238022e8, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca012288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc012288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8012288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca212288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc212288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8212288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa401648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac401648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8401648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca412288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc412288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8412288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8261, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8271, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca612288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc612288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8612288, 0x00cf05c0, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00000201, 0x24a01a28, 0x00000120, 0x00000000 }, + { 0x00000608, 0x24a41a28, 0x1e000122, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x44c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x44d02288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x44c12288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x44d12288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x44e02288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x44f02288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x44e12288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x44f12288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x45002288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x45102288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x45012288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x45112288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x45202288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x45302288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x45212288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x45312288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x0e000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_NV12.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_NV12.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_NV12.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_NV12.g8a 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,555 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 131 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_NV12.asm +// +// Save NV12 420 frame data block of size 16x16 +// +// To save 16x16 block (16x16 bytes of Y and 16x8 bytes of interleaved UV), we need 2 send instructions with of size 16x16 and 16x8 each. +// --------------- +// | 16x16 | +// | YUYV | +// --------------- +// | 16x8 UV | +// --------------- + +//----------------------------------------------------------------- +//The layout of data is as follows: +//mMSGHDR0 : Y data header (16x16) +//mubMSGPAYLOAD0 : Y data payload (8 GRFs) +//mMSGHDR1 : U data header (16x8) +//mubMSGPAYLOAD1 : U data payload (4 GRFs) +//------------------------------------------------------------------ + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + add (4) a0.0<1>:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4<1>:uw r22.0<4;4,1>:w 512:uw + + //Set up header for Y,U and V data + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + + mov (2) r28.0<1>:d r9.0<2;2,1>:w { NoDDClr } //ORI Y (LUMA) = ORI + mov (1) r37.0<1>:d r9.0<0;1,0>:w { NoDDClr } //H ORI (CHROMA) = H ORI + shr (1) r37.1<1>:d r9.1<0;1,0>:w 1:w { NoDDClr, NoDDChk } //V ORI (CHROMA) = V ORI/2 + + mov (1) r28.2<1>:ud 0xF000F:ud { NoDDChk } // Y Block width and height (16x16) + mov (1) r37.2<1>:ud 0x7000F:ud { NoDDChk } // UV Block width and height(16x8) + +// Unscramble, and pack data directly to MRFs + +// Data 16x16 block is divided as - +// --------- +// | 0 | +// --------- +// | 1 | +// --------- +// | 2 | +// --------- +// | 3 | +// --------- +// All sub-blocks are of size 16x4 +// 0: ubBUFFER_0 +// 1: ubBUFFER_1, ubBUFFER_0+16 +// 2: ubBUFFER_2 +// 3: ubBUFFER_3, ubBUFFER_2+16 + + //Y Rounding 16x4 top part + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + + // V Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + + //Y Rounding, 16x4 bottom part + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + + // V Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.4<1>:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + + //Y Rounding 16x4 top part + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + + // V Averaging and Rounding, 8x2 top part + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + //Y Rounding, 16x4 bottom part + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + + // V Averaging and Rounding, 8x2 bottom part + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + // restore pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4 registers + add (4) a0.0<1>:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4<1>:uw r22.0<4;4,1>:w 512:uw + +//Buffer 0 +//Move Y to msg payload + mov (16) mubMSGPAYLOAD0(0,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(0,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(1,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(1,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + +//Move U to msg payload + mov (8) mubMSGPAYLOAD1(0,0)<2> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(0,16)<2> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + +//Move V to msg payload + mov (8) mubMSGPAYLOAD1(0,1)<2> r[a0.0, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0,17)<2> r[a0.0, 65]<32;8,4>:ub { NoDDChk } + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + +//Buffer 1 + mov (16) mubMSGPAYLOAD0(2,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(2,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(3,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(3,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,0)<2> r[a0.6, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(1,16)<2> r[a0.6, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,1)<2> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1,17)<2> r[a0.4, 65]<32;8,4>:ub { NoDDChk } + + add (4) a0.4<1>:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + +//Buffer 2 + mov (16) mubMSGPAYLOAD0(4,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(4,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(5,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(5,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(2,0)<2> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(2,16)<2> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD1(2,1)<2> r[a0.0, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(2,17)<2> r[a0.0, 65]<32;8,4>:ub { NoDDChk } + +//Buffer 3 + mov (16) mubMSGPAYLOAD0(6,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(6,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(7,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(7,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(3,0)<2> r[a0.6, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(3,16)<2> r[a0.6, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD1(3,1)<2> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(3,17)<2> r[a0.4, 65]<32;8,4>:ub { NoDDChk } +//=========================================================================== + +send (1) null<1>:d r28 0xc 0x120A8018:ud +send (1) null<1>:d r37 0xc 0xA0A8019:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_PA.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_PA.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_PA.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_PA.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,629 @@ +/* + * Copyright 2000-2013 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: Zhao Yakui + */ +// 174 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_PA.asm +// +// Save PA 422 frame data block of size 16x16 +// +// To save 16x16 block (32x16 bytes of YUYV) we need 2 send instructions with of size 16x16 each. +// ------------------------------- +// | 16x16 | 16x16 | +// | YUYV | YUYV | +// ------------------------------- +// these 2 sends are replaced by 8 32x2 sends to improve performance + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + + //wBUFF_CHNL_PTR points to buffer 0. + //Add appropriate offsets to get pointers for all buffers (1,2,3). + //Offset is zero for buffer 0. + add (4) a0.0<1>:uw r22.0<4;4,1>:w 0:uw + + //Set DEST pointers according to output packing i.e. YUYV, YVYU, UYVY, VYUY + add (4) a0.4<1>:w r2.28<4;4,1>:ub 928:uw + + /* X block origin. YUY2 or UYUV */ + shl (1) r27.0<1>:d r9.0<0;1,0>:w 1:w { NoDDClr } // H. block origin need to be 2 times + mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) r27.2<1>:ud 0x1001F:ud { NoDDChk } // Block width and height (32x2) + +// Rounding + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 512:uw + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1024:uw + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1536:uw + // left + add.sat (4) r[a0.0, 0]<2>:uw r[a0.0, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,32]<2>:uw r[a0.0, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,64]<2>:uw r[a0.0, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,96]<2>:uw r[a0.0, 96]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 0]<1>:uw r[a0.1, 0]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,32]<1>:uw r[a0.1, 32]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,64]<1>:uw r[a0.1, 64]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,96]<1>:uw r[a0.1, 96]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 0]<2>:uw r[a0.2, 0]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,32]<2>:uw r[a0.2, 32]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,64]<2>:uw r[a0.2, 64]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,96]<2>:uw r[a0.2, 96]<8;4,2>:uw 0x0080:uw + + // right + add.sat (4) r[a0.0,16]<2>:uw r[a0.0, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,48]<2>:uw r[a0.0, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,80]<2>:uw r[a0.0, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.0,112]<2>:uw r[a0.0, 112]<8;4,2>:uw 0x0080:uw + + add.sat (8) r[a0.1, 16]<1>:uw r[a0.1, 16]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,48]<1>:uw r[a0.1, 48]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,80]<1>:uw r[a0.1, 80]<8;8,1>:uw 0x0080:uw + add.sat (8) r[a0.1,112]<1>:uw r[a0.1, 112]<8;8,1>:uw 0x0080:uw + + add.sat (4) r[a0.2, 16]<2>:uw r[a0.2, 16]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,48]<2>:uw r[a0.2, 48]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,80]<2>:uw r[a0.2, 80]<8;4,2>:uw 0x0080:uw + add.sat (4) r[a0.2,112]<2>:uw r[a0.2, 112]<8;4,2>:uw 0x0080:uw + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 2048:uw + // restore pointer + add (4) a0.0<1>:uw r22.0<4;4,1>:w 0:uw + + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + add (1) r37.1<1>:d r27.1<0;1,0>:d 2:d // Point to 2nd part + + /* a0.2 U, a0.1 Y, a0.0 V */ + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + /* a0.4 + 288 = r38 */ + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0xc 0x60A8018:ud + send (1) null<1>:d r37 0xc 0x60A8018:ud + + // restore pointer + add (4) a0.0<1>:uw r22.0<4;4,1>:w 512:uw + + add (1) r28.1<1>:d r27.1<0;1,0>:d 4:d // Point to 2nd part + add (1) r37.1<1>:d r27.1<0;1,0>:d 6:d // Point to 2nd part + + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0xc 0x60A8018:ud + send (1) null<1>:d r37 0xc 0x60A8018:ud + + // restore pointer + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1024:uw + + add (1) r28.1<1>:d r27.1<0;1,0>:d 8:d // Point to 2nd part + add (1) r37.1<1>:d r27.1<0;1,0>:d 10:d // Point to 2nd part + + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0xc 0x60A8018:ud + send (1) null<1>:d r37 0xc 0x60A8018:ud + + // restore pointer + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1536:uw + + add (1) r28.1<1>:d r27.1<0;1,0>:d 12:d // Point to 2nd part + add (1) r37.1<1>:d r27.1<0;1,0>:d 14:d // Point to 2nd part + + mov (8) r[a0.6, 0]<4>:ub r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 32]<4>:ub r[a0.0,33]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4, 0]<2>:ub r[a0.1, 1]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4, 32]<2>:ub r[a0.1,33]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5, 0]<4>:ub r[a0.2, 1]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5, 32]<4>:ub r[a0.2,33]<32;8,4>:ub { NoDDChk } + + mov (8) r[a0.6, 288]<4>:ub r[a0.0,65]<32;8,4>:ub { NoDDClr } + mov (8) r[a0.6, 320]<4>:ub r[a0.0,97]<32;8,4>:ub { NoDDClr } + mov (16) r[a0.4,288]<2>:ub r[a0.1,65]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (16) r[a0.4,320]<2>:ub r[a0.1,97]<32;16,2>:ub { NoDDClr, NoDDChk } + mov (8) r[a0.5,288]<4>:ub r[a0.2,65]<32;8,4>:ub { NoDDChk } + mov (8) r[a0.5,320]<4>:ub r[a0.2,97]<32;8,4>:ub { NoDDChk } + + send (1) null<1>:d r28 0xc 0x60A8018:ud + send (1) null<1>:d r37 0xc 0x60A8018:ud + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_PL3.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_PL3.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_PL3.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_PL3.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,565 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * Author: Zhao Yakui + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 84 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_PL3.asm +// +// Save PL3 420 frame data block of size 16x16 +// +// To save 16x16 block (16x16 byte of Y and 8x8 byte of U and V each) we need 3 send instructions with one of size 16x16 and two of size 8x8. +// ----------------- +// | 16x16 Y | +// | | +// ----------------- +// | 8x8 U | +// --------- +// | 8x8 V | +// --------- + +//----------------------------------------------------------------- +//The layout of data is as follows: +//mMSGHDR0 : Y data header (16x16) +//mubMSGPAYLOAD0 : Y data payload (8 GRFs) +//mMSGHDR1 : U data header (8x8) +//mubMSGPAYLOAD1 : U data payload (2 GRFs) +//mMSGHDR2 : V data header (8x8) +//mubMSGPAYLOAD2 : V data payload (2 GRFs) +//------------------------------------------------------------------ + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + add (4) a0.0<1>:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4<1>:uw r22.0<4;4,1>:w 512:uw + + //Set up header for Y,U and V data + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + mov (8) r46<1>:ud r27<8;8,1>:ud + + mov (2) r28.0<1>:d r9.0<2;2,1>:w { NoDDClr } //ORI Y (LUMA) = ORI + shr (2) r37.0<1>:d r9.0<2;2,1>:w 1:w { NoDDClr } //H/V ORI U = H/V ORI/2 + shr (2) r46.0<1>:d r9.0<2;2,1>:w 1:w { NoDDClr } //H/V ORI V = H/V ORI/2 + + mov (1) r28.2<1>:ud 0xF000F:ud { NoDDChk } // Y Block width and height (16x16) + mov (1) r37.2<1>:ud 0x70007:ud { NoDDChk } // U Block width and height (8x8) + mov (1) r46.2<1>:ud 0x70007:ud { NoDDChk } // V Block width and height (8x8) + +// Unscramble, and pack data directly to MRFs + +// Data 16x16 block is divided as - +// --------- +// | 0 | +// --------- +// | 1 | +// --------- +// | 2 | +// --------- +// | 3 | +// --------- +// All sub-blocks are of size 16x4 +// 0: ubBUFFER_0 +// 1: ubBUFFER_1, ubBUFFER_0+16 +// 2: ubBUFFER_2 +// 3: ubBUFFER_3, ubBUFFER_2+16 + + //Y Rounding, first + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + + //Y Rounding, second + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + add (4) a0.4<1>:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + + //Y Rounding, third + add.sat (16) r[a0.1,0]<1>:uw r[a0.1,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,32]<1>:uw r[a0.1,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,64]<1>:uw r[a0.1,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.1,96]<1>:uw r[a0.1,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.2,0]<2>:uw r[a0.2,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.2,64]<2>:uw r[a0.2,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.0,0]<2>:uw r[a0.0,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.0,64]<2>:uw r[a0.0,64]<16;8,2>:uw 0x0080:uw + + + //Y Rounding, fourth + add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,64]<1>:uw r[a0.5,64]<16;16,1>:uw 0x0080:uw + add.sat (16) r[a0.5,96]<1>:uw r[a0.5,96]<16;16,1>:uw 0x0080:uw + + // U rounding + add.sat (8) r[a0.6,0]<2>:uw r[a0.6,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.6,64]<2>:uw r[a0.6,64]<16;8,2>:uw 0x0080:uw + + // V rounding + add.sat (8) r[a0.4,0]<2>:uw r[a0.4,0]<16;8,2>:uw 0x0080:uw + add.sat (8) r[a0.4,64]<2>:uw r[a0.4,64]<16;8,2>:uw 0x0080:uw + + // restore the TOP and BOT pointers + add (4) a0.0<1>:uw r22.0<4;4,1>:w 0:uw + add (4) a0.4<1>:uw r22.0<4;4,1>:w 512:uw + +//Buffer 0 +//Move Y to msg payload + mov (16) mubMSGPAYLOAD0(0,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(0,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(1,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(1,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + +//Move U to msg payload + mov (8) mubMSGPAYLOAD1(0,0)<1> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(0,8)<1> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + +//Move V to msg payload + mov (8) mubMSGPAYLOAD2(0,0)<1> r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD2(0,8)<1> r[a0.0, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + add (4) a0.0<1>:uw r22.0<4;4,1>:w 1024:uw //Update Buffer 2 pointers + +//Buffer 1 + mov (16) mubMSGPAYLOAD0(2,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(2,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(3,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(3,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(0,16)<1> r[a0.6, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(0,24)<1> r[a0.6, 65]<32;8,4>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(0,16)<1> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(0,24)<1> r[a0.4, 65]<32;8,4>:ub { NoDDChk } + + add (4) a0.4<1>:uw r22.0<4;4,1>:w 1536:uw //Update Buffer 3 pointers + +//Buffer 2 + mov (16) mubMSGPAYLOAD0(4,0)<1> r[a0.1, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(4,16)<1> r[a0.1, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(5,0)<1> r[a0.1, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(5,16)<1> r[a0.1, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,0)<1> r[a0.2, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD1(1,8)<1> r[a0.2, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + + mov (8) mubMSGPAYLOAD2(1,0)<1> r[a0.0, 1]<32;8,4>:ub { NoDDClr } + mov (8) mubMSGPAYLOAD2(1,8)<1> r[a0.0, 65]<32;8,4>:ub { NoDDClr, NoDDChk } + +//Buffer 3 + mov (16) mubMSGPAYLOAD0(6,0)<1> r[a0.5, 1]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(6,16)<1> r[a0.5, 33]<32;16,2>:ub { NoDDChk } + mov (16) mubMSGPAYLOAD0(7,0)<1> r[a0.5, 65]<32;16,2>:ub { NoDDClr } + mov (16) mubMSGPAYLOAD0(7,16)<1> r[a0.5, 97]<32;16,2>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD1(1,16)<1> r[a0.6, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD1(1,24)<1> r[a0.6, 65]<32;8,4>:ub { NoDDChk } + + mov (8) mubMSGPAYLOAD2(1,16)<1> r[a0.4, 1]<32;8,4>:ub { NoDDClr, NoDDChk } + mov (8) mubMSGPAYLOAD2(1,24)<1> r[a0.4, 65]<32;8,4>:ub { NoDDChk } + +//=========================================================================== + +send (1) null<1>:d r28 0xc 0x120A8018:ud +send (1) null<1>:d r37 0xc 0x60A8019:ud +send (1) null<1>:d r46 0xc 0x60A801A:ud diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_RGBX.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_RGBX.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Save_AVS_RGBX.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Save_AVS_RGBX.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,641 @@ +/* + * Copyright 2000-2013 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: + * Zhao Yakui + */ + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: Save_AVS_RGBX.asm +// +// Save packed ARGB 444 frame data block of size 16x16 +// +// To save 16x16 block (64x16 byte layout for ARGB8888) we need 8 send instructions with 32x4 in each +// -------- +// | 0 | 1 | +// | 2 | 3 | +// | 4 | 5 | +// | 6 | 7 | +// --------- +// the 8 32x4 block send is used + + + +// Module name: Save.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + + +.declare mudMSGPAYLOAD0 Base=r29.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD1 Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD2 Base=r47.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mudMSGPAYLOAD3 Base=r56.0 ElementSize=4 SrcRegion=<8;8,1> Type=ud + +.declare muwMSGPAYLOAD0 Base=r29.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD1 Base=r38.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD2 Base=r47.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare muwMSGPAYLOAD3 Base=r56.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw + +.declare mubMSGPAYLOAD0 Base=r29.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD1 Base=r38.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD2 Base=r47.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD3 Base=r56.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD4 Base=r32.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD5 Base=r41.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD6 Base=r50.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare mubMSGPAYLOAD7 Base=r59.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub + + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare uwTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + + +// At the save module we have all 8 address sub-registers available. +// So we will use PING-PONG type of scheme to save the data using +// pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help +// reduce dependency. - rT + + //Internal LAYOUT:(RRGGBBAA) + //Assign buffer channel order for Buffer 0123 in the order RGBA a0.3>A, a0.2>B, a0.1>G, a0.0>R + // R = 0, G= 4, B = 8, A = 12. + mov (4) acc0.0<1>:w 0x62EA:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw + + // if channel swap? + // This means that it should be BGRA(B is the LSB) or RGBA + // the internal format is always RGBA(MSB-A-B-G-R). + and.nz.f0.0 null<1>:w r2.3<0;1,0>:uw 0x01:w + +//wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. +//Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). +//Offsets are zero for buffer 0 and buffer 4. + add (4) a0.0<1>:uw r22.0<4;4,1>:w 0:uw + + // pointer swap + (f0.0) mov (1) uwTemp0<1> a0.0<0;1,0>:uw + (f0.0) mov (1) a0.0<1>:uw a0.2<0;1,0>:uw + (f0.0) mov (1) a0.2<1>:uw uwTemp0<0;1,0> + + shl (1) r27.0<1>:d r9.0<0;1,0>:w 2:w { NoDDClr } // H. block origin need to be quadrupled + mov (1) r27.1<1>:d r9.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin (1st quadrant) + mov (1) r27.2<1>:ud 0x3001F:ud { NoDDChk } // Block width and height (32x4) + + mov (4) a0.4<1>:uw a0.0<4;4,1>:uw + + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + mov (8) r46<1>:ud r27<8;8,1>:ud + mov (8) r55<1>:ud r27<8;8,1>:ud + + mov (8) r31<1>:ud r27<8;8,1>:ud + mov (8) r40<1>:ud r27<8;8,1>:ud + mov (8) r49<1>:ud r27<8;8,1>:ud + mov (8) r58<1>:ud r27<8;8,1>:ud + +//Buffer 0/1 are written by using 4 32x4. + + add (1) r37.0<1>:d r27.0<0;1,0>:d 32:d + + add (1) r46.1<1>:d r27.1<0;1,0>:d 4:d + + add (1) r55.1<1>:d r27.1<0;1,0>:d 4:d + add (1) r55.0<1>:d r27.0<0;1,0>:d 32:d + + // write Buf_0 to 1st quarter of four horizontal output blocks + +// Please note the scattered order of NODDCLR, NODDCHK flags. Since the sub-registers +// of destination reg are not updated at one place and hence even flags are scattered. -rT + +/* for block 0 the left part of buffer 0 and 1 */ + mov (8) mubMSGPAYLOAD0(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 3)<4> r2.31:ub + +/* For Buffer 0 */ + send (16) null<1>:d r28 0xc 0x0A0A8018:ud + send (16) null<1>:d r37 0xc 0x0A0A8018:ud + + add (4) a0.0<1>:uw a0.4<4;4,1>:uw 512:uw + mov (8) mubMSGPAYLOAD2(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 3)<4> r2.31:ub + // send Buffer 1 + send (16) null<1>:d r46 0xc 0x0A0A8018:ud + send (16) null<1>:d r55 0xc 0x0A0A8018:ud + + +/* for Buffer 2/3 */ + mov (8) r28<1>:ud r27<8;8,1>:ud + mov (8) r37<1>:ud r27<8;8,1>:ud + mov (8) r46<1>:ud r27<8;8,1>:ud + mov (8) r55<1>:ud r27<8;8,1>:ud + + add (1) r28.1<1>:d r27.1<0;1,0>:d 8:d + + add (1) r37.0<1>:d r27.0<0;1,0>:d 32:d + add (1) r37.1<1>:d r27.1<0;1,0>:d 8:d + + add (1) r46.1<1>:d r27.1<0;1,0>:d 12:d + + add (1) r55.1<1>:d r27.1<0;1,0>:d 12:d + add (1) r55.0<1>:d r27.0<0;1,0>:d 32:d + + add (4) a0.0<1>:uw a0.4<4;4,1>:uw 1024:uw + + mov (8) mubMSGPAYLOAD0(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD0(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD0(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD1(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD1(3, 3)<4> r2.31:ub + +// Send Buffer 2 + send (16) null<1>:d r28 0xc 0x0A0A8018:ud + send (16) null<1>:d r37 0xc 0x0A0A8018:ud + + add (4) a0.0<1>:uw a0.4<4;4,1>:uw 1536:uw + mov (8) mubMSGPAYLOAD2(0, 0)<4> r[a0.0, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 1)<4> r[a0.1, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 2)<4> r[a0.2, 1]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(1, 0)<4> r[a0.0, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 1)<4> r[a0.1, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 2)<4> r[a0.2, 33]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(0, 0)<4> r[a0.0, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 1)<4> r[a0.1, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 2)<4> r[a0.2, 17]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(0, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(1, 0)<4> r[a0.0, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 1)<4> r[a0.1, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 2)<4> r[a0.2, 49]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(1, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(2, 0)<4> r[a0.0, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 1)<4> r[a0.1, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 2)<4> r[a0.2, 65]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD2(3, 0)<4> r[a0.0, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 1)<4> r[a0.1, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 2)<4> r[a0.2, 97]<16;8,2>:ub + mov (8) mubMSGPAYLOAD2(3, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(2, 0)<4> r[a0.0, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 1)<4> r[a0.1, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 2)<4> r[a0.2, 81]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(2, 3)<4> r2.31:ub + + mov (8) mubMSGPAYLOAD3(3, 0)<4> r[a0.0, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 1)<4> r[a0.1, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 2)<4> r[a0.2, 113]<16;8,2>:ub + mov (8) mubMSGPAYLOAD3(3, 3)<4> r2.31:ub + // send buffer 3 + send (16) null<1>:d r46 0xc 0x0A0A8018:ud + send (16) null<1>:d r55 0xc 0x0A0A8018:ud + + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_BGRA.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_BGRA.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_BGRA.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_BGRA.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,368 @@ +/* + * Copyright 2000-2013 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Authors: Zhao Yakui + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_BGRA.asm + + + +//Module Name: Set_Buf_0123_BGRA + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT:(UUYYVVAA) + //AVS RGBX LAYOUT (RRGGBBAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + // V = 8, Y= 0, U = 4, A = 12. + // And a0.x is used as indirect-register for RGBX. R=a0.1, G=a0.2, B=a0.0 + // B = 8, R= 0, G = 4, A = 12 + mov (4) acc0.0<1>:w 0x6EA2:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + + //SU LAYOUT:(VYUAVYUA) + //V = 4, Y = 2, U = 0, A = 6 + //B = 4, G = 2, R = 0, A = 6 + mov (4) acc0.0<1>:w 0x6204:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL2.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL2.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL2.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL2.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,361 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_PL2.asm + + + +//Module Name: Set_Buf_0123_PL2 + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT: (YYUUVVAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + //For PL2-AVS: V = 8, Y= 0, U = 4, A = 12. + mov (4) acc0.0<1>:w 0x6EA2:v //Subtract 6 from 0,4,8,12 + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw //add 6 back + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw //Convert to BYTE address. + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + //SU LAYOUT:(YUVAYUVA) + //V = 4, Y = 0, U = 2, A = 6 + mov (4) acc0.0<1>:w 0x6204:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL3.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL3.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL3.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_PL3.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,362 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_PL3.asm + + + +//Module Name: Set_Buf_0123_PL3 + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT: (YYUUVVAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + //For PL3-AVS: V = 8, Y= 0, U = 4, A = 12. + mov (4) acc0.0<1>:w 0x6EA2:v + //Subtract 6 from 0,4,8,12 + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw //add 6 back + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw //Convert to BYTE address. + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + //SU LAYOUT:(YUVAYUVA) + //V = 4, Y = 0, U = 2, A = 6 + mov (4) acc0.0<1>:w 0x6204:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_VYUA.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_VYUA.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_VYUA.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_AVS_Buf_0123_VYUA.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,366 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 7 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +//Module Name: Set_AVS_Buf_0123_VYUA.asm + + + +//Module Name: Set_Buf_0123_VYUA + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + + //AVS LAYOUT:(VVYYUUAA) + //Assign buffer channel order for Buffer 0123 in the order AUYV a0.3>A, a0.2>U, a0.1>Y, a0.0>V + // V = 0, Y= 4, U = 8, A = 12. + //YCrCb or YCrCb_Swap returns the following data: + //Cr is returned on R-channel. 0 + //Y is returned on G channel. 4 + //Cb is returned on B channel. 8 + mov (4) acc0.0<1>:w 0x62EA:v //Subtract 6 from 0,4,8,12 + add (4) acc0.0<1>:w acc0<4;4,1>:w 70:uw //add 6 back + shl (4) r22.0<1>:w acc0<4;4,1>:w 5:uw //Convert to BYTE address. + + //OPT: wAVS_SU_SHUFFLE_PTR_0 and udAVS_SU_SHUFFLE_OFF_0 are sub-regs of same GRF. -rT + + //SU LAYOUT:(VYUAVYUA) + //V = 0, Y = 2, U = 4, A = 6 + mov (4) acc0.0<1>:w 0x6420:v + add (4) acc0.0<1>:w acc0<4;4,1>:w 64:uw + shl (4) r18.0<1>:w acc0<4;4,1>:w 5:uw { NoDDClr } //Convert to BYTE address. + + //OFFSET: + mov (1) r18.4<1>:ud 0x1000100:ud { NoDDChk } + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_Layer_0.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_Layer_0.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/Set_Layer_0.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/Set_Layer_0.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,483 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +// 18 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + +#define MSG_AVS_SAMPLE 0x00000000 +#define MSG_CONVOLE_SAMPLE 0x10000000 +#define MSG_MINMAX_SAMPLE 0x20000000 +#define MSG_MINMAXF_SAMPLE 0x30000000 +#define MSG_ERODE_SAMPLE 0x40000000 +#define MSG_DILATE_SAMPLE 0x50000000 +#define MSG_BOOLCENT_SAMPLE 0x60000000 +#define MSG_CENTROID_SAMPLE 0x70000000 + +#define MSG_IEF_BYPASS 0x08000000 +#define MSG_IEF_ENABLE 0x00000000 + +//16x4 or 8x4 or 16x8 or 4x4 +#define MSG_AVS_164 0x00000000 +#define MSG_AVS_84 0x02000000 +#define MSG_AVS_168 0x04000000 +#define MSG_AVS_44 0x06000000 + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + + + + + +//Module name: Set_Layer_N.inc + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Used to generate LABELS at compile time. + + +//definitions for Expand Mask +.declare uwMask_Temp1 Base=r17.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF +.declare ubMask_Temp1 Base=r17.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF +.declare udMask_Temp1 Base=r17.0 ElementSize=4 Type=ud // 1 GRF +.declare uwMask_Temp2 Base=r16.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF +.declare ubMask_Temp2 Base=r16.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF +.declare udMask_Temp2 Base=r16.0 ElementSize=4 Type=ud // 1 GRF + +.declare uwMask_Temp3 Base=r15.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF +.declare ubMask_Temp3 Base=r15.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF + +.declare udALPHA_MASK_REG Base=r21.0 ElementSize=4 Type=ud // 1 GRF +.declare udALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=4 Type=ud // 1 GRF + + +//Initialize mask reg to FFFF + + mov (16) uwALPHA_MASK_REG(0)<1> 0xFFFF:uw + + +//Fast jump for - +//LAYER0: we determine whether layer 0 is to be loaded and processed or not based +// on block mask in module "Set_Layer_0" and store result in f0.1. +// This flag is then directly used to while loading buf0-3 and colorfill. +// (So flag f0.1 should not be changed from Set_Layer_0 till Colorfill) +// +//LAYER1-7: For all other layers, we compute whether layer is to be loaded and processed +// based on block mask in module "Set_Layer_1-7" and store result in SKIP_LAYER +// variable. +// While Loading buf 4 and 5, we move SKIP_LAYER to f0.0 every time and use it +// for Loading. +// For processing though, we move SKIP_LAYER only once to f0.1 in module +// "Set_Buf0_Buf4" and use f0.1 for deciding whether layer 1-7 (all 4 sub blocks) +// is to be processed or not. +// (So flag f0.1) should not be modififed from module "Set_Buf0_Buf4" till module +// that processess sub-block 3). +// +//None of the above fast jumps, apply to CSC modules. We always perform CSC irrespective of mask. +// +//Example: (Without going into finer details) +// Typical Combined kernel: +// +// (let var = decision whether to load/process that layer) +// +// Set_Layer_0 //f0.1 <- var +// .. +// Set_Layer_1 //f0.1 <- var, SKIP_LAYER <- var +// .. +// Load buf 0 //use f0.1 +// Load buf 4 //f0.0 <- SKIP_LAYER +// Load buf 1 //use f0.1 +// Load buf 5 //f0.0 <- SKIP_LAYER +// Load buf 2 //use f0.1 +// Load buf 3 //use f0.1 +// .. +// .. +// Colorfill +// .. +// Set_Buf0_Buf4 //f0.1 <- SKIP_LAYER +// process0-4 //Use f0.1 +// Load buf 4 +// Set_Buf1_Buf5 +// process1-5 +// Load buf 5 +// .. +// Set_Layer_2 //f0.1 <-var, SKIP_LAYER <- var +// .. +// Set_Buf2_Buf4 +// process2-4 +// Load buf 4 +// Set_Buf3_Buf5 +// process3-5 +// Load buf 5 +// .. + + + and (1) r24.2<1>:ub r2.2<0;1,0>:uw 3:uw + + + //Copy all AVS Payload data + // Setup Message Payload Header for 1st block of Media Sampler 8x8 (16x4 for IVB+) + //currently the dx & dy is passed by Constant buffer (zero) + mov (1) r25.0<1>:f r9.6<0;1,0>:f //NLAS dy + mov (1) r25.6<1>:f r9.5<0;1,0>:f //NLAS dx + mov (1) r25.4<1>:f r3.0<0;1,0>:f //Step X + mov (1) r25.5<1>:f r4.0<0;1,0>:f //Step Y + + + mov (1) r25.2<1>:f r6.0<0;1,0>:f //Orig X + mov (1) r25.3<1>:f r5.0<0;1,0>:f //Orig Y + + mov (1) r25.7<1>:ud 0:ud + add (1) r25.7<1>:ud r25.7<0;1,0>:ud MSG_AVS_SAMPLE + MSG_AVS_164 + MSG_IEF_BYPASS:ud + + //NLAS calculations for 2nd half of blocks of Media Sampler 8x8: + // X(i) = X0 + dx*i + ddx*i*(i-1)/2 ==> X(8) = X0 + dx*8 +ddx*28 + // dx(i)= dx(0) + ddx*i ==> dx(8)= dx + ddx*8 + + //OPTIMIZATION: fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY - are sub registers of same GRF. Use NODDCLR NODDCHK. -rT + + // Calculating X(8) + mov (1) acc0.2<1>:f r6.0<0;1,0>:f + mac (1) acc0.2<1>:f r3.0<0;1,0>:f 8.0:f + mac (1) r23.2<1>:f r9.5<0;1,0>:f 28.0:f { NoDDClr } + + // Calculating Y(4) + mul (1) r23.1<1>:f r4.0<0;1,0>:f 4.0:f { NoDDClr, NoDDChk } //dY*4 + + // Calculating dx(8) + mov (1) acc0.4<1>:f r3.0<0;1,0>:f + mac (1) r23.4<1>:f r9.5<0;1,0>:f 8.0:f { NoDDClr, NoDDChk } + + // Binding Index + mov (1) r23.5<1>:ud 0:ud { NoDDChk } + + +SKIP_LAYER_L0: + nop + + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/sharpening_h_blur.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/sharpening_h_blur.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/sharpening_h_blur.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/sharpening_h_blur.g8b 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,1718 @@ +{ 0x00000001, 0x23401608, 0x00000000, 0x00000000 }, +{ 0x00600001, 0x20403ae8, 0x008d0000, 0x00000000 }, +{ 0x00000001, 0x23441608, 0x00000000, 0x00020002 }, +{ 0x00000001, 0x20480608, 0x00000000, 0x000f0007 }, +{ 0x00000001, 0x20401608, 0x00000000, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000340, 0x02490000 }, +{ 0x00000001, 0x20443ae8, 0x00000028, 0x00000000 }, +{ 0x00000001, 0x202c1608, 0x00000000, 0x00040004 }, +{ 0x0c600031, 0x20403a08, 0x00000040, 0x00000200 }, +{ 0x00000040, 0x20240208, 0x1e000020, 0xfffcfffc }, +{ 0x06000010, 0x20000201, 0x16000024, 0x00040004 }, +{ 0x00200001, 0x23283ae8, 0x004500b0, 0x00000000 }, +{ 0x00200001, 0x23083ae8, 0x004500a0, 0x00000000 }, +{ 0x00200001, 0x22e83ae8, 0x00450090, 0x00000000 }, +{ 0x00200001, 0x22c83ae8, 0x00450080, 0x00000000 }, +{ 0x00200001, 0x22a83ae8, 0x00450070, 0x00000000 }, +{ 0x00200001, 0x22883ae8, 0x00450060, 0x00000000 }, +{ 0x00200001, 0x22683ae8, 0x00450050, 0x00000000 }, +{ 0x00200001, 0x22483ae8, 0x00450040, 0x00000000 }, +{ 0x00200001, 0x23383ae8, 0x004500b8, 0x00000000 }, +{ 0x00200001, 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0x008d0158 }, +{ 0x00600041, 0x20400a28, 0x22000024, 0x008d0150 }, +{ 0x00800040, 0x20400a28, 0x0a8d0080, 0x008d0040 }, +{ 0x0080000c, 0x40400a68, 0x1e8d0040, 0x00070007 }, +{ 0x03601010, 0x20002261, 0x22ae0171, 0x00ae0151 }, +{ 0x00800001, 0x20401a68, 0x00ae0040, 0x00000000 }, +{ 0x00610001, 0x41501a89, 0x00ae0040, 0x00000000 }, +{ 0x00611001, 0x41511a89, 0x00ae0042, 0x00000000 }, +{ 0x0080002d, 0x20000220, 0x00450180, 0x00000000 }, +{ 0x00000001, 0x20801e28, 0x00000000, 0x00ff00ff }, +{ 0x00800041, 0x20402228, 0x22b10170, 0x00b10150 }, +{ 0x00000040, 0x20241a28, 0x1e004110, 0x00800080 }, +{ 0x0c600038, 0x20c00a28, 0x0a8d0060, 0x00000080 }, +{ 0x0c600038, 0x20a00a28, 0x0a8d0040, 0x00000080 }, +{ 0x00800001, 0x40400a68, 0x008d00a0, 0x00000000 }, +{ 0x00800001, 0x20401a68, 0x00ae0040, 0x00000000 }, +{ 0x00600041, 0x20800a28, 0x22000024, 0x008d0158 }, +{ 0x00800041, 0x20a01a28, 0x1a8d0040, 0x00000110 }, +{ 0x00600041, 0x20600a28, 0x22000024, 0x008d0150 }, +{ 0x00800040, 0x20400a28, 0x0a8d00a0, 0x008d0060 }, +{ 0x0080000c, 0x60400a88, 0x1e8d0040, 0x00070007 }, +{ 0x00800001, 0x21502288, 0x00cf0040, 0x00000000 }, +{ 0x0080002d, 0x20000220, 0x00450140, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/sharpening_v_blur.g8b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/sharpening_v_blur.g8b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/sharpening_v_blur.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/sharpening_v_blur.g8b 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,296 @@ +{ 0x00000001, 0x23601608, 0x00000000, 0x00000000 }, +{ 0x00600001, 0x20403ae8, 0x008d0000, 0x00000000 }, +{ 0x00000001, 0x23641608, 0x00000000, 0x00020002 }, +{ 0x00000001, 0x20480608, 0x00000000, 0x0007000f }, +{ 0x00000001, 0x20403ae8, 0x0000002c, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000360, 0x02490000 }, +{ 0x00000001, 0x20441608, 0x00000000, 0x00000000 }, +{ 0x00000001, 0x20281608, 0x00000000, 0x00040004 }, +{ 0x0c600031, 0x22e03a08, 0x00000040, 0x00000200 }, +{ 0x00000040, 0x20200208, 0x1e000024, 0xfffcfffc }, +{ 0x06000010, 0x20000201, 0x16000020, 0x00040004 }, +{ 0x00010020, 0x34000005, 0x0e001400, 0x00000ff0 }, +{ 0x00600001, 0x20403ae8, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000360, 0x02490000 }, +{ 0x00800001, 0x22a03ae8, 0x008d0320, 0x00000000 }, +{ 0x00800001, 0x22603ae8, 0x008d02e0, 0x00000000 }, +{ 0x00000001, 0x21403ee8, 0x00000000, 0x3e525448 }, +{ 0x00000001, 0x21603ee8, 0x00000000, 0x3875735f }, +{ 0x00000001, 0x20480608, 0x00000000, 0x0007000f }, +{ 0x00000001, 0x20403ae8, 0x0000002c, 0x00000000 }, +{ 0x00000040, 0x20440208, 0x16000028, 0x00040004 }, +{ 0x00800001, 0x208022e8, 0x00b10270, 0x00000000 }, +{ 0x0c600031, 0x22e03a08, 0x00000040, 0x00000200 }, +{ 0x00000001, 0x20203ee8, 0x00000000, 0x332bcc77 }, +{ 0x00800041, 0x20c03ae8, 0x3e8d0080, 0x3875735f }, +{ 0x00800001, 0x208022e8, 0x00b10280, 0x00000000 }, +{ 0x00800001, 0x204022e8, 0x00b10260, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392071c8, 0x00c72002 }, +{ 0x0060015b, 0x081e0000, 0x392061c8, 0x00872002 }, +{ 0x00000001, 0x20303ee8, 0x00000000, 0x3c1d98ad }, +{ 0x00800001, 0x204022e8, 0x00b10270, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00800001, 0x208022e8, 0x00b10290, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00000001, 0x21503ee8, 0x00000000, 0x3f11e168 }, +{ 0x00800001, 0x208022e8, 0x00b102a0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472015 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072015 }, +{ 0x00800001, 0x208022e8, 0x00b102b0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00800001, 0x208022e8, 0x00b102c0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00800001, 0x208022e8, 0x00b102d0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472016 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072016 }, +{ 0x00800001, 0x208022e8, 0x00b102e0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472002 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072002 }, +{ 0x00800001, 0x208022e8, 0x00b10280, 0x00000000 }, +{ 0x00800001, 0x21803a28, 0x008d0100, 0x00000000 }, +{ 0x00800041, 0x20c03ae8, 0x3e8d0080, 0x3875735f }, +{ 0x00800001, 0x61800a88, 0x008d0180, 0x00000000 }, +{ 0x00800001, 0x21a02288, 0x00cf0180, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392061c8, 0x00872002 }, +{ 0x0060015b, 0x091e0000, 0x392071c8, 0x00c72002 }, +{ 0x00800001, 0x208022e8, 0x00b10290, 0x00000000 }, +{ 0x00800001, 0x204022e8, 0x00b10280, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00800001, 0x208022e8, 0x00b102a0, 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0x081e0000, 0x392081c8, 0x01072002 }, +{ 0x00800001, 0x21e02288, 0x00cf0220, 0x00000000 }, +{ 0x00800001, 0x208022e8, 0x00b102d0, 0x00000000 }, +{ 0x00800001, 0x22203a28, 0x008d0100, 0x00000000 }, +{ 0x00800041, 0x20c03ae8, 0x3e8d0080, 0x3875735f }, +{ 0x00800001, 0x62200a88, 0x008d0220, 0x00000000 }, +{ 0x00800001, 0x208022e8, 0x00b102e0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392071c8, 0x00c72002 }, +{ 0x0060015b, 0x081e0000, 0x392061c8, 0x00872002 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00800001, 0x208022e8, 0x00b102f0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00800001, 0x208022e8, 0x00b10300, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472015 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072015 }, +{ 0x00800001, 0x21f02288, 0x00cf0220, 0x00000000 }, +{ 0x00800001, 0x208022e8, 0x00b10310, 0x00000000 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x00800001, 0x204022e8, 0x00b102d0, 0x00000000 }, +{ 0x00600001, 0x21803ae8, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000364, 0x0a0a8000 }, +{ 0x00800001, 0x208022e8, 0x00b10320, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00800001, 0x208022e8, 0x00b10330, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472016 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072016 }, +{ 0x00800001, 0x208022e8, 0x00b10340, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472002 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072002 }, +{ 0x00800001, 0x208022e8, 0x00b102e0, 0x00000000 }, +{ 0x00800001, 0x22203a28, 0x008d0100, 0x00000000 }, +{ 0x00800041, 0x20c03ae8, 0x3e8d0080, 0x3875735f }, +{ 0x00800001, 0x62200a88, 0x008d0220, 0x00000000 }, +{ 0x00800001, 0x208022e8, 0x00b102f0, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392071c8, 0x00c72002 }, +{ 0x0060015b, 0x081e0000, 0x392061c8, 0x00872002 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00800001, 0x208022e8, 0x00b10300, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00800001, 0x208022e8, 0x00b10310, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472015 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072015 }, +{ 0x00800001, 0x208022e8, 0x00b10320, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472014 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072014 }, +{ 0x00800001, 0x208022e8, 0x00b10330, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472003 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072003 }, +{ 0x00800001, 0x208022e8, 0x00b10340, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472016 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072016 }, +{ 0x00800001, 0x208022e8, 0x00b10350, 0x00000000 }, +{ 0x0060015b, 0x091e0000, 0x392091c8, 0x01472002 }, +{ 0x0060015b, 0x081e0000, 0x392081c8, 0x01072002 }, +{ 0x00000001, 0x21880608, 0x00000000, 0x0007000f }, +{ 0x00800001, 0x20403a28, 0x008d0100, 0x00000000 }, +{ 0x00000001, 0x21803ae8, 0x0000002c, 0x00000000 }, +{ 0x00800001, 0x22002288, 0x00cf0220, 0x00000000 }, +{ 0x00800001, 0x60400a88, 0x008d0040, 0x00000000 }, +{ 0x00800001, 0x22102288, 0x00cf0040, 0x00000000 }, +{ 0x00000001, 0x21843ae8, 0x00000028, 0x00000000 }, +{ 0x00000040, 0x20280208, 0x16000028, 0x00080008 }, +{ 0x0c600031, 0x20003a00, 0x00000180, 0x00000200 }, +{ 0x00000040, 0x20200208, 0x1e000024, 0xfffcfffc }, +{ 0x05000010, 0x20000200, 0x02000028, 0x00000020 }, +{ 0x00010020, 0x34000004, 0x0e001400, 0xfffff010 }, +{ 0x00600001, 0x20403ae8, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000360, 0x02290000 }, +{ 0x00000001, 0x20480608, 0x00000000, 0x0003000f }, +{ 0x00000001, 0x20403ae8, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x20441608, 0x00000000, 0x00000000 }, +{ 0x0c600031, 0x22603a08, 0x00000040, 0x00000200 }, +{ 0x00600001, 0x20403ae8, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000364, 0x060a8000 }, +{ 0x00800001, 0x20603ae8, 0x008d0260, 0x00000000 }, +{ 0x00000001, 0x20480608, 0x00000000, 0x0003000f }, +{ 0x00000001, 0x20403ae8, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x20441608, 0x00000000, 0x00000000 }, +{ 0x00000040, 0x20200208, 0x1e000024, 0xfffcfffc }, +{ 0x0c600031, 0x20003a00, 0x00000040, 0x00000200 }, +{ 0x00600001, 0x20403ae8, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000360, 0x02290000 }, +{ 0x00000001, 0x20480608, 0x00000000, 0x0003000f }, +{ 0x00000001, 0x20403ae8, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x20443ae8, 0x00000020, 0x00000000 }, +{ 0x0c600031, 0x22603a08, 0x00000040, 0x00000200 }, +{ 0x00600001, 0x20403ae8, 0x008d0000, 0x00000000 }, +{ 0x00000040, 0x22000200, 0x06000364, 0x060a8000 }, +{ 0x00800001, 0x20603ae8, 0x008d0260, 0x00000000 }, +{ 0x00000001, 0x20480608, 0x00000000, 0x0003000f }, +{ 0x00000001, 0x20403ae8, 0x0000002c, 0x00000000 }, +{ 0x00000001, 0x20443ae8, 0x00000020, 0x00000000 }, +{ 0x0c600031, 0x20003a00, 0x00000040, 0x00000200 }, +{ 0x00600001, 0x2e003ae8, 0x008d0000, 0x00000000 }, +{ 0x07000031, 0x20003a00, 0x06000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/VP_Setup.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/VP_Setup.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/VP_Setup.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/VP_Setup.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,440 @@ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/* + * Copyright 2000-2011 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: Zhao Yakui + */ + +// 326 // Total instruction count +// 1 // Total kernel count + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// FileName: VP_Setup.asm +// Author: Vivek Kumar +// Description: Sets up all parameters for the Video Processing Kernel + + + + +// Description: Includes all definitions explicit to Fast Composite. + + + + +// End of common.inc + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud +.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw +.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub +.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Setup pointer to the inline parameter + +// Copy MSG HDR + mov (8) r27.0<1>:ud r0.0<8;8,1>:ud // Initialize message payload header with R0 + +// Only one layer is enough + +//temp; remove it once unread msg warnings are resolved -vK +mov (8) r25<1>:ud r0.0<8;8,1>:ud +mov (8) r26<1>:ud r0.0<8;8,1>:ud + +// Calculate StepX for all layers and overwrite it on the ratio + mul (8) r3.0<1>:f r3.0<8;8,1>:f r9.4<0;1,0>:f //StepX_ratio = StepX / VideoStepX + + //Normalised Ratio of Horizontal step size with main video for all layers now becomes + //Normalised Horizontal step size for all layers + +// Calculate block origin for all layers and overwrite it on the frame origin + mov (2) r10.5<1>:f r9.0<2;2,1>:w //Convert origin from word to float + + cmp.e.f0.0 (1) null<1>:d r2.26<0;1,0>:ub 1:uw + + + shr (1) r17.0<1>:uw r2.2<0;1,0>:uw 0:uw + and (1) r17.0<1>:uw r17.0<0;1,0>:uw 3:uw + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 1:uw + (f0.1) jmpi (1) ROTATE_90_L0 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 2:uw + (f0.1) jmpi (1) ROTATE_180_L0 + cmp.e.f0.1 (1) null<1>:w r17.0<0;1,0>:uw 3:uw + (f0.1) jmpi (1) ROTATE_270_L0 + + // rotate 0 degree +ROTATE_0_L0: + (-f0.0)mov (1) acc0.0<1>:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r10.5<0;1,0>:f + + mov (1) acc0.0<1>:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r10.6<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L0 + + // rotate 90 degree +ROTATE_90_L0: + (-f0.0)mov (1) acc0.0<1>:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r10.6<0;1,0>:f + + mov (1) r16.0<1>:f r2.0<0;1,0>:uw + add (1) r17.0<1>:f -r10.5<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + + mov (1) acc0.0<1>:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L0 + + // rotate 180 degree +ROTATE_180_L0: + (-f0.0)mov (1) r16.0<1>:f r2.0<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r10.5<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.0<1>:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r17.0<0;1,0>:f + + mov (1) r16.0<1>:f r2.1<0;1,0>:uw + add (1) r17.0<1>:f -r10.6<0;1,0>:f r16.0<0;1,0>:f + add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + mov (1) acc0.0<1>:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r17.0<0;1,0>:f + jmpi (1) END_SRC_BLOCK_ORIG_COMP_L0 + + // rotate 270 degree +ROTATE_270_L0: + (-f0.0)mov (1) r16.0<1>:f r2.1<0;1,0>:uw + (-f0.0)add (1) r17.0<1>:f -r10.6<0;1,0>:f r16.0<0;1,0>:f + (-f0.0)add (1) r17.0<1>:f r17.0<0;1,0>:f -16.0:f + (-f0.0)mov (1) acc0.0<1>:f r6.0<0;1,0>:f + (-f0.0)mac (1) r6.0<1>:f r3.0<0;1,0>:f r17.0<0;1,0>:f + + mov (1) acc0.0<1>:f r5.0<0;1,0>:f + mac (1) r5.0<1>:f r4.0<0;1,0>:f r10.5<0;1,0>:f + +END_SRC_BLOCK_ORIG_COMP_L0: + nop diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/YUV_to_RGB.g8a intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/YUV_to_RGB.g8a --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen8/YUV_to_RGB.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen8/YUV_to_RGB.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,996 @@ +/* + * Copyright 2000-2013 Intel Corporation All Rights Reserved + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * Authors: + * Zhao Yakui + */ + + + +// Module name: common.inc +// +// Common header file for all Video-Processing kernels +// + +.default_execution_size (16) +.default_register_type :ub + +.reg_count_total 128 +.reg_count_payload 7 + +//========== Common constants ========== + + +//========== Macros ========== + + +//Fast Jump, For more details see "Set_Layer_N.asm" + + +//========== Defines ==================== + +//========== Static Parameters (Common To All) ========== +//r1 + + +//r2 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + +//Color Pipe (IECP) parameters + + +//ByteCopy + + +//r4 + + // e.g. byte0 byte1 byte2 + // YUYV 0 1 3 + // YVYU 0 3 1 + + +//========== Inline parameters (Common To All) =========== + + +//============== Binding Index Table=========== +//Common between DNDI and DNUV + + +//================= Common Message Descriptor ===== +// Message descriptor for thread spawning +// Message Descriptors +// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) +// 0000,0000,0000 +// 0001(Spawn a root thread),0001 (Root thread spawn thread) +// = 0x02000011 +// Thread Spawner Message Descriptor + + +// Message descriptor for atomic operation add +// Message Descriptors +// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) +// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) +// 0000,0000 (Binding table index, added later) +// = 0x02000011 + +// Atomic Operation Add Message Descriptor + + +// Message descriptor for dataport media write + // Message Descriptors + // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) + // 1 (header present 1) 0 1010 (media block write) 000000 + // 00000000 (binding table index - set later) + // = 0x020A8000 + + +// Message Length defines + + +// Response Length defines + + +// Block Width and Height Size defines + + +// Extended Message Descriptors + + +// Common message descriptors: + + +//===================== Math Function Control =================================== + + +//============ Message Registers =============== + // buf4 starts from r28 + + +//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT + + +.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub +.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw +.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud +.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f + +//=================== End of thread instruction =========================== + + +//=====================Pointers Used===================================== + + +//======================================================================= + + +//r11-r17 +// Define temp space for any usages + + +// Common Buffers + + +// temp space for rotation + +.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud + +.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw + +.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub + + +// End of common.inc + + +// Module name: YUV_to_RGB.asm +// +// Convert YUV to RGB, handle it by 16x4 block +// + + +// Description: Includes all definitions explicit to Fast Composite. + + +//========== GRF partition ========== + // r0 header : r0 (1 GRF) + // Static parameters : r1 - r6 (6 GRFS) + // Inline parameters : r7 - r8 (2 GRFs) + // MSGSRC : r27 (1 GRF) +//=================================== + +//Interface: +//========== Static Parameters (Explicit To Fast Composite) ========== +//r1 +//CSC Set 0 + + +.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud + +//Constant alpha + + +//r2 + + +// Gen7 AVS WA + + +// WiDi Definitions + + +//Colorfill + + + // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. + +.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub + +//r3 +//Normalised Ratio of Horizontal step size with main video for all layers + + + //Normalised Ratio of Horizontal step size with main video for all layers becomes + //Normalised Horizontal step size for all layers in VP_Setup.asm + + +//r4 +//Normalised Vertical step size for all layers + + +//r5 +//Normalised Vertical Frame Origin for all layers + + +//r6 +//Normalised Horizontal Frame Origin for all layers + + +//========== Inline Parameters (Explicit To Fast Composite) ========== + + +//Main video Step X + + +//====================== Binding table (Explicit To Fast Composite)========================================= + + +//Used by Interlaced Scaling Kernels + + +//========== Sampler State Table Index (Explicit To Fast Composite)========== +//Sampler Index for AVS/IEF messages + + +//Sampler Index for SIMD16 sampler messages + + +//============================================================================= + +.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f +.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f + +.declare bBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub +.declare bBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub + +//Pointer to mask reg + + +//r18 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF + +//r19 + + +.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF + + +//r20 + +.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r21 + +.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF + +//r22 + + +//Always keep Cannel Pointers and Offsets in same GRF, so that we can use +// NODDCLR, NODDCHK flags. -rT + + +//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as +//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT + +//r23 + + +//Lumakey + + +//r24 + + +//r25 + + +//r26 + + +//defines to generate LABELS during compile time. + + +//Msg payload buffers; upto 4 full-size messages can be written + +//Unnecessary to use the MSGPayLoad, So it is temporiarily used for conversion of YUV->RGB + +.declare fBUFFER_R Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_G Base=r30.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_B Base=r32.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + +.declare fBUFFER_Y Base=r36.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_U Base=r38.0 ElementSize=4 SrcRegion=<8;8,1> Type=f +.declare fBUFFER_V Base=r40.0 ElementSize=4 SrcRegion=<8;8,1> Type=f + + +.declare wTempR Base=r42.0 ElementSize=2 Type=w +.declare wTempG Base=r44.0 ElementSize=2 Type=w +.declare wTempB Base=r46.0 ElementSize=2 Type=w + +.declare ubTempR Base=r42.0 ElementSize=1 Type=ub +.declare ubTempG Base=r44.0 ElementSize=1 Type=ub +.declare ubTempB Base=r46.0 ElementSize=1 Type=ub + + // the r17 register (nTEMP0) is originally defined from "Common.inc" + // instead of re-defining a nTEMP0 here, we use "SAVE_RGB" suffix for its naming + + .declare wTemp0 Base=r17.0 ElementSize=2 Type=uw + + +//_SAVE_INC_ + // NTSC standard + // R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255)) + // G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255)) + // B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255)) + // ITU-R conversion, Now we are using ITU-R conversion + // R = clip( Y + 1.402*(Cr-128)) // ITU-R + // G = clip( Y - 0.344*(Cb-128) - 0.714*(Cr-128)) + // B = clip( Y + 1.772*(Cb-128)) + + // At the save module we have all 8 address sub-registers available. + // So we will use PING-PONG type of scheme to save the data using + // pointers pBUF_CHNL_TOP_8x4 and pBUF_CHNL_BOT_8x4. This will help + // reduce dependency. - rT + + //wBUFF_CHNL_PTR points to either buffer 0 or buffer 4. + //Add appropriate offsets to get pointers for all buffers (1,2,3 or 5). + //Offsets are zero for buffer 0 and buffer 4. + //Y/U/V is also stored as R/G/B for the internal purpose +//for BUFFER_0 + mov (4) a0.0<1>:uw r22.0<4;4,1>:uw +//the first line in the block 0 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 0 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 0 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 0 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + + +//for BUFFER_1 + add (4) a0.0<1>:uw r22.0<4;4,1>:uw 512:uw +//the first line in the block 1 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 1 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 1 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 1 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + + +//for BUFFER_2 + add (4) a0.0<1>:uw r22.0<4;4,1>:uw 1024:uw +//the first line in the block 2 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 2 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 2 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 2 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + + +//for BUFFER_3 + add (4) a0.0<1>:uw r22.0<4;4,1>:uw 1536:uw +//the first line in the block 3 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 1]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 17]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 1]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 17]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 1]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 17]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,1]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,1]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,1]<2>:ub ubTempB(0, 0)<32;8,4> + +//the second line in the block 3 + + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 33]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 49]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 33]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 49]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 33]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 49]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,33]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,33]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,33]<2>:ub ubTempB(0, 0)<32;8,4> + +//the third line in the block 3 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 65]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 81]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 65]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 81]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 65]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 81]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,65]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,65]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,65]<2>:ub ubTempB(0, 0)<32;8,4> + +//the fourth line in the block 3 + mov (8) fBUFFER_Y(0, 0)<1> r[a0.1, 97]<16;8,2>:ub + mov (8) fBUFFER_Y(1, 0)<1> r[a0.1, 113]<16;8,2>:ub + mov (8) fBUFFER_U(0, 0)<1> r[a0.2, 97]<16;8,2>:ub + mov (8) fBUFFER_U(1, 0)<1> r[a0.2, 113]<16;8,2>:ub + mov (8) fBUFFER_V(0, 0)<1> r[a0.0, 97]<16;8,2>:ub + mov (8) fBUFFER_V(1, 0)<1> r[a0.0, 113]<16;8,2>:ub + + mul (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> 0.0039216f + mul (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> 0.0039216f + mul (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> 0.0039216f + + add (16) fBUFFER_Y(0, 0)<1> fBUFFER_Y(0, 0)<1> r7.3<0;1,0>:f + add (16) fBUFFER_U(0, 0)<1> fBUFFER_U(0, 0)<1> r7.7<0;1,0>:f + add (16) fBUFFER_V(0, 0)<1> fBUFFER_V(0, 0)<1> r8.3<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.1<0;1,0>:f + mac.sat (16) fBUFFER_R(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.2<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r7.4<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r7.5<0;1,0>:f + mac.sat (16) fBUFFER_G(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r7.6<0;1,0>:f + + mul (16) acc0.0<1>:f fBUFFER_Y(0, 0)<8;8,1> r8.0<0;1,0>:f + mac (16) acc0.0<1>:f fBUFFER_U(0, 0)<8;8,1> r8.1<0;1,0>:f + mac.sat (16) fBUFFER_B(0, 0)<1> fBUFFER_V(0, 0)<8;8,1> r8.2<0;1,0>:f + + mul (16) fBUFFER_R(0, 0)<1> fBUFFER_R(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_G(0, 0)<1> fBUFFER_G(0, 0)<8;8,1> 255.0f + mul (16) fBUFFER_B(0, 0)<1> fBUFFER_B(0, 0)<8;8,1> 255.0f + + mov (16) wTempR(0, 0)<2> fBUFFER_R(0, 0)<8;8,1> + mov (16) wTempG(0, 0)<2> fBUFFER_G(0, 0)<8;8,1> + mov (16) wTempB(0, 0)<2> fBUFFER_B(0, 0)<8;8,1> + mov (16) r[a0.1,97]<2>:ub ubTempR(0, 0)<32;8,4> + mov (16) r[a0.2,97]<2>:ub ubTempG(0, 0)<32;8,4> + mov (16) r[a0.0,97]<2>:ub ubTempB(0, 0)<32;8,4> + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,74 @@ +SRCDIR = $(top_srcdir)/src/shaders/post_processing/gen8 +VPATH = $(SRCDIR) + +INTEL_PP_G9B = \ + pl2_to_pl2.g9b \ + pl2_to_pl3.g9b \ + pl3_to_pl2.g9b \ + pl3_to_pl3.g9b \ + pl2_to_rgbx.g9b \ + rgbx_to_nv12.g9b \ + pl2_to_pa.g9b \ + pl3_to_pa.g9b \ + pa_to_pl2.g9b \ + pa_to_pl3.g9b \ + pa_to_pa.g9b \ + $(NULL) + +INTEL_PP_G8A = \ + EOT.g8a \ + PL2_AVS_Buf_0.g8a \ + PL2_AVS_Buf_1.g8a \ + PL2_AVS_Buf_2.g8a \ + PL2_AVS_Buf_3.g8a \ + PL3_AVS_Buf_0.g8a \ + PL3_AVS_Buf_1.g8a \ + PL3_AVS_Buf_2.g8a \ + PL3_AVS_Buf_3.g8a \ + PA_AVS_Buf_0.g8a \ + PA_AVS_Buf_1.g8a \ + PA_AVS_Buf_2.g8a \ + PA_AVS_Buf_3.g8a \ + Save_AVS_NV12.g8a \ + Save_AVS_PL3.g8a \ + Save_AVS_RGBX.g8a \ + Save_AVS_PA.g8a \ + Set_AVS_Buf_0123_PL2.g8a \ + Set_AVS_Buf_0123_PL3.g8a \ + Set_AVS_Buf_0123_BGRA.g8a \ + Set_AVS_Buf_0123_VYUA.g8a \ + YUV_to_RGB.g8a \ + RGB_to_YUV.g8a \ + Set_Layer_0.g8a \ + VP_Setup.g8a \ + $(NULL) + +INTEL_PP_G9A = $(INTEL_PP_G8A) +INTEL_PP_ASM = $(INTEL_PP_G9B:%.g9b=%.asm) +INTEL_PP_GEN9_ASM = $(INTEL_PP_G9B:%.g9b=%.g9s) + +TARGETS = +if HAVE_GEN4ASM +TARGETS += $(INTEL_PP_G9B) +endif + +all-local: $(TARGETS) + +SUFFIXES = .g9b .g9s .asm + +$(INTEL_PP_GEN9_ASM): $(INTEL_PP_ASM) $(INTEL_PP_G9A) +.asm.g9s: + $(AM_V_GEN)cpp $< > _pp0.$@; \ + $(PYTHON2) $(top_srcdir)/src/shaders/gpp.py _pp0.$@ $@; \ + rm _pp0.$@ +.g9s.g9b: + $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 9 $< + +CLEANFILES = $(INTEL_PP_GEN9_ASM) + +EXTRA_DIST = \ + $(INTEL_PP_G9B) \ + $(NULL) + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,514 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY, to the extent permitted by law; without +# even the implied warranty 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maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g9b .g9s .asm +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/post_processing/gen9/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/shaders/post_processing/gen9/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + 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intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pa_to_pa.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pa_to_pa.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pa_to_pa.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,279 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 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0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x08000800 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000002 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000004 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000006 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000a }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000e }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pa_to_pl2.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pa_to_pl2.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pa_to_pl2.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pa_to_pl2.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,186 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x000062ea }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006420 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00000201, 0x24a01a28, 0x00000120, 0x00000000 }, + { 0x00000608, 0x24a41a28, 0x1e000122, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x44c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x44d02288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x44c12288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x44d12288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x44e02288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x44f02288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x44e12288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x44f12288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x45002288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x45102288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x45012288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x45112288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x45202288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x45302288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x45212288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x45312288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pa_to_pl3.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pa_to_pl3.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pa_to_pl3.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pa_to_pl3.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,189 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x000062ea }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006420 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00200208, 0x24a01a28, 0x1e450120, 0x00010001 }, + { 0x00200208, 0x25c01a28, 0x1e450120, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x00070007 }, + { 0x00000401, 0x25c80608, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24c82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x25e02288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x25e82288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24d02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24d82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x25f02288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x25f82288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24e02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24e82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x26002288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x26082288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24f02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24f82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x26102288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x26182288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8019 }, + { 0x0c000031, 0x20002220, 0x060005c0, 0x060a801a }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_pa.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_pa.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_pa.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_pa.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,287 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22082260, 0x1669005c, 0x03a003a0 }, + { 0x00000209, 0x23601a28, 0x1e000120, 0x00010001 }, + { 0x00000601, 0x23641a28, 0x00000122, 0x00000000 }, + { 0x00000401, 0x23680608, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x08000800 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000002 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000004 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000006 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000a }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000e }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_pl2.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_pl2.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_pl2.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_pl2.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,194 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00000201, 0x24a01a28, 0x00000120, 0x00000000 }, + { 0x00000608, 0x24a41a28, 0x1e000122, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x44c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x44d02288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x44c12288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x44d12288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x44e02288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x44f02288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x44e12288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x44f12288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x45002288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x45102288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x45012288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x45112288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x45202288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x45302288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x45212288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x45312288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_pl3.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_pl3.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_pl3.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_pl3.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,197 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00200208, 0x24a01a28, 0x1e450120, 0x00010001 }, + { 0x00200208, 0x25c01a28, 0x1e450120, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x00070007 }, + { 0x00000401, 0x25c80608, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24c82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x25e02288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x25e82288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24d02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24d82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x25f02288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x25f82288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24e02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24e82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x26002288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x26082288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24f02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24f82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x26102288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x26182288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8019 }, + { 0x0c000031, 0x20002220, 0x060005c0, 0x060a801a }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_rgbx.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_rgbx.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl2_to_rgbx.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl2_to_rgbx.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,770 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x048eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000a000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22001240, 0x006902c0, 0x00000000 }, + { 0x00600001, 0x248022e8, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x24a022e8, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x24c022e8, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x24e022e8, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x250022e8, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x252022e8, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24803ae8, 0x3e200480, 0x3b8080c4 }, + { 0x00800041, 0x24c03ae8, 0x3e2004c0, 0x3b8080c4 }, + { 0x00800041, 0x25003ae8, 0x3e200500, 0x3b8080c4 }, + { 0x00800040, 0x24803ae8, 0x3a200480, 0x000000ec }, + { 0x00800040, 0x24c03ae8, 0x3a2004c0, 0x000000fc }, + { 0x00800040, 0x25003ae8, 0x3a200500, 0x0000010c }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000e0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000e4 }, + { 0x80800048, 0x23803ae8, 0x3a8d0500, 0x000000e8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000f0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000f4 }, + { 0x80800048, 0x23c03ae8, 0x3a8d0500, 0x000000f8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x00000100 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x00000104 }, + { 0x80800048, 0x24003ae8, 0x3a8d0500, 0x00000108 }, + { 0x00800041, 0x23803ae8, 0x3e8d0380, 0x437f0000 }, + { 0x00800041, 0x23c03ae8, 0x3e8d03c0, 0x437f0000 }, + { 0x00800041, 0x24003ae8, 0x3e8d0400, 0x437f0000 }, + { 0x00800001, 0x45403a68, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc2012288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc4012288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0012288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x248022e8, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x24a022e8, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x24c022e8, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x24e022e8, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x250022e8, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x252022e8, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24803ae8, 0x3e200480, 0x3b8080c4 }, + { 0x00800041, 0x24c03ae8, 0x3e2004c0, 0x3b8080c4 }, + { 0x00800041, 0x25003ae8, 0x3e200500, 0x3b8080c4 }, + { 0x00800040, 0x24803ae8, 0x3a200480, 0x000000ec }, + { 0x00800040, 0x24c03ae8, 0x3a2004c0, 0x000000fc }, + { 0x00800040, 0x25003ae8, 0x3a200500, 0x0000010c }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000e0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000e4 }, + { 0x80800048, 0x23803ae8, 0x3a8d0500, 0x000000e8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000f0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000f4 }, + { 0x80800048, 0x23c03ae8, 0x3a8d0500, 0x000000f8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x00000100 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x00000104 }, + { 0x80800048, 0x24003ae8, 0x3a8d0500, 0x00000108 }, + { 0x00800041, 0x23803ae8, 0x3e8d0380, 0x437f0000 }, + { 0x00800041, 0x23c03ae8, 0x3e8d03c0, 0x437f0000 }, + { 0x00800041, 0x24003ae8, 0x3e8d0400, 0x437f0000 }, + { 0x00800001, 0x45403a68, 0x008d0380, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d03c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0400, 0x00000000 }, + { 0x00800001, 0xc2212288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xc4212288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc0212288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x248022e8, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x24a022e8, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x24c022e8, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x24e022e8, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x250022e8, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x252022e8, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24803ae8, 0x3e200480, 0x3b8080c4 }, + { 0x00800041, 0x24c03ae8, 0x3e2004c0, 0x3b8080c4 }, + { 0x00800041, 0x25003ae8, 0x3e200500, 0x3b8080c4 }, + { 0x00800040, 0x24803ae8, 0x3a200480, 0x000000ec }, + { 0x00800040, 0x24c03ae8, 0x3a2004c0, 0x000000fc }, + { 0x00800040, 0x25003ae8, 0x3a200500, 0x0000010c }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000e0 }, + { 0x00800048, 0x24003ae0, 0x3a8d04c0, 0x000000e4 }, + { 0x80800048, 0x23803ae8, 0x3a8d0500, 0x000000e8 }, + { 0x00800041, 0x24003ae0, 0x3a8d0480, 0x000000f0 }, + { 0x00800048, 0x24003ae0, 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{ 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x26e00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a00a28, 0x0e000360, 0x00000020 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x25c40a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x26e40a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x26e00a28, 0x0e000360, 0x00000020 }, + { 0x00400040, 0x22001040, 0x16690208, 0x04000400 }, + { 0x00600001, 0x63a02288, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x63a12288, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x63a22288, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x63a32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63c02288, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x63c12288, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x63c22288, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x63c32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64c02288, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x64c12288, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x64c22288, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x64c32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64e02288, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x64e12288, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x64e22288, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x64e32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x63e02288, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x63e12288, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x63e22288, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x63e32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x64002288, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x64012288, 0x00ae8261, 0x00000000 }, + { 0x00600001, 0x64022288, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x64032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65002288, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x65012288, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x65022288, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x65032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x65202288, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x65212288, 0x00ae8271, 0x00000000 }, + { 0x00600001, 0x65222288, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x65232288, 0x0000005f, 0x00000000 }, + { 0x0c800031, 0x20002220, 0x06000380, 0x0a0a8018 }, + { 0x0c800031, 0x20002220, 0x060004a0, 0x0a0a8018 }, + { 0x00400040, 0x22001040, 0x16690208, 0x06000600 }, + { 0x00600001, 0x65e02288, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x65e12288, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x65e22288, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x65e32288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66002288, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x66012288, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x66022288, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x66032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67002288, 0x00ae8011, 0x00000000 }, + { 0x00600001, 0x67012288, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x67022288, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x67032288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67202288, 0x00ae8031, 0x00000000 }, + { 0x00600001, 0x67212288, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x67222288, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x67232288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66202288, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x66212288, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x66222288, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x66232288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x66402288, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x66412288, 0x00ae8261, 0x00000000 }, + { 0x00600001, 0x66422288, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x66432288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67402288, 0x00ae8051, 0x00000000 }, + { 0x00600001, 0x67412288, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x67422288, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x67432288, 0x0000005f, 0x00000000 }, + { 0x00600001, 0x67602288, 0x00ae8071, 0x00000000 }, + { 0x00600001, 0x67612288, 0x00ae8271, 0x00000000 }, + { 0x00600001, 0x67622288, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x67632288, 0x0000005f, 0x00000000 }, + { 0x0c800031, 0x20002220, 0x060005c0, 0x0a0a8018 }, + { 0x0c800031, 0x20002220, 0x060006e0, 0x0a0a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl3_to_pa.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl3_to_pa.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl3_to_pa.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl3_to_pa.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,303 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22082260, 0x1669005c, 0x03a003a0 }, + { 0x00000209, 0x23601a28, 0x1e000120, 0x00010001 }, + { 0x00000601, 0x23641a28, 0x00000122, 0x00000000 }, + { 0x00000401, 0x23680608, 0x00000000, 0x0001001f }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x80400040, 0xc0001248, 0x168a8000, 0x00800080 }, + { 0x80400040, 0xc0201248, 0x168a8020, 0x00800080 }, + { 0x80400040, 0xc0401248, 0x168a8040, 0x00800080 }, + { 0x80400040, 0xc0601248, 0x168a8060, 0x00800080 }, + { 0x80600040, 0xa2001248, 0x168d8200, 0x00800080 }, + { 0x80600040, 0xa2201248, 0x168d8220, 0x00800080 }, + { 0x80600040, 0xa2401248, 0x168d8240, 0x00800080 }, + { 0x80600040, 0xa2601248, 0x168d8260, 0x00800080 }, + { 0x80400040, 0xc4001248, 0x168a8400, 0x00800080 }, + { 0x80400040, 0xc4201248, 0x168a8420, 0x00800080 }, + { 0x80400040, 0xc4401248, 0x168a8440, 0x00800080 }, + { 0x80400040, 0xc4601248, 0x168a8460, 0x00800080 }, + { 0x80400040, 0xc0101248, 0x168a8010, 0x00800080 }, + { 0x80400040, 0xc0301248, 0x168a8030, 0x00800080 }, + { 0x80400040, 0xc0501248, 0x168a8050, 0x00800080 }, + { 0x80400040, 0xc0701248, 0x168a8070, 0x00800080 }, + { 0x80600040, 0xa2101248, 0x168d8210, 0x00800080 }, + { 0x80600040, 0xa2301248, 0x168d8230, 0x00800080 }, + { 0x80600040, 0xa2501248, 0x168d8250, 0x00800080 }, + { 0x80600040, 0xa2701248, 0x168d8270, 0x00800080 }, + { 0x80400040, 0xc4101248, 0x168a8410, 0x00800080 }, + { 0x80400040, 0xc4301248, 0x168a8430, 0x00800080 }, + { 0x80400040, 0xc4501248, 0x168a8450, 0x00800080 }, + { 0x80400040, 0xc4701248, 0x168a8470, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x08000800 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000002 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x02000200 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000004 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x00000006 }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x00000008 }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000a }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x06000600 }, + { 0x00000040, 0x23840a28, 0x0e000364, 0x0000000c }, + { 0x00000040, 0x24a40a28, 0x0e000364, 0x0000000e }, + { 0x00600201, 0xec002288, 0x00cf8001, 0x00000000 }, + { 0x00600201, 0xec202288, 0x00cf8021, 0x00000000 }, + { 0x00800601, 0xc8002288, 0x00d28201, 0x00000000 }, + { 0x00800601, 0xc8202288, 0x00d28221, 0x00000000 }, + { 0x00600401, 0xea002288, 0x00cf8401, 0x00000000 }, + { 0x00600401, 0xea202288, 0x00cf8421, 0x00000000 }, + { 0x00600201, 0xed202288, 0x00cf8041, 0x00000000 }, + { 0x00600201, 0xed402288, 0x00cf8061, 0x00000000 }, + { 0x00800601, 0xc9202288, 0x00d28241, 0x00000000 }, + { 0x00800601, 0xc9402288, 0x00d28261, 0x00000000 }, + { 0x00600401, 0xeb202288, 0x00cf8441, 0x00000000 }, + { 0x00600401, 0xeb402288, 0x00cf8461, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x060a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8018 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl3_to_pl2.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl3_to_pl2.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl3_to_pl2.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl3_to_pl2.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,210 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00000201, 0x24a01a28, 0x00000120, 0x00000000 }, + { 0x00000608, 0x24a41a28, 0x1e000122, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x0007000f }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x44c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x44d02288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x44c12288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x44d12288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x44e02288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x44f02288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x44e12288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x44f12288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x45002288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x45102288, 0x00cf8441, 0x00000000 }, + { 0x00600601, 0x45012288, 0x00cf8001, 0x00000000 }, + { 0x00600401, 0x45112288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600201, 0x45202288, 0x00cf8c01, 0x00000000 }, + { 0x00600601, 0x45302288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x45212288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x45312288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x0a0a8019 }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl3_to_pl3.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl3_to_pl3.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/pl3_to_pl3.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/pl3_to_pl3.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,213 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x28802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x29002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2a802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2b002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2c802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2d002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000d000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb001 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2e802248, 0x00000200, 0x00000200 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x044eb002 }, + { 0x00000001, 0x22080608, 0x00000000, 0x0000e000 }, + { 0x02000031, 0x2f002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00600001, 0x23800208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x24a00208, 0x008d0360, 0x00000000 }, + { 0x00600001, 0x25c00208, 0x008d0360, 0x00000000 }, + { 0x00200201, 0x23801a28, 0x00450120, 0x00000000 }, + { 0x00200208, 0x24a01a28, 0x1e450120, 0x00010001 }, + { 0x00200208, 0x25c01a28, 0x1e450120, 0x00010001 }, + { 0x00000401, 0x23880608, 0x00000000, 0x000f000f }, + { 0x00000401, 0x24a80608, 0x00000000, 0x00070007 }, + { 0x00000401, 0x25c80608, 0x00000000, 0x00070007 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x80800040, 0xa2001248, 0x16b18200, 0x00800080 }, + { 0x80800040, 0xa2201248, 0x16b18220, 0x00800080 }, + { 0x80800040, 0xa2401248, 0x16b18240, 0x00800080 }, + { 0x80800040, 0xa2601248, 0x16b18260, 0x00800080 }, + { 0x80600040, 0xc4001248, 0x16ae8400, 0x00800080 }, + { 0x80600040, 0xc4401248, 0x16ae8440, 0x00800080 }, + { 0x80600040, 0xc0001248, 0x16ae8000, 0x00800080 }, + { 0x80600040, 0xc0401248, 0x16ae8040, 0x00800080 }, + { 0x80800040, 0xaa001248, 0x16b18a00, 0x00800080 }, + { 0x80800040, 0xaa201248, 0x16b18a20, 0x00800080 }, + { 0x80800040, 0xaa401248, 0x16b18a40, 0x00800080 }, + { 0x80800040, 0xaa601248, 0x16b18a60, 0x00800080 }, + { 0x80600040, 0xcc001248, 0x16ae8c00, 0x00800080 }, + { 0x80600040, 0xcc401248, 0x16ae8c40, 0x00800080 }, + { 0x80600040, 0xc8001248, 0x16ae8800, 0x00800080 }, + { 0x80600040, 0xc8401248, 0x16ae8840, 0x00800080 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x02000200 }, + { 0x00800201, 0x23a02288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x23b02288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x23c02288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x23d02288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24c02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24c82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x25e02288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x25e82288, 0x00cf8041, 0x00000000 }, + { 0x00400040, 0x22001a40, 0x166902c0, 0x04000400 }, + { 0x00800201, 0x23e02288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x23f02288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24002288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24102288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24d02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24d82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x25f02288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x25f82288, 0x00cf8841, 0x00000000 }, + { 0x00400040, 0x22081a40, 0x166902c0, 0x06000600 }, + { 0x00800201, 0x24202288, 0x00d28201, 0x00000000 }, + { 0x00800401, 0x24302288, 0x00d28221, 0x00000000 }, + { 0x00800201, 0x24402288, 0x00d28241, 0x00000000 }, + { 0x00800401, 0x24502288, 0x00d28261, 0x00000000 }, + { 0x00600201, 0x24e02288, 0x00cf8401, 0x00000000 }, + { 0x00600601, 0x24e82288, 0x00cf8441, 0x00000000 }, + { 0x00600201, 0x26002288, 0x00cf8001, 0x00000000 }, + { 0x00600601, 0x26082288, 0x00cf8041, 0x00000000 }, + { 0x00800201, 0x24602288, 0x00d28a01, 0x00000000 }, + { 0x00800401, 0x24702288, 0x00d28a21, 0x00000000 }, + { 0x00800201, 0x24802288, 0x00d28a41, 0x00000000 }, + { 0x00800401, 0x24902288, 0x00d28a61, 0x00000000 }, + { 0x00600601, 0x24f02288, 0x00cf8c01, 0x00000000 }, + { 0x00600401, 0x24f82288, 0x00cf8c41, 0x00000000 }, + { 0x00600601, 0x26102288, 0x00cf8801, 0x00000000 }, + { 0x00600401, 0x26182288, 0x00cf8841, 0x00000000 }, + { 0x0c000031, 0x20002220, 0x06000380, 0x120a8018 }, + { 0x0c000031, 0x20002220, 0x060004a0, 0x060a8019 }, + { 0x0c000031, 0x20002220, 0x060005c0, 0x060a801a }, + { 0x00600001, 0x2fe00208, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x20002220, 0x06000fe0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/rgbx_to_nv12.g9b intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/rgbx_to_nv12.g9b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/gen9/rgbx_to_nv12.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/gen9/rgbx_to_nv12.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,611 @@ + { 0x00600001, 0x23600208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23200208, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x23400208, 0x008d0000, 0x00000000 }, + { 0x00600041, 0x20603ae8, 0x3a8d0060, 0x00000130 }, + { 0x00200001, 0x21541ae8, 0x00450120, 0x00000000 }, + { 0x01000010, 0x20002220, 0x1600005a, 0x00010001 }, + { 0x00000008, 0x22201248, 0x16000044, 0x00000000 }, + { 0x00000005, 0x22201248, 0x16000220, 0x00030003 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00010001 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000090 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00020002 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x000000f0 }, + { 0x01000010, 0x20001261, 0x16000220, 0x00030003 }, + { 0x00010020, 0x34000005, 0x0e001400, 0x00000180 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000154 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000158 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x000001a0 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000158 }, + { 0x00000001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000120 }, + { 0x00110001, 0x220012e8, 0x00000040, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004154, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00000040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00000040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000220 }, + { 0x00000020, 0x34000004, 0x0e001400, 0x00000070 }, + { 0x00110001, 0x220012e8, 0x00000042, 0x00000000 }, + { 0x00110040, 0x22203ae8, 0x3a004158, 0x00000200 }, + { 0x00110040, 0x22203ae8, 0x3e000220, 0xc1800000 }, + { 0x00110001, 0x24003ae0, 0x000000c0, 0x00000000 }, + { 0x00110048, 0x20c03ae8, 0x3a000060, 0x00000220 }, + { 0x00000001, 0x24003ae0, 0x000000a0, 0x00000000 }, + { 0x00000048, 0x20a03ae8, 0x3a000080, 0x00000154 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00800001, 0x22a01648, 0x10000000, 0xffffffff }, + { 0x00000005, 0x23021288, 0x16000044, 0x00030003 }, + { 0x00000001, 0x23203ae8, 0x00000138, 0x00000000 }, + { 0x00000001, 0x23383ae8, 0x00000134, 0x00000000 }, + { 0x00000001, 0x23303ae8, 0x00000060, 0x00000000 }, + { 0x00000001, 0x23343ae8, 0x00000080, 0x00000000 }, + { 0x00000001, 0x23283ae8, 0x000000c0, 0x00000000 }, + { 0x00000001, 0x232c3ae8, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x233c0608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x233c0208, 0x0600033c, 0x08000000 }, + { 0x00000001, 0x24083ae0, 0x000000c0, 0x00000000 }, + { 0x00000048, 0x24083ae0, 0x3e000060, 0x41000000 }, + { 0x00000248, 0x22e83ae8, 0x3e000134, 0x41e00000 }, + { 0x00000641, 0x22e43ae8, 0x3e000080, 0x40800000 }, + { 0x00000001, 0x24103ae0, 0x00000060, 0x00000000 }, + { 0x00000648, 0x22f03ae8, 0x3e000134, 0x41000000 }, + { 0x00000401, 0x22f40608, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006ea2 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00460046 }, + { 0x00400009, 0x22c01868, 0x16690400, 0x00050005 }, + { 0x00400001, 0x24003660, 0x30000000, 0x00006204 }, + { 0x00400040, 0x24001860, 0x16690400, 0x00400040 }, + { 0x00400209, 0x22401868, 0x16690400, 0x00050005 }, + { 0x00000401, 0x22500608, 0x00000000, 0x01000100 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x28002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000001 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2a002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000002 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2c002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22d00608, 0x00000000, 0x00400040 }, + { 0x00000001, 0x220c0208, 0x0000000c, 0x00000000 }, + { 0x00000040, 0x22000200, 0x060002f4, 0x050eb000 }, + { 0x00000001, 0x22080608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23240608, 0x00000000, 0x00000003 }, + { 0x00600001, 0x22200208, 0x008d0320, 0x00000000 }, + { 0x02000031, 0x2e002248, 0x00000200, 0x00000200 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00400001, 0x22001240, 0x006902c0, 0x00000000 }, + { 0x00400001, 0x22081240, 0x006902c0, 0x00000000 }, + { 0x02800005, 0x20001260, 0x1e000040, 0x00010001 }, + { 0x00010001, 0x22201048, 0x00000200, 0x00000000 }, + { 0x00010001, 0x22001040, 0x00000202, 0x00000000 }, + { 0x00010001, 0x22021240, 0x00000220, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca012288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc012288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8012288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8201648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca212288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc212288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8212288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8241, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8251, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8441, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8451, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8041, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8051, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa401648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac401648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8401648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca412288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc412288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8412288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8261, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8271, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8461, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8471, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8061, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8071, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8601648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca612288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc612288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8612288, 0x00cf05c0, 0x00000000 }, + { 0x00600040, 0x22001040, 0x168d0200, 0x02000200 }, + { 0x00600001, 0x238022e8, 0x00ae8201, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8211, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8401, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8411, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8001, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8011, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbea978d5 }, + { 0x00800048, 0x24c03ae8, 0x3e8d0400, 0x3eff7cee }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0x3eff7cee }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0xbed60419 }, + { 0x00800048, 0x25003ae8, 0x3e8d0400, 0xbda6809d }, + { 0x00800001, 0x45403a68, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x45803a68, 0x008d04c0, 0x00000000 }, + { 0x00800001, 0x45c03a68, 0x008d0500, 0x00000000 }, + { 0x00800001, 0xaa001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xac001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xa8001648, 0x10000000, 0x00000000 }, + { 0x00800001, 0xca012288, 0x00cf0540, 0x00000000 }, + { 0x00800001, 0xcc012288, 0x00cf0580, 0x00000000 }, + { 0x00800001, 0xc8012288, 0x00cf05c0, 0x00000000 }, + { 0x00600001, 0x238022e8, 0x00ae8221, 0x00000000 }, + { 0x00600001, 0x23a022e8, 0x00ae8231, 0x00000000 }, + { 0x00600001, 0x23c022e8, 0x00ae8421, 0x00000000 }, + { 0x00600001, 0x23e022e8, 0x00ae8431, 0x00000000 }, + { 0x00600001, 0x240022e8, 0x00ae8021, 0x00000000 }, + { 0x00600001, 0x242022e8, 0x00ae8031, 0x00000000 }, + { 0x00800041, 0x24003ae0, 0x3e8d0380, 0x3e991687 }, + { 0x00800048, 0x24003ae0, 0x3e8d03c0, 0x3f1645a2 }, + { 0x00800048, 0x24803ae8, 0x3e8d0400, 0x3de978d5 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x43000000 }, + { 0x00800048, 0x24003ae0, 0x3e8d0380, 0xbe2d0e56 }, + { 0x00800048, 0x24003ae0, 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nv12_dndi_nv12.g4b.gen5 \ - nv12_load_save_nv12.g4b.gen5 \ - nv12_scaling_nv12.g4b.gen5 \ - $(NULL) - -INTEL_PP_G6B = \ - nv12_avs_nv12.g6b \ - nv12_dndi_nv12.g6b \ - nv12_load_save_nv12.g6b \ - nv12_scaling_nv12.g6b \ - $(NULL) - -INTEL_PP_ASM = \ - nv12_avs_nv12.asm \ - nv12_dndi_nv12.asm \ - nv12_load_save_nv12.asm \ - nv12_scaling_nv12.asm \ - $(NULL) - -INTEL_PP_ASM += \ - Common/AYUV_Load_16x8.asm \ - Common/IMC3_Load_8x4.asm \ - Common/IMC3_Load_8x5.asm \ - Common/IMC3_Load_9x5.asm \ - Common/Init_All_Regs.asm \ - Common/Multiple_Loop.asm \ - Common/Multiple_Loop_Head.asm \ - Common/NV11_Load_4x8.asm \ - Common/NV11_Load_5x8.asm \ - Common/NV12_Load_8x4.asm \ - Common/NV12_Load_8x5.asm \ - Common/NV12_Load_9x5.asm \ - Common/P208_Load_8x8.asm \ - Common/P208_Load_9x8.asm \ - Common/PA_Load_8x8.asm \ - Common/PA_Load_9x8.asm \ - Common/PL16x8_PL8x4.asm \ - Common/PL16x8_PL8x8.asm \ - Common/PL4x8_Save_NV11.asm \ - Common/PL5x8_PL16x8.asm \ - Common/PL5x8_PL8x8.asm \ - Common/PL8x4_Save_IMC3.asm \ - Common/PL8x4_Save_NV12.asm \ - Common/PL8x5_PL8x8.asm \ - Common/PL8x8_PL8x4.asm \ - Common/PL8x8_Save_P208.asm \ - Common/PL8x8_Save_PA.asm \ - Common/PL9x5_PL16x8.asm \ - Common/PL9x8_PL16x8.asm \ - Common/RGB16x8_Save_RGB.asm \ - Common/RGB16x8_Save_RGB16.asm \ - Common/RGB16x8_Save_Y416.asm \ - Common/RGB_Pack.asm \ - Common/SetupVPKernel.asm \ - Common/readSampler16x1.asm \ - Core_Kernels/AVS_SetupFirstBlock.asm \ - Core_Kernels/AVS_SetupSecondBlock.asm \ - Core_Kernels/DI_Hist_Save.asm \ - Core_Kernels/DI_SAVE_PA.asm \ - Core_Kernels/DNDI_COMMAND.asm \ - Core_Kernels/DNDI_Hist_Save.asm \ - Core_Kernels/PA_AVS_IEF_16x8.asm \ - Core_Kernels/PA_AVS_IEF_8x4.asm \ - Core_Kernels/PA_AVS_IEF_8x8.asm \ - Core_Kernels/PA_AVS_IEF_Sample.asm \ - Core_Kernels/PA_AVS_IEF_Unpack_16x8.asm \ - Core_Kernels/PA_AVS_IEF_Unpack_8x4.asm \ - Core_Kernels/PA_AVS_IEF_Unpack_8x8.asm \ - Core_Kernels/PA_DNDI_ALG.asm \ - Core_Kernels/PA_DN_ALG.asm \ - Core_Kernels/PA_Scaling.asm \ - Core_Kernels/PL2_AVS_IEF_16x8.asm \ - Core_Kernels/PL2_AVS_IEF_8x4.asm \ - Core_Kernels/PL2_AVS_IEF_8x8.asm \ - Core_Kernels/PL2_AVS_IEF_Unpack_16x8.asm \ - Core_Kernels/PL2_AVS_IEF_Unpack_8x4.asm \ - Core_Kernels/PL2_AVS_IEF_Unpack_8x8.asm \ - Core_Kernels/PL2_Scaling.asm \ - Core_Kernels/PL3_AVS_IEF_16x8.asm \ - Core_Kernels/PL3_AVS_IEF_8x4.asm \ - Core_Kernels/PL3_AVS_IEF_8x8.asm \ - Core_Kernels/PL3_AVS_IEF_Unpack_16x8.asm \ - Core_Kernels/PL3_AVS_IEF_Unpack_8x4.asm \ - Core_Kernels/PL3_AVS_IEF_Unpack_8x8.asm \ - Core_Kernels/PL3_Scaling.asm \ - Core_Kernels/PL_DNDI_ALG.asm \ - Core_Kernels/PL_DNDI_ALG_UVCopy_NV11.asm \ - Core_Kernels/PL_DNDI_ALG_UVCopy_NV12.asm \ - Core_Kernels/PL_DNDI_ALG_UVCopy_P208.asm \ - Core_Kernels/PL_DNDI_ALG_UVCopy_PL3.asm \ - Core_Kernels/PL_DN_ALG.asm \ - Core_Kernels/RGB_AVS_IEF_16x8.asm \ - Core_Kernels/RGB_AVS_IEF_Unpack_16x8.asm \ - Core_Kernels/RGB_AVS_IEF_Unscramble_16x8.asm \ - Core_Kernels/RGB_Scaling.asm \ - $(NULL) - -INTEL_PP_INC = \ - Common/AYUV_Load_16x8.inc \ - Common/Expansion.inc \ - Common/PA_Load.inc \ - Common/PL2_Load.inc \ - Common/PL3_Load.inc \ - Common/PL4x8_Save_NV11.inc \ - Common/PL8x4_Save_IMC3.inc \ - Common/PL8x4_Save_NV12.inc \ - Common/PL8x8_PL8x4.inc \ - Common/PL8x8_Save_P208.inc \ - Common/PL8x8_Save_PA.inc \ - Common/RGB16x8_Save_RGB.inc \ - Common/RGB16x8_Save_RGB16.inc \ - Common/RGB16x8_Save_Y416.inc \ - Common/common.inc \ - Common/undefall.inc \ - Core_Kernels/AVS_IEF.inc \ - Core_Kernels/DI.inc \ - Core_Kernels/DNDI.inc \ - Core_Kernels/Scaling.inc - $(NULL) - -INTEL_PP_GEN5_ASM = $(INTEL_PP_G4B_GEN5:%.g4b.gen5=%.g5s) -INTEL_PP_GEN6_ASM = $(INTEL_PP_G6B:%.g6b=%.g6s) - -TARGETS = -if HAVE_GEN4ASM -TARGETS += $(INTEL_PP_G4B_GEN5) -TARGETS += $(INTEL_PP_G6B) -endif - -all-local: $(TARGETS) - -SUFFIXES = .g4a .g4b .g6a .g6b .g5s .g6s .asm - -if HAVE_GEN4ASM -.g4a.g4b: - $(AM_V_GEN)m4 $*.g4a > $*.g4m && \ - $(AM_V_GEN)$(GEN4ASM) -o $@ $*.g4m && \ - $(AM_V_GEN)$(GEN4ASM) -g 5 -o $@.gen5 $*.g4m && \ - rm $*.g4m - -.g6a.g6b: - $(AM_V_GEN)m4 $< > $*.g6m && \ - $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $*.g6m && \ - rm $*.g6m - -$(INTEL_G4B): $(INTEL_G4I) - -$(INTEL_PP_GEN5_ASM): $(INTEL_PP_ASM) -.asm.g5s: - $(AM_V_GEN)cpp -D DEV_ILK -I Common/ -I Core_Kernels $< > _pp0.$@; \ - ../gpp.py _pp0.$@ $@; \ - rm _pp0.$@ -.g5s.g4b.gen5: - $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 5 $< - -$(INTEL_PP_GEN6_ASM): $(INTEL_PP_ASM) -.asm.g6s: - $(AM_V_GEN)cpp -D GT -I Common/ -I Core_Kernels $< > _pp0.$@; \ - ../gpp.py _pp0.$@ $@; \ - rm _pp0.$@ -.g6s.g6b: - $(AM_V_GEN)$(GEN4ASM) -a -o $@ -g 6 $< -endif - -CLEANFILES = $(INTEL_PP_GEN5_ASM) $(INTEL_PP_GEN6_ASM) - -EXTRA_DIST = \ - $(INTEL_G4A) \ - $(INTEL_G4B) \ - $(INTEL_G4B_GEN5) \ - $(INTEL_G4I) \ - $(INTEL_G6B) \ - $(INTEL_PP_ASM) \ - $(INTEL_PP_G4B_GEN5) \ - $(INTEL_PP_G6B) \ - $(INTEL_PP_INC) \ - $(NULL) +SUBDIRS = gen5_6 gen7 gen75 gen8 gen9 # Extra clean files so that maintainer-clean removes *everything* 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0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x01000005, 0x20002d2c, 0x00000088, 0x80008000 }, - { 0x00010001, 0x20c003fd, 0x00000000, 0x00000000 }, - { 0x00000001, 0x212003bd, 0x000000c0, 0x00000000 }, - { 0x00000001, 0x212403bd, 0x000000bc, 0x00000000 }, - { 0x00000001, 0x213403bd, 0x00000038, 0x00000000 }, - { 0x00200001, 0x612803bd, 0x004500a4, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, - { 0x00802001, 0x20000022, 0x008d0100, 0x00000000 }, - { 0x00000031, 0x25401c09, 0x208d0000, 0x044bb401 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, - { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, - { 0x02000031, 0x25c01c09, 0x208d0000, 0x048bb802 }, - { 0x00000001, 0x240803bc, 0x000000a4, 0x00000000 }, - { 0x00000048, 0x24087fbc, 0x000000bc, 0x41000000 }, - { 0x00000048, 0x21287fbd, 0x000000c0, 0x41e00000 }, - { 0x00000001, 0x240403bc, 0x000000bc, 0x00000000 }, - { 0x00000048, 0x21247fbd, 0x000000c0, 0x41000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, - { 0x00802001, 0x20000022, 0x008d0100, 0x00000000 }, - { 0x00000031, 0x27401c09, 0x208d0000, 0x044bb401 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, - { 0x00802001, 0x20400022, 0x008d0100, 0x00000000 }, - { 0x02000031, 0x27c01c09, 0x208d0000, 0x048bb802 }, - { 0x00600001, 0x21400229, 0x00aa0541, 0x00000000 }, - { 0x00600001, 0x21600229, 0x00aa0549, 0x00000000 }, - { 0x00600001, 0x21800229, 0x00aa0561, 0x00000000 }, - { 0x00600001, 0x21a00229, 0x00aa0569, 0x00000000 }, - { 0x00600001, 0x21c00229, 0x00aa0581, 0x00000000 }, - { 0x00600001, 0x21e00229, 0x00aa0589, 0x00000000 }, - { 0x00600001, 0x22000229, 0x00aa05a1, 0x00000000 }, - { 0x00600001, 0x22200229, 0x00aa05a9, 0x00000000 }, - { 0x00600001, 0x23400229, 0x00aa05c1, 0x00000000 }, - { 0x00600001, 0x23600229, 0x00aa05c9, 0x00000000 }, - { 0x00600001, 0x23800229, 0x00aa05e1, 0x00000000 }, - { 0x00600001, 0x23a00229, 0x00aa05e9, 0x00000000 }, - { 0x00600001, 0x23c00229, 0x00aa0641, 0x00000000 }, - { 0x00600001, 0x23e00229, 0x00aa0649, 0x00000000 }, - { 0x00600001, 0x24000229, 0x00aa0661, 0x00000000 }, - { 0x00600001, 0x24200229, 0x00aa0669, 0x00000000 }, - { 0x00600001, 0x22400229, 0x00aa0601, 0x00000000 }, - { 0x00600001, 0x22600229, 0x00aa0609, 0x00000000 }, - { 0x00600001, 0x22800229, 0x00aa0621, 0x00000000 }, - { 0x00600001, 0x22a00229, 0x00aa0629, 0x00000000 }, - { 0x00600001, 0x22c00229, 0x00aa0681, 0x00000000 }, - { 0x00600001, 0x22e00229, 0x00aa0689, 0x00000000 }, - { 0x00600001, 0x23000229, 0x00aa06a1, 0x00000000 }, - { 0x00600001, 0x23200229, 0x00aa06a9, 0x00000000 }, - { 0x00600001, 0x21500229, 0x00aa0741, 0x00000000 }, - { 0x00600001, 0x21700229, 0x00aa0749, 0x00000000 }, - { 0x00600001, 0x21900229, 0x00aa0761, 0x00000000 }, - { 0x00600001, 0x21b00229, 0x00aa0769, 0x00000000 }, - { 0x00600001, 0x21d00229, 0x00aa0781, 0x00000000 }, - { 0x00600001, 0x21f00229, 0x00aa0789, 0x00000000 }, - { 0x00600001, 0x22100229, 0x00aa07a1, 0x00000000 }, - { 0x00600001, 0x22300229, 0x00aa07a9, 0x00000000 }, - { 0x00600001, 0x23500229, 0x00aa07c1, 0x00000000 }, - { 0x00600001, 0x23700229, 0x00aa07c9, 0x00000000 }, - { 0x00600001, 0x23900229, 0x00aa07e1, 0x00000000 }, - { 0x00600001, 0x23b00229, 0x00aa07e9, 0x00000000 }, - { 0x00600001, 0x23d00229, 0x00aa0841, 0x00000000 }, - { 0x00600001, 0x23f00229, 0x00aa0849, 0x00000000 }, - { 0x00600001, 0x24100229, 0x00aa0861, 0x00000000 }, - { 0x00600001, 0x24300229, 0x00aa0869, 0x00000000 }, - { 0x00600001, 0x22500229, 0x00aa0801, 0x00000000 }, - { 0x00600001, 0x22700229, 0x00aa0809, 0x00000000 }, - { 0x00600001, 0x22900229, 0x00aa0821, 0x00000000 }, - { 0x00600001, 0x22b00229, 0x00aa0829, 0x00000000 }, - { 0x00600001, 0x22d00229, 0x00aa0881, 0x00000000 }, - { 0x00600001, 0x22f00229, 0x00aa0889, 0x00000000 }, - { 0x00600001, 0x23100229, 0x00aa08a1, 0x00000000 }, - { 0x00600001, 0x23300229, 0x00aa08a9, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, - { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, - { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, - { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, - { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, - { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, - { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, - { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, - { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, - { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, - { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, - { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, - { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, - { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, - { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, - { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, - { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, - { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, - { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, - { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, - { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, - { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, - { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, - { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, - { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, - { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, - { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, - { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, - { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, - { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, - { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, - { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, - { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, - { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, - { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, - { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, - { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, - { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, - { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, - { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, - { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, - { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, - { 0x00010220, 0x34001c00, 0x02001400, 0xfffffede }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, - { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, - { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xfffffed2 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_avs_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_avs_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_avs_nv12.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_avs_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 @@ -1,235 +0,0 @@ - { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, - { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, - { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x01000005, 0x20002d2c, 0x00000088, 0x80008000 }, - { 0x00010001, 0x20c003fd, 0x00000000, 0x00000000 }, - { 0x00000001, 0x212003bd, 0x000000c0, 0x00000000 }, - { 0x00000001, 0x212403bd, 0x000000bc, 0x00000000 }, - { 0x00000001, 0x213403bd, 0x00000038, 0x00000000 }, - { 0x00200001, 0x612803bd, 0x004500a4, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, - { 0x00800001, 0x20000022, 0x008d0100, 0x00000000 }, - { 0x02000031, 0x25401cc9, 0x00000000, 0x044bb401 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, - { 0x00800001, 0x20400022, 0x008d0100, 0x00000000 }, - { 0x02000031, 0x25c01cc9, 0x00000040, 0x048bb802 }, - { 0x00000001, 0x240803bc, 0x000000a4, 0x00000000 }, - { 0x00000048, 0x24087fbc, 0x000000bc, 0x41000000 }, - { 0x00000048, 0x21287fbd, 0x000000c0, 0x41e00000 }, - { 0x00000001, 0x240403bc, 0x000000bc, 0x00000000 }, - { 0x00000048, 0x21247fbd, 0x000000c0, 0x41000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000d000 }, - { 0x00800001, 0x20000022, 0x008d0100, 0x00000000 }, - { 0x02000031, 0x27401cc9, 0x00000000, 0x044bb401 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0000a000 }, - { 0x00800001, 0x20400022, 0x008d0100, 0x00000000 }, - { 0x02000031, 0x27c01cc9, 0x00000040, 0x048bb802 }, - { 0x00600001, 0x21400229, 0x00aa0541, 0x00000000 }, - { 0x00600001, 0x21600229, 0x00aa0549, 0x00000000 }, - { 0x00600001, 0x21800229, 0x00aa0561, 0x00000000 }, - { 0x00600001, 0x21a00229, 0x00aa0569, 0x00000000 }, - { 0x00600001, 0x21c00229, 0x00aa0581, 0x00000000 }, - { 0x00600001, 0x21e00229, 0x00aa0589, 0x00000000 }, - { 0x00600001, 0x22000229, 0x00aa05a1, 0x00000000 }, - { 0x00600001, 0x22200229, 0x00aa05a9, 0x00000000 }, - { 0x00600001, 0x23400229, 0x00aa05c1, 0x00000000 }, - { 0x00600001, 0x23600229, 0x00aa05c9, 0x00000000 }, - { 0x00600001, 0x23800229, 0x00aa05e1, 0x00000000 }, - { 0x00600001, 0x23a00229, 0x00aa05e9, 0x00000000 }, - { 0x00600001, 0x23c00229, 0x00aa0641, 0x00000000 }, - { 0x00600001, 0x23e00229, 0x00aa0649, 0x00000000 }, - { 0x00600001, 0x24000229, 0x00aa0661, 0x00000000 }, - { 0x00600001, 0x24200229, 0x00aa0669, 0x00000000 }, - { 0x00600001, 0x22400229, 0x00aa0601, 0x00000000 }, - { 0x00600001, 0x22600229, 0x00aa0609, 0x00000000 }, - { 0x00600001, 0x22800229, 0x00aa0621, 0x00000000 }, - { 0x00600001, 0x22a00229, 0x00aa0629, 0x00000000 }, - { 0x00600001, 0x22c00229, 0x00aa0681, 0x00000000 }, - { 0x00600001, 0x22e00229, 0x00aa0689, 0x00000000 }, - { 0x00600001, 0x23000229, 0x00aa06a1, 0x00000000 }, - { 0x00600001, 0x23200229, 0x00aa06a9, 0x00000000 }, - { 0x00600001, 0x21500229, 0x00aa0741, 0x00000000 }, - { 0x00600001, 0x21700229, 0x00aa0749, 0x00000000 }, - { 0x00600001, 0x21900229, 0x00aa0761, 0x00000000 }, - { 0x00600001, 0x21b00229, 0x00aa0769, 0x00000000 }, - { 0x00600001, 0x21d00229, 0x00aa0781, 0x00000000 }, - { 0x00600001, 0x21f00229, 0x00aa0789, 0x00000000 }, - { 0x00600001, 0x22100229, 0x00aa07a1, 0x00000000 }, - { 0x00600001, 0x22300229, 0x00aa07a9, 0x00000000 }, - { 0x00600001, 0x23500229, 0x00aa07c1, 0x00000000 }, - { 0x00600001, 0x23700229, 0x00aa07c9, 0x00000000 }, - { 0x00600001, 0x23900229, 0x00aa07e1, 0x00000000 }, - { 0x00600001, 0x23b00229, 0x00aa07e9, 0x00000000 }, - { 0x00600001, 0x23d00229, 0x00aa0841, 0x00000000 }, - { 0x00600001, 0x23f00229, 0x00aa0849, 0x00000000 }, - { 0x00600001, 0x24100229, 0x00aa0861, 0x00000000 }, - { 0x00600001, 0x24300229, 0x00aa0869, 0x00000000 }, - { 0x00600001, 0x22500229, 0x00aa0801, 0x00000000 }, - { 0x00600001, 0x22700229, 0x00aa0809, 0x00000000 }, - { 0x00600001, 0x22900229, 0x00aa0821, 0x00000000 }, - { 0x00600001, 0x22b00229, 0x00aa0829, 0x00000000 }, - { 0x00600001, 0x22d00229, 0x00aa0881, 0x00000000 }, - { 0x00600001, 0x22f00229, 0x00aa0889, 0x00000000 }, - { 0x00600001, 0x23100229, 0x00aa08a1, 0x00000000 }, - { 0x00600001, 0x23300229, 0x00aa08a9, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, - { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, - { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, - { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, - { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, - { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, - { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, - { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, - { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, - { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, - { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, - { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, - { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, - { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, - { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, - { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, - { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, - { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, - { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, - { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, - { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, - { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, - { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, - { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, - { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, - { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, - { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, - { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, - { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, - { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, - { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, - { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, - { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, - { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, - { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, - { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, - { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, - { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, - { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, - { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, - { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, - { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, - { 0x00010220, 0x34001c00, 0x02001400, 0xfffffede }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, - { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, - { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xfffffed2 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_dndi_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_dndi_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_dndi_nv12.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_dndi_nv12.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,18 +0,0 @@ -// Module name: NV12_DNDI_NV12 -.kernel NV12_DNDI_NV12 -.code - -#define INC_DNDI - -#include "SetupVPKernel.asm" -#include "Multiple_Loop_Head.asm" -#include "PL_DNDI_ALG_UVCopy_NV12.asm" -#include "Multiple_Loop.asm" - -END_THREAD // End of Thread - -.end_code - -.end_kernel - -// end of nv12_dndi_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_dndi_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_dndi_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_dndi_nv12.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_dndi_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 @@ -1,86 +0,0 @@ - { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, - { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, - { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, - { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, - { 0x01600031, 0x24400c01, 0x208d0000, 0x04cb8004 }, - { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, - { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, - { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, - { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, - { 0x00600001, 0x22400229, 0x00ae0481, 0x00000000 }, - { 0x00600001, 0x23400229, 0x00ae0480, 0x00000000 }, - { 0x00600001, 0x22500229, 0x00ae0491, 0x00000000 }, - { 0x00600001, 0x23500229, 0x00ae0490, 0x00000000 }, - { 0x00600001, 0x22600229, 0x00ae04a1, 0x00000000 }, - { 0x00600001, 0x23600229, 0x00ae04a0, 0x00000000 }, - { 0x00600001, 0x22700229, 0x00ae04b1, 0x00000000 }, - { 0x00600001, 0x23700229, 0x00ae04b0, 0x00000000 }, - { 0x00800001, 0x21c00229, 0x00b104c0, 0x00000000 }, - { 0x00800001, 0x21e00229, 0x00b104d0, 0x00000000 }, - { 0x00800001, 0x22000229, 0x00b104e0, 0x00000000 }, - { 0x00800001, 0x22200229, 0x00b104f0, 0x00000000 }, - { 0x00600001, 0x22800229, 0x00ae0501, 0x00000000 }, - { 0x00600001, 0x23800229, 0x00ae0500, 0x00000000 }, - { 0x00600001, 0x22900229, 0x00ae0511, 0x00000000 }, - { 0x00600001, 0x23900229, 0x00ae0510, 0x00000000 }, - { 0x00600001, 0x22a00229, 0x00ae0521, 0x00000000 }, - { 0x00600001, 0x23a00229, 0x00ae0520, 0x00000000 }, - { 0x00600001, 0x22b00229, 0x00ae0531, 0x00000000 }, - { 0x00600001, 0x23b00229, 0x00ae0530, 0x00000000 }, - { 0x00000008, 0x21003da1, 0x000000a0, 0x00010001 }, - { 0x00000001, 0x210401a1, 0x000000a2, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, - { 0x00600001, 0x21600022, 0x008d0100, 0x00000000 }, - { 0x00600001, 0x21800022, 0x008d0540, 0x00000000 }, - { 0x0b600031, 0x20000c04, 0x508d0000, 0x04082014 }, - { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, - { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, - { 0x00000001, 0x21080061, 0x00000000, 0x00000003 }, - { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x21c00022, 0x00000560, 0x00000000 }, - { 0x0d600031, 0x20000c04, 0x508d0000, 0x04082014 }, - { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, - { 0x01000010, 0x20003e2c, 0x0000003b, 0x00010001 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x0000000a }, - { 0x00400001, 0x20400022, 0x00690580, 0x00000000 }, - { 0x00400001, 0x20500022, 0x006904d0, 0x00000000 }, - { 0x00400001, 0x20600022, 0x00690590, 0x00000000 }, - { 0x00400001, 0x20700022, 0x006904f0, 0x00000000 }, - { 0x00000220, 0x34001c00, 0x00001400, 0x00000008 }, - { 0x00400001, 0x20400022, 0x006904c0, 0x00000000 }, - { 0x00400001, 0x20500022, 0x00690580, 0x00000000 }, - { 0x00400001, 0x20600022, 0x006904e0, 0x00000000 }, - { 0x00400001, 0x20700022, 0x00690590, 0x00000000 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x06082007 }, - { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01600031, 0x28000c01, 0x408d0000, 0x0218a002 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00600001, 0x20400022, 0x008d0800, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x04082008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, - { 0x00010220, 0x34001c00, 0x02001400, 0xffffff70 }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xffffff6a }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_dndi_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_dndi_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_dndi_nv12.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_dndi_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 @@ -1,159 +0,0 @@ - { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, - { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, - { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x204801aa, 0x000000a0, 0x00000000 }, - { 0x00000001, 0x205801aa, 0x000000a2, 0x00000000 }, - { 0x02600031, 0x24400cc1, 0x00000020, 0x04cb8004 }, - { 0x00800001, 0x21400229, 0x00b10440, 0x00000000 }, - { 0x00800001, 0x21600229, 0x00b10450, 0x00000000 }, - { 0x00800001, 0x21800229, 0x00b10460, 0x00000000 }, - { 0x00800001, 0x21a00229, 0x00b10470, 0x00000000 }, - { 0x00600001, 0x22400229, 0x00ae0481, 0x00000000 }, - { 0x00600001, 0x23400229, 0x00ae0480, 0x00000000 }, - { 0x00600001, 0x22500229, 0x00ae0491, 0x00000000 }, - { 0x00600001, 0x23500229, 0x00ae0490, 0x00000000 }, - { 0x00600001, 0x22600229, 0x00ae04a1, 0x00000000 }, - { 0x00600001, 0x23600229, 0x00ae04a0, 0x00000000 }, - { 0x00600001, 0x22700229, 0x00ae04b1, 0x00000000 }, - { 0x00600001, 0x23700229, 0x00ae04b0, 0x00000000 }, - { 0x00800001, 0x21c00229, 0x00b104c0, 0x00000000 }, - { 0x00800001, 0x21e00229, 0x00b104d0, 0x00000000 }, - { 0x00800001, 0x22000229, 0x00b104e0, 0x00000000 }, - { 0x00800001, 0x22200229, 0x00b104f0, 0x00000000 }, - { 0x00600001, 0x22800229, 0x00ae0501, 0x00000000 }, - { 0x00600001, 0x23800229, 0x00ae0500, 0x00000000 }, - { 0x00600001, 0x22900229, 0x00ae0511, 0x00000000 }, - { 0x00600001, 0x23900229, 0x00ae0510, 0x00000000 }, - { 0x00600001, 0x22a00229, 0x00ae0521, 0x00000000 }, - { 0x00600001, 0x23a00229, 0x00ae0520, 0x00000000 }, - { 0x00600001, 0x22b00229, 0x00ae0531, 0x00000000 }, - { 0x00600001, 0x23b00229, 0x00ae0530, 0x00000000 }, - { 0x00000008, 0x21003da1, 0x000000a0, 0x00010001 }, - { 0x00000001, 0x210401a1, 0x000000a2, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x00030007 }, - { 0x00600001, 0x21600022, 0x008d0100, 0x00000000 }, - { 0x00600001, 0x21800022, 0x008d0540, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000160, 0x04094014 }, - { 0x00200008, 0x21003da1, 0x004500a0, 0x00020002 }, - { 0x00000040, 0x21002421, 0x00000100, 0x00000034 }, - { 0x00000001, 0x21080061, 0x00000000, 0x00000003 }, - { 0x00600001, 0x21a00022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x21c00022, 0x00000560, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x000001a0, 0x04094014 }, - { 0x00400040, 0x22083e28, 0x00690024, 0x07000700 }, - { 0x01000010, 0x20003e2c, 0x0000003b, 0x00010001 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x0000000a }, - { 0x00400001, 0x20400022, 0x00690580, 0x00000000 }, - { 0x00400001, 0x20500022, 0x006904d0, 0x00000000 }, - { 0x00400001, 0x20600022, 0x00690590, 0x00000000 }, - { 0x00400001, 0x20700022, 0x006904f0, 0x00000000 }, - { 0x00000220, 0x34001c00, 0x00001400, 0x00000008 }, - { 0x00400001, 0x20400022, 0x006904c0, 0x00000000 }, - { 0x00400001, 0x20500022, 0x00690580, 0x00000000 }, - { 0x00400001, 0x20600022, 0x006904e0, 0x00000000 }, - { 0x00400001, 0x20700022, 0x00690590, 0x00000000 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x06094007 }, - { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x04600031, 0x28000cc1, 0x00000020, 0x02198002 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0001000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00600001, 0x20400022, 0x008d0800, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x04094008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, - { 0x00010220, 0x34001c00, 0x02001400, 0xffffff70 }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xffffff6a }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_load_save_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_load_save_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_load_save_nv12.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_load_save_nv12.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,17 +0,0 @@ -// Module name: NV12_LOAD_SAVE_NV12 -.kernel NV12_LOAD_SAVE_NV12 -.code - -#include "SetupVPKernel.asm" -#include "Multiple_Loop_Head.asm" -#include "NV12_Load_8x4.asm" -#include "PL8x4_Save_NV12.asm" -#include "Multiple_Loop.asm" - -END_THREAD // End of Thread - -.end_code - -.end_kernel - -// end of nv12_load_save_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_load_save_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_load_save_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_load_save_nv12.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_load_save_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 @@ -1,106 +0,0 @@ - { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, - { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, - { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a001 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, - { 0x02600031, 0x28000c01, 0x408d0000, 0x0228a002 }, - { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, - { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, - { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, - { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, - { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, - { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, - { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, - { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, - { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, - { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, - { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, - { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, - { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, - { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, - { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, - { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, - { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, - { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, - { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, - { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, - { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, - { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, - { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, - { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, - { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, - { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, - { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, - { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, - { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, - { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, - { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, - { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, - { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, - { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, - { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, - { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, - { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, - { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, - { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, - { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, - { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, - { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, - { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, - { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, - { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, - { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, - { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, - { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, - { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, - { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, - { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, - { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, - { 0x00010220, 0x34001c00, 0x02001400, 0xffffff48 }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xffffff42 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_load_save_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_load_save_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_load_save_nv12.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_load_save_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 @@ -1,179 +0,0 @@ - { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, - { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, - { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x00200040, 0x210035a5, 0x004500a0, 0x00450074 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x04600031, 0x27000cc1, 0x00000020, 0x02498001 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20400022, 0x008d0100, 0x00000000 }, - { 0x04600031, 0x28000cc1, 0x00000040, 0x02298002 }, - { 0x00800001, 0x22200229, 0x00b10770, 0x00000000 }, - { 0x00800001, 0x22000229, 0x00b10760, 0x00000000 }, - { 0x00800001, 0x21e00229, 0x00b10750, 0x00000000 }, - { 0x00800001, 0x21c00229, 0x00b10740, 0x00000000 }, - { 0x00800001, 0x21a00229, 0x00b10730, 0x00000000 }, - { 0x00800001, 0x21800229, 0x00b10720, 0x00000000 }, - { 0x00800001, 0x21600229, 0x00b10710, 0x00000000 }, - { 0x00800001, 0x21400229, 0x00b10700, 0x00000000 }, - { 0x00800001, 0x22600229, 0x00d20820, 0x00000000 }, - { 0x00800001, 0x23600229, 0x00d20821, 0x00000000 }, - { 0x00800001, 0x22400229, 0x00d20800, 0x00000000 }, - { 0x00800001, 0x23400229, 0x00d20801, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, - { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, - { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, - { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, - { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, - { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, - { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, - { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, - { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, - { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, - { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, - { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, - { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, - { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, - { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, - { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, - { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, - { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, - { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, - { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, - { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, - { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, - { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, - { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, - { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, - { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, - { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, - { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, - { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, - { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, - { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, - { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, - { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, - { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, - { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, - { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, - { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, - { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, - { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, - { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, - { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000008 }, - { 0x00010220, 0x34001c00, 0x02001400, 0xffffff48 }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xffffff42 }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_scaling_nv12.asm intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_scaling_nv12.asm --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_scaling_nv12.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_scaling_nv12.asm 1970-01-01 00:00:00.000000000 +0000 @@ -1,20 +0,0 @@ -// Module name: NV12_SCALING_NV12 -.kernel NV12_SCALING_NV12 -.code - -#define INC_SCALING - -#include "SetupVPKernel.asm" -#include "Multiple_Loop_Head.asm" -#include "PL2_Scaling.asm" -#include "PL16x8_PL8x4.asm" -#include "PL8x4_Save_NV12.asm" -#include "Multiple_Loop.asm" - -END_THREAD // End of Thread - -.end_code - -.end_kernel - -// end of nv12_scaling_nv12.asm diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_scaling_nv12.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_scaling_nv12.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_scaling_nv12.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_scaling_nv12.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 @@ -1,222 +0,0 @@ - { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, - { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, - { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x00400001, 0x254002fd, 0x00000000, 0x48403000 }, - { 0x00400001, 0x255002fd, 0x00000000, 0x5c585450 }, - { 0x00600040, 0x25607fbd, 0x008d0540, 0x41000000 }, - { 0x00200401, 0x21000061, 0x00000000, 0x00000000 }, - { 0x00000801, 0x21080061, 0x00000000, 0x00000000 }, - { 0x00802001, 0x208003be, 0x000000a8, 0x00000000 }, - { 0x00802001, 0x258003bd, 0x000000a8, 0x00000000 }, - { 0x00802001, 0x240003bc, 0x000000a4, 0x00000000 }, - { 0x00802048, 0x204077be, 0x000000bc, 0x008d0540 }, - { 0x00000401, 0x257003fd, 0x00000000, 0x437f0000 }, - { 0x00000801, 0x257c03fd, 0x00000000, 0x3f000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x21400229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22400229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23400229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x21600229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22600229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23600229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x21800229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22800229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23800229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x21a00229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22a00229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23a00229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x21c00229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22c00229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23c00229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x21e00229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22e00229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23e00229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x22000229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x23000229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x24000229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01800031, 0x27001c09, 0x208d0000, 0x0a8a0101 }, - { 0x01800031, 0x28001c09, 0x208d0000, 0x0a8a0202 }, - { 0x00802040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00802040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00802001, 0x27000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00802001, 0x28000381, 0x00b10400, 0x00000000 }, - { 0x00802059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00802001, 0x28400381, 0x00b10400, 0x00000000 }, - { 0x00800001, 0x22200229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x23200229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x24200229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, - { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, - { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, - { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, - { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, - { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, - { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, - { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, - { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, - { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, - { 0x01600031, 0x27000c01, 0x408d0000, 0x0248a007 }, - { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, - { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x01600031, 0x28000c01, 0x408d0000, 0x0228a008 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, - { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, - { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, - { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, - { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, - { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, - { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, - { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, - { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, - { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, - { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, - { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, - { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, - { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, - { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, - { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, - { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, - { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, - { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, - { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, - { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, - { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, - { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, - { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, - { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, - { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, - { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, - { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, - { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, - { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, - { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, - { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x0a082007 }, - { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, - { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, - { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, - { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, - { 0x01600031, 0x20000c04, 0x508d0000, 0x06082008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, - { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, - { 0x00010220, 0x34001c00, 0x02001400, 0xfffffe66 }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, - { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, - { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe5a }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x0f000031, 0x20000c04, 0x708d0000, 0x82000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_scaling_nv12.g6b intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_scaling_nv12.g6b --- intel-vaapi-driver-1.0.15/src/shaders/post_processing/nv12_scaling_nv12.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/post_processing/nv12_scaling_nv12.g6b 1970-01-01 00:00:00.000000000 +0000 @@ -1,295 +0,0 @@ - { 0x00600001, 0x20e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x22e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x23e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x24e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x25e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x26e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x27e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29000061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29200061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29800061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29a00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29c00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x29e00061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21000021, 0x008d0000, 0x00000000 }, - { 0x00000441, 0x20842e2d, 0x000000b7, 0x00100010 }, - { 0x00000c01, 0x2086022d, 0x000000bb, 0x00000000 }, - { 0x00000801, 0x208a01ad, 0x000000a0, 0x00000000 }, - { 0x00200001, 0x209403bd, 0x006600a4, 0x00000000 }, - { 0x00000040, 0x208435ad, 0x00000084, 0x000000a0 }, - { 0x00400001, 0x254002fd, 0x00000000, 0x48403000 }, - { 0x00400001, 0x255002fd, 0x00000000, 0x5c585450 }, - { 0x00600040, 0x25607fbd, 0x008d0540, 0x41000000 }, - { 0x00200401, 0x21000061, 0x00000000, 0x00000000 }, - { 0x00000801, 0x21080061, 0x00000000, 0x00000000 }, - { 0x00800001, 0x208003be, 0x000000a8, 0x00000000 }, - { 0x00800001, 0x258003bd, 0x000000a8, 0x00000000 }, - { 0x00800001, 0x240003bc, 0x000000a4, 0x00000000 }, - { 0x00800048, 0x204077be, 0x000000bc, 0x008d0540 }, - { 0x00000401, 0x257003fd, 0x00000000, 0x437f0000 }, - { 0x00000801, 0x257c03fd, 0x00000000, 0x3f000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x21400229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22400229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23400229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x21600229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22600229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23600229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x21800229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22800229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23800229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x21a00229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22a00229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23a00229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x21c00229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22c00229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23c00229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x21e00229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x22e00229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x23e00229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x22000229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x23000229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x24000229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x02800031, 0x27001cc9, 0x00000020, 0x0a8a0101 }, - { 0x02800031, 0x28001cc9, 0x00000020, 0x0a8a0202 }, - { 0x00800040, 0x208077be, 0x008d0580, 0x00000038 }, - { 0x00800040, 0x258077bd, 0x008d0580, 0x00000038 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0700 }, - { 0x00800001, 0x27000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0800 }, - { 0x00800001, 0x28000381, 0x008d0400, 0x00000000 }, - { 0x00800059, 0x240077bc, 0x00000570, 0x008d0840 }, - { 0x00800001, 0x28400381, 0x008d0400, 0x00000000 }, - { 0x00800001, 0x22200229, 0x00cf0700, 0x00000000 }, - { 0x00800001, 0x23200229, 0x00cf0800, 0x00000000 }, - { 0x00800001, 0x24200229, 0x00cf0840, 0x00000000 }, - { 0x00600001, 0x22400129, 0x00ae0240, 0x00000000 }, - { 0x00600001, 0x23400129, 0x00ae0340, 0x00000000 }, - { 0x00600001, 0x22500129, 0x00ae0280, 0x00000000 }, - { 0x00600001, 0x23500129, 0x00ae0380, 0x00000000 }, - { 0x00600001, 0x22600129, 0x00ae02c0, 0x00000000 }, - { 0x00600001, 0x23600129, 0x00ae03c0, 0x00000000 }, - { 0x00600001, 0x22700129, 0x00ae0300, 0x00000000 }, - { 0x00600001, 0x23700129, 0x00ae0400, 0x00000000 }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00200001, 0x202001a6, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x20280062, 0x00000000, 0x0007000f }, - { 0x00000005, 0x24000c20, 0x000000b8, 0x00ffffff }, - { 0x04000010, 0x20000c04, 0x00000400, 0x00ffffff }, - { 0x00010220, 0x34001c00, 0x00001400, 0x00000056 }, - { 0x04600031, 0x27000cc1, 0x00000020, 0x02498007 }, - { 0x0000040c, 0x21043da1, 0x000000a2, 0x00010001 }, - { 0x00000801, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x04600031, 0x28000cc1, 0x00000020, 0x02298008 }, - { 0x00200001, 0x210001a1, 0x004500a0, 0x00000000 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0007000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00000001, 0x26020228, 0x000000ba, 0x00000000 }, - { 0x00610001, 0x24400129, 0x020000b8, 0x00000000 }, - { 0x00710001, 0x24400169, 0x02000000, 0x00000000 }, - { 0x00000001, 0x24600061, 0x00000000, 0x00040001 }, - { 0x00000001, 0x24640061, 0x00000000, 0x00400010 }, - { 0x00000001, 0x24680061, 0x00000000, 0x04000100 }, - { 0x00000001, 0x246c0061, 0x00000000, 0x40001000 }, - { 0x00000001, 0x26020128, 0x00000440, 0x00000000 }, - { 0x00910001, 0x41400231, 0x02b10700, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000440, 0x008d0460 }, - { 0x00710001, 0x42400231, 0x02ae0800, 0x00000000 }, - { 0x00710001, 0x43400231, 0x02ae0801, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000442, 0x00000000 }, - { 0x00910001, 0x41600231, 0x02b10710, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000444, 0x00000000 }, - { 0x00910001, 0x41800231, 0x02b10720, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000444, 0x008d0460 }, - { 0x00710001, 0x42500231, 0x02ae0810, 0x00000000 }, - { 0x00710001, 0x43500231, 0x02ae0811, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000446, 0x00000000 }, - { 0x00910001, 0x41a00231, 0x02b10730, 0x00000000 }, - { 0x00000001, 0x26020128, 0x00000448, 0x00000000 }, - { 0x00910001, 0x41c00231, 0x02b10740, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x02000448, 0x008d0460 }, - { 0x00710001, 0x42600231, 0x02ae0820, 0x00000000 }, - { 0x00710001, 0x43600231, 0x02ae0821, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044a, 0x00000000 }, - { 0x00910001, 0x41e00231, 0x02b10750, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044c, 0x00000000 }, - { 0x00910001, 0x42000231, 0x02b10760, 0x00000000 }, - { 0x02600005, 0x2000252c, 0x0200044c, 0x008d0460 }, - { 0x00710001, 0x42700231, 0x02ae0830, 0x00000000 }, - { 0x00710001, 0x43700231, 0x02ae0831, 0x00000000 }, - { 0x00000001, 0x26020128, 0x0000044e, 0x00000000 }, - { 0x00910001, 0x42200231, 0x02b10770, 0x00000000 }, - { 0x00800001, 0x20400232, 0x00d20140, 0x00000000 }, - { 0x00800001, 0x20500232, 0x00d20160, 0x00000000 }, - { 0x00800001, 0x20600232, 0x00d20180, 0x00000000 }, - { 0x00800001, 0x20700232, 0x00d201a0, 0x00000000 }, - { 0x00800001, 0x20800232, 0x00d201c0, 0x00000000 }, - { 0x00800001, 0x20900232, 0x00d201e0, 0x00000000 }, - { 0x00800001, 0x20a00232, 0x00d20200, 0x00000000 }, - { 0x00800001, 0x20b00232, 0x00d20220, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x0a094007 }, - { 0x00200001, 0x210001a5, 0x004500a0, 0x00000000 }, - { 0x0000000c, 0x21043ca5, 0x00000104, 0x00010001 }, - { 0x00000001, 0x21080061, 0x00000000, 0x0003000f }, - { 0x00600001, 0x20200022, 0x008d0100, 0x00000000 }, - { 0x00800001, 0x40400232, 0x00d20240, 0x00000000 }, - { 0x00800001, 0x40410232, 0x00d20340, 0x00000000 }, - { 0x00800001, 0x40600232, 0x00d20260, 0x00000000 }, - { 0x00800001, 0x40610232, 0x00d20360, 0x00000000 }, - { 0x05600031, 0x20000cc4, 0x00000020, 0x06094008 }, - { 0x01000040, 0x20863dad, 0x00000086, 0xffffffff }, - { 0x00000040, 0x20a03dad, 0x000000a0, 0x00100010 }, - { 0x05000010, 0x200035ac, 0x020000a0, 0x00000084 }, - { 0x00000041, 0x24407fbd, 0x000000bc, 0x41800000 }, - { 0x00000040, 0x20a477bd, 0x00000440, 0x000000a4 }, - { 0x00010220, 0x34001c00, 0x00001400, 0x0000000e }, - { 0x00010220, 0x34001c00, 0x02001400, 0xfffffe66 }, - { 0x00000001, 0x20a001ad, 0x0000008a, 0x00000000 }, - { 0x00000040, 0x20a23dad, 0x000000a2, 0x00080008 }, - { 0x00000001, 0x20a403bd, 0x00000094, 0x00000000 }, - { 0x00000041, 0x24407fbd, 0x00000038, 0x41000000 }, - { 0x00000040, 0x20a877bd, 0x00000440, 0x000000a8 }, - { 0x00000220, 0x34001c00, 0x00001400, 0xfffffe5a }, - { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, - { 0x00600001, 0x21e00022, 0x008d0000, 0x00000000 }, - { 0x07000031, 0x20001cc4, 0x000001e0, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm.g4i intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm.g4i --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm.g4i 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm.g4i 2016-06-03 06:05:58.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2006 Intel Corporation + * Copyright © 2006-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -39,39 +39,43 @@ define(`interleaved_uv', `g2.0<0,1,0>UW') /* Source transformation parameters */ -define(`src_du_dx', `g3.0<0,1,0>F') -define(`src_du_dy', `g3.4<0,1,0>F') -define(`src_uo', `g3.12<0,1,0>F') -define(`src_dv_dx', `g3.16<0,1,0>F') -define(`src_dv_dy', `g3.20<0,1,0>F') -define(`src_vo', `g3.28<0,1,0>F') -define(`src_dw_dx', `g4.0<0,1,0>F') -define(`src_dw_dy', `g4.4<0,1,0>F') -define(`src_wo', `g4.12<0,1,0>F') - -define(`mask_du_dx', `g5.0<0,1,0>F') -define(`mask_du_dy', `g5.4<0,1,0>F') -define(`mask_uo', `g5.12<0,1,0>F') -define(`mask_dv_dx', `g5.16<0,1,0>F') -define(`mask_dv_dy', `g5.20<0,1,0>F') -define(`mask_vo', `g5.28<0,1,0>F') -define(`mask_dw_dx', `g6.0<0,1,0>F') -define(`mask_dw_dy', `g6.4<0,1,0>F') -define(`mask_wo', `g6.12<0,1,0>F') +define(`src_du_dx', `g6.0<0,1,0>F') +define(`src_du_dy', `g6.4<0,1,0>F') +define(`src_uo', `g6.12<0,1,0>F') +define(`src_dv_dx', `g6.16<0,1,0>F') +define(`src_dv_dy', `g6.20<0,1,0>F') +define(`src_vo', `g6.28<0,1,0>F') +define(`src_dw_dx', `g7.0<0,1,0>F') +define(`src_dw_dy', `g7.4<0,1,0>F') +define(`src_wo', `g7.12<0,1,0>F') + +define(`mask_du_dx', `g8.0<0,1,0>F') +define(`mask_du_dy', `g8.4<0,1,0>F') +define(`mask_uo', `g8.12<0,1,0>F') +define(`mask_dv_dx', `g8.16<0,1,0>F') +define(`mask_dv_dy', `g8.20<0,1,0>F') +define(`mask_vo', `g8.28<0,1,0>F') +define(`mask_dw_dx', `g9.0<0,1,0>F') +define(`mask_dw_dy', `g9.4<0,1,0>F') +define(`mask_wo', `g9.12<0,1,0>F') + +/* Attribute for snb+ */ +define(`a0_a_x',`g10.0<0,1,0>F') +define(`a0_a_y',`g10.16<0,1,0>F') /* * Local variables. Pairs must be aligned on even reg boundry */ /* this holds the X dest coordinates */ -define(`dst_x', `g8') +define(`dst_x', `g42') define(`dst_x_0', `dst_x') -define(`dst_x_1', `g9') +define(`dst_x_1', `g43') /* this holds the Y dest coordinates */ -define(`dst_y', `g10') +define(`dst_y', `g44') define(`dst_y_0', `dst_y') -define(`dst_y_1', `g11') +define(`dst_y_1', `g45') /* When computing x * dn/dx, use this */ define(`temp_x', `g30') @@ -142,6 +146,25 @@ define(`mask_sample_a_01', `g28') define(`mask_sample_a_23', `g29') +/* Color Balance to these registers */ +define(`color_balance_base', `g32') + +define(`color_balance_r', `g32') +define(`color_balance_r_01', `g32') +define(`color_balance_r_23', `g33') + +define(`color_balance_g', `g34') +define(`color_balance_g_01', `g34') +define(`color_balance_g_23', `g35') + +define(`color_balance_b', `g36') +define(`color_balance_b_01', `g37') +define(`color_balance_b_23', `g37') + +define(`color_balance_a', `g38') +define(`color_balance_a_01', `g39') +define(`color_balance_a_23', `g39') + /* data port SIMD16 send registers */ define(`data_port_msg_0', `m0') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g4b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g4b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g4b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g4b 2016-06-03 06:06:08.000000000 +0000 @@ -1,8 +1,8 @@ - { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, - { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, + { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000c0 }, + { 0x00802041, 0x238077bd, 0x008d0580, 0x000000c4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, - { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c }, - { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, - { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, + { 0x00802040, 0x204077be, 0x008d03c0, 0x000000cc }, + { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000d0 }, + { 0x00802041, 0x238077bd, 0x008d0580, 0x000000d4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, - { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c }, + { 0x00802040, 0x208077be, 0x008d03c0, 0x000000dc }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -1,8 +1,8 @@ - { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, - { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, + { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000c0 }, + { 0x00802041, 0x238077bd, 0x008d0580, 0x000000c4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, - { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c }, - { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, - { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, + { 0x00802040, 0x204077be, 0x008d03c0, 0x000000cc }, + { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000d0 }, + { 0x00802041, 0x238077bd, 0x008d0580, 0x000000d4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, - { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c }, + { 0x00802040, 0x208077be, 0x008d03c0, 0x000000dc }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g6a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g6a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g6a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -35,9 +35,6 @@ define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') -define(`a0_a_x',`g7.0<0,1,0>F') -define(`a0_a_y',`g7.16<0,1,0>F') - /* U */ pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g6b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g6b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -1,4 +1,4 @@ - { 0x0060005a, 0x204077be, 0x000000e0, 0x008d0040 }, - { 0x0060005a, 0x206077be, 0x000000e0, 0x008d0080 }, - { 0x0060005a, 0x208077be, 0x000000f0, 0x008d0040 }, - { 0x0060005a, 0x20a077be, 0x000000f0, 0x008d0080 }, + { 0x0060005a, 0x204077be, 0x00000140, 0x008d0040 }, + { 0x0060005a, 0x206077be, 0x00000140, 0x008d0080 }, + { 0x0060005a, 0x208077be, 0x00000150, 0x008d0040 }, + { 0x0060005a, 0x20a077be, 0x00000150, 0x008d0080 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g7a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g7a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g7a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -35,8 +35,6 @@ define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') -define(`a0_a_x',`g7.0<0,1,0>F') -define(`a0_a_y',`g7.16<0,1,0>F') /* U */ pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g7b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g7b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g7b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g7b 2016-06-03 06:06:08.000000000 +0000 @@ -1,4 +1,4 @@ - { 0x0060005a, 0x284077bd, 0x000000e0, 0x008d0040 }, - { 0x0060005a, 0x286077bd, 0x000000e0, 0x008d0080 }, - { 0x0060005a, 0x288077bd, 0x000000f0, 0x008d0040 }, - { 0x0060005a, 0x28a077bd, 0x000000f0, 0x008d0080 }, + { 0x0060005a, 0x284077bd, 0x00000140, 0x008d0040 }, + { 0x0060005a, 0x286077bd, 0x00000140, 0x008d0080 }, + { 0x0060005a, 0x288077bd, 0x00000150, 0x008d0040 }, + { 0x0060005a, 0x28a077bd, 0x00000150, 0x008d0080 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g8a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g8a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,45 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`ul', `g66') +define(`uh', `g67') +define(`vl', `g68') +define(`vh', `g69') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + + +/* U */ +pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ +pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ + +/* V */ +pln (8) vl<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ +pln (8) vh<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g8b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g8b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g8b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,4 @@ + { 0x0060005a, 0x28403ae8, 0x3a000140, 0x008d0040 }, + { 0x0060005a, 0x28603ae8, 0x3a000140, 0x008d0080 }, + { 0x0060005a, 0x28803ae8, 0x3a000150, 0x008d0040 }, + { 0x0060005a, 0x28a03ae8, 0x3a000150, 0x008d0080 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g9a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g9a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,45 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`ul', `g66') +define(`uh', `g67') +define(`vl', `g68') +define(`vh', `g69') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + + +/* U */ +pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ +pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ + +/* V */ +pln (8) vl<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ +pln (8) vh<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g9b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g9b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_affine.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_affine.g9b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,4 @@ + { 0x0060005a, 0x28403ae8, 0x3a000140, 0x008d0040 }, + { 0x0060005a, 0x28603ae8, 0x3a000140, 0x008d0080 }, + { 0x0060005a, 0x28803ae8, 0x3a000150, 0x008d0040 }, + { 0x0060005a, 0x28a03ae8, 0x3a000150, 0x008d0080 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g4a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g4a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g4a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -28,6 +28,8 @@ /* Sample the src surface */ include(`exa_wm.g4i') + +define(`global_alpha', `r2.0<0,1,0>f') /* prepare sampler read back gX register, which would be written back to output */ @@ -45,3 +47,6 @@ sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + +mul (8) src_sample_a_01<1>f src_sample_a_01<8,8,1>f global_alpha { align1 }; +mul (8) src_sample_a_23<1>f src_sample_a_23<8,8,1>f global_alpha { align1 }; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g4b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g4b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g4b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g4b 2016-06-03 06:06:08.000000000 +0000 @@ -1,2 +1,4 @@ { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x01800031, 0x21c01d29, 0x008d0000, 0x02580001 }, + { 0x00600041, 0x228077bd, 0x008d0280, 0x00000040 }, + { 0x00600041, 0x22a077bd, 0x008d02a0, 0x00000040 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -1,2 +1,4 @@ { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x01800031, 0x21c01d29, 0x208d0000, 0x0a8a0001 }, + { 0x00600041, 0x228077bd, 0x008d0280, 0x00000040 }, + { 0x00600041, 0x22a077bd, 0x008d02a0, 0x00000040 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g6a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g6a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g6a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -29,6 +29,9 @@ include(`exa_wm.g4i') +/* subpicture global alpha */ +define(`global_alpha', `r6.0<0,1,0>f') + /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ @@ -46,3 +49,7 @@ sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + +mul (8) src_sample_a_01<1>f src_sample_a_01<8,8,1>f global_alpha { align1 }; +mul (8) src_sample_a_23<1>f src_sample_a_23<1>f global_alpha { align1 }; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g6b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g6b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -1,3 +1,5 @@ { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600201, 0x20200022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 }, + { 0x00600041, 0x228077bd, 0x008d0280, 0x000000c0 }, + { 0x00600041, 0x22a077bd, 0x002002a0, 0x000000c0 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g7a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g7a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g7a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -33,6 +33,9 @@ define(`src_msg_gen7', `g65') define(`src_msg_ind_gen7',`65') +/* subpicture global alpha */ +define(`global_alpha', `r6.0<0,1,0>f') + /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ @@ -50,3 +53,7 @@ sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + +mul (8) src_sample_a_01<1>f src_sample_a_01<8,8,1>f global_alpha { align1 mask_disable }; +mul (8) src_sample_a_23<1>f src_sample_a_23<8,8,1>f global_alpha { align1 mask_disable }; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g7b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g7b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g7b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g7b 2016-06-03 06:06:08.000000000 +0000 @@ -1,3 +1,5 @@ { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, { 0x02800031, 0x21c01ca9, 0x00000820, 0x0a8c0001 }, + { 0x00600241, 0x228077bd, 0x008d0280, 0x000000c0 }, + { 0x00600241, 0x22a077bd, 0x008d02a0, 0x000000c0 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g8a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g8a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,59 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu + * Keith Packard + */ + +/* Sample the src surface */ + +include(`exa_wm.g4i') + +/* Ivybridge uses GRFs in SEND instruction */ +define(`src_msg_gen8', `g65') +define(`src_msg_ind_gen8',`65') + +/* subpicture global alpha */ +define(`global_alpha', `r6.0<0,1,0>f') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load argb */ +mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_base<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + +mul (8) src_sample_a_01<1>f src_sample_a_01<8,8,1>f global_alpha { align1 mask_disable }; +mul (8) src_sample_a_23<1>f src_sample_a_23<8,8,1>f global_alpha { align1 mask_disable }; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g8b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g8b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g8b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,5 @@ + { 0x00000001, 0x2008060c, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c00a48, 0x0e000820, 0x0a8c0001 }, + { 0x00600041, 0x22803aec, 0x3a8d0280, 0x000000c0 }, + { 0x00600041, 0x22a03aec, 0x3a8d02a0, 0x000000c0 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g9a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g9a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,59 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu + * Keith Packard + * Zhao Yakui + */ + +/* Sample the src surface */ + +include(`exa_wm.g4i') + +/* Ivybridge uses GRFs in SEND instruction */ +define(`src_msg_gen8', `g65') +define(`src_msg_ind_gen8',`65') + +/* subpicture global alpha */ +define(`global_alpha', `r6.0<0,1,0>f') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ + +/* load argb */ +mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* src_msg will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_base<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + +mul (8) src_sample_a_01<1>f src_sample_a_01<8,8,1>f global_alpha { align1 mask_disable }; +mul (8) src_sample_a_23<1>f src_sample_a_23<8,8,1>f global_alpha { align1 mask_disable }; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g9b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g9b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_argb.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_argb.g9b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,5 @@ + { 0x00000001, 0x2008060c, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c00a48, 0x06000820, 0x0a8c0001 }, + { 0x00600041, 0x22803aec, 0x3a8d0280, 0x000000c0 }, + { 0x00600041, 0x22a03aec, 0x3a8d02a0, 0x000000c0 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g7a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g7a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g7a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g7a 2016-05-09 08:50:40.000000000 +0000 @@ -33,15 +33,18 @@ define(`src_msg_gen7', `g65') define(`src_msg_ind_gen7',`65') /* UV flag */ -define(`nv12', `g6.0<0,1,0>UW') +define(`uv_flag', `g6.0<0,1,0>UW') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ -cmp.g.f0.0 (1) null nv12 0x0UW {align1}; +cmp.e.f0.0 (1) null uv_flag 0x1UW {align1}; (f0.0) jmpi INTERLEAVED_UV; +cmp.e.f0.0 (1) null uv_flag 0x2UW {align1}; +(f0.0) jmpi CONSTANT_UV; + /* load r */ mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; @@ -69,6 +72,12 @@ jmpi SAMPLE_Y; +CONSTANT_UV: +mov (16) src_sample_g<1>f 0.5f { compr align1 mask_disable }; +mov (16) src_sample_b<1>f 0.5f { compr align1 mask_disable }; + +jmpi SAMPLE_Y; + INTERLEAVED_UV: mov (1) g0.8<1>UD 0x0000c000UD { align1 mask_disable }; mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; @@ -81,6 +90,7 @@ /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 4 { align1 }; /* required message len 5, readback len 8 */ + SAMPLE_Y: mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; mov (8) src_msg_gen7<1>UD g0<8,8,1>UD { align1 mask_disable }; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g7b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g7b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g7b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g7b 2016-06-03 06:06:08.000000000 +0000 @@ -1,4 +1,6 @@ - { 0x03000010, 0x20002d3c, 0x000000c0, 0x00000000 }, + { 0x01000010, 0x20002d3c, 0x000000c0, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x01000010, 0x20002d3c, 0x000000c0, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, @@ -6,6 +8,9 @@ { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22401ca9, 0x00000820, 0x0a2c0405 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00800201, 0x220003fd, 0x00000000, 0x3f000000 }, + { 0x00800201, 0x224003fd, 0x00000000, 0x3f000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000201, 0x20080061, 0x00000000, 0x0000c000 }, { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g7b.haswell intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g7b.haswell --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g7b.haswell 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g7b.haswell 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,20 @@ + { 0x01000010, 0x20002d3c, 0x000000c0, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000c0 }, + { 0x01000010, 0x20002d3c, 0x000000c0, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22001ca9, 0x00000820, 0x0a2c0203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22401ca9, 0x00000820, 0x0a2c0405 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x00800201, 0x220003fd, 0x00000000, 0x3f000000 }, + { 0x00800201, 0x224003fd, 0x00000000, 0x3f000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000c000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22001ca9, 0x00000820, 0x0a4c0203 }, + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600201, 0x28200021, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c01ca9, 0x00000820, 0x0a2c0001 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g8a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g8a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,106 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu + * Keith Packard + * Zhao Yakui + */ + +/* Sample the src surface in planar format */ + +include(`exa_wm.g4i') + +/* Ivybridge uses GRFs in SEND instruction */ +define(`src_msg_gen8', `g65') +define(`src_msg_ind_gen8',`65') +/* UV flag */ +define(`uv_flag', `g6.0<0,1,0>UW') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ +cmp.e.f0.0 (1) null uv_flag 0x1UW {align1}; +(f0.0) jmpi INTERLEAVED_UV; + +cmp.e.f0.0 (1) null uv_flag 0x2UW {align1}; +(f0.0) jmpi CONSTANT_UV; + +/* load r */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* emit sampler 'send' cmd */ + +/* sample U (Cr) */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +/* sample V (Cb) */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_b<1>UW /* readback */ + null + sampler (5,4,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +jmpi SAMPLE_Y; + +CONSTANT_UV: +mov (16) src_sample_g<1>f 0.5f { compr align1 mask_disable }; +mov (16) src_sample_b<1>f 0.5f { compr align1 mask_disable }; + +jmpi SAMPLE_Y; + +INTERLEAVED_UV: +mov (1) g0.8<1>UD 0x0000c000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample UV (CrCb) */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 4 { align1 }; /* required message len 5, readback len 8 */ + + +SAMPLE_Y: +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample Y */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_r<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g8b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g8b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g8b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,20 @@ + { 0x01000010, 0x200012e0, 0x160000c0, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x01000010, 0x200012e0, 0x160000c0, 0x00020002 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000e000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22000a48, 0x0e000820, 0x0a2c0203 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000e000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22400a48, 0x0e000820, 0x0a2c0405 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x00800001, 0x22003eec, 0x38000000, 0x3f000000 }, + { 0x00800001, 0x22403eec, 0x38000000, 0x3f000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000c000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22000a48, 0x0e000820, 0x0a4c0203 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000e000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c00a48, 0x0e000820, 0x0a2c0001 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g9a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g9a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,105 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Wang Zhenyu + * Keith Packard + * Zhao Yakui + */ + +/* Sample the src surface in planar format */ + +include(`exa_wm.g4i') + +/* Ivybridge uses GRFs in SEND instruction */ +define(`src_msg_gen8', `g65') +define(`src_msg_ind_gen8',`65') +/* UV flag */ +define(`uv_flag', `g6.0<0,1,0>UW') + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ +cmp.e.f0.0 (1) null uv_flag 0x1UW {align1}; +(f0.0) jmpi INTERLEAVED_UV; + +cmp.e.f0.0 (1) null uv_flag 0x2UW {align1}; +(f0.0) jmpi CONSTANT_UV; + +/* load r */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* emit sampler 'send' cmd */ + +/* sample U (Cr) */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +/* sample V (Cb) */ +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_b<1>UW /* readback */ + null + sampler (5,4,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ + +jmpi SAMPLE_Y; + +CONSTANT_UV: +mov (16) src_sample_g<1>f 0.5f { compr align1 mask_disable }; +mov (16) src_sample_b<1>f 0.5f { compr align1 mask_disable }; + +jmpi SAMPLE_Y; + +INTERLEAVED_UV: +mov (1) g0.8<1>UD 0x0000c000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample UV (CrCb) */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_g<1>UW /* readback */ + null + sampler (3,2,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 4 { align1 }; /* required message len 5, readback len 8 */ + + +SAMPLE_Y: +mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; +mov (8) src_msg_gen8<1>UD g0<8,8,1>UD { align1 mask_disable }; + +/* sample Y */ +send (16) src_msg_ind_gen8 /* msg reg index */ + src_sample_r<1>UW /* readback */ + null + sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) + /* here(src->dst) we should use src_sampler and src_surface */ + mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g9b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g9b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_src_sample_planar.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_src_sample_planar.g9b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,20 @@ + { 0x01000010, 0x200012e0, 0x160000c0, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x01000010, 0x200012e0, 0x160000c0, 0x00020002 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000e000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22000a48, 0x06000820, 0x0a2c0203 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000e000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22400a48, 0x06000820, 0x0a2c0405 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x00800001, 0x22003eec, 0x38000000, 0x3f000000 }, + { 0x00800001, 0x22403eec, 0x38000000, 0x3f000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000c000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22000a48, 0x06000820, 0x0a4c0203 }, + { 0x00000001, 0x2008060c, 0x00000000, 0x0000e000 }, + { 0x00600001, 0x2820020c, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c00a48, 0x06000820, 0x0a2c0001 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g7a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g7a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g7a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -23,61 +23,4 @@ */ include(`exa_wm.g4i') - -/* header */ -define(`data_port_msg_2_0', `g64') -define(`data_port_msg_2_1', `g65') -define(`data_port_msg_2_ind', `64') - -mov (8) data_port_msg_2_0<1>UD g0<8,8,1>UD {align1 mask_disable}; -mov (8) data_port_msg_2_1<1>UD g1<8,8,1>UD {align1 mask_disable}; - -/* - * Prepare data in g66-g67 for Red channel, g68-g69 for Green channel, - * g70-g71 for Blue and g72-g73 for Alpha channel - */ -define(`slot_r_00', `g66') -define(`slot_r_01', `g67') -define(`slot_g_00', `g68') -define(`slot_g_01', `g69') -define(`slot_b_00', `g70') -define(`slot_b_01', `g71') -define(`slot_a_00', `g72') -define(`slot_a_01', `g73') - -mov (8) slot_r_00<1>F src_sample_r_01<1>F { align1 mask_disable }; -mov (8) slot_r_01<1>F src_sample_r_23<1>F { align1 mask_disable }; - -mov (8) slot_g_00<1>F src_sample_g_01<1>F { align1 mask_disable }; -mov (8) slot_g_01<1>F src_sample_g_23<1>F { align1 mask_disable }; - -mov (8) slot_b_00<1>F src_sample_b_01<1>F { align1 mask_disable }; -mov (8) slot_b_01<1>F src_sample_b_23<1>F { align1 mask_disable }; - -mov (8) slot_a_00<1>F src_sample_a_01<1>F { align1 mask_disable }; -mov (8) slot_a_01<1>F src_sample_a_23<1>F { align1 mask_disable }; - -send (16) - data_port_msg_2_ind - null<1>UW - null - write ( - 0, /* binding table index */ - 16, /* last render target(1) + slots 15:0(0) + msg type simd16 single source(000) */ - 12, /* render target write */ - 0, /* ignore for Ivybridge */ - 1 /* header present */ - ) - mlen 10 - rlen 0 - { align1 EOT }; - -nop; -nop; -nop; -nop; -nop; -nop; -nop; -nop; - +include(`exa_wm_write.g7i') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g7b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g7b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g7b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g7b 2016-06-03 06:06:08.000000000 +0000 @@ -1,14 +1,14 @@ - { 0x00600201, 0x28000021, 0x008d0000, 0x00000000 }, - { 0x00600201, 0x28200021, 0x008d0020, 0x00000000 }, - { 0x00600201, 0x284003bd, 0x002001c0, 0x00000000 }, - { 0x00600201, 0x286003bd, 0x002001e0, 0x00000000 }, - { 0x00600201, 0x288003bd, 0x00200200, 0x00000000 }, - { 0x00600201, 0x28a003bd, 0x00200220, 0x00000000 }, - { 0x00600201, 0x28c003bd, 0x00200240, 0x00000000 }, - { 0x00600201, 0x28e003bd, 0x00200260, 0x00000000 }, - { 0x00600201, 0x290003bd, 0x00200280, 0x00000000 }, - { 0x00600201, 0x292003bd, 0x002002a0, 0x00000000 }, - { 0x05800031, 0x20001ca8, 0x00000800, 0x940b1000 }, + { 0x00600201, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x00600201, 0x2e200021, 0x008d0020, 0x00000000 }, + { 0x00600201, 0x2e4003bd, 0x008d01c0, 0x00000000 }, + { 0x00600201, 0x2e6003bd, 0x008d01e0, 0x00000000 }, + { 0x00600201, 0x2e8003bd, 0x008d0200, 0x00000000 }, + { 0x00600201, 0x2ea003bd, 0x008d0220, 0x00000000 }, + { 0x00600201, 0x2ec003bd, 0x008d0240, 0x00000000 }, + { 0x00600201, 0x2ee003bd, 0x008d0260, 0x00000000 }, + { 0x00600201, 0x2f0003bd, 0x008d0280, 0x00000000 }, + { 0x00600201, 0x2f2003bd, 0x008d02a0, 0x00000000 }, + { 0x05800031, 0x20001ca8, 0x00000e00, 0x940b1000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g7i intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g7i --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g7i 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g7i 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,80 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* header */ +define(`data_port_msg_2_0', `g112') +define(`data_port_msg_2_1', `g113') +define(`data_port_msg_2_ind', `112') + +mov (8) data_port_msg_2_0<1>UD g0<8,8,1>UD {align1 mask_disable}; +mov (8) data_port_msg_2_1<1>UD g1<8,8,1>UD {align1 mask_disable}; + +/* + * Prepare data in g114-g115 for Red channel, g116-g117 for Green channel, + * g118-g119 for Blue and g120-g121 for Alpha channel + */ +define(`slot_r_00', `g114') +define(`slot_r_01', `g115') +define(`slot_g_00', `g116') +define(`slot_g_01', `g117') +define(`slot_b_00', `g118') +define(`slot_b_01', `g119') +define(`slot_a_00', `g120') +define(`slot_a_01', `g121') + +mov (8) slot_r_00<1>F src_sample_r_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_r_01<1>F src_sample_r_23<8,8,1>F { align1 mask_disable }; + +mov (8) slot_g_00<1>F src_sample_g_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_g_01<1>F src_sample_g_23<8,8,1>F { align1 mask_disable }; + +mov (8) slot_b_00<1>F src_sample_b_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_b_01<1>F src_sample_b_23<8,8,1>F { align1 mask_disable }; + +mov (8) slot_a_00<1>F src_sample_a_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_a_01<1>F src_sample_a_23<8,8,1>F { align1 mask_disable }; + +send (16) + data_port_msg_2_ind + null<1>UW + null + write ( + 0, /* binding table index */ + 16, /* last render target(1) + slots 15:0(0) + msg type simd16 single source(000) */ + 12, /* render target write */ + 0, /* ignore for Ivybridge */ + 1 /* header present */ + ) + mlen 10 + rlen 0 + { align1 EOT }; + +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g8a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g8a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,26 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +include(`exa_wm.g4i') +include(`exa_wm_write.g7i') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g8b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g8b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g8b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,19 @@ + { 0x00600001, 0x2e00020c, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x2e20020c, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x2e403aec, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x2e603aec, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x2e803aec, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x2ea03aec, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x2ec03aec, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x2ee03aec, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x2f003aec, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x2f203aec, 0x008d02a0, 0x00000000 }, + { 0x05800031, 0x20000a40, 0x0e000e00, 0x940b1000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g9a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g9a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,26 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +include(`exa_wm.g4i') +include(`exa_wm_write.g7i') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g9b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g9b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_write.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_write.g9b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,19 @@ + { 0x00600001, 0x2e00020c, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x2e20020c, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x2e403aec, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x2e603aec, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x2e803aec, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x2ea03aec, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x2ec03aec, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x2ee03aec, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x2f003aec, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x2f203aec, 0x008d02a0, 0x00000000 }, + { 0x05800031, 0x20000a40, 0x06000e00, 0x940b1000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_xy.g4b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_xy.g4b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_xy.g4b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_xy.g4b 2016-06-03 06:06:08.000000000 +0000 @@ -1,4 +1,4 @@ { 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 }, { 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 }, - { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 }, - { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 }, + { 0x00802040, 0x2540753d, 0x008d03c0, 0x00004020 }, + { 0x00802040, 0x2580753d, 0x008d0380, 0x00004024 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_xy.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_xy.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_xy.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_xy.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -1,4 +1,4 @@ { 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 }, { 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 }, - { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 }, - { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 }, + { 0x00802040, 0x2540753d, 0x008d03c0, 0x00004020 }, + { 0x00802040, 0x2580753d, 0x008d0380, 0x00004024 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g4a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g4a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g4a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,38 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Haihao Xiang + * + */ + +include(`exa_wm.g4i') + +/* Color Balance parameters */ +define(`skip_color_balance', `g2.2<0,1,0>uw') +define(`contrast', `g2.16<0,1,0>f') +define(`brightness', `g2.20<0,1,0>f') +define(`cos_c_s', `g2.24<0,1,0>f') +define(`sin_c_s', `g2.28<0,1,0>f') +define(`sin_c_s_t', `g2.28') + +include(`exa_wm_yuv_color_balance.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g4b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g4b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g4b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g4b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,15 @@ + { 0x01000010, 0x20002d3c, 0x00000042, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000d }, + { 0x00802040, 0x24007fbd, 0x008d01c0, 0xbd808081 }, + { 0x00802041, 0x240077bd, 0x008d0400, 0x00000050 }, + { 0x00802040, 0x240077bd, 0x008d0400, 0x00000054 }, + { 0x00802040, 0x21c07fbd, 0x008d0400, 0x3d808081 }, + { 0x00802040, 0x24807fbd, 0x008d0200, 0xbf008084 }, + { 0x00802040, 0x24407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00802048, 0x240077bc, 0x008d0440, 0x0000005c }, + { 0x00802048, 0x220077bd, 0x008d0480, 0x00000058 }, + { 0x00000041, 0x205c7fbd, 0x0000005c, 0xbf800000 }, + { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00802048, 0x240077bc, 0x008d0480, 0x0000005c }, + { 0x00802048, 0x224077bd, 0x008d0440, 0x00000058 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,15 @@ + { 0x01000010, 0x20002d3c, 0x00000042, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00802040, 0x24007fbd, 0x008d01c0, 0xbd808081 }, + { 0x00802041, 0x240077bd, 0x008d0400, 0x00000050 }, + { 0x00802040, 0x240077bd, 0x008d0400, 0x00000054 }, + { 0x00802040, 0x21c07fbd, 0x008d0400, 0x3d808081 }, + { 0x00802040, 0x24807fbd, 0x008d0200, 0xbf008084 }, + { 0x00802040, 0x24407fbd, 0x008d0240, 0xbf008084 }, + { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00802048, 0x240077bc, 0x008d0440, 0x0000005c }, + { 0x00802048, 0x220077bd, 0x008d0480, 0x00000058 }, + { 0x00000041, 0x205c7fbd, 0x0000005c, 0xbf800000 }, + { 0x00802001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00802048, 0x240077bc, 0x008d0480, 0x0000005c }, + { 0x00802048, 0x224077bd, 0x008d0440, 0x00000058 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g6a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g6a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g6a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,38 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Haihao Xiang + * + */ + +include(`exa_wm.g4i') + +/* Color Balance parameters */ +define(`skip_color_balance', `g6.2<0,1,0>uw') +define(`contrast', `g6.16<0,1,0>f') +define(`brightness', `g6.20<0,1,0>f') +define(`cos_c_s', `g6.24<0,1,0>f') +define(`sin_c_s', `g6.28<0,1,0>f') +define(`sin_c_s_t', `g6.28') + +include(`exa_wm_yuv_color_balance.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g6b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g6b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,15 @@ + { 0x01000010, 0x20002d3c, 0x000000c2, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00800040, 0x24007fbd, 0x008d01c0, 0xbd808081 }, + { 0x00800041, 0x240077bd, 0x008d0400, 0x000000d0 }, + { 0x00800040, 0x240077bd, 0x008d0400, 0x000000d4 }, + { 0x00800040, 0x21c07fbd, 0x008d0400, 0x3d808081 }, + { 0x00800040, 0x24807fbd, 0x008d0200, 0xbf008084 }, + { 0x00800040, 0x24407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00800048, 0x240077bc, 0x008d0440, 0x000000dc }, + { 0x00800048, 0x220077bd, 0x008d0480, 0x000000d8 }, + { 0x00000041, 0x20dc7fbd, 0x000000dc, 0xbf800000 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00800048, 0x240077bc, 0x008d0480, 0x000000dc }, + { 0x00800048, 0x224077bd, 0x008d0440, 0x000000d8 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g7a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g7a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,38 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Haihao Xiang + * + */ + +include(`exa_wm.g4i') + +/* Color Balance parameters */ +define(`skip_color_balance', `g6.2<0,1,0>uw') +define(`contrast', `g6.16<0,1,0>f') +define(`brightness', `g6.20<0,1,0>f') +define(`cos_c_s', `g6.24<0,1,0>f') +define(`sin_c_s', `g6.28<0,1,0>f') +define(`sin_c_s_t', `g6.28') + +include(`exa_wm_yuv_color_balance.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g7b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g7b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g7b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,15 @@ + { 0x01000010, 0x20002d3c, 0x000000c2, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00800040, 0x24007fbd, 0x008d01c0, 0xbd808081 }, + { 0x00800041, 0x240077bd, 0x008d0400, 0x000000d0 }, + { 0x00800040, 0x240077bd, 0x008d0400, 0x000000d4 }, + { 0x00800040, 0x21c07fbd, 0x008d0400, 0x3d808081 }, + { 0x00800040, 0x24807fbd, 0x008d0200, 0xbf008084 }, + { 0x00800040, 0x24407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00800048, 0x240077bc, 0x008d0440, 0x000000dc }, + { 0x00800048, 0x220077bd, 0x008d0480, 0x000000d8 }, + { 0x00000041, 0x20dc7fbd, 0x000000dc, 0xbf800000 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00800048, 0x240077bc, 0x008d0480, 0x000000dc }, + { 0x00800048, 0x224077bd, 0x008d0440, 0x000000d8 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g7b.haswell 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,15 @@ + { 0x01000010, 0x20002d3c, 0x000000c2, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d0 }, + { 0x00800040, 0x24007fbd, 0x008d01c0, 0xbd808081 }, + { 0x00800041, 0x240077bd, 0x008d0400, 0x000000d0 }, + { 0x00800040, 0x240077bd, 0x008d0400, 0x000000d4 }, + { 0x00800040, 0x21c07fbd, 0x008d0400, 0x3d808081 }, + { 0x00800040, 0x24807fbd, 0x008d0200, 0xbf008084 }, + { 0x00800040, 0x24407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00800048, 0x240077bc, 0x008d0440, 0x000000dc }, + { 0x00800048, 0x220077bd, 0x008d0480, 0x000000d8 }, + { 0x00000041, 0x20dc7fbd, 0x000000dc, 0xbf800000 }, + { 0x00800001, 0x240003fc, 0x00000000, 0x3f008084 }, + { 0x00800048, 0x240077bc, 0x008d0480, 0x000000dc }, + { 0x00800048, 0x224077bd, 0x008d0440, 0x000000d8 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g8a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g8a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,39 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Haihao Xiang + * Zhao Yakui + * + */ + +include(`exa_wm.g4i') + +/* Color Balance parameters */ +define(`skip_color_balance', `g6.2<0,1,0>uw') +define(`contrast', `g6.16<0,1,0>f') +define(`brightness', `g6.20<0,1,0>f') +define(`cos_c_s', `g6.24<0,1,0>f') +define(`sin_c_s', `g6.28<0,1,0>f') +define(`sin_c_s_t', `g6.28') + +include(`exa_wm_yuv_color_balance.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g8b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g8b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g8b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,15 @@ + { 0x01000010, 0x200012e0, 0x160000c2, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000d0 }, + { 0x00800040, 0x24003ae8, 0x3e8d01c0, 0xbd808081 }, + { 0x00800041, 0x24003ae8, 0x3a8d0400, 0x000000d0 }, + { 0x00800040, 0x24003ae8, 0x3a8d0400, 0x000000d4 }, + { 0x00800040, 0x21c03ae8, 0x3e8d0400, 0x3d808081 }, + { 0x00800040, 0x24803ae8, 0x3e8d0200, 0xbf008084 }, + { 0x00800040, 0x24403ae8, 0x3e8d0240, 0xbf008084 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x3f008084 }, + { 0x00800048, 0x24003ae0, 0x3a8d0440, 0x000000dc }, + { 0x00800048, 0x22003ae8, 0x3a8d0480, 0x000000d8 }, + { 0x00000041, 0x20dc3ae8, 0x3e0000dc, 0xbf800000 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x3f008084 }, + { 0x00800048, 0x24003ae0, 0x3a8d0480, 0x000000dc }, + { 0x00800048, 0x22403ae8, 0x3a8d0440, 0x000000d8 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g9a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g9a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,39 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Haihao Xiang + * Zhao Yakui + * + */ + +include(`exa_wm.g4i') + +/* Color Balance parameters */ +define(`skip_color_balance', `g6.2<0,1,0>uw') +define(`contrast', `g6.16<0,1,0>f') +define(`brightness', `g6.20<0,1,0>f') +define(`cos_c_s', `g6.24<0,1,0>f') +define(`sin_c_s', `g6.28<0,1,0>f') +define(`sin_c_s_t', `g6.28') + +include(`exa_wm_yuv_color_balance.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g9b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g9b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.g9b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,15 @@ + { 0x01000010, 0x200012e0, 0x160000c2, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000d0 }, + { 0x00800040, 0x24003ae8, 0x3e8d01c0, 0xbd808081 }, + { 0x00800041, 0x24003ae8, 0x3a8d0400, 0x000000d0 }, + { 0x00800040, 0x24003ae8, 0x3a8d0400, 0x000000d4 }, + { 0x00800040, 0x21c03ae8, 0x3e8d0400, 0x3d808081 }, + { 0x00800040, 0x24803ae8, 0x3e8d0200, 0xbf008084 }, + { 0x00800040, 0x24403ae8, 0x3e8d0240, 0xbf008084 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x3f008084 }, + { 0x00800048, 0x24003ae0, 0x3a8d0440, 0x000000dc }, + { 0x00800048, 0x22003ae8, 0x3a8d0480, 0x000000d8 }, + { 0x00000041, 0x20dc3ae8, 0x3e0000dc, 0xbf800000 }, + { 0x00800001, 0x24003ee0, 0x38000000, 0x3f008084 }, + { 0x00800048, 0x24003ae0, 0x3a8d0480, 0x000000dc }, + { 0x00800048, 0x22403ae8, 0x3a8d0440, 0x000000d8 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.gxa intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.gxa --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_color_balance.gxa 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_color_balance.gxa 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,75 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Haihao Xiang + * + */ + +define(`Cr', `src_sample_b') +define(`Cr_01', `src_sample_b_01') +define(`Cr_23', `src_sample_b_23') + +define(`Y', `src_sample_r') +define(`Y_01', `src_sample_r_01') +define(`Y_23', `src_sample_r_23') + +define(`Cb', `src_sample_g') +define(`Cb_01', `src_sample_g_01') +define(`Cb_23', `src_sample_g_23') + +define(`Crn', `color_balance_g') +define(`Crn_01', `color_balance_g_01') +define(`Crn_23', `color_balance_g_23') + +define(`Yn', `color_balance_r') +define(`Yn_01', `color_balance_r_01') +define(`Yn_23', `color_balance_r_23') + +define(`Cbn', `color_balance_b') +define(`Cbn_01', `color_balance_b_01') +define(`Cbn_23', `color_balance_b_23') + +cmp.e.f0.0 (1) null skip_color_balance 0x1uw {align1}; +(f0.0) jmpi _DONE_COLOR_BALANCE; + +/* Yout = (Yin - 16 / 255) * contrast + brightness + 16 / 255 */ +add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Yn<1>F Yn<8,8,1>F contrast { compr align1 }; +add (16) Yn<1>F Yn<8,8,1>F brightness { compr align1 }; +add (16) Y<1>F Yn<8,8,1>F 0.0627451F { compr align1 }; + +/* Uout = (Uin - 128 / 255) * cos_c_s + (Vin - 128 / 255) * sin_c_s + 128 / 255 */ +/* Vout = (Vin - 128 / 255) * cos_c_s - (Uin - 128 / 255) * sin_c_s + 128 / 255 */ +add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; +add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +mov (16) acc0<1>F 0.501961F { compr align1 }; +mac (16) acc0<1>F Crn<8,8,1>F sin_c_s { compr align1 }; +mac (16) Cb<1>F Cbn<8,8,1>F cos_c_s { compr align1 }; + +mul (1) sin_c_s_t<1>F sin_c_s -1.0F { align1}; +mov (16) acc0<1>F 0.501961F { compr align1 }; +mac (16) acc0<1>F Cbn<8,8,1>F sin_c_s { compr align1 }; +mac (16) Cr<1>F Crn<8,8,1>F cos_c_s { compr align1 }; + +_DONE_COLOR_BALANCE: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g4a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g4a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g4a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g4a 2016-06-03 06:05:58.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2006 Intel Corporation + * Copyright © 2006-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -27,72 +27,6 @@ */ include(`exa_wm.g4i') +include(`exa_yuv_gen4.g4i') +include(`exa_yuv_rgb.gxa') -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_b') -define(`Cr_01', `src_sample_b_01') -define(`Cr_23', `src_sample_b_23') - -define(`Y', `src_sample_r') -define(`Y_01', `src_sample_r_01') -define(`Y_23', `src_sample_r_23') - -define(`Cb', `src_sample_g') -define(`Cb_01', `src_sample_g_01') -define(`Cb_23', `src_sample_g_23') - -define(`Crn', `mask_sample_g') -define(`Crn_01', `mask_sample_g_01') -define(`Crn_23', `mask_sample_g_23') - -define(`Yn', `mask_sample_r') -define(`Yn_01', `mask_sample_r_01') -define(`Yn_23', `mask_sample_r_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; - - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; - - /* - * B = Cbn * 2.017 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; - - /* - * A = 1.0 - */ -//mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g4b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g4b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g4b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g4b 2016-06-03 06:06:08.000000000 +0000 @@ -1,11 +1,13 @@ - { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, - { 0x00802041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, - { 0x00802040, 0x23007fbd, 0x008d0240, 0xbf008084 }, - { 0x00802040, 0x23407fbd, 0x008d0200, 0xbf008084 }, - { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80802048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, - { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x00802048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, - { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00802040, 0x22c077bd, 0x008d01c0, 0x0000006c }, + { 0x00802040, 0x230077bd, 0x008d0200, 0x0000007c }, + { 0x00802040, 0x234077bd, 0x008d0240, 0x0000008c }, + { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000060 }, + { 0x00802048, 0x240077bc, 0x008d0300, 0x00000064 }, + { 0x80802048, 0x21c077bd, 0x008d0340, 0x00000068 }, + { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000070 }, + { 0x00802048, 0x240077bc, 0x008d0300, 0x00000074 }, + { 0x80802048, 0x220077bd, 0x008d0340, 0x00000078 }, + { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000080 }, + { 0x00802048, 0x240077bc, 0x008d0300, 0x00000084 }, + { 0x80802048, 0x224077bd, 0x008d0340, 0x00000088 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g4b.gen5 2016-06-03 06:06:08.000000000 +0000 @@ -1,11 +1,13 @@ - { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, - { 0x00802041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, - { 0x00802040, 0x23007fbd, 0x008d0240, 0xbf008084 }, - { 0x00802040, 0x23407fbd, 0x008d0200, 0xbf008084 }, - { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80802048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, - { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x00802048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, - { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00802001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00802040, 0x22c077bd, 0x008d01c0, 0x0000006c }, + { 0x00802040, 0x230077bd, 0x008d0200, 0x0000007c }, + { 0x00802040, 0x234077bd, 0x008d0240, 0x0000008c }, + { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000060 }, + { 0x00802048, 0x240077bc, 0x008d0300, 0x00000064 }, + { 0x80802048, 0x21c077bd, 0x008d0340, 0x00000068 }, + { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000070 }, + { 0x00802048, 0x240077bc, 0x008d0300, 0x00000074 }, + { 0x80802048, 0x220077bd, 0x008d0340, 0x00000078 }, + { 0x00802041, 0x240077bc, 0x008d02c0, 0x00000080 }, + { 0x00802048, 0x240077bc, 0x008d0300, 0x00000084 }, + { 0x80802048, 0x224077bd, 0x008d0340, 0x00000088 }, + { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g6a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g6a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g6a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2006 Intel Corporation + * Copyright © 2006-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -27,72 +27,5 @@ */ include(`exa_wm.g4i') - -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_b') -define(`Cr_01', `src_sample_b_01') -define(`Cr_23', `src_sample_b_23') - -define(`Y', `src_sample_r') -define(`Y_01', `src_sample_r_01') -define(`Y_23', `src_sample_r_23') - -define(`Cb', `src_sample_g') -define(`Cb_01', `src_sample_g_01') -define(`Cb_23', `src_sample_g_23') - -define(`Crn', `mask_sample_g') -define(`Crn_01', `mask_sample_g_01') -define(`Crn_23', `mask_sample_g_23') - -define(`Yn', `mask_sample_r') -define(`Yn_01', `mask_sample_r_01') -define(`Yn_23', `mask_sample_r_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; - - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; - - /* - * B = Cbn * 2.017 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; - - /* - * A = 1.0 - */ -//mov (16) src_sample_a<1>F 1.0F { compr align1 }; +include(`exa_yuv_gen6.g4i') +include(`exa_yuv_rgb.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g6b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g6b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g6b 2016-06-03 06:06:08.000000000 +0000 @@ -1,11 +1,13 @@ - { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, - { 0x00800041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, - { 0x00800040, 0x23007fbd, 0x008d0240, 0xbf008084 }, - { 0x00800040, 0x23407fbd, 0x008d0200, 0xbf008084 }, - { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80800048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, - { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x00800048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, - { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00800040, 0x22c077bd, 0x008d01c0, 0x000000ec }, + { 0x00800040, 0x230077bd, 0x008d0200, 0x000000fc }, + { 0x00800040, 0x234077bd, 0x008d0240, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d0300, 0x000000e4 }, + { 0x80800048, 0x21c077bd, 0x008d0340, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d0300, 0x000000f4 }, + { 0x80800048, 0x220077bd, 0x008d0340, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d02c0, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d0300, 0x00000104 }, + { 0x80800048, 0x224077bd, 0x008d0340, 0x00000108 }, + { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g7a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g7a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g7a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -1,5 +1,5 @@ /* - * Copyright © 2006 Intel Corporation + * Copyright © 2006-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -27,72 +27,5 @@ */ include(`exa_wm.g4i') - -define(`YCbCr_base', `src_sample_base') - -define(`Cr', `src_sample_b') -define(`Cr_01', `src_sample_b_01') -define(`Cr_23', `src_sample_b_23') - -define(`Y', `src_sample_r') -define(`Y_01', `src_sample_r_01') -define(`Y_23', `src_sample_r_23') - -define(`Cb', `src_sample_g') -define(`Cb_01', `src_sample_g_01') -define(`Cb_23', `src_sample_g_23') - -define(`Crn', `mask_sample_g') -define(`Crn_01', `mask_sample_g_01') -define(`Crn_23', `mask_sample_g_23') - -define(`Yn', `mask_sample_r') -define(`Yn_01', `mask_sample_r_01') -define(`Yn_23', `mask_sample_r_23') - -define(`Cbn', `mask_sample_b') -define(`Cbn_01', `mask_sample_b_01') -define(`Cbn_23', `mask_sample_b_23') - - /* color space conversion function: - * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) - * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) - * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) - */ - - /* Normalize Y, Cb and Cr: - * - * Yn = (Y - 16/255) * 1.164 - * Crn = Cr - 128 / 255 - * Cbn = Cb - 128 / 255 - */ -add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; -mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; - -add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; - -add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; - - /* - * R = Y + Cr * 1.596 - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; - - /* - * G = Crn * -0.813 + Cbn * -0.392 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; -mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; - - /* - * B = Cbn * 2.017 + Y - */ -mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; -mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; - - /* - * A = 1.0 - */ -//mov (16) src_sample_a<1>F 1.0F { compr align1 }; +include(`exa_yuv_gen6.g4i') +include(`exa_yuv_rgb.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g7b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g7b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g7b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g7b 2016-06-03 06:06:08.000000000 +0000 @@ -1,11 +1,13 @@ - { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbd808081 }, - { 0x00800041, 0x22c07fbd, 0x008d02c0, 0x3f94fdf4 }, - { 0x00800040, 0x23007fbd, 0x008d0240, 0xbf008084 }, - { 0x00800040, 0x23407fbd, 0x008d0200, 0xbf008084 }, - { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80800048, 0x21c07fbd, 0x008d0300, 0x3fcc49ba }, - { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x00800048, 0x24007fbc, 0x008d0300, 0xbf5020c5 }, - { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, - { 0x00800001, 0x240003bc, 0x008d02c0, 0x00000000 }, - { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00800040, 0x22c077bd, 0x008d01c0, 0x000000ec }, + { 0x00800040, 0x230077bd, 0x008d0200, 0x000000fc }, + { 0x00800040, 0x234077bd, 0x008d0240, 0x0000010c }, + { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000e0 }, + { 0x00800048, 0x240077bc, 0x008d0300, 0x000000e4 }, + { 0x80800048, 0x21c077bd, 0x008d0340, 0x000000e8 }, + { 0x00800041, 0x240077bc, 0x008d02c0, 0x000000f0 }, + { 0x00800048, 0x240077bc, 0x008d0300, 0x000000f4 }, + { 0x80800048, 0x220077bd, 0x008d0340, 0x000000f8 }, + { 0x00800041, 0x240077bc, 0x008d02c0, 0x00000100 }, + { 0x00800048, 0x240077bc, 0x008d0300, 0x00000104 }, + { 0x80800048, 0x224077bd, 0x008d0340, 0x00000108 }, + { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g8a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g8a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,32 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * Zhao Yakui + * + */ + +include(`exa_wm.g4i') +include(`exa_yuv_gen6.g4i') +include(`exa_yuv_rgb.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g8b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g8b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g8b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,13 @@ + { 0x00800040, 0x22c03ae8, 0x3a8d01c0, 0x000000ec }, + { 0x00800040, 0x23003ae8, 0x3a8d0200, 0x000000fc }, + { 0x00800040, 0x23403ae8, 0x3a8d0240, 0x0000010c }, + { 0x00800041, 0x24003ae0, 0x3a8d02c0, 0x000000e0 }, + { 0x00800048, 0x24003ae0, 0x3a8d0300, 0x000000e4 }, + { 0x80800048, 0x21c03ae8, 0x3a8d0340, 0x000000e8 }, + { 0x00800041, 0x24003ae0, 0x3a8d02c0, 0x000000f0 }, + { 0x00800048, 0x24003ae0, 0x3a8d0300, 0x000000f4 }, + { 0x80800048, 0x22003ae8, 0x3a8d0340, 0x000000f8 }, + { 0x00800041, 0x24003ae0, 0x3a8d02c0, 0x00000100 }, + { 0x00800048, 0x24003ae0, 0x3a8d0300, 0x00000104 }, + { 0x80800048, 0x22403ae8, 0x3a8d0340, 0x00000108 }, + { 0x00800001, 0x22803ee8, 0x38000000, 0x3f800000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g9a intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g9a --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,32 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard + * Eric Anholt + * Zhao Yakui + * + */ + +include(`exa_wm.g4i') +include(`exa_yuv_gen6.g4i') +include(`exa_yuv_rgb.gxa') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g9b intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g9b --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_wm_yuv_rgb.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_wm_yuv_rgb.g9b 2016-06-03 06:06:08.000000000 +0000 @@ -0,0 +1,13 @@ + { 0x00800040, 0x22c03ae8, 0x3a8d01c0, 0x000000ec }, + { 0x00800040, 0x23003ae8, 0x3a8d0200, 0x000000fc }, + { 0x00800040, 0x23403ae8, 0x3a8d0240, 0x0000010c }, + { 0x00800041, 0x24003ae0, 0x3a8d02c0, 0x000000e0 }, + { 0x00800048, 0x24003ae0, 0x3a8d0300, 0x000000e4 }, + { 0x80800048, 0x21c03ae8, 0x3a8d0340, 0x000000e8 }, + { 0x00800041, 0x24003ae0, 0x3a8d02c0, 0x000000f0 }, + { 0x00800048, 0x24003ae0, 0x3a8d0300, 0x000000f4 }, + { 0x80800048, 0x22003ae8, 0x3a8d0340, 0x000000f8 }, + { 0x00800041, 0x24003ae0, 0x3a8d02c0, 0x00000100 }, + { 0x00800048, 0x24003ae0, 0x3a8d0300, 0x00000104 }, + { 0x80800048, 0x22403ae8, 0x3a8d0340, 0x00000108 }, + { 0x00800001, 0x22803ee8, 0x38000000, 0x3f800000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_yuv_gen4.g4i intel-vaapi-driver-1.7.1/src/shaders/render/exa_yuv_gen4.g4i --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_yuv_gen4.g4i 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_yuv_gen4.g4i 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,42 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + */ + +/* YUV to RGB matrix coeff */ + +define(`coef_ry', `g3.0<0,1,0>F') +define(`coef_ru', `g3.4<0,1,0>F') +define(`coef_rv', `g3.8<0,1,0>F') +define(`coef_yd', `g3.12<0,1,0>F') + +define(`coef_gy', `g3.16<0,1,0>F') +define(`coef_gu', `g3.20<0,1,0>F') +define(`coef_gv', `g3.24<0,1,0>F') +define(`coef_ud', `g3.28<0,1,0>F') + +define(`coef_by', `g4.0<0,1,0>F') +define(`coef_bu', `g4.4<0,1,0>F') +define(`coef_bv', `g4.8<0,1,0>F') +define(`coef_vd', `g4.12<0,1,0>F') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_yuv_gen6.g4i intel-vaapi-driver-1.7.1/src/shaders/render/exa_yuv_gen6.g4i --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_yuv_gen6.g4i 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_yuv_gen6.g4i 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,42 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + */ +/* YUV to RGB matrix coeff */ + + +define(`coef_ry', `g7.0<0,1,0>F') +define(`coef_ru', `g7.4<0,1,0>F') +define(`coef_rv', `g7.8<0,1,0>F') +define(`coef_yd', `g7.12<0,1,0>F') + +define(`coef_gy', `g7.16<0,1,0>F') +define(`coef_gu', `g7.20<0,1,0>F') +define(`coef_gv', `g7.24<0,1,0>F') +define(`coef_ud', `g7.28<0,1,0>F') + +define(`coef_by', `g8.0<0,1,0>F') +define(`coef_bu', `g8.4<0,1,0>F') +define(`coef_bv', `g8.8<0,1,0>F') +define(`coef_vd', `g8.12<0,1,0>F') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/exa_yuv_rgb.gxa intel-vaapi-driver-1.7.1/src/shaders/render/exa_yuv_rgb.gxa --- intel-vaapi-driver-1.0.15/src/shaders/render/exa_yuv_rgb.gxa 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/exa_yuv_rgb.gxa 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,74 @@ +/* + * Copyright © 2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + */ + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_b') +define(`Cr_01', `src_sample_b_01') +define(`Cr_23', `src_sample_b_23') + +define(`Y', `src_sample_r') +define(`Y_01', `src_sample_r_01') +define(`Y_23', `src_sample_r_23') + +define(`Cb', `src_sample_g') +define(`Cb_01', `src_sample_g_01') +define(`Cb_23', `src_sample_g_23') + +define(`Crn', `mask_sample_b') +define(`Crn_01', `mask_sample_b_01') +define(`Crn_23', `mask_sample_b_23') + +define(`Yn', `mask_sample_r') +define(`Yn_01', `mask_sample_r_01') +define(`Yn_23', `mask_sample_r_23') + +define(`Cbn', `mask_sample_g') +define(`Cbn_01', `mask_sample_g_01') +define(`Cbn_23', `mask_sample_g_23') + +add (16) Yn<1>F Y<8,8,1>F coef_yd { compr align1 }; + +add (16) Cbn<1>F Cb<8,8,1>F coef_ud { compr align1 }; + +add (16) Crn<1>F Cr<8,8,1>F coef_vd { compr align1 }; + +mul (16) acc0<1>F Yn<8,8,1>F coef_ry { compr align1 }; +mac (16) acc0<1>F Cbn<8,8,1>F coef_ru { compr align1 }; +mac.sat (16) src_sample_r<1>F Crn<8,8,1>F coef_rv { compr align1 }; + +mul (16) acc0<1>F Yn<8,8,1>F coef_gy { compr align1 }; +mac (16) acc0<1>F Cbn<8,8,1>F coef_gu { compr align1 }; +mac.sat(16) src_sample_g<1>F Crn<8,8,1>F coef_gv { compr align1 }; + +mul (16) acc0<1>F Yn<8,8,1>F coef_by { compr align1 }; +mac (16) acc0<1>F Cbn<8,8,1>F coef_bu { compr align1 }; +mac.sat(16) src_sample_b<1>F Crn<8,8,1>F coef_bv { compr align1 }; + + /* + * A = 1.0 + */ +mov (16) src_sample_a<1>F 1.0F { compr align1 }; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/render/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/render/Makefile.am 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/Makefile.am 2016-06-03 06:05:58.000000000 +0000 @@ -1,7 +1,11 @@ INTEL_G4I = \ exa_wm.g4i \ - exa_wm_affine.g4i + exa_wm_affine.g4i \ + exa_wm_yuv_color_balance.gxa \ + exa_yuv_rgb.gxa \ + exa_yuv_gen4.g4i \ + exa_yuv_gen6.g4i INTEL_G4A = \ exa_sf.g4a \ @@ -9,6 +13,7 @@ exa_wm_src_affine.g4a \ exa_wm_src_sample_argb.g4a \ exa_wm_src_sample_planar.g4a \ + exa_wm_yuv_color_balance.g4a \ exa_wm_yuv_rgb.g4a \ exa_wm_write.g4a @@ -20,6 +25,7 @@ exa_wm_src_affine.g4b \ exa_wm_src_sample_argb.g4b \ exa_wm_src_sample_planar.g4b \ + exa_wm_yuv_color_balance.g4b \ exa_wm_yuv_rgb.g4b \ exa_wm_write.g4b @@ -29,14 +35,18 @@ exa_wm_src_affine.g4b.gen5 \ exa_wm_src_sample_argb.g4b.gen5 \ exa_wm_src_sample_planar.g4b.gen5 \ + exa_wm_yuv_color_balance.g4b.gen5 \ exa_wm_yuv_rgb.g4b.gen5 \ exa_wm_write.g4b.gen5 +INTEL_G6I = $(INTEL_G4I) + INTEL_G6A = \ exa_wm_src_affine.g6a \ exa_wm_src_sample_argb.g6a \ exa_wm_src_sample_planar.g6a \ exa_wm_write.g6a \ + exa_wm_yuv_color_balance.g6a \ exa_wm_yuv_rgb.g6a INTEL_G6S = $(INTEL_G6A:%.g6a=%.g6s) @@ -46,13 +56,18 @@ exa_wm_src_sample_argb.g6b \ exa_wm_src_sample_planar.g6b \ exa_wm_write.g6b \ + exa_wm_yuv_color_balance.g6b \ exa_wm_yuv_rgb.g6b +INTEL_G7I = $(INTEL_G4I) \ + exa_wm_write.g7i + INTEL_G7A = \ exa_wm_src_affine.g7a \ exa_wm_src_sample_argb.g7a \ exa_wm_src_sample_planar.g7a \ exa_wm_write.g7a \ + exa_wm_yuv_color_balance.g7a \ exa_wm_yuv_rgb.g7a INTEL_G7S = $(INTEL_G7A:%.g7a=%.g7s) @@ -62,24 +77,72 @@ exa_wm_src_sample_argb.g7b \ exa_wm_src_sample_planar.g7b \ exa_wm_write.g7b \ + exa_wm_yuv_color_balance.g7b \ exa_wm_yuv_rgb.g7b +# XXX: only regenerate binary for EU code containing JMPI instructions +INTEL_G7B_HASWELL = \ + exa_wm_src_sample_planar.g7b.haswell \ + exa_wm_yuv_color_balance.g7b.haswell \ + $(NULL) + +INTEL_G8A = \ + exa_wm_src_affine.g8a \ + exa_wm_src_sample_planar.g8a \ + exa_wm_src_sample_argb.g8a \ + exa_wm_yuv_color_balance.g8a \ + exa_wm_write.g8a \ + exa_wm_yuv_rgb.g8a + +INTEL_G8S = $(INTEL_G8A:%.g8a=%.g8s) + +INTEL_G8B = \ + exa_wm_src_affine.g8b \ + exa_wm_src_sample_planar.g8b \ + exa_wm_src_sample_argb.g8b \ + exa_wm_yuv_color_balance.g8b \ + exa_wm_yuv_rgb.g8b \ + exa_wm_write.g8b + +INTEL_G9A = \ + exa_wm_src_affine.g9a \ + exa_wm_src_sample_planar.g9a \ + exa_wm_src_sample_argb.g9a \ + exa_wm_yuv_color_balance.g9a \ + exa_wm_write.g9a \ + exa_wm_yuv_rgb.g9a + +INTEL_G9I = $(INTEL_G4I) + +INTEL_G9S = $(INTEL_G9A:%.g9a=%.g9s) + +INTEL_G9B = \ + exa_wm_src_affine.g9b \ + exa_wm_src_sample_planar.g9b \ + exa_wm_src_sample_argb.g9b \ + exa_wm_yuv_color_balance.g9b \ + exa_wm_yuv_rgb.g9b \ + exa_wm_write.g9b + TARGETS = if HAVE_GEN4ASM TARGETS += $(INTEL_G4B) TARGETS += $(INTEL_G4B_GEN5) TARGETS += $(INTEL_G6B) TARGETS += $(INTEL_G7B) +TARGETS += $(INTEL_G7B_HASWELL) +TARGETS += $(INTEL_G8B) +TARGETS += $(INTEL_G9B) endif all-local: $(TARGETS) -SUFFIXES = .g4a .g4s .g4b .g6a .g6s .g6b .g7a .g7s .g7b +SUFFIXES = .g4a .g4s .g4b .g4b.gen5 .g6a .g6s .g6b .g7a .g7s .g7b .g7b.haswell .g8a .g8b .g8s if HAVE_GEN4ASM $(INTEL_G4S): $(INTEL_G4A) $(INTEL_G4I) .g4a.g4s: - $(AM_V_GEN)m4 $< > $@ + $(AM_V_GEN)m4 -I$(srcdir) $< > $@ .g4s.g4b: $(AM_V_GEN)$(GEN4ASM) -o $@ $< .g4s.g4b.gen5: @@ -87,21 +150,39 @@ $(INTEL_G6S): $(INTEL_G6A) $(INTEL_G6I) .g6a.g6s: - $(AM_V_GEN)m4 $< > $@ + $(AM_V_GEN)m4 -I$(srcdir) $< > $@ .g6s.g6b: $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $< $(INTEL_G7S): $(INTEL_G7A) $(INTEL_G7I) .g7a.g7s: - $(AM_V_GEN)m4 $< > $@ + $(AM_V_GEN)m4 -I$(srcdir) $< > $@ .g7s.g7b: $(AM_V_GEN)$(GEN4ASM) -g 7 -o $@ $< +.g7s.g7b.haswell: + $(AM_V_GEN)$(GEN4ASM) -g 7.5 -o $@ $< + + +$(INTEL_G8S): $(INTEL_G8A) $(INTEL_G8I) +.g8a.g8s: + $(AM_V_GEN)m4 -I$(srcdir) $< > $@ +.g8s.g8b: + $(AM_V_GEN)$(GEN4ASM) -g 8 -o $@ $< + +$(INTEL_G9S): $(INTEL_G9A) $(INTEL_G9I) +.g9a.g9s: + $(AM_V_GEN)m4 -I$(srcdir) $< > $@ +.g9s.g9b: + $(AM_V_GEN)$(GEN4ASM) -g 9 -o $@ $< + endif CLEANFILES = \ $(INTEL_G4S) \ $(INTEL_G6S) \ $(INTEL_G7S) \ + $(INTEL_G8S) \ + $(INTEL_G9S) \ $(NULL) EXTRA_DIST = \ @@ -113,6 +194,12 @@ $(INTEL_G6B) \ $(INTEL_G7A) \ $(INTEL_G7B) \ + $(INTEL_G7B_HASWELL) \ + $(INTEL_G7I) \ + $(INTEL_G8A) \ + $(INTEL_G8B) \ + $(INTEL_G9A) \ + $(INTEL_G9B) \ $(NULL) # Extra clean files so that maintainer-clean removes *everything* diff -Nru intel-vaapi-driver-1.0.15/src/shaders/render/Makefile.in intel-vaapi-driver-1.7.1/src/shaders/render/Makefile.in --- intel-vaapi-driver-1.0.15/src/shaders/render/Makefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/render/Makefile.in 2016-06-21 02:07:53.000000000 +0000 @@ -0,0 +1,636 @@ +# Makefile.in generated by automake 1.14.1 from Makefile.am. +# @configure_input@ + +# Copyright (C) 1994-2013 Free Software Foundation, Inc. + +# This Makefile.in is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# This program 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+top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +INTEL_G4I = \ + exa_wm.g4i \ + exa_wm_affine.g4i \ + exa_wm_yuv_color_balance.gxa \ + exa_yuv_rgb.gxa \ + exa_yuv_gen4.g4i \ + exa_yuv_gen6.g4i + +INTEL_G4A = \ + exa_sf.g4a \ + exa_wm_xy.g4a \ + exa_wm_src_affine.g4a \ + exa_wm_src_sample_argb.g4a \ + exa_wm_src_sample_planar.g4a \ + exa_wm_yuv_color_balance.g4a \ + exa_wm_yuv_rgb.g4a \ + exa_wm_write.g4a + +INTEL_G4S = $(INTEL_G4A:%.g4a=%.g4s) +INTEL_G4B = \ + exa_sf.g4b \ + exa_wm_xy.g4b \ + exa_wm_src_affine.g4b \ + exa_wm_src_sample_argb.g4b \ + exa_wm_src_sample_planar.g4b \ + exa_wm_yuv_color_balance.g4b \ + exa_wm_yuv_rgb.g4b \ + exa_wm_write.g4b + +INTEL_G4B_GEN5 = \ + exa_sf.g4b.gen5 \ + exa_wm_xy.g4b.gen5 \ + exa_wm_src_affine.g4b.gen5 \ + exa_wm_src_sample_argb.g4b.gen5 \ + exa_wm_src_sample_planar.g4b.gen5 \ + exa_wm_yuv_color_balance.g4b.gen5 \ + exa_wm_yuv_rgb.g4b.gen5 \ + exa_wm_write.g4b.gen5 + +INTEL_G6I = $(INTEL_G4I) +INTEL_G6A = \ + exa_wm_src_affine.g6a \ + exa_wm_src_sample_argb.g6a \ + exa_wm_src_sample_planar.g6a \ + exa_wm_write.g6a \ + exa_wm_yuv_color_balance.g6a \ + exa_wm_yuv_rgb.g6a + +INTEL_G6S = $(INTEL_G6A:%.g6a=%.g6s) +INTEL_G6B = \ + exa_wm_src_affine.g6b \ + exa_wm_src_sample_argb.g6b \ + exa_wm_src_sample_planar.g6b \ + exa_wm_write.g6b \ + exa_wm_yuv_color_balance.g6b \ + exa_wm_yuv_rgb.g6b + +INTEL_G7I = $(INTEL_G4I) \ + exa_wm_write.g7i + +INTEL_G7A = \ + exa_wm_src_affine.g7a \ + exa_wm_src_sample_argb.g7a \ + exa_wm_src_sample_planar.g7a \ + exa_wm_write.g7a \ + exa_wm_yuv_color_balance.g7a \ + exa_wm_yuv_rgb.g7a + +INTEL_G7S = $(INTEL_G7A:%.g7a=%.g7s) +INTEL_G7B = \ + exa_wm_src_affine.g7b \ + exa_wm_src_sample_argb.g7b \ + exa_wm_src_sample_planar.g7b \ + exa_wm_write.g7b \ + exa_wm_yuv_color_balance.g7b \ + exa_wm_yuv_rgb.g7b + + +# XXX: only regenerate binary for EU code containing JMPI instructions +INTEL_G7B_HASWELL = \ + exa_wm_src_sample_planar.g7b.haswell \ + exa_wm_yuv_color_balance.g7b.haswell \ + $(NULL) + +INTEL_G8A = \ + exa_wm_src_affine.g8a \ + exa_wm_src_sample_planar.g8a \ + exa_wm_src_sample_argb.g8a \ + exa_wm_yuv_color_balance.g8a \ + exa_wm_write.g8a \ + exa_wm_yuv_rgb.g8a + +INTEL_G8S = $(INTEL_G8A:%.g8a=%.g8s) +INTEL_G8B = \ + exa_wm_src_affine.g8b \ + exa_wm_src_sample_planar.g8b \ + exa_wm_src_sample_argb.g8b \ + exa_wm_yuv_color_balance.g8b \ + exa_wm_yuv_rgb.g8b \ + exa_wm_write.g8b + +INTEL_G9A = \ + exa_wm_src_affine.g9a \ + exa_wm_src_sample_planar.g9a \ + exa_wm_src_sample_argb.g9a \ + exa_wm_yuv_color_balance.g9a \ + exa_wm_write.g9a \ + exa_wm_yuv_rgb.g9a + +INTEL_G9I = $(INTEL_G4I) +INTEL_G9S = $(INTEL_G9A:%.g9a=%.g9s) +INTEL_G9B = \ + exa_wm_src_affine.g9b \ + exa_wm_src_sample_planar.g9b \ + exa_wm_src_sample_argb.g9b \ + exa_wm_yuv_color_balance.g9b \ + exa_wm_yuv_rgb.g9b \ + exa_wm_write.g9b + +TARGETS = $(am__append_1) +SUFFIXES = .g4a .g4s .g4b .g4b.gen5 .g6a .g6s .g6b .g7a .g7s .g7b .g7b.haswell .g8a .g8b .g8s +CLEANFILES = \ + $(INTEL_G4S) \ + $(INTEL_G6S) \ + $(INTEL_G7S) \ + $(INTEL_G8S) \ + $(INTEL_G9S) \ + $(NULL) + +EXTRA_DIST = \ + $(INTEL_G4A) \ + $(INTEL_G4B) \ + $(INTEL_G4B_GEN5) \ + $(INTEL_G4I) \ + $(INTEL_G6A) \ + $(INTEL_G6B) \ + $(INTEL_G7A) \ + $(INTEL_G7B) \ + $(INTEL_G7B_HASWELL) \ + $(INTEL_G7I) \ + $(INTEL_G8A) \ + $(INTEL_G8B) \ + $(INTEL_G9A) \ + $(INTEL_G9B) \ + $(NULL) + + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g4a .g4s .g4b .g4b.gen5 .g6a .g6s .g6b .g7a .g7s .g7b .g7b.haswell .g8a .g8b .g8s .g9a .g9b .g9s +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/render/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/shaders/render/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs +tags TAGS: + +ctags CTAGS: + +cscope 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$(AM_V_GEN)m4 -I$(srcdir) $< > $@ +@HAVE_GEN4ASM_TRUE@.g8s.g8b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 8 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_G9S): $(INTEL_G9A) $(INTEL_G9I) +@HAVE_GEN4ASM_TRUE@.g9a.g9s: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)m4 -I$(srcdir) $< > $@ +@HAVE_GEN4ASM_TRUE@.g9s.g9b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 9 -o $@ $< + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/end_thread.asm intel-vaapi-driver-1.7.1/src/shaders/utils/end_thread.asm --- intel-vaapi-driver-1.0.15/src/shaders/utils/end_thread.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/end_thread.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,29 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +__EXIT: + mov (8) msg_reg0<1>:ud r0<8,8,1>:ud {align1} ; + send (16) msg_ind acc0<1>ud null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT} ; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/utils/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/utils/Makefile.am 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/Makefile.am 2016-06-21 01:35:12.000000000 +0000 @@ -0,0 +1,100 @@ +MFC_CORE = \ + end_thread.asm \ + mfc_batchbuffer_head.asm \ + mfc_batchbuffer_tail.asm +MFC_CORE_AVC = \ + mfc_batchbuffer_avc_intra.asm \ + mfc_batchbuffer_avc_inter.asm + +MFC_CORE_HSW = \ + mfc_batchbuffer_hsw.asm + +INTEL_G6B = mfc_batchbuffer_avc_intra.g6b mfc_batchbuffer_avc_inter.g6b +INTEL_G6A = mfc_batchbuffer_avc_intra.g6a mfc_batchbuffer_avc_inter.g6a +INTEL_GEN6_INC = mfc_batchbuffer.inc +INTEL_GEN6_ASM = $(INTEL_G6A:%.g6a=%.gen6.asm) + +INTEL_G7B = mfc_batchbuffer_avc_intra.g7b mfc_batchbuffer_avc_inter.g7b +INTEL_G7A = mfc_batchbuffer_avc_intra.g7a mfc_batchbuffer_avc_inter.g7a +INTEL_GEN7_INC = mfc_batchbuffer.inc +INTEL_GEN7_ASM = $(INTEL_G7A:%.g7a=%.gen7.asm) + +INTEL_G75B = mfc_batchbuffer_hsw.g75b +INTEL_G75A = mfc_batchbuffer_hsw.g75a +INTEL_GEN75_INC = mfc_batchbuffer_hsw.inc +INTEL_GEN75_ASM = $(INTEL_G75A:%.g75a=%.gen75.asm) + +INTEL_G9B = mfc_batchbuffer_avc_intra.g9b mfc_batchbuffer_avc_inter.g9b +INTEL_G9A = mfc_batchbuffer_avc_intra.g9a mfc_batchbuffer_avc_inter.g9a +INTEL_GEN9_INC = mfc_batchbuffer.inc +INTEL_GEN9_ASM = $(INTEL_G9A:%.g9a=%.gen9.asm) + +TARGETS = +if HAVE_GEN4ASM +TARGETS += $(INTEL_G6B) +TARGETS += $(INTEL_G7B) +TARGETS += $(INTEL_G75B) +TARGETS += $(INTEL_G9B) +endif + +all-local: $(TARGETS) + +SUFFIXES = .g6a .g6b .g7a .g7b .gen6.asm .gen7.asm .g75a .g75b .gen75.asm .g9a .g9b .gen9.asm + +if HAVE_GEN4ASM +$(INTEL_GEN6_ASM): $(MFC_CORE) $(MFC_CORE_AVC) $(INTEL_GEN6_INC) +.g6a.gen6.asm: + $(AM_V_GEN)cpp -P -DDEV_SNB $< > _mfc0.$@ && \ + m4 _mfc0.$@ > $@ && \ + rm _mfc0.$@ +.gen6.asm.g6b: + $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $< + +$(INTEL_GEN7_ASM): $(MFC_CORE) $(MFC_CORE_AVC) $(INTEL_GEN7_INC) +.g7a.gen7.asm: + $(AM_V_GEN)cpp -P -DDEV_IVB $< > _mfc0.$@ && \ + m4 _mfc0.$@ > $@ && \ + rm _mfc0.$@ +.gen7.asm.g7b: + $(AM_V_GEN)$(GEN4ASM) -g 7 -o $@ $< + +$(INTEL_GEN75_ASM): $(MFC_CORE_HSW) $(INTEL_GEN75_INC) +.g75a.gen75.asm: + $(AM_V_GEN)cpp -P $< > _mfc0.$@ && \ + m4 _mfc0.$@ > $@ && \ + rm _mfc0.$@ +.gen75.asm.g75b: + $(AM_V_GEN)$(GEN4ASM) -g 7.5 -o $@ $< + +$(INTEL_GEN9_ASM): $(MFC_CORE) $(MFC_CORE_AVC) $(INTEL_GEN9_INC) +.g9a.gen9.asm: + $(AM_V_GEN)cpp -P -DDEV_IVB $< > _mfc0.$@ && \ + m4 _mfc0.$@ > $@ && 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$(INTEL_G7A:%.g7a=%.gen7.asm) +INTEL_G75B = mfc_batchbuffer_hsw.g75b +INTEL_G75A = mfc_batchbuffer_hsw.g75a +INTEL_GEN75_INC = mfc_batchbuffer_hsw.inc +INTEL_GEN75_ASM = $(INTEL_G75A:%.g75a=%.gen75.asm) +INTEL_G9B = mfc_batchbuffer_avc_intra.g9b mfc_batchbuffer_avc_inter.g9b +INTEL_G9A = mfc_batchbuffer_avc_intra.g9a mfc_batchbuffer_avc_inter.g9a +INTEL_GEN9_INC = mfc_batchbuffer.inc +INTEL_GEN9_ASM = $(INTEL_G9A:%.g9a=%.gen9.asm) +TARGETS = $(am__append_1) +SUFFIXES = .g6a .g6b .g7a .g7b .gen6.asm .gen7.asm .g75a .g75b .gen75.asm .g9a .g9b .gen9.asm +CLEANFILES = $(INTEL_GEN6_ASM) $(INTEL_GEN7_ASM) $(INTEL_GEN75_ASM) $(INTEL_GEN9_ASM) +EXTRA_DIST = \ + $(INTEL_G6A) \ + $(INTEL_G6B) \ + $(INTEL_G7A) \ + $(INTEL_G7B) \ + $(INTEL_G75A) \ + $(INTEL_G75B) \ + $(INTEL_GEN6_INC) \ + $(INTEL_GEN7_INC) \ + $(INTEL_GEN75_INC) \ + $(INTEL_G9A) \ + $(INTEL_G9B) \ + $(INTEL_GEN9_INC) \ + $(MFC_CORE) \ + $(MFC_CORE_AVC) \ + $(MFC_CORE_HSW) \ + $(NULL) + + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g6a .g6b .g7a .g7b .gen6.asm .gen7.asm .g75a .g75b .gen75.asm .g9a .g9b .gen9.asm +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/utils/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/shaders/utils/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs +tags TAGS: + +ctags CTAGS: + +cscope cscopelist: + + +distdir: $(DISTFILES) + @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + list='$(DISTFILES)'; \ + dist_files=`for file in $$list; do echo $$file; done | \ + sed -e "s|^$$srcdirstrip/||;t" \ + -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ + case $$dist_files in \ + */*) $(MKDIR_P) `echo "$$dist_files" | \ + sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ + sort -u` ;; \ + esac; \ + for file in $$dist_files; do \ + if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ + if test -d $$d/$$file; then \ + dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ + if test -d "$(distdir)/$$file"; then \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ + cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ + else \ + test -f "$(distdir)/$$file" \ + || cp -p $$d/$$file "$(distdir)/$$file" \ + || exit 1; \ + fi; \ + done +check-am: all-am +check: check-am +all-am: Makefile all-local +installdirs: +install: install-am +install-exec: install-exec-am +install-data: install-data-am +uninstall: uninstall-am + +install-am: all-am + @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am + +installcheck: installcheck-am +install-strip: + if test -z '$(STRIP)'; then \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + install; \ + else \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \ + fi +mostlyclean-generic: + +clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) + +distclean-generic: + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + +maintainer-clean-generic: + @echo "This command is intended for maintainers to use" + @echo "it deletes files that may require special tools to rebuild." + -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) +clean: clean-am + +clean-am: clean-generic clean-libtool mostlyclean-am + +distclean: distclean-am + -rm -f Makefile +distclean-am: clean-am distclean-generic + +dvi: dvi-am + +dvi-am: + +html: html-am + +html-am: + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-dvi-am: + +install-exec-am: + +install-html: install-html-am + +install-html-am: + +install-info: install-info-am + +install-info-am: + +install-man: + +install-pdf: install-pdf-am + +install-pdf-am: + +install-ps: install-ps-am + +install-ps-am: + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-generic mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: all all-am all-local check check-am clean clean-generic \ + clean-libtool cscopelist-am ctags-am distclean \ + distclean-generic distclean-libtool distdir dvi dvi-am html \ + html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-pdf install-pdf-am \ + install-ps install-ps-am install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-generic \ + mostlyclean-libtool pdf pdf-am ps ps-am tags-am uninstall \ + uninstall-am + + +all-local: $(TARGETS) + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN6_ASM): $(MFC_CORE) $(MFC_CORE_AVC) $(INTEL_GEN6_INC) +@HAVE_GEN4ASM_TRUE@.g6a.gen6.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P -DDEV_SNB $< > _mfc0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _mfc0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _mfc0.$@ +@HAVE_GEN4ASM_TRUE@.gen6.asm.g6b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN7_ASM): $(MFC_CORE) $(MFC_CORE_AVC) $(INTEL_GEN7_INC) +@HAVE_GEN4ASM_TRUE@.g7a.gen7.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P -DDEV_IVB $< > _mfc0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _mfc0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _mfc0.$@ +@HAVE_GEN4ASM_TRUE@.gen7.asm.g7b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 7 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN75_ASM): $(MFC_CORE_HSW) $(INTEL_GEN75_INC) +@HAVE_GEN4ASM_TRUE@.g75a.gen75.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P $< > _mfc0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _mfc0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _mfc0.$@ +@HAVE_GEN4ASM_TRUE@.gen75.asm.g75b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 7.5 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN9_ASM): $(MFC_CORE) $(MFC_CORE_AVC) $(INTEL_GEN9_INC) +@HAVE_GEN4ASM_TRUE@.g9a.gen9.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P -DDEV_IVB $< > _mfc0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _mfc0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _mfc0.$@ +@HAVE_GEN4ASM_TRUE@.gen9.asm.g9b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 9 -o $@ $< + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.asm intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.asm --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,178 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +__PAK_OBJECT: + mul (1) tmp_offset.0<1>:ud width_in_mb<0,1,0>:uw mb_y<0,1,0>:ub {align1}; + add (1) tmp_offset.0<1>:ud tmp_offset.0<0,1,0>:ud mb_x<0,1,0>:ub {align1}; + /* + * The layout of VME output + * ++++++++++++++++++++++++++++++++++++++++++++++ + * | MV(128bytes) | other info (32bytes) | + * ++++++++++++++++++++++++++++++++++++++++++++++ + */ + mul (1) tmp_vme_output.8<1>:ud tmp_offset.0<0,1,0>:ud INTER_VME_OUTPUT_IN_OWS:ud {align1} ; /* point to output buffer */ + add (1) tmp_vme_output.8<1>:ud tmp_vme_output.8<0,1,0>:ud INTER_VME_OUTPUT_MV_IN_OWS:uw {align1}; /* point to other info */ + +__PAK_OBJECT_LOOP: + /* + * Read other info + */ + mov (8) msg_reg0.0<1>:ud tmp_vme_output<8,8,1>:ud {align1} ; + +send (16) + msg_ind + ob_read_wb + null + data_port( + OB_CACHE_TYPE, + OB_READ, + OB_CONTROL_2, + BIND_IDX_VME_OUTPUT, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 1 + rlen ob_read_wb_len_vme_inter + {align1}; + + + /* + * Fill the command + */ + mov (16) pak_object_ud<1>:ud 0x0:ud {align1} ; + + and.z.f0.1 (1) null<1>:uw flags<0,1,0>:uw FLAG_MASK_LAST_OBJECT {align1}; + + and.z.f0.0 (1) null<1>:ud ob_read_wb0.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; + + (-f0.0)jmpi (1) __FILL_INTRA_PAK_COMMAND ; + +__FILL_INTER_PAK_COMMAND: + /* DW0 */ + mov (1) pak_object0_ud<1>:ud MFC_AVC_PAK_OBJECT_INTER_DW0 ; + + /* DW2 */ + mul (1) pak_object2_ud<1>:ud tmp_offset.0<0,1,0>:ud INTER_VME_OUTPUT_IN_BYTES:ud {align1} ; + + /* DW5 */ + mov (1) pak_object5_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW5 ; + + /* DW1 must be 32 for 8 MVs and 128 for 32 MVs !!! */ + mov (1) pak_object1_ud<1>:ud ob_read_wb0.8<0,1,0>:ud {align1} ; + + /* DW3 */ + mov (1) pak_object3_ud<1>:ud ob_read_wb0.0<0,1,0>:ud {align1} ; + + /* DW4 */ + add (1) pak_object4_ud<1>:ud mb_xy<0,1,0>:uw MFC_AVC_PAK_OBJECT_INTER_DW4 {align1} ; + add (1) mb_x<1>:ub mb_x<0,1,0>:ub 1:uw {align1}; + cmp.e.f0.0 (1) null<1>:uw width_in_mb<0,1,0>:uw mb_x<0,1,0>:ub {align1}; + (f0.0)mov (1) mb_x<1>:ub 0:uw {align1} ; + (f0.0)add (1) mb_y<1>:ub mb_y<0,1,0>:ub 1:uw {align1} ; + + /* DW6 */ + mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; + (-f0.1)mov (1) pak_object6_ud<1>:ud MFC_AVC_PAK_OBJECT_INTER_DW6 {align1} ; + cmp.e.f0.0 (1) null<1>:uw total_mbs<0,1,0>:uw 1:uw {align1}; + (-f0.0)mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; + add (1) pak_object6_ud<1>:ud pak_object6_ud<0,1,0>:ud qp<0,1,0>:ub {align1} ; + + /* DW7 */ + mov (1) pak_object7_ud<1>:ud ob_read_wb0.4<0,1,0>:ud {align1} ; + + /* DW8 */ + mov (1) pak_object8_ud<1>:ud ref_idx0<0,1,0>:ud {align1} ; + + /* DW9 */ + mov (1) pak_object9_ud<1>:ud ref_idx1<0,1,0>:ud {align1} ; + + jmpi (1) __OUTPUT_PAK_COMMAND ; + +__FILL_INTRA_PAK_COMMAND: + /* DW0 */ + mov (1) pak_object0_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW0 ; + + /* DW5 */ + mov (1) pak_object5_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW5 ; + + /* DW4 */ + add (1) pak_object4_ud<1>:ud mb_xy<0,1,0>:uw MFC_AVC_PAK_OBJECT_INTRA_DW4 {align1} ; + add (1) mb_x<1>:ub mb_x<0,1,0>:ub 1:uw {align1}; + cmp.e.f0.0 (1) null<1>:uw width_in_mb<0,1,0>:uw mb_x<0,1,0>:ub {align1}; + (f0.0)mov (1) mb_x<1>:ub 0:uw {align1} ; + (f0.0)add (1) mb_y<1>:ub mb_y<0,1,0>:ub 1:uw {align1} ; + + /* DW6 */ + mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; + (-f0.1)mov (1) pak_object6_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW6 {align1} ; + cmp.e.f0.0 (1) null<1>:uw total_mbs<0,1,0>:uw 1:uw {align1}; + (-f0.0)mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; + add (1) pak_object6_ud<1>:ud pak_object6_ud<0,1,0>:ud qp<0,1,0>:ub {align1} ; + + /* DW3 */ + and (1) pak_object3_ud<1>:ud ob_read_wb0.0<0,1,0>:ud 0xFFFF {align1} ; + add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud MFC_AVC_PAK_OBJECT_INTRA_DW3 {align1} ; + + /* DW7 */ + mov (1) pak_object7_ud<1>:ud ob_read_wb0.4<0,1,0>:ud {align1} ; + + /* DW8 */ + mov (1) pak_object8_ud<1>:ud ob_read_wb0.8<0,1,0>:ud {align1} ; + + /* DW9 */ + and (1) pak_object9_ud<1>:ud ob_read_wb0.12<0,1,0>:ud 0xFC:ud {align1} ; + +__OUTPUT_PAK_COMMAND: + mov (8) msg_reg0.0<1>:ud tmp_mfc_batchbuffer<8,8,1>:ud {align1} ; + mov (8) msg_reg1.0<1>:ud pak_object_ud<8,8,1>:ud {align1} ; + mov (8) msg_reg2.0<1>:ud pak_object8_ud<8,8,1>:ud {align1} ; + + /* point to the next other info block */ + add (1) tmp_vme_output.8<1>:ud tmp_vme_output.8<0,1,0>:ud INTER_VME_OUTPUT_IN_OWS:ud {align1} ; + +send (16) + msg_ind + ob_write_wb + null + data_port( + OB_CACHE_TYPE, + OB_WRITE, + OB_CONTROL_3, + BIND_IDX_MFC_BATCHBUFFER, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 3 + rlen ob_write_wb_length + {align1}; + + /* the new offset */ + add (1) tmp_mfc_batchbuffer.8<1>:ud tmp_mfc_batchbuffer.8<0,1,0>:ud 4:ud {align1} ; + add (1) tmp_offset.0<1>:ud tmp_offset.0<0,1,0>:ud 1:ud {align1}; + + add.z.f0.0 (1) total_mbs<1>:w total_mbs<0,1,0>:w -1:w {align1}; + (-f0.0)jmpi (1) __PAK_OBJECT_LOOP ; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g6a intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g6a --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g6a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,32 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#include "mfc_batchbuffer.inc" +#include "mfc_batchbuffer_head.asm" +#include "mfc_batchbuffer_avc_inter.asm" +#include "mfc_batchbuffer_tail.asm" +#include "end_thread.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g6b intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g6b --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g6b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,90 @@ + { 0x00800001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21340231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21280021, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x21540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21480021, 0x000000a4, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00600001, 0x20000022, 0x008d0120, 0x00000000 }, + { 0x05800031, 0x22001cc9, 0x00000000, 0x021a0001 }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0200, 0x00000000 }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x041b0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20aa3dad, 0x000000aa, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x00000041, 0x21e04521, 0x000000b4, 0x000000b1 }, + { 0x00000040, 0x21e04421, 0x000001e0, 0x000000b0 }, + { 0x00000041, 0x21080c21, 0x000001e0, 0x0000000a }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00080008 }, + { 0x00600001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x05800031, 0x22001cc9, 0x00000000, 0x021a0200 }, + { 0x00800001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x020000ac, 0x00020002 }, + { 0x01000005, 0x20000c20, 0x00000200, 0x00002000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x23400061, 0x00000000, 0x71490009 }, + { 0x00000041, 0x23480c21, 0x000001e0, 0x000000a0 }, + { 0x00000001, 0x23540061, 0x00000000, 0x000f000f }, + { 0x00000001, 0x23440021, 0x00000208, 0x00000000 }, + { 0x00000001, 0x234c0021, 0x00000200, 0x00000000 }, + { 0x00000040, 0x23500d21, 0x000000b0, 0xffff0000 }, + { 0x00000040, 0x20b02e31, 0x000000b0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000b4, 0x000000b0 }, + { 0x00010001, 0x20b00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20b12e31, 0x000000b1, 0x00010001 }, + { 0x00000001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580061, 0x02000000, 0x04000000 }, + { 0x01000010, 0x20002d28, 0x000000ae, 0x00010001 }, + { 0x00110001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23584421, 0x00000358, 0x000000b6 }, + { 0x00000001, 0x235c0021, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600021, 0x000000b8, 0x00000000 }, + { 0x00000001, 0x23640021, 0x000000bc, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00000001, 0x23400061, 0x00000000, 0x71490009 }, + { 0x00000001, 0x23540061, 0x00000000, 0x000f000f }, + { 0x00000040, 0x23500d21, 0x000000b0, 0xffff0000 }, + { 0x00000040, 0x20b02e31, 0x000000b0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000b4, 0x000000b0 }, + { 0x00010001, 0x20b00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20b12e31, 0x000000b1, 0x00010001 }, + { 0x00000001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580061, 0x02000000, 0x04000000 }, + { 0x01000010, 0x20002d28, 0x000000ae, 0x00010001 }, + { 0x00110001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23584421, 0x00000358, 0x000000b6 }, + { 0x00000005, 0x234c1c21, 0x00000200, 0x0000ffff }, + { 0x00000040, 0x234c0c21, 0x0000034c, 0x000e0000 }, + { 0x00000001, 0x235c0021, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600021, 0x00000208, 0x00000000 }, + { 0x00000005, 0x23640c21, 0x0000020c, 0x000000fc }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0340, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x21080c21, 0x00000108, 0x0000000a }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x061b0302 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000004 }, + { 0x00000040, 0x21e00c21, 0x000001e0, 0x00000001 }, + { 0x01000040, 0x20ae3dad, 0x000000ae, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffff9a }, + { 0x00010020, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00600001, 0x20000022, 0x008d0120, 0x00000000 }, + { 0x05800031, 0x22001cc9, 0x00000000, 0x021a0001 }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0200, 0x00000000 }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x041b0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20a83dad, 0x000000a8, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00400001, 0x20200062, 0x00000000, 0x00000000 }, + { 0x00000001, 0x20240062, 0x00000000, 0x05000000 }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x041b0002 }, + { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001cc0, 0x00000000, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g7a intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g7a --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,32 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#include "mfc_batchbuffer.inc" +#include "mfc_batchbuffer_head.asm" +#include "mfc_batchbuffer_avc_inter.asm" +#include "mfc_batchbuffer_tail.asm" +#include "end_thread.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g7b intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g7b --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g7b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,90 @@ + { 0x00800001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21340231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21280021, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x21540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21480021, 0x000000a4, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00600001, 0x28000021, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22001ca9, 0x00000800, 0x02180001 }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20aa3dad, 0x000000aa, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x00000041, 0x21e04521, 0x000000b4, 0x000000b1 }, + { 0x00000040, 0x21e04421, 0x000001e0, 0x000000b0 }, + { 0x00000041, 0x21080c21, 0x000001e0, 0x0000000a }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00080008 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x0a800031, 0x22001ca9, 0x00000800, 0x02180200 }, + { 0x00800001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x020000ac, 0x00020002 }, + { 0x01000005, 0x20000c20, 0x00000200, 0x00002000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x23400061, 0x00000000, 0x71490009 }, + { 0x00000041, 0x23480c21, 0x000001e0, 0x000000a0 }, + { 0x00000001, 0x23540061, 0x00000000, 0x000f000f }, + { 0x00000001, 0x23440021, 0x00000208, 0x00000000 }, + { 0x00000001, 0x234c0021, 0x00000200, 0x00000000 }, + { 0x00000040, 0x23500d21, 0x000000b0, 0xffff0000 }, + { 0x00000040, 0x20b02e31, 0x000000b0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000b4, 0x000000b0 }, + { 0x00010001, 0x20b00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20b12e31, 0x000000b1, 0x00010001 }, + { 0x00000001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580061, 0x02000000, 0x04000000 }, + { 0x01000010, 0x20002d28, 0x000000ae, 0x00010001 }, + { 0x00110001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23584421, 0x00000358, 0x000000b6 }, + { 0x00000001, 0x235c0021, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600021, 0x000000b8, 0x00000000 }, + { 0x00000001, 0x23640021, 0x000000bc, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00000001, 0x23400061, 0x00000000, 0x71490009 }, + { 0x00000001, 0x23540061, 0x00000000, 0x000f000f }, + { 0x00000040, 0x23500d21, 0x000000b0, 0xffff0000 }, + { 0x00000040, 0x20b02e31, 0x000000b0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000b4, 0x000000b0 }, + { 0x00010001, 0x20b00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20b12e31, 0x000000b1, 0x00010001 }, + { 0x00000001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580061, 0x02000000, 0x04000000 }, + { 0x01000010, 0x20002d28, 0x000000ae, 0x00010001 }, + { 0x00110001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23584421, 0x00000358, 0x000000b6 }, + { 0x00000005, 0x234c1c21, 0x00000200, 0x0000ffff }, + { 0x00000040, 0x234c0c21, 0x0000034c, 0x000e0000 }, + { 0x00000001, 0x235c0021, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600021, 0x00000208, 0x00000000 }, + { 0x00000005, 0x23640c21, 0x0000020c, 0x000000fc }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0340, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x21080c21, 0x00000108, 0x0000000a }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x060a0302 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000004 }, + { 0x00000040, 0x21e00c21, 0x000001e0, 0x00000001 }, + { 0x01000040, 0x20ae3dad, 0x000000ae, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffff9a }, + { 0x00010020, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00600001, 0x28000021, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22001ca9, 0x00000800, 0x02180001 }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20a83dad, 0x000000a8, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00400001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28240061, 0x00000000, 0x05000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0002 }, + { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca0, 0x00000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g9a intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g9a --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,33 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * Li Zhong + */ + +#include "mfc_batchbuffer.inc" +#include "mfc_batchbuffer_head.asm" +#include "mfc_batchbuffer_avc_inter.asm" +#include "mfc_batchbuffer_tail.asm" +#include "end_thread.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g9b intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g9b --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_inter.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_inter.g9b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,90 @@ + { 0x00800001, 0x21000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21342288, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21280208, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x21542288, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21480208, 0x000000a4, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000ac, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000090 }, + { 0x00600001, 0x28000208, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22000a48, 0x06000800, 0x02180001 }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0002 }, + { 0x00000040, 0x21280208, 0x06000128, 0x00000001 }, + { 0x00000040, 0x21480208, 0x06000148, 0x00000001 }, + { 0x01000040, 0x20aa1a68, 0x1e0000aa, 0xffffffff }, + { 0x00110020, 0x34000000, 0x0e001400, 0xffffff70 }, + { 0x00000041, 0x21e01208, 0x220000b4, 0x000000b1 }, + { 0x00000040, 0x21e00208, 0x220001e0, 0x000000b0 }, + { 0x00000041, 0x21080208, 0x060001e0, 0x0000000a }, + { 0x00000040, 0x21080208, 0x16000108, 0x00080008 }, + { 0x00600001, 0x28000208, 0x008d0100, 0x00000000 }, + { 0x0a800031, 0x22000a48, 0x06000800, 0x02180200 }, + { 0x00800001, 0x23400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001241, 0x160000ac, 0x00020002 }, + { 0x01000005, 0x20000200, 0x06000200, 0x00002000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000130 }, + { 0x00000001, 0x23400608, 0x00000000, 0x71490009 }, + { 0x00000041, 0x23480208, 0x060001e0, 0x000000a0 }, + { 0x00000001, 0x23540608, 0x00000000, 0x000f000f }, + { 0x00000001, 0x23440208, 0x00000208, 0x00000000 }, + { 0x00000001, 0x234c0208, 0x00000200, 0x00000000 }, + { 0x00000040, 0x23501208, 0x060000b0, 0xffff0000 }, + { 0x00000040, 0x20b02288, 0x160000b0, 0x00010001 }, + { 0x01000010, 0x20001240, 0x220000b4, 0x000000b0 }, + { 0x00010001, 0x20b01688, 0x10000000, 0x00000000 }, + { 0x00010040, 0x20b12288, 0x160000b1, 0x00010001 }, + { 0x00000001, 0x23580608, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580609, 0x00000000, 0x04000000 }, + { 0x01000010, 0x20001240, 0x160000ae, 0x00010001 }, + { 0x00110001, 0x23580608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23580208, 0x22000358, 0x000000b6 }, + { 0x00000001, 0x235c0208, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600208, 0x000000b8, 0x00000000 }, + { 0x00000001, 0x23640208, 0x000000bc, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000110 }, + { 0x00000001, 0x23400608, 0x00000000, 0x71490009 }, + { 0x00000001, 0x23540608, 0x00000000, 0x000f000f }, + { 0x00000040, 0x23501208, 0x060000b0, 0xffff0000 }, + { 0x00000040, 0x20b02288, 0x160000b0, 0x00010001 }, + { 0x01000010, 0x20001240, 0x220000b4, 0x000000b0 }, + { 0x00010001, 0x20b01688, 0x10000000, 0x00000000 }, + { 0x00010040, 0x20b12288, 0x160000b1, 0x00010001 }, + { 0x00000001, 0x23580608, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580609, 0x00000000, 0x04000000 }, + { 0x01000010, 0x20001240, 0x160000ae, 0x00010001 }, + { 0x00110001, 0x23580608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23580208, 0x22000358, 0x000000b6 }, + { 0x00000005, 0x234c0208, 0x0e000200, 0x0000ffff }, + { 0x00000040, 0x234c0208, 0x0600034c, 0x000e0000 }, + { 0x00000001, 0x235c0208, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600208, 0x00000208, 0x00000000 }, + { 0x00000005, 0x23640208, 0x0600020c, 0x000000fc }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0340, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x21080208, 0x06000108, 0x0000000a }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x060a0302 }, + { 0x00000040, 0x21480208, 0x06000148, 0x00000004 }, + { 0x00000040, 0x21e00208, 0x060001e0, 0x00000001 }, + { 0x01000040, 0x20ae1a68, 0x1e0000ae, 0xffffffff }, + { 0x00110020, 0x34000000, 0x0e001400, 0xfffffcd0 }, + { 0x00010020, 0x34000001, 0x0e001400, 0x000000f0 }, + { 0x00600001, 0x28000208, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22000a48, 0x06000800, 0x02180001 }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0002 }, + { 0x00000040, 0x21280208, 0x06000128, 0x00000001 }, + { 0x00000040, 0x21480208, 0x06000148, 0x00000001 }, + { 0x01000040, 0x20a81a68, 0x1e0000a8, 0xffffffff }, + { 0x00110020, 0x34000000, 0x0e001400, 0xffffff70 }, + { 0x01000005, 0x20001240, 0x160000ac, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00400001, 0x28200608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28240608, 0x00000000, 0x05000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0002 }, + { 0x00600001, 0x28000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a00, 0x06000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.asm intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.asm --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,111 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +__PAK_OBJECT: + mul (1) tmp_vme_output.8<1>:ud width_in_mb<0,1,0>:uw mb_y<0,1,0>:ub {align1}; + add (1) tmp_vme_output.8<1>:ud tmp_vme_output.8<0,1,0>:ud mb_x<0,1,0>:ub {align1}; + + mov (16) pak_object_ud<1>:ud 0x0:ud {align1} ; + mov (1) pak_object0_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW0 ; + mov (1) pak_object5_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW5 ; + + and.z.f0.1 (1) null<1>:uw flags<0,1,0>:uw FLAG_MASK_LAST_OBJECT {align1}; + +__PAK_OBJECT_LOOP: + mov (8) msg_reg0.0<1>:ud tmp_vme_output<8,8,1>:ud {align1} ; + +send (16) + msg_ind + ob_read_wb + null + data_port( + OB_CACHE_TYPE, + OB_READ, + OB_CONTROL_0, + BIND_IDX_VME_OUTPUT, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 1 + rlen ob_read_wb_len_vme_intra + {align1}; + + /* DW4 */ + add (1) pak_object4_ud<1>:ud mb_xy<0,1,0>:uw MFC_AVC_PAK_OBJECT_INTRA_DW4 {align1} ; + add (1) mb_x<1>:ub mb_x<0,1,0>:ub 1:uw {align1}; + cmp.e.f0.0 (1) null<1>:uw width_in_mb<0,1,0>:uw mb_x<0,1,0>:ub {align1}; + (f0.0)mov (1) mb_x<1>:ub 0:uw {align1} ; + (f0.0)add (1) mb_y<1>:ub mb_y<0,1,0>:ub 1:uw {align1} ; + + /* DW6 */ + mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; + (-f0.1)mov (1) pak_object6_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW6 {align1} ; + cmp.e.f0.0 (1) null<1>:uw total_mbs<0,1,0>:uw 1:uw {align1}; + (-f0.0)mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; + add (1) pak_object6_ud<1>:ud pak_object6_ud<0,1,0>:ud qp<0,1,0>:ub {align1} ; + + /* DW3 */ + and (1) pak_object3_ud<1>:ud ob_read_wb0.0<0,1,0>:ud 0xFFFF {align1} ; + add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud MFC_AVC_PAK_OBJECT_INTRA_DW3 {align1} ; + + /* DW7 */ + mov (1) pak_object7_ud<1>:ud ob_read_wb0.4<0,1,0>:ud {align1} ; + + /* DW8 */ + mov (1) pak_object8_ud<1>:ud ob_read_wb0.8<0,1,0>:ud {align1} ; + + /* DW9 */ + and (1) pak_object9_ud<1>:ud ob_read_wb0.12<0,1,0>:ud 0xFC:ud {align1} ; + + mov (8) msg_reg0.0<1>:ud tmp_mfc_batchbuffer<8,8,1>:ud {align1} ; + mov (8) msg_reg1.0<1>:ud pak_object_ud<8,8,1>:ud {align1} ; + mov (8) msg_reg2.0<1>:ud pak_object8_ud<8,8,1>:ud {align1} ; + + /* the new offset */ + add (1) tmp_vme_output.8<1>:ud tmp_vme_output.8<0,1,0>:ud 1:ud {align1} ; + +send (16) + msg_ind + ob_write_wb + null + data_port( + OB_CACHE_TYPE, + OB_WRITE, + OB_CONTROL_3, + BIND_IDX_MFC_BATCHBUFFER, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 3 + rlen ob_write_wb_length + {align1}; + + /* the new offset */ + add (1) tmp_mfc_batchbuffer.8<1>:ud tmp_mfc_batchbuffer.8<0,1,0>:ud 4:ud {align1} ; + + add.z.f0.0 (1) total_mbs<1>:w total_mbs<0,1,0>:w -1:w {align1}; + (-f0.0)jmpi (1) __PAK_OBJECT_LOOP ; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g6a intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g6a --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g6a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,32 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#include "mfc_batchbuffer.inc" +#include "mfc_batchbuffer_head.asm" +#include "mfc_batchbuffer_avc_intra.asm" +#include "mfc_batchbuffer_tail.asm" +#include "end_thread.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g6b intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g6b --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g6b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,66 @@ + { 0x00800001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21340231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21280021, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x21540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21480021, 0x000000a4, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00600001, 0x20000022, 0x008d0120, 0x00000000 }, + { 0x05800031, 0x22001cc9, 0x00000000, 0x021a0001 }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0200, 0x00000000 }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x041b0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20aa3dad, 0x000000aa, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x00000041, 0x21084521, 0x000000b4, 0x000000b1 }, + { 0x00000040, 0x21084421, 0x00000108, 0x000000b0 }, + { 0x00800001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23400061, 0x00000000, 0x71490009 }, + { 0x00000001, 0x23540061, 0x00000000, 0x000f000f }, + { 0x01000005, 0x20002d28, 0x020000ac, 0x00020002 }, + { 0x00600001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x05800031, 0x22001cc9, 0x00000000, 0x021a0000 }, + { 0x00000040, 0x23500d21, 0x000000b0, 0xffff0000 }, + { 0x00000040, 0x20b02e31, 0x000000b0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000b4, 0x000000b0 }, + { 0x00010001, 0x20b00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20b12e31, 0x000000b1, 0x00010001 }, + { 0x00000001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580061, 0x02000000, 0x04000000 }, + { 0x01000010, 0x20002d28, 0x000000ae, 0x00010001 }, + { 0x00110001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23584421, 0x00000358, 0x000000b6 }, + { 0x00000005, 0x234c1c21, 0x00000200, 0x0000ffff }, + { 0x00000040, 0x234c0c21, 0x0000034c, 0x000e0000 }, + { 0x00000001, 0x235c0021, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600021, 0x00000208, 0x00000000 }, + { 0x00000005, 0x23640c21, 0x0000020c, 0x000000fc }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0340, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x21080c21, 0x00000108, 0x00000001 }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x061b0302 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000004 }, + { 0x01000040, 0x20ae3dad, 0x000000ae, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffce }, + { 0x00010020, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00600001, 0x20000022, 0x008d0120, 0x00000000 }, + { 0x05800031, 0x22001cc9, 0x00000000, 0x021a0001 }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0200, 0x00000000 }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x041b0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20a83dad, 0x000000a8, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00600001, 0x20000022, 0x008d0140, 0x00000000 }, + { 0x00400001, 0x20200062, 0x00000000, 0x00000000 }, + { 0x00000001, 0x20240062, 0x00000000, 0x05000000 }, + { 0x05800031, 0x23001cdd, 0x00000000, 0x041b0002 }, + { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001cc0, 0x00000000, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g7a intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g7a --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,32 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#include "mfc_batchbuffer.inc" +#include "mfc_batchbuffer_head.asm" +#include "mfc_batchbuffer_avc_intra.asm" +#include "mfc_batchbuffer_tail.asm" +#include "end_thread.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g7b intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g7b --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g7b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,66 @@ + { 0x00800001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21340231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21280021, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x21540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21480021, 0x000000a4, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00600001, 0x28000021, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22001ca9, 0x00000800, 0x02180001 }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20aa3dad, 0x000000aa, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x00000041, 0x21084521, 0x000000b4, 0x000000b1 }, + { 0x00000040, 0x21084421, 0x00000108, 0x000000b0 }, + { 0x00800001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23400061, 0x00000000, 0x71490009 }, + { 0x00000001, 0x23540061, 0x00000000, 0x000f000f }, + { 0x01000005, 0x20002d28, 0x020000ac, 0x00020002 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x0a800031, 0x22001ca9, 0x00000800, 0x02180000 }, + { 0x00000040, 0x23500d21, 0x000000b0, 0xffff0000 }, + { 0x00000040, 0x20b02e31, 0x000000b0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000b4, 0x000000b0 }, + { 0x00010001, 0x20b00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20b12e31, 0x000000b1, 0x00010001 }, + { 0x00000001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580061, 0x02000000, 0x04000000 }, + { 0x01000010, 0x20002d28, 0x000000ae, 0x00010001 }, + { 0x00110001, 0x23580061, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23584421, 0x00000358, 0x000000b6 }, + { 0x00000005, 0x234c1c21, 0x00000200, 0x0000ffff }, + { 0x00000040, 0x234c0c21, 0x0000034c, 0x000e0000 }, + { 0x00000001, 0x235c0021, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600021, 0x00000208, 0x00000000 }, + { 0x00000005, 0x23640c21, 0x0000020c, 0x000000fc }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0340, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x21080c21, 0x00000108, 0x00000001 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x060a0302 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000004 }, + { 0x01000040, 0x20ae3dad, 0x000000ae, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffce }, + { 0x00010020, 0x34001c00, 0x02001400, 0x0000001e }, + { 0x00600001, 0x28000021, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22001ca9, 0x00000800, 0x02180001 }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0002 }, + { 0x00000040, 0x21280c21, 0x00000128, 0x00000001 }, + { 0x00000040, 0x21480c21, 0x00000148, 0x00000001 }, + { 0x01000040, 0x20a83dad, 0x000000a8, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffee }, + { 0x01000005, 0x20002d28, 0x000000ac, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0140, 0x00000000 }, + { 0x00400001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28240061, 0x00000000, 0x05000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0002 }, + { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca0, 0x00000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g9a intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g9a --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,33 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + * Li Zhong + */ + +#include "mfc_batchbuffer.inc" +#include "mfc_batchbuffer_head.asm" +#include "mfc_batchbuffer_avc_intra.asm" +#include "mfc_batchbuffer_tail.asm" +#include "end_thread.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g9b intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g9b --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_avc_intra.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_avc_intra.g9b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,66 @@ + { 0x00800001, 0x21000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21342288, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21280208, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x21542288, 0x00000014, 0x00000000 }, + { 0x00000001, 0x21480208, 0x000000a4, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000ac, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000090 }, + { 0x00600001, 0x28000208, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22000a48, 0x06000800, 0x02180001 }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0002 }, + { 0x00000040, 0x21280208, 0x06000128, 0x00000001 }, + { 0x00000040, 0x21480208, 0x06000148, 0x00000001 }, + { 0x01000040, 0x20aa1a68, 0x1e0000aa, 0xffffffff }, + { 0x00110020, 0x34000000, 0x0e001400, 0xffffff70 }, + { 0x00000041, 0x21081208, 0x220000b4, 0x000000b1 }, + { 0x00000040, 0x21080208, 0x22000108, 0x000000b0 }, + { 0x00800001, 0x23400608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23400608, 0x00000000, 0x71490009 }, + { 0x00000001, 0x23540608, 0x00000000, 0x000f000f }, + { 0x01000005, 0x20001241, 0x160000ac, 0x00020002 }, + { 0x00600001, 0x28000208, 0x008d0100, 0x00000000 }, + { 0x0a800031, 0x22000a48, 0x06000800, 0x02180000 }, + { 0x00000040, 0x23501208, 0x060000b0, 0xffff0000 }, + { 0x00000040, 0x20b02288, 0x160000b0, 0x00010001 }, + { 0x01000010, 0x20001240, 0x220000b4, 0x000000b0 }, + { 0x00010001, 0x20b01688, 0x10000000, 0x00000000 }, + { 0x00010040, 0x20b12288, 0x160000b1, 0x00010001 }, + { 0x00000001, 0x23580608, 0x00000000, 0x00000000 }, + { 0x00110001, 0x23580609, 0x00000000, 0x04000000 }, + { 0x01000010, 0x20001240, 0x160000ae, 0x00010001 }, + { 0x00110001, 0x23580608, 0x00000000, 0x00000000 }, + { 0x00000040, 0x23580208, 0x22000358, 0x000000b6 }, + { 0x00000005, 0x234c0208, 0x0e000200, 0x0000ffff }, + { 0x00000040, 0x234c0208, 0x0600034c, 0x000e0000 }, + { 0x00000001, 0x235c0208, 0x00000204, 0x00000000 }, + { 0x00000001, 0x23600208, 0x00000208, 0x00000000 }, + { 0x00000005, 0x23640208, 0x0600020c, 0x000000fc }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0340, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0360, 0x00000000 }, + { 0x00000040, 0x21080208, 0x06000108, 0x00000001 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x060a0302 }, + { 0x00000040, 0x21480208, 0x06000148, 0x00000004 }, + { 0x01000040, 0x20ae1a68, 0x1e0000ae, 0xffffffff }, + { 0x00110020, 0x34000000, 0x0e001400, 0xfffffe70 }, + { 0x00010020, 0x34000001, 0x0e001400, 0x000000f0 }, + { 0x00600001, 0x28000208, 0x008d0120, 0x00000000 }, + { 0x0a800031, 0x22000a48, 0x06000800, 0x02180001 }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0002 }, + { 0x00000040, 0x21280208, 0x06000128, 0x00000001 }, + { 0x00000040, 0x21480208, 0x06000148, 0x00000001 }, + { 0x01000040, 0x20a81a68, 0x1e0000a8, 0xffffffff }, + { 0x00110020, 0x34000000, 0x0e001400, 0xffffff70 }, + { 0x01000005, 0x20001240, 0x160000ac, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00600001, 0x28000208, 0x008d0140, 0x00000000 }, + { 0x00400001, 0x28200608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28240608, 0x00000000, 0x05000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0002 }, + { 0x00600001, 0x28000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a00, 0x06000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_head.asm intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_head.asm --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_head.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_head.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,87 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +/* + * __START + */ +__START: + mov (16) tmp_reg0<1>:ud 0x0:ud {align1} ; + mov (16) tmp_reg2<1>:ud 0x0:ud {align1} ; + + mov (1) tmp_slice_header.20<1>:ub thread_id_ub {align1}; /* dispatch id */ + mov (1) tmp_slice_header.8<1>:ud head_offset<0,1,0>:ud {align1}; + mov (1) tmp_mfc_batchbuffer.20<1>:ub thread_id_ub {align1}; /* dispatch id */ + mov (1) tmp_mfc_batchbuffer.8<1>:ud batchbuffer_offset<0,1,0>:ud {align1}; + +__HEAD: + and.z.f0.0 (1) null<1>:uw flags<0,1,0>:uw FLAG_MASK_FIRST_OBJECT {align1}; + (f0.0)jmpi (1) __PAK_OBJECT ; + +__HEAD_LOOP: + mov (8) msg_reg0.0<1>:ud tmp_slice_header<8,8,1>:ud {align1} ; + +send (16) + msg_ind + ob_read_wb + null + data_port( + OB_CACHE_TYPE, + OB_READ, + OB_CONTROL_0, + BIND_IDX_MFC_SLICE_HEADER, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 1 + rlen ob_read_wb_len_slice_header + {align1}; + + mov (8) msg_reg0.0<1>:ud tmp_mfc_batchbuffer<8,8,1>:ud {align1} ; + mov (8) msg_reg1.0<1>:ud ob_read_wb0<8,8,1>:ud {align1} ; + +send (16) + msg_ind + ob_write_wb + null + data_port( + OB_CACHE_TYPE, + OB_WRITE, + OB_CONTROL_0, + BIND_IDX_MFC_BATCHBUFFER, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 2 + rlen ob_write_wb_length + {align1}; + + /* the new offset */ + add (1) tmp_slice_header.8<1>:ud tmp_slice_header.8<0,1,0>:ud 1:ud {align1} ; + add (1) tmp_mfc_batchbuffer.8<1>:ud tmp_mfc_batchbuffer.8<0,1,0>:ud 1:ud {align1} ; + + add.z.f0.0 (1) head_size<1>:w head_size<0,1,0>:w -1:w {align1}; + (-f0.0)jmpi (1) __HEAD_LOOP ; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.asm intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.asm --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,296 @@ +/* + * Copyright © 2010-2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + */ + +START: + mov (16) pak_object_reg0.0<1>:ud 0x0:ud {align1}; + mov (8) obw_m0.0<1>:ud 0x0:ud {align1}; + mov (8) mb_cur_msg.0<1>:ud 0x0:ud {align1}; + mov (16) mb_temp.0<1>:ud 0x0:ud {align1}; + mov (1) cur_mb_x<1>:uw mb_x<0,1,0>:ub {align1}; + mov (1) cur_mb_y<1>:uw mb_y<0,1,0>:ub {align1}; + mov (1) end_mb_x<1>:uw slice_end_x<0,1,0>:ub {align1}; + mov (1) end_mb_y<1>:uw slice_end_y<0,1,0>:ub {align1}; + mov (1) end_loop_count<1>:uw total_mbs<0,1,0>:uw {align1}; + mov (1) vme_len<1>:ud 2:ud {align1}; + and.z.f0.0 (1) null:uw mb_flag<0,1,0>:ub INTRA_SLICE:uw {align1}; + (f0.0) mov (1) vme_len<1>:ud 24:ud {align1}; + + mov (1) obw_m0.8<1>:UD buffer_offset<0,1,0>:ud {align1}; + mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + + mul (1) mb_cur_msg.8<1>:UD width_in_mbs<0,1,0>:UW cur_mb_y<0,1,0>:UW {align1}; + add (1) mb_cur_msg.8<1>:UD mb_cur_msg.8<0,1,0>:UD cur_mb_x<0,1,0>:uw {align1}; + mul (1) mb_cur_msg.8<1>:UD mb_cur_msg.8<0,1,0>:UD vme_len<0,1,0>:UD {align1}; + mov (1) mb_cur_msg.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + mov (1) pak_object0_ud<1>:ud MFC_AVC_PAK_OBJECT_DW0:ud {align1}; + mov (1) pak_object5_ud<1>:ud MFC_AVC_PAK_OBJECT_DW5:ud {align1}; + mov (1) pak_object10_ud<1>:ud MFC_AVC_PAK_OBJECT_DW10:ud {align1}; + mov (1) pak_object6_ud<1>:ub qp_flag<0,1,0>:ub {align1}; + +pak_object_loop: + mov (8) mb_msg0.0<1>:ud mb_cur_msg.0<8,8,1>:ud {align1}; + mov (1) pak_object4_ud<1>:ud MFC_AVC_PAK_OBJECT_DW4:ud {align1}; + mov (1) tmp_reg0.0<1>:ub cur_mb_x<0,1,0>:ub {align1}; + mov (1) tmp_reg0.1<1>:ub cur_mb_y<0,1,0>:ub {align1}; + mov (1) pak_object4_ud<1>:uw tmp_reg0.0<0,1,0>:uw {align1}; + /* pak_object6_ud */ + mov (1) pak_object_reg0.26<1>:uw 0x0:uw {align1}; + + cmp.e.f0.0 (1) null:uw cur_mb_x<0,1,0>:uw end_mb_x<0,1,0>:uw {align1}; + (-f0.0) jmpi (1) start_mb_flag; + cmp.e.f0.0 (1) null:uw cur_mb_y<0,1,0>:uw end_mb_y<0,1,0>:uw {align1}; + (f0.0) mov (1) pak_object_reg0.26<1>:uw MFC_AVC_PAK_LAST_MB:uw {align1}; +start_mb_flag: + and.z.f0.0 (1) null:uw mb_flag<0,1,0>:ub INTRA_SLICE:uw {align1}; + (f0.0) jmpi (1) inter_frame_start; + +/* bind index 0, read 2 oword (32bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + null + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + MV_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + jmpi (1) intra_pak_command; + +nop; +nop; +inter_frame_start: +/* bind index 0, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + null + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + MV_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) jmpi (1) intra_pak_command; + +/* MV len and MV mode */ + and (1) pak_object3_ud<1>:ud mb_inter_wb.0<0,1,0>:ud MFC_AVC_INTER_MASK_DW3:ud {align1}; + add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud MFC_AVC_PAK_CBP:ud {align1}; + and (1) tmp_reg0.0<1>:uw mb_inter_wb.0<0,1,0>:uw INTER_MASK:uw {align1}; + mov (1) pak_object1_ud<1>:ud 32:ud {align1}; + cmp.e.f0.0 (1) null:uw tmp_reg0.0<0,1,0>:uw INTER_8X8MODE:uw {align1}; + (-f0.0) add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud INTER_MV8:ud {align1}; + (-f0.0) jmpi (1) inter_mv_check; + and.nz.f0.0 (1) null:ud mb_inter_wb.4<0,1,0>:uw SUBSHAPE_MASK:uw {align1}; + (f0.0) mov (1) pak_object1_ud<1>:ud 128:ud {align1}; + (f0.0) add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud INTER_MV32:ud {align1}; + (f0.0) jmpi (1) mv_check_end; + + add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud INTER_MV8:ud {align1}; + +inter_mv_check: + and (1) tmp_reg0.0<1>:uw mb_inter_wb.0<0,1,0>:uw INTER_MASK:uw {align1}; + cmp.e.f0.0 (1) null:uw tmp_reg0.0<0,1,0>:uw INTER_16X16MODE:uw {align1}; + (f0.0) jmpi (1) mv_check_end; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 0, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + null + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + MV_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ + + mov (2) mb_mv0.8<1>:ud mb_mv1.0<2,2,1>:ud {align1}; + mov (2) mb_mv0.16<1>:ud mb_mv2.0<2,2,1>:ud {align1}; + mov (2) mb_mv0.24<1>:ud mb_mv3.0<2,2,1>:ud {align1}; + + mov (8) msg_reg0.0<1>:ud mb_msg0.0<8,8,1>:ud {align1} ; + mov (8) msg_reg1.0<1>:ud mb_mv0.0<8,8,1>:ud {align1} ; +/* Write MV for MB A */ +/* bind index 0, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + MV_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +mv_check_end: + +/* ref list */ + mov (1) pak_object8_ud<1>:ud fwd_ref<0,1,0>:ud {align1}; + mov (1) pak_object9_ud<1>:ud bwd_ref<0,1,0>:ud {align1}; +/* inter_mode. pak_object7_ud */ + mov (1) pak_object7_ud<1>:ud 0x0:ud {align1}; + mov (1) pak_object_reg0.28<1>:ub mb_inter_wb.5<0,1,0>:ub {align1}; + mov (1) pak_object_reg0.29<1>:ub mb_inter_wb.6<0,1,0>:ub {align1}; + +/* mv start address */ + add (1) tmp_reg0.4<1>:ud mb_cur_msg.8<0,1,0>:ud 3:ud {align1}; + mul (1) pak_object2_ud<1>:ud tmp_reg0.4<0,1,0>:ud 16:ud {align1}; + + jmpi (1) write_pak_command; + +intra_pak_command: + /* object 1/2 is set to zero */ + mov (2) pak_object1_ud<1>:ud 0x0:ud {align1}; + /* object 7/8 intra mode */ + mov (1) pak_object7_ud<1>:ud mb_intra_wb.4<0,1,0>:ud {align1}; + mov (1) pak_object8_ud<1>:ud mb_intra_wb.8<0,1,0>:ud {align1}; + /* object 9 Intra structure */ + mov (1) pak_object9_ud<1>:ud 0x0:ud {align1}; + mov (1) pak_object9_ud<1>:ub mb_intra_wb.12<0,1,0>:ub {align1}; + + and (1) pak_object3_ud<1>:ud mb_intra_wb.0<0,1,0>:ud MFC_AVC_INTRA_MASK_DW3:ud {align1}; + add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud MFC_AVC_INTRA_FLAG + MFC_AVC_PAK_CBP:ud {align1}; + + mov (1) tmp_reg0.0<1>:ud 0:ud {align1}; + mov (1) tmp_reg0.1<1>:ub mb_intra_wb.2<0,1,0>:ub {align1}; + and (1) tmp_reg0.0<1>:uw tmp_reg0.0<0,1,0>:uw AVC_INTRA_MASK:uw {align1}; + add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud tmp_reg0.0<0,1,0>:ud {align1}; + +/* Write the pak command into the batchbuffer */ +write_pak_command: + mov (8) msg_reg0.0<1>:ud obw_m0.0<8,8,1>:ud {align1} ; + mov (8) msg_reg1.0<1>:ud pak_object_reg0.0<8,8,1>:ud {align1} ; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + MFC_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + add (1) msg_reg0.8<1>:ud msg_reg0.8<0,1,0>:ud 2:ud {align1}; + mov (8) msg_reg1.0<1>:ud pak_object_reg1.0<8,8,1>:ud {align1}; + +/* bind index 3, write 1 oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + MFC_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + +/* Check the next mb */ +add (1) cur_loop_count<1>:uw cur_loop_count<0,1,0>:uw 1:uw {align1}; +cmp.e.f0.0 (1) null:uw cur_loop_count<0,1,0>:uw end_loop_count<0,1,0>:uw {align1}; +(f0.0) jmpi (1) pak_loop_end; +/* the buffer offset for next block */ +add (1) obw_m0.8<1>:ud obw_m0.8<0,1,0>:ud 3:uw {align1}; +add (1) mb_cur_msg.8<1>:ud mb_cur_msg.8<0,1,0>:ud vme_len<0,1,0>:ud {align1}; +add (1) cur_mb_x<1>:uw cur_mb_x<0,1,0>:uw 1:uw {align1}; +/* Check whether it is already equal to width in mbs */ +cmp.e.f0.0 (1) null:uw cur_mb_x<0,1,0>:uw width_in_mbs<0,1,0>:uw {align1}; +(f0.0) add (1) cur_mb_y<1>:uw cur_mb_y<0,1,0>:uw 1:uw {align1}; +(f0.0) mov (1) cur_mb_x<1>:uw 0:uw {align1}; + +/* continue the pak command for next mb */ +jmpi (1) pak_object_loop; +nop; +nop; +pak_loop_end: +/* Issue message fence so that the previous write message is committed */ +send (16) + msg_ind + mb_wb.0<1>:ud + null + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + MFC_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (1) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + +nop; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.g75a intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.g75a --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.g75a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.g75a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,29 @@ +/* + * Copyright © 2010-2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + */ + +#include "mfc_batchbuffer_hsw.inc" +#include "mfc_batchbuffer_hsw.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.g75b intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.g75b --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.g75b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,105 @@ + { 0x00800001, 0x23400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x21e00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x2ac00229, 0x000000a8, 0x00000000 }, + { 0x00000001, 0x2ac20229, 0x000000a9, 0x00000000 }, + { 0x00000001, 0x2ae00229, 0x000000b0, 0x00000000 }, + { 0x00000001, 0x2ae20229, 0x000000b1, 0x00000000 }, + { 0x00000001, 0x2ae40129, 0x000000ac, 0x00000000 }, + { 0x00000001, 0x2ae80061, 0x00000000, 0x00000002 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x2ae80061, 0x00000000, 0x00000018 }, + { 0x00000001, 0x21e80021, 0x000000a0, 0x00000000 }, + { 0x00000001, 0x21f40231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x2b082521, 0x000000aa, 0x00000ac2 }, + { 0x00000040, 0x2b082421, 0x00000b08, 0x00000ac0 }, + { 0x00000041, 0x2b080421, 0x00000b08, 0x00000ae8 }, + { 0x00000001, 0x2b140231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x23400061, 0x00000000, 0x7149000a }, + { 0x00000001, 0x23540061, 0x00000000, 0x000f000f }, + { 0x00000001, 0x23680061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23580231, 0x000000a6, 0x00000000 }, + { 0x00600001, 0x2b400021, 0x008d0b00, 0x00000000 }, + { 0x00000001, 0x23500061, 0x00000000, 0xffff0000 }, + { 0x00000001, 0x21000231, 0x00000ac0, 0x00000000 }, + { 0x00000001, 0x21010231, 0x00000ac2, 0x00000000 }, + { 0x00000001, 0x23500129, 0x00000100, 0x00000000 }, + { 0x00000001, 0x235a0169, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20002528, 0x00000ac0, 0x00000ae0 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x01000010, 0x20002528, 0x00000ac2, 0x00000ae2 }, + { 0x00010001, 0x235a0169, 0x00000000, 0x04000400 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02180200 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000240 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280300 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000001f0 }, + { 0x00000005, 0x234c0c21, 0x00000b80, 0x1f00ffff }, + { 0x00000040, 0x234c0c21, 0x0000034c, 0x000e0000 }, + { 0x00000005, 0x21002d29, 0x00000b80, 0x00030003 }, + { 0x00000001, 0x23440061, 0x00000000, 0x00000020 }, + { 0x01000010, 0x20002d28, 0x00000100, 0x00030003 }, + { 0x00110040, 0x234c0c21, 0x0000034c, 0x00400000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000050 }, + { 0x02000005, 0x20002d20, 0x00000b84, 0xff00ff00 }, + { 0x00010001, 0x23440061, 0x00000000, 0x00000080 }, + { 0x00010040, 0x234c0c21, 0x0000034c, 0x00600000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000c0 }, + { 0x00000040, 0x234c0c21, 0x0000034c, 0x00400000 }, + { 0x00000005, 0x21002d29, 0x00000b80, 0x00030003 }, + { 0x01000010, 0x20002d28, 0x00000100, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480400 }, + { 0x00200001, 0x2ba80021, 0x00450bc0, 0x00000000 }, + { 0x00200001, 0x2bb00021, 0x00450be0, 0x00000000 }, + { 0x00200001, 0x2bb80021, 0x00450c00, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0b40, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0ba0, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0200 }, + { 0x00000001, 0x23600021, 0x000000b4, 0x00000000 }, + { 0x00000001, 0x23640021, 0x000000b8, 0x00000000 }, + { 0x00000001, 0x235c0061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x235c0231, 0x00000b85, 0x00000000 }, + { 0x00000001, 0x235d0231, 0x00000b86, 0x00000000 }, + { 0x00000040, 0x21040c21, 0x00000b08, 0x00000003 }, + { 0x00000041, 0x23480c21, 0x00000104, 0x00000010 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, + { 0x00200001, 0x23440061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x235c0021, 0x00000b64, 0x00000000 }, + { 0x00000001, 0x23600021, 0x00000b68, 0x00000000 }, + { 0x00000001, 0x23640061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23640231, 0x00000b6c, 0x00000000 }, + { 0x00000005, 0x234c0c21, 0x00000b60, 0x0000c0ff }, + { 0x00000040, 0x234c0c21, 0x0000034c, 0x000e2000 }, + { 0x00000001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21010231, 0x00000b62, 0x00000000 }, + { 0x00000005, 0x21002d29, 0x00000100, 0x1f001f00 }, + { 0x00000040, 0x234c0421, 0x0000034c, 0x00000100 }, + { 0x00600001, 0x28000021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0340, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0202 }, + { 0x00000040, 0x28080c21, 0x00000808, 0x00000002 }, + { 0x00600001, 0x28200021, 0x008d0360, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0002 }, + { 0x00000040, 0x2ac42d29, 0x00000ac4, 0x00010001 }, + { 0x01000010, 0x20002528, 0x00000ac4, 0x00000ae4 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, + { 0x00000040, 0x21e82c21, 0x000001e8, 0x00030003 }, + { 0x00000040, 0x2b080421, 0x00000b08, 0x00000ae8 }, + { 0x00000040, 0x2ac02d29, 0x00000ac0, 0x00010001 }, + { 0x01000010, 0x20002528, 0x00000ac0, 0x000000aa }, + { 0x00010040, 0x2ac22d29, 0x00000ac2, 0x00010001 }, + { 0x00010001, 0x2ac00169, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0xfffffb30 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000800, 0x0219e002 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07000031, 0x24001ca8, 0x00000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.inc intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.inc --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_hsw.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_hsw.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,195 @@ +/* + * Copyright © 2010-2013 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + */ + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r7 reserved + * r8~r15 temporary registers + * r16 write back of Oword Block Write + */ + +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +define(`inline_reg0', `r5') +define(`buffer_offset', `inline_reg0.0') /* :ud, in units of Owords */ +/* :ub, + * bit0 indicates the frame type. 1 is the I-frame. 0 is P-B frame + */ +define(`mb_flag', `inline_reg0.4') +define(`qp_flag', `inline_reg0.6') /* :ub */ + +define(`mb_x', `inline_reg0.8') /* :ub, */ +define(`mb_y', `inline_reg0.9') /* :ub, */ +define(`mb_xy', `inline_reg0.8') /* :uw, */ +/* :uw, the picture width in macroblocks */ +define(`width_in_mbs', `inline_reg0.10') +/* :w, the number of macroblock commands being processed by the kernel */ +define(`total_mbs', `inline_reg0.12') +/* ub, the mb x/y of the last mb in slice */ +define(`slice_end_x', `inline_reg0.16') +define(`slice_end_y', `inline_reg0.17') + +/* :ud the forward reference picture list */ +define(`fwd_ref', `inline_reg0.20') +/* :ud the backward reference picture list */ +define(`bwd_ref', `inline_reg0.24') + +/* + * GRF 8~15 -- temporary registers + */ +define(`tmp_reg0', `r8') +define(`tmp_reg1', `r9') +define(`tmp_reg2', `r10') +define(`tmp_reg3', `r11') +define(`tmp_reg4', `r12') +define(`tmp_reg5', `r13') +define(`tmp_reg6', `r14') +define(`tmp_reg7', `r15') + +define(`obw_m0', `tmp_reg7') + +define(`obw_wb', `null<1>:W') +define(`obw_wb_length', `0') + +/* + * GRF 26~27 + */ +define(`pak_object_reg0', `r26') +define(`pak_object0_ud', `r26.0') +define(`pak_object1_ud', `r26.4') +define(`pak_object2_ud', `r26.8') +define(`pak_object3_ud', `r26.12') +define(`pak_object4_ud', `r26.16') +define(`pak_object5_ud', `r26.20') +define(`pak_object6_ud', `r26.24') +define(`pak_object7_ud', `r26.28') + +define(`pak_object_reg1', `r27') +define(`pak_object8_ud', `r27.0') +define(`pak_object9_ud', `r27.4') +define(`pak_object10_ud', `r27.8') +define(`pak_object11_ud', `r27.12') + +/* + * Message Payload registers + */ +define(`msg_ind', `64') +define(`msg_reg0', `g64') +define(`msg_reg1', `g65') +define(`msg_reg2', `g66') +define(`msg_reg3', `g67') +define(`msg_reg4', `g68') +define(`msg_reg5', `g69') +define(`msg_reg6', `g70') +define(`msg_reg7', `g71') +define(`msg_reg8', `g72') + +define(`MV_BIND_IDX', `0') +define(`MFC_BIND_IDX', `2') + +define(`ts_msg_ind', `112') +define(`ts_msg_reg0', `r112') + + +define(`MFC_AVC_PAK_OBJECT_DW0', `0x7149000a') +define(`MFC_AVC_PAK_OBJECT_DW4', `0xFFFF0000') /* CBP for Y */ +define(`MFC_AVC_PAK_OBJECT_DW5', `0x000F000F') +define(`MFC_AVC_PAK_OBJECT_DW10', `0x0000000') + +define(`OBR_MESSAGE_TYPE', `0') +define(`OBR_CACHE_TYPE', `10') + +define(`OBR_MESSAGE_FENCE', `7') +define(`OBR_MF_NOCOMMIT', `0') +define(`OBR_MF_COMMIT', `0x20') + +define(`OBR_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBR_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBR_CONTROL_2', `2') /* 2 OWords */ +define(`OBR_CONTROL_4', `3') /* 4 OWords */ +define(`OBR_CONTROL_8', `4') /* 8 OWords */ + +define(`OBR_HEADER_PRESENT', `1') +define(`OBR_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + +define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + +define(`OBW_CACHE_TYPE', `10') + + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_4', `3') /* 4 OWords */ +define(`OBW_CONTROL_8', `4') /* 8 OWords */ +define(`OBW_HEADER_PRESENT', `1') + +define(`INTER_MASK', `0x03') +define(`INTER_16X16MODE', `0x0') +define(`INTER_16X8MODE', `0x01') +define(`INTER_8X16MODE', `0x02') +define(`INTER_8X8MODE', `0x03') +define(`SUBSHAPE_MASK', `0xFF00') + +define(`mb_ind', `90') +define(`mb_msg0', `r90') +define(`mb_wb', `r91') +define(`mb_intra_wb', `r91') +define(`mb_inter_wb', `r92') +define(`mb_mv0', `r93') +define(`mb_mv1', `r94') +define(`mb_mv2', `r95') +define(`mb_mv3', `r96') + +define(`mb_temp', `r86') +define(`cur_mb_x', `mb_temp.0') /* :uw, */ +define(`cur_mb_y', `mb_temp.2') /* :uw, */ +define(`cur_loop_count', `mb_temp.4') /* :uw, */ +define(`mb_end', `r87') +define(`end_mb_x', `mb_end.0') /* :uw, */ +define(`end_mb_y', `mb_end.2') /* :uw, */ +define(`end_loop_count', `mb_end.4') /* :uw, */ +/* :ud the length of VME predict result for every mb. Units in owords */ +define(`vme_len', `mb_end.8') +define(`mb_cur_msg', `r88') + +define(`INTRA_SLICE', `0x0001') +define(`MFC_AVC_PAK_LAST_MB', `0x0400') + +define(`MFC_AVC_INTER_MASK_DW3', `0x1F00FFFF') +define(`MFC_AVC_INTRA_MASK_DW3', `0x0000C0FF') +define(`INTER_MV8', `0x00400000') +define(`INTER_MV32', `0x00600000') +define(`MFC_AVC_PAK_CBP', `0x000E0000') +define(`MFC_AVC_INTRA_FLAG', `0x00002000') +define(`AVC_INTRA_MASK', `0x1F00') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer.inc intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer.inc --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,246 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +define(`BIND_IDX_VME_OUTPUT', `0') +define(`BIND_IDX_MFC_SLICE_HEADER', `1') +define(`BIND_IDX_MFC_BATCHBUFFER', `2') + +define(`INTRAMBFLAG_MASK', `0x00002000') + +#ifdef DEV_SNB + +define(`OB_CACHE_TYPE', `5') + +#else + +define(`OB_CACHE_TYPE', `10') + +#endif + +define(`OB_READ', `0') +define(`OB_WRITE', `8') + +define(`OB_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OB_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OB_CONTROL_2', `2') /* 2 OWords */ +define(`OB_CONTROL_3', `3') /* 4 OWords */ +define(`OB_CONTROL_4', `4') /* 8 OWords */ + +#ifdef DEV_SNB + +define(`OB_WRITE_COMMIT_CATEGORY', `1') /* write commit on Sandybrige */ + +#else + +define(`OB_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + +#endif + +define(`OB_HEADER_PRESENT', `1') + +define(`INTER_VME_OUTPUT_IN_BYTES', `160') +define(`INTER_VME_OUTPUT_IN_OWS', `10') +define(`INTER_VME_OUTPUT_MV_IN_OWS', `8') + +define(`MFC_AVC_PAK_OBJECT_INTRA_DW0', `0x71490009:UD') +define(`MFC_AVC_PAK_OBJECT_INTRA_DW3', `0x000e0000:UD') /* CbpDC (1 << 19 | 1 << 18 | 1 << 17) */ +define(`MFC_AVC_PAK_OBJECT_INTRA_DW4', `0xFFFF0000:UD') /* CBP for Y */ +define(`MFC_AVC_PAK_OBJECT_INTRA_DW5', `0x000F000F:UD') +define(`MFC_AVC_PAK_OBJECT_INTRA_DW6', `0x04000000:UD') /* the flag of the last macroblock */ + +define(`MFC_AVC_PAK_OBJECT_INTER_DW0', `MFC_AVC_PAK_OBJECT_INTRA_DW0') +define(`MFC_AVC_PAK_OBJECT_INTER_DW1', `0x20:UD') /* 32 MVs */ +define(`MFC_AVC_PAK_OBJECT_INTER_DW2', `INTER_VME_OUTPUT_IN_BYTES:UD') /* offset, in bytes */ +define(`MFC_AVC_PAK_OBJECT_INTER_DW3', `0x014e0000:UD') /* + * (1 << 24) | PackedMvNum, Debug + * (4 << 20) | 8 MV, SNB don't use it + * (1 << 19) | CbpDcY + * (1 << 18) | CbpDcU + * (1 << 17) | CbpDcV + * (0 << 15) | Transform8x8Flag = 0 + * (0 << 14) | Frame based + * (0 << 13) | Inter MB + * (1 << 8) | MbType = P_L0_16x16 + * (0 << 7) | MBZ for frame + * (0 << 6) | MBZ + * (2 << 4) | MBZ for inter + * (0 << 3) | MBZ + * (0 << 2) | SkipMbFlag + * (0 << 0) InterMbMode + */ +define(`MFC_AVC_PAK_OBJECT_INTER_DW4', `MFC_AVC_PAK_OBJECT_INTRA_DW4') +define(`MFC_AVC_PAK_OBJECT_INTER_DW5', `MFC_AVC_PAK_OBJECT_INTRA_DW5') +define(`MFC_AVC_PAK_OBJECT_INTER_DW6', `MFC_AVC_PAK_OBJECT_INTRA_DW6') + +define(`MI_BATCH_BUFFER_END', `0x05000000:UD') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r7 reserved + * r8~r15 temporary registers + * r16 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +define(`FLAG_MASK_LAST_SLICE', `0x0001:uw') +define(`FLAG_MASK_LAST_OBJECT', `0x0002:uw') +define(`FLAG_MASK_FIRST_OBJECT', `0x0004:uw') + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`head_offset', `inline_reg0.0') /* :ud, in units of Owords */ +define(`batchbuffer_offset', `inline_reg0.4') /* :ud, in units of Owords */ +define(`tail_size', `inline_reg0.8') /* :w, in units of Owords */ +define(`head_size', `inline_reg0.10') /* :w, in units of Owords */ +define(`flags', `inline_reg0.12') /* :uw, + * bit0 the flag of the last slice + * bit1 the flag of the last object in a slice + * bit2 the flag of the first object in a slice + */ +define(`total_mbs', `inline_reg0.14') /* :w, the number of macroblock commands + * being processed by the kernel + */ +define(`mb_x', `inline_reg0.16') /* :ub, */ +define(`mb_y', `inline_reg0.17') /* :ub, */ +define(`mb_xy', `inline_reg0.16') /* :uw, */ +define(`width_in_mb', `inline_reg0.20') /* :uw, the picture width in macroblocks */ +define(`qp', `inline_reg0.22') /* :ub, */ +define(`ref_idx0', `inline_reg0.24') /* :ud */ +define(`ref_idx1', `inline_reg0.28') /* :ud */ + +/* + * GRF 8~15 -- temporary registers + */ +define(`tmp_reg0', `r8') +define(`tmp_reg1', `r9') +define(`tmp_reg2', `r10') +define(`tmp_reg3', `r11') +define(`tmp_reg4', `r12') +define(`tmp_reg5', `r13') +define(`tmp_reg6', `r14') +define(`tmp_reg7', `r15') + +define(`tmp_vme_output', `tmp_reg0') +define(`tmp_slice_header', `tmp_reg1') +define(`tmp_mfc_batchbuffer', `tmp_reg2') +define(`tmp_offset', `tmp_reg7') +/* + * GRF 16~23 write back for Oword Block Read message + */ +define(`ob_read_wb', `r16<1>:uw') +define(`ob_read_wb0', `r16') +define(`ob_read_wb1', `r17') +define(`ob_read_wb2', `r18') +define(`ob_read_wb3', `r19') +define(`ob_read_wb4', `r20') +define(`ob_read_wb5', `r21') +define(`ob_read_wb6', `r22') +define(`ob_read_wb7', `r23') + +define(`ob_read_wb_len_slice_header', `1') +define(`ob_read_wb_len_vme_intra', `1') +define(`ob_read_wb_len_vme_inter', `1') + +#ifdef DEV_SNB + +/* + * GRF 24~25 write back for Oword Block Write message + */ + +define(`ob_write_wb', `r24') +define(`ob_write_wb_length', `1') + +#else + +/* + * GRF 24~25 -- reserved + */ +define(`ob_write_wb', `null<1>:W') +define(`ob_write_wb_length', `0') + +#endif + +/* + * GRF 26~27 + */ +define(`pak_object_ud', `r26.0') +define(`pak_object0_ud', `r26.0') +define(`pak_object1_ud', `r26.4') +define(`pak_object2_ud', `r26.8') +define(`pak_object3_ud', `r26.12') +define(`pak_object4_ud', `r26.16') +define(`pak_object5_ud', `r26.20') +define(`pak_object6_ud', `r26.24') +define(`pak_object7_ud', `r26.28') +define(`pak_object8_ud', `r27.0') +define(`pak_object9_ud', `r27.4') +define(`pak_object10_ud', `r27.8') +define(`pak_object11_ud', `r27.12') + +#ifdef DEV_SNB + +/* + * Message Payload registers + */ +define(`msg_ind', `0') +define(`msg_reg0', `m0') +define(`msg_reg1', `m1') +define(`msg_reg2', `m2') +define(`msg_reg3', `m3') +define(`msg_reg4', `m4') +define(`msg_reg5', `m5') +define(`msg_reg6', `m6') +define(`msg_reg7', `m7') +define(`msg_reg8', `m8') + +#else + +/* + * Message Payload registers + */ +define(`msg_ind', `64') +define(`msg_reg0', `g64') +define(`msg_reg1', `g65') +define(`msg_reg2', `g66') +define(`msg_reg3', `g67') +define(`msg_reg4', `g68') +define(`msg_reg5', `g69') +define(`msg_reg6', `g70') +define(`msg_reg7', `g71') +define(`msg_reg8', `g72') + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_tail.asm intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_tail.asm --- intel-vaapi-driver-1.0.15/src/shaders/utils/mfc_batchbuffer_tail.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/utils/mfc_batchbuffer_tail.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,100 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +__TAIL: + (f0.1)jmpi (1) __EXIT ; + +__TAIL_LOOP: + mov (8) msg_reg0.0<1>:ud tmp_slice_header<8,8,1>:ud {align1} ; + +send (16) + msg_ind + ob_read_wb + null + data_port( + OB_CACHE_TYPE, + OB_READ, + OB_CONTROL_0, + BIND_IDX_MFC_SLICE_HEADER, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 1 + rlen ob_read_wb_len_slice_header + {align1}; + + mov (8) msg_reg0.0<1>:ud tmp_mfc_batchbuffer<8,8,1>:ud {align1} ; + mov (8) msg_reg1.0<1>:ud ob_read_wb0<8,8,1>:ud {align1} ; + +send (16) + msg_ind + ob_write_wb + null + data_port( + OB_CACHE_TYPE, + OB_WRITE, + OB_CONTROL_0, + BIND_IDX_MFC_BATCHBUFFER, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 2 + rlen ob_write_wb_length + {align1}; + + /* the new offset */ + add (1) tmp_slice_header.8<1>:ud tmp_slice_header.8<0,1,0>:ud 1:ud {align1} ; + add (1) tmp_mfc_batchbuffer.8<1>:ud tmp_mfc_batchbuffer.8<0,1,0>:ud 1:ud {align1} ; + + add.z.f0.0 (1) tail_size<1>:w tail_size<0,1,0>:w -1:w {align1}; + (-f0.0)jmpi (1) __TAIL_LOOP ; + + +__DONE: + + and.z.f0.0 (1) null<1>:uw flags<0,1,0>:uw FLAG_MASK_LAST_SLICE {align1}; + (f0.0)jmpi (1) __EXIT ; + +/* bind index 5, write 1 oword, msg type: 8(OWord Block Write) */ + mov (8) msg_reg0.0<1>:ud tmp_mfc_batchbuffer<8,8,1>:ud {align1} ; + mov (4) msg_reg1.0<1>:ud 0x0:ud {align1} ; + mov (1) msg_reg1.4<1>:ud MI_BATCH_BUFFER_END {align1} ; + +send (16) + msg_ind + ob_write_wb + null + data_port( + OB_CACHE_TYPE, + OB_WRITE, + OB_CONTROL_0, + BIND_IDX_MFC_BATCHBUFFER, + OB_WRITE_COMMIT_CATEGORY, + OB_HEADER_PRESENT + ) + mlen 2 + rlen ob_write_wb_length + {align1}; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vld/Makefile intel-vaapi-driver-1.7.1/src/shaders/vld/Makefile --- intel-vaapi-driver-1.0.15/src/shaders/vld/Makefile 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vld/Makefile 1970-01-01 00:00:00.000000000 +0000 @@ -1,384 +0,0 @@ -# Makefile.in generated by automake 1.10.1 from Makefile.am. -# i965_drv_video/shaders/vld/Makefile. Generated from Makefile.in by configure. - -# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -# 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. -# This Makefile.in is free software; the Free Software Foundation -# gives unlimited permission to copy and/or distribute it, -# with or without modifications, as long as this notice is preserved. - -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY, to the extent permitted by law; without -# even the implied warranty of MERCHANTABILITY or FITNESS FOR A -# PARTICULAR PURPOSE. - - - -pkgdatadir = $(datadir)/libva -pkglibdir = $(libdir)/libva -pkgincludedir = $(includedir)/libva -am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd -install_sh_DATA = $(install_sh) -c -m 644 -install_sh_PROGRAM = $(install_sh) -c -install_sh_SCRIPT = $(install_sh) -c -INSTALL_HEADER = $(INSTALL_DATA) -transform = $(program_transform_name) -NORMAL_INSTALL = : -PRE_INSTALL = : -POST_INSTALL = : -NORMAL_UNINSTALL = : -PRE_UNINSTALL = : -POST_UNINSTALL = : -build_triplet = x86_64-unknown-linux-gnu -host_triplet = x86_64-unknown-linux-gnu -subdir = i965_drv_video/shaders/vld -DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in -ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 -am__aclocal_m4_deps = $(top_srcdir)/configure.ac -am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ - 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IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +/* + * __START + */ +__START: + mov (16) tmp_reg0<1>:ud 0x0:ud {align1} ; + mov (16) tmp_reg2<1>:ud 0x0:ud {align1} ; + mov (1) obw_header.20<1>:ub thread_id_ub {align1}; /* dispatch id */ + + mov (8) media_object_ud<1>:ud 0x0:ud {align1} ; + mov (1) media_object0_ud<1>:ud CMD_MEDIA_OBJECT {align1} ; + mov (1) media_object1_ud<1>:ud mtype_ub<0,1,0>ub {align1}; + mov (1) media_object6_width<1>:uw width_in_mb<0,1,0>:uw {align1}; + mov (1) media_object7_flag<1>:uw transform_8x8_ub<0,1,0>ub {align1}; + mov (1) media_object7_num_mbs<1>:uw NUM_MACROBLOCKS_PER_COMMAND:uw {align1} ; + + mov (1) width_per_row<1>:ud width_in_mb<0,1,0>:uw {align1} ; + and.z.f0.1 (1) remainder_cmds<1>:ud total_mbs<0,1,0>:ud (NUM_MACROBLOCKS_PER_COMMAND - 1):ud {align1} ; + and.z.f0.0 (1) total_mbs<1>:ud total_mbs<0,1,0>:ud -NUM_MACROBLOCKS_PER_COMMAND:ud {align1} ; + + (f0.0)jmpi (1) __REMAINDER ; + +__CMD_LOOP: + mov (8) msg_reg0.0<1>:ud obw_header<8,8,1>:ud {align1}; + mov (8) msg_reg1<1>:ud media_object_ud<8,8,1>:ud {align1}; + +/* bind index 5, write 2 oword, msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + /* (x, y) of the first macroblock */ + add (1) count<1>:ud count<0,1,0>:ud NUM_MACROBLOCKS_PER_COMMAND:uw {align1} ; + math (1) quotient<1>:ud count<0,1,0>:ud width_per_row<0,1,0>:ud intdivmod {align1} ; + shl (1) quotient<1>:ud quotient<0,1,0>:ud 8:uw {align1} ; + add (1) quotient<1>:ud quotient<0,1,0>:ud remainder<0,1,0>:ud {align1} ; + mov (1) media_object6_xy<1>:uw quotient<0,1,0>:uw {align1} ; + + /* the new offset */ + add (1) obw_header.8<1>:ud obw_header.8<0,1,0>:ud 2:uw {align1} ; + + add.z.f0.0 (1) total_mbs<1>:w total_mbs<0,1,0>:w -NUM_MACROBLOCKS_PER_COMMAND:w {align1} ; + (-f0.0)jmpi (1) __CMD_LOOP ; + +__REMAINDER: + (f0.1)jmpi (1) __DONE ; + + mov (1) media_object7_num_mbs<1>:uw remainder_cmds<0,1,0>:uw {align1} ; + mov (8) msg_reg0.0<1>:ud obw_header<8,8,1>:ud {align1}; + mov (8) msg_reg1<1>:ud media_object_ud<8,8,1>:ud {align1}; + +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + /* the new offset */ + add (1) obw_header.8<1>:ud obw_header.8<0,1,0>:ud 2:uw {align1} ; + +__DONE: + +/* bind index 5, write 1 oword, msg type: 8(OWord Block Write) */ + mov (8) msg_reg0.0<1>:ud obw_header<8,8,1>:ud {align1} ; + mov (4) msg_reg1.0<1>:ud 0x0:ud {align1} ; + mov (1) msg_reg1.4<1>:ud MI_BATCH_BUFFER_END {align1} ; + +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +__EXIT: + mov (8) msg_reg0<1>:ud r0<8,8,1>:ud {align1} ; + send (16) msg_ind acc0<1>ud null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT} ; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g6a intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g6a --- intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g6a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,29 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#include "batchbuffer.inc" +#include "batchbuffer.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g6b intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g6b --- intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g6b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g6b 2016-06-03 06:06:09.000000000 +0000 @@ -0,0 +1,36 @@ + { 0x00800001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22000061, 0x00000000, 0x71000006 }, + { 0x00000001, 0x22040221, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x221a0129, 0x000000a6, 0x00000000 }, + { 0x00000001, 0x221c0229, 0x000000a4, 0x00000000 }, + { 0x00000001, 0x221e0169, 0x00000000, 0x02000200 }, + { 0x00000001, 0x21280121, 0x000000a6, 0x00000000 }, + { 0x01000005, 0x21240c21, 0x020000a0, 0x000001ff }, + { 0x01000005, 0x20a00c21, 0x000000a0, 0xfffffe00 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00600001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0200, 0x00000000 }, + { 0x05800031, 0x22401cdd, 0x00000000, 0x041b0205 }, + { 0x00000040, 0x21202c21, 0x00000120, 0x02000200 }, + { 0x0b000038, 0x21400421, 0x00000120, 0x00000128 }, + { 0x00000009, 0x21402c21, 0x00000140, 0x00080008 }, + { 0x00000040, 0x21400421, 0x00000140, 0x00000160 }, + { 0x00000001, 0x22180129, 0x00000140, 0x00000000 }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00020002 }, + { 0x01000040, 0x20a03dad, 0x000000a0, 0xfe00fe00 }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffea }, + { 0x00010020, 0x34001c00, 0x02001400, 0x0000000a }, + { 0x00000001, 0x221e0129, 0x00000124, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0200, 0x00000000 }, + { 0x05800031, 0x22401cdd, 0x00000000, 0x041b0205 }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00020002 }, + { 0x00600001, 0x20000022, 0x008d0100, 0x00000000 }, + { 0x00400001, 0x20200062, 0x00000000, 0x00000000 }, + { 0x00000001, 0x20240062, 0x00000000, 0x05000000 }, + { 0x05800031, 0x22401cdd, 0x00000000, 0x041b0005 }, + { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001cc0, 0x00000000, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g75a intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g75a --- intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g75a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g75a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "batchbuffer.inc" +#include "batchbuffer.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g75b intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g75b --- intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g75b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,36 @@ + { 0x00800001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22000061, 0x00000000, 0x71000006 }, + { 0x00000001, 0x22040221, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x221a0129, 0x000000a6, 0x00000000 }, + { 0x00000001, 0x221c0229, 0x000000a4, 0x00000000 }, + { 0x00000001, 0x221e0169, 0x00000000, 0x02000200 }, + { 0x00000001, 0x21280121, 0x000000a6, 0x00000000 }, + { 0x01000005, 0x21240c21, 0x020000a0, 0x000001ff }, + { 0x01000005, 0x20a00c21, 0x000000a0, 0xfffffe00 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000b0 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0205 }, + { 0x00000040, 0x21202c21, 0x00000120, 0x02000200 }, + { 0x0b000038, 0x21400421, 0x00000120, 0x00000128 }, + { 0x00000009, 0x21402c21, 0x00000140, 0x00080008 }, + { 0x00000040, 0x21400421, 0x00000140, 0x00000160 }, + { 0x00000001, 0x22180129, 0x00000140, 0x00000000 }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00020002 }, + { 0x01000040, 0x20a03dad, 0x000000a0, 0xfe00fe00 }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffff50 }, + { 0x00010020, 0x34001c00, 0x02001400, 0x00000050 }, + { 0x00000001, 0x221e0129, 0x00000124, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0205 }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00020002 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x00400001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28240061, 0x00000000, 0x05000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0005 }, + { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca0, 0x00000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g7a intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g7a --- intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,29 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +#include "batchbuffer.inc" +#include "batchbuffer.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g7b intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g7b --- intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.g7b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,36 @@ + { 0x00800001, 0x21000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x21400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x21140231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x22000061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22000061, 0x00000000, 0x71000006 }, + { 0x00000001, 0x22040221, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x221a0129, 0x000000a6, 0x00000000 }, + { 0x00000001, 0x221c0229, 0x000000a4, 0x00000000 }, + { 0x00000001, 0x221e0169, 0x00000000, 0x02000200 }, + { 0x00000001, 0x21280121, 0x000000a6, 0x00000000 }, + { 0x01000005, 0x21240c21, 0x020000a0, 0x000001ff }, + { 0x01000005, 0x20a00c21, 0x000000a0, 0xfffffe00 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000016 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0205 }, + { 0x00000040, 0x21202c21, 0x00000120, 0x02000200 }, + { 0x0b000038, 0x21400421, 0x00000120, 0x00000128 }, + { 0x00000009, 0x21402c21, 0x00000140, 0x00080008 }, + { 0x00000040, 0x21400421, 0x00000140, 0x00000160 }, + { 0x00000001, 0x22180129, 0x00000140, 0x00000000 }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00020002 }, + { 0x01000040, 0x20a03dad, 0x000000a0, 0xfe00fe00 }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffffea }, + { 0x00010020, 0x34001c00, 0x02001400, 0x0000000a }, + { 0x00000001, 0x221e0129, 0x00000124, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0205 }, + { 0x00000040, 0x21082c21, 0x00000108, 0x00020002 }, + { 0x00600001, 0x28000021, 0x008d0100, 0x00000000 }, + { 0x00400001, 0x28200061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28240061, 0x00000000, 0x05000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0005 }, + { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca0, 0x00000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.inc intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/batchbuffer.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/batchbuffer.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,184 @@ +/* + * Copyright © 2012 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Xiang Haihao + */ + +define(`BIND_IDX_VME', `0') +define(`BIND_IDX_VME_REF0', `1') +define(`BIND_IDX_VME_REF1', `2') +define(`BIND_IDX_OUTPUT', `3') +define(`BIND_IDX_INEP', `4') +define(`BIND_IDX_VME_BATCHBUFFER', `5') + +#ifdef DEV_SNB + +define(`OBW_CACHE_TYPE', `5') + +#else + +define(`OBW_CACHE_TYPE', `10') + +#endif + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_BIND_IDX', `BIND_IDX_VME_BATCHBUFFER') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_3', `3') /* 4 OWords */ +define(`OBW_CONTROL_4', `4') /* 8 OWords */ + +#ifdef DEV_SNB + +define(`OBW_WRITE_COMMIT_CATEGORY', `1') /* write commit on Sandybrige */ + +#else + +define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + +#endif + +define(`OBW_HEADER_PRESENT', `1') + +define(`CMD_MEDIA_OBJECT', `0x71000006:UD') +define(`MI_BATCH_BUFFER_END', `0x05000000:UD') + +define(`NUM_MACROBLOCKS_PER_COMMAND', `512') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r7 reserved + * r8~r15 temporary registers + * r16 media object command + * r17 + * r18 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`total_mbs', `inline_reg0.0') /* the number of macroblocks in a picture */ +define(`transform_8x8_ub', `inline_reg0.4') /* transform_8x8 flag */ +define(`mtype_ub', `inline_reg0.5') /* 0: INTRA, 1: INTER */ +define(`width_in_mb', `inline_reg0.6') /* the picture width in macroblocks */ + +/* + * GRF 8~15 -- temporary registers + */ +define(`tmp_reg0', `r8') +define(`obw_header', `tmp_reg0') +define(`tmp_reg1', `r9') +define(`count', `tmp_reg1.0') +define(`remainder_cmds', `tmp_reg1.4') +define(`width_per_row', `tmp_reg1.8') +define(`tmp_reg2', `r10') +define(`quotient', `tmp_reg2') +define(`tmp_reg3', `r11') +define(`remainder', `tmp_reg3') +define(`tmp_reg4', `r12') +define(`tmp_reg5', `r13') +define(`tmp_reg6', `r14') +define(`tmp_reg7', `r15') + +/* + * GRF 16 + */ +define(`media_object_ud', `r16.0') +define(`media_object0_ud', `r16.0') +define(`media_object1_ud', `r16.4') +define(`media_object2_ud', `r16.8') +define(`media_object3_ud', `r16.12') +define(`media_object4_ud', `r16.16') +define(`media_object5_ud', `r16.20') +define(`media_object6_ud', `r16.24') +define(`media_object6_xy', `r16.24') +define(`media_object6_x', `r16.24') +define(`media_object6_y', `r16.25') +define(`media_object6_width', `r16.26') +define(`media_object7_ud', `r16.28') +define(`media_object7_flag', `r16.28') +define(`media_object7_num_mbs', `r16.30') + +/* + * GRF 18 write back for Oword Block Write message + */ + +#if DEV_SNB + +define(`obw_wb', `r18') +define(`obw_wb_length', `1') + +#else + +/* + * write commit is removed on Ivybridge + */ +define(`obw_wb', `null<1>:W') +define(`obw_wb_length', `0') + +#endif + +/* + * Message Payload registers + */ +#if DEV_SNB + +define(`msg_ind', `0') +define(`msg_reg0', `m0') +define(`msg_reg1', `m1') +define(`msg_reg2', `m2') +define(`msg_reg3', `m3') +define(`msg_reg4', `m4') +define(`msg_reg5', `m5') +define(`msg_reg6', `m6') +define(`msg_reg7', `m7') +define(`msg_reg8', `m8') + +#else + +define(`msg_ind', `64') +define(`msg_reg0', `g64') +define(`msg_reg1', `g65') +define(`msg_reg2', `g66') +define(`msg_reg3', `g67') +define(`msg_reg4', `g68') +define(`msg_reg5', `g69') +define(`msg_reg6', `g70') +define(`msg_reg7', `g71') +define(`msg_reg8', `g72') + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/gen6_vme_header.inc intel-vaapi-driver-1.7.1/src/shaders/vme/gen6_vme_header.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/gen6_vme_header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/gen6_vme_header.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,160 +0,0 @@ -/* - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ -// Modual name: ME_header.inc -// -// Global symbols define -// - -/* - * Constant - */ -define(`VME_MESSAGE_TYPE_INTER', `1') -define(`VME_MESSAGE_TYPE_INTRA', `2') -define(`VME_MESSAGE_TYPE_MIXED', `3') - -define(`BLOCK_32X1', `0x0000001F') -define(`BLOCK_4X16', `0x000F0003') - -define(`LUMA_INTRA_16x16_DISABLE', `0x1') -define(`LUMA_INTRA_8x8_DISABLE', `0x2') -define(`LUMA_INTRA_4x4_DISABLE', `0x4') - -define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') -define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') -define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') -define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') - -define(`BIND_IDX_VME', `0') -define(`BIND_IDX_VME_REF0', `1') -define(`BIND_IDX_VME_REF1', `2') -define(`BIND_IDX_OUTPUT', `3') -define(`BIND_IDX_INEP', `4') - -define(`SUB_PEL_MODE_INTEGER', `0x00000000') -define(`SUB_PEL_MODE_HALF', `0x00001000') -define(`SUB_PEL_MODE_QUARTER', `0x00003000') - -define(`INTER_SAD_NONE', `0x00000000') -define(`INTER_SAD_HAAR', `0x00200000') - -define(`INTRA_SAD_NONE', `0x00000000') -define(`INTRA_SAD_HAAR', `0x00800000') - -define(`INTER_PART_MASK', `0x7E000000') - -define(`REF_REGION_SIZE', `0x2020:UW') - -define(`BI_SUB_MB_PART_MASK', `0x0c000000') -define(`MAX_NUM_MV', `0x00000020') -define(`SEARCH_PATH_LEN', `0x00003F3F') - -define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') - -define(`OBW_CACHE_TYPE', `5') - -define(`OBW_MESSAGE_TYPE', `8') - -define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') - -define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ -define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ -define(`OBW_CONTROL_2', `2') /* 2 OWords */ -define(`OBW_CONTROL_3', `3') /* 4 OWords */ - -define(`OBW_WRITE_COMMIT_CATEGORY', `1') /* write commit on Sandybrige */ - -define(`OBW_HEADER_PRESENT', `1') - -/* GRF registers - * r0 header - * r1~r4 constant buffer (reserved) - * r5 inline data - * r6~r11 reserved - * r12 write back of VME message - * r13 write back of Oword Block Write - */ -/* - * GRF 0 -- header - */ -define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ - -/* - * GRF 1~4 -- Constant Buffer (reserved) - */ - -/* - * GRF 5 -- inline data - */ -define(`inline_reg0', `r5') -define(`w_in_mb_uw', `inline_reg0.2') -define(`orig_xy_ub', `inline_reg0.0') -define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ -define(`orig_y_ub', `inline_reg0.1') - -/* - * GRF 6~11 -- reserved - */ - -/* - * GRF 12~15 -- write back for VME message - */ -define(`vme_wb', `r12') -define(`vme_wb0', `r12') -define(`vme_wb1', `r13') -define(`vme_wb2', `r14') -define(`vme_wb3', `r15') - -/* - * GRF 16 -- write back for Oword Block Write message with write commit bit - */ -define(`obw_wb', `r16') -define(`obw_wb_length', `1') - -/* - * GRF 18~21 -- Intra Neighbor Edge Pixels - */ -define(`INEP_ROW', `r18') -define(`INEP_COL0', `r20') -define(`INEP_COL1', `r21') - -/* - * temporary registers - */ -define(`tmp_reg0', `r32') -define(`tmp_reg1', `r33') -define(`intra_part_mask_ub', `tmp_reg1.28') -define(`mb_intra_struct_ub', `tmp_reg1.29') -define(`tmp_reg2', `r34') -define(`tmp_x_w', `tmp_reg2.0') -define(`tmp_reg3', `r35') - -/* - * MRF registers - */ -define(`msg_ind', `0') -define(`msg_reg0', `m0') /* m0 */ -define(`msg_reg1', `m1') /* m1 */ -define(`msg_reg2', `m2') /* m2 */ -define(`msg_reg3', `m3') /* m3 */ -define(`msg_reg4', `m4') /* m4 */ - -/* - * VME message payload - */ -define(`vme_msg_length', `4') -define(`vme_intra_wb_length', `1') -define(`vme_inter_wb_length', `4') -define(`vme_msg_ind', `msg_ind') -define(`vme_msg_0', `msg_reg0') -define(`vme_msg_1', `msg_reg1') -define(`vme_msg_2', `msg_reg2') -define(`vme_msg_3', `vme_msg_2') -define(`vme_msg_4', `msg_reg3') - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/gen7_vme_header.inc intel-vaapi-driver-1.7.1/src/shaders/vme/gen7_vme_header.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/gen7_vme_header.inc 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/gen7_vme_header.inc 1970-01-01 00:00:00.000000000 +0000 @@ -1,164 +0,0 @@ -/* - * Copyright © <2010>, Intel Corporation. - * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. - * - */ -// Modual name: ME_header.inc -// -// Global symbols define -// - -/* - * Constant - */ -define(`VME_MESSAGE_TYPE_INTER', `1') -define(`VME_MESSAGE_TYPE_INTRA', `2') -define(`VME_MESSAGE_TYPE_MIXED', `3') - -define(`BLOCK_32X1', `0x0000001F') -define(`BLOCK_4X16', `0x000F0003') - -define(`LUMA_INTRA_16x16_DISABLE', `0x1') -define(`LUMA_INTRA_8x8_DISABLE', `0x2') -define(`LUMA_INTRA_4x4_DISABLE', `0x4') - -define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') -define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') -define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') -define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') - -define(`BIND_IDX_VME', `1') -define(`BIND_IDX_VME_REF0', `2') -define(`BIND_IDX_VME_REF1', `3') -define(`BIND_IDX_OUTPUT', `0') -define(`BIND_IDX_INEP', `4') - -define(`SUB_PEL_MODE_INTEGER', `0x00000000') -define(`SUB_PEL_MODE_HALF', `0x00001000') -define(`SUB_PEL_MODE_QUARTER', `0x00003000') - -define(`INTER_SAD_NONE', `0x00000000') -define(`INTER_SAD_HAAR', `0x00200000') - -define(`INTRA_SAD_NONE', `0x00000000') -define(`INTRA_SAD_HAAR', `0x00800000') - -define(`INTER_PART_MASK', `0x7E000000') - -define(`REF_REGION_SIZE', `0x2020:UW') - -define(`BI_SUB_MB_PART_MASK', `0x0c000000') -define(`MAX_NUM_MV', `0x00000020') -define(`SEARCH_PATH_LEN', `0x00003F3F') - -define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') - -define(`OBW_CACHE_TYPE', `10') - -define(`OBW_MESSAGE_TYPE', `8') - -define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') - -define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ -define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ -define(`OBW_CONTROL_2', `2') /* 2 OWords */ -define(`OBW_CONTROL_3', `3') /* 4 OWords */ - -define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ - -define(`OBW_HEADER_PRESENT', `1') - -/* GRF registers - * r0 header - * r1~r4 constant buffer (reserved) - * r5 inline data - * r6~r11 reserved - * r12 write back of VME message - * r13 write back of Oword Block Write - */ -/* - * GRF 0 -- header - */ -define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ - -/* - * GRF 1~4 -- Constant Buffer (reserved) - */ - -/* - * GRF 5 -- inline data - */ -define(`inline_reg0', `r5') -define(`w_in_mb_uw', `inline_reg0.2') -define(`orig_xy_ub', `inline_reg0.0') -define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ -define(`orig_y_ub', `inline_reg0.1') - -/* - * GRF 6~11 -- reserved - */ - -/* - * GRF 12~15 -- write back for VME message - */ -define(`vme_wb', `r12') -define(`vme_wb0', `r12') -define(`vme_wb1', `r13') -define(`vme_wb2', `r14') -define(`vme_wb3', `r15') - -/* - * GRF 16 -- reserved - */ -/* - * write commit is removed on Ivybridge - */ -define(`obw_wb', `null<1>:W') -define(`obw_wb_length', `0') -/* - * GRF 18~21 -- Intra Neighbor Edge Pixels - */ -define(`INEP_ROW', `r18') -define(`INEP_COL0', `r20') -define(`INEP_COL1', `r21') - -/* - * temporary registers - */ -define(`tmp_reg0', `r32') -define(`tmp_reg1', `r33') -define(`intra_part_mask_ub', `tmp_reg1.28') -define(`mb_intra_struct_ub', `tmp_reg1.29') -define(`tmp_reg2', `r34') -define(`tmp_x_w', `tmp_reg2.0') -define(`tmp_reg3', `r35') - -/* - * Message Payload registers - */ -define(`msg_ind', `64') -define(`msg_reg0', `g64') -define(`msg_reg1', `g65') -define(`msg_reg2', `g66') -define(`msg_reg3', `g67') -define(`msg_reg4', `g68') - -/* - * VME message payload - */ -define(`vme_msg_length', `5') -define(`vme_intra_wb_length', `1') -define(`vme_inter_wb_length', `6') -define(`vme_msg_ind', `msg_ind') -define(`vme_msg_0', `msg_reg0') -define(`vme_msg_1', `msg_reg1') -define(`vme_msg_2', `msg_reg2') -define(`vme_msg_3', `msg_reg3') -define(`vme_msg_4', `msg_reg4') - - - - diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen8.asm intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen8.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,891 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * Authors: Zhao Yakui + */ +// Modual name: Inter_bframe_haswell.asm +// +// Make inter predition estimation for Inter frame for B-frame +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +mov (8) vme_m1.0<1>:ud 0:ud {align1}; +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (2) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (2) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK1:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mba_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mba_result.20<1>:w 0:w {align1}; +(f0.0) mov (1) mba_result.4<1>:ud mb_mv1.8<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mbb_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mba_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mba_result.22<1>:w 0:w {align1}; +(f0.0) mov (1) mba_result.8<1>:ud mb_mv1.12<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mbb_start; +mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1}; +mov (2) mba_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mba_result.20<1>:w 0:w {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (2) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (2) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbc_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbb_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbb_result.20<1>:w 0:w {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mb_mv2.16<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mbc_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbb_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbb_result.22<1>:w 0:w {align1}; +(f0.0) mov (1) mbb_result.8<1>:ud mb_mv2.20<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mbc_start; +mov (2) mbb_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbb_result.20<1>:w 0:w {align1}; +mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (2) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.20<1>:w 0:w {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mb_mv2.16<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mb_mvp_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.22<1>:w 0:w {align1}; +(f0.0) mov (1) mbc_result.8<1>:ud mb_mv2.20<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbc_result.20<1>:w 0:w {align1}; +mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (2) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +cmp.l.f0.0 (2) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK3:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.20<1>:w 0:w {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mb_mv3.24<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mb_mvp_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.22<1>:w 0:w {align1}; +(f0.0) mov (1) mbc_result.8<1>:ud mb_mv3.28<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbc_result.20<1>:w 0:w {align1}; +mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are inavailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (2) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (2) mbb_result.4<1>:ud mba_result.4<2,2,1>:ud {align1}; +(f0.0) mov (2) mbc_result.4<1>:ud mba_result.4<2,2,1>:ud {align1}; +(f0.0) mov (2) mbb_result.20<1>:uw mba_result.20<2,2,1>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:uw mba_result.20<2,2,1>:uw {align1}; +(f0.0) mov (2) mb_mvp_ref.0<1>:ud mba_result.4<2,2,1>:ud {align1}; +(-f0.0) mov (2) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* forward_MVP */ +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mvp_backward; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + + +mvp_backward: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.22<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.8<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.22<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.8<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.22<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.8<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.4<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.8<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.8<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.8<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.4<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.10<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.10<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.10<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.6<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: +asr (4) mb_ref_win.0<1>:w mb_mvp_ref.0<4,4,1>:w 2:w {align1}; +add (4) mb_ref_win.8<1>:w mb_ref_win.0<4,4,1>:w 3:w {align1}; +and (4) mb_ref_win.16<1>:uw mb_ref_win.8<4,4,1>:uw 0xFFFC:uw {align1}; +/* m2, get the MV/Mb cost passed from constant buffer when +spawning thread by MEDIA_OBJECT */ +mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; +/* m3 cost center */ +mov (8) vme_m3.0<1>:ud 0x0:ud {align1}; +mov (8) vme_msg_3<1>:UD vme_m3.0<8,8,1>:UD {align1}; + +/* m4. skip center */ +mov (8) vme_msg_4<1>:ud 0x0:ud {align1}; + +/* m5 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_5<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; +/* Use the Luma mode */ +mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1}; +mov (1) vme_msg_5.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m6 */ +mov (8) vme_msg_6<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_6.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_6.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_6.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_6.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m7 */ + +mov (4) vme_msg_7.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_7.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * SIC VME message + */ +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* m0 */ +mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_DUAL_REFERENCE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW DREF_REGION_SIZE {align1}; +/* Dual Reference Width&Height,32x32 */ + +mov (1) vme_m0.0<1>:UD vme_m0.8<0,1,0>:UD {align1}; + +/* Reference = (x-8,y-8)-(x+8,y+8) */ +add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -8:W {align1}; +add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -8:W {align1}; + +mov (1) vme_m0.0<1>:W -8:W {align1}; +mov (1) vme_m0.2<1>:W -8:W {align1}; + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1}; +(f0.0) add (1) vme_m0.4<1>:w vme_m0.4<0,1,0>:w 4:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1}; +(f0.0) add (1) vme_m0.6<1>:w vme_m0.6<0,1,0>:w 4:w {align1}; + +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.20<2,2,1>:w {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD DSTART_CENTER + DSEARCH_PATH_LEN:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + + +/* Setup the Cost center */ +/* currently four 8x8 share the same cost center */ +mov (4) vme_m3.0<2>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (4) vme_m3.4<2>:ud mb_mvp_ref.4<0,1,0>:ud {align1}; + +/* M4/M5 search path */ + +mov (1) vme_msg_4.0<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_4.16<1>:UD 0x0:UD {align1}; +mov (8) vme_msg_5.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_4.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_7.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + + /* 16x16 Source, 1/4 pixel, harr, BME ENABLE */ +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER + FBR_BME_ENABLE:UD {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) tmp_reg0.0<1>:uw BI_WEIGHT {align1}; +mov (1) vme_m1.6<1>:UB tmp_reg0.0<0,1,0>:ub {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; +mov (8) vme_msg_3.0<1>:UD vme_m3.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; +/* write FME info */ +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; + +mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* Inter distortion of FME */ +mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1}; + +mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1}; + +/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME MV */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_8, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; + +/* Write FME/BME RefID */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; +/* Compare three word data to get the min value */ +word_imin: + cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +/* Compare three word data to get the max value */ +word_imax: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + +mb_pred_func: + mov (8) TEMP_VAR0.0<1>:ud 0:ud {align1}; + mov (1) TEMP_VAR0.0<1>:ub INPUT_ARG0.2<0,1,0>:ub {align1}; + and (1) TEMP_VAR0.4<1>:uw INPUT_ARG0.4<0,1,0>:uw INTER_MASK:uw {align1}; + /* INTER16x16 mode. The bit1-0 is the prediction mode */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<0,1,0>:uw INTER_16X16MODE:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + /* Check whether it is INTER8x8 mode. */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<0,1,0>:uw INTER_8X8MODE:uw {align1}; + (f0.0) jmpi (1) mb_pred_func_8; + + /* Check whether it is INTER16x8 mode. */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<0,1,0>:uw INTER_16X8MODE:uw {align1}; + (f0.0) jmpi (1) mb_pred_func_168; +mb_pred_func_816: + /* Block 0/2 uses the bit1-0. Block 1/3 uses the bit3-2 */ + mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1}; + and.z.f0.0 (1) null:uw TEMP_VAR0.8<0,1,0>:uw INTER_BLOCK1:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<0,1,0>:uw PRED_MASK {align1}; + jmpi (1) end_mb_pred; + +mb_pred_func_168: + /* Block 0/1 uses the bit1-0. Block 2/3 uses the bit3-2 */ + mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1}; + cmp.l.f0.0 (1) null:uw TEMP_VAR0.8<0,1,0>:uw INTER_BLOCK2:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<0,1,0>:uw PRED_MASK {align1}; + jmpi (1) end_mb_pred; + +mb_pred_func_8: + /* 8X8 mode. Every block uses two bits as the prediction mode. */ + mul (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw 2:uw {align1}; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw TEMP_VAR0.8<0,1,0>:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<0,1,0>:uw PRED_MASK {align1}; +end_mb_pred: + RETURN {align1}; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen8.g8a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen8.g8a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen8.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen8.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "inter_bframe_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen8.g8b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen8.g8b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen8.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen8.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,423 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23800a88, 0x0e000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a00a88, 0x0e000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26000a88, 0x0e000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26200a88, 0x0e000800, 0x02190006 }, + { 0x00600001, 0x24600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000d60 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01200005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000210 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000001 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00001490 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2af01e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2af41e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2ae40208, 0x00000bc8, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2af21e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2af61e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2ae80208, 0x00000bcc, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00200001, 0x2ae40208, 0x00450bc8, 0x00000000 }, + { 0x00200001, 0x2af01e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2af41e68, 0x18000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01200005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000006c0 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00001230 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2b101e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b141e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000bf0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2b121e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b161e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b080208, 0x00000bf4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00200001, 0x2b101e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2b141e68, 0x18000000, 0x00000000 }, + { 0x00200001, 0x2b040208, 0x00450bf0, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000230 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000003c0 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000fe0 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000bf0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000002e0 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2b321e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b361e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b280208, 0x00000bf4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000290 }, + { 0x00200001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00200001, 0x2b240208, 0x00450bf0, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000250 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01200005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000210 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000003 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000d80 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000c18, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2b321e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b361e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b280208, 0x00000c1c, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00200001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00200001, 0x2b240208, 0x00450c18, 0x00000000 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02200010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00210001, 0x2b040208, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b240208, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b141248, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2b341248, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2ac00208, 0x00450ae4, 0x00000000 }, + { 0x00310001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000320 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000009d0 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000970 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af6, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae8, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b16, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b08, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b36, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b28, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac40208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae8, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b08, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b28, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000840 }, + { 0x00000001, 0x2ac41a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000aea, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b0a, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b2a, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000007e0 }, + { 0x00000001, 0x2ac61a68, 0x00000fe4, 0x00000000 }, + { 0x0040000c, 0x2a801a68, 0x1e690ac0, 0x00020002 }, + { 0x00400040, 0x2a881a68, 0x1e690a80, 0x00030003 }, + { 0x00400005, 0x2a901248, 0x16690a88, 0xfffcfffc }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x25800608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a4, 0x00010001 }, + { 0x00010001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00200700 }, + { 0x00000001, 0x24561648, 0x10000000, 0x20202020 }, + { 0x00000001, 0x24400208, 0x00000448, 0x00000000 }, + { 0x00000040, 0x24401a68, 0x1e000440, 0xfff8fff8 }, + { 0x00000040, 0x24421a68, 0x1e000442, 0xfff8fff8 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff8fff8 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff8fff8 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x00040004 }, + { 0x00010040, 0x24441a68, 0x1e000444, 0x00040004 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00040004 }, + { 0x00010040, 0x24461a68, 0x1e000446, 0x00040004 }, + { 0x00200040, 0x24401a68, 0x1a450440, 0x00450a90 }, + { 0x00200040, 0x24441a68, 0x1a450444, 0x00450a94 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x00001212 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000ac0, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000ac4, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28880608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x288c0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28900608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x0e000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00203000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x24662288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10786000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x0a0a0403 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x0e000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x00600001, 0x2f600608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x2f602288, 0x00000fa2, 0x00000000 }, + { 0x00000005, 0x2f641248, 0x16000fa4, 0x00030003 }, + { 0x01000010, 0x20001240, 0x16000f64, 0x00000000 }, + { 0x00010005, 0x2fe41248, 0x16000f60, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000150 }, + { 0x01000010, 0x20001240, 0x16000f64, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000100 }, + { 0x01000010, 0x20001240, 0x16000f64, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x00000001, 0x2f681248, 0x00000fa8, 0x00000000 }, + { 0x01000005, 0x20001240, 0x16000f68, 0x00010001 }, + { 0x00010005, 0x2fe41248, 0x16000f60, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000d0 }, + { 0x00000008, 0x2f701248, 0x16000f60, 0x00020002 }, + { 0x00000005, 0x2fe41248, 0x16000f70, 0x00030003 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x00000001, 0x2f681248, 0x00000fa8, 0x00000000 }, + { 0x05000010, 0x20001240, 0x16000f68, 0x00020002 }, + { 0x00010005, 0x2fe41248, 0x16000f60, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x00000008, 0x2f701248, 0x16000f60, 0x00020002 }, + { 0x00000005, 0x2fe41248, 0x16000f70, 0x00030003 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00000041, 0x2f681248, 0x16000fa8, 0x00020002 }, + { 0x00000008, 0x2f701248, 0x12000f60, 0x00000f68 }, + { 0x00000005, 0x2fe41248, 0x16000f70, 0x00030003 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen9.g9a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen9.g9a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen9.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen9.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "inter_bframe_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen9.g9b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen9.g9b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_gen9.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_gen9.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,423 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x23800a88, 0x06000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x23a00a88, 0x06000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x26000a88, 0x06000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x26200a88, 0x06000800, 0x02190006 }, + { 0x00600001, 0x24600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000d60 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01200005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000210 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000001 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00001490 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2af01e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2af41e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2ae40208, 0x00000bc8, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2af21e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2af61e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2ae80208, 0x00000bcc, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00200001, 0x2ae40208, 0x00450bc8, 0x00000000 }, + { 0x00200001, 0x2af01e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2af41e68, 0x18000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01200005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000006c0 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00001230 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2b101e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b141e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000bf0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2b121e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b161e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b080208, 0x00000bf4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00200001, 0x2b101e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2b141e68, 0x18000000, 0x00000000 }, + { 0x00200001, 0x2b040208, 0x00450bf0, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000230 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000003c0 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000fe0 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000bf0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000002e0 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2b321e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b361e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b280208, 0x00000bf4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000290 }, + { 0x00200001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00200001, 0x2b240208, 0x00450bf0, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000250 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01200005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000210 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05200010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00000001, 0x2fa00208, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40208, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80608, 0x00000000, 0x00000003 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000d80 }, + { 0x00000001, 0x2aa01248, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00000000 }, + { 0x00010001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000c18, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x01000010, 0x20001240, 0x16000aa0, 0x00010001 }, + { 0x00010001, 0x2b321e48, 0x18000000, 0x00010001 }, + { 0x00010001, 0x2b361e68, 0x18000000, 0x00000000 }, + { 0x00010001, 0x2b280208, 0x00000c1c, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00200001, 0x2b301e48, 0x18000000, 0x00010001 }, + { 0x00200001, 0x2b341e68, 0x18000000, 0x00000000 }, + { 0x00200001, 0x2b240208, 0x00450c18, 0x00000000 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02200010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00210001, 0x2b040208, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b240208, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b141248, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2b341248, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2ac00208, 0x00450ae4, 0x00000000 }, + { 0x00310001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000320 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000009d0 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000970 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af6, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae8, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b16, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b08, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b36, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b28, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac40208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae8, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b08, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b28, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000840 }, + { 0x00000001, 0x2ac41a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000aea, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b0a, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b2a, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000007e0 }, + { 0x00000001, 0x2ac61a68, 0x00000fe4, 0x00000000 }, + { 0x0040000c, 0x2a801a68, 0x1e690ac0, 0x00020002 }, + { 0x00400040, 0x2a881a68, 0x1e690a80, 0x00030003 }, + { 0x00400005, 0x2a901248, 0x16690a88, 0xfffcfffc }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x25800608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a4, 0x00010001 }, + { 0x00010001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00200700 }, + { 0x00000001, 0x24561648, 0x10000000, 0x20202020 }, + { 0x00000001, 0x24400208, 0x00000448, 0x00000000 }, + { 0x00000040, 0x24401a68, 0x1e000440, 0xfff8fff8 }, + { 0x00000040, 0x24421a68, 0x1e000442, 0xfff8fff8 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff8fff8 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff8fff8 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x00040004 }, + { 0x00010040, 0x24441a68, 0x1e000444, 0x00040004 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00040004 }, + { 0x00010040, 0x24461a68, 0x1e000446, 0x00040004 }, + { 0x00200040, 0x24401a68, 0x1a450440, 0x00450a90 }, + { 0x00200040, 0x24441a68, 0x1a450444, 0x00450a94 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x00001212 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000ac0, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000ac4, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28880608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x288c0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28900608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x06000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00203000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x24662288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10786000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x0a0a0403 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x06000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x00600001, 0x2f600608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x2f602288, 0x00000fa2, 0x00000000 }, + { 0x00000005, 0x2f641248, 0x16000fa4, 0x00030003 }, + { 0x01000010, 0x20001240, 0x16000f64, 0x00000000 }, + { 0x00010005, 0x2fe41248, 0x16000f60, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000150 }, + { 0x01000010, 0x20001240, 0x16000f64, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000100 }, + { 0x01000010, 0x20001240, 0x16000f64, 0x00010001 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x00000001, 0x2f681248, 0x00000fa8, 0x00000000 }, + { 0x01000005, 0x20001240, 0x16000f68, 0x00010001 }, + { 0x00010005, 0x2fe41248, 0x16000f60, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000d0 }, + { 0x00000008, 0x2f701248, 0x16000f60, 0x00020002 }, + { 0x00000005, 0x2fe41248, 0x16000f70, 0x00030003 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x00000001, 0x2f681248, 0x00000fa8, 0x00000000 }, + { 0x05000010, 0x20001240, 0x16000f68, 0x00020002 }, + { 0x00010005, 0x2fe41248, 0x16000f60, 0x00030003 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x00000008, 0x2f701248, 0x16000f60, 0x00020002 }, + { 0x00000005, 0x2fe41248, 0x16000f70, 0x00030003 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x00000041, 0x2f681248, 0x16000fa8, 0x00020002 }, + { 0x00000008, 0x2f701248, 0x12000f60, 0x00000f68 }, + { 0x00000005, 0x2fe41248, 0x16000f70, 0x00030003 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_haswell.asm intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_haswell.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_haswell.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_haswell.asm 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,878 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * Authors: Zhao Yakui + */ +// Modual name: Inter_bframe_haswell.asm +// +// Make inter predition estimation for Inter frame for B-frame +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +mov (8) vme_m1.0<1>:ud 0:ud {align1}; +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1}; +mov (2) mba_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK1:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mba_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mba_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbb_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mba_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mba_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (2) mba_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mba_result.20<1>:w 0:w {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbc_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (2) mbb_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbb_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbb_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbc_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbb_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbb_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbc_start; +mov (2) mbb_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbb_result.20<1>:w 0:w {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (2) mbc_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbc_result.20<1>:w 0:w {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1}; +mov (2) mbc_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_inter_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_inter_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK3:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +mov (1) mbc_result.18<1>:w MB_PRED_FLAG {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbc_result.20<1>:w 0:w {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are inavailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (2) mbb_result.4<1>:ud mba_result.4<2,2,1>:ud {align1}; +(f0.0) mov (2) mbc_result.4<1>:ud mba_result.4<2,2,1>:ud {align1}; +(f0.0) mov (2) mbb_result.20<1>:uw mba_result.20<2,2,1>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:uw mba_result.20<2,2,1>:uw {align1}; +(f0.0) mov (2) mb_mvp_ref.0<1>:ud mba_result.4<2,2,1>:ud {align1}; +(-f0.0) mov (2) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* forward_MVP */ +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mvp_backward; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + + +mvp_backward: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.22<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.8<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.22<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.8<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.22<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.8<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.4<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.8<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.8<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.8<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.4<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.10<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.10<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.10<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.6<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: +asr (4) mb_ref_win.0<1>:w mb_mvp_ref.0<4,4,1>:w 2:w {align1}; +add (4) mb_ref_win.8<1>:w mb_ref_win.0<4,4,1>:w 3:w {align1}; +and (4) mb_ref_win.16<1>:uw mb_ref_win.8<4,4,1>:uw 0xFFFC:uw {align1}; +/* m2, get the MV/Mb cost passed from constant buffer when +spawning thread by MEDIA_OBJECT */ +mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_4<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m5 */ +mov (8) vme_msg_5<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_5.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_5.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_5.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_5.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m6 */ + +mov (4) vme_msg_6.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_6.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * SIC VME message + */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1}; +/* Use the Luma mode */ +mov (1) vme_msg_4.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_DUAL_REFERENCE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW DREF_REGION_SIZE {align1}; +/* Dual Reference Width&Height,32x32 */ + +mov (1) vme_m0.0<1>:UD vme_m0.8<0,1,0>:UD {align1}; + +/* Reference = (x-8,y-8)-(x+8,y+8) */ +add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -8:W {align1}; +add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -8:W {align1}; + +mov (1) vme_m0.0<1>:W -8:W {align1}; +mov (1) vme_m0.2<1>:W -8:W {align1}; + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1}; +(f0.0) add (1) vme_m0.4<1>:w vme_m0.4<0,1,0>:w 4:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1}; +(f0.0) add (1) vme_m0.6<1>:w vme_m0.6<0,1,0>:w 4:w {align1}; + +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.20<2,2,1>:w {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD DSTART_CENTER + DSEARCH_PATH_LEN:UD {align1}; +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mb_mvp_ref.4<0,1,0>:ud {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; +/* M3/M4 search path */ + +mov (1) vme_msg_3.0<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.4<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_3.8<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_3.16<1>:UD 0x0:UD {align1}; +mov (8) vme_msg_4.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_3.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_4.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + + /* 16x16 Source, 1/4 pixel, harr, BME ENABLE */ +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER + FBR_BME_ENABLE:UD {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) tmp_reg0.0<1>:uw BI_WEIGHT {align1}; +mov (1) vme_m1.6<1>:UB tmp_reg0.0<0,1,0>:ub {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; +/* write FME info */ +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; + +mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* Inter distortion of FME */ +mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1}; + +mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1}; + +/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME MV */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_8, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; + +/* Write FME/BME RefID */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + obw_wb + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; +/* Compare three word data to get the min value */ +word_imin: + cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +/* Compare three word data to get the max value */ +word_imax: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + +mb_pred_func: + mov (8) TEMP_VAR0.0<1>:ud 0:ud {align1}; + mov (1) TEMP_VAR0.0<1>:ub INPUT_ARG0.2<0,1,0>:ub {align1}; + and (1) TEMP_VAR0.4<1>:uw INPUT_ARG0.4<0,1,0>:uw INTER_MASK:uw {align1}; + /* INTER16x16 mode. The bit1-0 is the prediction mode */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_16X16MODE:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + /* Check whether it is INTER8x8 mode. */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_8X8MODE:uw {align1}; + (f0.0) jmpi (1) mb_pred_func_8; + + /* Check whether it is INTER16x8 mode. */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_16X8MODE:uw {align1}; + (f0.0) jmpi (1) mb_pred_func_168; +mb_pred_func_816: + /* Block 0/2 uses the bit1-0. Block 1/3 uses the bit3-2 */ + mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1}; + and.z.f0.0 (1) null:uw TEMP_VAR0.8<1>:uw INTER_BLOCK1:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1}; + jmpi (1) end_mb_pred; + +mb_pred_func_168: + /* Block 0/1 uses the bit1-0. Block 2/3 uses the bit3-2 */ + mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1}; + cmp.l.f0.0 (1) null:uw TEMP_VAR0.8<1>:uw INTER_BLOCK2:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1}; + jmpi (1) end_mb_pred; + +mb_pred_func_8: + /* 8X8 mode. Every block uses two bits as the prediction mode. */ + mul (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw 2:uw {align1}; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw TEMP_VAR0.8<0,1,0>:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1}; +end_mb_pred: + RETURN {align1}; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_haswell.g75a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_haswell.g75a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_haswell.g75a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_haswell.g75a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme75.inc" +#include "inter_bframe_haswell.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_haswell.g75b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_haswell.g75b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_haswell.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_haswell.g75b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,413 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x00000018 }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23801cb1, 0x00000800, 0x02190004 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a01cb1, 0x00000800, 0x02290004 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00030003 }, + { 0x00000041, 0x24003ca5, 0x00000400, 0x00020002 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26001cb1, 0x00000800, 0x02190006 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00030003 }, + { 0x00000041, 0x24203ca5, 0x00000420, 0x00020002 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x00070003 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26201cb1, 0x00000800, 0x02190006 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000ce0 }, + { 0x00600001, 0x2ae00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000001f0 }, + { 0x00000001, 0x2ae000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000140 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2ae40021, 0x00450bc8, 0x00000000 }, + { 0x00200001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000001 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000013e0 }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2af001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2af401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2af201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2af601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00200001, 0x2af001e9, 0x00000000, 0x00010001 }, + { 0x00200001, 0x2af401ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000660 }, + { 0x00000001, 0x2b0000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000140 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b040021, 0x00450bf0, 0x00000000 }, + { 0x00200001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000011a0 }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2b1001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b1401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2b1201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b1601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00200001, 0x2b1001e9, 0x00000000, 0x00010001 }, + { 0x00200001, 0x2b1401ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00080008 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000210 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000040, 0x24003dad, 0x00000400, 0x00010001 }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000380 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450bf0, 0x00000000 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000f70 }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000002a0 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2b3201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000260 }, + { 0x00200001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000230 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000200 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000150 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01cb1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450c18, 0x00000000 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000003 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000d40 }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2b3201ed, 0x00000000, 0x00010001 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2b3201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00200001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00000040, 0x240014a5, 0x00000b00, 0x00000b20 }, + { 0x01000010, 0x20001ca4, 0x00000400, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x02000010, 0x20001ca4, 0x00000ae0, 0x00000000 }, + { 0x00210001, 0x2b040021, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b240021, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b140129, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2b340129, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2ac00021, 0x00450ae4, 0x00000000 }, + { 0x00310001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000320 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af4, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b14, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b34, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac00021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000c0 }, + { 0x00000001, 0x2fa001ad, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000009b0 }, + { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000950 }, + { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af6, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae8, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b16, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b08, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b36, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b28, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac40021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000c0 }, + { 0x00000001, 0x2fa001ad, 0x00000ae8, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b08, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b28, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000820 }, + { 0x00000001, 0x2ac401ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000aea, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b0a, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b2a, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000007c0 }, + { 0x00000001, 0x2ac601ad, 0x00000fe4, 0x00000000 }, + { 0x0040000c, 0x2a803dad, 0x00690ac0, 0x00020002 }, + { 0x00400040, 0x2a883dad, 0x00690a80, 0x00030003 }, + { 0x00400005, 0x2a902d29, 0x00690a88, 0xfffcfffc }, + { 0x00600001, 0x25600021, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840c21, 0x00000384, 0xff000000 }, + { 0x00600001, 0x28800021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28a00231, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28b00061, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28bc0061, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28b40129, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28d00021, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28c00129, 0x00ae0622, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00010001 }, + { 0x00000001, 0x28850231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c00f1, 0x00000000, 0x00000002 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00200020 }, + { 0x00000001, 0x247e0231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e782000 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28300129, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340021, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0021, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00200700 }, + { 0x00000001, 0x24560169, 0x00000000, 0x20202020 }, + { 0x00000001, 0x24400021, 0x00000448, 0x00000000 }, + { 0x00000040, 0x24403dad, 0x00000440, 0xfff8fff8 }, + { 0x00000040, 0x24423dad, 0x00000442, 0xfff8fff8 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00010040, 0x24403dad, 0x00000440, 0x00040004 }, + { 0x00010040, 0x24443dad, 0x00000444, 0x00040004 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00010040, 0x24423dad, 0x00000442, 0x00040004 }, + { 0x00010040, 0x24463dad, 0x00000446, 0x00040004 }, + { 0x00200040, 0x244035ad, 0x00450440, 0x00450a90 }, + { 0x00200040, 0x244435ad, 0x00450444, 0x00450a94 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x00001212 }, + { 0x00000001, 0x24700021, 0x00000ac0, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000ac4, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28600061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28640061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28680061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x286c0061, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28700061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28900061, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21801ca1, 0x00000800, 0x0a784000 }, + { 0x00000001, 0x25740061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25750231, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25760231, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24002d29, 0x00000180, 0x00030003 }, + { 0x00000001, 0x25740231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00203000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00200020 }, + { 0x00000001, 0x24660231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e786000 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000002 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0003 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000001 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x0a0a0403 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x0a800031, 0x20001cac, 0x00000b40, 0x0219e003 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000a0 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x00600001, 0x2f600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x2f600231, 0x00000fa2, 0x00000000 }, + { 0x00000005, 0x2f642d29, 0x00000fa4, 0x00030003 }, + { 0x01000010, 0x20002d28, 0x00200f64, 0x00000000 }, + { 0x00010005, 0x2fe42d29, 0x00000f60, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000150 }, + { 0x01000010, 0x20002d28, 0x00200f64, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000100 }, + { 0x01000010, 0x20002d28, 0x00200f64, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x00000001, 0x2f680129, 0x00000fa8, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x00200f68, 0x00010001 }, + { 0x00010005, 0x2fe42d29, 0x00000f60, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d0 }, + { 0x00000008, 0x2f702d29, 0x00000f60, 0x00020002 }, + { 0x00000005, 0x2fe42d29, 0x00200f70, 0x00030003 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000a0 }, + { 0x00000001, 0x2f680129, 0x00000fa8, 0x00000000 }, + { 0x05000010, 0x20002d28, 0x00200f68, 0x00020002 }, + { 0x00010005, 0x2fe42d29, 0x00000f60, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x00000008, 0x2f702d29, 0x00000f60, 0x00020002 }, + { 0x00000005, 0x2fe42d29, 0x00200f70, 0x00030003 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x00000041, 0x2f682d29, 0x00000fa8, 0x00020002 }, + { 0x00000008, 0x2f702529, 0x00000f60, 0x00000f68 }, + { 0x00000005, 0x2fe42d29, 0x00200f70, 0x00030003 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_ivb.asm intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_ivb.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_ivb.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_ivb.asm 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,759 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * Authors: Zhao Yakui + * + */ +// Modual name: InterFrame_ivy.asm +// +// Make intra predition estimation for Inter-B frame +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 1 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0 <0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mbb_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1}; +mov (2) mba_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_mode_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_mode_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK1:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mba_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mba_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbb_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mba_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mba_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (2) mba_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mba_result.20<1>:w 0:w {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0 <0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mbc_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ + +mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (2) mbb_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_mode_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_mode_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbb_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbb_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbc_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbb_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbb_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mbc_start; +mov (2) mbb_result.16<1>:uw MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0 <0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mb_mvp_start; +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (2) mbc_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_mode_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_mode_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK2:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbc_result.20<1>:w 0:w {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; + +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0 <0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mb_mvp_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1}; +mov (2) mbc_result.20<1>:w -1:w {align1}; +mov (1) INPUT_ARG0.0<1>:ud mb_mode_wb.4<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.4<1>:ud mb_mode_wb.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud INTER_BLOCK3:ud {align1}; +SAVE_RET {align1}; +jmpi (1) mb_pred_func; +mov (1) mb_pred_mode.0<1>:uw RET_ARG<0,1,0>:uw {align1}; +mov (1) mbc_result.18<1>:w MB_PRED_FLAG {align1}; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L0 {align1}; +(f0.0) mov (1) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.20<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +cmp.e.f0.0 (1) null:uw mb_pred_mode.0<0,1,0>:uw PRED_L1 {align1}; +(f0.0) mov (1) mbc_result.18<1>:uw MB_PRED_FLAG {align1}; +(f0.0) mov (1) mbc_result.22<1>:w 0:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (2) mbc_result.16<1>:uw MB_PRED_FLAG {align1}; +mov (2) mbc_result.20<1>:w 0:w {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are invailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (2) mbb_result.4<1>:ud mba_result.4<2,2,1>:ud {align1}; +(f0.0) mov (2) mbc_result.4<1>:ud mba_result.4<2,2,1>:ud {align1}; +(f0.0) mov (2) mbb_result.20<1>:uw mba_result.20<2,2,1>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:uw mba_result.20<2,2,1>:uw {align1}; +(f0.0) mov (2) mb_mvp_ref.0<1>:ud mba_result.4<2,2,1>:ud {align1}; +(-f0.0) mov (2) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* forward_MVP */ +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) mvp_backward; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + + +mvp_backward: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.22<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.8<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.22<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.8<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.22<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.8<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.4<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.8<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.8<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.8<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.4<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.10<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.10<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.10<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.6<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: +asr (4) mb_ref_win.0<1>:w mb_mvp_ref.0<4,4,1>:w 2:w {align1}; +add (4) mb_ref_win.8<1>:w mb_ref_win.0<4,4,1>:w 3:w {align1}; +and (4) mb_ref_win.16<1>:uw mb_ref_win.8<4,4,1>:uw 0xFFFC:uw {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* m3 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0 {align1}; +mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + + +/* m1 */ +mov (8) vme_m1.0<1>:ud 0x0:ud {align1}; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE:uw {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + + +/* M0 */ +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_DUAL_REFERENCE + INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER:UD {align1}; +/* 16x16 Source, 1/4 pixel, harr */ +mov (1) vme_m0.22<1>:UW DREF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.0<1>:UD vme_m0.8<0,1,0>:UD {align1}; + +mov (1) vme_m0.0<1>:W -8:W {align1}; +mov (1) vme_m0.2<1>:W -8:W {align1}; + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1}; +(f0.0) add (1) vme_m0.4<1>:w vme_m0.4<0,1,0>:w 4:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1}; +(f0.0) add (1) vme_m0.6<1>:w vme_m0.6<0,1,0>:w 4:w {align1}; + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; + +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.20<2,2,1>:w {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* m1 */ + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* MV num is passed by constant buffer. R4.28 */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +add (1) vme_m1.4<1>:UD vme_m1.4<0,1,0>:UD FB_PRUNING_ENABLE:UD {align1}; +add (1) vme_m1.6<1>:uw vme_m1.6<0,1,0>:uw BI_WEIGHT {align1}; + + +mov (1) vme_m1.8<1>:UD DSTART_CENTER + DSEARCH_PATH_LEN:UD {align1}; + +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mb_mvp_ref.4<0,1,0>:ud {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_MIXED + ) + mlen vme_msg_length + rlen vme_inter_wb_length + {align1}; + +and.z.f0.0 (1) null<1>:ud vme_wb0.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; + +(-f0.0)jmpi (1) __INTRA_INFO ; + +__INTER_INFO: +/* Write MV pairs */ +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; + +mov (8) msg_reg2.0<1>:UD vme_wb2.0<8,8,1>:UD {align1}; + +mov (8) msg_reg3.0<1>:UD vme_wb3.0<8,8,1>:UD {align1}; + +mov (8) msg_reg4.0<1>:UD vme_wb4.0<8,8,1>:UD {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_8, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; + +mov (1) tmp_uw1<1>:uw 0:uw {align1} ; +mov (1) tmp_ud1<1>:ud 0:ud {align1} ; +and (1) tmp_uw1<1>:uw vme_wb0.2<0,1,0>:uw MV32_BIT_MASK:uw {align1} ; +shr (1) tmp_uw1<1>:uw tmp_uw1<1>:uw MV32_BIT_SHIFT:uw {align1} ; +mul (1) tmp_ud1<1>:ud tmp_uw1<0,1,0>:uw 96:uw {align1} ; +add (1) tmp_ud1<1>:ud tmp_ud1<0,1,0>:ud 32:uw {align1} ; +shl (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw MFC_MV32_BIT_SHIFT:uw {align1} ; +add (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw MVSIZE_UW_BASE:uw {align1} ; +add (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw CBP_DC_YUV_UW:uw {align1} ; + +mov (1) msg_reg1.0<1>:uw vme_wb0.0<0,1,0>:uw {align1} ; +mov (1) msg_reg1.2<1>:uw tmp_uw1<0,1,0>:uw {align1} ; +mov (1) msg_reg1.4<1>:UD vme_wb0.28<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:ud tmp_ud1<0,1,0>:ud {align1} ; +mov (1) msg_reg1.12<1>:ud vme_wb0.0<0,1,0>:ud {align1} ; +mov (1) msg_reg1.16<1>:ud 0x25:ud {align1} ; +jmpi (1) __OUTPUT_INFO; + +__INTRA_INFO: +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; +mov (1) msg_reg1.16<1>:ud 0x35:ud {align1} ; + +__OUTPUT_INFO: + +mov (1) msg_reg1.20<1>:ud obw_m0.8<0,1,0>:ud {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +mov (8) msg_reg0.0<1>:ud obw_m0.0<8,8,1>:ud {align1}; + + +/* bind index 3, write 1 oword, msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +NOP; + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; +/* Compare three word data to get the min value */ +word_imin: + cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +/* Compare three word data to get the max value */ +word_imax: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + +/* This is to get the prediction mode for the correspongding partions/sub-mb + * Parameter description: + ARG0.0: INTER_SHAPE/PRED_MODE + ARG0.4: INTER_MODE(16x16, 16x8, 8x16 or 8X8) + ARG0.8: sub-mb block number(block 0/1/2/3) +*/ + +mb_pred_func: + mov (8) TEMP_VAR0.0<1>:ud 0:ud {align1}; + mov (1) TEMP_VAR0.0<1>:ub INPUT_ARG0.1<0,1,0>:ub {align1}; + and (1) TEMP_VAR0.4<1>:uw INPUT_ARG0.4<0,1,0>:uw INTER_MASK:uw {align1}; + /* INTER16x16 mode. The bit1-0 is the prediction mode */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_16X16MODE:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + /* Check whether it is INTER8x8 mode. */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_8X8MODE:uw {align1}; + (f0.0) jmpi (1) mb_pred_func_8; + + /* Check whether it is INTER16x8 mode. */ + cmp.e.f0.0 (1) null:uw TEMP_VAR0.4<1>:uw INTER_16X8MODE:uw {align1}; + (f0.0) jmpi (1) mb_pred_func_168; +mb_pred_func_816: + /* Block 0/2 uses the bit1-0. Block 1/3 uses the bit3-2 */ + mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1}; + and.z.f0.0 (1) null:uw TEMP_VAR0.8<1>:uw INTER_BLOCK1:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1}; + jmpi (1) end_mb_pred; + +mb_pred_func_168: + /* Block 0/1 uses the bit1-0. Block 2/3 uses the bit3-2 */ + mov (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw {align1}; + cmp.l.f0.0 (1) null:uw TEMP_VAR0.8<1>:uw INTER_BLOCK2:uw {align1}; + (f0.0) and (1) RET_ARG<1>:uw TEMP_VAR0.0<0,1,0>:uw PRED_MASK {align1}; + (f0.0) jmpi (1) end_mb_pred; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw 2:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1}; + jmpi (1) end_mb_pred; + +mb_pred_func_8: + /* 8X8 mode. Every block uses two bits as the prediction mode. */ + mul (1) TEMP_VAR0.8<1>:uw INPUT_ARG0.8<0,1,0>:uw 2:uw {align1}; + shr (1) TEMP_VAR0.16<1>:uw TEMP_VAR0.0<0,1,0>:uw TEMP_VAR0.8<0,1,0>:uw {align1}; + and (1) RET_ARG<1>:uw TEMP_VAR0.16<1>:uw PRED_MASK {align1}; +end_mb_pred: + RETURN {align1}; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_ivb.g7a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_ivb.g7a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_ivb.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_ivb.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme7.inc" +#include "inter_bframe_ivb.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_ivb.g7b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_ivb.g7b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_bframe_ivb.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_bframe_ivb.g7b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,376 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x0000000a }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23801cb1, 0x00000800, 0x02190004 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a01cb1, 0x00000800, 0x02290004 }, + { 0x00600001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000001aa }, + { 0x00600001, 0x2ae00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000042 }, + { 0x00000001, 0x2ae000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2ae40021, 0x00450bc8, 0x00000000 }, + { 0x00200001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000001 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000248 }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2af001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2af401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2af201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2af601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x00200001, 0x2af001e9, 0x00000000, 0x00010001 }, + { 0x00200001, 0x2af401ed, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000d6 }, + { 0x00000001, 0x2b0000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b040021, 0x00450bf0, 0x00000000 }, + { 0x00200001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000001fc }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2b1001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b1401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2b1201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b1601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00200001, 0x2b1001e9, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00080008 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000046 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000040, 0x24003dad, 0x00000400, 0x00010001 }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000074 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450bf0, 0x00000000 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000002 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000001b4 }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000058 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2b3201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000050 }, + { 0x00200001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000044 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01cb1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450c18, 0x00000000 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00000001, 0x2fa00021, 0x00000b84, 0x00000000 }, + { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 }, + { 0x00000001, 0x2fa80061, 0x00000000, 0x00000003 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000016a }, + { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2b3201ed, 0x00000000, 0x00010001 }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, + { 0x00010001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x01000010, 0x20002d28, 0x00000aa0, 0x00010001 }, + { 0x00010001, 0x2b3201e9, 0x00000000, 0x00010001 }, + { 0x00010001, 0x2b3601ed, 0x00000000, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x00200001, 0x2b3001e9, 0x00000000, 0x00010001 }, + { 0x00200001, 0x2b3401ed, 0x00000000, 0x00000000 }, + { 0x00000040, 0x240014a5, 0x00000b00, 0x00000b20 }, + { 0x01000010, 0x20001ca4, 0x00000400, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x02000010, 0x20001ca4, 0x00000ae0, 0x00000000 }, + { 0x00210001, 0x2b040021, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b240021, 0x00450ae4, 0x00000000 }, + { 0x00210001, 0x2b140129, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2b340129, 0x00450af4, 0x00000000 }, + { 0x00210001, 0x2ac00021, 0x00450ae4, 0x00000000 }, + { 0x00310001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af4, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b14, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b34, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac00021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x2fa001ad, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000f8 }, + { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000ec }, + { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af6, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae8, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b16, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b08, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b36, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b28, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac40021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x2fa001ad, 0x00000ae8, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b08, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b28, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000c6 }, + { 0x00000001, 0x2ac401ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000aea, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b0a, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b2a, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000ba }, + { 0x00000001, 0x2ac601ad, 0x00000fe4, 0x00000000 }, + { 0x0040000c, 0x2a803dad, 0x00690ac0, 0x00020002 }, + { 0x00400040, 0x2a883dad, 0x00690a80, 0x00030003 }, + { 0x00400005, 0x2a902d29, 0x00690a88, 0xfffcfffc }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840c21, 0x00000384, 0xff000000 }, + { 0x00600001, 0x28600021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x288000e1, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28800231, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28900061, 0x00000000, 0x11111111 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c0171, 0x00000000, 0x00020002 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00203700 }, + { 0x00000001, 0x24560169, 0x00000000, 0x20202020 }, + { 0x00000001, 0x24400021, 0x00000448, 0x00000000 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00010040, 0x24403dad, 0x00000440, 0x00040004 }, + { 0x00010040, 0x24443dad, 0x00000444, 0x00040004 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00010040, 0x24423dad, 0x00000442, 0x00040004 }, + { 0x00010040, 0x24463dad, 0x00000446, 0x00040004 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x00200040, 0x244035ad, 0x00450440, 0x00450a90 }, + { 0x00200040, 0x244435ad, 0x00450444, 0x00450a94 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000040, 0x24640c21, 0x00000464, 0x40000000 }, + { 0x00000040, 0x24662d29, 0x00000466, 0x00200020 }, + { 0x00000001, 0x24680061, 0x00000000, 0x00001212 }, + { 0x00000001, 0x24700021, 0x00000ac0, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000ac4, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a686000 }, + { 0x01000005, 0x20000c20, 0x00000180, 0x00002000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x0a0a0403 }, + { 0x00000001, 0x25420169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25440061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x25422d29, 0x00000182, 0x00200020 }, + { 0x00000008, 0x25422d29, 0x00200542, 0x00050005 }, + { 0x00000041, 0x25442d21, 0x00000542, 0x00600060 }, + { 0x00000040, 0x25442c21, 0x00000544, 0x00200020 }, + { 0x00000009, 0x25422d29, 0x00000542, 0x00050005 }, + { 0x00000040, 0x25422d29, 0x00000542, 0x00400040 }, + { 0x00000040, 0x25422d29, 0x00000542, 0x000e000e }, + { 0x00000001, 0x28200129, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28220129, 0x00000542, 0x00000000 }, + { 0x00000001, 0x28240021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000544, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28300061, 0x00000000, 0x00000025 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28300061, 0x00000000, 0x00000035 }, + { 0x00000001, 0x28340021, 0x00000488, 0x00000000 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x0219e003 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x00600001, 0x2f600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x2f600231, 0x00000fa1, 0x00000000 }, + { 0x00000005, 0x2f642d29, 0x00000fa4, 0x00030003 }, + { 0x01000010, 0x20002d28, 0x00200f64, 0x00000000 }, + { 0x00010005, 0x2fe42d29, 0x00000f60, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000002a }, + { 0x01000010, 0x20002d28, 0x00200f64, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x01000010, 0x20002d28, 0x00200f64, 0x00010001 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00000001, 0x2f680129, 0x00000fa8, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x00200f68, 0x00010001 }, + { 0x00010005, 0x2fe42d29, 0x00000f60, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a }, + { 0x00000008, 0x2f702d29, 0x00000f60, 0x00020002 }, + { 0x00000005, 0x2fe42d29, 0x00200f70, 0x00030003 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x00000001, 0x2f680129, 0x00000fa8, 0x00000000 }, + { 0x05000010, 0x20002d28, 0x00200f68, 0x00020002 }, + { 0x00010005, 0x2fe42d29, 0x00000f60, 0x00030003 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000008, 0x2f702d29, 0x00000f60, 0x00020002 }, + { 0x00000005, 0x2fe42d29, 0x00200f70, 0x00030003 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x00000041, 0x2f682d29, 0x00000fa8, 0x00020002 }, + { 0x00000008, 0x2f702529, 0x00000f60, 0x00000f68 }, + { 0x00000005, 0x2fe42d29, 0x00200f70, 0x00030003 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.asm intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,25 @@ /* * Copyright © <2010>, Intel Corporation. * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ // Modual name: IntraFrame.asm @@ -21,34 +37,121 @@ __INTER_START: mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg3.0<1>:UD 0x0:UD {align1}; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* Source = (x, y) * 16 */ + +cmp.z.f0.0 (1) null<1>:uw quality_level_ub<0,1,0>:ub LOW_QUALITY_LEVEL:uw {align1}; +(f0.0) jmpi (1) __low_quality_search; + +__high_quality_search: +#ifdef DEV_SNB +shl (2) vme_m0.0<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; +add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -16:W {align1}; /* Reference = (x-16,y-12)-(x+32,y+24) */ +add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -12:W {align1}; +#else +mov (1) vme_m0.0<1>:W -16:W {align1} ; /* Reference = (x-16,y-12)-(x+32,y+24) */ +mov (1) vme_m0.2<1>:W -12:W {align1} ; +#endif + +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER:UD {align1}; /* 16x16 Source, 1/4 pixel, harr */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ +jmpi __vme_msg1; + + +__low_quality_search: +#ifdef DEV_SNB +shl (2) vme_m0.0<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; +add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -8:W {align1}; +add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -8:W {align1}; +#else +mov (1) vme_m0.0<1>:W -8:W {align1} ; +mov (1) vme_m0.2<1>:W -8:W {align1} ; +#endif + +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_HALF:UD {align1}; /* 16x16 Source, 1/2 pixel, harr */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) vme_m0.22<1>:UW MIN_REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */ + +__vme_msg1: +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +mov (1) vme_m1.4<1>:UD FB_PRUNING_ENABLE:UD {align1}; +/* MV num is passed by constant buffer. R4.28 */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +__VME_LOOP: /* + * Media Read Message -- fetch neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* * VME message */ -/* m0 */ -mul (2) tmp_reg0.8<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* Source = (x, y) * 16 */ -mul (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; -add (2) tmp_reg0.0<1>:W tmp_reg0.0<2,2,1>:W -8:W {align1}; /* Reference = (x-8,y-8)-(x+24,y+24) */ -mov (1) tmp_reg0.12<1>:UD INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER:UD {align1}; /* 16x16 Source, 1/4 pixel, harr */ - -mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ -mov (1) tmp_reg0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */ -mov (8) vme_msg_0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; /* m1 */ -mov (1) tmp_reg1.4<1>:UD MAX_NUM_MV:UD {align1}; /* Default value MAX 32 MVs */ -mov (1) tmp_reg1.8<1>:UD SEARCH_PATH_LEN:UD {align1}; +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; + +cmp.nz.f0.0 (1) null<1>:UW orig_x_ub<0,1,0>:UB 0:UW {align1}; /* X != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_AE {align1}; /* A */ + +cmp.nz.f0.0 (1) null<1>:UW orig_y_ub<0,1,0>:UB 0:UW {align1}; /* Y != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_B {align1}; /* B */ + +mul.nz.f0.0 (1) null<1>:UW orig_x_ub<0,1,0>:UB orig_y_ub<0,1,0>:UB {align1}; /* X * Y != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_D {align1}; /* D */ + +add (1) tmp_x_w<1>:W orig_x_ub<0,1,0>:UB 1:UW {align1}; /* X + 1 */ +add (1) tmp_x_w<1>:W w_in_mb_uw<0,1,0>:UW -tmp_x_w<0,1,0>:W {align1}; /* width - (X + 1) */ +mul.nz.f0.0 (1) null<1>:UD tmp_x_w<0,1,0>:W orig_y_ub<0,1,0>:UB {align1}; /* (width - (X + 1)) * Y != 0 */ +(f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_C {align1}; /* C */ -mov (8) vme_msg_1<1>:UD tmp_reg1.0<8,8,1>:UD {align1}; +and.nz.f0.0 (1) null<1>:UW slice_edge_ub<0,1,0>:UB 2:UW {align1}; +(f0.0) and (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB 0xE0 {align1}; /* slice edge disable B,C,D*/ + +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; /* m2 */ mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; -/* m3 */ -mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; - -/* m4 */ -mov (8) vme_msg_4<1>:UD 0x0:UD {align1}; +/* m3 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0 {align1}; +mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; send (8) vme_msg_ind @@ -58,29 +161,96 @@ BIND_IDX_VME, 0, 0, - VME_MESSAGE_TYPE_INTER + VME_MESSAGE_TYPE_MIXED ) mlen vme_msg_length rlen vme_inter_wb_length {align1}; - /* * Oword Block Write message */ -mul (1) tmp_reg3.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; -add (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; -mul (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD 0x4:UD {align1}; -mov (1) tmp_reg3.20<1>:UB thread_id_ub {align1}; /* dispatch id */ -mov (8) msg_reg0.0<1>:UD tmp_reg3.0<8,8,1>:UD {align1}; -mov (2) tmp_reg3.0<1>:UW vme_wb1.0<2,2,1>:UB {align1}; -add (2) tmp_reg3.0<1>:W tmp_reg3.0<2,2,1>:W -32:W {align1}; +/* MV pairs */ +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + +#ifdef DEV_SNB +mov (16) obw_m1.0<1>:UW vme_wb1.0<16,16,1>:UB {align1}; +add (8) obw_m1.0<2>:W obw_m1.0<16,8,2>:W -64:W {align1}; +add (8) obw_m1.2<2>:W obw_m1.2<16,8,2>:W -48:W {align1}; +mov (16) obw_m2.0<1>:UW vme_wb1.16<16,16,1>:UB {align1}; +add (8) obw_m2.0<2>:W obw_m2.0<16,8,2>:W -64:W {align1}; +add (8) obw_m2.2<2>:W obw_m2.2<16,8,2>:W -48:W {align1}; +mov (16) obw_m3.0<1>:UW vme_wb2.0<16,16,1>:UB {align1}; +add (8) obw_m3.0<2>:W obw_m3.0<16,8,2>:W -64:W {align1}; +add (8) obw_m3.2<2>:W obw_m3.2<16,8,2>:W -48:W {align1}; +mov (16) obw_m4.0<1>:UW vme_wb2.16<16,16,1>:UB {align1}; +add (8) obw_m4.0<2>:W obw_m4.0<16,8,2>:W -64:W {align1}; +add (8) obw_m4.2<2>:W obw_m4.2<16,8,2>:W -48:W {align1}; +#else +mov (8) obw_m1.0<1>:ud vme_wb1.0<8,8,1>:ud {align1}; +mov (8) obw_m2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) obw_m3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) obw_m4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +#endif -mov (8) msg_reg1.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1}; +mov (8) msg_reg1.0<1>:UD obw_m1.0<8,8,1>:UD {align1}; + +mov (8) msg_reg2.0<1>:UD obw_m2.0<8,8,1>:UD {align1}; + +mov (8) msg_reg3.0<1>:UD obw_m3.0<8,8,1>:UD {align1}; + +mov (8) msg_reg4.0<1>:UD obw_m4.0<8,8,1>:UD {align1}; + +/* bind index 3, write 8 oword, msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_4, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; -mov (8) msg_reg2.0<1>:UD tmp_reg3.0<8,8,0>:UD {align1}; +/* other info */ +add (1) msg_reg0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1} ; -/* bind index 3, write 4 oword, msg type: 8(OWord Block Write) */ +and.z.f0.0 (1) null<1>:ud vme_wb0.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; + +(-f0.0)jmpi (1) __INTRA_INFO ; + +__INTER_INFO: +mov (1) tmp_uw1<1>:uw 0:uw {align1} ; +mov (1) tmp_ud1<1>:ud 0:ud {align1} ; +(f0.0)and (1) tmp_uw1<1>:uw vme_wb0.2<0,1,0>:uw MV32_BIT_MASK:uw {align1} ; +(f0.0)shr (1) tmp_uw1<1>:uw tmp_uw1<1>:uw MV32_BIT_SHIFT:uw {align1} ; +(f0.0)mul (1) tmp_ud1<1>:ud tmp_uw1<0,1,0>:uw 96:uw {align1} ; +(f0.0)add (1) tmp_ud1<1>:ud tmp_ud1<0,1,0>:ud 32:uw {align1} ; +(f0.0)shl (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw MFC_MV32_BIT_SHIFT:uw {align1} ; +(f0.0)add (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw MVSIZE_UW_BASE:uw {align1} ; +add (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw CBP_DC_YUV_UW:uw {align1} ; + +mov (1) msg_reg1.0<1>:uw vme_wb0.0<0,1,0>:uw {align1} ; +mov (1) msg_reg1.2<1>:uw tmp_uw1<0,1,0>:uw {align1} ; +mov (1) msg_reg1.4<1>:UD vme_wb0.28<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:ud tmp_ud1<0,1,0>:ud {align1} ; + +jmpi (1) __OUTPUT_INFO ; + +__INTRA_INFO: +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +__OUTPUT_INFO: +/* bind index 3, write 1 oword, msg type: 8(OWord Block Write) */ send (16) msg_ind obw_wb @@ -88,14 +258,47 @@ data_port( OBW_CACHE_TYPE, OBW_MESSAGE_TYPE, - OBW_CONTROL_3, + OBW_CONTROL_0, OBW_BIND_IDX, OBW_WRITE_COMMIT_CATEGORY, OBW_HEADER_PRESENT ) - mlen 3 + mlen 2 rlen obw_wb_length {align1}; + +add (1) orig_x_ub<1>:ub orig_x_ub<0,1,0>:ub 1:uw {align1} ; +add (1) vme_m0.8<1>:UW vme_m0.8<0,1,0>:UW 16:UW {align1}; /* X += 16 */ +#ifdef DEV_SNB +add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W 16:W {align1}; /* X += 16 */ +#endif + +cmp.e.f0.0 (1) null<1>:uw w_in_mb_uw<0,1,0>:uw orig_x_ub<0,1,0>:ub {align1}; +/* (0, y + 1) */ +(f0.0)mov (1) orig_x_ub<1>:ub 0:uw {align1} ; +(f0.0)add (1) orig_y_ub<1>:ub orig_y_ub<0,1,0>:ub 1:uw {align1} ; +(f0.0)mov (1) vme_m0.8<1>:uw 0:uw {align1} ; +(f0.0)add (1) vme_m0.10<1>:uw vme_m0.10<0,1,0>:uw 16:uw {align1} ; +#ifdef DEV_SNB +(f0.0)mov (1) vme_m0.0<1>:w -16:W {align1}; /* Reference = (x-16,y-12)-(x+32,y+24) */ +(f0.0)add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 16:w {align1}; +#endif + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* Source = (x, y) * 16 */ + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UW {align1} ; + +add.z.f0.1 (1) num_macroblocks<1>:w num_macroblocks<0,1,0>:w -1:w {align1} ; +(-f0.1)jmpi (1) __VME_LOOP ; + +__EXIT: /* * kill thread diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g6a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g6a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g6a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -1,2 +1,2 @@ -include(`gen6_vme_header.inc') -include(`inter_frame.asm') +#include "vme.inc" +#include "inter_frame.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g6b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g6b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g6b 2016-06-03 06:06:09.000000000 +0000 @@ -1,28 +1,126 @@ { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, - { 0x00200041, 0x24002e29, 0x004500a0, 0x00100010 }, - { 0x00200040, 0x24003dad, 0x00450400, 0xfff8fff8 }, - { 0x00000001, 0x240c0061, 0x00000000, 0x7e203000 }, + { 0x00800001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, - { 0x00000001, 0x24160169, 0x00000000, 0x20202020 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x01000010, 0x20002e28, 0x000000a8, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x00200009, 0x24402e29, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24403dad, 0x00000440, 0xfff0fff0 }, + { 0x00000040, 0x24423dad, 0x00000442, 0xfff4fff4 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00203000 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00200009, 0x24402e29, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24403dad, 0x00000440, 0xfff8fff8 }, + { 0x00000040, 0x24423dad, 0x00000442, 0xfff8fff8 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00201000 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x20202020 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640061, 0x00000000, 0x40000000 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x0000000a }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, - { 0x00000001, 0x24240061, 0x00000000, 0x00000020 }, - { 0x00000001, 0x24280061, 0x00000000, 0x00003f3f }, - { 0x00600001, 0x20200022, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x22401cd1, 0x00000000, 0x02188004 }, + { 0x00600001, 0x20000022, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x22801cd1, 0x00000000, 0x02288004 }, + { 0x00600001, 0x20000022, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c00f1, 0x00000000, 0x00000002 }, + { 0x02000010, 0x20002e28, 0x000000a0, 0x00000000 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000060 }, + { 0x02000010, 0x20002e28, 0x000000a1, 0x00000000 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000010 }, + { 0x02000041, 0x20004628, 0x000000a0, 0x000000a1 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000004 }, + { 0x00000040, 0x25202e2d, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x2520352d, 0x000000a2, 0x00004520 }, + { 0x02000041, 0x200045a0, 0x00000520, 0x000000a1 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000008 }, + { 0x02000005, 0x20002e28, 0x000000a4, 0x00020002 }, + { 0x00010005, 0x247d1e31, 0x0000047d, 0x000000e0 }, + { 0x00600001, 0x20200022, 0x008d0460, 0x00000000 }, { 0x00600001, 0x20400062, 0x00000000, 0x00000000 }, - { 0x00600001, 0x20400062, 0x00000000, 0x00000000 }, - { 0x00600001, 0x20600062, 0x00000000, 0x00000000 }, - { 0x08600031, 0x21801cdd, 0x00000000, 0x08482000 }, - { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, - { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, - { 0x00000041, 0x24680c21, 0x00000468, 0x00000004 }, - { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x20000022, 0x008d0460, 0x00000000 }, - { 0x00200001, 0x24600229, 0x004501a0, 0x00000000 }, - { 0x00200040, 0x24603dad, 0x00450460, 0xffe0ffe0 }, - { 0x00600001, 0x20200022, 0x008c0460, 0x00000000 }, - { 0x00600001, 0x20400022, 0x008c0460, 0x00000000 }, - { 0x05800031, 0x22001cdd, 0x00000000, 0x061b0303 }, + { 0x00000001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x22440c21, 0x00000244, 0xff000000 }, + { 0x00600001, 0x20400022, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x206000e2, 0x00000000, 0x00000000 }, + { 0x00800001, 0x20600232, 0x00cf0283, 0x00000000 }, + { 0x00000001, 0x20700062, 0x00000000, 0x11111111 }, + { 0x08600031, 0x21801cdd, 0x00000000, 0x08486000 }, + { 0x00600001, 0x20000022, 0x008d0480, 0x00000000 }, + { 0x00800001, 0x24a00229, 0x00b101a0, 0x00000000 }, + { 0x00600040, 0x44a03dad, 0x00ae04a0, 0xffc0ffc0 }, + { 0x00600040, 0x44a23dad, 0x00ae04a2, 0xffd0ffd0 }, + { 0x00800001, 0x24c00229, 0x00b101b0, 0x00000000 }, + { 0x00600040, 0x44c03dad, 0x00ae04c0, 0xffc0ffc0 }, + { 0x00600040, 0x44c23dad, 0x00ae04c2, 0xffd0ffd0 }, + { 0x00800001, 0x24e00229, 0x00b101c0, 0x00000000 }, + { 0x00600040, 0x44e03dad, 0x00ae04e0, 0xffc0ffc0 }, + { 0x00600040, 0x44e23dad, 0x00ae04e2, 0xffd0ffd0 }, + { 0x00800001, 0x25000229, 0x00b101d0, 0x00000000 }, + { 0x00600040, 0x45003dad, 0x00ae0500, 0xffc0ffc0 }, + { 0x00600040, 0x45023dad, 0x00ae0502, 0xffd0ffd0 }, + { 0x00600001, 0x20200022, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x20400022, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x20600022, 0x008d04e0, 0x00000000 }, + { 0x00600001, 0x20800022, 0x008d0500, 0x00000000 }, + { 0x05800031, 0x22001cdd, 0x00000000, 0x0a1b0403 }, + { 0x00000040, 0x20080c22, 0x00000488, 0x00000008 }, + { 0x01000005, 0x20000c20, 0x00000180, 0x00002000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x0000001c }, + { 0x00000001, 0x25420169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25440061, 0x00000000, 0x00000000 }, + { 0x00010005, 0x25422d29, 0x00000182, 0x00100010 }, + { 0x00010008, 0x25422d29, 0x00200542, 0x00040004 }, + { 0x00010041, 0x25442d21, 0x00000542, 0x00600060 }, + { 0x00010040, 0x25442c21, 0x00000544, 0x00200020 }, + { 0x00010009, 0x25422d29, 0x00000542, 0x00050005 }, + { 0x00010040, 0x25422d29, 0x00000542, 0x00400040 }, + { 0x00000040, 0x25422d29, 0x00000542, 0x000e000e }, + { 0x00000001, 0x2020012a, 0x00000180, 0x00000000 }, + { 0x00000001, 0x2022012a, 0x00000542, 0x00000000 }, + { 0x00000001, 0x20240022, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x20280022, 0x00000544, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x20200022, 0x00000180, 0x00000000 }, + { 0x00000001, 0x20240022, 0x00000190, 0x00000000 }, + { 0x00000001, 0x20280022, 0x00000194, 0x00000000 }, + { 0x00000001, 0x202c0022, 0x00000198, 0x00000000 }, + { 0x05800031, 0x22001cdd, 0x00000000, 0x041b0003 }, + { 0x00000040, 0x20a02e31, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x24482d29, 0x00000448, 0x00100010 }, + { 0x00000040, 0x24403dad, 0x00000440, 0x00100010 }, + { 0x01000010, 0x20004528, 0x000000a2, 0x000000a0 }, + { 0x00010001, 0x20a00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20a12e31, 0x000000a1, 0x00010001 }, + { 0x00010001, 0x24480169, 0x00000000, 0x00000000 }, + { 0x00010040, 0x244a2d29, 0x0000044a, 0x00100010 }, + { 0x00010001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00010040, 0x24423dad, 0x00000442, 0x00100010 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24882c21, 0x00000488, 0x000a000a }, + { 0x01000040, 0x20a63dad, 0x020000a6, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x02001400, 0xffffff50 }, { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x24001cc8, 0x00000000, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g7a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g7a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g7a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -1,2 +1,2 @@ -include(`gen7_vme_header.inc') -include(`inter_frame.asm') +#include "vme.inc" +#include "inter_frame.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g7b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g7b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame.g7b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame.g7b 2016-06-21 01:37:22.000000000 +0000 @@ -1,28 +1,113 @@ { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, - { 0x00200041, 0x24002e29, 0x004500a0, 0x00100010 }, - { 0x00200040, 0x24003dad, 0x00450400, 0xfff8fff8 }, - { 0x00000001, 0x240c0061, 0x00000000, 0x7e203000 }, + { 0x00800001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, - { 0x00000001, 0x24160169, 0x00000000, 0x20202020 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x01000010, 0x20002e28, 0x000000a8, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00203000 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00201000 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x20202020 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640061, 0x00000000, 0x40000000 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x0000000a }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, - { 0x00000001, 0x24240061, 0x00000000, 0x00000020 }, - { 0x00000001, 0x24280061, 0x00000000, 0x00003f3f }, - { 0x00600001, 0x28200021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x22401cb1, 0x00000800, 0x02190004 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x22801cb1, 0x00000800, 0x02290004 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c00f1, 0x00000000, 0x00000002 }, + { 0x02000010, 0x20002e28, 0x000000a0, 0x00000000 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000060 }, + { 0x02000010, 0x20002e28, 0x000000a1, 0x00000000 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000010 }, + { 0x02000041, 0x20004628, 0x000000a0, 0x000000a1 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000004 }, + { 0x00000040, 0x25202e2d, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x2520352d, 0x000000a2, 0x00004520 }, + { 0x02000041, 0x200045a0, 0x00000520, 0x000000a1 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000008 }, + { 0x02000005, 0x20002e28, 0x000000a4, 0x00020002 }, + { 0x00010005, 0x247d1e31, 0x0000047d, 0x000000e0 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, - { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, - { 0x08600031, 0x21801cbd, 0x00000800, 0x0a682001 }, - { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, - { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, - { 0x00000041, 0x24680c21, 0x00000468, 0x00000004 }, - { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, - { 0x00200001, 0x24600229, 0x004501a0, 0x00000000 }, - { 0x00200040, 0x24603dad, 0x00450460, 0xffe0ffe0 }, - { 0x00600001, 0x28200021, 0x008c0460, 0x00000000 }, - { 0x00600001, 0x28400021, 0x008c0460, 0x00000000 }, - { 0x0a800031, 0x20001cac, 0x00000800, 0x060a0300 }, + { 0x00000001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x22440c21, 0x00000244, 0xff000000 }, + { 0x00600001, 0x28600021, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x288000e1, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28800231, 0x00cf0283, 0x00000000 }, + { 0x00000001, 0x28900061, 0x00000000, 0x11111111 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a686000 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x24a00021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x24c00021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x24e00021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x25000021, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d04a0, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d04c0, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d04e0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d0500, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x0a0a0403 }, + { 0x00000040, 0x28080c21, 0x00000488, 0x00000008 }, + { 0x01000005, 0x20000c20, 0x00000180, 0x00002000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x0000001c }, + { 0x00000001, 0x25420169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25440061, 0x00000000, 0x00000000 }, + { 0x00010005, 0x25422d29, 0x00000182, 0x00200020 }, + { 0x00010008, 0x25422d29, 0x00200542, 0x00050005 }, + { 0x00010041, 0x25442d21, 0x00000542, 0x00600060 }, + { 0x00010040, 0x25442c21, 0x00000544, 0x00200020 }, + { 0x00010009, 0x25422d29, 0x00000542, 0x00050005 }, + { 0x00010040, 0x25422d29, 0x00000542, 0x00400040 }, + { 0x00000040, 0x25422d29, 0x00000542, 0x000e000e }, + { 0x00000001, 0x28200129, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28220129, 0x00000542, 0x00000000 }, + { 0x00000001, 0x28240021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000544, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0003 }, + { 0x00000040, 0x20a02e31, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x24482d29, 0x00000448, 0x00100010 }, + { 0x01000010, 0x20004528, 0x000000a2, 0x000000a0 }, + { 0x00010001, 0x20a00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20a12e31, 0x000000a1, 0x00010001 }, + { 0x00010001, 0x24480169, 0x00000000, 0x00000000 }, + { 0x00010040, 0x244a2d29, 0x0000044a, 0x00100010 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24882c21, 0x00000488, 0x000a000a }, + { 0x01000040, 0x20a63dad, 0x020000a6, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x02001400, 0xffffff66 }, { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, { 0x07800031, 0x24001ca8, 0x00000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen8.asm intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen8.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,776 @@ +/* + * Copyright © <2013>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: Inter_frame_gen8.asm +// +// Make inter predition estimation for Inter-frame on gen8 +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1}; +mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbc_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are inavailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1}; +(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: +asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1}; +add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1}; +and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1}; +/* m2, get the MV/Mb cost passed from constant buffer when +spawning thread by MEDIA_OBJECT */ +mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* m3 FWD/BWD cost center*/ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 skip center*/ +mov (8) vme_msg_4<1>:UD 0x0:UD {align1}; + +/* m5 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_5<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + + +/* Use the Luma mode */ +mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1}; +mov (1) vme_msg_5.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m6 */ +mov (8) vme_msg_6<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_6.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_6.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_6.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_6.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m7 */ + +mov (4) vme_msg_7.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_7.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * SIC VME message + */ + +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* m0 */ +mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* IME search */ +cmp.z.f0.0 (1) null<1>:uw quality_level_ub<0,1,0>:ub LOW_QUALITY_LEVEL:uw {align1}; +(f0.0) jmpi (1) __low_quality_search; + +__high_quality_search: +/* M3/M4 search path */ +mov (1) vme_msg_3.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_3.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.28<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x000F0F0F:UD {align1}; +mov (4) vme_msg_4.16<1>:UD 0x0:UD {align1}; + +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; + +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 12:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 8:w {align1}; +jmpi (1) __vme_msg; + +__low_quality_search: +/* M3/M4 search path */ +mov (1) vme_msg_3.0<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.4<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_3.8<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.12<1>:UD 0x000F0F0F:UD {align1}; +mov (4) vme_msg_3.16<1>:UD 0x0:UD {align1}; +mov (8) vme_msg_4.16<1>:UD 0x0:UD {align1}; + +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW MIN_REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */ +mov (1) vme_m0.0<1>:W -8:W {align1}; +mov (1) vme_m0.2<1>:W -8:W {align1}; + +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1}; + +__vme_msg: +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* Setup the Cost center */ +/* currently four 8x8 share the same cost center */ +mov (4) vme_m3.0<2>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (4) vme_m3.4<2>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; + +mov (8) vme_msg_3<1>:UD vme_m3.0<8,8,1>:UD {align1}; +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* M4/M5 search path */ +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_4.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.28<1>:UD 0x100F0F0F:UD {align1}; + +mov (1) vme_msg_5.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_5.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_5.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_5.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_5.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_4.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_7.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/4 pixel, harr, BME disable */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; +mov (8) vme_msg_3.0<1>:UD vme_m3.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; +/* write FME info */ +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; + +mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* Inter distortion of FME */ +mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1}; + +mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1}; + +/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME MV */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_8, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; + +/* Write FME/BME RefID */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; +/* Compare three word data to get the min value */ +word_imin: + cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +/* Compare three word data to get the max value */ +word_imax: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen8.g8a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen8.g8a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen8.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen8.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "inter_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen8.g8b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen8.g8b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen8.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen8.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,327 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23800a88, 0x0e000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a00a88, 0x0e000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26000a88, 0x0e000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26200a88, 0x0e000800, 0x02190006 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000750 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2ae40208, 0x00450bc8, 0x00000000 }, + { 0x00000001, 0x2af01e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000360 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b040208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b101e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000110 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000180 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000130 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450c18, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02000010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b141248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b341248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00208, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000190 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000a20 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000009c0 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x0020000c, 0x2a801a68, 0x1e450ac0, 0x00020002 }, + { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 }, + { 0x00200005, 0x2a901248, 0x16450a88, 0xfffcfffc }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a4, 0x00010001 }, + { 0x00010001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x01000010, 0x20002240, 0x160000a7, 0x00020002 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000001, 0x28600608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28640608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28680608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x286c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28700608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28740608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28780608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x287c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28900608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x000c000c }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00080008 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000000e0 }, + { 0x00000001, 0x28600608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28640608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28680608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x286c0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28700608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28900608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x20202020 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff8fff8 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff8fff8 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x00040004 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00040004 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x00200040, 0x24401a68, 0x1a450440, 0x00450a90 }, + { 0x00200040, 0x24441a68, 0x1a450444, 0x00450a90 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000ac0, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000ac0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x0e000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00243000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10786000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x0a0a0403 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x0e000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen9.g9a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen9.g9a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen9.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen9.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "inter_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen9.g9b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen9.g9b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_gen9.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_gen9.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,327 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x23800a88, 0x06000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x23a00a88, 0x06000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x26000a88, 0x06000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x26200a88, 0x06000800, 0x02190006 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000750 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2ae40208, 0x00450bc8, 0x00000000 }, + { 0x00000001, 0x2af01e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000360 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b040208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b101e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000110 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000180 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000130 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450c18, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02000010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b141248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b341248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00208, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000190 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000a20 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000009c0 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x0020000c, 0x2a801a68, 0x1e450ac0, 0x00020002 }, + { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 }, + { 0x00200005, 0x2a901248, 0x16450a88, 0xfffcfffc }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a4, 0x00010001 }, + { 0x00010001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x01000010, 0x20002240, 0x160000a7, 0x00020002 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000160 }, + { 0x00000001, 0x28600608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28640608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28680608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x286c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28700608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28740608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28780608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x287c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28900608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x000c000c }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00080008 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000000e0 }, + { 0x00000001, 0x28600608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28640608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28680608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x286c0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28700608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28900608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x20202020 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff8fff8 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff8fff8 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x00040004 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00040004 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x00200040, 0x24401a68, 0x1a450440, 0x00450a90 }, + { 0x00200040, 0x24441a68, 0x1a450444, 0x00450a90 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000ac0, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000ac0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x06000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00243000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10786000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x0a0a0403 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x06000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_haswell.asm intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_haswell.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_haswell.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_haswell.asm 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,750 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: Inter_frame_haswell.asm +// +// Make inter predition estimation for Inter-frame on Haswell +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1}; +mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbc_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are inavailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1}; +(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: +asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1}; +add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1}; +and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1}; + +/* m2, get the MV/Mb cost passed from constant buffer when +spawning thread by MEDIA_OBJECT */ +mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_4<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m5 */ +mov (8) vme_msg_5<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_5.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_5.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_5.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_5.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m6 */ +mov (4) vme_msg_6.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_6.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * SIC VME message + */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1}; +/* Use the Luma mode */ +mov (1) vme_msg_4.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* IME search */ +cmp.z.f0.0 (1) null<1>:uw quality_level_ub<0,1,0>:ub LOW_QUALITY_LEVEL:uw {align1}; +(f0.0) jmpi (1) __low_quality_search; + +__high_quality_search: +/* M3/M4 search path */ +mov (1) vme_msg_3.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_3.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.28<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x000F0F0F:UD {align1}; +mov (4) vme_msg_4.16<1>:UD 0x0:UD {align1}; + +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; + +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 12:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 8:w {align1}; + +jmpi (1) __vme_msg; + +__low_quality_search: +/* M3/M4 search path */ +mov (1) vme_msg_3.0<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.4<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_3.8<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.12<1>:UD 0x000F0F0F:UD {align1}; +mov (4) vme_msg_3.16<1>:UD 0x0:UD {align1}; +mov (8) vme_msg_4.16<1>:UD 0x0:UD {align1}; + +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW MIN_REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */ +mov (1) vme_m0.0<1>:W -8:W {align1}; +mov (1) vme_m0.2<1>:W -8:W {align1}; + +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1}; + +__vme_msg: +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_3.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_4.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/4 pixel, harr, BME disable */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; +/* write FME info */ +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; + +mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* Inter distortion of FME */ +mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1}; + +mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1}; + +/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME MV */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_8, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; + +/* Write FME/BME RefID */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + nop ; + nop ; +/* Compare three word data to get the min value */ +word_imin: + cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +/* Compare three word data to get the max value */ +word_imax: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_haswell.g75a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_haswell.g75a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_haswell.g75a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_haswell.g75a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme75.inc" +#include "inter_frame_haswell.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_haswell.g75b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_haswell.g75b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_haswell.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_haswell.g75b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,311 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x00000018 }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23801cb1, 0x00000800, 0x02190004 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a01cb1, 0x00000800, 0x02290004 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00030003 }, + { 0x00000041, 0x24003ca5, 0x00000400, 0x00020002 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26001cb1, 0x00000800, 0x02190006 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00030003 }, + { 0x00000041, 0x24203ca5, 0x00000420, 0x00020002 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x00070003 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26201cb1, 0x00000800, 0x02190006 }, + { 0x00600001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000740 }, + { 0x00600001, 0x2ae00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000f0 }, + { 0x00000001, 0x2ae000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2ae40021, 0x00450bc8, 0x00000000 }, + { 0x00000001, 0x2af001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000350 }, + { 0x00000001, 0x2b0000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b040021, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b1001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00080008 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000110 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000040, 0x24003dad, 0x00000400, 0x00010001 }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000170 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000f0 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01cb1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450c18, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000040, 0x240014a5, 0x00000b00, 0x00000b20 }, + { 0x01000010, 0x20001ca4, 0x00000400, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x02000010, 0x20001ca4, 0x00000ae0, 0x00000000 }, + { 0x00010001, 0x2b040021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b140129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b340129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00021, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000190 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af4, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b14, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b34, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac00021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000c0 }, + { 0x00000001, 0x2fa001ad, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000930 }, + { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000008d0 }, + { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 }, + { 0x0020000c, 0x2a803dad, 0x00450ac0, 0x00020002 }, + { 0x00200040, 0x2a883dad, 0x00450a80, 0x00030003 }, + { 0x00200005, 0x2a902d29, 0x00450a88, 0xfffcfffc }, + { 0x00600001, 0x25600021, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840c21, 0x00000384, 0xff000000 }, + { 0x00600001, 0x28800021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28a00231, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28b00061, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28bc0061, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28b40129, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28d00021, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28c00129, 0x00ae0622, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00010001 }, + { 0x00000001, 0x28850231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c00f1, 0x00000000, 0x00000002 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00200020 }, + { 0x00000001, 0x247e0231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e782000 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28300129, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340021, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0021, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x01000010, 0x20002e28, 0x000000a7, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000160 }, + { 0x00000001, 0x28600061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28640061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28680061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x286c0061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28700061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28740061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28780061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x287c0061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28800061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0061, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28900061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00200000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00010040, 0x24403dad, 0x00000440, 0x000c000c }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00010040, 0x24423dad, 0x00000442, 0x00080008 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000e0 }, + { 0x00000001, 0x28600061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28640061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28680061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x286c0061, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28700061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28900061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00200000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x20202020 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff8fff8 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00010040, 0x24403dad, 0x00000440, 0x00040004 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00010040, 0x24423dad, 0x00000442, 0x00040004 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x00200040, 0x244035ad, 0x00450440, 0x00450a90 }, + { 0x00200040, 0x244435ad, 0x00450444, 0x00450a90 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000001, 0x24700021, 0x00000ac0, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000ac0, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x08600031, 0x21801ca1, 0x00000800, 0x0a784000 }, + { 0x00000001, 0x25740061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25750231, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25760231, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24002d29, 0x00000180, 0x00030003 }, + { 0x00000001, 0x25740231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00243000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e786000 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000002 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0003 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000001 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x0a0a0403 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x0219e003 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000a0 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_ivb.asm intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_ivb.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_ivb.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_ivb.asm 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,622 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * Authors: Zhao Yakui + * + */ +// Modual name: InterFrame_ivy.asm +// +// Make inter predition estimation for Inter frame on Ivy +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 1 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mbb_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1}; +mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mbc_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mb_mvp_start; +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; + +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mb_mvp_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are invailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1}; +(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: +asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1}; +add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1}; +and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* m3 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0 {align1}; +mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + + +/* m1 */ +mov (8) vme_m1.0<1>:ud 0x0:ud {align1}; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE:uw {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + + +/* M0 */ +/* IME search */ +cmp.z.f0.0 (1) null<1>:uw quality_level_ub<0,1,0>:ub LOW_QUALITY_LEVEL:uw {align1}; +(f0.0) jmpi (1) __low_quality_search; + +__high_quality_search: +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER:UD {align1}; +/* 16x16 Source, 1/4 pixel, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; + +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 12:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 8:w {align1}; + +jmpi __vme_msg; + +__low_quality_search: +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_HALF:UD {align1}; +/* 16x16 Source, 1/2 pixel, harr */ +mov (1) vme_m0.22<1>:UW MIN_REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */ + +mov (1) vme_m0.0<1>:W -8:W {align1}; +mov (1) vme_m0.2<1>:W -8:W {align1}; + +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1}; + +__vme_msg: +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* m1 */ + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* MV num is passed by constant buffer. R4.28 */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +add (1) vme_m1.4<1>:UD vme_m1.4<0,1,0>:UD FB_PRUNING_DISABLE:UD {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; + +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_MIXED + ) + mlen vme_msg_length + rlen vme_inter_wb_length + {align1}; + +and.z.f0.0 (1) null<1>:ud vme_wb0.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; + +(-f0.0)jmpi (1) __INTRA_INFO ; + +__INTER_INFO: +/* Write MV pairs */ +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; + +mov (8) msg_reg2.0<1>:UD vme_wb2.0<8,8,1>:UD {align1}; + +mov (8) msg_reg3.0<1>:UD vme_wb3.0<8,8,1>:UD {align1}; + +mov (8) msg_reg4.0<1>:UD vme_wb4.0<8,8,1>:UD {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_8, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; + +mov (1) tmp_uw1<1>:uw 0:uw {align1} ; +mov (1) tmp_ud1<1>:ud 0:ud {align1} ; +and (1) tmp_uw1<1>:uw vme_wb0.2<0,1,0>:uw MV32_BIT_MASK:uw {align1} ; +shr (1) tmp_uw1<1>:uw tmp_uw1<1>:uw MV32_BIT_SHIFT:uw {align1} ; +mul (1) tmp_ud1<1>:ud tmp_uw1<0,1,0>:uw 96:uw {align1} ; +add (1) tmp_ud1<1>:ud tmp_ud1<0,1,0>:ud 32:uw {align1} ; +shl (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw MFC_MV32_BIT_SHIFT:uw {align1} ; +add (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw MVSIZE_UW_BASE:uw {align1} ; +add (1) tmp_uw1<1>:uw tmp_uw1<0,1,0>:uw CBP_DC_YUV_UW:uw {align1} ; + +mov (1) msg_reg1.0<1>:uw vme_wb0.0<0,1,0>:uw {align1} ; +mov (1) msg_reg1.2<1>:uw tmp_uw1<0,1,0>:uw {align1} ; +mov (1) msg_reg1.4<1>:UD vme_wb0.28<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:ud tmp_ud1<0,1,0>:ud {align1} ; +mov (1) msg_reg1.12<1>:ud vme_wb0.0<0,1,0>:ud {align1} ; +mov (1) msg_reg1.16<1>:ud 0x25:ud {align1} ; +jmpi (1) __OUTPUT_INFO; + +__INTRA_INFO: +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; +mov (1) msg_reg1.16<1>:ud 0x35:ud {align1} ; + +__OUTPUT_INFO: + +mov (1) msg_reg1.20<1>:ud obw_m0.8<0,1,0>:ud {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +mov (8) msg_reg0.0<1>:ud obw_m0.0<8,8,1>:ud {align1}; + + +/* bind index 3, write 1 oword, msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; +/* Compare three word data to get the min value */ +word_imin: + cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +/* Compare three word data to get the max value */ +word_imax: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_ivb.g7a intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_ivb.g7a --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_ivb.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_ivb.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme7.inc" +#include "inter_frame_ivb.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_ivb.g7b intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_ivb.g7b --- intel-vaapi-driver-1.0.15/src/shaders/vme/inter_frame_ivb.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/inter_frame_ivb.g7b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,264 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x0000000a }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23801cb1, 0x00000800, 0x02190004 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a01cb1, 0x00000800, 0x02290004 }, + { 0x00600001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000f8 }, + { 0x00600001, 0x2ae00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00000001, 0x2ae000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2ae40021, 0x00450bc8, 0x00000000 }, + { 0x00000001, 0x2af001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x00000001, 0x2b0000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b040021, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b1001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00080008 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000040, 0x24003dad, 0x00000400, 0x00010001 }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01cb1, 0x00000b40, 0x02480403 }, + { 0x00200001, 0x2b240021, 0x00450c18, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000040, 0x240014a5, 0x00000b00, 0x00000b20 }, + { 0x01000010, 0x20001ca4, 0x00000400, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x02000010, 0x20001ca4, 0x00000ae0, 0x00000000 }, + { 0x00010001, 0x2b040021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b140129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b340129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00021, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af4, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b14, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b34, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac00021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x2fa001ad, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, + { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x000000c4 }, + { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 }, + { 0x0020000c, 0x2a803dad, 0x00450ac0, 0x00020002 }, + { 0x00200040, 0x2a883dad, 0x00450a80, 0x00030003 }, + { 0x00200005, 0x2a902d29, 0x00450a88, 0xfffcfffc }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840c21, 0x00000384, 0xff000000 }, + { 0x00600001, 0x28600021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x288000e1, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28800231, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28900061, 0x00000000, 0x11111111 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c0171, 0x00000000, 0x00020002 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x01000010, 0x20002e28, 0x000000a7, 0x00020002 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00203000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00010040, 0x24403dad, 0x00000440, 0x000c000c }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00010040, 0x24423dad, 0x00000442, 0x00080008 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00201000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x20202020 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff8fff8 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff8fff8 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00010040, 0x24403dad, 0x00000440, 0x00040004 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00010040, 0x24423dad, 0x00000442, 0x00040004 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x00200040, 0x244035ad, 0x00450440, 0x00450a90 }, + { 0x00200040, 0x244435ad, 0x00450444, 0x00450a90 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000040, 0x24640c21, 0x00000464, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000001, 0x24700021, 0x00000ac0, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000ac0, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a686000 }, + { 0x01000005, 0x20000c20, 0x00000180, 0x00002000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x0000002c }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x0a0a0403 }, + { 0x00000001, 0x25420169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25440061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x25422d29, 0x00000182, 0x00200020 }, + { 0x00000008, 0x25422d29, 0x00200542, 0x00050005 }, + { 0x00000041, 0x25442d21, 0x00000542, 0x00600060 }, + { 0x00000040, 0x25442c21, 0x00000544, 0x00200020 }, + { 0x00000009, 0x25422d29, 0x00000542, 0x00050005 }, + { 0x00000040, 0x25422d29, 0x00000542, 0x00400040 }, + { 0x00000040, 0x25422d29, 0x00000542, 0x000e000e }, + { 0x00000001, 0x28200129, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28220129, 0x00000542, 0x00000000 }, + { 0x00000001, 0x28240021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000544, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28300061, 0x00000000, 0x00000025 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28300061, 0x00000000, 0x00000035 }, + { 0x00000001, 0x28340021, 0x00000488, 0x00000000 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x0219e003 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f6001ad, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f6001ad, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.asm intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.asm 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.asm 2016-06-03 06:05:58.000000000 +0000 @@ -1,9 +1,25 @@ /* * Copyright © <2010>, Intel Corporation. * - * This program is licensed under the terms and conditions of the - * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at - * http://www.opensource.org/licenses/eclipse-1.0.php. + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * */ // Modual name: IntraFrame.asm @@ -21,37 +37,48 @@ __INTRA_START: mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; - +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + /* * Media Read Message -- fetch neighbor edge pixels */ /* ROW */ -mul (2) tmp_reg0.0<1>:D orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ -add (1) tmp_reg0.0<1>:D tmp_reg0.0<0,1,0>:D -8:W {align1}; /* X offset */ -add (1) tmp_reg0.4<1>:D tmp_reg0.4<0,1,0>:D -1:W {align1}; /* Y offset */ -mov (1) tmp_reg0.8<1>:UD BLOCK_32X1 {align1}; -mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ -mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; +__INTRA_LOOP: +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; /* COL */ -mul (2) tmp_reg0.0<1>:D orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ -add (1) tmp_reg0.0<1>:D tmp_reg0.0<0,1,0>:D -4:W {align1}; /* X offset */ -mov (1) tmp_reg0.8<1>:UD BLOCK_4X16 {align1}; -mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ -mov (8) msg_reg0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; /* * VME message */ /* m0 */ -mul (2) tmp_reg0.8<1>:UW orig_xy_ub<2,2,1>:UB 16:UW {align1}; /* (x, y) * 16 */ -mov (1) tmp_reg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ -mov (8) vme_msg_0.0<1>:UD tmp_reg0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; /* m1 */ -mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE + LUMA_INTRA_4x4_DISABLE {align1}; +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; cmp.nz.f0.0 (1) null<1>:UW orig_x_ub<0,1,0>:UB 0:UW {align1}; /* X != 0 */ (f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_AE {align1}; /* A */ @@ -67,12 +94,18 @@ mul.nz.f0.0 (1) null<1>:UD tmp_x_w<0,1,0>:W orig_y_ub<0,1,0>:UB {align1}; /* (width - (X + 1)) * Y != 0 */ (f0.0) add (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB INTRA_PRED_AVAIL_FLAG_C {align1}; /* C */ -mov (8) vme_msg_1<1>:UD tmp_reg1.0<8,8,1>:UD {align1}; +and.nz.f0.0 (1) null<1>:UW slice_edge_ub<0,1,0>:UB 2:UW {align1}; +(f0.0) and (1) mb_intra_struct_ub<1>:UB mb_intra_struct_ub<0,1,0>:UB 0xE0 {align1}; /* slice edge disable B,C,D*/ + + +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; /* m2 */ mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; -/* m3 */ +/* m3 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; /* m4 */ @@ -97,10 +130,7 @@ /* * Oword Block Write message */ -mul (1) tmp_reg3.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; -add (1) tmp_reg3.8<1>:UD tmp_reg3.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; -mov (1) tmp_reg3.20<1>:UB thread_id_ub {align1}; /* dispatch id */ -mov (8) msg_reg0.0<1>:UD tmp_reg3<8,8,1>:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; @@ -123,6 +153,28 @@ rlen obw_wb_length {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 16:W {align1}; /* X offset: X += 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 16:W {align1}; /* X offset: X += 16 */ +add (1) vme_m0.8<1>:UW vme_m0.8<0,1,0>:UW 16:UW {align1}; /* Y = Y, X += 16 */ + +add (1) orig_x_ub<1>:ub orig_x_ub<0,1,0>:ub 1:uw {align1} ; +cmp.e.f0.0 (1) null<1>:uw w_in_mb_uw<0,1,0>:uw orig_x_ub<0,1,0>:ub {align1}; +(f0.0)mov (1) orig_x_ub<1>:ub 0:uw {align1} ; +(f0.0)add (1) orig_y_ub<1>:ub orig_y_ub<0,1,0>:ub 1:uw {align1} ; +(f0.0)mov (1) read0_header.0<1>:D -8:W {align1}; /* X offset */ +(f0.0)add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D 16:W {align1}; /* Y offset */ +(f0.0)mov (1) read1_header.0<1>:D -4:W {align1}; /* X offset */ +(f0.0)add (1) read1_header.4<1>:D read1_header.4<0,1,0>:D 16:W {align1}; /* Y offset */ +/* X = 0, Y += 16 */ +(f0.0)mov (1) vme_m0.8<1>:UW 0:UW {align1}; +(f0.0)add (1) vme_m0.10<1>:UW vme_m0.10<0,1,0>:UW 16:UW {align1}; + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 1:uw {align1}; /* the new offset */ + +add.z.f0.0 (1) num_macroblocks<1>:w num_macroblocks<0,1,0>:w -1:w {align1} ; +(-f0.0)jmpi (1) __INTRA_LOOP ; + +__EXIT: /* * kill thread */ diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g6a intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g6a --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g6a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g6a 2016-06-03 06:05:58.000000000 +0000 @@ -1,3 +1,3 @@ -include(`gen6_vme_header.inc') -include(`intra_frame.asm') +#include "vme.inc" +#include "intra_frame.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g6b intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g6b --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g6b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g6b 2016-06-03 06:06:09.000000000 +0000 @@ -1,47 +1,70 @@ { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, { 0x04600031, 0x22401cd1, 0x00000000, 0x02188004 }, - { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, - { 0x00000040, 0x24003ca5, 0x00000400, 0xfffcfffc }, - { 0x00000001, 0x240800e1, 0x00000000, 0x000f0003 }, - { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0420, 0x00000000 }, { 0x04600031, 0x22801cd1, 0x00000000, 0x02288004 }, - { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, - { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x20000022, 0x008d0400, 0x00000000 }, - { 0x00000001, 0x243c00f1, 0x00000000, 0x00000006 }, + { 0x00600001, 0x20000022, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c00f1, 0x00000000, 0x00000002 }, { 0x02000010, 0x20002e28, 0x000000a0, 0x00000000 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000060 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000060 }, { 0x02000010, 0x20002e28, 0x000000a1, 0x00000000 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000010 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000010 }, { 0x02000041, 0x20004628, 0x000000a0, 0x000000a1 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000004 }, - { 0x00000040, 0x24402e2d, 0x000000a0, 0x00010001 }, - { 0x00000040, 0x2440352d, 0x000000a2, 0x00004440 }, - { 0x02000041, 0x200045a0, 0x00000440, 0x000000a1 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000008 }, - { 0x00600001, 0x20200022, 0x008d0420, 0x00000000 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000004 }, + { 0x00000040, 0x25202e2d, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x2520352d, 0x000000a2, 0x00004520 }, + { 0x02000041, 0x200045a0, 0x00000520, 0x000000a1 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000008 }, + { 0x02000005, 0x20002e28, 0x000000a4, 0x00020002 }, + { 0x00010005, 0x247d1e31, 0x0000047d, 0x000000e0 }, + { 0x00600001, 0x20200022, 0x008d0460, 0x00000000 }, { 0x00600001, 0x20400062, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x22440c21, 0x00000244, 0xff000000 }, { 0x00600001, 0x20400022, 0x008d0240, 0x00000000 }, { 0x00600001, 0x206000e2, 0x00000000, 0x00000000 }, { 0x00800001, 0x20600232, 0x00cf0283, 0x00000000 }, { 0x00000001, 0x20700062, 0x00000000, 0x11111111 }, { 0x08600031, 0x21801cdd, 0x00000000, 0x08184000 }, - { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, - { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, - { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x20000022, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0480, 0x00000000 }, { 0x00000001, 0x20200022, 0x00000180, 0x00000000 }, { 0x00000001, 0x20240022, 0x00000190, 0x00000000 }, { 0x00000001, 0x20280022, 0x00000194, 0x00000000 }, { 0x00000001, 0x202c0022, 0x00000198, 0x00000000 }, { 0x05800031, 0x22001cdd, 0x00000000, 0x041b0003 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0x00100010 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0x00100010 }, + { 0x00000040, 0x24482d29, 0x00000448, 0x00100010 }, + { 0x00000040, 0x20a02e31, 0x000000a0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000a2, 0x000000a0 }, + { 0x00010001, 0x20a00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20a12e31, 0x000000a1, 0x00010001 }, + { 0x00010001, 0x240001e5, 0x00000000, 0xfff8fff8 }, + { 0x00010040, 0x24043ca5, 0x00000404, 0x00100010 }, + { 0x00010001, 0x242001e5, 0x00000000, 0xfffcfffc }, + { 0x00010040, 0x24243ca5, 0x00000424, 0x00100010 }, + { 0x00010001, 0x24480169, 0x00000000, 0x00000000 }, + { 0x00010040, 0x244a2d29, 0x0000044a, 0x00100010 }, + { 0x00000040, 0x24882c21, 0x00000488, 0x00010001 }, + { 0x01000040, 0x20a63dad, 0x000000a6, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffff9a }, { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x24001cc8, 0x00000000, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g7a intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g7a --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g7a 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -1,2 +1,3 @@ -include(`gen7_vme_header.inc') -include(`intra_frame.asm') +#include "vme.inc" +#include "intra_frame.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g7b intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g7b --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame.g7b 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame.g7b 2016-06-21 01:37:22.000000000 +0000 @@ -1,47 +1,70 @@ { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, - { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, { 0x04600031, 0x22401cb1, 0x00000800, 0x02190004 }, - { 0x00200041, 0x24002e25, 0x004500a0, 0x00100010 }, - { 0x00000040, 0x24003ca5, 0x00000400, 0xfffcfffc }, - { 0x00000001, 0x240800e1, 0x00000000, 0x000f0003 }, - { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, { 0x04600031, 0x22801cb1, 0x00000800, 0x02290004 }, - { 0x00200041, 0x24082e29, 0x004500a0, 0x00100010 }, - { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, - { 0x00000001, 0x243c00f1, 0x00000000, 0x00000006 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c00f1, 0x00000000, 0x00000002 }, { 0x02000010, 0x20002e28, 0x000000a0, 0x00000000 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000060 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000060 }, { 0x02000010, 0x20002e28, 0x000000a1, 0x00000000 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000010 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000010 }, { 0x02000041, 0x20004628, 0x000000a0, 0x000000a1 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000004 }, - { 0x00000040, 0x24402e2d, 0x000000a0, 0x00010001 }, - { 0x00000040, 0x2440352d, 0x000000a2, 0x00004440 }, - { 0x02000041, 0x200045a0, 0x00000440, 0x000000a1 }, - { 0x00010040, 0x243d1e31, 0x0000043d, 0x00000008 }, - { 0x00600001, 0x28200021, 0x008d0420, 0x00000000 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000004 }, + { 0x00000040, 0x25202e2d, 0x000000a0, 0x00010001 }, + { 0x00000040, 0x2520352d, 0x000000a2, 0x00004520 }, + { 0x02000041, 0x200045a0, 0x00000520, 0x000000a1 }, + { 0x00010040, 0x247d1e31, 0x0000047d, 0x00000008 }, + { 0x02000005, 0x20002e28, 0x000000a4, 0x00020002 }, + { 0x00010005, 0x247d1e31, 0x0000047d, 0x000000e0 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x22400061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x22440c21, 0x00000244, 0xff000000 }, { 0x00600001, 0x28600021, 0x008d0240, 0x00000000 }, { 0x00600001, 0x288000e1, 0x00000000, 0x00000000 }, { 0x00800001, 0x28800231, 0x00cf0283, 0x00000000 }, { 0x00000001, 0x28900061, 0x00000000, 0x11111111 }, - { 0x08600031, 0x21801cbd, 0x00000800, 0x0a184001 }, - { 0x00000041, 0x24684521, 0x000000a2, 0x000000a1 }, - { 0x00000040, 0x24684421, 0x00000468, 0x000000a0 }, - { 0x00000001, 0x24740231, 0x00000014, 0x00000000 }, - { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a184000 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, - { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0003 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0x00100010 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0x00100010 }, + { 0x00000040, 0x24482d29, 0x00000448, 0x00100010 }, + { 0x00000040, 0x20a02e31, 0x000000a0, 0x00010001 }, + { 0x01000010, 0x20004528, 0x000000a2, 0x000000a0 }, + { 0x00010001, 0x20a00171, 0x00000000, 0x00000000 }, + { 0x00010040, 0x20a12e31, 0x000000a1, 0x00010001 }, + { 0x00010001, 0x240001e5, 0x00000000, 0xfff8fff8 }, + { 0x00010040, 0x24043ca5, 0x00000404, 0x00100010 }, + { 0x00010001, 0x242001e5, 0x00000000, 0xfffcfffc }, + { 0x00010040, 0x24243ca5, 0x00000424, 0x00100010 }, + { 0x00010001, 0x24480169, 0x00000000, 0x00000000 }, + { 0x00010040, 0x244a2d29, 0x0000044a, 0x00100010 }, + { 0x00000040, 0x24882c21, 0x00000488, 0x00010001 }, + { 0x01000040, 0x20a63dad, 0x000000a6, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0xffffff9a }, { 0x00600001, 0x28000021, 0x008d0000, 0x00000000 }, { 0x07800031, 0x24001ca8, 0x00000800, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen8.asm intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen8.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen8.asm 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,201 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: IntraFrame_gen8.asm +// +// Make intra predition estimation for Intra frame on Gen8 +// + +// +// Now, begin source code.... +// + +/* + * __START + */ +__INTRA_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* m2, get the MV/Mb cost passed by constant buffer +when creating EU thread by MEDIA_OBJECT */ +mov (8) vme_msg_2<1>:UD r1.0<8,8,1>:UD {align1}; + +/* m3. This is changed for FWD/BWD cost center */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4.*/ +mov (8) vme_msg_4<1>:ud 0x0:ud {align1}; + +/* m5 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_5<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +mov (1) tmp_reg0.0<1>:UW LUMA_CHROMA_MODE:UW {align1}; +/* Use the Luma mode */ +mov (1) vme_msg_5.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m6 */ +mov (8) vme_msg_6<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_6.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_6.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_6.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_6.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m7 */ + +mov (4) vme_msg_7.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_7.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * VME message + */ + +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; +/* m0 */ +/* 16x16 Source, Intra_harr */ +add (1) vme_m0.12<1>:UD vme_m0.12<0,1,0>:ud INTRA_SAD_HAAR:UD {align1}; +mov (8) vme_msg_0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen8.g8a intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen8.g8a --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen8.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen8.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "intra_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen8.g8b intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen8.g8b --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen8.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen8.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,72 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23800a88, 0x0e000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a00a88, 0x0e000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26000a88, 0x0e000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26200a88, 0x0e000800, 0x02190006 }, + { 0x00600001, 0x28400208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a4, 0x00010001 }, + { 0x00010001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000040, 0x244c0208, 0x0600044c, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x0e000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen9.g9a intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen9.g9a --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen9.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen9.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "intra_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen9.g9b intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen9.g9b --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_gen9.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_gen9.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,72 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x23800a88, 0x06000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x23a00a88, 0x06000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x26000a88, 0x06000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x26200a88, 0x06000800, 0x02190006 }, + { 0x00600001, 0x28400208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a4, 0x00010001 }, + { 0x00010001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000040, 0x244c0208, 0x0600044c, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x06000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_haswell.asm intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_haswell.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_haswell.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_haswell.asm 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,196 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: IntraFrame.asm +// +// Make intra predition estimation for Intra frame +// + +// +// Now, begin source code.... +// + +/* + * __START + */ +__INTRA_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* m2, get the MV/Mb cost passed by constant buffer +when creating EU thread by MEDIA_OBJECT */ +mov (8) vme_msg_2<1>:UD r1.0<8,8,1>:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_4<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m5 */ +mov (8) vme_msg_5<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_5.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_5.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_5.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_5.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m6 */ + +mov (4) vme_msg_6.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_6.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * VME message + */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (1) tmp_reg0.0<1>:UW LUMA_CHROMA_MODE:UW {align1}; +/* Use the Luma mode */ +mov (1) vme_msg_4.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_haswell.g75a intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_haswell.g75a --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_haswell.g75a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_haswell.g75a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme75.inc" +#include "intra_frame_haswell.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_haswell.g75b intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_haswell.g75b --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_haswell.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_haswell.g75b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,71 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x00000002 }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23801cb1, 0x00000800, 0x02190004 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a01cb1, 0x00000800, 0x02290004 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00030003 }, + { 0x00000041, 0x24003ca5, 0x00000400, 0x00020002 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26001cb1, 0x00000800, 0x02190006 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00030003 }, + { 0x00000041, 0x24203ca5, 0x00000420, 0x00020002 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x00070003 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26201cb1, 0x00000800, 0x02190006 }, + { 0x00600001, 0x28400021, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840c21, 0x00000384, 0xff000000 }, + { 0x00600001, 0x28800021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28a00231, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28b00061, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28bc0061, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28b40129, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28d00021, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28c00129, 0x00ae0622, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28850231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c00f1, 0x00000000, 0x00000002 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00200020 }, + { 0x00000001, 0x247e0231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e782000 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28300129, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340021, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0021, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_ivb.asm intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_ivb.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_ivb.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_ivb.asm 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,154 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: IntraFrame.asm +// +// Make intra predition estimation for Intra frame +// + +// +// Now, begin source code.... +// + +/* + * __START + */ +__INTRA_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* + * VME message + */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* m1 */ +mov (8) vme_m1.0<1>:ud 0x0:ud {align1}; +and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; +(f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE:uw {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* m3 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0 {align1}; +mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_INTRA + ) + mlen vme_msg_length + rlen vme_intra_wb_length + {align1}; + + +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_ivb.g7a intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_ivb.g7a --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_ivb.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_ivb.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3 @@ +#include "vme7.inc" +#include "intra_frame_ivb.asm" + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_ivb.g7b intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_ivb.g7b --- intel-vaapi-driver-1.0.15/src/shaders/vme/intra_frame_ivb.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/intra_frame_ivb.g7b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,46 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24003ca5, 0x00000400, 0xfff8fff8 }, + { 0x00000040, 0x24043ca5, 0x00000404, 0xffffffff }, + { 0x00000001, 0x240800e1, 0x00000000, 0x0000001f }, + { 0x00000001, 0x24140231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202e25, 0x004500a0, 0x00040004 }, + { 0x00000040, 0x24203ca5, 0x00000420, 0xfffcfffc }, + { 0x00000001, 0x242800e1, 0x00000000, 0x000f0003 }, + { 0x00000001, 0x24340231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23801cb1, 0x00000800, 0x02190004 }, + { 0x00600001, 0x28000021, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a01cb1, 0x00000800, 0x02290004 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a4, 0x00010001 }, + { 0x00010001, 0x247c0171, 0x00000000, 0x00020002 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800061, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840c21, 0x00000384, 0xff000000 }, + { 0x00600001, 0x28600021, 0x008d0380, 0x00000000 }, + { 0x00600001, 0x288000e1, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28800231, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28900061, 0x00000000, 0x11111111 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a184000 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0003 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/Makefile.am intel-vaapi-driver-1.7.1/src/shaders/vme/Makefile.am --- intel-vaapi-driver-1.0.15/src/shaders/vme/Makefile.am 2011-10-28 14:32:40.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/Makefile.am 2016-06-16 00:57:46.000000000 +0000 @@ -1,48 +1,116 @@ -VME_CORE = intra_frame.asm inter_frame.asm - -INTEL_G6B = intra_frame.g6b inter_frame.g6b -INTEL_G6A = intra_frame.g6a inter_frame.g6a -INTEL_GEN6_INC = gen6_vme_header.inc +VME_CORE = batchbuffer.asm intra_frame.asm inter_frame.asm +VME7_CORE = batchbuffer.asm intra_frame_ivb.asm inter_frame_ivb.asm inter_bframe_ivb.asm mpeg2_inter_ivb.asm +VME75_CORE = batchbuffer.asm intra_frame_haswell.asm inter_frame_haswell.asm inter_bframe_haswell.asm mpeg2_inter_haswell.asm +VME8_CORE = intra_frame_gen8.asm inter_frame_gen8.asm inter_bframe_gen8.asm mpeg2_inter_gen8.asm vp8_intra_frame_gen8.asm vp8_inter_frame_gen8.asm +VME9_CORE = $(VME8_CORE) + +INTEL_G6B = batchbuffer.g6b intra_frame.g6b inter_frame.g6b +INTEL_G6A = batchbuffer.g6a intra_frame.g6a inter_frame.g6a +INTEL_GEN6_INC = batchbuffer.inc vme.inc INTEL_GEN6_ASM = $(INTEL_G6A:%.g6a=%.gen6.asm) -INTEL_G7B = intra_frame.g7b inter_frame.g7b -INTEL_G7A = intra_frame.g7a inter_frame.g7a -INTEL_GEN7_INC = gen7_vme_header.inc +INTEL_G7B = batchbuffer.g7b intra_frame.g7b inter_frame.g7b intra_frame_ivb.g7b inter_frame_ivb.g7b inter_bframe_ivb.g7b mpeg2_inter_ivb.g7b +INTEL_G7A = batchbuffer.g7a intra_frame.g7a inter_frame.g7a intra_frame_ivb.g7a inter_frame_ivb.g7a inter_bframe_ivb.g7a mpeg2_inter_ivb.g7a +INTEL_GEN7_INC = batchbuffer.inc vme.inc vme7_mpeg2.inc vme7.inc INTEL_GEN7_ASM = $(INTEL_G7A:%.g7a=%.gen7.asm) +INTEL_G75B = batchbuffer.g75b intra_frame_haswell.g75b inter_frame_haswell.g75b inter_bframe_haswell.g75b mpeg2_inter_haswell.g75b +INTEL_G75A = batchbuffer.g75a intra_frame_haswell.g75a inter_frame_haswell.g75a inter_bframe_haswell.g75a mpeg2_inter_haswell.g75a +INTEL_GEN75_INC = batchbuffer.inc vme75.inc vme75_mpeg2.inc +INTEL_GEN75_ASM = $(INTEL_G75A:%.g75a=%.gen75.asm) + + +INTEL_G8B = intra_frame_gen8.g8b inter_frame_gen8.g8b inter_bframe_gen8.g8b mpeg2_inter_gen8.g8b vp8_intra_frame_gen8.g8b vp8_inter_frame_gen8.g8b +INTEL_G8A = intra_frame_gen8.g8a inter_frame_gen8.g8a inter_bframe_gen8.g8a mpeg2_inter_gen8.g8a vp8_intra_frame_gen8.g8a vp8_inter_frame_gen8.g8a +INTEL_GEN8_INC = vme8.inc vme75_mpeg2.inc +INTEL_GEN8_ASM = $(INTEL_G8A:%.g8a=%.gen8.asm) + + +INTEL_G9B = intra_frame_gen9.g9b inter_frame_gen9.g9b inter_bframe_gen9.g9b mpeg2_inter_gen9.g9b vp8_intra_frame_gen9.g9b vp8_inter_frame_gen9.g9b +INTEL_G9A = intra_frame_gen9.g9a inter_frame_gen9.g9a inter_bframe_gen9.g9a mpeg2_inter_gen9.g9a vp8_intra_frame_gen9.g9a vp8_inter_frame_gen9.g9a +INTEL_GEN9_INC = $(INTEL_GEN8_INC) +INTEL_GEN9_ASM = $(INTEL_G9A:%.g9a=%.gen9.asm) + + TARGETS = if HAVE_GEN4ASM TARGETS += $(INTEL_G6B) TARGETS += $(INTEL_G7B) +TARGETS += $(INTEL_G75B) +TARGETS += $(INTEL_G8B) +TARGETS += $(INTEL_G9B) endif all-local: $(TARGETS) -SUFFIXES = .g6a .g6b .g7a .g7b .gen6.asm .gen7.asm +SUFFIXES = .g6a .g6b .g7a .g7b .gen6.asm .gen7.asm .g75a .g75b .gen75.asm .g8a .g8b .gen8.asm .g9a .g9b .gen9.asm if HAVE_GEN4ASM $(INTEL_GEN6_ASM): $(VME_CORE) $(INTEL_GEN6_INC) .g6a.gen6.asm: - $(AM_V_GEN)m4 $< > $@ + $(AM_V_GEN)cpp -P -DDEV_SNB $< > _vme0.$@ && \ + m4 _vme0.$@ > $@ && \ + rm _vme0.$@ .gen6.asm.g6b: $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $< -$(INTEL_GEN7_ASM): $(VME_CORE) $(INTEL_GEN7_INC) +$(INTEL_GEN7_ASM): $(VME7_CORE) $(INTEL_GEN7_INC) .g7a.gen7.asm: - $(AM_V_GEN)m4 $< > $@ + $(AM_V_GEN)cpp -P -DDEV_IVB $< > _vme0.$@ && \ + m4 _vme0.$@ > $@ && \ + rm _vme0.$@ .gen7.asm.g7b: $(AM_V_GEN)$(GEN4ASM) -g 7 -o $@ $< + + +$(INTEL_GEN75_ASM): $(VME75_CORE) $(INTEL_GEN75_INC) +.g75a.gen75.asm: + $(AM_V_GEN)cpp -P $< > _vme0.$@ && \ + m4 _vme0.$@ > $@ && \ + rm _vme0.$@ +.gen75.asm.g75b: + $(AM_V_GEN)$(GEN4ASM) -g 7.5 -o $@ $< + +$(INTEL_GEN8_ASM): $(VME8_CORE) $(INTEL_GEN8_INC) +.g8a.gen8.asm: + $(AM_V_GEN)cpp -P $< > _vme0.$@ && \ + m4 _vme0.$@ > $@ && \ + rm _vme0.$@ +.gen8.asm.g8b: + $(AM_V_GEN)$(GEN4ASM) -g 8 -o $@ $< + +$(INTEL_GEN9_ASM): $(VME9_CORE) $(INTEL_GEN9_INC) +.g9a.gen9.asm: + $(AM_V_GEN)cpp -P $< > _vme0.$@ && \ + m4 _vme0.$@ > $@ && \ + rm _vme0.$@ +.gen9.asm.g9b: + $(AM_V_GEN)$(GEN4ASM) -g 9 -o $@ $< + endif -CLEANFILES = $(INTEL_GEN6_ASM) $(INTEL_GEN7_ASM) +CLEANFILES = $(INTEL_GEN6_ASM) $(INTEL_GEN7_ASM) $(INTEL_GEN75_ASM) $(INTEL_GEN8_ASM) $(INTEL_GEN9_ASM) EXTRA_DIST = \ $(INTEL_G6A) \ $(INTEL_G6B) \ + $(INTEL_G75A) \ + $(INTEL_G75B) \ $(INTEL_G7A) \ $(INTEL_G7B) \ + $(INTEL_G8A) \ + $(INTEL_G8B) \ + $(INTEL_G9A) \ + $(INTEL_G9B) \ $(INTEL_GEN6_INC) \ + $(INTEL_GEN75_INC) \ $(INTEL_GEN7_INC) \ + $(INTEL_GEN8_INC) \ + $(INTEL_GEN9_INC) \ + $(VME75_CORE) \ + $(VME7_CORE) \ + $(VME8_CORE) \ + $(VME9_CORE) \ $(VME_CORE) \ $(NULL) diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/Makefile.in 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@host_os@ +host_vendor = @host_vendor@ +htmldir = @htmldir@ +includedir = @includedir@ +infodir = @infodir@ +install_sh = @install_sh@ +libdir = @libdir@ +libexecdir = @libexecdir@ +localedir = @localedir@ +localstatedir = @localstatedir@ +mandir = @mandir@ +mkdir_p = @mkdir_p@ +oldincludedir = @oldincludedir@ +pdfdir = @pdfdir@ +prefix = @prefix@ +program_transform_name = @program_transform_name@ +psdir = @psdir@ +sbindir = @sbindir@ +sharedstatedir = @sharedstatedir@ +srcdir = @srcdir@ +sysconfdir = @sysconfdir@ +target_alias = @target_alias@ +top_build_prefix = @top_build_prefix@ +top_builddir = @top_builddir@ +top_srcdir = @top_srcdir@ +VME_CORE = batchbuffer.asm intra_frame.asm inter_frame.asm +VME7_CORE = batchbuffer.asm intra_frame_ivb.asm inter_frame_ivb.asm inter_bframe_ivb.asm mpeg2_inter_ivb.asm +VME75_CORE = batchbuffer.asm intra_frame_haswell.asm inter_frame_haswell.asm inter_bframe_haswell.asm mpeg2_inter_haswell.asm +VME8_CORE = intra_frame_gen8.asm inter_frame_gen8.asm inter_bframe_gen8.asm mpeg2_inter_gen8.asm vp8_intra_frame_gen8.asm vp8_inter_frame_gen8.asm +VME9_CORE = $(VME8_CORE) +INTEL_G6B = batchbuffer.g6b intra_frame.g6b inter_frame.g6b +INTEL_G6A = batchbuffer.g6a intra_frame.g6a inter_frame.g6a +INTEL_GEN6_INC = batchbuffer.inc vme.inc +INTEL_GEN6_ASM = $(INTEL_G6A:%.g6a=%.gen6.asm) +INTEL_G7B = batchbuffer.g7b intra_frame.g7b inter_frame.g7b intra_frame_ivb.g7b inter_frame_ivb.g7b inter_bframe_ivb.g7b mpeg2_inter_ivb.g7b +INTEL_G7A = batchbuffer.g7a intra_frame.g7a inter_frame.g7a intra_frame_ivb.g7a inter_frame_ivb.g7a inter_bframe_ivb.g7a mpeg2_inter_ivb.g7a +INTEL_GEN7_INC = batchbuffer.inc vme.inc vme7_mpeg2.inc vme7.inc +INTEL_GEN7_ASM = $(INTEL_G7A:%.g7a=%.gen7.asm) +INTEL_G75B = batchbuffer.g75b intra_frame_haswell.g75b inter_frame_haswell.g75b inter_bframe_haswell.g75b mpeg2_inter_haswell.g75b +INTEL_G75A = batchbuffer.g75a intra_frame_haswell.g75a inter_frame_haswell.g75a inter_bframe_haswell.g75a mpeg2_inter_haswell.g75a +INTEL_GEN75_INC = batchbuffer.inc vme75.inc vme75_mpeg2.inc +INTEL_GEN75_ASM = $(INTEL_G75A:%.g75a=%.gen75.asm) +INTEL_G8B = intra_frame_gen8.g8b inter_frame_gen8.g8b inter_bframe_gen8.g8b mpeg2_inter_gen8.g8b vp8_intra_frame_gen8.g8b vp8_inter_frame_gen8.g8b +INTEL_G8A = intra_frame_gen8.g8a inter_frame_gen8.g8a inter_bframe_gen8.g8a mpeg2_inter_gen8.g8a vp8_intra_frame_gen8.g8a vp8_inter_frame_gen8.g8a +INTEL_GEN8_INC = vme8.inc vme75_mpeg2.inc +INTEL_GEN8_ASM = $(INTEL_G8A:%.g8a=%.gen8.asm) +INTEL_G9B = intra_frame_gen9.g9b inter_frame_gen9.g9b inter_bframe_gen9.g9b mpeg2_inter_gen9.g9b vp8_intra_frame_gen9.g9b vp8_inter_frame_gen9.g9b +INTEL_G9A = intra_frame_gen9.g9a inter_frame_gen9.g9a inter_bframe_gen9.g9a mpeg2_inter_gen9.g9a vp8_intra_frame_gen9.g9a vp8_inter_frame_gen9.g9a +INTEL_GEN9_INC = $(INTEL_GEN8_INC) +INTEL_GEN9_ASM = $(INTEL_G9A:%.g9a=%.gen9.asm) +TARGETS = $(am__append_1) +SUFFIXES = .g6a .g6b .g7a .g7b .gen6.asm .gen7.asm .g75a .g75b .gen75.asm .g8a .g8b .gen8.asm .g9a .g9b .gen9.asm +CLEANFILES = $(INTEL_GEN6_ASM) $(INTEL_GEN7_ASM) $(INTEL_GEN75_ASM) $(INTEL_GEN8_ASM) $(INTEL_GEN9_ASM) +EXTRA_DIST = \ + $(INTEL_G6A) \ + $(INTEL_G6B) \ + $(INTEL_G75A) \ + $(INTEL_G75B) \ + $(INTEL_G7A) \ + $(INTEL_G7B) \ + $(INTEL_G8A) \ + $(INTEL_G8B) \ + $(INTEL_G9A) \ + $(INTEL_G9B) \ + $(INTEL_GEN6_INC) \ + $(INTEL_GEN75_INC) \ + $(INTEL_GEN7_INC) \ + $(INTEL_GEN8_INC) \ + $(INTEL_GEN9_INC) \ + $(VME75_CORE) \ + $(VME7_CORE) \ + $(VME8_CORE) \ + $(VME9_CORE) \ + $(VME_CORE) \ + $(NULL) + + +# Extra clean files so that maintainer-clean removes *everything* +MAINTAINERCLEANFILES = Makefile.in +all: all-am + +.SUFFIXES: +.SUFFIXES: .g6a .g6b .g7a .g7b .gen6.asm .gen7.asm .g75a .g75b .gen75.asm .g8a .g8b .gen8.asm .g9a .g9b .gen9.asm +$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ + && { if test -f $@; then exit 0; else break; fi; }; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign src/shaders/vme/Makefile'; \ + $(am__cd) $(top_srcdir) && \ + $(AUTOMAKE) --foreign src/shaders/vme/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(am__aclocal_m4_deps): + +mostlyclean-libtool: + -rm -f *.lo + +clean-libtool: + -rm -rf .libs _libs +tags TAGS: + +ctags CTAGS: + +cscope cscopelist: + + +distdir: $(DISTFILES) + @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ + list='$(DISTFILES)'; \ + dist_files=`for file in $$list; do echo $$file; done | \ + sed -e "s|^$$srcdirstrip/||;t" \ + -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ + case $$dist_files in \ + */*) $(MKDIR_P) `echo "$$dist_files" | \ + sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ + sort -u` ;; \ + esac; \ + for file in $$dist_files; do \ + if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ + if test -d $$d/$$file; then \ + dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ + if test -d "$(distdir)/$$file"; then \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ + cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ + find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ + fi; \ + cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ + else \ + test -f "$(distdir)/$$file" \ + || cp -p $$d/$$file "$(distdir)/$$file" \ + || exit 1; \ + fi; \ + done +check-am: all-am +check: check-am +all-am: Makefile all-local +installdirs: +install: install-am +install-exec: install-exec-am +install-data: install-data-am +uninstall: uninstall-am + +install-am: all-am + @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am + +installcheck: installcheck-am +install-strip: + if test -z '$(STRIP)'; then \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + install; \ + else \ + $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ + "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \ + fi +mostlyclean-generic: + +clean-generic: + -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) + +distclean-generic: + -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) + -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + +maintainer-clean-generic: + @echo "This command is intended for maintainers to use" + @echo "it deletes files that may require special tools to rebuild." + -test -z "$(MAINTAINERCLEANFILES)" || rm -f $(MAINTAINERCLEANFILES) +clean: clean-am + +clean-am: clean-generic clean-libtool mostlyclean-am + +distclean: distclean-am + -rm -f Makefile +distclean-am: clean-am distclean-generic + +dvi: dvi-am + +dvi-am: + +html: html-am + +html-am: + +info: info-am + +info-am: + +install-data-am: + +install-dvi: install-dvi-am + +install-dvi-am: + +install-exec-am: + +install-html: install-html-am + +install-html-am: + +install-info: install-info-am + +install-info-am: + +install-man: + +install-pdf: install-pdf-am + +install-pdf-am: + +install-ps: install-ps-am + +install-ps-am: + +installcheck-am: + +maintainer-clean: maintainer-clean-am + -rm -f Makefile +maintainer-clean-am: distclean-am maintainer-clean-generic + +mostlyclean: mostlyclean-am + +mostlyclean-am: mostlyclean-generic mostlyclean-libtool + +pdf: pdf-am + +pdf-am: + +ps: ps-am + +ps-am: + +uninstall-am: + +.MAKE: install-am install-strip + +.PHONY: all all-am all-local check check-am clean clean-generic \ + clean-libtool cscopelist-am ctags-am distclean \ + distclean-generic distclean-libtool distdir dvi dvi-am html \ + html-am info info-am install install-am install-data \ + install-data-am install-dvi install-dvi-am install-exec \ + install-exec-am install-html install-html-am install-info \ + install-info-am install-man install-pdf install-pdf-am \ + install-ps install-ps-am install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-generic mostlyclean mostlyclean-generic \ + mostlyclean-libtool pdf pdf-am ps ps-am tags-am uninstall \ + uninstall-am + + +all-local: $(TARGETS) + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN6_ASM): $(VME_CORE) $(INTEL_GEN6_INC) +@HAVE_GEN4ASM_TRUE@.g6a.gen6.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P -DDEV_SNB $< > _vme0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _vme0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _vme0.$@ +@HAVE_GEN4ASM_TRUE@.gen6.asm.g6b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 6 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN7_ASM): $(VME7_CORE) $(INTEL_GEN7_INC) +@HAVE_GEN4ASM_TRUE@.g7a.gen7.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P -DDEV_IVB $< > _vme0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _vme0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _vme0.$@ +@HAVE_GEN4ASM_TRUE@.gen7.asm.g7b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 7 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN75_ASM): $(VME75_CORE) $(INTEL_GEN75_INC) +@HAVE_GEN4ASM_TRUE@.g75a.gen75.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P $< > _vme0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _vme0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _vme0.$@ +@HAVE_GEN4ASM_TRUE@.gen75.asm.g75b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 7.5 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN8_ASM): $(VME8_CORE) $(INTEL_GEN8_INC) +@HAVE_GEN4ASM_TRUE@.g8a.gen8.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P $< > _vme0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _vme0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _vme0.$@ +@HAVE_GEN4ASM_TRUE@.gen8.asm.g8b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 8 -o $@ $< + +@HAVE_GEN4ASM_TRUE@$(INTEL_GEN9_ASM): $(VME9_CORE) $(INTEL_GEN9_INC) +@HAVE_GEN4ASM_TRUE@.g9a.gen9.asm: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)cpp -P $< > _vme0.$@ && \ +@HAVE_GEN4ASM_TRUE@ m4 _vme0.$@ > $@ && \ +@HAVE_GEN4ASM_TRUE@ rm _vme0.$@ +@HAVE_GEN4ASM_TRUE@.gen9.asm.g9b: +@HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)$(GEN4ASM) -g 9 -o $@ $< + +# Tell versions [3.59,3.63) of GNU make to not export all variables. +# Otherwise a system limit (for SysV at least) may be exceeded. +.NOEXPORT: diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen8.asm intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen8.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,884 @@ +/* + * Copyright © <2013>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: mpeg2_inter_gen8.asm +// +// Make inter predition estimation for MPEG2 Inter-frame on gen8 +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + + +shl (2) pic_ref.0<1>:uw r4.24<2,2,1>:uw 4:uw {align1}; +mov (2) pic_ref.16<1>:uw r4.20<2,2,1>:uw {align1}; +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; + +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 2 oword (32 bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbc_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 2 oword (32bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 2 oword (32bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 2 oword (32bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are inavailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1}; +(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: + +mov (2) mv_cc_ref.0<1>:w mba_result.4<2,2,1>:w {align1}; + +/* Calibrate the ref window for MPEG2 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; + +mov (1) INPUT_ARG0.0<1>:ud vme_m0.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud vme_m0.8<0,1,0>:ud {align1}; +mov (8) INPUT_ARG1.0<1>:ud pic_ref.0<8,8,1>:ud {align1}; + +SAVE_RET {align1}; +jmpi (1) ref_boundary_check; +mov (2) vme_m0.0<1>:w RET_ARG<2,2,1>:w {align1}; + +/* m2, get the MV/Mb cost passed from constant buffer when +spawning thread by MEDIA_OBJECT */ +mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* m3 FWD/BWD cost center*/ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 skip center*/ +mov (8) vme_msg_4<1>:UD 0x0:UD {align1}; + +/* m5 */ +mov (8) vme_msg_5<1>:UD 0x0:UD {align1}; + + +/* Use the Luma mode */ +mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1}; +mov (1) vme_msg_5.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +mov (1) tmp_reg0.0<1>:UW INTRA16_DC_PRED:UW {align1}; +mov (1) vme_msg_5.4<1>:ub tmp_reg0.0<0,1,0>:UB {align1}; + +/* m6 */ +mov (8) vme_msg_6<1>:UD 0x0:UD {align1}; +mov (1) vme_msg_6.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_6.28<1>:UD 0x010101:UD {align1}; + + +/* m7 */ + +mov (8) vme_msg_7.0<1>:ud 0x0:ud {align1}; + +/* + * SIC VME message + */ + +/* Disable Intra8x8/Intra4x4 Intra-prediction */ +/* m1 */ +mov (8) vme_m1.0<1>:ud 0x0:UD {align1}; + +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +mov (1) tmp_reg0.0<1>:uw LUMA_INTRA_8x8_DISABLE:uw {align1}; +add (1) tmp_reg0.0<1>:uw tmp_reg0.0<0,1,0>:uw LUMA_INTRA_4x4_DISABLE:uw {align1}; +mov (1) intra_part_mask_ub<1>:UB tmp_reg0.0<0,1,0>:ub {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Enable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_ENABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* m0 */ +mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* Setup the Cost center */ +/* currently four 8x8 share the same cost center */ +mov (4) vme_m3.0<2>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (4) vme_m3.4<2>:ud mv_cc_ref.0<0,1,0>:ud {align1}; + +mov (8) vme_msg_3<1>:UD vme_m3.0<8,8,1>:UD {align1}; +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* M4/M5 search path */ +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_4.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.28<1>:UD 0x100F0F0F:UD {align1}; + +mov (1) vme_msg_5.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_5.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_5.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_5.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_5.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_4.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_7.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_HALF + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/2 pixel, harr, BME disable */ +/* Bilinear filter */ +mov (1) tmp_reg0.0<1>:uw 0x04:uw {align1}; +add (1) vme_m1.30<1>:ub vme_m1.30<0,1,0>:ub tmp_reg0.0<0,1,0>:ub {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; +mov (8) vme_msg_3.0<1>:UD vme_m3.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(-f0.0) jmpi (1) vme_run_again; +nop; +vme_mv_output: + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; +/* write FME info */ +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; + +mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* Inter distortion of FME */ +mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1}; + +mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1}; + +/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME MV */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +/* bind index 3, write 2 oword (32 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME RefID */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + +nop; +nop; +ref_boundary_check: + +/* The left/up coordinate of reference window */ +add (2) TEMP_VAR0.0<1>:w INPUT_ARG0.8<2,2,1>:w INPUT_ARG0.0<2,2,1>:w {align1}; +/* The right/bottom coordinate of reference window */ +add (1) TEMP_VAR0.16<1>:w TEMP_VAR0.0<0,1,0>:w 48:w {align1}; +add (1) TEMP_VAR0.18<1>:w TEMP_VAR0.2<0,1,0>:w 40:w {align1}; + +/* Firstly the MV range is checked */ +mul (2) TEMP_VAR1.16<1>:w INPUT_ARG1.16<2,2,1>:w -1:w {align1}; +add (2) TEMP_VAR1.0<1>:w INPUT_ARG0.8<2,2,1>:w TEMP_VAR1.16<2,2,1>:w {align1}; +add (2) TEMP_VAR1.4<1>:w INPUT_ARG0.8<2,2,1>:w INPUT_ARG1.16<2,2,1>:w {align1}; + +cmp.l.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w TEMP_VAR1.0<0,1,0>:w {align1}; +(f0.0) mov (1) TEMP_VAR0.0<1>:w TEMP_VAR1.0<0,1,0>:w {align1}; +cmp.g.f0.0 (1) null:w TEMP_VAR0.16<0,1,0>:w TEMP_VAR1.4<0,1,0>:w {align1}; +(f0.0) add (1) TEMP_VAR0.0<1>:w TEMP_VAR1.4<0,1,0>:w -48:w {align1}; +cmp.l.f0.0 (1) null:w TEMP_VAR0.2<0,1,0>:w TEMP_VAR1.2<0,1,0>:w {align1}; +(f0.0) mov (1) TEMP_VAR0.2<1>:w TEMP_VAR1.2<0,1,0>:w {align1}; +cmp.g.f0.0 (1) null:w TEMP_VAR0.18<0,1,0>:w TEMP_VAR1.6<0,1,0>:w {align1}; +(f0.0) add (1) TEMP_VAR0.2<1>:w TEMP_VAR1.6<0,1,0>:w -40:w {align1}; + +x_left_cmp: + cmp.l.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w 0:w {align1}; + (-f0.0) jmpi (1) x_right_cmp; + (f0.0) mov (1) TEMP_VAR0.0<1>:w 0:w {align1}; + jmpi (1) y_top_cmp; +x_right_cmp: + cmp.g.f0.0 (1) null:w TEMP_VAR0.16<0,1,0>:w INPUT_ARG1.0<0,1,0>:w {align1}; + (-f0.0) jmpi (1) y_top_cmp; + (f0.0) add (1) TEMP_VAR0.0<1>:w INPUT_ARG1.0<0,1,0>:w -48:w {align1}; +y_top_cmp: + cmp.l.f0.0 (1) null:w TEMP_VAR0.2<0,1,0>:w 0:w {align1}; + (-f0.0) jmpi (1) y_bottom_cmp; + (f0.0) mov (1) TEMP_VAR0.2<1>:w 0:w {align1}; + jmpi (1) y_bottom_end; +y_bottom_cmp: + cmp.g.f0.0 (1) null:w TEMP_VAR0.18<0,1,0>:w INPUT_ARG1.2<0,1,0>:w {align1}; + (f0.0) add (1) TEMP_VAR0.2<1>:w INPUT_ARG1.2<0,1,0>:w -40:w {align1}; + +y_bottom_end: +mul (2) TEMP_VAR1.0<1>:w INPUT_ARG0.8<2,2,1>:w -1:w {align1}; +add (2) RET_ARG<1>:w TEMP_VAR0.0<2,2,1>:w TEMP_VAR1.0<2,2,1>:w {align1}; + RETURN {align1}; +nop; +nop; + +vme_run_again: + +asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1}; +mov (2) tmp_reg0.0<1>:w mb_ref_win.0<2,2,1>:w {align1}; +add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1}; +and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1}; + +cmp.l.f0.0 (1) null:w tmp_reg0.0<0,1,0>:w 0:w {align1}; +(f0.0) mul (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +cmp.l.f0.0 (1) null:w tmp_reg0.2<0,1,0>:w 0:w {align1}; +(f0.0) mul (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; + +cmp.ge.f0.0 (1) null:w tmp_reg0.0<0,1,0>:w 4:w {align1}; +(f0.0) jmpi (1) vme_start; +cmp.ge.f0.0 (1) null:w tmp_reg0.2<0,1,0>:w 4:w {align1}; +(f0.0) jmpi (1) vme_start; + +jmpi (1) vme_done; + +vme_start: + mov (8) tmp_vme_wb0.0<1>:ud vme_wb0.0<8,8,1>:ud {align1}; + mov (8) tmp_vme_wb1.0<1>:ud vme_wb1.0<8,8,1>:ud {align1}; + +/* Calibrate the ref window for MPEG2 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; +mov (1) INPUT_ARG0.8<1>:ud vme_m0.8<0,1,0>:ud {align1}; +add (2) INPUT_ARG0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) INPUT_ARG1.0<1>:ud pic_ref.0<8,8,1>:ud {align1}; + +SAVE_RET {align1}; +jmpi (1) ref_boundary_check; +mov (2) vme_m0.0<1>:w RET_ARG<2,2,1>:w {align1}; + +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (8) vme_m1.0<1>:ud 0x0:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* Setup the Cost center */ +/* currently four 8x8 share the same cost center */ +mov (4) vme_m3.0<2>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (4) vme_m3.4<2>:ud mv_cc_ref.0<0,1,0>:ud {align1}; + +mov (8) vme_msg_3<1>:UD vme_m3.0<8,8,1>:UD {align1}; +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* M4/M5 search path */ +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_4.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.28<1>:UD 0x100F0F0F:UD {align1}; + +mov (1) vme_msg_5.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_5.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_5.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_5.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_5.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_4.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_7.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_HALF + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/2 pixel, harr, BME disable */ +/* Bilinear filter */ +mov (1) tmp_reg0.0<1>:uw 0x04:uw {align1}; +add (1) vme_m1.30<1>:ub vme_m1.30<0,1,0>:ub tmp_reg0.0<0,1,0>:ub {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; +mov (8) vme_msg_3.0<1>:UD vme_m3.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +cmp.l.f0.0 (1) null:uw vme_wb0.8<0,1,0>:uw tmp_vme_wb0.8<0,1,0>:uw {align1}; +(f0.0) jmpi (1) vme_done; +mov (8) vme_wb0.0<1>:ud tmp_vme_wb0.0<8,8,1>:ud {align1}; +mov (8) vme_wb1.0<1>:ud tmp_vme_wb1.0<8,8,1>:ud {align1}; + +vme_done: + jmpi (1) vme_mv_output; +nop; +nop; +nop; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen8.g8a intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen8.g8a --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen8.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen8.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3 @@ +#include "vme8.inc" +#include "vme75_mpeg2.inc" +#include "mpeg2_inter_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen8.g8b intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen8.g8b --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen8.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen8.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,371 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x2a401248, 0x16450098, 0x00040004 }, + { 0x00200001, 0x2a501248, 0x00450094, 0x00000000 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000720 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02180203 }, + { 0x00200001, 0x2ae40208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2af01e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000360 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02180203 }, + { 0x00200001, 0x2b040208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b101e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000110 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000180 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02180203 }, + { 0x00200001, 0x2b240208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000130 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x0e000b40, 0x02180203 }, + { 0x00200001, 0x2b240208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02000010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b141248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b341248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00208, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000190 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000780 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000720 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x00200001, 0x2a201a68, 0x00450ae4, 0x00000000 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x00000001, 0x2fa00208, 0x00000440, 0x00000000 }, + { 0x00000001, 0x2fa80208, 0x00000448, 0x00000000 }, + { 0x00600001, 0x2fc00208, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000007b0 }, + { 0x00200001, 0x24401a68, 0x00450fe4, 0x00000000 }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00bb00bb }, + { 0x00000001, 0x28a42288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00600001, 0x28e00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00020002 }, + { 0x00000040, 0x24001248, 0x16000400, 0x00040004 }, + { 0x00000001, 0x247c2288, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000a20, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x0e000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00241000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00040004 }, + { 0x00000040, 0x247e2288, 0x2200047e, 0x00000400 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10786000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x000004a0 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x0e000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00200040, 0x2f601a68, 0x1a450fa8, 0x00450fa0 }, + { 0x00000040, 0x2f701a68, 0x1e000f60, 0x00300030 }, + { 0x00000040, 0x2f721a68, 0x1e000f62, 0x00280028 }, + { 0x00200041, 0x2f901a68, 0x1e450fd0, 0xffffffff }, + { 0x00200040, 0x2f801a68, 0x1a450fa8, 0x00450f90 }, + { 0x00200040, 0x2f841a68, 0x1a450fa8, 0x00450fd0 }, + { 0x05000010, 0x20001a60, 0x1a000f60, 0x00000f80 }, + { 0x00010001, 0x2f601a68, 0x00000f80, 0x00000000 }, + { 0x03000010, 0x20001a60, 0x1a000f70, 0x00000f84 }, + { 0x00010040, 0x2f601a68, 0x1e000f84, 0xffd0ffd0 }, + { 0x05000010, 0x20001a60, 0x1a000f62, 0x00000f82 }, + { 0x00010001, 0x2f621a68, 0x00000f82, 0x00000000 }, + { 0x03000010, 0x20001a60, 0x1a000f72, 0x00000f86 }, + { 0x00010040, 0x2f621a68, 0x1e000f86, 0xffd8ffd8 }, + { 0x05000010, 0x20001a60, 0x1e000f60, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x00010001, 0x2f601e68, 0x18000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x03000010, 0x20001a60, 0x1a000f70, 0x00000fc0 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000010 }, + { 0x00010040, 0x2f601a68, 0x1e000fc0, 0xffd0ffd0 }, + { 0x05000010, 0x20001a60, 0x1e000f62, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x00010001, 0x2f621e68, 0x18000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x03000010, 0x20001a60, 0x1a000f72, 0x00000fc2 }, + { 0x00010040, 0x2f621a68, 0x1e000fc2, 0xffd8ffd8 }, + { 0x00200041, 0x2f801a68, 0x1e450fa8, 0xffffffff }, + { 0x00200040, 0x2fe41a68, 0x1a450f60, 0x00450f80 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0020000c, 0x2a801a68, 0x1e450ac0, 0x00020002 }, + { 0x00200001, 0x24001a68, 0x00450a80, 0x00000000 }, + { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 }, + { 0x00200005, 0x2a901248, 0x16450a88, 0xfffcfffc }, + { 0x05000010, 0x20001a60, 0x1e000400, 0x00000000 }, + { 0x00010041, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x05000010, 0x20001a60, 0x1e000402, 0x00000000 }, + { 0x00010041, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x04000010, 0x20001a60, 0x1e000400, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1e000402, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000010 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000003a0 }, + { 0x00600001, 0x2c800208, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x2ca00208, 0x008d01a0, 0x00000000 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x00000001, 0x2fa80208, 0x00000448, 0x00000000 }, + { 0x00200040, 0x2fa01a68, 0x1a450440, 0x00450a90 }, + { 0x00600001, 0x2fc00208, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0xfffffca0 }, + { 0x00200001, 0x24401a68, 0x00450fe4, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x24600608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000a20, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x0e000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00241000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00040004 }, + { 0x00000040, 0x247e2288, 0x2200047e, 0x00000400 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10786000 }, + { 0x05000010, 0x20001240, 0x12000188, 0x00000c88 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x00600001, 0x21800208, 0x008d0c80, 0x00000000 }, + { 0x00600001, 0x21a00208, 0x008d0ca0, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0xfffff6f0 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen9.g9a intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen9.g9a --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen9.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen9.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3 @@ +#include "vme8.inc" +#include "vme75_mpeg2.inc" +#include "mpeg2_inter_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen9.g9b intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen9.g9b --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_gen9.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_gen9.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,371 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x2a401248, 0x16450098, 0x00040004 }, + { 0x00200001, 0x2a501248, 0x00450094, 0x00000000 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000720 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02180203 }, + { 0x00200001, 0x2ae40208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2af01e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000360 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02180203 }, + { 0x00200001, 0x2b040208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b101e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000110 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000180 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02180203 }, + { 0x00200001, 0x2b240208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000130 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x06000b40, 0x02180203 }, + { 0x00200001, 0x2b240208, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02000010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b141248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b341248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00208, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000190 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000780 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000720 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x00200001, 0x2a201a68, 0x00450ae4, 0x00000000 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x00000001, 0x2fa00208, 0x00000440, 0x00000000 }, + { 0x00000001, 0x2fa80208, 0x00000448, 0x00000000 }, + { 0x00600001, 0x2fc00208, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000007b0 }, + { 0x00200001, 0x24401a68, 0x00450fe4, 0x00000000 }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28a00608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00bb00bb }, + { 0x00000001, 0x28a42288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00600001, 0x28e00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00020002 }, + { 0x00000040, 0x24001248, 0x16000400, 0x00040004 }, + { 0x00000001, 0x247c2288, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000a20, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x06000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00241000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00040004 }, + { 0x00000040, 0x247e2288, 0x2200047e, 0x00000400 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10786000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x000004a0 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x06000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00200040, 0x2f601a68, 0x1a450fa8, 0x00450fa0 }, + { 0x00000040, 0x2f701a68, 0x1e000f60, 0x00300030 }, + { 0x00000040, 0x2f721a68, 0x1e000f62, 0x00280028 }, + { 0x00200041, 0x2f901a68, 0x1e450fd0, 0xffffffff }, + { 0x00200040, 0x2f801a68, 0x1a450fa8, 0x00450f90 }, + { 0x00200040, 0x2f841a68, 0x1a450fa8, 0x00450fd0 }, + { 0x05000010, 0x20001a60, 0x1a000f60, 0x00000f80 }, + { 0x00010001, 0x2f601a68, 0x00000f80, 0x00000000 }, + { 0x03000010, 0x20001a60, 0x1a000f70, 0x00000f84 }, + { 0x00010040, 0x2f601a68, 0x1e000f84, 0xffd0ffd0 }, + { 0x05000010, 0x20001a60, 0x1a000f62, 0x00000f82 }, + { 0x00010001, 0x2f621a68, 0x00000f82, 0x00000000 }, + { 0x03000010, 0x20001a60, 0x1a000f72, 0x00000f86 }, + { 0x00010040, 0x2f621a68, 0x1e000f86, 0xffd8ffd8 }, + { 0x05000010, 0x20001a60, 0x1e000f60, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x00010001, 0x2f601e68, 0x18000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x03000010, 0x20001a60, 0x1a000f70, 0x00000fc0 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000010 }, + { 0x00010040, 0x2f601a68, 0x1e000fc0, 0xffd0ffd0 }, + { 0x05000010, 0x20001a60, 0x1e000f62, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x00010001, 0x2f621e68, 0x18000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x03000010, 0x20001a60, 0x1a000f72, 0x00000fc2 }, + { 0x00010040, 0x2f621a68, 0x1e000fc2, 0xffd8ffd8 }, + { 0x00200041, 0x2f801a68, 0x1e450fa8, 0xffffffff }, + { 0x00200040, 0x2fe41a68, 0x1a450f60, 0x00450f80 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0020000c, 0x2a801a68, 0x1e450ac0, 0x00020002 }, + { 0x00200001, 0x24001a68, 0x00450a80, 0x00000000 }, + { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 }, + { 0x00200005, 0x2a901248, 0x16450a88, 0xfffcfffc }, + { 0x05000010, 0x20001a60, 0x1e000400, 0x00000000 }, + { 0x00010041, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x05000010, 0x20001a60, 0x1e000402, 0x00000000 }, + { 0x00010041, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x04000010, 0x20001a60, 0x1e000400, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1e000402, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000010 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x000003a0 }, + { 0x00600001, 0x2c800208, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x2ca00208, 0x008d01a0, 0x00000000 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x00000001, 0x2fa80208, 0x00000448, 0x00000000 }, + { 0x00200040, 0x2fa01a68, 0x1a450440, 0x00450a90 }, + { 0x00600001, 0x2fc00208, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0xfffffca0 }, + { 0x00200001, 0x24401a68, 0x00450fe4, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x24600608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000a20, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x06000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00241000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00040004 }, + { 0x00000040, 0x247e2288, 0x2200047e, 0x00000400 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10786000 }, + { 0x05000010, 0x20001240, 0x12000188, 0x00000c88 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000020 }, + { 0x00600001, 0x21800208, 0x008d0c80, 0x00000000 }, + { 0x00600001, 0x21a00208, 0x008d0ca0, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0xfffff6f0 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_haswell.asm intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_haswell.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_haswell.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_haswell.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,876 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * Author : Zhao Yakui + */ +// Modual name: mpeg2_inter_haswell.asm +// +// Make MPEG2 inter predition estimation for Inter-frame on Haswell +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) pic_ref.0<1>:uw r4.24<2,2,1>:uw 4:uw {align1}; +mov (2) pic_ref.16<1>:uw r4.20<2,2,1>:uw {align1}; +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; + +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 2 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbc_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are inavailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1}; +(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: + +mov (2) mv_cc_ref.0<1>:w mba_result.4<2,2,1>:w {align1}; + +/* Calibrate the ref window for MPEG2 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; + +mov (1) INPUT_ARG0.0<1>:ud vme_m0.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud vme_m0.8<0,1,0>:ud {align1}; +mov (8) INPUT_ARG1.0<1>:ud pic_ref.0<8,8,1>:ud {align1}; + +SAVE_RET {align1}; +jmpi (1) ref_boundary_check; +mov (2) vme_m0.0<1>:w RET_ARG<2,2,1>:w {align1}; + +/* m2, get the MV/Mb cost passed from constant buffer when +spawning thread by MEDIA_OBJECT */ +mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* the neighbour pixel is zero for MPEG2 Intra-prediction */ + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0:UD {align1}; +mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1}; +/* Use the Luma mode */ +mov (1) vme_msg_4.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; +mov (1) tmp_reg0.0<1>:UW INTRA16_DC_PRED:UW {align1}; +mov (1) vme_msg_4.4<1>:ub tmp_reg0.0<0,1,0>:UB {align1}; + +/* m5 */ +mov (8) vme_msg_5<1>:UD 0x0:UD {align1}; +mov (1) vme_msg_5.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_5.28<1>:UD 0x010101:UD {align1}; + + +/* m6 */ +mov (8) vme_msg_6.0<1>:UD 0:Ud {align1}; + +/* + * SIC VME message + */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* Disable Intra8x8/Intra4x4 Intra-prediction */ +/* m1 */ +mov (8) vme_m1.0<1>:ud 0x0:UD {align1}; + +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +mov (1) tmp_reg0.0<1>:uw LUMA_INTRA_8x8_DISABLE:uw {align1}; +add (1) tmp_reg0.0<1>:uw tmp_reg0.0<0,1,0>:uw LUMA_INTRA_4x4_DISABLE:uw {align1}; +mov (1) intra_part_mask_ub<1>:UB tmp_reg0.0<0,1,0>:ub {align1}; + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Enable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_ENABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */ +/* m0 */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; + +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; + +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; +/* M3/M4 search path */ + +mov (1) vme_msg_3.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_3.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.28<1>:UD 0x100F0F0F:UD {align1}; + +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_4.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_3.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_4.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_HALF + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/2 pixel, harr, BME disable */ + +/* Bilinear filter */ +mov (1) tmp_reg0.0<1>:uw 0x04:uw {align1}; +add (1) vme_m1.30<1>:ub vme_m1.30<0,1,0>:ub tmp_reg0.0<0,1,0>:ub {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(-f0.0) jmpi (1) vme_run_again; +nop; +vme_mv_output: + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; +/* write FME info */ +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; + +mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* Inter distortion of FME */ +mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1}; + +mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1}; + +/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + +/* Write FME/BME MV */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME RefID */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + nop ; + nop ; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + +nop; +nop; + +ref_boundary_check: + +/* The left/up coordinate of reference window */ +add (2) TEMP_VAR0.0<1>:w INPUT_ARG0.8<2,2,1>:w INPUT_ARG0.0<2,2,1>:w {align1}; +/* The right/bottom coordinate of reference window */ +add (1) TEMP_VAR0.16<1>:w TEMP_VAR0.0<0,1,0>:w 48:w {align1}; +add (1) TEMP_VAR0.18<1>:w TEMP_VAR0.2<0,1,0>:w 40:w {align1}; + +/* Firstly the MV range is checked */ +mul (2) TEMP_VAR1.16<1>:w INPUT_ARG1.16<2,2,1>:w -1:w {align1}; +add (2) TEMP_VAR1.0<1>:w INPUT_ARG0.8<2,2,1>:w TEMP_VAR1.16<2,2,1>:w {align1}; +add (2) TEMP_VAR1.4<1>:w INPUT_ARG0.8<2,2,1>:w INPUT_ARG1.16<2,2,1>:w {align1}; + +cmp.l.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w TEMP_VAR1.0<0,1,0>:w {align1}; +(f0.0) mov (1) TEMP_VAR0.0<1>:w TEMP_VAR1.0<0,1,0>:w {align1}; +cmp.g.f0.0 (1) null:w TEMP_VAR0.16<0,1,0>:w TEMP_VAR1.4<0,1,0>:w {align1}; +(f0.0) add (1) TEMP_VAR0.0<1>:w TEMP_VAR1.4<0,1,0>:w -48:w {align1}; +cmp.l.f0.0 (1) null:w TEMP_VAR0.2<0,1,0>:w TEMP_VAR1.2<0,1,0>:w {align1}; +(f0.0) mov (1) TEMP_VAR0.2<1>:w TEMP_VAR1.2<0,1,0>:w {align1}; +cmp.g.f0.0 (1) null:w TEMP_VAR0.18<0,1,0>:w TEMP_VAR1.6<0,1,0>:w {align1}; +(f0.0) add (1) TEMP_VAR0.2<1>:w TEMP_VAR1.6<0,1,0>:w -40:w {align1}; + +x_left_cmp: + cmp.l.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w 0:w {align1}; + (-f0.0) jmpi (1) x_right_cmp; + (f0.0) mov (1) TEMP_VAR0.0<1>:w 0:w {align1}; + jmpi (1) y_top_cmp; +x_right_cmp: + cmp.g.f0.0 (1) null:w TEMP_VAR0.16<0,1,0>:w INPUT_ARG1.0<0,1,0>:w {align1}; + (-f0.0) jmpi (1) y_top_cmp; + (f0.0) add (1) TEMP_VAR0.0<1>:w INPUT_ARG1.0<0,1,0>:w -48:w {align1}; +y_top_cmp: + cmp.l.f0.0 (1) null:w TEMP_VAR0.2<0,1,0>:w 0:w {align1}; + (-f0.0) jmpi (1) y_bottom_cmp; + (f0.0) mov (1) TEMP_VAR0.2<1>:w 0:w {align1}; + jmpi (1) y_bottom_end; +y_bottom_cmp: + cmp.g.f0.0 (1) null:w TEMP_VAR0.18<0,1,0>:w INPUT_ARG1.2<0,1,0>:w {align1}; + (f0.0) add (1) TEMP_VAR0.2<1>:w INPUT_ARG1.2<0,1,0>:w -40:w {align1}; + +y_bottom_end: +mul (2) TEMP_VAR1.0<1>:w INPUT_ARG0.8<2,2,1>:w -1:w {align1}; +add (2) RET_ARG<1>:w TEMP_VAR0.0<2,2,1>:w TEMP_VAR1.0<2,2,1>:w {align1}; + RETURN {align1}; +nop; +nop; + +vme_run_again: + +asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1}; +mov (2) tmp_reg0.0<1>:w mb_ref_win.0<2,2,1>:w {align1}; +add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1}; +and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1}; + +cmp.l.f0.0 (1) null:w tmp_reg0.0<0,1,0>:w 0:w {align1}; +(f0.0) mul (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +cmp.l.f0.0 (1) null:w tmp_reg0.2<0,1,0>:w 0:w {align1}; +(f0.0) mul (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; + +cmp.ge.f0.0 (1) null:w tmp_reg0.0<0,1,0>:w 4:w {align1}; +(f0.0) jmpi (1) vme_start; +cmp.ge.f0.0 (1) null:w tmp_reg0.2<0,1,0>:w 4:w {align1}; +(f0.0) jmpi (1) vme_start; + +jmpi (1) vme_done; + +vme_start: + mov (8) tmp_vme_wb0.0<1>:ud vme_wb0.0<8,8,1>:ud {align1}; + mov (8) tmp_vme_wb1.0<1>:ud vme_wb1.0<8,8,1>:ud {align1}; + +/* Calibrate the ref window for MPEG2 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; +mov (4) INPUT_ARG0.0<1>:ud vme_m0.0<4,4,1>:ud {align1}; +add (2) INPUT_ARG0.0<1>:w INPUT_ARG0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) INPUT_ARG1.0<1>:ud pic_ref.0<8,8,1>:ud {align1}; + +SAVE_RET {align1}; +jmpi (1) ref_boundary_check; +mov (2) vme_m0.0<1>:w RET_ARG<2,2,1>:w {align1}; + +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (8) vme_m1.0<1>:ud 0x0:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; +/* M3/M4 search path */ + +mov (1) vme_msg_3.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_3.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_3.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_3.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_3.28<1>:UD 0x100F0F0F:UD {align1}; + +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_4.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_3.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_4.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_HALF + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/2 pixel, harr, BME disable */ + +/* Bilinear filter */ +mov (1) tmp_reg0.0<1>:uw 0x04:uw {align1}; +add (1) vme_m1.30<1>:ub vme_m1.30<0,1,0>:ub tmp_reg0.0<0,1,0>:ub {align1}; + +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +cmp.l.f0.0 (1) null:uw vme_wb0.8<0,1,0>:uw tmp_vme_wb0.8<0,1,0>:uw {align1}; +(f0.0) jmpi (1) vme_done; +mov (8) vme_wb0.0<1>:ud tmp_vme_wb0.0<8,8,1>:ud {align1}; +mov (8) vme_wb1.0<1>:ud tmp_vme_wb1.0<8,8,1>:ud {align1}; + +vme_done: + jmpi (1) vme_mv_output; +nop; +nop; +nop; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_haswell.g75a intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_haswell.g75a --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_haswell.g75a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_haswell.g75a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3 @@ +#include "vme75.inc" +#include "vme75_mpeg2.inc" +#include "mpeg2_inter_haswell.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_haswell.g75b intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_haswell.g75b --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_haswell.g75b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_haswell.g75b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,366 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x00000018 }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x2a402d29, 0x00450098, 0x00040004 }, + { 0x00200001, 0x2a500129, 0x00450094, 0x00000000 }, + { 0x00600001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ae00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000710 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000f0 }, + { 0x00000001, 0x2ae000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2ae40021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2af001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000350 }, + { 0x00000001, 0x2b0000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2b040021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b1001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00080008 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000110 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000040, 0x24003dad, 0x00000400, 0x00010001 }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000170 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2b240021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000120 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000f0 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x00000018 }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x02280303 }, + { 0x05000010, 0x2000252c, 0x00000b70, 0x00000b88 }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000003 }, + { 0x0a800031, 0x2ba01cb1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2b240021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000040, 0x240014a5, 0x00000b00, 0x00000b20 }, + { 0x01000010, 0x20001ca4, 0x00000400, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000080 }, + { 0x02000010, 0x20001ca4, 0x00000ae0, 0x00000000 }, + { 0x00010001, 0x2b040021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b140129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b340129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00021, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000190 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af4, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b14, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b34, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac00021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000c0 }, + { 0x00000001, 0x2fa001ad, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000760 }, + { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000700 }, + { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 }, + { 0x00200001, 0x2a2001ad, 0x00450ae4, 0x00000000 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 }, + { 0x00000001, 0x2fa00021, 0x00000440, 0x00000000 }, + { 0x00000001, 0x2fa80021, 0x00000448, 0x00000000 }, + { 0x00600001, 0x2fc00021, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000790 }, + { 0x00200001, 0x244001ad, 0x00450fe4, 0x00000000 }, + { 0x00600001, 0x25600021, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00010001 }, + { 0x00000001, 0x28850231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00bb00bb }, + { 0x00000001, 0x28840231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28a00061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28b00061, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28bc0061, 0x00000000, 0x00010101 }, + { 0x00600001, 0x28c00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00020002 }, + { 0x00000040, 0x24002d29, 0x00000400, 0x00040004 }, + { 0x00000001, 0x247c0231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x247e0231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e782000 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28300129, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340021, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0021, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000001, 0x24700021, 0x00000a20, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28600061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28640061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28680061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x286c0061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28700061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28740061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28780061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x287c0061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28800061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0061, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28900061, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21801ca1, 0x00000800, 0x0a784000 }, + { 0x00000001, 0x25740061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25750231, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25760231, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24002d29, 0x00000180, 0x00030003 }, + { 0x00000001, 0x25740231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00241000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00040004 }, + { 0x00000040, 0x247e4631, 0x0000047e, 0x00000400 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e786000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x000004a0 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000002 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0003 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000001 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x0a800031, 0x2b601ca1, 0x00000b40, 0x0219e003 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000070 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000a0 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000060 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00200040, 0x2f6035ad, 0x00450fa8, 0x00450fa0 }, + { 0x00000040, 0x2f703dad, 0x00000f60, 0x00300030 }, + { 0x00000040, 0x2f723dad, 0x00000f62, 0x00280028 }, + { 0x00200041, 0x2f903dad, 0x00450fd0, 0xffffffff }, + { 0x00200040, 0x2f8035ad, 0x00450fa8, 0x00450f90 }, + { 0x00200040, 0x2f8435ad, 0x00450fa8, 0x00450fd0 }, + { 0x05000010, 0x200035ac, 0x00000f60, 0x00000f80 }, + { 0x00010001, 0x2f6001ad, 0x00000f80, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x00000f70, 0x00000f84 }, + { 0x00010040, 0x2f603dad, 0x00000f84, 0xffd0ffd0 }, + { 0x05000010, 0x200035ac, 0x00000f62, 0x00000f82 }, + { 0x00010001, 0x2f6201ad, 0x00000f82, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x00000f72, 0x00000f86 }, + { 0x00010040, 0x2f623dad, 0x00000f86, 0xffd8ffd8 }, + { 0x05000010, 0x20003dac, 0x00000f60, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00010001, 0x2f6001ed, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x03000010, 0x200035ac, 0x00000f70, 0x00000fc0 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00010040, 0x2f603dad, 0x00000fc0, 0xffd0ffd0 }, + { 0x05000010, 0x20003dac, 0x00000f62, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00010001, 0x2f6201ed, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x03000010, 0x200035ac, 0x00000f72, 0x00000fc2 }, + { 0x00010040, 0x2f623dad, 0x00000fc2, 0xffd8ffd8 }, + { 0x00200041, 0x2f803dad, 0x00450fa8, 0xffffffff }, + { 0x00200040, 0x2fe435ad, 0x00450f60, 0x00450f80 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0020000c, 0x2a803dad, 0x00450ac0, 0x00020002 }, + { 0x00200001, 0x240001ad, 0x00450a80, 0x00000000 }, + { 0x00200040, 0x2a883dad, 0x00450a80, 0x00030003 }, + { 0x00200005, 0x2a902d29, 0x00450a88, 0xfffcfffc }, + { 0x05000010, 0x20003dac, 0x00000400, 0x00000000 }, + { 0x00010041, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x05000010, 0x20003dac, 0x00000402, 0x00000000 }, + { 0x00010041, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x04000010, 0x20003dac, 0x00000400, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, + { 0x04000010, 0x20003dac, 0x00000402, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000380 }, + { 0x00600001, 0x2c800021, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x2ca00021, 0x008d01a0, 0x00000000 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 }, + { 0x00400001, 0x2fa00021, 0x00690440, 0x00000000 }, + { 0x00200040, 0x2fa035ad, 0x00450fa0, 0x00450a90 }, + { 0x00600001, 0x2fc00021, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0xfffffca0 }, + { 0x00200001, 0x244001ad, 0x00450fe4, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000001, 0x24700021, 0x00000a20, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28600061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28640061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28680061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x286c0061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28700061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28740061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28780061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x287c0061, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28800061, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840061, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880061, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0061, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28900061, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21801ca1, 0x00000800, 0x0a784000 }, + { 0x00000001, 0x25740061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25750231, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25760231, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24002d29, 0x00000180, 0x00030003 }, + { 0x00000001, 0x25740231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28600021, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28800021, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28a00021, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28c00021, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x00241000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00040004 }, + { 0x00000040, 0x247e4631, 0x0000047e, 0x00000400 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 }, + { 0x0d600031, 0x21801ca1, 0x00000800, 0x0e786000 }, + { 0x05000010, 0x20002528, 0x00000188, 0x00000c88 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, + { 0x00600001, 0x21800021, 0x008d0c80, 0x00000000 }, + { 0x00600001, 0x21a00021, 0x008d0ca0, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0xfffff710 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_ivb.asm intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_ivb.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_ivb.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_ivb.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,721 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * Authors: Zhao Yakui + * + */ +// Modual name: mpeg2_inter_ivb.asm +// +// Make inter predition estimation for Mpeg2 Inter frame on Ivy +// + +// +// Now, begin source code.... +// + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) pic_ref.0<1>:uw r4.24<2,2,1>:uw 4:uw {align1}; +mov (2) pic_ref.16<1>:uw r4.20<2,2,1>:uw {align1}; + +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 1 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mbb_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 2 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mbc_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 2 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mb_mvp_start; +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 2 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; + +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_IN_OWS:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ +mov (1) mb_msg_tmp.8<1>:ud mb_msg0.8<0,1,0>:ud {align1}; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_0, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +and.z.f0.0 (1) null<1>:ud mb_mode_wb.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; +(-f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(-f0.0) jmpi (1) mb_mvp_start; + +mov (1) mb_msg0.8<1>:UD mb_msg_tmp.8<0,1,0>:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 2 oword (16bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_2, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv0.0<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are invailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1}; +(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<1>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<1>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: + +mov (2) mv_cc_ref.0<1>:w mba_result.4<2,2,1>:w {align1}; + +/* Calibrate the ref window for MPEG2 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; +mov (1) INPUT_ARG0.0<1>:ud vme_m0.0<0,1,0>:ud {align1}; +mov (1) INPUT_ARG0.8<1>:ud vme_m0.8<0,1,0>:ud {align1}; +mov (8) INPUT_ARG1.0<1>:ud pic_ref.0<8,8,1>:ud {align1}; + +SAVE_RET {align1}; +jmpi (1) ref_boundary_check; +mov (2) vme_m0.0<1>:w RET_ARG<2,2,1>:w {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; +/* Use the Luma mode */ +mov (1) tmp_reg0.0<1>:UW INTRA16_DC_PRED:UW {align1}; +mov (1) vme_msg_3.4<1>:ub tmp_reg0.0<0,1,0>:UB {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0:UD {align1}; +mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + + +/* m1 */ +mov (8) vme_m1.0<1>:ud 0x0:ud {align1}; +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +mov (1) tmp_reg0.0<1>:uw LUMA_INTRA_8x8_DISABLE:uw {align1}; +add (1) tmp_reg0.0<1>:uw tmp_reg0.0<0,1,0>:uw LUMA_INTRA_4x4_DISABLE:uw {align1}; +mov (1) intra_part_mask_ub<1>:UB tmp_reg0.0<0,1,0>:ub {align1}; +/* m1 */ +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + + +/* M0 */ +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_HALF:UD {align1}; +/* 16x16 Source, 1/2 pixel, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* m1 */ + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* MV num is passed by constant buffer. R4.28 */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +add (1) vme_m1.4<1>:UD vme_m1.4<0,1,0>:UD FB_PRUNING_DISABLE:UD {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; + +/* Bilinear filter */ +mov (1) tmp_reg0.0<1>:uw 0x04:uw {align1}; +add (1) vme_m1.30<1>:ub vme_m1.30<0,1,0>:ub tmp_reg0.0<0,1,0>:ub {align1}; + +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_MIXED + ) + mlen vme_msg_length + rlen vme_inter_wb_length + {align1}; + +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(-f0.0) jmpi (1) vme_run_again; + +vme_mv_output: + +and.z.f0.0 (1) null<1>:ud vme_wb0.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; + +(-f0.0)jmpi (1) __INTRA_INFO ; + +__INTER_INFO: +/* Write MV pairs */ +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; + +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + + +mov (1) msg_reg1.0<1>:ud vme_wb0.0<0,1,0>:ud {align1} ; +mov (1) msg_reg1.4<1>:UD vme_wb0.28<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:ud tmp_ud1<0,1,0>:ud {align1} ; +mov (1) msg_reg1.12<1>:ud vme_wb0.0<0,1,0>:ud {align1} ; +mov (1) msg_reg1.16<1>:ud 0x25:ud {align1} ; +jmpi (1) __OUTPUT_INFO; + +__INTRA_INFO: +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; +mov (1) msg_reg1.16<1>:ud 0x35:ud {align1} ; + +__OUTPUT_INFO: + +mov (1) msg_reg1.20<1>:ud obw_m0.8<0,1,0>:ud {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD INTER_VME_OUTPUT_MV_IN_OWS:UD {align1}; +mov (8) msg_reg0.0<1>:ud obw_m0.0<8,8,1>:ud {align1}; + + +/* bind index 3, write 1 oword, msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + +nop; +nop; + +ref_boundary_check: + +/* The left/up coordinate of reference window */ +add (2) TEMP_VAR0.0<1>:w INPUT_ARG0.8<2,2,1>:w INPUT_ARG0.0<2,2,1>:w {align1}; +/* The right/bottom coordinate of reference window */ +add (1) TEMP_VAR0.16<1>:w TEMP_VAR0.0<0,1,0>:w 48:w {align1}; +add (1) TEMP_VAR0.18<1>:w TEMP_VAR0.2<0,1,0>:w 40:w {align1}; + +/* Firstly the MV range is checked */ +mul (2) TEMP_VAR1.16<1>:w INPUT_ARG1.16<2,2,1>:w -1:w {align1}; +add (2) TEMP_VAR1.0<1>:w INPUT_ARG0.8<2,2,1>:w TEMP_VAR1.16<2,2,1>:w {align1}; +add (2) TEMP_VAR1.4<1>:w INPUT_ARG0.8<2,2,1>:w INPUT_ARG1.16<2,2,1>:w {align1}; + +cmp.l.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w TEMP_VAR1.0<0,1,0>:w {align1}; +(f0.0) mov (1) TEMP_VAR0.0<1>:w TEMP_VAR1.0<0,1,0>:w {align1}; +cmp.g.f0.0 (1) null:w TEMP_VAR0.16<0,1,0>:w TEMP_VAR1.4<0,1,0>:w {align1}; +(f0.0) add (1) TEMP_VAR0.0<1>:w TEMP_VAR1.4<0,1,0>:w -48:w {align1}; +cmp.l.f0.0 (1) null:w TEMP_VAR0.2<0,1,0>:w TEMP_VAR1.2<0,1,0>:w {align1}; +(f0.0) mov (1) TEMP_VAR0.2<1>:w TEMP_VAR1.2<0,1,0>:w {align1}; +cmp.g.f0.0 (1) null:w TEMP_VAR0.18<0,1,0>:w TEMP_VAR1.6<0,1,0>:w {align1}; +(f0.0) add (1) TEMP_VAR0.2<1>:w TEMP_VAR1.6<0,1,0>:w -40:w {align1}; + + +x_left_cmp: + cmp.l.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w 0:w {align1}; + (-f0.0) jmpi (1) x_right_cmp; + (f0.0) mov (1) TEMP_VAR0.0<1>:w 0:w {align1}; + jmpi (1) y_top_cmp; +x_right_cmp: + cmp.g.f0.0 (1) null:w TEMP_VAR0.16<0,1,0>:w INPUT_ARG1.0<0,1,0>:w {align1}; + (-f0.0) jmpi (1) y_top_cmp; + (f0.0) add (1) TEMP_VAR0.0<1>:w INPUT_ARG1.0<0,1,0>:w -48:w {align1}; +y_top_cmp: + cmp.l.f0.0 (1) null:w TEMP_VAR0.2<0,1,0>:w 0:w {align1}; + (-f0.0) jmpi (1) y_bottom_cmp; + (f0.0) mov (1) TEMP_VAR0.2<1>:w 0:w {align1}; + jmpi (1) y_bottom_end; +y_bottom_cmp: + cmp.g.f0.0 (1) null:w TEMP_VAR0.18<0,1,0>:w INPUT_ARG1.2<0,1,0>:w {align1}; + (f0.0) add (1) TEMP_VAR0.2<1>:w INPUT_ARG1.2<0,1,0>:w -40:w {align1}; + +y_bottom_end: +mul (2) TEMP_VAR1.0<1>:w INPUT_ARG0.8<2,2,1>:w -1:w {align1}; +add (2) RET_ARG<1>:w TEMP_VAR0.0<2,2,1>:w TEMP_VAR1.0<2,2,1>:w {align1}; + RETURN {align1}; +nop; +nop; + +vme_run_again: + +asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1}; +mov (2) tmp_reg0.0<1>:w mb_ref_win.0<2,2,1>:w {align1}; +add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1}; +and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1}; + +cmp.l.f0.0 (1) null:w tmp_reg0.0<0,1,0>:w 0:w {align1}; +(f0.0) mul (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +cmp.l.f0.0 (1) null:w tmp_reg0.2<0,1,0>:w 0:w {align1}; +(f0.0) mul (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; + +cmp.ge.f0.0 (1) null:w tmp_reg0.0<0,1,0>:w 4:w {align1}; +(f0.0) jmpi (1) vme_start; +cmp.ge.f0.0 (1) null:w tmp_reg0.2<0,1,0>:w 4:w {align1}; +(f0.0) jmpi (1) vme_start; + +jmpi (1) vme_done; + +vme_start: + mov (8) tmp_vme_wb0.0<1>:ud vme_wb0.0<8,8,1>:ud {align1}; + mov (8) tmp_vme_wb1.0<1>:ud vme_wb1.0<8,8,1>:ud {align1}; + +/* Calibrate the ref window for MPEG2 */ +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; +mov (1) INPUT_ARG0.8<1>:ud vme_m0.8<0,1,0>:ud {align1}; +add (2) INPUT_ARG0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) INPUT_ARG1.0<1>:ud pic_ref.0<8,8,1>:ud {align1}; + +SAVE_RET {align1}; +jmpi (1) ref_boundary_check; +mov (2) vme_m0.0<1>:w RET_ARG<2,2,1>:w {align1}; + +/* m2 */ +mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; + +/* m3 */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 */ +mov (8) vme_msg_4<1>:UD 0x0:UD {align1}; + + +/* m1 */ +mov (8) vme_m1.0<1>:ud 0x0:ud {align1}; +mov (1) intra_flag<1>:UW 0x0:UW {align1} ; +mov (1) tmp_reg0.0<1>:uw LUMA_INTRA_8x8_DISABLE:uw {align1}; +add (1) tmp_reg0.0<1>:uw tmp_reg0.0<0,1,0>:uw LUMA_INTRA_4x4_DISABLE:uw {align1}; +mov (1) intra_part_mask_ub<1>:UB tmp_reg0.0<0,1,0>:ub {align1}; +/* m1 */ +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + + +/* M0 */ +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR + SUB_PEL_MODE_HALF:UD {align1}; +/* 16x16 Source, 1/2 pixel, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* m1 */ + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* MV num is passed by constant buffer. R4.28 */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +add (1) vme_m1.4<1>:UD vme_m1.4<0,1,0>:UD FB_PRUNING_DISABLE:UD {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; + +/* Bilinear filter */ +mov (1) tmp_reg0.0<1>:uw 0x04:uw {align1}; +add (1) vme_m1.30<1>:ub vme_m1.30<0,1,0>:ub tmp_reg0.0<0,1,0>:ub {align1}; + +/* Set the MV cost center */ +mov (1) vme_m1.16<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (1) vme_m1.20<1>:ud mv_cc_ref.0<0,1,0>:ud {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + + +send (8) + vme_msg_ind + vme_wb + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_MESSAGE_TYPE_INTER + ) + mlen vme_msg_length + rlen vme_inter_wb_length + {align1}; + + +cmp.l.f0.0 (1) null:uw vme_wb0.6<0,1,0>:uw tmp_vme_wb0.6<0,1,0>:uw {align1}; +(f0.0) jmpi (1) vme_done; +mov (8) vme_wb0.0<1>:ud tmp_vme_wb0.0<8,8,1>:ud {align1}; +mov (8) vme_wb1.0<1>:ud tmp_vme_wb1.0<8,8,1>:ud {align1}; + +vme_done: + jmpi (1) vme_mv_output; +nop; +nop; +nop; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_ivb.g7a intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_ivb.g7a --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_ivb.g7a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_ivb.g7a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,3 @@ +#include "vme7.inc" +#include "vme7_mpeg2.inc" +#include "mpeg2_inter_ivb.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_ivb.g7b intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_ivb.g7b --- intel-vaapi-driver-1.0.15/src/shaders/vme/mpeg2_inter_ivb.g7b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/mpeg2_inter_ivb.g7b 2016-06-21 01:37:22.000000000 +0000 @@ -0,0 +1,308 @@ + { 0x00800001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800061, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00061, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24482e29, 0x004500a0, 0x00040004 }, + { 0x00000001, 0x24540231, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24884521, 0x000000a2, 0x000000a1 }, + { 0x00000040, 0x24884421, 0x00000488, 0x000000a0 }, + { 0x00000041, 0x24880c21, 0x00000488, 0x0000000a }, + { 0x00000001, 0x24940231, 0x00000014, 0x00000000 }, + { 0x00200009, 0x2a402d29, 0x00450098, 0x00040004 }, + { 0x00200001, 0x2a500129, 0x00450094, 0x00000000 }, + { 0x00600001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2ae00061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x000000f2 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 }, + { 0x00210001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00000001, 0x2ae000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2af401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2ae40021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2af001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 }, + { 0x00210001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00210001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, + { 0x00000001, 0x2b0000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b1401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2b040021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b1001ed, 0x00000000, 0x00010001 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00080008 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000026 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x00000040, 0x24003dad, 0x00000400, 0x00010001 }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01ca1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2b240021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, + { 0x00600001, 0x2b400061, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002e28, 0x000000a5, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, + { 0x00000001, 0x2b2000e5, 0x00000000, 0x00000001 }, + { 0x00200001, 0x24000229, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24003dad, 0x00450400, 0xffffffff }, + { 0x00000041, 0x2b482521, 0x000000a2, 0x00000402 }, + { 0x00000040, 0x2b482421, 0x00000b48, 0x00000400 }, + { 0x00000041, 0x2b480c21, 0x00000b48, 0x0000000a }, + { 0x00000001, 0x2b540231, 0x00000014, 0x00000000 }, + { 0x00000001, 0x2b680021, 0x00000b48, 0x00000000 }, + { 0x00000040, 0x2b480c21, 0x00000b48, 0x00000008 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x02180003 }, + { 0x01000005, 0x20000c20, 0x00000b80, 0x00002000 }, + { 0x00310001, 0x2b3401ed, 0x00000000, 0xffffffff }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000008 }, + { 0x00000001, 0x2b480021, 0x00000b68, 0x00000000 }, + { 0x0a800031, 0x2ba01cb1, 0x00000b40, 0x02180203 }, + { 0x00200001, 0x2b240021, 0x00450ba0, 0x00000000 }, + { 0x00000001, 0x2b3001ed, 0x00000000, 0x00010001 }, + { 0x00000040, 0x240014a5, 0x00000b00, 0x00000b20 }, + { 0x01000010, 0x20001ca4, 0x00000400, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000010 }, + { 0x02000010, 0x20001ca4, 0x00000ae0, 0x00000000 }, + { 0x00010001, 0x2b040021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240021, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b140129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b340129, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00021, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00061, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, + { 0x00600001, 0x24000061, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200af4, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b14, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200b34, 0x00000000 }, + { 0x00010040, 0x24003dad, 0x00200400, 0x00010001 }, + { 0x00010001, 0x24040021, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20003da4, 0x00200400, 0x00010001 }, + { 0x00010001, 0x2ac00021, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, + { 0x00000001, 0x2fa001ad, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000008e }, + { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, + { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 }, + { 0x00200001, 0x2a2001ad, 0x00450ae4, 0x00000000 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 }, + { 0x00000001, 0x2fa00021, 0x00000440, 0x00000000 }, + { 0x00000001, 0x2fa80021, 0x00000448, 0x00000000 }, + { 0x00600001, 0x2fc00021, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, + { 0x00200001, 0x244001ad, 0x00450fe4, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00bb00bb }, + { 0x00000001, 0x28640231, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x28900061, 0x00000000, 0x11111111 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00020002 }, + { 0x00000040, 0x24002d29, 0x00000400, 0x00040004 }, + { 0x00000001, 0x247c0231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x7e201000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x00200040, 0x244035ad, 0x00450440, 0x00450a90 }, + { 0x00200040, 0x244435ad, 0x00450444, 0x00450a90 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000040, 0x24640c21, 0x00000464, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00040004 }, + { 0x00000040, 0x247e4631, 0x0000047e, 0x00000400 }, + { 0x00000001, 0x24700021, 0x00000a20, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a686000 }, + { 0x01000005, 0x20002d28, 0x000000a6, 0x00040004 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000096 }, + { 0x01000005, 0x20000c20, 0x00000180, 0x00002000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000012 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d01a0, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000544, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28300061, 0x00000000, 0x00000025 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, + { 0x00000001, 0x28200021, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240021, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280021, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0021, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28300061, 0x00000000, 0x00000035 }, + { 0x00000001, 0x28340021, 0x00000488, 0x00000000 }, + { 0x00000040, 0x24880c21, 0x00000488, 0x00000008 }, + { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, + { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 }, + { 0x0a800031, 0x2b801ca1, 0x00000b40, 0x0219e003 }, + { 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24001ca8, 0x00000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa4 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, + { 0x04000010, 0x200035ac, 0x00000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x04000010, 0x200035ac, 0x00000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe401ad, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe401ad, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00200040, 0x2f6035ad, 0x00450fa8, 0x00450fa0 }, + { 0x00000040, 0x2f703dad, 0x00000f60, 0x00300030 }, + { 0x00000040, 0x2f723dad, 0x00000f62, 0x00280028 }, + { 0x00200041, 0x2f903dad, 0x00450fd0, 0xffffffff }, + { 0x00200040, 0x2f8035ad, 0x00450fa8, 0x00450f90 }, + { 0x00200040, 0x2f8435ad, 0x00450fa8, 0x00450fd0 }, + { 0x05000010, 0x200035ac, 0x00000f60, 0x00000f80 }, + { 0x00010001, 0x2f6001ad, 0x00000f80, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x00000f70, 0x00000f84 }, + { 0x00010040, 0x2f603dad, 0x00000f84, 0xffd0ffd0 }, + { 0x05000010, 0x200035ac, 0x00000f62, 0x00000f82 }, + { 0x00010001, 0x2f6201ad, 0x00000f82, 0x00000000 }, + { 0x03000010, 0x200035ac, 0x00000f72, 0x00000f86 }, + { 0x00010040, 0x2f623dad, 0x00000f86, 0xffd8ffd8 }, + { 0x05000010, 0x20003dac, 0x00000f60, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x00010001, 0x2f6001ed, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x03000010, 0x200035ac, 0x00000f70, 0x00000fc0 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00010040, 0x2f603dad, 0x00000fc0, 0xffd0ffd0 }, + { 0x05000010, 0x20003dac, 0x00000f62, 0x00000000 }, + { 0x00110020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x00010001, 0x2f6201ed, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x03000010, 0x200035ac, 0x00000f72, 0x00000fc2 }, + { 0x00010040, 0x2f623dad, 0x00000fc2, 0xffd8ffd8 }, + { 0x00200041, 0x2f803dad, 0x00450fa8, 0xffffffff }, + { 0x00200040, 0x2fe435ad, 0x00450f60, 0x00450f80 }, + { 0x00000001, 0x34000020, 0x00000fe0, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0020000c, 0x2a803dad, 0x00450ac0, 0x00020002 }, + { 0x00200001, 0x240001ad, 0x00450a80, 0x00000000 }, + { 0x00200040, 0x2a883dad, 0x00450a80, 0x00030003 }, + { 0x00200005, 0x2a902d29, 0x00450a88, 0xfffcfffc }, + { 0x05000010, 0x20003dac, 0x00000400, 0x00000000 }, + { 0x00010041, 0x24003dad, 0x00000400, 0xffffffff }, + { 0x05000010, 0x20003dac, 0x00000402, 0x00000000 }, + { 0x00010041, 0x24023dad, 0x00000402, 0xffffffff }, + { 0x04000010, 0x20003dac, 0x00000400, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, + { 0x04000010, 0x20003dac, 0x00000402, 0x00040004 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000002 }, + { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, + { 0x00600001, 0x2c800021, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x2ca00021, 0x008d01a0, 0x00000000 }, + { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 }, + { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 }, + { 0x00000001, 0x2fa80021, 0x00000448, 0x00000000 }, + { 0x00200040, 0x2fa035ad, 0x00450440, 0x00450a90 }, + { 0x00600001, 0x2fc00021, 0x008d0a40, 0x00000000 }, + { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 }, + { 0x00000020, 0x34001c00, 0x00001400, 0xffffff94 }, + { 0x00200001, 0x244001ad, 0x00450fe4, 0x00000000 }, + { 0x00600001, 0x28400061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28600061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x24600061, 0x00000000, 0x00000000 }, + { 0x00000001, 0x247c0169, 0x00000000, 0x00000000 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00020002 }, + { 0x00000040, 0x24002d29, 0x00000400, 0x00040004 }, + { 0x00000001, 0x247c0231, 0x00000400, 0x00000000 }, + { 0x00000001, 0x247d0231, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x244c0061, 0x00000000, 0x7e201000 }, + { 0x00000001, 0x24560169, 0x00000000, 0x28302830 }, + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 }, + { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600061, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24640231, 0x0000009c, 0x00000000 }, + { 0x00000040, 0x24640c21, 0x00000464, 0x00000000 }, + { 0x00000001, 0x24680061, 0x00000000, 0x30003030 }, + { 0x00000001, 0x24000169, 0x00000000, 0x00040004 }, + { 0x00000040, 0x247e4631, 0x0000047e, 0x00000400 }, + { 0x00000001, 0x24700021, 0x00000a20, 0x00000000 }, + { 0x00000001, 0x24740021, 0x00000a20, 0x00000000 }, + { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, + { 0x08600031, 0x21801cbd, 0x00000800, 0x0a682000 }, + { 0x05000010, 0x20002528, 0x00000186, 0x00000c86 }, + { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, + { 0x00600001, 0x21800021, 0x008d0c80, 0x00000000 }, + { 0x00600001, 0x21a00021, 0x008d0ca0, 0x00000000 }, + { 0x00000020, 0x34001c00, 0x00001400, 0xffffff04 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vme75.inc intel-vaapi-driver-1.7.1/src/shaders/vme/vme75.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/vme75.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vme75.inc 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,361 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: ME_header.inc +// +// Global symbols define +// + +/* + * Constant + */ +define(`VME_MESSAGE_TYPE_INTER', `1') +define(`VME_MESSAGE_TYPE_INTRA', `2') +define(`VME_MESSAGE_TYPE_MIXED', `3') + +define(`VME_SIC_MESSAGE_TYPE', `1') +define(`VME_IME_MESSAGE_TYPE', `2') +define(`VME_FBR_MESSAGE_TYPE', `3') + +define(`BLOCK_32X1', `0x0000001F') +define(`BLOCK_4X16', `0x000F0003') +define(`BLOCK_8X4', `0x00070003') + +define(`LUMA_INTRA_16x16_DISABLE', `0x1') +define(`LUMA_INTRA_8x8_DISABLE', `0x2') +define(`LUMA_INTRA_4x4_DISABLE', `0x4') + +define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') +define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') +define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') +define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') + +define(`BIND_IDX_VME', `0') +define(`BIND_IDX_VME_REF0', `1') +define(`BIND_IDX_VME_REF1', `2') +define(`BIND_IDX_OUTPUT', `3') +define(`BIND_IDX_INEP', `4') + +define(`SUB_PEL_MODE_INTEGER', `0x00000000') +define(`SUB_PEL_MODE_HALF', `0x00001000') +define(`SUB_PEL_MODE_QUARTER', `0x00003000') + +define(`INTER_SAD_NONE', `0x00000000') +define(`INTER_SAD_HAAR', `0x00200000') + +define(`INTRA_SAD_NONE', `0x00000000') +define(`INTRA_SAD_HAAR', `0x00800000') + +define(`INTER_PART_MASK', `0x00000000') + +define(`SEARCH_CTRL_SINGLE', `0x00000000') +define(`SEARCH_CTRL_DUAL_START', `0x00000100') +define(`SEARCH_CTRL_DUAL_RECORD', `0x00000300') +define(`SEARCH_CTRL_DUAL_REFERENCE', `0x00000700') + +define(`REF_REGION_SIZE', `0x2830:UW') +define(`MIN_REF_REGION_SIZE', `0x2020:UW') +define(`DREF_REGION_SIZE', `0x2020:UW') + +define(`BI_SUB_MB_PART_MASK', `0x0c000000') +define(`MAX_NUM_MV', `0x00000020') +define(`FB_PRUNING_ENABLE', `0x40000000') + +define(`SEARCH_PATH_LEN', `0x00003030') +define(`START_CENTER', `0x30000000') + +define(`ADAPTIVE_SEARCH_ENABLE', `0x00000002') +define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') + +define(`INTER_VME_OUTPUT_IN_OWS', `10') +define(`INTER_VME_OUTPUT_MV_IN_OWS', `8') + +define(`INTRAMBFLAG_MASK', `0x00002000') +define(`MVSIZE_UW_BASE', `0x0040') +define(`MFC_MV32_BIT_SHIFT', `5') +define(`CBP_DC_YUV_UW', `0x000E') + +define(`DC_HARR_ENABLE', `0x0000') +define(`DC_HARR_DISABLE', `0x0020') + +define(`MV32_BIT_MASK', `0x0020') +define(`MV32_BIT_SHIFT', `5') + +define(`OBW_CACHE_TYPE', `10') + + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_3', `3') /* 4 OWords */ +define(`OBW_CONTROL_8', `4') /* 8 OWords */ + +define(`FBR_BME_ENABLE', `0x00000000') +define(`FBR_BME_DISABLE', `0x00040000') + +define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + + +define(`OBW_HEADER_PRESENT', `1') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r11 reserved + * r12 write back of VME message + * r13 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`w_in_mb_uw', `inline_reg0.2') +define(`orig_xy_ub', `inline_reg0.0') +define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ +define(`orig_y_ub', `inline_reg0.1') +define(`transform_8x8_ub', `inline_reg0.4') +define(`input_mb_intra_ub', `inline_reg0.5') +define(`num_macroblocks', `inline_reg0.6') +define(`quality_level_ub', `inline_reg0.7') + +/* + * GRF 6~11 -- reserved + */ + +/* + * GRF 12~15 -- write back for VME message + */ +define(`vme_wb', `r12') +define(`vme_wb0', `r12') +define(`vme_wb1', `r13') +define(`vme_wb2', `r14') +define(`vme_wb3', `r15') +define(`vme_wb4', `r16') +define(`vme_wb5', `r17') +define(`vme_wb6', `r18') +define(`vme_ime_wb7', `r19') +define(`vme_ime_wb8', `r20') +define(`vme_ime_wb9', `r21') +define(`vme_ime_wb10', `r22') + + +/* + * GRF 24 -- write for VME output message + */ +define(`obw_wb', `null<1>:W') +define(`obw_wb_length', `0') + + +/* + * GRF 28~30 -- Intra Neighbor Edge Pixels + */ +define(`INEP_ROW', `r28') +define(`INEP_COL0', `r29') +define(`INEP_COL1', `r30') + +/* + * GRF 48~50 -- Chroma Neighbor Edge Pixels + */ +define(`CHROMA_ROW', `r48') +define(`CHROMA_COL', `r49') + +/* + * temporary registers + */ +define(`tmp_reg0', `r32') +define(`read0_header', `tmp_reg0') +define(`tmp_reg1', `r33') +define(`read1_header', `tmp_reg1') +define(`tmp_reg2', `r34') +define(`vme_m0', `tmp_reg2') +define(`tmp_reg3', `r35') +define(`vme_m1', `tmp_reg3') +define(`intra_flag', `vme_m1.28') +define(`intra_part_mask_ub', `vme_m1.28') +define(`mb_intra_struct_ub', `vme_m1.29') +define(`tmp_reg4', `r36') +define(`obw_m0', `tmp_reg4') +define(`tmp_reg5', `r37') +define(`obw_m1', `tmp_reg5') +define(`tmp_reg6', `r38') +define(`obw_m2', `tmp_reg6') +define(`tmp_reg7', `r39') +define(`obw_m3', `tmp_reg7') +define(`tmp_reg8', `r40') +define(`obw_m4', `tmp_reg8') +define(`tmp_reg9', `r41') +define(`tmp_x_w', `tmp_reg9.0') +define(`tmp_rega', `r42') +define(`tmp_ud0', `tmp_rega.0') +define(`tmp_ud1', `tmp_rega.4') +define(`tmp_ud2', `tmp_rega.8') +define(`tmp_ud3', `tmp_rega.12') +define(`tmp_uw0', `tmp_rega.0') +define(`tmp_uw1', `tmp_rega.2') +define(`tmp_uw2', `tmp_rega.4') +define(`tmp_uw3', `tmp_rega.6') +define(`tmp_uw4', `tmp_rega.8') +define(`tmp_uw5', `tmp_rega.10') +define(`tmp_uw6', `tmp_rega.12') +define(`tmp_uw7', `tmp_rega.14') + +define(`vme_m2', `r43') +/* + * MRF registers + */ + +define(`msg_ind', `64') +define(`msg_reg0', `r64') +define(`msg_reg1', `r65') +define(`msg_reg2', `r66') +define(`msg_reg3', `r67') +define(`msg_reg4', `r68') +define(`msg_reg5', `r69') +define(`msg_reg6', `r70') +define(`msg_reg7', `r71') +define(`msg_reg8', `r72') +define(`msg_reg9', `r73') + +define(`ts_msg_ind', `112') +define(`ts_msg_reg0', `r112') +/* + * VME message payload + */ + +define(`vme_intra_wb_length', `1') +define(`vme_wb_length', `7') +define(`sic_vme_msg_length', `7') +define(`fbr_vme_msg_length', `7') +define(`ime_vme_msg_length', `5') + +define(`vme_msg_ind', `msg_ind') +define(`vme_msg_0', `msg_reg0') +define(`vme_msg_1', `msg_reg1') +define(`vme_msg_2', `msg_reg2') + +define(`vme_msg_3', `msg_reg3') +define(`vme_msg_4', `msg_reg4') + + +define(`vme_msg_5', `msg_reg5') +define(`vme_msg_6', `msg_reg6') +define(`vme_msg_7', `msg_reg7') +define(`vme_msg_8', `msg_reg8') +define(`vme_msg_9', `msg_reg9') + +define(`BIND_IDX_CBCR', `6') + + +define(`LUMA_CHROMA_MODE', `0x0') +define(`LUMA_INTRA_MODE', `0x1') +define(`LUMA_INTRA_DISABLE', `0x2') + +define(`RETURN_REG', `r127.0') +define(`RET_ARG', `r127.4') + +/* Now at most two registers are used for input parameter */ +define(`INPUT_ARG0', `r125') +define(`INPUT_ARG1', `r126') + +/* Two temporal registers are used in the function */ +define(`TEMP_VAR0', `r123') +define(`TEMP_VAR1', `r124') + + +define(`OBR_MESSAGE_TYPE', `0') +define(`OBR_CACHE_TYPE', `10') +define(`OBR_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBR_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBR_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBR_CONTROL_2', `2') /* 2 OWords */ +define(`OBR_CONTROL_4', `3') /* 4 OWords */ +define(`OBR_CONTROL_8', `4') /* 8 OWords */ +define(`OBR_WRITE_COMMIT_CATEGORY', `0') /* category on SNB+ for Data port */ +define(`OBR_HEADER_PRESENT', `1') + +define(`mb_hwdep', `r5.6') +define(`MB_AVAIL', `1:d') +define(`MB_PRED_FLAG', `1:w') + +define(`mb_pred_mode', `r85') +define(`mb_mvp_ref', `r86') +define(`mba_result', `r87') +define(`mbb_result', `r88') +define(`mbc_result', `r89') +define(`mb_ind', `90') +define(`mb_msg0', `r90') +define(`mb_wb', `r91') +define(`mb_intra_wb', `r91') +define(`mb_inter_wb', `r92') +define(`mb_mv0', `r93') +define(`mb_mv1', `r94') +define(`mb_mv2', `r95') +define(`mb_mv3', `r96') +define(`mb_ref', `r97') +define(`mb_ref_win', `r84') + +define(`PRED_L0', `0x0':uw) +define(`PRED_L1', `0x1':uw) +define(`PRED_BI', `0x2':uw) +define(`PRED_DIRECT', `0x3':uw) +define(`PRED_MASK', `0x3':uw) + +/* The MAX search len per reference is 16 */ +define(`DSEARCH_PATH_LEN', `0x00001212') +define(`BI_WEIGHT', `0x20':uw) +define(`DSTART_CENTER', `0x00000000') +define(`INTER_MASK', `0x03') +define(`INTER_16X16MODE', `0x0') +define(`INTER_16X8MODE', `0x01') +define(`INTER_8X16MODE', `0x02') +define(`INTER_8X8MODE', `0x03') +define(`INTER_BLOCK0', `0x0') +define(`INTER_BLOCK1', `0x1') +define(`INTER_BLOCK2', `0x2') +define(`INTER_BLOCK3', `0x3') +define(`INTER_16X8MODE', `0x01') +define(`INTER_8X16MODE', `0x02') + +define(`OBR_MESSAGE_FENCE', `7') +define(`OBR_MF_NOCOMMIT', `0') +define(`OBR_MF_COMMIT', `0x20') + +define(`DEFAULT_QUALITY_LEVEL', `0x01') +define(`HIGH_QUALITY_LEVEL', `DEFAULT_QUALITY_LEVEL') +define(`LOW_QUALITY_LEVEL', `0x02') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vme75_mpeg2.inc intel-vaapi-driver-1.7.1/src/shaders/vme/vme75_mpeg2.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/vme75_mpeg2.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vme75_mpeg2.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,49 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: ME_header.inc +// +// Global symbols define +// + +/* + * Constant + */ + +define(`INTER_PART_MASK', `0x7e000000') +define(`mpeg2_ref', `r83') +define(`pic_ref', `r82') +define(`INTRA16_DC_PRED', `0xBB') +/* Cost center ref */ +define(`mv_cc_ref', `r81') +define(`tmp_vme_wb0', `r100') +define(`tmp_vme_wb1', `r101') +define(`tmp_vme_wb2', `r102') +define(`tmp_vme_wb3', `r103') +define(`tmp_vme_wb4', `r104') +define(`tmp_vme_wb5', `r105') +define(`tmp_vme_wb6', `r106') +define(`tmp_vme_wb7', `r107') +define(`tmp_vme_wb8', `r108') +define(`tmp_vme_wb9', `r109') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vme7.inc intel-vaapi-driver-1.7.1/src/shaders/vme/vme7.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/vme7.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vme7.inc 2016-06-17 01:56:44.000000000 +0000 @@ -0,0 +1,341 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: ME_header.inc +// +// Global symbols define +// + +/* + * Constant + */ +define(`VME_MESSAGE_TYPE_INTER', `1') +define(`VME_MESSAGE_TYPE_INTRA', `2') +define(`VME_MESSAGE_TYPE_MIXED', `3') + +define(`BLOCK_32X1', `0x0000001F') +define(`BLOCK_4X16', `0x000F0003') + +define(`LUMA_INTRA_16x16_DISABLE', `0x1') +define(`LUMA_INTRA_8x8_DISABLE', `0x2') +define(`LUMA_INTRA_4x4_DISABLE', `0x4') + +define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') +define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') +define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') +define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') + +define(`BIND_IDX_VME', `0') +define(`BIND_IDX_VME_REF0', `1') +define(`BIND_IDX_VME_REF1', `2') +define(`BIND_IDX_OUTPUT', `3') +define(`BIND_IDX_INEP', `4') + +define(`SUB_PEL_MODE_INTEGER', `0x00000000') +define(`SUB_PEL_MODE_HALF', `0x00001000') +define(`SUB_PEL_MODE_QUARTER', `0x00003000') + +define(`INTER_SAD_NONE', `0x00000000') +define(`INTER_SAD_HAAR', `0x00200000') + +define(`INTRA_SAD_NONE', `0x00000000') +define(`INTRA_SAD_HAAR', `0x00800000') + +define(`INTER_PART_MASK', `0x00000000') + +define(`SEARCH_CTRL_SINGLE', `0x00000000') +define(`SEARCH_CTRL_DUAL_START', `0x00000100') +define(`SEARCH_CTRL_DUAL_RECORD', `0x00000300') +define(`SEARCH_CTRL_DUAL_REFERENCE', `0x00000700') + +define(`REF_REGION_SIZE', `0x2830:UW') +define(`MIN_REF_REGION_SIZE', `0x2020:UW') +define(`DREF_REGION_SIZE', `0x2020:UW') + +define(`BI_SUB_MB_PART_MASK', `0x0c000000') +define(`MAX_NUM_MV', `0x00000020') +define(`FB_PRUNING_ENABLE', `0x40000000') +define(`FB_PRUNING_DISABLE', `0x00000000') + +define(`SEARCH_PATH_LEN', `0x00003030') +define(`START_CENTER', `0x30000000') + +define(`ADAPTIVE_SEARCH_ENABLE', `0x00000002') +define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') + +define(`INTER_VME_OUTPUT_IN_OWS', `10') +define(`INTER_VME_OUTPUT_MV_IN_OWS', `8') + +define(`INTRAMBFLAG_MASK', `0x00002000') +define(`MVSIZE_UW_BASE', `0x0040') +define(`MFC_MV32_BIT_SHIFT', `5') +define(`CBP_DC_YUV_UW', `0x000E') + +define(`DC_HARR_ENABLE', `0x0000') +define(`DC_HARR_DISABLE', `0x0020') + +define(`MV32_BIT_MASK', `0x0020') +define(`MV32_BIT_SHIFT', `5') + +define(`OBW_CACHE_TYPE', `10') + + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_3', `3') /* 4 OWords */ +define(`OBW_CONTROL_8', `4') /* 8 OWords */ + +define(`FME_REPART_ENABLE', `0x80000000') +define(`FME_REPART_DISABLE', `0x00000000') +define(`FME_SINGLE_PARTION', `0x00000000') +define(`FME_MUL_PARTION', `0x00000008') + + +define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + + +define(`OBW_HEADER_PRESENT', `1') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r11 reserved + * r12 write back of VME message + * r13 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`w_in_mb_uw', `inline_reg0.2') +define(`orig_xy_ub', `inline_reg0.0') +define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ +define(`orig_y_ub', `inline_reg0.1') +define(`transform_8x8_ub', `inline_reg0.4') +define(`input_mb_intra_ub', `inline_reg0.5') +define(`num_macroblocks', `inline_reg0.6') +define(`quality_level_ub', `inline_reg0.7') + +/* + * GRF 6~11 -- reserved + */ + +/* + * GRF 12~15 -- write back for VME message + */ +define(`vme_wb', `r12') +define(`vme_wb0', `r12') +define(`vme_wb1', `r13') +define(`vme_wb2', `r14') +define(`vme_wb3', `r15') +define(`vme_wb4', `r16') +define(`vme_wb5', `r17') +define(`vme_wb6', `r18') + + +/* + * GRF 24 -- write for VME output message + */ +define(`obw_wb', `null<1>:W') +define(`obw_wb_length', `0') + + +/* + * GRF 28~30 -- Intra Neighbor Edge Pixels + */ +define(`INEP_ROW', `r28') +define(`INEP_COL0', `r29') +define(`INEP_COL1', `r30') + +/* + * temporary registers + */ +define(`tmp_reg0', `r32') +define(`read0_header', `tmp_reg0') +define(`tmp_reg1', `r33') +define(`read1_header', `tmp_reg1') +define(`tmp_reg2', `r34') +define(`vme_m0', `tmp_reg2') +define(`tmp_reg3', `r35') +define(`vme_m1', `tmp_reg3') +define(`intra_flag', `vme_m1.28') +define(`intra_part_mask_ub', `vme_m1.28') +define(`mb_intra_struct_ub', `vme_m1.29') +define(`tmp_reg4', `r36') +define(`obw_m0', `tmp_reg4') +define(`tmp_reg5', `r37') +define(`obw_m1', `tmp_reg5') +define(`tmp_reg6', `r38') +define(`obw_m2', `tmp_reg6') +define(`tmp_reg7', `r39') +define(`obw_m3', `tmp_reg7') +define(`tmp_reg8', `r40') +define(`obw_m4', `tmp_reg8') +define(`tmp_reg9', `r41') +define(`tmp_x_w', `tmp_reg9.0') +define(`tmp_rega', `r42') +define(`tmp_ud0', `tmp_rega.0') +define(`tmp_ud1', `tmp_rega.4') +define(`tmp_ud2', `tmp_rega.8') +define(`tmp_ud3', `tmp_rega.12') +define(`tmp_uw0', `tmp_rega.0') +define(`tmp_uw1', `tmp_rega.2') +define(`tmp_uw2', `tmp_rega.4') +define(`tmp_uw3', `tmp_rega.6') +define(`tmp_uw4', `tmp_rega.8') +define(`tmp_uw5', `tmp_rega.10') +define(`tmp_uw6', `tmp_rega.12') +define(`tmp_uw7', `tmp_rega.14') + +define(`vme_m2', `r43') +/* + * MRF registers + */ + +define(`msg_ind', `64') +define(`msg_reg0', `r64') +define(`msg_reg1', `r65') +define(`msg_reg2', `r66') +define(`msg_reg3', `r67') +define(`msg_reg4', `r68') +define(`msg_reg5', `r69') +define(`msg_reg6', `r70') +define(`msg_reg7', `r71') +define(`msg_reg8', `r72') +define(`msg_reg9', `r73') + +define(`ts_msg_ind', `112') +define(`ts_msg_reg0', `r112') +/* + * VME message payload + */ + +define(`vme_msg_length', `5') +define(`vme_inter_wb_length', `6') +define(`vme_intra_wb_length', `1') + +define(`vme_msg_ind', `msg_ind') +define(`vme_msg_0', `msg_reg0') +define(`vme_msg_1', `msg_reg1') +define(`vme_msg_2', `msg_reg2') + +define(`vme_msg_3', `msg_reg3') +define(`vme_msg_4', `msg_reg4') + + +define(`vme_msg_5', `msg_reg5') +define(`vme_msg_6', `msg_reg6') +define(`vme_msg_7', `msg_reg7') +define(`vme_msg_8', `msg_reg8') +define(`vme_msg_9', `msg_reg9') + +define(`RETURN_REG', `r127.0') +define(`RET_ARG', `r127.4') + +/* Now at most two registers are used for input parameter */ +define(`INPUT_ARG0', `r125') +define(`INPUT_ARG1', `r126') + +/* Two temporal registers are used in the function */ +define(`TEMP_VAR0', `r123') +define(`TEMP_VAR1', `r124') + + +define(`OBR_MESSAGE_TYPE', `0') +define(`OBR_CACHE_TYPE', `10') +define(`OBR_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBR_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBR_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBR_CONTROL_2', `2') /* 2 OWords */ +define(`OBR_CONTROL_4', `3') /* 4 OWords */ +define(`OBR_CONTROL_8', `4') /* 8 OWords */ +define(`OBR_WRITE_COMMIT_CATEGORY', `0') /* category on SNB+ for Data port */ +define(`OBR_HEADER_PRESENT', `1') + +define(`mb_hwdep', `r5.6') +define(`MB_AVAIL', `1:d') +define(`MB_PRED_FLAG', `1:w') + +define(`mb_pred_mode', `r85') +define(`mb_mvp_ref', `r86') +define(`mba_result', `r87') +define(`mbb_result', `r88') +define(`mbc_result', `r89') +define(`mb_ind', `90') +define(`mb_msg0', `r90') +define(`mb_msg_tmp', `r91') +define(`mb_wb', `r92') +define(`mb_mode_wb', `r92') +define(`mb_mv0', `r93') +define(`mb_mv1', `r94') +define(`mb_mv2', `r95') +define(`mb_mv3', `r96') +define(`mb_ref', `r97') +define(`mb_ref_win', `r84') + +define(`PRED_L0', `0x0':uw) +define(`PRED_L1', `0x1':uw) +define(`PRED_BI', `0x2':uw) +define(`PRED_DIRECT', `0x3':uw) +define(`PRED_MASK', `0x3':uw) + +/* The MAX search len per reference is 16 */ +define(`DSEARCH_PATH_LEN', `0x00001212') +define(`BI_WEIGHT', `0x20':uw) +define(`DSTART_CENTER', `0x00000000') +define(`INTER_MASK', `0x03') +define(`INTER_16X16MODE', `0x0') +define(`INTER_16X8MODE', `0x01') +define(`INTER_8X16MODE', `0x02') +define(`INTER_8X8MODE', `0x03') +define(`INTER_BLOCK0', `0x0') +define(`INTER_BLOCK1', `0x1') +define(`INTER_BLOCK2', `0x2') +define(`INTER_BLOCK3', `0x3') +define(`INTER_16X8MODE', `0x01') +define(`INTER_8X16MODE', `0x02') + +define(`OBR_MESSAGE_FENCE', `7') +define(`OBR_MF_NOCOMMIT', `0') +define(`OBR_MF_COMMIT', `0x20') + +define(`DEFAULT_QUALITY_LEVEL', `0x01') +define(`HIGH_QUALITY_LEVEL', `DEFAULT_QUALITY_LEVEL') +define(`LOW_QUALITY_LEVEL', `0x02') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vme7_mpeg2.inc intel-vaapi-driver-1.7.1/src/shaders/vme/vme7_mpeg2.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/vme7_mpeg2.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vme7_mpeg2.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,51 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: ME_header.inc +// +// Global symbols define +// + +/* + * Constant + */ + +define(`INTER_PART_MASK', `0x7e000000') +define(`mpeg2_ref', `r83') +define(`pic_ref', `r82') +define(`INTRA16_DC_PRED', `0xBB') + +/* Cost center ref */ +define(`mv_cc_ref', `r81') + +define(`tmp_vme_wb0', `r100') +define(`tmp_vme_wb1', `r101') +define(`tmp_vme_wb2', `r102') +define(`tmp_vme_wb3', `r103') +define(`tmp_vme_wb4', `r104') +define(`tmp_vme_wb5', `r105') +define(`tmp_vme_wb6', `r106') +define(`tmp_vme_wb7', `r107') +define(`tmp_vme_wb8', `r108') +define(`tmp_vme_wb9', `r109') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vme8.inc intel-vaapi-driver-1.7.1/src/shaders/vme/vme8.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/vme8.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vme8.inc 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,369 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: ME_header.inc for Gen8 +// +// Global symbols define +// + +/* + * Constant + */ +define(`VME_MESSAGE_TYPE_INTER', `1') +define(`VME_MESSAGE_TYPE_INTRA', `2') +define(`VME_MESSAGE_TYPE_MIXED', `3') + +define(`VME_SIC_MESSAGE_TYPE', `1') +define(`VME_IME_MESSAGE_TYPE', `2') +define(`VME_FBR_MESSAGE_TYPE', `3') + +define(`BLOCK_32X1', `0x0000001F') +define(`BLOCK_4X16', `0x000F0003') +define(`BLOCK_8X4', `0x00070003') + +define(`LUMA_INTRA_16x16_DISABLE', `0x1') +define(`LUMA_INTRA_8x8_DISABLE', `0x2') +define(`LUMA_INTRA_4x4_DISABLE', `0x4') + +define(`SUB_PART_8x4_DISABLE', `0x10') +define(`SUB_PART_4x8_DISABLE', `0x20') + +define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') +define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') +define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') +define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') + +define(`BIND_IDX_VME', `0') +define(`BIND_IDX_VME_REF0', `1') +define(`BIND_IDX_VME_REF1', `2') +define(`BIND_IDX_OUTPUT', `3') +define(`BIND_IDX_INEP', `4') + +define(`SUB_PEL_MODE_INTEGER', `0x00000000') +define(`SUB_PEL_MODE_HALF', `0x00001000') +define(`SUB_PEL_MODE_QUARTER', `0x00003000') + +define(`INTER_SAD_NONE', `0x00000000') +define(`INTER_SAD_HAAR', `0x00200000') + +define(`INTRA_SAD_NONE', `0x00000000') +define(`INTRA_SAD_HAAR', `0x00800000') + +define(`INTER_PART_MASK', `0x00000000') +define(`VP8_INTER_PART_MASK', `0x7e000000') + +define(`SEARCH_CTRL_SINGLE', `0x00000000') +define(`SEARCH_CTRL_DUAL_START', `0x00000100') +define(`SEARCH_CTRL_DUAL_RECORD', `0x00000300') +define(`SEARCH_CTRL_DUAL_REFERENCE', `0x00000700') + +define(`REF_REGION_SIZE', `0x2830:UW') +define(`MIN_REF_REGION_SIZE', `0x2020:UW') +define(`DREF_REGION_SIZE', `0x2020:UW') + +define(`BI_SUB_MB_PART_MASK', `0x0c000000') +define(`MAX_NUM_MV', `0x00000020') +define(`FB_PRUNING_ENABLE', `0x40000000') + +define(`SEARCH_PATH_LEN', `0x00003030') +define(`START_CENTER', `0x30000000') + +define(`ADAPTIVE_SEARCH_ENABLE', `0x00000002') +define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') + +define(`INTRA_PLANAR_MODE_MASK', `0x10001000:UD') + +define(`INTER_VME_OUTPUT_IN_OWS', `10') +define(`INTER_VME_OUTPUT_MV_IN_OWS', `8') + +define(`INTRAMBFLAG_MASK', `0x00002000') +define(`MVSIZE_UW_BASE', `0x0040') +define(`MFC_MV32_BIT_SHIFT', `5') +define(`CBP_DC_YUV_UW', `0x000E') + +define(`DC_HARR_ENABLE', `0x0000') +define(`DC_HARR_DISABLE', `0x0020') + +define(`MV32_BIT_MASK', `0x0020') +define(`MV32_BIT_SHIFT', `5') + +define(`OBW_CACHE_TYPE', `10') + + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_3', `3') /* 4 OWords */ +define(`OBW_CONTROL_8', `4') /* 8 OWords */ + +define(`FBR_BME_ENABLE', `0x00000000') +define(`FBR_BME_DISABLE', `0x00040000') + +define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + + +define(`OBW_HEADER_PRESENT', `1') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r11 reserved + * r12 write back of VME message + * r13 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`w_in_mb_uw', `inline_reg0.2') +define(`orig_xy_ub', `inline_reg0.0') +define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ +define(`orig_y_ub', `inline_reg0.1') +define(`transform_8x8_ub', `inline_reg0.4') +define(`input_mb_intra_ub', `inline_reg0.5') +define(`num_macroblocks', `inline_reg0.6') +define(`quality_level_ub', `inline_reg0.7') + +/* + * GRF 6~11 -- reserved + */ + +/* + * GRF 12~15 -- write back for VME message + */ +define(`vme_wb', `r12') +define(`vme_wb0', `r12') +define(`vme_wb1', `r13') +define(`vme_wb2', `r14') +define(`vme_wb3', `r15') +define(`vme_wb4', `r16') +define(`vme_wb5', `r17') +define(`vme_wb6', `r18') +define(`vme_ime_wb7', `r19') +define(`vme_ime_wb8', `r20') +define(`vme_ime_wb9', `r21') +define(`vme_ime_wb10', `r22') + + +/* + * GRF 24 -- write for VME output message + */ +define(`obw_wb', `null<1>:W') +define(`obw_wb_length', `0') + + +/* + * GRF 28~30 -- Intra Neighbor Edge Pixels + */ +define(`INEP_ROW', `r28') +define(`INEP_COL0', `r29') +define(`INEP_COL1', `r30') + +/* + * GRF 48~50 -- Chroma Neighbor Edge Pixels + */ +define(`CHROMA_ROW', `r48') +define(`CHROMA_COL', `r49') + +/* + * temporary registers + */ +define(`tmp_reg0', `r32') +define(`read0_header', `tmp_reg0') +define(`tmp_reg1', `r33') +define(`read1_header', `tmp_reg1') +define(`tmp_reg2', `r34') +define(`vme_m0', `tmp_reg2') +define(`tmp_reg3', `r35') +define(`vme_m1', `tmp_reg3') +define(`intra_flag', `vme_m1.28') +define(`intra_part_mask_ub', `vme_m1.28') +define(`mb_intra_struct_ub', `vme_m1.29') +define(`tmp_reg4', `r36') +define(`obw_m0', `tmp_reg4') +define(`tmp_reg5', `r37') +define(`obw_m1', `tmp_reg5') +define(`tmp_reg6', `r38') +define(`obw_m2', `tmp_reg6') +define(`tmp_reg7', `r39') +define(`obw_m3', `tmp_reg7') +define(`tmp_reg8', `r40') +define(`obw_m4', `tmp_reg8') +define(`tmp_reg9', `r41') +define(`tmp_x_w', `tmp_reg9.0') +define(`tmp_rega', `r42') +define(`tmp_ud0', `tmp_rega.0') +define(`tmp_ud1', `tmp_rega.4') +define(`tmp_ud2', `tmp_rega.8') +define(`tmp_ud3', `tmp_rega.12') +define(`tmp_uw0', `tmp_rega.0') +define(`tmp_uw1', `tmp_rega.2') +define(`tmp_uw2', `tmp_rega.4') +define(`tmp_uw3', `tmp_rega.6') +define(`tmp_uw4', `tmp_rega.8') +define(`tmp_uw5', `tmp_rega.10') +define(`tmp_uw6', `tmp_rega.12') +define(`tmp_uw7', `tmp_rega.14') + +define(`vme_m2', `r43') +define(`vme_m3', `r44') +/* + * MRF registers + */ + +define(`msg_ind', `64') +define(`msg_reg0', `r64') +define(`msg_reg1', `r65') +define(`msg_reg2', `r66') +define(`msg_reg3', `r67') +define(`msg_reg4', `r68') +define(`msg_reg5', `r69') +define(`msg_reg6', `r70') +define(`msg_reg7', `r71') +define(`msg_reg8', `r72') +define(`msg_reg9', `r73') + +define(`ts_msg_ind', `112') +define(`ts_msg_reg0', `r112') +/* + * VME message payload + */ + +define(`vme_intra_wb_length', `1') +define(`vme_wb_length', `7') +define(`sic_vme_msg_length', `8') +define(`fbr_vme_msg_length', `8') +define(`ime_vme_msg_length', `6') + +define(`vme_msg_ind', `msg_ind') +define(`vme_msg_0', `msg_reg0') +define(`vme_msg_1', `msg_reg1') +define(`vme_msg_2', `msg_reg2') + +define(`vme_msg_3', `msg_reg3') +define(`vme_msg_4', `msg_reg4') + + +define(`vme_msg_5', `msg_reg5') +define(`vme_msg_6', `msg_reg6') +define(`vme_msg_7', `msg_reg7') +define(`vme_msg_8', `msg_reg8') +define(`vme_msg_9', `msg_reg9') + +define(`BIND_IDX_CBCR', `6') + + +define(`LUMA_CHROMA_MODE', `0x0') +define(`LUMA_INTRA_MODE', `0x1') +define(`LUMA_INTRA_DISABLE', `0x2') + +define(`RETURN_REG', `r127.0') +define(`RET_ARG', `r127.4') + +/* Now at most two registers are used for input parameter */ +define(`INPUT_ARG0', `r125') +define(`INPUT_ARG1', `r126') + +/* Two temporal registers are used in the function */ +define(`TEMP_VAR0', `r123') +define(`TEMP_VAR1', `r124') + + +define(`OBR_MESSAGE_TYPE', `0') +define(`OBR_CACHE_TYPE', `10') +define(`OBR_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBR_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBR_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBR_CONTROL_2', `2') /* 2 OWords */ +define(`OBR_CONTROL_4', `3') /* 4 OWords */ +define(`OBR_CONTROL_8', `4') /* 8 OWords */ +define(`OBR_WRITE_COMMIT_CATEGORY', `0') /* category on SNB+ for Data port */ +define(`OBR_HEADER_PRESENT', `1') + +define(`mb_hwdep', `r5.6') +define(`MB_AVAIL', `1:d') +define(`MB_PRED_FLAG', `1:w') + +define(`mb_pred_mode', `r85') +define(`mb_mvp_ref', `r86') +define(`mba_result', `r87') +define(`mbb_result', `r88') +define(`mbc_result', `r89') +define(`mb_ind', `90') +define(`mb_msg0', `r90') +define(`mb_wb', `r91') +define(`mb_intra_wb', `r91') +define(`mb_inter_wb', `r92') +define(`mb_mv0', `r93') +define(`mb_mv1', `r94') +define(`mb_mv2', `r95') +define(`mb_mv3', `r96') +define(`mb_ref', `r97') +define(`mb_ref_win', `r84') + +define(`PRED_L0', `0x0':uw) +define(`PRED_L1', `0x1':uw) +define(`PRED_BI', `0x2':uw) +define(`PRED_DIRECT', `0x3':uw) +define(`PRED_MASK', `0x3':uw) + +/* The MAX search len per reference is 16 */ +define(`DSEARCH_PATH_LEN', `0x00001212') +define(`BI_WEIGHT', `0x20':uw) +define(`DSTART_CENTER', `0x00000000') +define(`INTER_MASK', `0x03') +define(`INTER_16X16MODE', `0x0') +define(`INTER_16X8MODE', `0x01') +define(`INTER_8X16MODE', `0x02') +define(`INTER_8X8MODE', `0x03') +define(`INTER_BLOCK0', `0x0') +define(`INTER_BLOCK1', `0x1') +define(`INTER_BLOCK2', `0x2') +define(`INTER_BLOCK3', `0x3') +define(`INTER_16X8MODE', `0x01') +define(`INTER_8X16MODE', `0x02') + + +define(`OBR_MESSAGE_FENCE', `7') +define(`OBR_MF_NOCOMMIT', `0') +define(`OBR_MF_COMMIT', `0x20') + +define(`DEFAULT_QUALITY_LEVEL', `0x01') +define(`HIGH_QUALITY_LEVEL', `DEFAULT_QUALITY_LEVEL') +define(`LOW_QUALITY_LEVEL', `0x02') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vme.inc intel-vaapi-driver-1.7.1/src/shaders/vme/vme.inc --- intel-vaapi-driver-1.0.15/src/shaders/vme/vme.inc 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vme.inc 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,300 @@ +/* + * Copyright © <2010>, Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +// Modual name: ME_header.inc +// +// Global symbols define +// + +/* + * Constant + */ +define(`VME_MESSAGE_TYPE_INTER', `1') +define(`VME_MESSAGE_TYPE_INTRA', `2') +define(`VME_MESSAGE_TYPE_MIXED', `3') + +define(`BLOCK_32X1', `0x0000001F') +define(`BLOCK_4X16', `0x000F0003') + +define(`LUMA_INTRA_16x16_DISABLE', `0x1') +define(`LUMA_INTRA_8x8_DISABLE', `0x2') +define(`LUMA_INTRA_4x4_DISABLE', `0x4') + +define(`INTRA_PRED_AVAIL_FLAG_AE', `0x60') +define(`INTRA_PRED_AVAIL_FLAG_B', `0x10') +define(`INTRA_PRED_AVAIL_FLAG_C', `0x8') +define(`INTRA_PRED_AVAIL_FLAG_D', `0x4') + +define(`BIND_IDX_VME', `0') +define(`BIND_IDX_VME_REF0', `1') +define(`BIND_IDX_VME_REF1', `2') +define(`BIND_IDX_OUTPUT', `3') +define(`BIND_IDX_INEP', `4') + +define(`SUB_PEL_MODE_INTEGER', `0x00000000') +define(`SUB_PEL_MODE_HALF', `0x00001000') +define(`SUB_PEL_MODE_QUARTER', `0x00003000') + +define(`INTER_SAD_NONE', `0x00000000') +define(`INTER_SAD_HAAR', `0x00200000') + +define(`INTRA_SAD_NONE', `0x00000000') +define(`INTRA_SAD_HAAR', `0x00800000') + +define(`INTER_PART_MASK', `0x00000000') + +define(`SEARCH_CTRL_SINGLE', `0x00000000') +define(`SEARCH_CTRL_DUAL_START', `0x00000100') +define(`SEARCH_CTRL_DUAL_RECORD', `0x00000300') +define(`SEARCH_CTRL_DUAL_REFERENCE', `0x00000700') + +define(`REF_REGION_SIZE', `0x2830:UW') +define(`MIN_REF_REGION_SIZE', `0x2020:UW') + +define(`BI_SUB_MB_PART_MASK', `0x0c000000') +define(`MAX_NUM_MV', `0x00000020') +define(`FB_PRUNING_ENABLE', `0x40000000') + +define(`SEARCH_PATH_LEN', `0x00003030') +define(`START_CENTER', `0x30000000') + +define(`ADAPTIVE_SEARCH_ENABLE', `0x00000002') +define(`INTRA_PREDICTORE_MODE', `0x11111111:UD') + +define(`INTER_VME_OUTPUT_IN_OWS', `10') +define(`INTER_VME_OUTPUT_MV_IN_OWS', `8') + +define(`INTRAMBFLAG_MASK', `0x00002000') +define(`MVSIZE_UW_BASE', `0x0040') +define(`MFC_MV32_BIT_SHIFT', `5') +define(`CBP_DC_YUV_UW', `0x000E') + +#ifdef DEV_SNB + +define(`MV32_BIT_MASK', `0x0010') +define(`MV32_BIT_SHIFT', `4') + +define(`OBW_CACHE_TYPE', `5') + +#else + +define(`MV32_BIT_MASK', `0x0020') +define(`MV32_BIT_SHIFT', `5') + +define(`OBW_CACHE_TYPE', `10') + +#endif + +define(`OBW_MESSAGE_TYPE', `8') + +define(`OBW_BIND_IDX', `BIND_IDX_OUTPUT') + +define(`OBW_CONTROL_0', `0') /* 1 OWord, low 128 bits */ +define(`OBW_CONTROL_1', `1') /* 1 OWord, high 128 bits */ +define(`OBW_CONTROL_2', `2') /* 2 OWords */ +define(`OBW_CONTROL_3', `3') /* 4 OWords */ +define(`OBW_CONTROL_4', `4') /* 8 OWords */ + +#ifdef DEV_SNB + +define(`OBW_WRITE_COMMIT_CATEGORY', `1') /* write commit on Sandybrige */ + +#else + +define(`OBW_WRITE_COMMIT_CATEGORY', `0') /* category on Ivybridge */ + +#endif + + +define(`OBW_HEADER_PRESENT', `1') + +/* GRF registers + * r0 header + * r1~r4 constant buffer (reserved) + * r5 inline data + * r6~r11 reserved + * r12 write back of VME message + * r13 write back of Oword Block Write + */ +/* + * GRF 0 -- header + */ +define(`thread_id_ub', `r0.20<0,1,0>:UB') /* thread id in payload */ + +/* + * GRF 1~4 -- Constant Buffer (reserved) + */ + +/* + * GRF 5 -- inline data + */ +define(`inline_reg0', `r5') +define(`w_in_mb_uw', `inline_reg0.2') +define(`orig_xy_ub', `inline_reg0.0') +define(`orig_x_ub', `inline_reg0.0') /* in macroblock */ +define(`orig_y_ub', `inline_reg0.1') +define(`transform_8x8_ub', `inline_reg0.4') +define(`slice_edge_ub', `inline_reg0.4') +define(`num_macroblocks', `inline_reg0.6') +define(`quality_level_ub', `inline_reg0.8') + +/* + * GRF 6~11 -- reserved + */ + +/* + * GRF 12~15 -- write back for VME message + */ +define(`vme_wb', `r12') +define(`vme_wb0', `r12') +define(`vme_wb1', `r13') +define(`vme_wb2', `r14') +define(`vme_wb3', `r15') + +#ifdef DEV_SNB +/* + * GRF 16 -- write back for Oword Block Write message with write commit bit + */ +define(`obw_wb', `r16') +define(`obw_wb_length', `1') + +#else + +/* + * GRF 16 -- write back for VME message + */ +define(`vme_wb4', `r16') +define(`obw_wb', `null<1>:W') +define(`obw_wb_length', `0') + +#endif + +/* + * GRF 18~21 -- Intra Neighbor Edge Pixels + */ +define(`INEP_ROW', `r18') +define(`INEP_COL0', `r20') +define(`INEP_COL1', `r21') + +/* + * temporary registers + */ +define(`tmp_reg0', `r32') +define(`read0_header', `tmp_reg0') +define(`tmp_reg1', `r33') +define(`read1_header', `tmp_reg1') +define(`tmp_reg2', `r34') +define(`vme_m0', `tmp_reg2') +define(`tmp_reg3', `r35') +define(`vme_m1', `tmp_reg3') +define(`intra_flag', `vme_m1.28') +define(`intra_part_mask_ub', `vme_m1.28') +define(`mb_intra_struct_ub', `vme_m1.29') +define(`tmp_reg4', `r36') +define(`obw_m0', `tmp_reg4') +define(`tmp_reg5', `r37') +define(`obw_m1', `tmp_reg5') +define(`tmp_reg6', `r38') +define(`obw_m2', `tmp_reg6') +define(`tmp_reg7', `r39') +define(`obw_m3', `tmp_reg7') +define(`tmp_reg8', `r40') +define(`obw_m4', `tmp_reg8') +define(`tmp_reg9', `r41') +define(`tmp_x_w', `tmp_reg9.0') +define(`tmp_rega', `r42') +define(`tmp_ud0', `tmp_rega.0') +define(`tmp_ud1', `tmp_rega.4') +define(`tmp_ud2', `tmp_rega.8') +define(`tmp_ud3', `tmp_rega.12') +define(`tmp_uw0', `tmp_rega.0') +define(`tmp_uw1', `tmp_rega.2') +define(`tmp_uw2', `tmp_rega.4') +define(`tmp_uw3', `tmp_rega.6') +define(`tmp_uw4', `tmp_rega.8') +define(`tmp_uw5', `tmp_rega.10') +define(`tmp_uw6', `tmp_rega.12') +define(`tmp_uw7', `tmp_rega.14') + +/* + * MRF registers + */ +#ifdef DEV_SNB + +define(`msg_ind', `0') +define(`msg_reg0', `m0') /* m0 */ +define(`msg_reg1', `m1') /* m1 */ +define(`msg_reg2', `m2') /* m2 */ +define(`msg_reg3', `m3') /* m3 */ +define(`msg_reg4', `m4') /* m4 */ + +#else + +define(`msg_ind', `64') +define(`msg_reg0', `g64') +define(`msg_reg1', `g65') +define(`msg_reg2', `g66') +define(`msg_reg3', `g67') +define(`msg_reg4', `g68') + +#endif + +/* + * VME message payload + */ + +#ifdef DEV_SNB + +define(`vme_msg_length', `4') +define(`vme_inter_wb_length', `4') + +#else + +define(`vme_msg_length', `5') +define(`vme_inter_wb_length', `6') + +#endif + +define(`vme_intra_wb_length', `1') + +define(`vme_msg_ind', `msg_ind') +define(`vme_msg_0', `msg_reg0') +define(`vme_msg_1', `msg_reg1') +define(`vme_msg_2', `msg_reg2') + +#ifdef DEV_SNB + +define(`vme_msg_3', `vme_msg_2') +define(`vme_msg_4', `msg_reg3') + +#else + +define(`vme_msg_3', `msg_reg3') +define(`vme_msg_4', `msg_reg4') + +#endif + +define(`DEFAULT_QUALITY_LEVEL', `0x01') +define(`HIGH_QUALITY_LEVEL', `DEFAULT_QUALITY_LEVEL') +define(`LOW_QUALITY_LEVEL', `0x02') diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen8.asm intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen8.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,739 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + * Li Zhong + * + */ + +#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud +#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud + +/* + * __START + */ +__INTER_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1}; +mov (8) mb_ref_win.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; +/* read back the data for MB A */ +/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag), +* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID) +*/ +mov (8) mba_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbb_result.0<1>:ud 0x0:ud {align1}; +mov (8) mbc_result.0<1>:ud 0x0:ud {align1}; +mba_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */ +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; +mov (1) mba_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mba_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbb_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB A */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* MV */ +mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1}; +mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1}; + +mbb_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +/* MB B doesn't exist. Zero MV. mba_flag is zero */ +/* If MB B doesn't exist, neither MB C nor D exists */ +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbb_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mbc_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB B */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1}; + +mbc_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1}; +/* MB C doesn't exist. Zero MV. mba_flag is zero */ +/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */ +(f0.0) jmpi (1) mbd_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1}; +add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +/* TODO: RefID is required after multi-references are added */ +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB C */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; +/* TODO: RefID is required after multi-references are added */ +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +jmpi (1) mb_mvp_start; +mbd_start: +mov (8) mb_msg0.0<1>:ud 0:ud {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; +mov (1) mbc_result.0<1>:d MB_AVAIL {align1}; +mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1}; +add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1}; +mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1}; +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1}; +mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1}; +mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_4, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 2 + {align1}; + +cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1}; +(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1}; +(f0.0) jmpi (1) mb_mvp_start; + +add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1}; +/* Read MV for MB D */ +/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */ +send (16) + mb_ind + mb_mv0.0<1>:ub + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_TYPE, + OBR_CONTROL_8, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 4 + {align1}; + +/* TODO: RefID is required after multi-references are added */ + +/* Forward MV */ +mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1}; +mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1}; + +mb_mvp_start: +/*TODO: Add the skip prediction */ +/* Check whether both MB B and C are inavailable */ +add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1}; +cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1}; +(-f0.0) jmpi (1) mb_median_start; +cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1}; +(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1}; +(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1}; +jmpi (1) __mb_hwdep_end; + +mb_median_start: +/* check whether only one neighbour MB has the same ref ID with the current MB */ +mov (8) tmp_reg0.0<1>:ud 0:ud {align1}; +cmp.z.f0.0 (1) null:d mba_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbb_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1}; +cmp.z.f0.0 (1) null:d mbc_result.20<0,1,0>:w 0:w {align1}; +(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1}; +cmp.e.f0.0 (1) null:d tmp_reg0.0<0,1,0>:w 1:w {align1}; +(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1}; +(f0.0) jmpi (1) __mb_hwdep_end; + +mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1}; +SAVE_RET {align1}; + jmpi (1) word_imedian; +mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1}; +mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1}; +SAVE_RET {align1}; +jmpi (1) word_imedian; +mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1}; + +__mb_hwdep_end: +asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1}; +add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1}; +and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1}; +/* m2, get the MV/Mb cost passed from constant buffer when +spawning thread by MEDIA_OBJECT */ +mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* m3 FWD/BWD cost center*/ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4 skip center*/ +mov (8) vme_msg_4<1>:UD 0x0:UD {align1}; + +/* m5 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_5<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + + +/* Use the Luma mode */ +mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1}; +mov (1) vme_msg_5.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* m6 */ +mov (8) vme_msg_6<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_6.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_6.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_6.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_6.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m7 */ + +mov (4) vme_msg_7.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_7.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * SIC VME message + */ + +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1}; +mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; /* vp8 don't support intra_8x8 mode*/ + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* m0 */ +mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* IME search */ +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + VP8_INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */ +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */ + +mov (1) vme_m0.0<1>:UD vme_m0.8<0,1,0>:UD {align1}; + +add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -16:W {align1}; /* Reference = (x-16,y-12)-(x+32,y+28) */ +add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -12:W {align1}; + +mov (1) vme_m0.0<1>:W -16:W {align1}; +mov (1) vme_m0.2<1>:W -12:W {align1}; + +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1}; + +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1}; +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 12:w {align1}; +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1}; +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 8:w {align1}; + +add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1}; +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ; +/* the Max MV number is passed by constant buffer */ +mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1}; +mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* Setup the Cost center */ +/* currently four 8x8 share the same cost center */ +mov (4) vme_m3.0<2>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; +mov (4) vme_m3.4<2>:ud mb_mvp_ref.0<0,1,0>:ud {align1}; + +mov (8) vme_msg_3<1>:UD vme_m3.0<8,8,1>:UD {align1}; +mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1}; + +/* M4/M5 search path */ +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.12<1>:UD 0x100F0F0F:UD {align1}; +mov (1) vme_msg_4.16<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_4.20<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_4.24<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_4.28<1>:UD 0x100F0F0F:UD {align1}; + +mov (1) vme_msg_5.0<1>:UD 0x01010101:UD {align1}; +mov (1) vme_msg_5.4<1>:UD 0x10010101:UD {align1}; +mov (1) vme_msg_5.8<1>:UD 0x0F0F0F0F:UD {align1}; +mov (1) vme_msg_5.12<1>:UD 0x000F0F0F:UD {align1}; + +mov (4) vme_msg_5.16<1>:UD 0x0:UD {align1}; + +send (8) + vme_msg_ind + vme_wb<1>:UD + null + vme( + BIND_IDX_VME, + 0, + 0, + VME_IME_MESSAGE_TYPE + ) + mlen ime_vme_msg_length + rlen vme_wb_length {align1}; + +/* Set Macroblock-shape/mode for FBR */ + +mov (1) vme_m2.20<1>:UD 0x0:UD {align1}; +mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1}; +mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1}; + +and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1}; +mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +/* Send FBR message into CRE */ + +mov (8) vme_msg_4.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) vme_msg_5.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) vme_msg_6.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) vme_msg_7.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; + +mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/4 pixel, harr, BME disable */ +mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; +mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1}; +mov (8) vme_msg_3.0<1>:UD vme_m3.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_FBR_MESSAGE_TYPE + ) + mlen fbr_vme_msg_length + rlen vme_wb_length + {align1}; + +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; +/* write FME info */ +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; + +mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1}; +/* Inter distortion of FME */ +mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1}; + +mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1}; + +/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_0, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Write FME/BME MV */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1}; + + +mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1}; +mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1}; +mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1}; +mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1}; +/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_8, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 5 + rlen obw_wb_length + {align1}; + +/* Write FME/BME RefID */ +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1}; +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +/* Issue message fence so that the previous write message is committed */ +send (16) + mb_ind + mb_wb.0<1>:ud + NULL + data_port( + OBR_CACHE_TYPE, + OBR_MESSAGE_FENCE, + OBR_MF_COMMIT, + OBR_BIND_IDX, + OBR_WRITE_COMMIT_CATEGORY, + OBR_HEADER_PRESENT + ) + mlen 1 + rlen 1 + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; + + + nop ; + nop ; +/* Compare three word data to get the min value */ +word_imin: + cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +/* Compare three word data to get the max value */ +word_imax: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + RETURN {align1}; + +word_imedian: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_a_ge_b; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + jmpi (1) cmp_end; +cmp_a_ge_b: + cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1}; + (f0.0) jmpi (1) cmp_end; + cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1}; + (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1}; +cmp_end: + RETURN {align1}; + diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen8.g8a intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen8.g8a --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen8.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen8.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "vp8_inter_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen8.g8b intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen8.g8b --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen8.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen8.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,299 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23800a88, 0x0e000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a00a88, 0x0e000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26000a88, 0x0e000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26200a88, 0x0e000800, 0x02190006 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000750 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2ae40208, 0x00450bc8, 0x00000000 }, + { 0x00000001, 0x2af01e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000360 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b040208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b101e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000110 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000180 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000130 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x0e000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450c18, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02000010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b141248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b341248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00208, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000190 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000860 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000800 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x0020000c, 0x2a801a68, 0x1e450ac0, 0x00020002 }, + { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 }, + { 0x00200005, 0x2a901248, 0x16450a88, 0xfffcfffc }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24400208, 0x00000448, 0x00000000 }, + { 0x00000040, 0x24401a68, 0x1e000440, 0xfff0fff0 }, + { 0x00000040, 0x24421a68, 0x1e000442, 0xfff4fff4 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x000c000c }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00080008 }, + { 0x00200040, 0x24401a68, 0x1a450440, 0x00450a90 }, + { 0x00200040, 0x24441a68, 0x1a450444, 0x00450a90 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000ac0, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000ac0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x0e000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00243000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10786000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x0a0a0403 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x0e000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x0e000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen9.g9a intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen9.g9a --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen9.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen9.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "vp8_inter_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen9.g9b intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen9.g9b --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_inter_frame_gen9.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_inter_frame_gen9.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,299 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000018 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x23800a88, 0x06000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x23a00a88, 0x06000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x26000a88, 0x06000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x26200a88, 0x06000800, 0x02190006 }, + { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000750 }, + { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2ae40208, 0x00450bc8, 0x00000000 }, + { 0x00000001, 0x2af01e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000360 }, + { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b040208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b101e68, 0x18000000, 0x00010001 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000110 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff }, + { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000180 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450bf0, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000130 }, + { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00040004 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 }, + { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 }, + { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 }, + { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff }, + { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 }, + { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 }, + { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 }, + { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 }, + { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 }, + { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 }, + { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 }, + { 0x0a800031, 0x2ba00a88, 0x06000b40, 0x02480403 }, + { 0x00200001, 0x2b240208, 0x00450c18, 0x00000000 }, + { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 }, + { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 }, + { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 }, + { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 }, + { 0x02000010, 0x20000a20, 0x0e000ae0, 0x00000000 }, + { 0x00010001, 0x2b040208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b240208, 0x00000ae4, 0x00000000 }, + { 0x00010001, 0x2b141248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2b341248, 0x00000af4, 0x00000000 }, + { 0x00010001, 0x2ac00208, 0x00000ae4, 0x00000000 }, + { 0x00110001, 0x2ac00608, 0x00000000, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000190 }, + { 0x00600001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 }, + { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 }, + { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 }, + { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 }, + { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000860 }, + { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 }, + { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 }, + { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 }, + { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 }, + { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000800 }, + { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 }, + { 0x0020000c, 0x2a801a68, 0x1e450ac0, 0x00020002 }, + { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 }, + { 0x00200005, 0x2a901248, 0x16450a88, 0xfffcfffc }, + { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00010001 }, + { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x7e200000 }, + { 0x00000001, 0x24561648, 0x10000000, 0x28302830 }, + { 0x00000001, 0x24400208, 0x00000448, 0x00000000 }, + { 0x00000040, 0x24401a68, 0x1e000440, 0xfff0fff0 }, + { 0x00000040, 0x24421a68, 0x1e000442, 0xfff4fff4 }, + { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 }, + { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 }, + { 0x00000001, 0x24440208, 0x00000440, 0x00000000 }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 }, + { 0x00010040, 0x24401a68, 0x1e000440, 0x000c000c }, + { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 }, + { 0x00010040, 0x24421a68, 0x1e000442, 0x00080008 }, + { 0x00200040, 0x24401a68, 0x1a450440, 0x00450a90 }, + { 0x00200040, 0x24441a68, 0x1a450444, 0x00450a90 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00000001, 0x24600608, 0x00000000, 0x00000002 }, + { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 }, + { 0x00000001, 0x24680608, 0x00000000, 0x30003030 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00400001, 0x45800208, 0x00000ac0, 0x00000000 }, + { 0x00400001, 0x45840208, 0x00000ac0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00000001, 0x28800608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28840608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28900608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28940608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f }, + { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 }, + { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 }, + { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f }, + { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f }, + { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 }, + { 0x08600031, 0x21800a08, 0x06000800, 0x0c784000 }, + { 0x00000001, 0x25740608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x25752288, 0x00000199, 0x00000000 }, + { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 }, + { 0x00000005, 0x24001248, 0x16000180, 0x00030003 }, + { 0x00000001, 0x25742288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 }, + { 0x00000001, 0x244c0608, 0x00000000, 0x00243000 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10786000 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0003 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000001 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 }, + { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x0a0a0403 }, + { 0x00000040, 0x24880208, 0x06000488, 0x00000008 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x0a800031, 0x2b600a08, 0x06000b40, 0x0219e003 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x06000e00, 0x82000010 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x06000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 }, + { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000f60, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 }, + { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 }, + { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 }, + { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 }, + { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 }, + { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 }, + { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen8.asm intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen8.asm --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen8.asm 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen8.asm 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,200 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + * Xiang Haihao + * Li Zhong + * + */ + +/* + * __START + */ +__INTRA_START: +mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; +mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; +mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; + +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; +mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; +mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ +mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; +add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; +mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1}; +mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ + +/* + * Media Read Message -- fetch Luma neighbor edge pixels + */ +/* ROW */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; + +/* + * Media Read Message -- fetch Chroma neighbor edge pixels + */ +/* ROW */ +shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */ +mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1}; +add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ +add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ +mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* COL */ +shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */ +mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1}; +add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ +mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1}; +mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; +send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1}; + +/* m2, get the MV/Mb cost passed by constant buffer +when creating EU thread by MEDIA_OBJECT */ +mov (8) vme_msg_2<1>:UD r1.0<8,8,1>:UD {align1}; + +/* m3. This is changed for FWD/BWD cost center */ +mov (8) vme_msg_3<1>:UD 0x0:UD {align1}; + +/* m4.*/ +mov (8) vme_msg_4<1>:ud 0x0:ud {align1}; + +/* m5 */ +mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; +and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; +mov (8) vme_msg_5<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; + +mov (1) tmp_reg0.0<1>:UB INTRA_PLANAR_MODE_MASK {align1}; /* vp8 don't support planar intra mode */ +mov (1) tmp_reg0.1<1>:UB LUMA_CHROMA_MODE {align1}; /* Intra type: Luma + Chroma */ + +/* Intra mode mask && Intra compute type */ +mov (1) vme_msg_5.4<1>:UW tmp_reg0.0<0,1,0>:UW {align1}; + +/* m6 */ +mov (8) vme_msg_6<1>:UD 0x0:UD {align1}; +mov (16) vme_msg_6.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; +mov (1) vme_msg_6.16<1>:UD INTRA_PREDICTORE_MODE {align1}; + +/* the penalty for Intra mode */ +mov (1) vme_msg_6.28<1>:UD 0x010101:UD {align1}; +mov (1) vme_msg_6.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1}; + + +/* m7 */ + +mov (4) vme_msg_7.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1}; +mov (8) vme_msg_7.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1}; + +/* + * VME message + */ + +/* m1 */ +mov (1) intra_flag<1>:UW 0x0:UW {align1}; +mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; /* vp8 don't support intra_8x8 mode*/ + +/* assign MB intra struct from the thread payload*/ +mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; + +/* Disable DC HAAR component when calculating HARR SATD block */ +mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1}; +mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1}; + +mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; + +/* m0 */ +add (1) vme_m0.12<1>:UD vme_m0.12<0,1,0>:ud INTRA_SAD_HAAR:UD {align1};/* 16x16 Source, Intra_harr */ +mov (1) vme_m0.15<1>:UB SUB_PART_8x4_DISABLE + SUB_PART_4x8_DISABLE {align1}; /* vp8 don't support 8x4 and 4x8 partion */ +mov (8) vme_msg_0<1>:UD vme_m0.0<8,8,1>:UD {align1}; + +/* after verification it will be passed by using payload */ +send (8) + vme_msg_ind + vme_wb<1>:UD + null + cre( + BIND_IDX_VME, + VME_SIC_MESSAGE_TYPE + ) + mlen sic_vme_msg_length + rlen vme_wb_length + {align1}; +/* + * Oword Block Write message + */ +mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; + +mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; +mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; +mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; +mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; + +/* Distortion, Intra (17-16), */ +mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1}; + +mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1}; +/* VME clock counts */ +mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1}; + +mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1}; + +/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ +send (16) + msg_ind + obw_wb + null + data_port( + OBW_CACHE_TYPE, + OBW_MESSAGE_TYPE, + OBW_CONTROL_2, + OBW_BIND_IDX, + OBW_WRITE_COMMIT_CATEGORY, + OBW_HEADER_PRESENT + ) + mlen 2 + rlen obw_wb_length + {align1}; + +__EXIT: +/* + * kill thread + */ +mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; +send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen8.g8a intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen8.g8a --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen8.g8a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen8.g8a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "vp8_intra_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen8.g8b intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen8.g8b --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen8.g8b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen8.g8b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,73 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x23800a88, 0x0e000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x23a00a88, 0x0e000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x04600031, 0x26000a88, 0x0e000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x04600031, 0x26200a88, 0x0e000800, 0x02190006 }, + { 0x00600001, 0x28400208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24000688, 0x00000000, 0x10001000 }, + { 0x00000001, 0x24010e88, 0x08000000, 0x00000000 }, + { 0x00000001, 0x28a41248, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000040, 0x244c0208, 0x0600044c, 0x00800000 }, + { 0x00000001, 0x244f0e88, 0x08000000, 0x00000030 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x0e000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x0e000800, 0x040a0203 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x0e000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen9.g9a intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen9.g9a --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen9.g9a 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen9.g9a 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,2 @@ +#include "vme8.inc" +#include "vp8_intra_frame_gen8.asm" diff -Nru intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen9.g9b intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen9.g9b --- intel-vaapi-driver-1.0.15/src/shaders/vme/vp8_intra_frame_gen9.g9b 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/shaders/vme/vp8_intra_frame_gen9.g9b 2016-06-16 00:57:56.000000000 +0000 @@ -0,0 +1,73 @@ + { 0x00800001, 0x24000608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24400608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24800608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f }, + { 0x00000001, 0x24142288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 }, + { 0x00000001, 0x24342288, 0x00000014, 0x00000000 }, + { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 }, + { 0x00000001, 0x24542288, 0x00000014, 0x00000000 }, + { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 }, + { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 }, + { 0x00000041, 0x24880208, 0x06000488, 0x00000002 }, + { 0x00000001, 0x24942288, 0x00000014, 0x00000000 }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x23800a88, 0x06000800, 0x02190004 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x23a00a88, 0x06000800, 0x02290004 }, + { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 }, + { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 }, + { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff }, + { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 }, + { 0x0c600031, 0x26000a88, 0x06000800, 0x02190006 }, + { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 }, + { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 }, + { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc }, + { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 }, + { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 }, + { 0x0c600031, 0x26200a88, 0x06000800, 0x02190006 }, + { 0x00600001, 0x28400208, 0x008d0020, 0x00000000 }, + { 0x00600001, 0x28600608, 0x00000000, 0x00000000 }, + { 0x00600001, 0x28800608, 0x00000000, 0x00000000 }, + { 0x00000001, 0x23800608, 0x00000000, 0x00000000 }, + { 0x00000005, 0x23840208, 0x06000384, 0xff000000 }, + { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 }, + { 0x00000001, 0x24000688, 0x00000000, 0x10001000 }, + { 0x00000001, 0x24010e88, 0x08000000, 0x00000000 }, + { 0x00000001, 0x28a41248, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 }, + { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 }, + { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 }, + { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 }, + { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 }, + { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 }, + { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 }, + { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 }, + { 0x00000001, 0x247c0e88, 0x08000000, 0x00000002 }, + { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 }, + { 0x00000001, 0x24001648, 0x10000000, 0x00200020 }, + { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 }, + { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 }, + { 0x00000040, 0x244c0208, 0x0600044c, 0x00800000 }, + { 0x00000001, 0x244f0e88, 0x08000000, 0x00000030 }, + { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 }, + { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 }, + { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 }, + { 0x00000001, 0x28200208, 0x00000180, 0x00000000 }, + { 0x00000001, 0x28240208, 0x00000190, 0x00000000 }, + { 0x00000001, 0x28280208, 0x00000194, 0x00000000 }, + { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 }, + { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 }, + { 0x00000001, 0x28340208, 0x00000188, 0x00000000 }, + { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 }, + { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 }, + { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 }, + { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 }, + { 0x07800031, 0x24000a40, 0x06000e00, 0x82000010 }, diff -Nru intel-vaapi-driver-1.0.15/src/sysdeps.h intel-vaapi-driver-1.7.1/src/sysdeps.h --- intel-vaapi-driver-1.0.15/src/sysdeps.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/sysdeps.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef SYSDEPS_H +#define SYSDEPS_H + +#ifdef ANDROID + +# include "config_android.h" + +#else + +#ifdef HAVE_CONFIG_H +# include "config.h" +#endif + +#endif /* ANDROID */ + +#include +#include +#include +#include +#include +#include + +#endif /* SYSDEPS_H */ diff -Nru intel-vaapi-driver-1.0.15/src/va_backend_compat.h intel-vaapi-driver-1.7.1/src/va_backend_compat.h --- intel-vaapi-driver-1.0.15/src/va_backend_compat.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/va_backend_compat.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2012 Intel Corporation. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef VA_BACKEND_COMPAT_H +#define VA_BACKEND_COMPAT_H + +#include + +#if VA_CHECK_VERSION(0,33,0) +# include + +# define VA_CHECK_DRM_AUTH_TYPE(ctx, type) \ + (((struct drm_state *)(ctx)->drm_state)->auth_type == (type)) + +#else +# include + +# define VA_CHECK_DRM_AUTH_TYPE(ctx, type) \ + (((struct dri_state *)(ctx)->dri_state)->driConnectedFlag == (type)) + +# define drm_state dri_state +# define VA_DRM_AUTH_DRI1 VA_DRI1 +# define VA_DRM_AUTH_DRI2 VA_DRI2 +# define VA_DRM_AUTH_CUSTOM VA_DUMMY +#endif + +#if !VA_CHECK_VERSION(0,35,2) +# define VAProfileH264MultiviewHigh 15 +# define VAProfileH264StereoHigh 16 +#endif + +#if !VA_CHECK_VERSION(0,38,1) + +# define VA_RT_FORMAT_YUV420_10BPP 0x00000100 +# define VA_FOURCC_P010 0x30313050 +# define VA_FOURCC_P016 0x36313050 + +#endif + +#endif /* VA_BACKEND_COMPAT_H */ diff -Nru intel-vaapi-driver-1.0.15/src/.VERSION.pkg intel-vaapi-driver-1.7.1/src/.VERSION.pkg --- intel-vaapi-driver-1.0.15/src/.VERSION.pkg 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/.VERSION.pkg 2016-06-21 02:07:56.000000000 +0000 @@ -0,0 +1 @@ +1.7.1 diff -Nru intel-vaapi-driver-1.0.15/src/vp8_probs.h intel-vaapi-driver-1.7.1/src/vp8_probs.h --- intel-vaapi-driver-1.0.15/src/vp8_probs.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/vp8_probs.h 2016-06-03 06:05:58.000000000 +0000 @@ -0,0 +1,339 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/* + * This file defines some vp8 probability tables, and + * they are ported from libvpx (https://github.com/mrchapp/libvpx/). + * The original copyright and licence statement as below. + */ + +/* + * Copyright (c) 2010 The WebM project authors. All Rights Reserved. + * + * Use of this source code is governed by a BSD-style license + * that can be found in the LICENSE file in the root of the source + * tree. An additional intellectual property rights grant can be found + * in the file PATENTS. All contributing project authors may + * be found in the AUTHORS file in the root of the source tree. + */ + +#ifndef VP8_PROBS_H +#define VP8_PROBS_H + +static const unsigned char vp8_ymode_prob[4] = +{ + 112, 86, 140, 37 +}; + +static const unsigned char vp8_kf_ymode_prob[4] = +{ + 145, 156, 163, 128 +}; + +static const unsigned char vp8_uv_mode_prob[3] = +{ + 162, 101, 204 +}; + +static const unsigned char vp8_kf_uv_mode_prob[3] = +{ + 142, 114, 183 +}; + +static const unsigned char vp8_base_skip_false_prob[128] = +{ + 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, + 255, 255, 255, 255, 255, 255, 255, 255, + 251, 248, 244, 240, 236, 232, 229, 225, + 221, 217, 213, 208, 204, 199, 194, 190, + 187, 183, 179, 175, 172, 168, 164, 160, + 157, 153, 149, 145, 142, 138, 134, 130, + 127, 124, 120, 117, 114, 110, 107, 104, + 101, 98, 95, 92, 89, 86, 83, 80, + 77, 74, 71, 68, 65, 62, 59, 56, + 53, 50, 47, 44, 41, 38, 35, 32, + 30, 28, 26, 24, 22, 20, 18, 16, +}; + +static const unsigned char vp8_mv_update_probs[2][19] = +{ + { + 237, + 246, + 253, 253, 254, 254, 254, 254, 254, + 254, 254, 254, 254, 254, 250, 250, 252, 254, 254 + }, + { + 231, + 243, + 245, 253, 254, 254, 254, 254, 254, + 254, 254, 254, 254, 254, 251, 251, 254, 254, 254 + } +}; + +static const unsigned char vp8_default_mv_context[2][19] = +{ + { + 162, /* is short */ + 128, /* sign */ + 225, 146, 172, 147, 214, 39, 156, /* short tree */ + 128, 129, 132, 75, 145, 178, 206, 239, 254, 254 /* long bits */ + }, + + { + 164, + 128, + 204, 170, 119, 235, 140, 230, 228, + 128, 130, 130, 74, 148, 180, 203, 236, 254, 254 + + } +}; + +static const unsigned char vp8_default_coef_probs[4][8][3][11] = +{ + { /* Block Type ( 0 ) */ + { /* Coeff Band ( 0 )*/ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 1 )*/ + { 253, 136, 254, 255, 228, 219, 128, 128, 128, 128, 128 }, + { 189, 129, 242, 255, 227, 213, 255, 219, 128, 128, 128 }, + { 106, 126, 227, 252, 214, 209, 255, 255, 128, 128, 128 } + }, + { /* Coeff Band ( 2 )*/ + { 1, 98, 248, 255, 236, 226, 255, 255, 128, 128, 128 }, + { 181, 133, 238, 254, 221, 234, 255, 154, 128, 128, 128 }, + { 78, 134, 202, 247, 198, 180, 255, 219, 128, 128, 128 } + }, + { /* Coeff Band ( 3 )*/ + { 1, 185, 249, 255, 243, 255, 128, 128, 128, 128, 128 }, + { 184, 150, 247, 255, 236, 224, 128, 128, 128, 128, 128 }, + { 77, 110, 216, 255, 236, 230, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 4 )*/ + { 1, 101, 251, 255, 241, 255, 128, 128, 128, 128, 128 }, + { 170, 139, 241, 252, 236, 209, 255, 255, 128, 128, 128 }, + { 37, 116, 196, 243, 228, 255, 255, 255, 128, 128, 128 } + }, + { /* Coeff Band ( 5 )*/ + { 1, 204, 254, 255, 245, 255, 128, 128, 128, 128, 128 }, + { 207, 160, 250, 255, 238, 128, 128, 128, 128, 128, 128 }, + { 102, 103, 231, 255, 211, 171, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 6 )*/ + { 1, 152, 252, 255, 240, 255, 128, 128, 128, 128, 128 }, + { 177, 135, 243, 255, 234, 225, 128, 128, 128, 128, 128 }, + { 80, 129, 211, 255, 194, 224, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 7 )*/ + { 1, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 246, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 255, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 } + } + }, + { /* Block Type ( 1 ) */ + { /* Coeff Band ( 0 )*/ + { 198, 35, 237, 223, 193, 187, 162, 160, 145, 155, 62 }, + { 131, 45, 198, 221, 172, 176, 220, 157, 252, 221, 1 }, + { 68, 47, 146, 208, 149, 167, 221, 162, 255, 223, 128 } + }, + { /* Coeff Band ( 1 )*/ + { 1, 149, 241, 255, 221, 224, 255, 255, 128, 128, 128 }, + { 184, 141, 234, 253, 222, 220, 255, 199, 128, 128, 128 }, + { 81, 99, 181, 242, 176, 190, 249, 202, 255, 255, 128 } + }, + { /* Coeff Band ( 2 )*/ + { 1, 129, 232, 253, 214, 197, 242, 196, 255, 255, 128 }, + { 99, 121, 210, 250, 201, 198, 255, 202, 128, 128, 128 }, + { 23, 91, 163, 242, 170, 187, 247, 210, 255, 255, 128 } + }, + { /* Coeff Band ( 3 )*/ + { 1, 200, 246, 255, 234, 255, 128, 128, 128, 128, 128 }, + { 109, 178, 241, 255, 231, 245, 255, 255, 128, 128, 128 }, + { 44, 130, 201, 253, 205, 192, 255, 255, 128, 128, 128 } + }, + { /* Coeff Band ( 4 )*/ + { 1, 132, 239, 251, 219, 209, 255, 165, 128, 128, 128 }, + { 94, 136, 225, 251, 218, 190, 255, 255, 128, 128, 128 }, + { 22, 100, 174, 245, 186, 161, 255, 199, 128, 128, 128 } + }, + { /* Coeff Band ( 5 )*/ + { 1, 182, 249, 255, 232, 235, 128, 128, 128, 128, 128 }, + { 124, 143, 241, 255, 227, 234, 128, 128, 128, 128, 128 }, + { 35, 77, 181, 251, 193, 211, 255, 205, 128, 128, 128 } + }, + { /* Coeff Band ( 6 )*/ + { 1, 157, 247, 255, 236, 231, 255, 255, 128, 128, 128 }, + { 121, 141, 235, 255, 225, 227, 255, 255, 128, 128, 128 }, + { 45, 99, 188, 251, 195, 217, 255, 224, 128, 128, 128 } + }, + { /* Coeff Band ( 7 )*/ + { 1, 1, 251, 255, 213, 255, 128, 128, 128, 128, 128 }, + { 203, 1, 248, 255, 255, 128, 128, 128, 128, 128, 128 }, + { 137, 1, 177, 255, 224, 255, 128, 128, 128, 128, 128 } + } + }, + { /* Block Type ( 2 ) */ + { /* Coeff Band ( 0 )*/ + { 253, 9, 248, 251, 207, 208, 255, 192, 128, 128, 128 }, + { 175, 13, 224, 243, 193, 185, 249, 198, 255, 255, 128 }, + { 73, 17, 171, 221, 161, 179, 236, 167, 255, 234, 128 } + }, + { /* Coeff Band ( 1 )*/ + { 1, 95, 247, 253, 212, 183, 255, 255, 128, 128, 128 }, + { 239, 90, 244, 250, 211, 209, 255, 255, 128, 128, 128 }, + { 155, 77, 195, 248, 188, 195, 255, 255, 128, 128, 128 } + }, + { /* Coeff Band ( 2 )*/ + { 1, 24, 239, 251, 218, 219, 255, 205, 128, 128, 128 }, + { 201, 51, 219, 255, 196, 186, 128, 128, 128, 128, 128 }, + { 69, 46, 190, 239, 201, 218, 255, 228, 128, 128, 128 } + }, + { /* Coeff Band ( 3 )*/ + { 1, 191, 251, 255, 255, 128, 128, 128, 128, 128, 128 }, + { 223, 165, 249, 255, 213, 255, 128, 128, 128, 128, 128 }, + { 141, 124, 248, 255, 255, 128, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 4 )*/ + { 1, 16, 248, 255, 255, 128, 128, 128, 128, 128, 128 }, + { 190, 36, 230, 255, 236, 255, 128, 128, 128, 128, 128 }, + { 149, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 5 )*/ + { 1, 226, 255, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 247, 192, 255, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 240, 128, 255, 128, 128, 128, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 6 )*/ + { 1, 134, 252, 255, 255, 128, 128, 128, 128, 128, 128 }, + { 213, 62, 250, 255, 255, 128, 128, 128, 128, 128, 128 }, + { 55, 93, 255, 128, 128, 128, 128, 128, 128, 128, 128 } + }, + { /* Coeff Band ( 7 )*/ + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 128, 128, 128, 128, 128, 128, 128, 128, 128, 128, 128 } + } + }, + { /* Block Type ( 3 ) */ + { /* Coeff Band ( 0 )*/ + { 202, 24, 213, 235, 186, 191, 220, 160, 240, 175, 255 }, + { 126, 38, 182, 232, 169, 184, 228, 174, 255, 187, 128 }, + { 61, 46, 138, 219, 151, 178, 240, 170, 255, 216, 128 } + }, + { /* Coeff Band ( 1 )*/ + { 1, 112, 230, 250, 199, 191, 247, 159, 255, 255, 128 }, + { 166, 109, 228, 252, 211, 215, 255, 174, 128, 128, 128 }, + { 39, 77, 162, 232, 172, 180, 245, 178, 255, 255, 128 } + }, + { /* Coeff Band ( 2 )*/ + { 1, 52, 220, 246, 198, 199, 249, 220, 255, 255, 128 }, + { 124, 74, 191, 243, 183, 193, 250, 221, 255, 255, 128 }, + { 24, 71, 130, 219, 154, 170, 243, 182, 255, 255, 128 } + }, + { /* Coeff Band ( 3 )*/ + { 1, 182, 225, 249, 219, 240, 255, 224, 128, 128, 128 }, + { 149, 150, 226, 252, 216, 205, 255, 171, 128, 128, 128 }, + { 28, 108, 170, 242, 183, 194, 254, 223, 255, 255, 128 } + }, + { /* Coeff Band ( 4 )*/ + { 1, 81, 230, 252, 204, 203, 255, 192, 128, 128, 128 }, + { 123, 102, 209, 247, 188, 196, 255, 233, 128, 128, 128 }, + { 20, 95, 153, 243, 164, 173, 255, 203, 128, 128, 128 } + }, + { /* Coeff Band ( 5 )*/ + { 1, 222, 248, 255, 216, 213, 128, 128, 128, 128, 128 }, + { 168, 175, 246, 252, 235, 205, 255, 255, 128, 128, 128 }, + { 47, 116, 215, 255, 211, 212, 255, 255, 128, 128, 128 } + }, + { /* Coeff Band ( 6 )*/ + { 1, 121, 236, 253, 212, 214, 255, 255, 128, 128, 128 }, + { 141, 84, 213, 252, 201, 202, 255, 219, 128, 128, 128 }, + { 42, 80, 160, 240, 162, 185, 255, 205, 128, 128, 128 } + }, + { /* Coeff Band ( 7 )*/ + { 1, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 244, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128 }, + { 238, 1, 255, 128, 128, 128, 128, 128, 128, 128, 128 } + } + } +}; + +/* Work in progress recalibration of baseline rate tables based on + * the assumption that bits per mb is inversely proportional to the + * quantizer value. + * Note: this table value multiplied by 512 + */ +static const int vp8_bits_per_mb[2][128] = +{ + /* Intra case 450000/Qintra */ + { + 1125000,900000, 750000, 642857, 562500, 500000, 450000, 450000, + 409090, 375000, 346153, 321428, 300000, 281250, 264705, 264705, + 250000, 236842, 225000, 225000, 214285, 214285, 204545, 204545, + 195652, 195652, 187500, 180000, 180000, 173076, 166666, 160714, + 155172, 150000, 145161, 140625, 136363, 132352, 128571, 125000, + 121621, 121621, 118421, 115384, 112500, 109756, 107142, 104651, + 102272, 100000, 97826, 97826, 95744, 93750, 91836, 90000, + 88235, 86538, 84905, 83333, 81818, 80357, 78947, 77586, + 76271, 75000, 73770, 72580, 71428, 70312, 69230, 68181, + 67164, 66176, 65217, 64285, 63380, 62500, 61643, 60810, + 60000, 59210, 59210, 58441, 57692, 56962, 56250, 55555, + 54878, 54216, 53571, 52941, 52325, 51724, 51136, 50561, + 49450, 48387, 47368, 46875, 45918, 45000, 44554, 44117, + 43269, 42452, 41666, 40909, 40178, 39473, 38793, 38135, + 36885, 36290, 35714, 35156, 34615, 34090, 33582, 33088, + 32608, 32142, 31468, 31034, 30405, 29801, 29220, 28662, + }, + + /* Inter case 285000/Qinter */ + { + 712500, 570000, 475000, 407142, 356250, 316666, 285000, 259090, + 237500, 219230, 203571, 190000, 178125, 167647, 158333, 150000, + 142500, 135714, 129545, 123913, 118750, 114000, 109615, 105555, + 101785, 98275, 95000, 91935, 89062, 86363, 83823, 81428, + 79166, 77027, 75000, 73076, 71250, 69512, 67857, 66279, + 64772, 63333, 61956, 60638, 59375, 58163, 57000, 55882, + 54807, 53773, 52777, 51818, 50892, 50000, 49137, 47500, + 45967, 44531, 43181, 41911, 40714, 39583, 38513, 37500, + 36538, 35625, 34756, 33928, 33139, 32386, 31666, 30978, + 30319, 29687, 29081, 28500, 27941, 27403, 26886, 26388, + 25909, 25446, 25000, 24568, 23949, 23360, 22800, 22265, + 21755, 21268, 20802, 20357, 19930, 19520, 19127, 18750, + 18387, 18037, 17701, 17378, 17065, 16764, 16473, 16101, + 15745, 15405, 15079, 14766, 14467, 14179, 13902, 13636, + 13380, 13133, 12895, 12666, 12445, 12179, 11924, 11632, + 11445, 11220, 11003, 10795, 10594, 10401, 10215, 10035, + } +}; + +#endif /* _VP8_PROBS_H_ */ diff -Nru intel-vaapi-driver-1.0.15/src/vp9_probs.c intel-vaapi-driver-1.7.1/src/vp9_probs.c --- intel-vaapi-driver-1.0.15/src/vp9_probs.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/vp9_probs.c 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,1106 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Zhao Yakui + */ +/* + * This file defines some vp9 probability tables, and + * they are ported from libvpx (https://github.com/webmproject/libvpx/). + * The original copyright and licence statement as below. + */ + +/* + * Copyright (c) 2010 The WebM project authors. All Rights Reserved. + * + * Use of this source code is governed by a BSD-style license + * that can be found in the LICENSE file in the root of the source + * tree. An additional intellectual property rights grant can be found + * in the file PATENTS. All contributing project authors may + * be found in the AUTHORS file in the root of the source tree. + */ +#include +#include +#include +#include "vp9_probs.h" +#include "i965_drv_video.h" +#include + +struct tx_probs default_tx_probs = { + { { 100 }, + { 66 } }, + + { { 20, 152 }, + { 15, 101 } }, + + { { 3, 136, 37 }, + { 5, 52, 13 } }, +}; + +vp9_prob default_skip_probs[SKIP_CONTEXTS] = { + 192, 128, 64 +}; + +vp9_prob default_inter_mode_probs[INTER_MODE_CONTEXTS] + [INTER_MODES - 1] = { + {2, 173, 34}, // 0 = both zero mv + {7, 145, 85}, // 1 = one zero mv + one a predicted mv + {7, 166, 63}, // 2 = two predicted mvs + {7, 94, 66}, // 3 = one predicted/zero and one new mv + {8, 64, 46}, // 4 = two new mvs + {17, 81, 31}, // 5 = one intra neighbour + x + {25, 29, 30}, // 6 = two intra neighbours +}; + +vp9_prob default_switchable_interp_prob[SWITCHABLE_FILTER_CONTEXTS][SWITCHABLE_FILTERS - 1] = { + { 235, 162, }, + { 36, 255, }, + { 34, 3, }, + { 149, 144, }, +}; + +vp9_prob default_intra_inter_p[INTRA_INTER_CONTEXTS] = { + 9, 102, 187, 225 +}; + +vp9_prob default_comp_inter_p[COMP_INTER_CONTEXTS] = { + 239, 183, 119, 96, 41 +}; + +vp9_prob default_single_ref_p[REF_CONTEXTS][2] = { + { 33, 16 }, + { 77, 74 }, + { 142, 142 }, + { 172, 170 }, + { 238, 247 } +}; + +vp9_prob default_comp_ref_p[REF_CONTEXTS] = { + 50, 126, 123, 221, 226 +}; + +vp9_prob vp9_kf_uv_mode_prob[INTRA_MODES][INTRA_MODES - 1] = { + { 144, 11, 54, 157, 195, 130, 46, 58, 108 }, // y = dc + { 118, 15, 123, 148, 131, 101, 44, 93, 131 }, // y = v + { 113, 12, 23, 188, 226, 142, 26, 32, 125 }, // y = h + { 120, 11, 50, 123, 163, 135, 64, 77, 103 }, // y = d45 + { 113, 9, 36, 155, 111, 157, 32, 44, 161 }, // y = d135 + { 116, 9, 55, 176, 76, 96, 37, 61, 149 }, // y = d117 + { 115, 9, 28, 141, 161, 167, 21, 25, 193 }, // y = d153 + { 120, 12, 32, 145, 195, 142, 32, 38, 86 }, // y = d207 + { 116, 12, 64, 120, 140, 125, 49, 115, 121 }, // y = d63 + { 102, 19, 66, 162, 182, 122, 35, 59, 128 } // y = tm +}; + +vp9_prob default_if_y_probs[BLOCK_SIZE_GROUPS][INTRA_MODES - 1] = { + { 65, 32, 18, 144, 162, 194, 41, 51, 98 }, // block_size < 8x8 + { 132, 68, 18, 165, 217, 196, 45, 40, 78 }, // block_size < 16x16 + { 173, 80, 19, 176, 240, 193, 64, 35, 46 }, // block_size < 32x32 + { 221, 135, 38, 194, 248, 121, 96, 85, 29 } // block_size >= 32x32 +}; + +vp9_prob default_if_uv_probs[INTRA_MODES][INTRA_MODES - 1] = { + { 120, 7, 76, 176, 208, 126, 28, 54, 103 }, // y = dc + { 48, 12, 154, 155, 139, 90, 34, 117, 119 }, // y = v + { 67, 6, 25, 204, 243, 158, 13, 21, 96 }, // y = h + { 97, 5, 44, 131, 176, 139, 48, 68, 97 }, // y = d45 + { 83, 5, 42, 156, 111, 152, 26, 49, 152 }, // y = d135 + { 80, 5, 58, 178, 74, 83, 33, 62, 145 }, // y = d117 + { 86, 5, 32, 154, 192, 168, 14, 22, 163 }, // y = d153 + { 85, 5, 32, 156, 216, 148, 19, 29, 73 }, // y = d207 + { 77, 7, 64, 116, 132, 122, 37, 126, 120 }, // y = d63 + { 101, 21, 107, 181, 192, 103, 19, 67, 125 } // y = tm +}; + +vp9_prob default_seg_tree_probs[SEG_TREE_PROBS] = { + 255, 255, 255, 255, 255, 255, 255 +}; + +vp9_prob default_seg_pred_probs[PREDICTION_PROBS] = { + 255, 255, 255 +}; + +vp9_prob vp9_kf_partition_probs[PARTITION_CONTEXTS] + [PARTITION_TYPES - 1] = { + // 8x8 -> 4x4 + { 158, 97, 94 }, // a/l both not split + { 93, 24, 99 }, // a split, l not split + { 85, 119, 44 }, // l split, a not split + { 62, 59, 67 }, // a/l both split + // 16x16 -> 8x8 + { 149, 53, 53 }, // a/l both not split + { 94, 20, 48 }, // a split, l not split + { 83, 53, 24 }, // l split, a not split + { 52, 18, 18 }, // a/l both split + // 32x32 -> 16x16 + { 150, 40, 39 }, // a/l both not split + { 78, 12, 26 }, // a split, l not split + { 67, 33, 11 }, // l split, a not split + { 24, 7, 5 }, // a/l both split + // 64x64 -> 32x32 + { 174, 35, 49 }, // a/l both not split + { 68, 11, 27 }, // a split, l not split + { 57, 15, 9 }, // l split, a not split + { 12, 3, 3 }, // a/l both split +}; + +vp9_prob default_partition_probs[PARTITION_CONTEXTS] + [PARTITION_TYPES - 1] = { + // 8x8 -> 4x4 + { 199, 122, 141 }, // a/l both not split + { 147, 63, 159 }, // a split, l not split + { 148, 133, 118 }, // l split, a not split + { 121, 104, 114 }, // a/l both split + // 16x16 -> 8x8 + { 174, 73, 87 }, // a/l both not split + { 92, 41, 83 }, // a split, l not split + { 82, 99, 50 }, // l split, a not split + { 53, 39, 39 }, // a/l both split + // 32x32 -> 16x16 + { 177, 58, 59 }, // a/l both not split + { 68, 26, 63 }, // a split, l not split + { 52, 79, 25 }, // l split, a not split + { 17, 14, 12 }, // a/l both split + // 64x64 -> 32x32 + { 222, 34, 30 }, // a/l both not split + { 72, 16, 44 }, // a split, l not split + { 58, 32, 12 }, // l split, a not split + { 10, 7, 6 }, // a/l both split +}; + +//Rearranged the values for better usage +nmv_context default_nmv_context = { + {32, 64, 96}, + { + { // Vertical component + 128, // sign + {224, 144, 192, 168, 192, 176, 192, 198, 198, 245}, // class + {216}, // class0 + {136, 140, 148, 160, 176, 192, 224, 234, 234, 240}, // bits + }, + { // Horizontal component + 128, // sign + {216, 128, 176, 160, 176, 176, 192, 198, 198, 208}, // class + {208}, // class0 + {136, 140, 148, 160, 176, 192, 224, 234, 234, 240}, // bits + } + }, + {{128, 128, 64}, {96, 112, 64}}, // class0_fp0 + {64, 96, 64}, // fp0 + {{128, 128, 64}, {96, 112, 64}}, // class0_fp1 + {64, 96, 64}, // fp1 + {160, 128}, // class0_hp bit + {160, 128} // hp + +}; + +//Rearranged the coeff probs for better usage +vp9_prob default_coef_probs_4x4[COEFF_PROB_SIZE][COEFF_PROB_NUM] = { + // Y plane - Intra + // Band 0 + { 195, 29, 183 }, { 84, 49, 136 }, { 8, 42, 71 }, + // Band 1 + { 31, 107, 169 }, { 35, 99, 159 }, { 17, 82, 140 }, + { 8, 66, 114 }, { 2, 44, 76 }, { 1, 19, 32 }, + // Band 2 + { 40, 132, 201 }, { 29, 114, 187 }, { 13, 91, 157 }, + { 7, 75, 127 }, { 3, 58, 95 }, { 1, 28, 47 }, + // Band 3 + { 69, 142, 221 }, { 42, 122, 201 }, { 15, 91, 159 }, + { 6, 67, 121 }, { 1, 42, 77 }, { 1, 17, 31 }, + // Band 4 + { 102, 148, 228 }, { 67, 117, 204 }, { 17, 82, 154 }, + { 6, 59, 114 }, { 2, 39, 75 }, { 1, 15, 29 }, + // Band 5 + { 156, 57, 233 }, { 119, 57, 212 }, { 58, 48, 163 }, + { 29, 40, 124 }, { 12, 30, 81 }, { 3, 12, 31 }, + + // Y plane - Inter + // Band 0 + { 191, 107, 226 }, { 124, 117, 204 }, { 25, 99, 155 }, + // Band 1 + { 29, 148, 210 }, { 37, 126, 194 }, { 8, 93, 157 }, + { 2, 68, 118 }, { 1, 39, 69 }, { 1, 17, 33 }, + // Band 2 + { 41, 151, 213 }, { 27, 123, 193 }, { 3, 82, 144 }, + { 1, 58, 105 }, { 1, 32, 60 }, { 1, 13, 26 }, + // Band 3 + { 59, 159, 220 }, { 23, 126, 198 }, { 4, 88, 151 }, + { 1, 66, 114 }, { 1, 38, 71 }, { 1, 18, 34 }, + // Band 4 + { 114, 136, 232 }, { 51, 114, 207 }, { 11, 83, 155 }, + { 3, 56, 105 }, { 1, 33, 65 }, { 1, 17, 34 }, + // Band 5 + { 149, 65, 234 }, { 121, 57, 215 }, { 61, 49, 166 }, + { 28, 36, 114 }, { 12, 25, 76 }, { 3, 16, 42 }, + + // UV plane - Intra + // Band 0 + { 214, 49, 220 }, { 132, 63, 188 }, { 42, 65, 137 }, + // Band 1 + { 85, 137, 221 }, { 104, 131, 216 }, { 49, 111, 192 }, + { 21, 87, 155 }, { 2, 49, 87 }, { 1, 16, 28 }, + // Band 2 + { 89, 163, 230 }, { 90, 137, 220 }, { 29, 100, 183 }, + { 10, 70, 135 }, { 2, 42, 81 }, { 1, 17, 33 }, + // Band 3 + { 108, 167, 237 }, { 55, 133, 222 }, { 15, 97, 179 }, + { 4, 72, 135 }, { 1, 45, 85 }, { 1, 19, 38 }, + // Band 4 + { 124, 146, 240 }, { 66, 124, 224 }, { 17, 88, 175 }, + { 4, 58, 122 }, { 1, 36, 75 }, { 1, 18, 37 }, + // Band 5 + { 141, 79, 241 }, { 126, 70, 227 }, { 66, 58, 182 }, + { 30, 44, 136 }, { 12, 34, 96 }, { 2, 20, 47 }, + + // UV plane - Inter + // Band 0 + { 229, 99, 249 }, { 143, 111, 235 }, { 46, 109, 192 }, + // Band 1 + { 82, 158, 236 }, { 94, 146, 224 }, { 25, 117, 191 }, + { 9, 87, 149 }, { 3, 56, 99 }, { 1, 33, 57 }, + // Band 2 + { 83, 167, 237 }, { 68, 145, 222 }, { 10, 103, 177 }, + { 2, 72, 131 }, { 1, 41, 79 }, { 1, 20, 39 }, + // Band 3 + { 99, 167, 239 }, { 47, 141, 224 }, { 10, 104, 178 }, + { 2, 73, 133 }, { 1, 44, 85 }, { 1, 22, 47 }, + // Band 4 + { 127, 145, 243 }, { 71, 129, 228 }, { 17, 93, 177 }, + { 3, 61, 124 }, { 1, 41, 84 }, { 1, 21, 52 }, + // Band 5 + { 157, 78, 244 }, { 140, 72, 231 }, { 69, 58, 184 }, + { 31, 44, 137 }, { 14, 38, 105 }, { 8, 23, 61 } +}; + +vp9_prob default_coef_probs_8x8[COEFF_PROB_SIZE][COEFF_PROB_NUM] = { + // Y plane - Intra + // Band 0 + { 125, 34, 187 }, { 52, 41, 133 }, { 6, 31, 56 }, + // Band 1 + { 37, 109, 153 }, { 51, 102, 147 }, { 23, 87, 128 }, + { 8, 67, 101 }, { 1, 41, 63 }, { 1, 19, 29 }, + // Band 2 + { 31, 154, 185 }, { 17, 127, 175 }, { 6, 96, 145 }, + { 2, 73, 114 }, { 1, 51, 82 }, { 1, 28, 45 }, + // Band 3 + { 23, 163, 200 }, { 10, 131, 185 }, { 2, 93, 148 }, + { 1, 67, 111 }, { 1, 41, 69 }, { 1, 14, 24 }, + // Band 4 + { 29, 176, 217 }, { 12, 145, 201 }, { 3, 101, 156 }, + { 1, 69, 111 }, { 1, 39, 63 }, { 1, 14, 23 }, + // Band 5 + { 57, 192, 233 }, { 25, 154, 215 }, { 6, 109, 167 }, + { 3, 78, 118 }, { 1, 48, 69 }, { 1, 21, 29 }, + + // Y plane - Inter + // Band 0 + { 202, 105, 245 }, { 108, 106, 216 }, { 18, 90, 144 }, + // Band 1 + { 33, 172, 219 }, { 64, 149, 206 }, { 14, 117, 177 }, + { 5, 90, 141 }, { 2, 61, 95 }, { 1, 37, 57 }, + // Band 2 + { 33, 179, 220 }, { 11, 140, 198 }, { 1, 89, 148 }, + { 1, 60, 104 }, { 1, 33, 57 }, { 1, 12, 21 }, + // Band 3 + { 30, 181, 221 }, { 8, 141, 198 }, { 1, 87, 145 }, + { 1, 58, 100 }, { 1, 31, 55 }, { 1, 12, 20 }, + // Band 4 + { 32, 186, 224 }, { 7, 142, 198 }, { 1, 86, 143 }, + { 1, 58, 100 }, { 1, 31, 55 }, { 1, 12, 22 }, + // Band 5 + { 57, 192, 227 }, { 20, 143, 204 }, { 3, 96, 154 }, + { 1, 68, 112 }, { 1, 42, 69 }, { 1, 19, 32 }, + + // UV plane - Intra + // Band 0 + { 212, 35, 215 }, { 113, 47, 169 }, { 29, 48, 105 }, + // Band 1 + { 74, 129, 203 }, { 106, 120, 203 }, { 49, 107, 178 }, + { 19, 84, 144 }, { 4, 50, 84 }, { 1, 15, 25 }, + // Band 2 + { 71, 172, 217 }, { 44, 141, 209 }, { 15, 102, 173 }, + { 6, 76, 133 }, { 2, 51, 89 }, { 1, 24, 42 }, + // Band 3 + { 64, 185, 231 }, { 31, 148, 216 }, { 8, 103, 175 }, + { 3, 74, 131 }, { 1, 46, 81 }, { 1, 18, 30 }, + // Band 4 + { 65, 196, 235 }, { 25, 157, 221 }, { 5, 105, 174 }, + { 1, 67, 120 }, { 1, 38, 69 }, { 1, 15, 30 }, + // Band 5 + { 65, 204, 238 }, { 30, 156, 224 }, { 7, 107, 177 }, + { 2, 70, 124 }, { 1, 42, 73 }, { 1, 18, 34 }, + + // UV Plane - Inter + // Band 0 + { 225, 86, 251 }, { 144, 104, 235 }, { 42, 99, 181 }, + // Band 1 + { 85, 175, 239 }, { 112, 165, 229 }, { 29, 136, 200 }, + { 12, 103, 162 }, { 6, 77, 123 }, { 2, 53, 84 }, + // Band 2 + { 75, 183, 239 }, { 30, 155, 221 }, { 3, 106, 171 }, + { 1, 74, 128 }, { 1, 44, 76 }, { 1, 17, 28 }, + // Band 3 + { 73, 185, 240 }, { 27, 159, 222 }, { 2, 107, 172 }, + { 1, 75, 127 }, { 1, 42, 73 }, { 1, 17, 29 }, + // Band 4 + { 62, 190, 238 }, { 21, 159, 222 }, { 2, 107, 172 }, + { 1, 72, 122 }, { 1, 40, 71 }, { 1, 18, 32 }, + // Band 5 + { 61, 199, 240 }, { 27, 161, 226 }, { 4, 113, 180 }, + { 1, 76, 129 }, { 1, 46, 80 }, { 1, 23, 41 } +}; + +vp9_prob default_coef_probs_16x16[COEFF_PROB_SIZE][COEFF_PROB_NUM] = { + // Y plane - Intra + // Band 0 + { 7, 27, 153 }, { 5, 30, 95 }, { 1, 16, 30 }, + // Band 1 + { 50, 75, 127 }, { 57, 75, 124 }, { 27, 67, 108 }, + { 10, 54, 86 }, { 1, 33, 52 }, { 1, 12, 18 }, + // Band 2 + { 43, 125, 151 }, { 26, 108, 148 }, { 7, 83, 122 }, + { 2, 59, 89 }, { 1, 38, 60 }, { 1, 17, 27 }, + // Band 3 + { 23, 144, 163 }, { 13, 112, 154 }, { 2, 75, 117 }, + { 1, 50, 81 }, { 1, 31, 51 }, { 1, 14, 23 }, + // Band 4 + { 18, 162, 185 }, { 6, 123, 171 }, { 1, 78, 125 }, + { 1, 51, 86 }, { 1, 31, 54 }, { 1, 14, 23 }, + // Band 5 + { 15, 199, 227 }, { 3, 150, 204 }, { 1, 91, 146 }, + { 1, 55, 95 }, { 1, 30, 53 }, { 1, 11, 20 }, + + // Y plane - Inter + // Band 0 + { 19, 55, 240 }, { 19, 59, 196 }, { 3, 52, 105 }, + // Band 1 + { 41, 166, 207 }, { 104, 153, 199 }, { 31, 123, 181 }, + { 14, 101, 152 }, { 5, 72, 106 }, { 1, 36, 52 }, + // Band 2 + { 35, 176, 211 }, { 12, 131, 190 }, { 2, 88, 144 }, + { 1, 60, 101 }, { 1, 36, 60 }, { 1, 16, 28 }, + // Band 3 + { 28, 183, 213 }, { 8, 134, 191 }, { 1, 86, 142 }, + { 1, 56, 96 }, { 1, 30, 53 }, { 1, 12, 20 }, + // Band 4 + { 20, 190, 215 }, { 4, 135, 192 }, { 1, 84, 139 }, + { 1, 53, 91 }, { 1, 28, 49 }, { 1, 11, 20 }, + // Band 5 + { 13, 196, 216 }, { 2, 137, 192 }, { 1, 86, 143 }, + { 1, 57, 99 }, { 1, 32, 56 }, { 1, 13, 24 }, + + // UV plane - Intra + // Band 0 + { 211, 29, 217 }, { 96, 47, 156 }, { 22, 43, 87 }, + // Band 1 + { 78, 120, 193 }, { 111, 116, 186 }, { 46, 102, 164 }, + { 15, 80, 128 }, { 2, 49, 76 }, { 1, 18, 28 }, + // Band 2 + { 71, 161, 203 }, { 42, 132, 192 }, { 10, 98, 150 }, + { 3, 69, 109 }, { 1, 44, 70 }, { 1, 18, 29 }, + // Band 3 + { 57, 186, 211 }, { 30, 140, 196 }, { 4, 93, 146 }, + { 1, 62, 102 }, { 1, 38, 65 }, { 1, 16, 27 }, + // Band 4 + { 47, 199, 217 }, { 14, 145, 196 }, { 1, 88, 142 }, + { 1, 57, 98 }, { 1, 36, 62 }, { 1, 15, 26 }, + // Band 5 + { 26, 219, 229 }, { 5, 155, 207 }, { 1, 94, 151 }, + { 1, 60, 104 }, { 1, 36, 62 }, { 1, 16, 28 }, + + // UV plane - Inter + // Band 0 + { 233, 29, 248 }, { 146, 47, 220 }, { 43, 52, 140 }, + // Band 1 + { 100, 163, 232 }, { 179, 161, 222 }, { 63, 142, 204 }, + { 37, 113, 174 }, { 26, 89, 137 }, { 18, 68, 97 }, + // Band 2 + { 85, 181, 230 }, { 32, 146, 209 }, { 7, 100, 164 }, + { 3, 71, 121 }, { 1, 45, 77 }, { 1, 18, 30 }, + // Band 3 + { 65, 187, 230 }, { 20, 148, 207 }, { 2, 97, 159 }, + { 1, 68, 116 }, { 1, 40, 70 }, { 1, 14, 29 }, + // Band 4 + { 40, 194, 227 }, { 8, 147, 204 }, { 1, 94, 155 }, + { 1, 65, 112 }, { 1, 39, 66 }, { 1, 14, 26 }, + // Band 5 + { 16, 208, 228 }, { 3, 151, 207 }, { 1, 98, 160 }, + { 1, 67, 117 }, { 1, 41, 74 }, { 1, 17, 31 } +}; + +vp9_prob default_coef_probs_32x32[COEFF_PROB_SIZE][COEFF_PROB_NUM] = { + // Y plane - Intra + // Band 0 + { 17, 38, 140 }, { 7, 34, 80 }, { 1, 17, 29 }, + // Band 1 + { 37, 75, 128 }, { 41, 76, 128 }, { 26, 66, 116 }, + { 12, 52, 94 }, { 2, 32, 55 }, { 1, 10, 16 }, + // Band 2 + { 50, 127, 154 }, { 37, 109, 152 }, { 16, 82, 121 }, + { 5, 59, 85 }, { 1, 35, 54 }, { 1, 13, 20 }, + //Band 3 + { 40, 142, 167 }, { 17, 110, 157 }, { 2, 71, 112 }, + { 1, 44, 72 }, { 1, 27, 45 }, { 1, 11, 17 }, + // Band 4 + { 30, 175, 188 }, { 9, 124, 169 }, { 1, 74, 116 }, + { 1, 48, 78 }, { 1, 30, 49 }, { 1, 11, 18 }, + // Band 5 + { 10, 222, 223 }, { 2, 150, 194 }, { 1, 83, 128 }, + { 1, 48, 79 }, { 1, 27, 45 }, { 1, 11, 17 }, + + // Y plane - Inter + // Band 0 + { 36, 41, 235 }, { 29, 36, 193 }, { 10, 27, 111 }, + // Band 1 + { 85, 165, 222 }, { 177, 162, 215 }, { 110, 135, 195 }, + { 57, 113, 168 }, { 23, 83, 120 }, { 10, 49, 61 }, + // Band 2 + { 85, 190, 223 }, { 36, 139, 200 }, { 5, 90, 146 }, + { 1, 60, 103 }, { 1, 38, 65 }, { 1, 18, 30 }, + // Band 3 + { 72, 202, 223 }, { 23, 141, 199 }, { 2, 86, 140 }, + { 1, 56, 97 }, { 1, 36, 61 }, { 1, 16, 27 }, + // Band 4 + { 55, 218, 225 }, { 13, 145, 200 }, { 1, 86, 141 }, + { 1, 57, 99 }, { 1, 35, 61 }, { 1, 13, 22 }, + // Band 5 + { 15, 235, 212 }, { 1, 132, 184 }, { 1, 84, 139 }, + { 1, 57, 97 }, { 1, 34, 56 }, { 1, 14, 23 }, + + // UV plane - Intra + // Band 0 + { 181, 21, 201 }, { 61, 37, 123 }, { 10, 38, 71 }, + // Band 1 + { 47, 106, 172 }, { 95, 104, 173 }, { 42, 93, 159 }, + { 18, 77, 131 }, { 4, 50, 81 }, { 1, 17, 23 }, + // Band 2 + { 62, 147, 199 }, { 44, 130, 189 }, { 28, 102, 154 }, + { 18, 75, 115 }, { 2, 44, 65 }, { 1, 12, 19 }, + // Band 3 + { 55, 153, 210 }, { 24, 130, 194 }, { 3, 93, 146 }, + { 1, 61, 97 }, { 1, 31, 50 }, { 1, 10, 16 }, + // Band 4 + { 49, 186, 223 }, { 17, 148, 204 }, { 1, 96, 142 }, + { 1, 53, 83 }, { 1, 26, 44 }, { 1, 11, 17 }, + // Band 5 + { 13, 217, 212 }, { 2, 136, 180 }, { 1, 78, 124 }, + { 1, 50, 83 }, { 1, 29, 49 }, { 1, 14, 23 }, + + // UV plane - Inter + // Band 0 + { 197, 13, 247 }, { 82, 17, 222 }, { 25, 17, 162 }, + // Band 1 + { 126, 186, 247 }, { 234, 191, 243 }, { 176, 177, 234 }, + { 104, 158, 220 }, { 66, 128, 186 }, { 55, 90, 137 }, + // Band 2 + { 111, 197, 242 }, { 46, 158, 219 }, { 9, 104, 171 }, + { 2, 65, 125 }, { 1, 44, 80 }, { 1, 17, 91 }, + // Band 3 + { 104, 208, 245 }, { 39, 168, 224 }, { 3, 109, 162 }, + { 1, 79, 124 }, { 1, 50, 102 }, { 1, 43, 102 }, + // Band 4 + { 84, 220, 246 }, { 31, 177, 231 }, { 2, 115, 180 }, + { 1, 79, 134 }, { 1, 55, 77 }, { 1, 60, 79 }, + // Band 5 + { 43, 243, 240 }, { 8, 180, 217 }, { 1, 115, 166 }, + { 1, 84, 121 }, { 1, 51, 67 }, { 1, 16, 6 } + +}; + +#define FC_INTRA_OFFSET 0 +#define FC_INTRA_SIZE 1664 + +#define FC_INTER_OFFSET 1664 +#define FC_INTER_SIZE 384 + +#define FC_SKIP_OFFSET 1664 +#define FC_SKIP_SIZE 3 + +void intel_init_default_vp9_probs(FRAME_CONTEXT *frame_context) +{ + if (!frame_context) + return; + + frame_context->tx_probs = default_tx_probs; + //dummy 52 + memcpy(frame_context->coeff_probs4x4, default_coef_probs_4x4, + sizeof(default_coef_probs_4x4)); + memcpy(frame_context->coeff_probs8x8, default_coef_probs_8x8, + sizeof(default_coef_probs_8x8)); + memcpy(frame_context->coeff_probs16x16, default_coef_probs_16x16, + sizeof(default_coef_probs_16x16)); + memcpy(frame_context->coeff_probs32x32, default_coef_probs_32x32, + sizeof(default_coef_probs_16x16)); + //dummy 16 + memcpy(frame_context->skip_probs, default_skip_probs, + sizeof(default_skip_probs)); + memcpy(frame_context->inter_mode_probs, default_inter_mode_probs, + sizeof(default_inter_mode_probs)); + memcpy(frame_context->switchable_interp_prob, + default_switchable_interp_prob, + sizeof(default_switchable_interp_prob)); + memcpy(frame_context->intra_inter_prob, default_intra_inter_p, + sizeof(default_intra_inter_p)); + memcpy(frame_context->comp_inter_prob, default_comp_inter_p, + sizeof(default_comp_inter_p)); + memcpy(frame_context->single_ref_prob, default_single_ref_p, + sizeof(default_single_ref_p)); + memcpy(frame_context->comp_ref_prob, default_comp_ref_p, + sizeof(default_comp_ref_p)); + memcpy(frame_context->y_mode_prob, default_if_y_probs, + sizeof(default_if_y_probs)); + memcpy(frame_context->partition_prob, default_partition_probs, + sizeof(default_partition_probs)); + frame_context->nmvc = default_nmv_context; + //dummy 47 + memcpy(frame_context->uv_mode_prob, default_if_uv_probs, + sizeof(default_if_uv_probs)); + memcpy(frame_context->seg_tree_probs, default_seg_tree_probs, + sizeof(default_seg_tree_probs)); + memcpy(frame_context->seg_pred_probs, default_seg_pred_probs, + sizeof(default_seg_pred_probs)); + return; +} + + +void intel_vp9_copy_frame_context(FRAME_CONTEXT *dst, + FRAME_CONTEXT *src, + bool inter_flag) +{ + unsigned char *fc_dst, *fc_src; + + if (!dst || !src) + return; + + fc_dst = (unsigned char *)dst; + fc_src = (unsigned char *)src; + /* update the prob related with tx_mode/tx_coeff */ + memcpy(fc_dst + FC_INTRA_OFFSET, fc_src + FC_INTRA_OFFSET, FC_INTRA_SIZE); + + if (inter_flag) { + /* update the prob related with inter-frame */ + memcpy(fc_dst + FC_INTER_OFFSET, fc_src + FC_INTER_OFFSET, FC_INTER_SIZE); + } else { + memcpy(fc_dst + FC_SKIP_OFFSET, fc_src + FC_SKIP_OFFSET, FC_SKIP_SIZE); + } +} + +void intel_update_intra_frame_context(FRAME_CONTEXT *frame_context) +{ + if (!frame_context) + return; + + memcpy(frame_context->partition_prob, vp9_kf_partition_probs, + sizeof(vp9_kf_partition_probs)); + + memcpy(frame_context->uv_mode_prob, vp9_kf_uv_mode_prob, + sizeof(vp9_kf_uv_mode_prob)); + +} + +struct vp9_write_bit_buffer { + uint8_t *bit_buffer; + int bit_offset; +}; + +static +void vp9_wb_write_bit(struct vp9_write_bit_buffer *wb, int bit) +{ + const int off = wb->bit_offset; + const int p = off / 8; + const int q = 7 - off % 8; + if (q == 7) { + wb->bit_buffer[p] = bit << q; + } else { + wb->bit_buffer[p] &= ~(1 << q); + wb->bit_buffer[p] |= bit << q; + } + wb->bit_offset = off + 1; +} + +static +void vp9_wb_write_literal(struct vp9_write_bit_buffer *wb, int data, int bits) +{ + int bit; + for (bit = bits - 1; bit >= 0; bit--) + vp9_wb_write_bit(wb, (data >> bit) & 1); +} + +static +void write_bitdepth_colorspace_sampling(int codec_profile, + struct vp9_write_bit_buffer *wb) +{ + int profile = VAProfileVP9Profile0; + profile = profile + 0; + + if (codec_profile >= (VAProfileVP9Profile0 + 2)) { + /* the bit-depth will be added for VP9Profile2/3 */ + /* this will be added later */ + } + + /* Add the default color-space */ + vp9_wb_write_literal(wb, 0, 3); + vp9_wb_write_bit(wb, 0); // 0: [16, 235] (i.e. xvYCC), 1: [0, 255] + + /* the sampling_x/y will be added for VP9Profile1/2/3 later */ +} + +#define MAX_TILE_WIDTH_B64 64 +#define MIN_TILE_WIDTH_B64 4 + +static int get_min_log2_tile_cols(const int sb_cols) { + int min_log2 = 0; + + while ((MAX_TILE_WIDTH_B64 << min_log2) < sb_cols) + ++min_log2; + + return min_log2; +} + +static int get_max_log2_tile_cols(const int sb_cols) { + int max_log2 = 1; + + while ((sb_cols >> max_log2) >= MIN_TILE_WIDTH_B64) + ++max_log2; + + return max_log2 - 1; +} + + +bool intel_write_uncompressed_header(struct encode_state *encode_state, + int codec_profile, + char *header_data, + int *header_length, + vp9_header_bitoffset *header_bitoffset) +{ +#define VP9_SYNC_CODE_0 0x49 +#define VP9_SYNC_CODE_1 0x83 +#define VP9_SYNC_CODE_2 0x42 + +#define VP9_FRAME_MARKER 0x2 + +#define REFS_PER_FRAME 3 + +#define REF_FRAMES_LOG2 3 +#define REF_FRAMES (1 << REF_FRAMES_LOG2) + +#define VP9_KEY_FRAME 0 + + VAEncPictureParameterBufferVP9 *pic_param; + VAEncMiscParameterTypeVP9PerSegmantParam *seg_param = NULL; + struct vp9_write_bit_buffer *wb, vp9_wb; + + if (!encode_state->pic_param_ext || !encode_state->pic_param_ext->buffer) + return false; + + if (!header_data || !header_bitoffset || !header_length) + return false; + + memset(header_bitoffset, 0, sizeof(vp9_header_bitoffset)); + + pic_param = (VAEncPictureParameterBufferVP9 *)encode_state->pic_param_ext->buffer; + + if (encode_state->q_matrix) + seg_param = (VAEncMiscParameterTypeVP9PerSegmantParam *) encode_state->q_matrix->buffer; + + vp9_wb.bit_buffer = (uint8_t *)header_data; + vp9_wb.bit_offset = 0; + wb = &vp9_wb; + vp9_wb_write_literal(wb, VP9_FRAME_MARKER, 2); + + if (codec_profile == VAProfileVP9Profile0) { + vp9_wb_write_literal(wb, 0, 2); + } else { + /* Other VP9Profile1/2/3 will be added later */ + } + + vp9_wb_write_bit(wb, 0); // show_existing_frame + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.frame_type); + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.show_frame); + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.error_resilient_mode); + + if (pic_param->pic_flags.bits.frame_type == VP9_KEY_FRAME) { + vp9_wb_write_literal(wb, VP9_SYNC_CODE_0, 8); + vp9_wb_write_literal(wb, VP9_SYNC_CODE_1, 8); + vp9_wb_write_literal(wb, VP9_SYNC_CODE_2, 8); + + write_bitdepth_colorspace_sampling(codec_profile, wb); + + /* write the encoded frame size */ + vp9_wb_write_literal(wb, pic_param->frame_width_dst - 1, 16); + vp9_wb_write_literal(wb, pic_param->frame_height_dst - 1, 16); + /* write display size */ + if ((pic_param->frame_width_dst != pic_param->frame_width_src) || + (pic_param->frame_height_dst != pic_param->frame_height_src)) { + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, pic_param->frame_width_src - 1, 16); + vp9_wb_write_literal(wb, pic_param->frame_height_src - 1, 16); + } else + vp9_wb_write_bit(wb, 0); + } else { + /* for the non-Key frame */ + if (!pic_param->pic_flags.bits.show_frame) + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.intra_only); + + if (!pic_param->pic_flags.bits.error_resilient_mode) + vp9_wb_write_literal(wb, pic_param->pic_flags.bits.reset_frame_context, 2); + + if (pic_param->pic_flags.bits.intra_only) { + vp9_wb_write_literal(wb, VP9_SYNC_CODE_0, 8); + vp9_wb_write_literal(wb, VP9_SYNC_CODE_1, 8); + vp9_wb_write_literal(wb, VP9_SYNC_CODE_2, 8); + + /* Add the bit_depth for VP9Profile1/2/3 */ + /* write the refreshed_frame_flags */ + vp9_wb_write_literal(wb, pic_param->refresh_frame_flags, REF_FRAMES); + /* write the encoded frame size */ + vp9_wb_write_literal(wb, pic_param->frame_width_dst - 1, 16); + vp9_wb_write_literal(wb, pic_param->frame_height_dst - 1, 16); + /* write display size */ + if ((pic_param->frame_width_dst != pic_param->frame_width_src) || + (pic_param->frame_height_dst != pic_param->frame_height_src)) { + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, pic_param->frame_width_src - 1, 16); + vp9_wb_write_literal(wb, pic_param->frame_height_src - 1, 16); + } else + vp9_wb_write_bit(wb, 0); + + } else { + /* The refresh_frame_map is for the next frame so that it can select Last/Godlen/Alt ref_index */ + /* + if ((pic_param->ref_flags.bits.ref_frame_ctrl_l0) & (1 << 0)) + refresh_flags = 1 << pic_param->ref_flags.bits.ref_last_idx; + if ((pic_param->ref_flags.bits.ref_frame_ctrl_l0) & (1 << 0)) + refresh_flags = 1 << pic_param->ref_flags.bits.ref_last_idx; + if ((pic_param->ref_flags.bits.ref_frame_ctrl_l0) & (1 << 0)) + refresh_flags = 1 << pic_param->ref_flags.bits.ref_last_idx; + */ + vp9_wb_write_literal(wb, pic_param->refresh_frame_flags, REF_FRAMES); + + vp9_wb_write_literal(wb, pic_param->ref_flags.bits.ref_last_idx, REF_FRAMES_LOG2); + vp9_wb_write_bit(wb, pic_param->ref_flags.bits.ref_last_sign_bias); + vp9_wb_write_literal(wb, pic_param->ref_flags.bits.ref_gf_idx, REF_FRAMES_LOG2); + vp9_wb_write_bit(wb, pic_param->ref_flags.bits.ref_gf_sign_bias); + vp9_wb_write_literal(wb, pic_param->ref_flags.bits.ref_arf_idx, REF_FRAMES_LOG2); + vp9_wb_write_bit(wb, pic_param->ref_flags.bits.ref_arf_sign_bias); + + /* write three bits with zero so that it can parse width/height directly */ + vp9_wb_write_literal(wb, 0, 3); + vp9_wb_write_literal(wb, pic_param->frame_width_dst - 1, 16); + vp9_wb_write_literal(wb, pic_param->frame_height_dst - 1, 16); + + /* write display size */ + if ((pic_param->frame_width_dst != pic_param->frame_width_src) || + (pic_param->frame_height_dst != pic_param->frame_height_src)) { + + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, pic_param->frame_width_src - 1, 16); + vp9_wb_write_literal(wb, pic_param->frame_height_src - 1, 16); + } else + vp9_wb_write_bit(wb, 0); + + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.allow_high_precision_mv); + +#define SWITCHABLE_FILTER 4 +#define FILTER_MASK 3 + + if (pic_param->pic_flags.bits.mcomp_filter_type == SWITCHABLE_FILTER) + vp9_wb_write_bit(wb, 1); + else { + const int filter_to_literal[4] = { 1, 0, 2, 3 }; + uint8_t filter_flag = pic_param->pic_flags.bits.mcomp_filter_type; + filter_flag = filter_flag & FILTER_MASK; + vp9_wb_write_bit(wb, 0); + vp9_wb_write_literal(wb, filter_to_literal[filter_flag], 2); + } + } + } + + /* write refresh_frame_context/paralle frame_decoding */ + if (!pic_param->pic_flags.bits.error_resilient_mode) { + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.refresh_frame_context); + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.frame_parallel_decoding_mode); + } + + vp9_wb_write_literal(wb, pic_param->pic_flags.bits.frame_context_idx, 2); + + /* write loop filter */ + header_bitoffset->bit_offset_lf_level = wb->bit_offset; + vp9_wb_write_literal(wb, pic_param->filter_level, 6); + vp9_wb_write_literal(wb, pic_param->sharpness_level, 3); + + { + int i, mode_flag; + + vp9_wb_write_bit(wb, 1); + vp9_wb_write_bit(wb, 1); + header_bitoffset->bit_offset_ref_lf_delta = wb->bit_offset; + for (i = 0; i < 4; i++) { + /* + * This check is skipped to prepare the bit_offset_lf_ref + if (pic_param->ref_lf_delta[i] == 0) { + vp9_wb_write_bit(wb, 0); + continue; + } + */ + + vp9_wb_write_bit(wb, 1); + mode_flag = pic_param->ref_lf_delta[i]; + if (mode_flag >=0) { + vp9_wb_write_literal(wb, mode_flag & (0x3F), 6); + vp9_wb_write_bit(wb, 0); + } else { + mode_flag = -mode_flag; + vp9_wb_write_literal(wb, mode_flag & (0x3F), 6); + vp9_wb_write_bit(wb, 1); + } + } + + header_bitoffset->bit_offset_mode_lf_delta = wb->bit_offset; + for (i = 0; i < 2; i++) { + /* + * This check is skipped to prepare the bit_offset_lf_ref + if (pic_param->mode_lf_delta[i] == 0) { + vp9_wb_write_bit(wb, 0); + continue; + } + */ + vp9_wb_write_bit(wb, 1); + mode_flag = pic_param->mode_lf_delta[i]; + if (mode_flag >=0) { + vp9_wb_write_literal(wb, mode_flag & (0x3F), 6); + vp9_wb_write_bit(wb, 0); + } else { + mode_flag = -mode_flag; + vp9_wb_write_literal(wb, mode_flag & (0x3F), 6); + vp9_wb_write_bit(wb, 1); + } + } + } + + /* write basic quantizer */ + header_bitoffset->bit_offset_qindex = wb->bit_offset; + vp9_wb_write_literal(wb, pic_param->luma_ac_qindex, 8); + if (pic_param->luma_dc_qindex_delta) { + int delta_q = pic_param->luma_dc_qindex_delta; + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, abs(delta_q), 4); + vp9_wb_write_bit(wb, delta_q < 0); + } else + vp9_wb_write_bit(wb, 0); + + if (pic_param->chroma_dc_qindex_delta) { + int delta_q = pic_param->chroma_dc_qindex_delta; + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, abs(delta_q), 4); + vp9_wb_write_bit(wb, delta_q < 0); + } else + vp9_wb_write_bit(wb, 0); + + if (pic_param->chroma_ac_qindex_delta) { + int delta_q = pic_param->chroma_ac_qindex_delta; + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, abs(delta_q), 4); + vp9_wb_write_bit(wb, delta_q < 0); + } else + vp9_wb_write_bit(wb, 0); + + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.segmentation_enabled); + if (pic_param->pic_flags.bits.segmentation_enabled) { + int i; + +#define VP9_MAX_PROB 255 + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.segmentation_update_map); + if (pic_param->pic_flags.bits.segmentation_update_map) { + + header_bitoffset->bit_offset_segmentation = wb->bit_offset; + /* write the seg_tree_probs */ + /* segment_tree_probs/segment_pred_probs are not passed. + * So the hard-coded prob is writen + */ + for (i = 0; i < 7; i++) { + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, VP9_MAX_PROB, 8); + } + + vp9_wb_write_bit(wb, pic_param->pic_flags.bits.segmentation_temporal_update); + if (pic_param->pic_flags.bits.segmentation_temporal_update) { + for (i = 0; i < 3; i++) { + vp9_wb_write_bit(wb, 1); + vp9_wb_write_literal(wb, VP9_MAX_PROB, 8); + } + } + } + + /* write the segment_data info */ + if (seg_param == NULL) { + vp9_wb_write_bit(wb, 0); + } else { + VAEncSegParamVP9 *seg_data; + int seg_delta; + + /* update_data */ + vp9_wb_write_bit(wb, 1); + /* abs_delta should be zero */ + vp9_wb_write_bit(wb, 0); + for (i = 0; i < 8; i++) { + seg_data = &seg_param->seg_data[i]; + + /* The segment qindex delta */ + /* This check is skipped */ + /* if (seg_data->segment_qindex_delta != 0) */ + if (1) { + vp9_wb_write_bit(wb, 1); + seg_delta = seg_data->segment_qindex_delta; + vp9_wb_write_literal(wb, abs(seg_delta), 8); + vp9_wb_write_bit(wb, seg_delta < 0); + } else + vp9_wb_write_bit(wb, 0); + + /* The segment lf delta */ + /* if (seg_data->segment_lf_level_delta != 0) */ + if (1) { + vp9_wb_write_bit(wb, 1); + seg_delta = seg_data->segment_lf_level_delta; + vp9_wb_write_literal(wb, abs(seg_delta), 6); + vp9_wb_write_bit(wb, seg_delta < 0); + } else + vp9_wb_write_bit(wb, 0); + + /* segment reference flag */ + vp9_wb_write_bit(wb, seg_data->seg_flags.bits.segment_reference_enabled); + if (seg_data->seg_flags.bits.segment_reference_enabled) + { + vp9_wb_write_literal(wb, seg_data->seg_flags.bits.segment_reference, 2); + } + + /* segment skip flag */ + vp9_wb_write_bit(wb, seg_data->seg_flags.bits.segment_reference_skipped); + } + } + } + + /* write tile info */ + { + int sb_cols = (pic_param->frame_width_dst + 63) / 64; + int min_log2_tile_cols, max_log2_tile_cols; + int col_data; + + /* write tile column info */ + min_log2_tile_cols = get_min_log2_tile_cols(sb_cols); + max_log2_tile_cols = get_max_log2_tile_cols(sb_cols); + + col_data = pic_param->log2_tile_columns - min_log2_tile_cols; + while(col_data--) { + vp9_wb_write_bit(wb, 1); + } + if (pic_param->log2_tile_columns < max_log2_tile_cols) + vp9_wb_write_bit(wb, 0); + + /* write tile row info */ + vp9_wb_write_bit(wb, pic_param->log2_tile_rows); + if (pic_param->log2_tile_rows) + vp9_wb_write_bit(wb, (pic_param->log2_tile_rows != 1)); + } + + /* get the bit_offset of the first partition size */ + header_bitoffset->bit_offset_first_partition_size = wb->bit_offset; + + /* reserve the space for writing the first partitions ize */ + vp9_wb_write_literal(wb, 0, 16); + + *header_length = (wb->bit_offset + 7) / 8; + + return true; +} + +const unsigned short vp9_quant_dc[256] = { + 4, 8, 8, 9, 10, 11, 12, 12, + 13, 14, 15, 16, 17, 18, 19, 19, + 20, 21, 22, 23, 24, 25, 26, 26, + 27, 28, 29, 30, 31, 32, 32, 33, + 34, 35, 36, 37, 38, 38, 39, 40, + 41, 42, 43, 43, 44, 45, 46, 47, + 48, 48, 49, 50, 51, 52, 53, 53, + 54, 55, 56, 57, 57, 58, 59, 60, + 61, 62, 62, 63, 64, 65, 66, 66, + 67, 68, 69, 70, 70, 71, 72, 73, + 74, 74, 75, 76, 77, 78, 78, 79, + 80, 81, 81, 82, 83, 84, 85, 85, + 87, 88, 90, 92, 93, 95, 96, 98, + 99, 101, 102, 104, 105, 107, 108, 110, + 111, 113, 114, 116, 117, 118, 120, 121, + 123, 125, 127, 129, 131, 134, 136, 138, + 140, 142, 144, 146, 148, 150, 152, 154, + 156, 158, 161, 164, 166, 169, 172, 174, + 177, 180, 182, 185, 187, 190, 192, 195, + 199, 202, 205, 208, 211, 214, 217, 220, + 223, 226, 230, 233, 237, 240, 243, 247, + 250, 253, 257, 261, 265, 269, 272, 276, + 280, 284, 288, 292, 296, 300, 304, 309, + 313, 317, 322, 326, 330, 335, 340, 344, + 349, 354, 359, 364, 369, 374, 379, 384, + 389, 395, 400, 406, 411, 417, 423, 429, + 435, 441, 447, 454, 461, 467, 475, 482, + 489, 497, 505, 513, 522, 530, 539, 549, + 559, 569, 579, 590, 602, 614, 626, 640, + 654, 668, 684, 700, 717, 736, 755, 775, + 796, 819, 843, 869, 896, 925, 955, 988, + 1022, 1058, 1098, 1139, 1184, 1232, 1282, 1336, +}; + +const unsigned short vp9_quant_ac[256] = { + 4, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, + 23, 24, 25, 26, 27, 28, 29, 30, + 31, 32, 33, 34, 35, 36, 37, 38, + 39, 40, 41, 42, 43, 44, 45, 46, + 47, 48, 49, 50, 51, 52, 53, 54, + 55, 56, 57, 58, 59, 60, 61, 62, + 63, 64, 65, 66, 67, 68, 69, 70, + 71, 72, 73, 74, 75, 76, 77, 78, + 79, 80, 81, 82, 83, 84, 85, 86, + 87, 88, 89, 90, 91, 92, 93, 94, + 95, 96, 97, 98, 99, 100, 101, 102, + 104, 106, 108, 110, 112, 114, 116, 118, + 120, 122, 124, 126, 128, 130, 132, 134, + 136, 138, 140, 142, 144, 146, 148, 150, + 152, 155, 158, 161, 164, 167, 170, 173, + 176, 179, 182, 185, 188, 191, 194, 197, + 200, 203, 207, 211, 215, 219, 223, 227, + 231, 235, 239, 243, 247, 251, 255, 260, + 265, 270, 275, 280, 285, 290, 295, 300, + 305, 311, 317, 323, 329, 335, 341, 347, + 353, 359, 366, 373, 380, 387, 394, 401, + 408, 416, 424, 432, 440, 448, 456, 465, + 474, 483, 492, 501, 510, 520, 530, 540, + 550, 560, 571, 582, 593, 604, 615, 627, + 639, 651, 663, 676, 689, 702, 715, 729, + 743, 757, 771, 786, 801, 816, 832, 848, + 864, 881, 898, 915, 933, 951, 969, 988, + 1007, 1026, 1046, 1066, 1087, 1108, 1129, 1151, + 1173, 1196, 1219, 1243, 1267, 1292, 1317, 1343, + 1369, 1396, 1423, 1451, 1479, 1508, 1537, 1567, + 1597, 1628, 1660, 1692, 1725, 1759, 1793, 1828, +}; diff -Nru intel-vaapi-driver-1.0.15/src/vp9_probs.h intel-vaapi-driver-1.7.1/src/vp9_probs.h --- intel-vaapi-driver-1.0.15/src/vp9_probs.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/vp9_probs.h 2016-06-16 00:57:46.000000000 +0000 @@ -0,0 +1,249 @@ +/* + * Copyright © 2015 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +/* + * This file defines some vp9 probability tables, and + * they are ported from libvpx (https://github.com/webmproject/libvpx/). + * The original copyright and licence statement as below. + */ + +/* + * Copyright (c) 2010 The WebM project authors. All Rights Reserved. + * + * Use of this source code is governed by a BSD-style license + * that can be found in the LICENSE file in the root of the source + * tree. An additional intellectual property rights grant can be found + * in the file PATENTS. All contributing project authors may + * be found in the AUTHORS file in the root of the source tree. + */ + +#ifndef VP9_PROBS_H +#define VP9_PROBS_H + +#include + +#define TX_SIZE_CONTEXTS 2 +#define TX_SIZES 4 +#define PLANE_TYPES 2 +#define SKIP_CONTEXTS 3 +#define INTER_MODE_CONTEXTS 7 +#define INTER_MODES 4 +#define SWITCHABLE_FILTERS 3 +#define SWITCHABLE_FILTER_CONTEXTS (SWITCHABLE_FILTERS + 1) +#define MAX_SEGMENTS 8 +#define PREDICTION_PROBS 3 +#define SEG_TREE_PROBS (MAX_SEGMENTS-1) +#define MV_JOINTS 4 +#define INTRA_INTER_CONTEXTS 4 +#define COMP_INTER_CONTEXTS 5 +#define REF_CONTEXTS 5 +#define BLOCK_SIZE_GROUPS 4 +#define INTRA_MODES 10 +#define PARTITION_PLOFFSET 4 // number of probability models per block size +#define PARTITION_CONTEXTS (4 * PARTITION_PLOFFSET) +#define PARTITION_TYPES 4 +#define REF_TYPES 2 // intra=0, inter=1 +#define COEF_BANDS 6 +#define COEFF_CONTEXTS 6 +#define UNCONSTRAINED_NODES 3 +#define MV_CLASSES 11 +#define CLASS0_BITS 1 /* bits at integer precision for class 0 */ +#define CLASS0_SIZE (1 << CLASS0_BITS) +#define MV_OFFSET_BITS (MV_CLASSES + CLASS0_BITS - 2) +#define MV_MAX_BITS (MV_CLASSES + CLASS0_BITS + 2) +#define MV_FP_SIZE 4 +#define FRAME_CONTEXTS_LOG2 2 +#define FRAME_CONTEXTS (1 << FRAME_CONTEXTS_LOG2) + +#define COEFF_PROB_SIZE 132 +#define COEFF_PROB_NUM 3 + +#define TX_PROBS_IDX 0 +#define COEFF_PROBS_IDX 64 +#define INTRA_PROBS_IDX 1603 +#define SEG_PROBS_IDX 2010 + +typedef uint8_t vp9_prob; + +#define vpx_memset memset +#define vpx_memcpy memcpy + +#define vp9_zero(dest) memset(&dest, 0, sizeof(dest)) + +#define vp9_copy(dest, src) { \ + assert(sizeof(dest) == sizeof(src)); \ + vpx_memcpy(dest, src, sizeof(src)); \ +} + +struct tx_probs { + vp9_prob p8x8[TX_SIZE_CONTEXTS][TX_SIZES - 3]; + vp9_prob p16x16[TX_SIZE_CONTEXTS][TX_SIZES - 2]; + vp9_prob p32x32[TX_SIZE_CONTEXTS][TX_SIZES - 1]; +}; + +struct tx_counts { + unsigned int p32x32[TX_SIZE_CONTEXTS][TX_SIZES]; + unsigned int p16x16[TX_SIZE_CONTEXTS][TX_SIZES - 1]; + unsigned int p8x8[TX_SIZE_CONTEXTS][TX_SIZES - 2]; + unsigned int tx_totals[TX_SIZES]; +}; + +typedef struct { + vp9_prob sign; + vp9_prob classes[MV_CLASSES - 1]; + vp9_prob class0[CLASS0_SIZE - 1]; + vp9_prob bits[MV_OFFSET_BITS]; +} nmv_component; + +//Modified the nmv_context from libvpx to suit our HW needs +typedef struct { + vp9_prob joints[MV_JOINTS-1]; + nmv_component comps[2]; + vp9_prob class0_fp0[CLASS0_SIZE][MV_FP_SIZE - 1]; + vp9_prob fp0[MV_FP_SIZE - 1]; + vp9_prob class0_fp1[CLASS0_SIZE][MV_FP_SIZE - 1]; + vp9_prob fp1[MV_FP_SIZE - 1]; + vp9_prob class0_hp[2]; + vp9_prob hp[2]; +} nmv_context; + +//Modified the FRAME_CONTEXT from libvpx to suit our HW needs +typedef struct frame_contexts { + struct tx_probs tx_probs; + vp9_prob dummy1[52]; + vp9_prob coeff_probs4x4[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + vp9_prob coeff_probs8x8[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + vp9_prob coeff_probs16x16[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + vp9_prob coeff_probs32x32[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + vp9_prob dummy2[16]; + vp9_prob skip_probs[SKIP_CONTEXTS]; + vp9_prob inter_mode_probs[INTER_MODE_CONTEXTS][INTER_MODES - 1]; + vp9_prob switchable_interp_prob[SWITCHABLE_FILTER_CONTEXTS] + [SWITCHABLE_FILTERS - 1]; + vp9_prob intra_inter_prob[INTRA_INTER_CONTEXTS]; + vp9_prob comp_inter_prob[COMP_INTER_CONTEXTS]; + vp9_prob single_ref_prob[REF_CONTEXTS][2]; + vp9_prob comp_ref_prob[REF_CONTEXTS]; + vp9_prob y_mode_prob[BLOCK_SIZE_GROUPS][INTRA_MODES - 1]; + vp9_prob partition_prob[PARTITION_CONTEXTS][PARTITION_TYPES - 1]; + nmv_context nmvc; + vp9_prob dummy3[47]; + vp9_prob uv_mode_prob[INTRA_MODES][INTRA_MODES - 1]; + vp9_prob seg_tree_probs[SEG_TREE_PROBS]; + vp9_prob seg_pred_probs[PREDICTION_PROBS]; + vp9_prob dummy4[28]; + int initialized; +} FRAME_CONTEXT; + + +extern struct tx_probs default_tx_probs; + +extern vp9_prob default_skip_probs[SKIP_CONTEXTS]; + +extern vp9_prob default_inter_mode_probs[INTER_MODE_CONTEXTS] + [INTER_MODES - 1]; + +extern vp9_prob default_switchable_interp_prob[SWITCHABLE_FILTER_CONTEXTS] + [SWITCHABLE_FILTERS - 1]; + +extern vp9_prob default_intra_inter_p[INTRA_INTER_CONTEXTS]; + +extern vp9_prob default_comp_inter_p[COMP_INTER_CONTEXTS]; + +extern vp9_prob default_single_ref_p[REF_CONTEXTS][2]; + +extern vp9_prob default_comp_ref_p[REF_CONTEXTS]; + +extern vp9_prob vp9_kf_uv_mode_prob[INTRA_MODES][INTRA_MODES - 1]; + +extern vp9_prob default_if_y_probs[BLOCK_SIZE_GROUPS][INTRA_MODES - 1]; + +extern vp9_prob default_if_uv_probs[INTRA_MODES][INTRA_MODES - 1]; + +extern vp9_prob default_seg_tree_probs[SEG_TREE_PROBS]; + +extern vp9_prob default_seg_pred_probs[PREDICTION_PROBS]; + +extern vp9_prob vp9_kf_partition_probs[PARTITION_CONTEXTS] + [PARTITION_TYPES - 1]; + +extern vp9_prob default_partition_probs[PARTITION_CONTEXTS] + [PARTITION_TYPES - 1]; + +extern nmv_context default_nmv_context; + +extern vp9_prob default_coef_probs_4x4[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + +extern vp9_prob default_coef_probs_8x8[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + +extern vp9_prob default_coef_probs_16x16[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + +extern vp9_prob default_coef_probs_32x32[COEFF_PROB_SIZE][COEFF_PROB_NUM]; + +extern void intel_init_default_vp9_probs(FRAME_CONTEXT *frame_context); + +extern void intel_vp9_copy_frame_context(FRAME_CONTEXT *dst, + FRAME_CONTEXT *src, + bool inter_flag); + +extern void intel_update_intra_frame_context(FRAME_CONTEXT *frame_context); + + +typedef struct _vp9_header_bitoffset_ { + unsigned int bit_offset_ref_lf_delta; + unsigned int bit_offset_mode_lf_delta; + unsigned int bit_offset_lf_level; + unsigned int bit_offset_qindex; + unsigned int bit_offset_first_partition_size; + unsigned int bit_offset_segmentation; + unsigned int bit_size_segmentation; +} vp9_header_bitoffset; + +struct encode_state; +extern bool intel_write_uncompressed_header(struct encode_state *encode_state, + int codec_profile, + char *header_data, + int *header_length, + vp9_header_bitoffset *header_bitoffset); + +typedef enum { + ONLY_4X4 = 0, // only 4x4 transform used + ALLOW_8X8 = 1, // allow block transform size up to 8x8 + ALLOW_16X16 = 2, // allow block transform size up to 16x16 + ALLOW_32X32 = 3, // allow block transform size up to 32x32 + TX_MODE_SELECT = 4, // transform specified for each block + TX_MODES = 5, +} TX_MODE; + +typedef enum { + SINGLE_REFERENCE = 0, + COMPOUND_REFERENCE = 1, + REFERENCE_MODE_SELECT = 2, + REFERENCE_MODES = 3, +} REFERENCE_MODE; + +extern const unsigned short vp9_quant_dc[256]; +extern const unsigned short vp9_quant_ac[256]; + +#endif /*VP9_PROBS_H */ diff -Nru intel-vaapi-driver-1.0.15/src/wayland-drm-client-protocol.h intel-vaapi-driver-1.7.1/src/wayland-drm-client-protocol.h --- intel-vaapi-driver-1.0.15/src/wayland-drm-client-protocol.h 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/wayland-drm-client-protocol.h 2016-06-21 01:51:11.000000000 +0000 @@ -0,0 +1,213 @@ +/* + * Copyright © 2008-2011 Kristian Høgsberg + * Copyright © 2010-2011 Intel Corporation + * + * Permission to use, copy, modify, distribute, and sell this + * software and its documentation for any purpose is hereby granted + * without fee, provided that\n the above copyright notice appear in + * all copies and that both that copyright notice and this permission + * notice appear in supporting documentation, and that the name of + * the copyright holders not be used in advertising or publicity + * pertaining to distribution of the software without specific, + * written prior permission. The copyright holders make no + * representations about the suitability of this software for any + * purpose. It is provided "as is" without express or implied + * warranty. + * + * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS + * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND + * FITNESS, IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY + * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN + * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, + * ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF + * THIS SOFTWARE. + */ + +#ifndef DRM_CLIENT_PROTOCOL_H +#define DRM_CLIENT_PROTOCOL_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include "wayland-client.h" + +struct wl_client; +struct wl_resource; + +struct wl_drm; + +extern const struct wl_interface wl_drm_interface; + +#ifndef WL_DRM_ERROR_ENUM +#define WL_DRM_ERROR_ENUM +enum wl_drm_error { + WL_DRM_ERROR_AUTHENTICATE_FAIL = 0, + WL_DRM_ERROR_INVALID_FORMAT = 1, + WL_DRM_ERROR_INVALID_NAME = 2, +}; +#endif /* WL_DRM_ERROR_ENUM */ + +#ifndef WL_DRM_FORMAT_ENUM +#define WL_DRM_FORMAT_ENUM +enum wl_drm_format { + WL_DRM_FORMAT_C8 = 0x20203843, + WL_DRM_FORMAT_RGB332 = 0x38424752, + WL_DRM_FORMAT_BGR233 = 0x38524742, + WL_DRM_FORMAT_XRGB4444 = 0x32315258, + WL_DRM_FORMAT_XBGR4444 = 0x32314258, + WL_DRM_FORMAT_RGBX4444 = 0x32315852, + WL_DRM_FORMAT_BGRX4444 = 0x32315842, + WL_DRM_FORMAT_ARGB4444 = 0x32315241, + WL_DRM_FORMAT_ABGR4444 = 0x32314241, + WL_DRM_FORMAT_RGBA4444 = 0x32314152, + WL_DRM_FORMAT_BGRA4444 = 0x32314142, + WL_DRM_FORMAT_XRGB1555 = 0x35315258, + WL_DRM_FORMAT_XBGR1555 = 0x35314258, + WL_DRM_FORMAT_RGBX5551 = 0x35315852, + WL_DRM_FORMAT_BGRX5551 = 0x35315842, + WL_DRM_FORMAT_ARGB1555 = 0x35315241, + WL_DRM_FORMAT_ABGR1555 = 0x35314241, + WL_DRM_FORMAT_RGBA5551 = 0x35314152, + WL_DRM_FORMAT_BGRA5551 = 0x35314142, + WL_DRM_FORMAT_RGB565 = 0x36314752, + WL_DRM_FORMAT_BGR565 = 0x36314742, + WL_DRM_FORMAT_RGB888 = 0x34324752, + WL_DRM_FORMAT_BGR888 = 0x34324742, + WL_DRM_FORMAT_XRGB8888 = 0x34325258, + WL_DRM_FORMAT_XBGR8888 = 0x34324258, + WL_DRM_FORMAT_RGBX8888 = 0x34325852, + WL_DRM_FORMAT_BGRX8888 = 0x34325842, + WL_DRM_FORMAT_ARGB8888 = 0x34325241, + WL_DRM_FORMAT_ABGR8888 = 0x34324241, + WL_DRM_FORMAT_RGBA8888 = 0x34324152, + WL_DRM_FORMAT_BGRA8888 = 0x34324142, + WL_DRM_FORMAT_XRGB2101010 = 0x30335258, + WL_DRM_FORMAT_XBGR2101010 = 0x30334258, + WL_DRM_FORMAT_RGBX1010102 = 0x30335852, + WL_DRM_FORMAT_BGRX1010102 = 0x30335842, + WL_DRM_FORMAT_ARGB2101010 = 0x30335241, + WL_DRM_FORMAT_ABGR2101010 = 0x30334241, + WL_DRM_FORMAT_RGBA1010102 = 0x30334152, + WL_DRM_FORMAT_BGRA1010102 = 0x30334142, + WL_DRM_FORMAT_YUYV = 0x56595559, + WL_DRM_FORMAT_YVYU = 0x55595659, + WL_DRM_FORMAT_UYVY = 0x59565955, + WL_DRM_FORMAT_VYUY = 0x59555956, + WL_DRM_FORMAT_AYUV = 0x56555941, + WL_DRM_FORMAT_NV12 = 0x3231564e, + WL_DRM_FORMAT_NV21 = 0x3132564e, + WL_DRM_FORMAT_NV16 = 0x3631564e, + WL_DRM_FORMAT_NV61 = 0x3136564e, + WL_DRM_FORMAT_YUV410 = 0x39565559, + WL_DRM_FORMAT_YVU410 = 0x39555659, + WL_DRM_FORMAT_YUV411 = 0x31315559, + WL_DRM_FORMAT_YVU411 = 0x31315659, + WL_DRM_FORMAT_YUV420 = 0x32315559, + WL_DRM_FORMAT_YVU420 = 0x32315659, + WL_DRM_FORMAT_YUV422 = 0x36315559, + WL_DRM_FORMAT_YVU422 = 0x36315659, + WL_DRM_FORMAT_YUV444 = 0x34325559, + WL_DRM_FORMAT_YVU444 = 0x34325659, +}; +#endif /* WL_DRM_FORMAT_ENUM */ + +struct wl_drm_listener { + /** + * device - device + * @name: name + */ + void (*device)(void *data, + struct wl_drm *wl_drm, + const char *name); + /** + * format - format + * @format: format + */ + void (*format)(void *data, + struct wl_drm *wl_drm, + uint32_t format); + /** + * authenticated - authenticated + */ + void (*authenticated)(void *data, + struct wl_drm *wl_drm); +}; + +static inline int +wl_drm_add_listener(struct wl_drm *wl_drm, + const struct wl_drm_listener *listener, void *data) +{ + return wl_proxy_add_listener((struct wl_proxy *) wl_drm, + (void (**)(void)) listener, data); +} + +#define WL_DRM_AUTHENTICATE 0 +#define WL_DRM_CREATE_BUFFER 1 +#define WL_DRM_CREATE_PLANAR_BUFFER 2 + +static inline void +wl_drm_set_user_data(struct wl_drm *wl_drm, void *user_data) +{ + wl_proxy_set_user_data((struct wl_proxy *) wl_drm, user_data); +} + +static inline void * +wl_drm_get_user_data(struct wl_drm *wl_drm) +{ + return wl_proxy_get_user_data((struct wl_proxy *) wl_drm); +} + +static inline void +wl_drm_destroy(struct wl_drm *wl_drm) +{ + wl_proxy_destroy((struct wl_proxy *) wl_drm); +} + +static inline void +wl_drm_authenticate(struct wl_drm *wl_drm, uint32_t id) +{ + wl_proxy_marshal((struct wl_proxy *) wl_drm, + WL_DRM_AUTHENTICATE, id); +} + +static inline struct wl_buffer * +wl_drm_create_buffer(struct wl_drm *wl_drm, uint32_t name, int32_t width, int32_t height, uint32_t stride, uint32_t format) +{ + struct wl_proxy *id; + + id = wl_proxy_create((struct wl_proxy *) wl_drm, + &wl_buffer_interface); + if (!id) + return NULL; + + wl_proxy_marshal((struct wl_proxy *) wl_drm, + WL_DRM_CREATE_BUFFER, id, name, width, height, stride, format); + + return (struct wl_buffer *) id; +} + +static inline struct wl_buffer * +wl_drm_create_planar_buffer(struct wl_drm *wl_drm, uint32_t name, int32_t width, int32_t height, uint32_t format, int32_t offset0, int32_t stride0, int32_t offset1, int32_t stride1, int32_t offset2, int32_t stride2) +{ + struct wl_proxy *id; + + id = wl_proxy_create((struct wl_proxy *) wl_drm, + &wl_buffer_interface); + if (!id) + return NULL; + + wl_proxy_marshal((struct wl_proxy *) wl_drm, + WL_DRM_CREATE_PLANAR_BUFFER, id, name, width, height, format, offset0, stride0, offset1, stride1, offset2, stride2); + + return (struct wl_buffer *) id; +} + +#ifdef __cplusplus +} +#endif + +#endif diff -Nru intel-vaapi-driver-1.0.15/src/wayland-drm.xml intel-vaapi-driver-1.7.1/src/wayland-drm.xml --- intel-vaapi-driver-1.0.15/src/wayland-drm.xml 1970-01-01 00:00:00.000000000 +0000 +++ intel-vaapi-driver-1.7.1/src/wayland-drm.xml 2016-06-17 01:06:24.000000000 +0000 @@ -0,0 +1,155 @@ + + + + + Copyright © 2008-2011 Kristian Høgsberg + Copyright © 2010-2011 Intel Corporation + + Permission to use, copy, modify, distribute, and sell this + software and its documentation for any purpose is hereby granted + without fee, provided that\n the above copyright notice appear in + all copies and that both that copyright notice and this permission + notice appear in supporting documentation, and that the name of + the copyright holders not be used in advertising or publicity + pertaining to distribution of the software without specific, + written prior permission. The copyright holders make no + representations about the suitability of this software for any + purpose. It is provided "as is" without express or implied + warranty. + + THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS + SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND + FITNESS, IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY + SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN + AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, + ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF + THIS SOFTWARE. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +